From 2e151c70dfb0075ff83bec305c52a9da1ba49089 Mon Sep 17 00:00:00 2001 From: Peter Neubauer Date: Fri, 12 Sep 2014 13:06:13 +0200 Subject: x86: HPET force enable for e6xx based systems As the Soekris net6501 and other e6xx based systems do not have any ACPI implementation, HPET won't get enabled. This patch enables HPET on such platforms. [ 0.430149] pci 0000:00:01.0: Force enabled HPET at 0xfed00000 [ 0.644838] HPET: 3 timers in total, 0 timers will be used for per-cpu timer Original patch by Peter Neubauer (http://www.mail-archive.com/soekris-tech@lists.soekris.com/msg06462.html) slightly modified by Conrad Kostecki and massaged accoring to Thomas Gleixners by me. Suggested-by: Conrad Kostecki Signed-off-by: Eric Sesterhenn Cc: Peter Neubauer Link: http://lkml.kernel.org/r/5412D3A5.2030909@lsexperts.de Signed-off-by: Thomas Gleixner --- arch/x86/kernel/quirks.c | 18 ++++++++++++++++++ include/linux/pci_ids.h | 1 + 2 files changed, 19 insertions(+) diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c index ff898bbf579d..176a0f99d4da 100644 --- a/arch/x86/kernel/quirks.c +++ b/arch/x86/kernel/quirks.c @@ -497,6 +497,24 @@ void force_hpet_resume(void) } } +/* + * According to the datasheet e6xx systems have the HPET hardwired to + * 0xfed00000 + */ +static void e6xx_force_enable_hpet(struct pci_dev *dev) +{ + if (hpet_address || force_hpet_address) + return; + + force_hpet_address = 0xFED00000; + force_hpet_resume_type = NONE_FORCE_HPET_RESUME; + dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at " + "0x%lx\n", force_hpet_address); + return; +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E6XX_CU, + e6xx_force_enable_hpet); + /* * HPET MSI on some boards (ATI SB700/SB800) has side effect on * floppy DMA. Disable HPET MSI on such platforms. diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 6ed0bb73a864..aa0d39073e9c 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2860,6 +2860,7 @@ #define PCI_DEVICE_ID_INTEL_82372FB_1 0x7601 #define PCI_DEVICE_ID_INTEL_SCH_LPC 0x8119 #define PCI_DEVICE_ID_INTEL_SCH_IDE 0x811a +#define PCI_DEVICE_ID_INTEL_E6XX_CU 0x8183 #define PCI_DEVICE_ID_INTEL_ITC_LPC 0x8186 #define PCI_DEVICE_ID_INTEL_82454GX 0x84c4 #define PCI_DEVICE_ID_INTEL_82450GX 0x84c5 -- cgit v1.2.3