From 477d8a5186bb5c4b9c8ec0acf1d4ce62f7edb97a Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Thu, 27 Mar 2014 18:19:10 +0100 Subject: colibri_vf: add optional support for UART3 and UART4 UART3 and UART4 are possible additions to a custom Colibri carrier board. This patch muxes RX/TX pins for those UARTs, as well as enables DMA and FIFO for those instances. However, UART3 conflicts with Colibris default SD card data pins, so this option disables SD-Card support (SDHC1). --- arch/arm/mach-mvf/Kconfig | 12 +++++++++ arch/arm/mach-mvf/board-colibri_vf.c | 36 +++++++++++++++++++++++++++ arch/arm/mach-mvf/clock.c | 1 + arch/arm/plat-mxc/devices/platform-imx-uart.c | 2 ++ arch/arm/plat-mxc/include/mach/iomux-mvf.h | 16 ++++++++++++ 5 files changed, 67 insertions(+) diff --git a/arch/arm/mach-mvf/Kconfig b/arch/arm/mach-mvf/Kconfig index a19fa1bae723..cece02089f68 100644 --- a/arch/arm/mach-mvf/Kconfig +++ b/arch/arm/mach-mvf/Kconfig @@ -39,6 +39,18 @@ config MACH_COLIBRI_VF61 Include support for Toradex Colibri VF61 module on Iris carrier board. This includes specific configurations for the board and its peripherals. +config UART3_SUPPORT + bool "Support alternative pinmux for UART3" + depends on MACH_COLIBRI_VF50 || MACH_COLIBRI_VF61 + help + Include support for UART3 on SODIMM 23/31. + +config UART4_SUPPORT + bool "Support alternative pinmux for UART4" + depends on MACH_COLIBRI_VF50 || MACH_COLIBRI_VF61 + help + Include support for UART4 on SODIMM 51/53. + config COLIBRI_VF bool select ARCH_MVFA5 diff --git a/arch/arm/mach-mvf/board-colibri_vf.c b/arch/arm/mach-mvf/board-colibri_vf.c index a631517e5490..02b0284e906b 100644 --- a/arch/arm/mach-mvf/board-colibri_vf.c +++ b/arch/arm/mach-mvf/board-colibri_vf.c @@ -75,8 +75,10 @@ static iomux_v3_cfg_t mvf600_pads[] = { MVF600_PAD15_PTA25__SDHC1_CMD, MVF600_PAD16_PTA26__SDHC1_DAT0, MVF600_PAD17_PTA27__SDHC1_DAT1, +#ifndef CONFIG_UART4_SUPPORT MVF600_PAD18_PTA28__SDHC1_DAT2, MVF600_PAD19_PTA29__SDHC1_DAT3, +#endif /* set PTB20 as GPIO for sdhc card detecting */ MVF600_PAD42_PTB20__SDHC1_SW_CD, @@ -193,6 +195,16 @@ static iomux_v3_cfg_t mvf600_pads[] = { MVF600_PAD81_PTD2_UART2_RTS, MVF600_PAD82_PTD3_UART2_CTS, + /* UART3/4 */ +#ifdef CONFIG_UART3_SUPPORT + MVF600_PAD10_UART3_TX, /* SODIMM 23 */ + MVF600_PAD11_UART3_RX, /* SODIMM 31 */ +#endif +#ifdef CONFIG_UART4_SUPPORT + MVF600_PAD18_UART4_TX, /* SODIMM 51 */ + MVF600_PAD19_UART4_RX, /* SODIMM 53 */ +#endif + /* USB */ MVF600_PAD83_PTD4__USBH_PEN, MVF600_PAD102_PTC29__USBC_DET, /* multiplexed USB0_VBUS_DET */ @@ -342,11 +354,33 @@ static struct imxuart_platform_data mvf_uart2_pdata = { .dma_req_tx = DMA_MUX03_UART2_TX, }; +#ifdef CONFIG_UART3_SUPPORT +static struct imxuart_platform_data mvf_uart3_pdata = { + .flags = IMXUART_FIFO | IMXUART_EDMA, + .dma_req_rx = DMA_MUX03_UART3_RX, + .dma_req_tx = DMA_MUX03_UART3_TX, +}; +#endif + +#ifdef CONFIG_UART4_SUPPORT +static struct imxuart_platform_data mvf_uart4_pdata = { + .flags = IMXUART_FIFO | IMXUART_EDMA, + .dma_req_rx = DMA_MUX12_UART4_RX + 64, + .dma_req_tx = DMA_MUX12_UART4_TX + 64, +}; +#endif + static inline void mvf_vf700_init_uart(void) { mvf_add_imx_uart(0, &mvf_uart0_pdata); mvf_add_imx_uart(1, &mvf_uart1_pdata); mvf_add_imx_uart(2, &mvf_uart2_pdata); +#ifdef CONFIG_UART3_SUPPORT + mvf_add_imx_uart(3, &mvf_uart3_pdata); +#endif +#ifdef CONFIG_UART4_SUPPORT + mvf_add_imx_uart(4, &mvf_uart4_pdata); +#endif } static int colibri_ts_mux_pen_interrupt(struct platform_device *pdev) @@ -671,7 +705,9 @@ static void __init mvf_board_init(void) mvf700_add_caam(); +#ifndef CONFIG_UART4_SUPPORT mvf_add_sdhci_esdhc_imx(1, &mvfa5_sd1_data); +#endif mvf_add_imx_i2c(0, &mvf600_i2c_data); diff --git a/arch/arm/mach-mvf/clock.c b/arch/arm/mach-mvf/clock.c index 7c95a2638128..37247607311d 100644 --- a/arch/arm/mach-mvf/clock.c +++ b/arch/arm/mach-mvf/clock.c @@ -2060,6 +2060,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "mvf-uart.1", uart_clk[0]), _REGISTER_CLOCK(NULL, "mvf-uart.2", uart_clk[0]), _REGISTER_CLOCK(NULL, "mvf-uart.3", uart_clk[0]), + _REGISTER_CLOCK(NULL, "mvf-uart.4", uart_clk[0]), _REGISTER_CLOCK("mvf-dspi.0", NULL, dspi_clk[0]), _REGISTER_CLOCK("mvf-dspi.1", NULL, dspi_clk[1]), _REGISTER_CLOCK("pit", NULL, pit_clk), diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/plat-mxc/devices/platform-imx-uart.c index 3c9010784cda..fc356e031f30 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-uart.c +++ b/arch/arm/plat-mxc/devices/platform-imx-uart.c @@ -144,6 +144,8 @@ const struct imx_imx_uart_1irq_data mvf_imx_uart_data[] __initconst = { mvf_imx_uart_data_entry(1, 1), mvf_imx_uart_data_entry(2, 2), mvf_imx_uart_data_entry(3, 3), + mvf_imx_uart_data_entry(4, 4), + mvf_imx_uart_data_entry(5, 5), }; #endif /* ifdef CONFIG_SOC_MVFA5 */ diff --git a/arch/arm/plat-mxc/include/mach/iomux-mvf.h b/arch/arm/plat-mxc/include/mach/iomux-mvf.h index b77d2d40d284..28a6ed1a185a 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mvf.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mvf.h @@ -416,6 +416,22 @@ typedef enum iomux_config { IOMUX_PAD(0x0148, 0x0148, 2, 0x0384, 1, \ MVF600_UART_PAD_CTRL | PAD_CTL_IBE_ENABLE) +/* UART3 */ +#define MVF600_PAD10_UART3_TX \ + IOMUX_PAD(0x0028, 0x0028, 6, 0x0394, 0, \ + MVF600_UART_PAD_CTRL | PAD_CTL_OBE_ENABLE) +#define MVF600_PAD11_UART3_RX \ + IOMUX_PAD(0x002C, 0x002C, 6, 0x0390, 0, \ + MVF600_UART_PAD_CTRL | PAD_CTL_IBE_ENABLE) + +/* UART4 */ +#define MVF600_PAD18_UART4_TX \ + IOMUX_PAD(0x0048, 0x0048, 4, 0x0000, 0, \ + MVF600_UART_PAD_CTRL | PAD_CTL_OBE_ENABLE) +#define MVF600_PAD19_UART4_RX \ + IOMUX_PAD(0x004C, 0x004C, 4, 0x0000, 0, \ + MVF600_UART_PAD_CTRL | PAD_CTL_IBE_ENABLE) + /* SO-DIMM 28/30 used for touch interrupt/reset (also PWM-B/PWM-C) */ #define MVF600_PAD23_PTB1_RESET \ IOMUX_PAD(0x005c, 0x005c, 0, 0x0000, 0, MVF600_FTM0_CH_CTRL) -- cgit v1.2.3