From 6ac5557d9086e21907661ec995a42381fb6e970e Mon Sep 17 00:00:00 2001 From: Francesco Dolcini Date: Tue, 18 Apr 2023 11:47:08 +0200 Subject: arm64: dts: ti: k3-am625-verdin-dev: use CLKOUT0 clock for DSI bridge Use EXT_REFCLK1.CLKOUT0 for the DSI bridge reference clock, sharing it with the on-SoM ethernet clock. Upstream-Status: Pending Initial DTS to be used for bring-up an validation of the V1.0 design, we'll decide on the step forward to mainline this once the bring-up and validation will be done. Signed-off-by: Francesco Dolcini --- arch/arm64/boot/dts/ti/k3-am625-verdin.dtsi | 29 ++++------------------------- 1 file changed, 4 insertions(+), 25 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am625-verdin.dtsi index 11160e6d1d76..d42125f56fcf 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-verdin.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin.dtsi @@ -46,23 +46,6 @@ usb1 = &usb1; }; - /* DSI Bridge REFCLK */ - clk_dsi_bridge_refclk_fixed: clock-dsi-bridge-refclk-fixed { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <20000000>; - }; - - clk_dsi_bridge_refclk: clock-dsi-bridge-refclk { - compatible = "gpio-gate-clock"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_bridge_clk_en>; - #clock-cells = <0>; - clocks = <&clk_dsi_bridge_refclk_fixed>; - /* PMIC_BRIDGE_CLK_EN */ - enable-gpios = <&main_gpio0 28 GPIO_ACTIVE_HIGH>; - }; - extcon_usb0: extcon-usb0 { compatible = "linux,extcon-usb-gpio"; id-gpios = <&main_gpio1 19 GPIO_ACTIVE_HIGH>; @@ -318,13 +301,6 @@ >; }; - /* PMIC_BRIDGE_CLK_EN */ - pinctrl_bridge_clk_en: main-gpio0-28-pins-default { - pinctrl-single,pins = < - AM62X_IOPAD(0x0070, PIN_INPUT, 7) /* (T24) GPMC0_AD13.GPIO0_28 */ - >; - }; - /* Verdin SD_1_PWR_EN */ pinctrl_sd1_pwr_en: main-gpio0-29-pins-default { pinctrl-single,pins = < @@ -1062,9 +1038,12 @@ dsi_bridge: bridge@e { compatible = "toshiba,tc358778"; reg = <0xe>; + assigned-clocks = <&k3_clks 157 20>; + assigned-clock-parents = <&k3_clks 157 22>; + assigned-clock-rates = <25000000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_bridge_reset>; - clocks = <&clk_dsi_bridge_refclk>; + clocks = <&k3_clks 157 20>; clock-names = "refclk"; reset-gpios = <&main_gpio0 20 GPIO_ACTIVE_LOW>; vddc-supply = <®_1v2_dsi>; -- cgit v1.2.3