From d784cfe697abdfd53f332d39d0cffcf03cbcafaa Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Mon, 2 Feb 2026 18:43:25 +0000 Subject: KVM: arm64: Simplify handling of full register invalid constraint Now that we embed the RESx bits in the register description, it becomes easier to deal with registers that are simply not valid, as their existence is not satisfied by the configuration (SCTLR2_ELx without FEAT_SCTLR2, for example). Such registers essentially become RES0 for any bit that wasn't already advertised as RESx. Reviewed-by: Fuad Tabba Tested-by: Fuad Tabba Link: https://patch.msgid.link/20260202184329.2724080-17-maz@kernel.org Signed-off-by: Marc Zyngier --- arch/arm64/kvm/config.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/arch/arm64/kvm/config.c b/arch/arm64/kvm/config.c index 274ae049c4b3..b37b40744db9 100644 --- a/arch/arm64/kvm/config.c +++ b/arch/arm64/kvm/config.c @@ -1321,7 +1321,7 @@ static struct resx compute_reg_resx_bits(struct kvm *kvm, unsigned long require, unsigned long exclude) { - struct resx resx, tmp; + struct resx resx; resx = compute_resx_bits(kvm, r->bit_feat_map, r->bit_feat_map_sz, require, exclude); @@ -1331,11 +1331,14 @@ static struct resx compute_reg_resx_bits(struct kvm *kvm, resx.res1 |= r->feat_map.masks->res1; } - tmp = compute_resx_bits(kvm, &r->feat_map, 1, require, exclude); - - resx.res0 |= tmp.res0; - resx.res0 |= ~reg_feat_map_bits(&r->feat_map); - resx.res1 |= tmp.res1; + /* + * If the register itself was not valid, all the non-RESx bits are + * now considered RES0 (this matches the behaviour of registers such + * as SCTLR2 and TCR2). Weed out any potential (though unlikely) + * overlap with RES1 bits coming from the previous computation. + */ + resx.res0 |= compute_resx_bits(kvm, &r->feat_map, 1, require, exclude).res0; + resx.res1 &= ~resx.res0; return resx; } -- cgit v1.2.3