From eb7639ad28dae74d982b29f6caa7c98ec0baa501 Mon Sep 17 00:00:00 2001 From: Roger Hsieh Date: Mon, 11 Jul 2011 14:42:40 +0800 Subject: arm: tegra: correct 3D power gate WAR. 3D power gate should be always disabled to keep the power. Set T20 enabled by default. Bug 843271 Change-Id: Icf464cd107e65636440f8103ac6b104e2939e8b9 Reviewed-on: http://git-master/r/40342 Reviewed-on: http://git-master/r/43175 Reviewed-by: David Schalig Tested-by: David Schalig Reviewed-by: Bharat Nihalani --- arch/arm/mach-tegra/Kconfig | 8 ++++++++ arch/arm/mach-tegra/common.c | 2 ++ drivers/video/tegra/host/nvhost_acm.c | 3 +-- 3 files changed, 11 insertions(+), 2 deletions(-) mode change 100644 => 100755 arch/arm/mach-tegra/Kconfig mode change 100644 => 100755 arch/arm/mach-tegra/common.c mode change 100644 => 100755 drivers/video/tegra/host/nvhost_acm.c diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig old mode 100644 new mode 100755 index 1e11fa6c7855..635c0b00afb4 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -14,6 +14,7 @@ config ARCH_TEGRA_2x_SOC select USB_ARCH_HAS_EHCI if USB_SUPPORT select USB_ULPI if USB_SUPPORT select USB_ULPI_VIEWPORT if USB_SUPPORT + select DISABLE_3D_POWERGATING help Support for NVIDIA Tegra AP20 and T20 processors, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller @@ -151,3 +152,10 @@ config TEGRA_STAT_MON config USB_HOTPLUG bool "Enable USB hotplug" default n + +config DISABLE_3D_POWERGATING + bool "Disable 3D power gate" + depends on ARCH_TEGRA_2x_SOC + help + This is for silicon errata of 3D power gating. By setting this + config, 3D power will never be gated. diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c old mode 100644 new mode 100755 index 4091b6de2bcc..b3cf6feb1fca --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -162,7 +162,9 @@ void __init tegra_init_cache(void) static void __init tegra_init_power(void) { tegra_powergate_power_off(TEGRA_POWERGATE_MPE); +#if !CONFIG_DISABLE_3D_POWERGATING tegra_powergate_power_off(TEGRA_POWERGATE_3D); +#endif tegra_powergate_power_off(TEGRA_POWERGATE_PCIE); } diff --git a/drivers/video/tegra/host/nvhost_acm.c b/drivers/video/tegra/host/nvhost_acm.c old mode 100644 new mode 100755 index bde5a7f9ffc8..4fd1820df0b5 --- a/drivers/video/tegra/host/nvhost_acm.c +++ b/drivers/video/tegra/host/nvhost_acm.c @@ -32,7 +32,6 @@ #define ACM_TIMEOUT_MSEC 40 -#define DISABLE_3D_POWERGATING #define DISABLE_MPE_POWERGATING void nvhost_module_busy(struct nvhost_module *mod) @@ -152,7 +151,7 @@ int nvhost_module_init(struct nvhost_module *mod, const char *name, mod->powered = false; mod->powergate_id = get_module_powergate_id(name); -#ifdef DISABLE_3D_POWERGATING +#if CONFIG_DISABLE_3D_POWERGATING /* * It is possible for the 3d block to generate an invalid memory * request during the power up sequence in some cases. Workaround -- cgit v1.2.3