From f1db30219faaee75f8bf69156cf72f4fd2f9b454 Mon Sep 17 00:00:00 2001 From: Jon Mayo Date: Tue, 30 Oct 2012 18:17:25 -0700 Subject: video: tegra: dc: use apis to calculate EMC frequency Use MC api tegra_mc_get_effective_bytes_width to calculate EMC clock. bug 1167105 Change-Id: I06eee3ced3d54e5699ae84051e4e1a9f548079de Signed-off-by: Jon Mayo Reviewed-on: http://git-master/r/167836 Reviewed-by: Automatic_Commit_Validation_User --- drivers/video/tegra/dc/bandwidth.c | 20 +++++++++++++------- drivers/video/tegra/dc/dc_priv_defs.h | 9 --------- 2 files changed, 13 insertions(+), 16 deletions(-) diff --git a/drivers/video/tegra/dc/bandwidth.c b/drivers/video/tegra/dc/bandwidth.c index 609b6ae3781d..5a510d58d1a2 100644 --- a/drivers/video/tegra/dc/bandwidth.c +++ b/drivers/video/tegra/dc/bandwidth.c @@ -266,6 +266,16 @@ void tegra_dc_program_bandwidth(struct tegra_dc *dc, bool use_new) } } +/* bw in kByte/second. returns Hz for EMC frequency */ +static inline unsigned long tegra_dc_kbps_to_emc(unsigned long bw) +{ + if (bw >= (ULONG_MAX / 1000)) + return ULONG_MAX; + if (WARN_ONCE((bw * 1000) < bw, "Bandwidth Overflow")) + return ULONG_MAX; + return tegra_emc_bw_to_freq_req(bw) * 1000; +} + int tegra_dc_set_dynamic_emc(struct tegra_dc_win *windows[], int n) { unsigned long new_rate; @@ -276,15 +286,11 @@ int tegra_dc_set_dynamic_emc(struct tegra_dc_win *windows[], int n) dc = windows[0]->dc; - /* calculate the new rate based on this POST */ - new_rate = tegra_dc_get_bandwidth(windows, n); - if (WARN_ONCE(new_rate > (ULONG_MAX / 1000), "bandwidth maxed out\n")) - new_rate = ULONG_MAX; - else - new_rate = EMC_BW_TO_FREQ(new_rate * 1000); - if (tegra_dc_has_multiple_dc()) new_rate = ULONG_MAX; + else + new_rate = tegra_dc_kbps_to_emc( + tegra_dc_get_bandwidth(windows, n)); dc->new_emc_clk_rate = new_rate; trace_set_dynamic_emc(dc); diff --git a/drivers/video/tegra/dc/dc_priv_defs.h b/drivers/video/tegra/dc/dc_priv_defs.h index 0600c2c02928..d1bfb0d7f0b6 100644 --- a/drivers/video/tegra/dc/dc_priv_defs.h +++ b/drivers/video/tegra/dc/dc_priv_defs.h @@ -42,19 +42,10 @@ #define NEED_UPDATE_EMC_ON_EVERY_FRAME (windows_idle_detection_time == 0) -/* DDR: 8 bytes transfer per clock */ -#define DDR_BW_TO_FREQ(bw) ((bw) / 8) - /* 29 bit offset for window clip number */ #define CURSOR_CLIP_SHIFT_BITS(win) (win << 29) #define CURSOR_CLIP_GET_WINDOW(reg) ((reg >> 29) & 3) -#if defined(CONFIG_TEGRA_EMC_TO_DDR_CLOCK) -#define EMC_BW_TO_FREQ(bw) (DDR_BW_TO_FREQ(bw) * CONFIG_TEGRA_EMC_TO_DDR_CLOCK) -#else -#define EMC_BW_TO_FREQ(bw) (DDR_BW_TO_FREQ(bw) * 2) -#endif - #ifndef CONFIG_TEGRA_FPGA_PLATFORM #define ALL_UF_INT (WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT) #else -- cgit v1.2.3