From 8d0d56ba24d8d0b04bc9d9a7fbd1796d8966159f Mon Sep 17 00:00:00 2001 From: Vineet Gupta Date: Mon, 2 Feb 2015 19:23:21 +0530 Subject: ARC: [axs101] support early 8250 uart Earlycon calculates UART clock as "BASE_BAUD * 16". In case of ARC "BASE_BAUD" is calculated dynamically in runtime, basically it is an alias to arc_early_base_baud(), which in turn just does "arc_base_baud/16". 8250 UART on AXS/SDP board uses 33.3MHz clock source which is set in "arc_base_baud" with this change. Additional compatibility string "snps,arc-sdp" is introduced as well because there're different flavours of AXS boards but they all share the same motherboard and so it's possible to re-use the same code for motherbord even if CPU daughterboard changes. Signed-off-by: Vineet Gupta --- Documentation/devicetree/bindings/arc/axs101.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/arc') diff --git a/Documentation/devicetree/bindings/arc/axs101.txt b/Documentation/devicetree/bindings/arc/axs101.txt index 568aa5f74de2..48290d5178b5 100644 --- a/Documentation/devicetree/bindings/arc/axs101.txt +++ b/Documentation/devicetree/bindings/arc/axs101.txt @@ -4,4 +4,4 @@ Synopsys DesignWare ARC Software Development Platforms Device Tree Bindings SDP Main Board with an AXC001 CPU Card hoisting ARC700 core in silicon Required root node properties: - - compatible = "snps,axs101"; + - compatible = "snps,axs101", "snps,arc-sdp"; -- cgit v1.2.3