From e3d19244c84319a7a7befc7965bbe6e6f8962a2f Mon Sep 17 00:00:00 2001 From: Alan Tull Date: Tue, 12 Jul 2016 14:36:41 -0500 Subject: ARM: socfpga: add bindings document for fpga bridge drivers Add bindings documentation for Altera SOCFPGA bridges: * fpga2sdram * fpga2hps * hps2fpga * lwhps2fpga Signed-off-by: Alan Tull Signed-off-by: Matthew Gerlach Signed-off-by: Dinh Nguyen Acked-by: Rob Herring Signed-off-by: Rob Herring --- .../bindings/fpga/altera-fpga2sdram-bridge.txt | 16 +++++++++ .../bindings/fpga/altera-hps2fpga-bridge.txt | 39 ++++++++++++++++++++++ 2 files changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt create mode 100644 Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt (limited to 'Documentation/devicetree/bindings/fpga') diff --git a/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt new file mode 100644 index 000000000000..817a8d4bf903 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt @@ -0,0 +1,16 @@ +Altera FPGA To SDRAM Bridge Driver + +Required properties: +- compatible : Should contain "altr,socfpga-fpga2sdram-bridge" + +Optional properties: +- bridge-enable : 0 if driver should disable bridge at startup + 1 if driver should enable bridge at startup + Default is to leave bridge in current state. + +Example: + fpga_bridge3: fpga-bridge@ffc25080 { + compatible = "altr,socfpga-fpga2sdram-bridge"; + reg = <0xffc25080 0x4>; + bridge-enable = <0>; + }; diff --git a/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt new file mode 100644 index 000000000000..6406f9337eeb --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt @@ -0,0 +1,39 @@ +Altera FPGA/HPS Bridge Driver + +Required properties: +- regs : base address and size for AXI bridge module +- compatible : Should contain one of: + "altr,socfpga-lwhps2fpga-bridge", + "altr,socfpga-hps2fpga-bridge", or + "altr,socfpga-fpga2hps-bridge" +- resets : Phandle and reset specifier for this bridge's reset +- clocks : Clocks used by this module. + +Optional properties: +- bridge-enable : 0 if driver should disable bridge at startup. + 1 if driver should enable bridge at startup. + Default is to leave bridge in its current state. + +Example: + fpga_bridge0: fpga-bridge@ff400000 { + compatible = "altr,socfpga-lwhps2fpga-bridge"; + reg = <0xff400000 0x100000>; + resets = <&rst LWHPS2FPGA_RESET>; + clocks = <&l4_main_clk>; + bridge-enable = <0>; + }; + + fpga_bridge1: fpga-bridge@ff500000 { + compatible = "altr,socfpga-hps2fpga-bridge"; + reg = <0xff500000 0x10000>; + resets = <&rst HPS2FPGA_RESET>; + clocks = <&l4_main_clk>; + bridge-enable = <1>; + }; + + fpga_bridge2: fpga-bridge@ff600000 { + compatible = "altr,socfpga-fpga2hps-bridge"; + reg = <0xff600000 0x100000>; + resets = <&rst FPGA2HPS_RESET>; + clocks = <&l4_main_clk>; + }; -- cgit v1.2.3 From 1adcbea4201a6852362aa5ece573f1f169b28113 Mon Sep 17 00:00:00 2001 From: Alan Tull Date: Tue, 12 Jul 2016 14:07:08 -0500 Subject: ARM: socfpga: add bindings doc for arria10 fpga manager Add a device tree bindings document for the SoCFPGA Arria10 FPGA Manager driver. Signed-off-by: Alan Tull Acked-by: Rob Herring Acked-By: Moritz Fischer Signed-off-by: Rob Herring --- .../bindings/fpga/altera-socfpga-a10-fpga-mgr.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/altera-socfpga-a10-fpga-mgr.txt (limited to 'Documentation/devicetree/bindings/fpga') diff --git a/Documentation/devicetree/bindings/fpga/altera-socfpga-a10-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/altera-socfpga-a10-fpga-mgr.txt new file mode 100644 index 000000000000..2fd8e7a84734 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altera-socfpga-a10-fpga-mgr.txt @@ -0,0 +1,19 @@ +Altera SOCFPGA Arria10 FPGA Manager + +Required properties: +- compatible : should contain "altr,socfpga-a10-fpga-mgr" +- reg : base address and size for memory mapped io. + - The first index is for FPGA manager register access. + - The second index is for writing FPGA configuration data. +- resets : Phandle and reset specifier for the device's reset. +- clocks : Clocks used by the device. + +Example: + + fpga_mgr: fpga-mgr@ffd03000 { + compatible = "altr,socfpga-a10-fpga-mgr"; + reg = <0xffd03000 0x100 + 0xffcfe400 0x20>; + clocks = <&l4_mp_clk>; + resets = <&rst FPGAMGR_RESET>; + }; -- cgit v1.2.3 From 3c263bc7b7270aec7d97edb5625b795707d2f1fa Mon Sep 17 00:00:00 2001 From: Alan Tull Date: Mon, 17 Oct 2016 11:09:34 -0500 Subject: add bindings document for altera freeze bridge Add bindings document for the Altera Freeze Bridge. A Freeze Bridge is used to gate traffic to/from a region of a FPGA such that that region can be reprogrammed. The Freeze Bridge exist in FPGA fabric that is not currently being reconfigured. Signed-off-by: Alan Tull Signed-off-by: Matthew Gerlach Acked-by: Rob Herring Signed-off-by: Rob Herring --- .../bindings/fpga/altera-freeze-bridge.txt | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt (limited to 'Documentation/devicetree/bindings/fpga') diff --git a/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt new file mode 100644 index 000000000000..f8e288c71b2d --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt @@ -0,0 +1,23 @@ +Altera Freeze Bridge Controller Driver + +The Altera Freeze Bridge Controller manages one or more freeze bridges. +The controller can freeze/disable the bridges which prevents signal +changes from passing through the bridge. The controller can also +unfreeze/enable the bridges which allows traffic to pass through the +bridge normally. + +Required properties: +- compatible : Should contain "altr,freeze-bridge-controller" +- regs : base address and size for freeze bridge module + +Optional properties: +- bridge-enable : 0 if driver should disable bridge at startup + 1 if driver should enable bridge at startup + Default is to leave bridge in current state. + +Example: + freeze-controller@100000450 { + compatible = "altr,freeze-bridge-controller"; + regs = <0x1000 0x10>; + bridge-enable = <0>; + }; -- cgit v1.2.3