From 4729cbe038fdd321839d7780ee93ce1ccf1e7b29 Mon Sep 17 00:00:00 2001 From: Jan Glauber Date: Mon, 25 Apr 2016 16:33:35 +0200 Subject: i2c: octeon: Add support for cn78xx chips cn78xx has a different interrupt architecture, so we have to manage the interrupts differently. Signed-off-by: David Daney Signed-off-by: Jan Glauber Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-octeon.txt | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings/i2c') diff --git a/Documentation/devicetree/bindings/i2c/i2c-octeon.txt b/Documentation/devicetree/bindings/i2c/i2c-octeon.txt index dced82ebe31d..872d485dffab 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-octeon.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-octeon.txt @@ -4,6 +4,12 @@ Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. + or + + compatible: "cavium,octeon-7890-twsi" + + Compatibility with cn78XX SOCs. + - reg: The base address of the TWSI/I2C bus controller register bank. - #address-cells: Must be <1>. -- cgit v1.2.3