From 866246534836c60f706076cdefcd45072ad9eab2 Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Tue, 16 Jul 2019 15:18:40 +0100 Subject: dt-bindings: interrupt-controller: arm,gic-v3: Describe ESPI range support GICv3.1 introduces support for new interrupt ranges, one of them being the Extended SPI range (ESPI). The DT binding is extended to deal with it as a new interrupt class. Reviewed-by: Lokesh Vutla Signed-off-by: Marc Zyngier --- .../devicetree/bindings/interrupt-controller/arm,gic-v3.yaml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings/interrupt-controller') diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml index c34df35a25fc..98a3ecda8e07 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml @@ -44,11 +44,12 @@ properties: be at least 4. The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI - interrupts. Other values are reserved for future use. + interrupts, 2 for interrupts in the Extended SPI range. Other values + are reserved for future use. The 2nd cell contains the interrupt number for the interrupt type. SPI interrupts are in the range [0-987]. PPI interrupts are in the - range [0-15]. + range [0-15]. Extented SPI interrupts are in the range [0-1023]. The 3rd cell is the flags, encoded as follows: bits[3:0] trigger type and level flags. -- cgit v1.2.3 From 4b049063e0bcbfd302f6bf867de9d55a965d622e Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Thu, 18 Jul 2019 13:18:51 +0100 Subject: dt-bindings: interrupt-controller: arm,gic-v3: Describe EPPI range support Update the GICv3 binding to allow interrupts in the EPPI range. Signed-off-by: Marc Zyngier --- .../devicetree/bindings/interrupt-controller/arm,gic-v3.yaml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings/interrupt-controller') diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml index 98a3ecda8e07..1fe147daca4c 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml @@ -44,12 +44,13 @@ properties: be at least 4. The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI - interrupts, 2 for interrupts in the Extended SPI range. Other values - are reserved for future use. + interrupts, 2 for interrupts in the Extended SPI range, 3 for the + Extended PPI range. Other values are reserved for future use. The 2nd cell contains the interrupt number for the interrupt type. SPI interrupts are in the range [0-987]. PPI interrupts are in the range [0-15]. Extented SPI interrupts are in the range [0-1023]. + Extended PPI interrupts are in the range [0-127]. The 3rd cell is the flags, encoded as follows: bits[3:0] trigger type and level flags. -- cgit v1.2.3 From abc08aac82af0c71e30b446575f5810c9cc11640 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Thu, 29 Aug 2019 18:16:34 +0200 Subject: dt-bindings: interrupt-controller: New binding for the meson sm1 SoCs Update the dt-binding to add support for the sm1 SoC family in the amlogic GPIO interrupt controller driver. Signed-off-by: Jerome Brunet Signed-off-by: Marc Zyngier Link: https://lore.kernel.org/r/20190829161635.25067-2-jbrunet@baylibre.com --- .../devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/interrupt-controller') diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt index 7d531d5fff29..684bb1cd75ec 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt @@ -16,6 +16,7 @@ Required properties: "amlogic,meson-gxl-gpio-intc" for GXL SoCs (S905X, S912) "amlogic,meson-axg-gpio-intc" for AXG SoCs (A113D, A113X) "amlogic,meson-g12a-gpio-intc" for G12A SoCs (S905D2, S905X2, S905Y2) + "amlogic,meson-sm1-gpio-intc" for SM1 SoCs (S905D3, S905X3, S905Y3) - reg : Specifies base physical address and size of the registers. - interrupt-controller : Identifies the node as an interrupt controller. - #interrupt-cells : Specifies the number of cells needed to encode an -- cgit v1.2.3