From 8d598cabf50d837e69ebd6fc86aec5550df2b3a2 Mon Sep 17 00:00:00 2001 From: Phil Edworthy Date: Tue, 3 Nov 2015 16:19:26 +0000 Subject: PCI: rcar: Allow DT to override default window settings If the DTB specifies dma-ranges, use those values. Otherwise, default to the values that were previously hardcoded into the driver. Signed-off-by: Phil Edworthy Signed-off-by: Bjorn Helgaas Acked-by: Rob Herring Acked-by: Simon Horman --- Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings/pci') diff --git a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt index 7fab84b33531..891463cb09c2 100644 --- a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt +++ b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt @@ -24,6 +24,11 @@ Required properties: - interrupt-map-mask: standard property that helps to define the interrupt mapping. +Optional properties: +- dma-ranges: a single range for the inbound memory region. If not supplied, + defaults to 1GiB at 0x40000000. Note there are hardware restrictions on the + allowed combinations of address and size. + Example SoC configuration: pci0: pci@ee090000 { @@ -38,6 +43,7 @@ Example SoC configuration: #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; interrupt-map-mask = <0xff00 0 0 0x7>; interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH -- cgit v1.2.3 From e8b8318de645c04f8600cb5af6f6773a1878ee9d Mon Sep 17 00:00:00 2001 From: Ray Jui Date: Fri, 4 Dec 2015 09:34:58 -0800 Subject: PCI: iproc: Update iProc PCIe device tree binding Add a new compatible string "brcm,iproc-pcie-paxc", for PAXC-based iProc PCIe root complex. A PAXC-based PCIe root complex is connected to emulated endpoint devices internal to the ASIC. Signed-off-by: Ray Jui Signed-off-by: Bjorn Helgaas Reviewed-by: Scott Branden --- Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/pci') diff --git a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt index 45c2a8094a9f..4c5beaa5436a 100644 --- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt +++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt @@ -1,7 +1,10 @@ * Broadcom iProc PCIe controller with the platform bus interface Required properties: -- compatible: Must be "brcm,iproc-pcie" +- compatible: Must be "brcm,iproc-pcie" for PAXB, or "brcm,iproc-pcie-paxc" + for PAXC. PAXB-based root complex is used for external endpoint devices. + PAXC-based root complex is connected to emulated endpoint devices + internal to the ASIC - reg: base address and length of the PCIe controller I/O register space - #interrupt-cells: set to <1> - interrupt-map-mask and interrupt-map, standard PCI properties to define the -- cgit v1.2.3 From c7bd48195377435ecaf38869b936be8e7abe3489 Mon Sep 17 00:00:00 2001 From: Ray Jui Date: Fri, 4 Dec 2015 09:35:00 -0800 Subject: PCI: iproc: Add iProc PCIe MSI device tree binding Update the iProc PCIe device tree bindings with added binding information for MSI. Signed-off-by: Ray Jui Signed-off-by: Bjorn Helgaas Reviewed-by: Anup Patel Reviewed-by: Vikram Prakash Reviewed-by: Scott Branden --- .../devicetree/bindings/pci/brcm,iproc-pcie.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) (limited to 'Documentation/devicetree/bindings/pci') diff --git a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt index 4c5beaa5436a..01b88f4e0d5b 100644 --- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt +++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt @@ -35,6 +35,28 @@ Optional: - brcm,pcie-ob-oarr-size: Some iProc SoCs need the OARR size bit to be set to increase the outbound window size +MSI support (optional): + +For older platforms without MSI integrated in the GIC, iProc PCIe core provides +an event queue based MSI support. The iProc MSI uses host memories to store +MSI posted writes in the event queues + +- msi-parent: Link to the device node of the MSI controller. On newer iProc +platforms, the MSI controller may be gicv2m or gicv3-its. On older iProc +platforms without MSI support in its interrupt controller, one may use the +event queue based MSI support integrated within the iProc PCIe core. + +When the iProc event queue based MSI is used, one needs to define the +following properties in the MSI device node: +- compatible: Must be "brcm,iproc-msi" +- msi-controller: claims itself as an MSI controller +- interrupt-parent: Link to its parent interrupt device +- interrupts: List of interrupt IDs from its parent interrupt device + +Optional properties: +- brcm,pcie-msi-inten: Needs to be present for some older iProc platforms that +require the interrupt enable registers to be set explicitly to enable MSI + Example: pcie0: pcie@18012000 { compatible = "brcm,iproc-pcie"; @@ -61,6 +83,19 @@ Example: brcm,pcie-ob-oarr-size; brcm,pcie-ob-axi-offset = <0x00000000>; brcm,pcie-ob-window-size = <256>; + + msi-parent = <&msi0>; + + /* iProc event queue based MSI */ + msi0: msi@18012000 { + compatible = "brcm,iproc-msi"; + msi-controller; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + }; }; pcie1: pcie@18013000 { -- cgit v1.2.3 From e015f88c368da1e6e3567288c290c31d57b2ba94 Mon Sep 17 00:00:00 2001 From: Harunobu Kurokawa Date: Wed, 25 Nov 2015 15:30:39 +0000 Subject: PCI: rcar: Add support for R-Car H3 to pcie-rcar Add the "renesas,pcie-r8a7795" property for the R-Car H3 device to the pcie-rcar driver. Tested-by: Wolfram Sang Signed-off-by: Harunobu Kurokawa Signed-off-by: Bjorn Helgaas Acked-by: Wolfram Sang --- Documentation/devicetree/bindings/pci/rcar-pci.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/pci') diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt index 29d3b989d3b0..ab2e75f59518 100644 --- a/Documentation/devicetree/bindings/pci/rcar-pci.txt +++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt @@ -2,7 +2,8 @@ Required properties: - compatible: should contain one of the following - "renesas,pcie-r8a7779", "renesas,pcie-r8a7790", "renesas,pcie-r8a7791" + "renesas,pcie-r8a7779", "renesas,pcie-r8a7790", "renesas,pcie-r8a7791", + "renesas,pcie-r8a7795" - reg: base address and length of the pcie controller registers. - #address-cells: set to <3> - #size-cells: set to <2> -- cgit v1.2.3 From 3517652fda51bfeea3768ba05819744c8ac57d9e Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 3 Dec 2015 07:51:37 +0900 Subject: PCI: rcar: Add gen2 fallback compatibility string for pci-rcar-gen2 Add fallback compatibility string for R-Car Gen 2 family. This is in keeping with the fallback scheme being adopted wherever appropriate for drivers for Renesas SoCs. Signed-off-by: Simon Horman Signed-off-by: Bjorn Helgaas Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings/pci') diff --git a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt index 891463cb09c2..4e8b90e43dd8 100644 --- a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt +++ b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt @@ -8,7 +8,14 @@ OHCI and EHCI controllers. Required properties: - compatible: "renesas,pci-r8a7790" for the R8A7790 SoC; "renesas,pci-r8a7791" for the R8A7791 SoC; - "renesas,pci-r8a7794" for the R8A7794 SoC. + "renesas,pci-r8a7794" for the R8A7794 SoC; + "renesas,pci-rcar-gen2" for a generic R-Car Gen2 compatible device + + + When compatible with the generic version, nodes must list the + SoC-specific version corresponding to the platform first + followed by the generic version. + - reg: A list of physical regions to access the device: the first is the operational registers for the OHCI/EHCI controllers and the second is for the bridge configuration and control registers. @@ -32,7 +39,7 @@ Optional properties: Example SoC configuration: pci0: pci@ee090000 { - compatible = "renesas,pci-r8a7790"; + compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; clocks = <&mstp7_clks R8A7790_CLK_EHCI>; reg = <0x0 0xee090000 0x0 0xc00>, <0x0 0xee080000 0x0 0x1100>; -- cgit v1.2.3 From a37b3eafe8e9cbe7c7754bc6003c125b23749554 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 3 Dec 2015 07:51:39 +0900 Subject: PCI: rcar: Add gen2 fallback compatibility string for pcie-rcar Add fallback compatibility string for R-Car Gen 2 family. This is in keeping with the fallback scheme being adopted wherever appropriate for drivers for Renesas SoCs. Signed-off-by: Simon Horman Signed-off-by: Bjorn Helgaas --- Documentation/devicetree/bindings/pci/rcar-pci.txt | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) (limited to 'Documentation/devicetree/bindings/pci') diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt index ab2e75f59518..558fe528ae19 100644 --- a/Documentation/devicetree/bindings/pci/rcar-pci.txt +++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt @@ -1,9 +1,16 @@ * Renesas RCar PCIe interface Required properties: -- compatible: should contain one of the following - "renesas,pcie-r8a7779", "renesas,pcie-r8a7790", "renesas,pcie-r8a7791", - "renesas,pcie-r8a7795" +compatible: "renesas,pcie-r8a7779" for the R8A7779 SoC; + "renesas,pcie-r8a7790" for the R8A7790 SoC; + "renesas,pcie-r8a7791" for the R8A7791 SoC; + "renesas,pcie-r8a7795" for the R8A7795 SoC; + "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible device. + + When compatible with the generic version, nodes must list the + SoC-specific version corresponding to the platform first + followed by the generic version. + - reg: base address and length of the pcie controller registers. - #address-cells: set to <3> - #size-cells: set to <2> @@ -26,7 +33,7 @@ Example: SoC specific DT Entry: pcie: pcie@fe000000 { - compatible = "renesas,pcie-r8a7791"; + compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2"; reg = <0 0xfe000000 0 0x80000>; #address-cells = <3>; #size-cells = <2>; -- cgit v1.2.3