From 72c912225c3647d05a934cbeaf18323501b29e53 Mon Sep 17 00:00:00 2001 From: Liu Ying Date: Tue, 19 Feb 2019 11:23:21 +0800 Subject: dt-bindings: phy: Add DT binding for Mixel LVDS PHY(LVDS/MIPI DSI combo) This patch adds device tree binding for Mixel LVDS PHY(LVDS/MIPI DSI combo), as found in i.MX8qxp SoC. Signed-off-by: Liu Ying --- .../devicetree/bindings/phy/phy-mixel-lvds-combo.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/phy-mixel-lvds-combo.txt (limited to 'Documentation/devicetree/bindings/phy') diff --git a/Documentation/devicetree/bindings/phy/phy-mixel-lvds-combo.txt b/Documentation/devicetree/bindings/phy/phy-mixel-lvds-combo.txt new file mode 100644 index 000000000000..1694edb68956 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-mixel-lvds-combo.txt @@ -0,0 +1,19 @@ +Mixel LVDS combo PHY + +Required properties: +- compatible: must be "mixel,lvds-combo-phy". +- reg: offset and length of the register block. +- #phy-cells: see phy-bindings.txt in the same directory, must be <0>. +- clocks: clock phandle and specifier pair. +- clock-names: string, clock input name, must be "phy". +- power-domains: phandle pointing to power domain. + +Example: + ldb_phy@56221000 { + compatible = "mixel,lvds-combo-phy"; + reg = <0x0 0x56221000 0x0 0x100>, <0x0 0x56228000 0x0 0x1000>; + #phy-cells = <0>; + clocks = <&clk IMX_LVDS0_PHY_CLK>; + clock-names = "phy"; + power-domains = <&pd IMX_SC_R_LVDS_0>; + }; -- cgit v1.2.3