From 554b3b31e9229b498dc17f9bc0f14b42c586f0e9 Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Fri, 16 Oct 2020 20:50:15 +0200 Subject: dt-bindings: pwm: mtk-disp: add MT8167 SoC binding MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add binding for MT8167 SoC. The IP is compatible with MT8173. Signed-off-by: Fabien Parent Acked-by: Uwe Kleine-König Acked-by: Rob Herring Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/pwm') diff --git a/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt b/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt index 0521957c253f..902b271891ae 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt @@ -4,6 +4,7 @@ Required properties: - compatible: should be "mediatek,-disp-pwm": - "mediatek,mt2701-disp-pwm": found on mt2701 SoC. - "mediatek,mt6595-disp-pwm": found on mt6595 SoC. + - "mediatek,mt8167-disp-pwm", "mediatek,mt8173-disp-pwm": found on mt8167 SoC. - "mediatek,mt8173-disp-pwm": found on mt8173 SoC. - reg: physical base address and length of the controller's registers. - #pwm-cells: must be 2. See pwm.yaml in this directory for a description of -- cgit v1.2.3