From 5338073561bea23363e5552b647dad75bc7d0f11 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Fri, 20 Jul 2018 17:26:32 +0200 Subject: reset: meson: add dt-bindings for meson-axg audio arb Add dt-bindings for the audio memory arbiter found on Amlogic's A113 based SoCs Reviewed-by: Rob Herring Signed-off-by: Jerome Brunet Signed-off-by: Philipp Zabel --- .../bindings/reset/amlogic,meson-axg-audio-arb.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt (limited to 'Documentation/devicetree/bindings/reset') diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt b/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt new file mode 100644 index 000000000000..26e542eb96df --- /dev/null +++ b/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt @@ -0,0 +1,21 @@ +* Amlogic audio memory arbiter controller + +The Amlogic Audio ARB is a simple device which enables or +disables the access of Audio FIFOs to DDR on AXG based SoC. + +Required properties: +- compatible: 'amlogic,meson-axg-audio-arb' +- reg: physical base address of the controller and length of memory + mapped region. +- clocks: phandle to the fifo peripheral clock provided by the audio + clock controller. +- #reset-cells: must be 1. + +Example on the A113 SoC: + +arb: reset-controller@280 { + compatible = "amlogic,meson-axg-audio-arb"; + reg = <0x0 0x280 0x0 0x4>; + #reset-cells = <1>; + clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; +}; -- cgit v1.2.3