From 0edbfea537d10c0de5505d0413368aad71027663 Mon Sep 17 00:00:00 2001 From: Christophe Ricard Date: Thu, 19 May 2016 00:35:53 +0200 Subject: tpm/tpm_tis_spi: Add support for spi phy Spi protocol standardized by the TCG is now supported by most of TPM vendors. It supports SPI Bit Protocol as describe in the TCG PTP specification (chapter 6.4.6 SPI Bit Protocol). Irq mode is not supported. This commit is based on the initial work by Peter Huewe. Signed-off-by: Peter Huewe Signed-off-by: Alexander Steffen Signed-off-by: Christophe Ricard Reviewed-by: Jarkko Sakkinen Tested-by: Jarkko Sakkinen Tested-by: Stefan Berger Reviewed-by: Stefan Berger Signed-off-by: Jarkko Sakkinen --- .../bindings/security/tpm/tpm_tis_spi.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/security/tpm/tpm_tis_spi.txt (limited to 'Documentation/devicetree/bindings/security/tpm/tpm_tis_spi.txt') diff --git a/Documentation/devicetree/bindings/security/tpm/tpm_tis_spi.txt b/Documentation/devicetree/bindings/security/tpm/tpm_tis_spi.txt new file mode 100644 index 000000000000..85741cd468cc --- /dev/null +++ b/Documentation/devicetree/bindings/security/tpm/tpm_tis_spi.txt @@ -0,0 +1,24 @@ +Required properties: +- compatible: should be one of the following + "st,st33htpm-spi" + "infineon,slb9670" + "tcg,tpm_tis-spi" +- spi-max-frequency: Maximum SPI frequency (depends on TPMs). + +Optional SoC Specific Properties: +- pinctrl-names: Contains only one value - "default". +- pintctrl-0: Specifies the pin control groups used for this controller. + +Example (for ARM-based BeagleBoard xM with TPM_TIS on SPI4): + +&mcspi4 { + + status = "okay"; + + tpm_tis@0 { + + compatible = "tcg,tpm_tis-spi"; + + spi-max-frequency = <10000000>; + }; +}; -- cgit v1.2.3