From e9ad5da25002772436c968309d6dbeaf31c91404 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Fri, 9 Jul 2021 10:41:40 -0700 Subject: dt-bindings: soc: qcom: aoss: Add SC8180X and generic compatible Add a generic compatible for all versions of the AOSS QMP to the binding, in order to allow a single implementation for them and then add a specific compatible for the Qualcomm SC8180x platform. Acked-by: Rob Herring Link: https://lore.kernel.org/r/20210709174142.1274554-2-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/soc') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt index 783dc81b0f26..3747032311a4 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt @@ -18,10 +18,13 @@ power-domains. Definition: must be one of: "qcom,sc7180-aoss-qmp" "qcom,sc7280-aoss-qmp" + "qcom,sc8180x-aoss-qmp" "qcom,sdm845-aoss-qmp" "qcom,sm8150-aoss-qmp" "qcom,sm8250-aoss-qmp" "qcom,sm8350-aoss-qmp" + and: + "qcom,aoss-qmp" - reg: Usage: required @@ -70,7 +73,7 @@ The following example represents the AOSS side-channel message RAM and the mechanism exposing the power-domains, as found in SDM845. aoss_qmp: qmp@c300000 { - compatible = "qcom,sdm845-aoss-qmp"; + compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp"; reg = <0x0c300000 0x100000>; interrupts = ; mboxes = <&apss_shared 0>; -- cgit v1.2.3 From 44dadfbcd992829515c80ff7d1bbab73cd321a3f Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Fri, 9 Jul 2021 10:41:41 -0700 Subject: dt-bindings: soc: qcom: aoss: Convert to YAML Convert to YAML in order to allow validation. Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20210709174142.1274554-3-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson --- .../devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt | 90 ---------------- .../bindings/soc/qcom/qcom,aoss-qmp.yaml | 114 +++++++++++++++++++++ 2 files changed, 114 insertions(+), 90 deletions(-) delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml (limited to 'Documentation/devicetree/bindings/soc') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt deleted file mode 100644 index 3747032311a4..000000000000 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt +++ /dev/null @@ -1,90 +0,0 @@ -Qualcomm Always-On Subsystem side channel binding - -This binding describes the hardware component responsible for side channel -requests to the always-on subsystem (AOSS), used for certain power management -requests that is not handled by the standard RPMh interface. Each client in the -SoC has it's own block of message RAM and IRQ for communication with the AOSS. -The protocol used to communicate in the message RAM is known as Qualcomm -Messaging Protocol (QMP) - -The AOSS side channel exposes control over a set of resources, used to control -a set of debug related clocks and to affect the low power state of resources -related to the secondary subsystems. These resources are exposed as a set of -power-domains. - -- compatible: - Usage: required - Value type: - Definition: must be one of: - "qcom,sc7180-aoss-qmp" - "qcom,sc7280-aoss-qmp" - "qcom,sc8180x-aoss-qmp" - "qcom,sdm845-aoss-qmp" - "qcom,sm8150-aoss-qmp" - "qcom,sm8250-aoss-qmp" - "qcom,sm8350-aoss-qmp" - and: - "qcom,aoss-qmp" - -- reg: - Usage: required - Value type: - Definition: the base address and size of the message RAM for this - client's communication with the AOSS - -- interrupts: - Usage: required - Value type: - Definition: should specify the AOSS message IRQ for this client - -- mboxes: - Usage: required - Value type: - Definition: reference to the mailbox representing the outgoing doorbell - in APCS for this client, as described in mailbox/mailbox.txt - -- #clock-cells: - Usage: optional - Value type: - Definition: must be 0 - The single clock represents the QDSS clock. - -- #power-domain-cells: - Usage: optional - Value type: - Definition: must be 1 - The provided power-domains are: - CDSP state (0), LPASS state (1), modem state (2), SLPI - state (3), SPSS state (4) and Venus state (5). - -= SUBNODES -The AOSS side channel also provides the controls for three cooling devices, -these are expressed as subnodes of the QMP node. The name of the node is used -to identify the resource and must therefor be "cx", "mx" or "ebi". - -- #cooling-cells: - Usage: optional - Value type: - Definition: must be 2 - -= EXAMPLE - -The following example represents the AOSS side-channel message RAM and the -mechanism exposing the power-domains, as found in SDM845. - - aoss_qmp: qmp@c300000 { - compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp"; - reg = <0x0c300000 0x100000>; - interrupts = ; - mboxes = <&apss_shared 0>; - - #power-domain-cells = <1>; - - cx_cdev: cx { - #cooling-cells = <2>; - }; - - mx_cdev: mx { - #cooling-cells = <2>; - }; - }; diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml new file mode 100644 index 000000000000..93e4b737ee1b --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/qcom/qcom,aoss-qmp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Always-On Subsystem side channel binding + +maintainers: + - Bjorn Andersson + +description: + This binding describes the hardware component responsible for side channel + requests to the always-on subsystem (AOSS), used for certain power management + requests that is not handled by the standard RPMh interface. Each client in the + SoC has it's own block of message RAM and IRQ for communication with the AOSS. + The protocol used to communicate in the message RAM is known as Qualcomm + Messaging Protocol (QMP) + + The AOSS side channel exposes control over a set of resources, used to control + a set of debug related clocks and to affect the low power state of resources + related to the secondary subsystems. These resources are exposed as a set of + power-domains. + +properties: + compatible: + items: + - enum: + - qcom,sc7180-aoss-qmp + - qcom,sc7280-aoss-qmp + - qcom,sc8180x-aoss-qmp + - qcom,sdm845-aoss-qmp + - qcom,sm8150-aoss-qmp + - qcom,sm8250-aoss-qmp + - qcom,sm8350-aoss-qmp + - const: qcom,aoss-qmp + + reg: + maxItems: 1 + description: + The base address and size of the message RAM for this client's + communication with the AOSS + + interrupts: + maxItems: 1 + description: + Should specify the AOSS message IRQ for this client + + mboxes: + maxItems: 1 + description: + Reference to the mailbox representing the outgoing doorbell in APCS for + this client, as described in mailbox/mailbox.txt + + "#clock-cells": + const: 0 + description: + The single clock represents the QDSS clock. + + "#power-domain-cells": + const: 1 + description: | + The provided power-domains are: + CDSP state (0), LPASS state (1), modem state (2), SLPI + state (3), SPSS state (4) and Venus state (5). + +required: + - compatible + - reg + - interrupts + - mboxes + - "#clock-cells" + +additionalProperties: false + +patternProperties: + "^(cx|mx|ebi)$": + type: object + description: + The AOSS side channel also provides the controls for three cooling devices, + these are expressed as subnodes of the QMP node. The name of the node is + used to identify the resource and must therefor be "cx", "mx" or "ebi". + + properties: + "#cooling-cells": + const: 2 + + required: + - "#cooling-cells" + + additionalProperties: false + +examples: + - | + #include + + aoss_qmp: qmp@c300000 { + compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp"; + reg = <0x0c300000 0x100000>; + interrupts = ; + mboxes = <&apss_shared 0>; + + #clock-cells = <0>; + #power-domain-cells = <1>; + + cx_cdev: cx { + #cooling-cells = <2>; + }; + + mx_cdev: mx { + #cooling-cells = <2>; + }; + }; +... -- cgit v1.2.3 From d3625d94490e4c2d95febe3eafcc11e606eabb0c Mon Sep 17 00:00:00 2001 From: Iskren Chernev Date: Sun, 27 Jun 2021 21:59:23 +0300 Subject: dt-bindings: soc: qcom: smd-rpm: Add SM6115 compatible Add the dt-binding for the rpm on the Qualcomm SM4250/6115 SoC platform. Signed-off-by: Iskren Chernev Acked-by: Rob Herring Link: https://lore.kernel.org/r/20210627185927.695411-2-iskren.chernev@gmail.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/soc') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml index d511f01fcac6..cc3fe5ed7421 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml @@ -39,6 +39,7 @@ properties: - qcom,rpm-msm8996 - qcom,rpm-msm8998 - qcom,rpm-sdm660 + - qcom,rpm-sm6115 - qcom,rpm-sm6125 - qcom,rpm-qcs404 -- cgit v1.2.3 From a95fc720844154acc79064c222335165fe7cb136 Mon Sep 17 00:00:00 2001 From: Caleb Connolly Date: Thu, 8 Apr 2021 16:21:14 +0000 Subject: dt-bindings: qcom: geni-se: document iommus Document the iommus property for QCOM Geni SE. Signed-off-by: Caleb Connolly Acked-by: Rob Herring Link: https://lore.kernel.org/r/20210408161953.26298-4-caleb@connolly.tech Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree/bindings/soc') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml index 4663c2bcad50..a776cd37c297 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml @@ -51,6 +51,9 @@ properties: interconnect-names: const: qup-core + iommus: + maxItems: 1 + required: - compatible - reg -- cgit v1.2.3