From 9b7a56221590cad777e56ec40afe7a6a68f9ac01 Mon Sep 17 00:00:00 2001 From: Xu Jianqun Date: Thu, 18 Feb 2016 19:16:31 +0800 Subject: spi: rockchip: add bindings for rk3399 spi Add devicetree bindings for Rockchip rk3399 spi which found on Rockchip rk3399 SoCs. Signed-off-by: Jianqun Xu Signed-off-by: Heiko Stuebner Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/spi-rockchip.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/spi') diff --git a/Documentation/devicetree/bindings/spi/spi-rockchip.txt b/Documentation/devicetree/bindings/spi/spi-rockchip.txt index 0c491bda4c65..1b14d69d8903 100644 --- a/Documentation/devicetree/bindings/spi/spi-rockchip.txt +++ b/Documentation/devicetree/bindings/spi/spi-rockchip.txt @@ -9,6 +9,7 @@ Required Properties: "rockchip,rk3066-spi" for rk3066. "rockchip,rk3188-spi", "rockchip,rk3066-spi" for rk3188. "rockchip,rk3288-spi", "rockchip,rk3066-spi" for rk3288. + "rockchip,rk3399-spi", "rockchip,rk3066-spi" for rk3399. - reg: physical base address of the controller and length of memory mapped region. - interrupts: The interrupt number to the cpu. The interrupt specifier format -- cgit v1.2.3 From 82b3aea65f9fee161d8e07602e5a8c7b0b103fa3 Mon Sep 17 00:00:00 2001 From: Shubhrajyoti Datta Date: Wed, 9 Mar 2016 14:17:20 +0530 Subject: spi: xilinx: Add devicetree binding for spi-xilinx Add a binding document for the spi/spi-xilinx Signed-off-by: Shubhrajyoti Datta Signed-off-by: Mark Brown --- .../devicetree/bindings/spi/spi-xilinx.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-xilinx.txt (limited to 'Documentation/devicetree/bindings/spi') diff --git a/Documentation/devicetree/bindings/spi/spi-xilinx.txt b/Documentation/devicetree/bindings/spi/spi-xilinx.txt new file mode 100644 index 000000000000..c7b7856bd528 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-xilinx.txt @@ -0,0 +1,22 @@ +Xilinx SPI controller Device Tree Bindings +------------------------------------------------- + +Required properties: +- compatible : Should be "xlnx,xps-spi-2.00.a" or "xlnx,xps-spi-2.00.b" +- reg : Physical base address and size of SPI registers map. +- interrupts : Property with a value describing the interrupt + number. +- interrupt-parent : Must be core interrupt controller + +Optional properties: +- xlnx,num-ss-bits : Number of chip selects used. + +Example: + axi_quad_spi@41e00000 { + compatible = "xlnx,xps-spi-2.00.a"; + interrupt-parent = <&intc>; + interrupts = <0 31 1>; + reg = <0x41e00000 0x10000>; + xlnx,num-ss-bits = <0x1>; + }; + -- cgit v1.2.3