From c493a2b37a9e9b7864389d72dd9c67d1d39cfc61 Mon Sep 17 00:00:00 2001 From: Rayyan Ansari Date: Sat, 30 Sep 2023 23:07:56 +0100 Subject: dt-bindings: arm: qcom: Document MSM8x26-based Lumia phones Document MSM8226 and MSM8926 Lumias. Signed-off-by: Rayyan Ansari Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230930221323.101289-2-rayyan@ansari.sh Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 7f80f48a0954..88b84035e7b1 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -186,9 +186,19 @@ properties: - items: - enum: + - microsoft,dempsey + - microsoft,makepeace + - microsoft,moneypenny - samsung,s3ve3g - const: qcom,msm8226 + - items: + - enum: + - microsoft,superman-lte + - microsoft,tesla + - const: qcom,msm8926 + - const: qcom,msm8226 + - items: - enum: - longcheer,l9100 -- cgit v1.2.3 From 4be756fd983a0d91c258196b3206e9131e63d62d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 8 Nov 2023 11:43:27 +0100 Subject: dt-bindings: hwinfo: samsung,exynos-chipid: add specific compatibles for existing SoC Samsung Exynos SoC reuses several devices from older designs, thus historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add compatibles specific to each SoC in front of all old-SoC-like compatibles. Reviewed-by: Alim Akhtar Acked-by: Rob Herring Link: https://lore.kernel.org/r/20231108104343.24192-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- .../bindings/hwinfo/samsung,exynos-chipid.yaml | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml b/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml index 95cbdcb56efe..45f3d468db7c 100644 --- a/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml +++ b/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml @@ -11,9 +11,20 @@ maintainers: properties: compatible: - enum: - - samsung,exynos4210-chipid - - samsung,exynos850-chipid + oneOf: + - enum: + - samsung,exynos4210-chipid + - samsung,exynos850-chipid + - items: + - enum: + - samsung,exynos5433-chipid + - samsung,exynos7-chipid + - const: samsung,exynos4210-chipid + - items: + - enum: + - samsung,exynos7885-chipid + - samsung,exynosautov9-chipid + - const: samsung,exynos850-chipid reg: maxItems: 1 -- cgit v1.2.3 From 9da80ed69eb150617e8c72aeb7fdb9bfc7b97fba Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 8 Nov 2023 11:43:28 +0100 Subject: dt-bindings: i2c: exynos5: add specific compatibles for existing SoC Samsung Exynos SoC reuses several devices from older designs, thus historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add compatibles specific to each SoC in front of all old-SoC-like compatibles. Acked-by: Rob Herring Acked-by: Wolfram Sang Link: https://lore.kernel.org/r/20231108104343.24192-3-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml | 10 +++++++++- Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml | 2 +- 2 files changed, 10 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml index 3e52a0db6c41..c1f5d2cb7709 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml @@ -25,7 +25,15 @@ properties: - samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420 - samsung,exynos5260-hsi2c # Exynos5260 - samsung,exynos7-hsi2c # Exynos7 - - samsung,exynosautov9-hsi2c # ExynosAutoV9 and Exynos850 + - samsung,exynosautov9-hsi2c + - items: + - enum: + - samsung,exynos5433-hsi2c + - const: samsung,exynos7-hsi2c + - items: + - enum: + - samsung,exynos850-hsi2c + - const: samsung,exynosautov9-hsi2c - const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420 deprecated: true diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml index a6836904a4f8..5b7ab69546c4 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml @@ -155,7 +155,7 @@ examples: }; hsi2c_0: i2c@13820000 { - compatible = "samsung,exynosautov9-hsi2c"; + compatible = "samsung,exynos850-hsi2c", "samsung,exynosautov9-hsi2c"; reg = <0x13820000 0xc0>; interrupts = ; #address-cells = <1>; -- cgit v1.2.3 From c45860f6ee9b52b2e2f9b9255d93b9875e416cb0 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 8 Nov 2023 11:43:29 +0100 Subject: dt-bindings: i2c: samsung,s3c2410-i2c: add specific compatibles for existing SoC Samsung Exynos SoC reuses several devices from older designs, thus historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add compatibles specific to each SoC in front of all old-SoC-like compatibles. Reviewed-by: Alim Akhtar Acked-by: Rob Herring Reviewed-by: Linus Walleij Acked-by: Wolfram Sang Link: https://lore.kernel.org/r/20231108104343.24192-4-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- .../bindings/i2c/samsung,s3c2410-i2c.yaml | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml b/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml index b204e35e4f8d..1303502cf265 100644 --- a/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml @@ -11,14 +11,20 @@ maintainers: properties: compatible: - enum: - - samsung,s3c2410-i2c - - samsung,s3c2440-i2c - # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs: - - samsung,s3c2440-hdmiphy-i2c - # For s3c2440-like I2C used as a host to SATA PHY controller on an - # internal bus: - - samsung,exynos5-sata-phy-i2c + oneOf: + - enum: + - samsung,s3c2410-i2c + - samsung,s3c2440-i2c + # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs: + - samsung,s3c2440-hdmiphy-i2c + # For s3c2440-like I2C used as a host to SATA PHY controller on an + # internal bus: + - samsung,exynos5-sata-phy-i2c + - items: + - enum: + - samsung,exynos7885-i2c + - samsung,exynos850-i2c + - const: samsung,s3c2440-i2c '#address-cells': const: 1 -- cgit v1.2.3 From 5a17f863c042beef7835688fe7a9667083530df2 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 8 Nov 2023 11:43:30 +0100 Subject: dt-bindings: mmc: samsung,exynos-dw-mshc: add specific compatibles for existing SoC Samsung Exynos SoC reuses several devices from older designs, thus historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add compatibles specific to each SoC in front of all old-SoC-like compatibles. While re-indenting the first enum, put also axis,artpec8-dw-mshc in alphabetical order. Reviewed-by: Alim Akhtar Acked-by: Rob Herring Acked-by: Ulf Hansson Link: https://lore.kernel.org/r/20231108104343.24192-5-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- .../bindings/mmc/samsung,exynos-dw-mshc.yaml | 25 ++++++++++++++-------- 1 file changed, 16 insertions(+), 9 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml index 6ee78a38bd74..5fe65795f796 100644 --- a/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml @@ -14,15 +14,22 @@ maintainers: properties: compatible: - enum: - - samsung,exynos4210-dw-mshc - - samsung,exynos4412-dw-mshc - - samsung,exynos5250-dw-mshc - - samsung,exynos5420-dw-mshc - - samsung,exynos5420-dw-mshc-smu - - samsung,exynos7-dw-mshc - - samsung,exynos7-dw-mshc-smu - - axis,artpec8-dw-mshc + oneOf: + - enum: + - axis,artpec8-dw-mshc + - samsung,exynos4210-dw-mshc + - samsung,exynos4412-dw-mshc + - samsung,exynos5250-dw-mshc + - samsung,exynos5420-dw-mshc + - samsung,exynos5420-dw-mshc-smu + - samsung,exynos7-dw-mshc + - samsung,exynos7-dw-mshc-smu + - items: + - enum: + - samsung,exynos5433-dw-mshc-smu + - samsung,exynos7885-dw-mshc-smu + - samsung,exynos850-dw-mshc-smu + - const: samsung,exynos7-dw-mshc-smu reg: maxItems: 1 -- cgit v1.2.3 From 1d2c16e1ab98db04af2d1215d8dddcf5c09f57c4 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 8 Nov 2023 11:43:32 +0100 Subject: dt-bindings: rtc: s3c-rtc: add specific compatibles for existing SoC Samsung Exynos SoC reuses several devices from older designs, thus historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add compatibles specific to each SoC in front of all old-SoC-like compatibles. Reviewed-by: Alim Akhtar Acked-by: Rob Herring Acked-by: Alexandre Belloni Link: https://lore.kernel.org/r/20231108104343.24192-7-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/rtc/s3c-rtc.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.yaml b/Documentation/devicetree/bindings/rtc/s3c-rtc.yaml index d51b236939bf..bf4e11d6dffb 100644 --- a/Documentation/devicetree/bindings/rtc/s3c-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/s3c-rtc.yaml @@ -17,6 +17,11 @@ properties: - samsung,s3c2416-rtc - samsung,s3c2443-rtc - samsung,s3c6410-rtc + - items: + - enum: + - samsung,exynos7-rtc + - samsung,exynos850-rtc + - const: samsung,s3c6410-rtc - const: samsung,exynos3250-rtc deprecated: true -- cgit v1.2.3 From 5436459961da39dd4025a52e65c39e589011667c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 8 Nov 2023 11:43:33 +0100 Subject: dt-bindings: serial: samsung: add specific compatibles for existing SoC Samsung Exynos SoC reuses several devices from older designs, thus historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add compatibles specific to each SoC in front of all old-SoC-like compatibles. Re-shuffle also the entries in compatibles, so the one-compatible-enum is the first. Reviewed-by: Alim Akhtar Acked-by: Rob Herring Link: https://lore.kernel.org/r/20231108104343.24192-8-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/serial/samsung_uart.yaml | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml index ac60ab1e35e3..0d0215b23ab7 100644 --- a/Documentation/devicetree/bindings/serial/samsung_uart.yaml +++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml @@ -18,9 +18,6 @@ description: |+ properties: compatible: oneOf: - - items: - - const: samsung,exynosautov9-uart - - const: samsung,exynos850-uart - enum: - apple,s5l-uart - axis,artpec8-uart @@ -29,6 +26,17 @@ properties: - samsung,exynos4210-uart - samsung,exynos5433-uart - samsung,exynos850-uart + - items: + - enum: + - samsung,exynos7-uart + - const: samsung,exynos4210-uart + - items: + - enum: + - samsung,exynos7885-uart + - const: samsung,exynos5433-uart + - items: + - const: samsung,exynosautov9-uart + - const: samsung,exynos850-uart reg: maxItems: 1 -- cgit v1.2.3 From 25737c24cb06c040a342072f93a42799a28432dc Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 8 Nov 2023 11:43:34 +0100 Subject: dt-bindings: samsung: exynos-pmu: add specific compatibles for existing SoC Samsung Exynos SoC reuses several devices from older designs, thus historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add compatibles specific to each SoC in front of all old-SoC-like compatibles. Reviewed-by: Alim Akhtar Acked-by: Rob Herring Link: https://lore.kernel.org/r/20231108104343.24192-9-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml index e1d716df5dfa..6492e92586d9 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml @@ -48,6 +48,12 @@ properties: - samsung,exynos850-pmu - samsung-s5pv210-pmu - const: syscon + - items: + - enum: + - samsung,exynos7885-pmu + - samsung,exynosautov9-pmu + - const: samsung,exynos7-pmu + - const: syscon - items: - enum: - samsung,exynos3250-pmu -- cgit v1.2.3 From 416231a9e38331c870da3bc84f3535e3d67cfb92 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 8 Nov 2023 11:43:35 +0100 Subject: dt-bindings: gpu: arm,mali-midgard: add specific compatibles for existing Exynos SoC Samsung Exynos SoC reuses several devices from older designs, thus historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add compatibles specific to each SoC in front of all old-SoC-like compatibles. Reviewed-by: Alim Akhtar Acked-by: Rob Herring Link: https://lore.kernel.org/r/20231108104343.24192-10-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml index ca02baba5526..0801da33a385 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml @@ -40,6 +40,11 @@ properties: - rockchip,rk3288-mali - samsung,exynos5433-mali - const: arm,mali-t760 + - items: + - enum: + - samsung,exynos7-mali + - const: samsung,exynos5433-mali + - const: arm,mali-t760 - items: - enum: - rockchip,rk3399-mali -- cgit v1.2.3 From b709ff4da1beaab1c92df91c9023aad7388b84c4 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 8 Nov 2023 11:43:36 +0100 Subject: dt-bindings: iio: samsung,exynos-adc: add specific compatibles for existing SoC Samsung Exynos SoC reuses several devices from older designs, thus historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add compatibles specific to each SoC in front of all old-SoC-like compatibles. Reviewed-by: Alim Akhtar Acked-by: Rob Herring Link: https://lore.kernel.org/r/20231108104343.24192-11-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- .../bindings/iio/adc/samsung,exynos-adc.yaml | 29 +++++++++++++--------- 1 file changed, 17 insertions(+), 12 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml index 582d0a03b814..4e40f6bed5db 100644 --- a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml @@ -11,18 +11,23 @@ maintainers: properties: compatible: - enum: - - samsung,exynos-adc-v1 # Exynos5250 - - samsung,exynos-adc-v2 - - samsung,exynos3250-adc - - samsung,exynos4212-adc # Exynos4212 and Exynos4412 - - samsung,exynos7-adc - - samsung,s3c2410-adc - - samsung,s3c2416-adc - - samsung,s3c2440-adc - - samsung,s3c2443-adc - - samsung,s3c6410-adc - - samsung,s5pv210-adc + oneOf: + - enum: + - samsung,exynos-adc-v1 # Exynos5250 + - samsung,exynos-adc-v2 + - samsung,exynos3250-adc + - samsung,exynos4212-adc # Exynos4212 and Exynos4412 + - samsung,exynos7-adc + - samsung,s3c2410-adc + - samsung,s3c2416-adc + - samsung,s3c2440-adc + - samsung,s3c2443-adc + - samsung,s3c6410-adc + - samsung,s5pv210-adc + - items: + - enum: + - samsung,exynos5433-adc + - const: samsung,exynos7-adc reg: maxItems: 1 -- cgit v1.2.3 From cb931ee571be5eacd50628e108e81c065c9cb5f6 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 8 Nov 2023 11:43:37 +0100 Subject: ASoC: dt-bindings: samsung-i2s: add specific compatibles for existing SoC Samsung Exynos SoC reuses several devices from older designs, thus historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add compatibles specific to each SoC in front of all old-SoC-like compatibles. Reviewed-by: Alim Akhtar Acked-by: Rob Herring Acked-by: Lee Jones Acked-by: Mark Brown Link: https://lore.kernel.org/r/20231108104343.24192-12-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- .../bindings/mfd/samsung,exynos5433-lpass.yaml | 2 +- .../devicetree/bindings/sound/samsung-i2s.yaml | 19 ++++++++++++------- 2 files changed, 13 insertions(+), 8 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml index b97b06848729..f154103f32cc 100644 --- a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml +++ b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml @@ -85,7 +85,7 @@ examples: }; i2s@11440000 { - compatible = "samsung,exynos7-i2s"; + compatible = "samsung,exynos5433-i2s", "samsung,exynos7-i2s"; reg = <0x11440000 0x100>; dmas = <&adma 0>, <&adma 2>; dma-names = "tx", "rx"; diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml index 30b3b6e9824b..f45f73b5056d 100644 --- a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml @@ -44,13 +44,18 @@ properties: frequencies supported by Exynos7 I2S and 7.1 channel TDM support for playback and capture TDM (Time division multiplexing) to allow transfer of multiple channel audio data on single data line. - enum: - - samsung,s3c6410-i2s - - samsung,s5pv210-i2s - - samsung,exynos5420-i2s - - samsung,exynos7-i2s - - samsung,exynos7-i2s1 - - tesla,fsd-i2s + oneOf: + - enum: + - samsung,s3c6410-i2s + - samsung,s5pv210-i2s + - samsung,exynos5420-i2s + - samsung,exynos7-i2s + - samsung,exynos7-i2s1 + - tesla,fsd-i2s + - items: + - enum: + - samsung,exynos5433-i2s + - const: samsung,exynos7-i2s '#address-cells': const: 1 -- cgit v1.2.3 From 622018516aa581d25e86a0c8a7d3a6d749d35d0e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 8 Nov 2023 11:43:38 +0100 Subject: dt-bindings: pwm: samsung: add specific compatibles for existing SoC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Samsung Exynos SoC reuses several devices from older designs, thus historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add compatibles specific to each SoC in front of all old-SoC-like compatibles. Reviewed-by: Alim Akhtar Acked-by: Rob Herring Acked-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20231108104343.24192-13-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/pwm/pwm-samsung.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml index 2162f661ed5a..89a3875cb50a 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml @@ -29,6 +29,8 @@ properties: - samsung,exynos4210-pwm # 32-bit, Exynos - items: - enum: + - samsung,exynos5433-pwm + - samsung,exynos7-pwm - samsung,exynosautov9-pwm - const: samsung,exynos4210-pwm -- cgit v1.2.3 From 20862a23260a3ab76ea5b425f93967d0683b28a2 Mon Sep 17 00:00:00 2001 From: Jaewon Kim Date: Wed, 15 Nov 2023 18:55:57 +0900 Subject: dt-bindings: samsung: exynos-sysreg: add exynosautov920 sysreg Add compatible for ExynosAutov920 sysreg controllers. Signed-off-by: Jaewon Kim Link: https://lore.kernel.org/r/20231115095609.39883-2-jaewon02.kim@samsung.com Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml index 163e912e9cad..2de4301a467d 100644 --- a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml @@ -50,6 +50,11 @@ properties: - samsung,exynosautov9-peric1-sysreg - const: samsung,exynosautov9-sysreg - const: syscon + - items: + - enum: + - samsung,exynosautov920-peric0-sysreg + - samsung,exynosautov920-peric1-sysreg + - const: syscon reg: maxItems: 1 -- cgit v1.2.3 From 705672285530cd513b5549f96f92b2a9fcd63017 Mon Sep 17 00:00:00 2001 From: Jaewon Kim Date: Wed, 15 Nov 2023 18:55:58 +0900 Subject: dt-bindings: samsung: exynos-pmu: add exynosautov920 compatible Add samsung,exynosautov920-pmu compatible for representing pmu of ExynosAutov920 SoC. Signed-off-by: Jaewon Kim Link: https://lore.kernel.org/r/20231115095609.39883-3-jaewon02.kim@samsung.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml index 6492e92586d9..28e2cb50d85e 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml @@ -52,6 +52,7 @@ properties: - enum: - samsung,exynos7885-pmu - samsung,exynosautov9-pmu + - samsung,exynosautov920-pmu - const: samsung,exynos7-pmu - const: syscon - items: -- cgit v1.2.3 From 7a5e832d05025a3679d0fcd60584e6e946a3e358 Mon Sep 17 00:00:00 2001 From: Jaewon Kim Date: Wed, 15 Nov 2023 18:55:59 +0900 Subject: dt-bindings: samsung: usi: add exynosautov920-usi compatible Add samsung,exynosautov920-usi dedicated compatible for representing USI of ExynosAutoV920 SoC. Signed-off-by: Jaewon Kim Link: https://lore.kernel.org/r/20231115095609.39883-4-jaewon02.kim@samsung.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml index 5b7ab69546c4..61be1f2ddbe7 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml @@ -24,7 +24,9 @@ properties: compatible: oneOf: - items: - - const: samsung,exynosautov9-usi + - enum: + - samsung,exynosautov9-usi + - samsung,exynosautov920-usi - const: samsung,exynos850-usi - enum: - samsung,exynos850-usi -- cgit v1.2.3 From 9433b8d8d35bd0b17d6e0df76ec135dd2fe63e7c Mon Sep 17 00:00:00 2001 From: Jaewon Kim Date: Wed, 15 Nov 2023 18:56:00 +0900 Subject: dt-bindings: serial: samsung: add exynosautov920-uart compatible Add samsung,exynosautov9-uart dedicated compatible for representing uart of ExynosAutov920 SoC. Signed-off-by: Jaewon Kim Link: https://lore.kernel.org/r/20231115095609.39883-5-jaewon02.kim@samsung.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/serial/samsung_uart.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml index 0d0215b23ab7..e32c1b462836 100644 --- a/Documentation/devicetree/bindings/serial/samsung_uart.yaml +++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml @@ -35,7 +35,9 @@ properties: - samsung,exynos7885-uart - const: samsung,exynos5433-uart - items: - - const: samsung,exynosautov9-uart + - enum: + - samsung,exynosautov9-uart + - samsung,exynosautov920-uart - const: samsung,exynos850-uart reg: -- cgit v1.2.3 From d2d9e80a0ba6b1f507c14d6d8e2b833a474744d3 Mon Sep 17 00:00:00 2001 From: Jaewon Kim Date: Wed, 15 Nov 2023 18:56:01 +0900 Subject: dt-bindings: pwm: samsung: add exynosautov920 compatible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add samsung,exynosautov920-pwm compatible string to binding document. Signed-off-by: Jaewon Kim Acked-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20231115095609.39883-6-jaewon02.kim@samsung.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/pwm/pwm-samsung.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml index 89a3875cb50a..16de6434693b 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml @@ -32,6 +32,7 @@ properties: - samsung,exynos5433-pwm - samsung,exynos7-pwm - samsung,exynosautov9-pwm + - samsung,exynosautov920-pwm - const: samsung,exynos4210-pwm reg: -- cgit v1.2.3 From 8bd05d4a86d5e1cec35dc7b8d1a5c0d925ecde1e Mon Sep 17 00:00:00 2001 From: Jaewon Kim Date: Wed, 15 Nov 2023 18:56:03 +0900 Subject: dt-bindings: arm: samsung: Document exynosautov920 SADK board binding Add binding for the ExynosAutov920 SADK(Samsung Automotive Development Kit) board. Signed-off-by: Jaewon Kim Link: https://lore.kernel.org/r/20231115095609.39883-8-jaewon02.kim@samsung.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml index e3ffd8159ab6..01dcbd8aa703 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml @@ -230,6 +230,12 @@ properties: - samsung,exynosautov9-sadk # Samsung Exynos Auto v9 SADK - const: samsung,exynosautov9 + - description: Exynos Auto v920 based boards + items: + - enum: + - samsung,exynosautov920-sadk # Samsung Exynos Auto v920 SADK + - const: samsung,exynosautov920 + required: - compatible -- cgit v1.2.3 From 92b022550ae55527b4ce8f8cae7863857c7b795a Mon Sep 17 00:00:00 2001 From: Jaewon Kim Date: Wed, 15 Nov 2023 18:56:04 +0900 Subject: dt-bindings: hwinfo: samsung,exynos-chipid: add exynosautov920 compatible Add "samsung,exynosautov920-chipid" compatible string to binding document. Signed-off-by: Jaewon Kim Link: https://lore.kernel.org/r/20231115095609.39883-9-jaewon02.kim@samsung.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml b/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml index 45f3d468db7c..780ccb5ee9b4 100644 --- a/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml +++ b/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml @@ -24,6 +24,7 @@ properties: - enum: - samsung,exynos7885-chipid - samsung,exynosautov9-chipid + - samsung,exynosautov920-chipid - const: samsung,exynos850-chipid reg: -- cgit v1.2.3 From 3589e6d9f6e929339692585d1169f149e789d229 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Fri, 20 Oct 2023 15:57:05 +0100 Subject: dt-bindings: arm: sunxi: add Orange Pi Zero 2W The Orange Pi Zero 2W is a small board with an Allwinner H618 SoC. Add the compatible string to the binding documents. Signed-off-by: Andre Przywara Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20231020145706.705420-2-andre.przywara@arm.com Signed-off-by: Jernej Skrabec --- Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index 11c5ce941dd7..6f481e8bb4bf 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -1013,6 +1013,11 @@ properties: - const: xunlong,orangepi-zero2 - const: allwinner,sun50i-h616 + - description: Xunlong OrangePi Zero 2W + items: + - const: xunlong,orangepi-zero2w + - const: allwinner,sun50i-h618 + - description: Xunlong OrangePi Zero 3 items: - const: xunlong,orangepi-zero3 -- cgit v1.2.3 From 213615d742f0c039ab73f8946ae18000cf2c7b65 Mon Sep 17 00:00:00 2001 From: Chris Morgan Date: Fri, 17 Nov 2023 14:25:34 -0600 Subject: dt-bindings: arm: rockchip: Add Powkiddy RK2023 The Powkiddy RK2023 is a handheld gaming device made by Powkiddy and powered by the Rockchip RK3566 SoC. Group the Powkiddy RK3566 based devices together as they are both extremely similar. Signed-off-by: Chris Morgan Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231117202536.1387815-5-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 5f7c6c4aad8f..5b015c4ed775 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -674,9 +674,11 @@ properties: - const: pine64,soquartz - const: rockchip,rk3566 - - description: Powkiddy RGB30 + - description: Powkiddy RK3566 Handheld Gaming Console items: - - const: powkiddy,rgb30 + - enum: + - powkiddy,rgb30 + - powkiddy,rk2023 - const: rockchip,rk3566 - description: Radxa Compute Module 3(CM3) -- cgit v1.2.3 From e5fc1f038355634087f6a178454341dcfd50b89b Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sun, 19 Nov 2023 14:03:51 +0100 Subject: dt-bindings: arm: rockchip: Add Geniatech XPI-3128 Add Geniatech XPI-3128, a RK3128 based single board computer. Signed-off-by: Alex Bee Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231119130351.112261-4-knaerzche@gmail.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 5f7c6c4aad8f..d3c5b25fc2fd 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -237,6 +237,11 @@ properties: - const: geekbuying,geekbox - const: rockchip,rk3368 + - description: Geniatech XPI-3128 + items: + - const: geniatech,xpi-3128 + - const: rockchip,rk3128 + - description: Google Bob (Asus Chromebook Flip C101PA) items: - const: google,bob-rev13 -- cgit v1.2.3 From 80abebd9bf72516a3a6ed50f69908b9dbbf72a93 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 23 Nov 2023 14:32:12 +0100 Subject: dt-bindings: interconnect: document the RPMh Network-On-Chip Interconnect in Qualcomm SM8650 SoC Document the RPMh Network-On-Chip Interconnect of the SM8650 platform. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20231123-topic-sm8650-upstream-interconnect-v2-1-7e050874f59b@linaro.org Signed-off-by: Georgi Djakov --- .../bindings/interconnect/qcom,sm8650-rpmh.yaml | 136 +++++++++++++++++++++ 1 file changed, 136 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,sm8650-rpmh.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sm8650-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sm8650-rpmh.yaml new file mode 100644 index 000000000000..f9322de7cd61 --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom,sm8650-rpmh.yaml @@ -0,0 +1,136 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,sm8650-rpmh.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm RPMh Network-On-Chip Interconnect on SM8650 + +maintainers: + - Abel Vesa + - Neil Armstrong + +description: | + RPMh interconnect providers support system bandwidth requirements through + RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is + able to communicate with the BCM through the Resource State Coordinator (RSC) + associated with each execution environment. Provider nodes must point to at + least one RPMh device child node pertaining to their RSC and each provider + can map to multiple RPMh resources. + + See also:: include/dt-bindings/interconnect/qcom,sm8650-rpmh.h + +properties: + compatible: + enum: + - qcom,sm8650-aggre1-noc + - qcom,sm8650-aggre2-noc + - qcom,sm8650-clk-virt + - qcom,sm8650-cnoc-main + - qcom,sm8650-config-noc + - qcom,sm8650-gem-noc + - qcom,sm8650-lpass-ag-noc + - qcom,sm8650-lpass-lpiaon-noc + - qcom,sm8650-lpass-lpicx-noc + - qcom,sm8650-mc-virt + - qcom,sm8650-mmss-noc + - qcom,sm8650-nsp-noc + - qcom,sm8650-pcie-anoc + - qcom,sm8650-system-noc + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 2 + +required: + - compatible + +allOf: + - $ref: qcom,rpmh-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8650-clk-virt + - qcom,sm8650-mc-virt + then: + properties: + reg: false + else: + required: + - reg + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8650-pcie-anoc + then: + properties: + clocks: + items: + - description: aggre-NOC PCIe AXI clock + - description: cfg-NOC PCIe a-NOC AHB clock + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8650-aggre1-noc + then: + properties: + clocks: + items: + - description: aggre UFS PHY AXI clock + - description: aggre USB3 PRIM AXI clock + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8650-aggre2-noc + then: + properties: + clocks: + items: + - description: RPMH CC IPA clock + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8650-aggre1-noc + - qcom,sm8650-aggre2-noc + - qcom,sm8650-pcie-anoc + then: + required: + - clocks + else: + properties: + clocks: false + +unevaluatedProperties: false + +examples: + - | + clk_virt: interconnect-0 { + compatible = "qcom,sm8650-clk-virt"; + #interconnect-cells = <2>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + + aggre1_noc: interconnect@16e0000 { + compatible = "qcom,sm8650-aggre1-noc"; + reg = <0x016e0000 0x14400>; + #interconnect-cells = <2>; + clocks = <&gcc_phy_axi_clk>, <&gcc_prim_axi_clk>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; -- cgit v1.2.3 From dc84a76f054c01cc1d769a86ffa3a7e13867915a Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Thu, 23 Nov 2023 19:20:27 +0530 Subject: dt-bindings: interconnect: Add Qualcomm X1E80100 SoC The Qualcomm X1E80100 SoC has several bus fabrics that could be controlled and tuned dynamically according to the bandwidth demand. Co-developed-by: Abel Vesa Signed-off-by: Abel Vesa Signed-off-by: Rajendra Nayak Co-developed-by: Sibi Sankar Signed-off-by: Sibi Sankar Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231123135028.29433-2-quic_sibis@quicinc.com Signed-off-by: Georgi Djakov --- .../bindings/interconnect/qcom,x1e80100-rpmh.yaml | 83 ++++++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,x1e80100-rpmh.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/interconnect/qcom,x1e80100-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,x1e80100-rpmh.yaml new file mode 100644 index 000000000000..08b0210e0e59 --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom,x1e80100-rpmh.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,x1e80100-rpmh.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm RPMh Network-On-Chip Interconnect on X1E80100 + +maintainers: + - Rajendra Nayak + - Abel Vesa + +description: | + RPMh interconnect providers support system bandwidth requirements through + RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is + able to communicate with the BCM through the Resource State Coordinator (RSC) + associated with each execution environment. Provider nodes must point to at + least one RPMh device child node pertaining to their RSC and each provider + can map to multiple RPMh resources. + + See also:: include/dt-bindings/interconnect/qcom,x1e80100-rpmh.h + +properties: + compatible: + enum: + - qcom,x1e80100-aggre1-noc + - qcom,x1e80100-aggre2-noc + - qcom,x1e80100-clk-virt + - qcom,x1e80100-cnoc-cfg + - qcom,x1e80100-cnoc-main + - qcom,x1e80100-gem-noc + - qcom,x1e80100-lpass-ag-noc + - qcom,x1e80100-lpass-lpiaon-noc + - qcom,x1e80100-lpass-lpicx-noc + - qcom,x1e80100-mc-virt + - qcom,x1e80100-mmss-noc + - qcom,x1e80100-nsp-noc + - qcom,x1e80100-pcie-center-anoc + - qcom,x1e80100-pcie-north-anoc + - qcom,x1e80100-pcie-south-anoc + - qcom,x1e80100-system-noc + - qcom,x1e80100-usb-center-anoc + - qcom,x1e80100-usb-north-anoc + - qcom,x1e80100-usb-south-anoc + + reg: + maxItems: 1 + +required: + - compatible + +allOf: + - $ref: qcom,rpmh-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - qcom,x1e80100-clk-virt + - qcom,x1e80100-mc-virt + then: + properties: + reg: false + else: + required: + - reg + +unevaluatedProperties: false + +examples: + - | + clk_virt: interconnect-0 { + compatible = "qcom,x1e80100-clk-virt"; + #interconnect-cells = <2>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + + aggre1_noc: interconnect@16e0000 { + compatible = "qcom,x1e80100-aggre1-noc"; + reg = <0x016e0000 0x14400>; + #interconnect-cells = <2>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; -- cgit v1.2.3 From beb9c30ba4188e481991d91124c554f61a7ec121 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 24 Nov 2023 09:41:13 +0100 Subject: dt-bindings: soc: amlogic,meson-gx-hhi-sysctrl: add example covering meson-axg-hhi-sysctrl Add a third example covering the meson-axg-hhi-sysctrl variant and more importantly the phy subnode. Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20231124-amlogic-v6-4-upstream-dsi-ccf-vim3-v9-2-95256ed139e6@linaro.org Signed-off-by: Neil Armstrong --- .../soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml index 16977e4e4357..c6bce40946d4 100644 --- a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml +++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml @@ -158,3 +158,36 @@ examples: }; }; }; + + - | + system-controller@ff63c000 { + compatible = "amlogic,meson-axg-hhi-sysctrl", "simple-mfd", "syscon"; + reg = <0xff63c000 0x400>; + + clock-controller { + compatible = "amlogic,axg-clkc"; + #clock-cells = <1>; + clocks = <&xtal>; + clock-names = "xtal"; + }; + + power-controller { + compatible = "amlogic,meson-axg-pwrc"; + #power-domain-cells = <1>; + amlogic,ao-sysctrl = <&sysctrl_AO>; + + resets = <&reset_viu>, + <&reset_venc>, + <&reset_vcbus>, + <&reset_vencl>, + <&reset_vid_lock>; + reset-names = "viu", "venc", "vcbus", "vencl", "vid_lock"; + clocks = <&clk_vpu>, <&clk_vapb>; + clock-names = "vpu", "vapb"; + }; + + phy { + compatible = "amlogic,axg-mipi-pcie-analog-phy"; + #phy-cells = <0>; + }; + }; -- cgit v1.2.3 From 9de586a0a1c58c935bd86b3432f6bf571c3ff24c Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Sat, 25 Nov 2023 11:24:56 +0200 Subject: dt-bindings: omap: Add Motorola mapphone mz609 and mz617 tablets Let's add compatibles for some xyboard tablets, these are similar to the mapphone devices already listed but with different peripherals. Acked-by: Rob Herring Signed-off-by: Tony Lindgren --- Documentation/devicetree/bindings/arm/ti/omap.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/ti/omap.yaml b/Documentation/devicetree/bindings/arm/ti/omap.yaml index b18fc046390a..93e04a109a12 100644 --- a/Documentation/devicetree/bindings/arm/ti/omap.yaml +++ b/Documentation/devicetree/bindings/arm/ti/omap.yaml @@ -134,6 +134,8 @@ properties: - amazon,omap4-kc1 # Amazon Kindle Fire (first generation) - motorola,droid4 # Motorola Droid 4 XT894 - motorola,droid-bionic # Motorola Droid Bionic XT875 + - motorola,xyboard-mz609 + - motorola,xyboard-mz617 - ti,omap4-panda - ti,omap4-sdp - const: ti,omap4430 -- cgit v1.2.3 From b685460632d51d7307bbba3d173c0dd6dbf38fa8 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Sat, 25 Nov 2023 19:59:13 +0530 Subject: dt-bindings: arm: rockchip: Update edgeble-neu6 bindings Current binding has following compatible combination for SoM, IO board - NCM6A: edgeble,neural-compute-module-6a, edgeble,neural-compute-module-6a-io - NCM6B: edgeble,neural-compute-module-6b, edgeble,neural-compute-module-6b-io This board topology now changes in final revisions, so a common compatible IO board, NCM6A-IO, is made available for both variants of SoM: NCM6A and NCM6B, produced by Edgeble AI. With this change, 6b-io is not as available and 6a; 6b SoM's have the same compatible IO board as 6a-io. This change is due to the common optimised design of the IO board made available now in final revisions, which was not the case in initial revisions. Update the dt-bindings with this new change. Signed-off-by: Jagan Teki Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231125142914.57459-1-jagan@edgeble.ai Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 5b015c4ed775..e756977acd51 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -101,16 +101,12 @@ properties: - const: edgeble,neural-compute-module-2 # Edgeble Neural Compute Module 2 SoM - const: rockchip,rv1126 - - description: Edgeble Neural Compute Module 6(Neu6) Model A SoM based boards + - description: Edgeble Neural Compute Module 6(Neu6) SoM based boards items: - - const: edgeble,neural-compute-module-6a-io # Edgeble Neural Compute Module 6A IO Board - - const: edgeble,neural-compute-module-6a # Edgeble Neural Compute Module 6A SoM - - const: rockchip,rk3588 - - - description: Edgeble Neural Compute Module 6(Neu6) Model B SoM based boards - items: - - const: edgeble,neural-compute-module-6b-io # Edgeble Neural Compute Module 6B IO Board - - const: edgeble,neural-compute-module-6b # Edgeble Neural Compute Module 6B SoM + - const: edgeble,neural-compute-module-6a-io # Edgeble NCM6A-IO Board + - enum: + - edgeble,neural-compute-module-6a # Edgeble Neural Compute Module 6A SoM + - edgeble,neural-compute-module-6b # Edgeble Neural Compute Module 6B SoM - const: rockchip,rk3588 - description: Elgin RV1108 R1 -- cgit v1.2.3 From 21a34e63afcc4328bd3f62289dafd796ae95550b Mon Sep 17 00:00:00 2001 From: Inochi Amaoto Date: Thu, 19 Oct 2023 07:18:48 +0800 Subject: dt-bindings: interrupt-controller: Add SOPHGO CV1812H plic Add compatible string for SOPHGO CV1812H plic. Signed-off-by: Inochi Amaoto Acked-by: Krzysztof Kozlowski Reviewed-by: Jisheng Zhang Signed-off-by: Conor Dooley --- .../devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml index 0c07e8dda445..709b2211276b 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml @@ -66,6 +66,7 @@ properties: - enum: - allwinner,sun20i-d1-plic - sophgo,cv1800b-plic + - sophgo,cv1812h-plic - sophgo,sg2042-plic - thead,th1520-plic - const: thead,c900-plic -- cgit v1.2.3 From 06ea2a1968a92a2a8a03c91b4989bda2b0a8a578 Mon Sep 17 00:00:00 2001 From: Inochi Amaoto Date: Thu, 19 Oct 2023 07:18:49 +0800 Subject: dt-bindings: timer: Add SOPHGO CV1812H clint Add compatible string for the SOPHGO CV1812H clint. Signed-off-by: Inochi Amaoto Acked-by: Krzysztof Kozlowski Reviewed-by: Jisheng Zhang Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/timer/sifive,clint.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml index e8be6c470364..4b6c20fc8194 100644 --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml @@ -38,6 +38,7 @@ properties: - enum: - allwinner,sun20i-d1-clint - sophgo,cv1800b-clint + - sophgo,cv1812h-clint - thead,th1520-clint - const: thead,c900-clint - items: -- cgit v1.2.3 From d7b92027834e92a47f254d846483968d29ce2360 Mon Sep 17 00:00:00 2001 From: Inochi Amaoto Date: Thu, 19 Oct 2023 07:18:50 +0800 Subject: dt-bindings: riscv: Add SOPHGO Huashan Pi board compatibles Document the compatible strings for the SOPHGO Huashan Pi board which uses the SOPHGO CV1812H SoC. Signed-off-by: Inochi Amaoto Link: https://en.sophgo.com/product/introduce/huashan.html Link: https://en.sophgo.com/product/introduce/cv181xH.html Acked-by: Chen Wang Acked-by: Krzysztof Kozlowski Reviewed-by: Jisheng Zhang Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/riscv/sophgo.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/riscv/sophgo.yaml b/Documentation/devicetree/bindings/riscv/sophgo.yaml index 86748c5390be..9bc813dad098 100644 --- a/Documentation/devicetree/bindings/riscv/sophgo.yaml +++ b/Documentation/devicetree/bindings/riscv/sophgo.yaml @@ -22,6 +22,10 @@ properties: - enum: - milkv,duo - const: sophgo,cv1800b + - items: + - enum: + - sophgo,huashan-pi + - const: sophgo,cv1812h - items: - enum: - milkv,pioneer -- cgit v1.2.3 From 14259fcdaf72d3ce93ad9c2b12cc0e96ed5a0c4e Mon Sep 17 00:00:00 2001 From: Sridharan S N Date: Wed, 27 Sep 2023 15:01:30 +0530 Subject: dt-bindings: arm: qcom: drop the IPQ board types IPQ bootloaders do not need these information to select the the DTB blob. So dropping the board names from board section. Signed-off-by: Sridharan S N Acked-by: Rob Herring Link: https://lore.kernel.org/r/20230927093130.4098385-1-quic_sridsn@quicinc.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 14 -------------- 1 file changed, 14 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 88b84035e7b1..c0c7b282cb6d 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -91,24 +91,10 @@ description: | The 'board' element must be one of the following strings: adp - ap-al02-c2 - ap-al02-c6 - ap-al02-c7 - ap-al02-c8 - ap-al02-c9 - ap-mi01.2 - ap-mi01.3 - ap-mi01.6 - ap-mi01.9 cdp - cp01-c1 dragonboard - hk01 - hk10-c1 - hk10-c2 idp liquid - rdp432-c2 mtp qrd rb2 -- cgit v1.2.3 From afc4f14be33c50f066392f1e9671473419ba7ded Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Fri, 13 Oct 2023 18:39:33 +0200 Subject: dt-bindings: clocks: qcom,gcc-ipq8074: allow QMP PCI PHY PIPE clocks QMP PCI PHY PIPE clocks are inputs for the GCC clock controller. In order to describe this in DTS, allow passing them as the inputs to GCC. This has a benefit that it avoids doing a global matching by name. Signed-off-by: Robert Marko Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231013164025.3541606-1-robimarko@gmail.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml index 52e7831a8d6d..2d44ddc45aab 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml @@ -27,11 +27,15 @@ properties: items: - description: board XO clock - description: sleep clock + - description: Gen3 QMP PCIe PHY PIPE clock + - description: Gen2 QMP PCIe PHY PIPE clock clock-names: items: - const: xo - const: sleep_clk + - const: pcie0_pipe + - const: pcie1_pipe required: - compatible -- cgit v1.2.3 From 06fd1dd1efde4a0bcc874de03558f6e0ba3817eb Mon Sep 17 00:00:00 2001 From: Komal Bajaj Date: Wed, 29 Nov 2023 12:28:14 +0530 Subject: dt-bindings: arm: qcom: Add QCM6490 IDP and QCS6490 RB3Gen2 board Document the qcom,qcm6490-idp and qcs6490-rb3gen2 boards. qcm6490-idp based off qcm6490 SoC derived from sc7280 meant for various form factor including IoT and qcs6490-rb3gen2 based off qcs6490 SoC derivative of qcm6490 without internal modem. Co-developed by: Naina Mehta Signed-off by: Naina Mehta Signed-off-by: Komal Bajaj Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231129065816.26409-2-quic_kbajaj@quicinc.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index c0c7b282cb6d..10ff45b2c287 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -393,6 +393,8 @@ properties: - items: - enum: - fairphone,fp5 + - qcom,qcm6490-idp + - qcom,qcs6490-rb3gen2 - const: qcom,qcm6490 - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform -- cgit v1.2.3 From 3c3fcac8d3b1b0f242845c3b3c3263bd38b3b92f Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Tue, 28 Nov 2023 19:04:41 -0800 Subject: dt-bindings: arm: qcom: Fix html link This link got broken by commit e790a4ce5290 ("arm: docs: Move Arm documentation to Documentation/arch/") when the doc moved from arm/ to arch/arm/. Fix the link so that it can continue to be followed. Fixes: e790a4ce5290 ("arm: docs: Move Arm documentation to Documentation/arch/") Cc: Alexandre TORGUE Cc: Yanteng Si Cc: Jonathan Corbet Reviewed-by: Douglas Anderson Acked-by: Krzysztof Kozlowski Signed-off-by: Stephen Boyd Link: https://lore.kernel.org/r/20231129030443.2753833-1-swboyd@chromium.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 10ff45b2c287..ace3a2a18a8a 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -124,7 +124,7 @@ description: | There are many devices in the list below that run the standard ChromeOS bootloader setup and use the open source depthcharge bootloader to boot the OS. These devices do not use the scheme described above. For details, see: - https://docs.kernel.org/arm/google/chromebook-boot-flow.html + https://docs.kernel.org/arch/arm/google/chromebook-boot-flow.html properties: $nodename: -- cgit v1.2.3 From 01a3c3739183003640f8468ecf75d7eeb15f808a Mon Sep 17 00:00:00 2001 From: Lukas Walter Date: Sat, 21 Oct 2023 16:30:24 +0200 Subject: dt-bindings: arm: qcom: Add Huawei Honor 5X / GR5 (2016) Add a compatible for Huawei Honor 5X / GR5 (2016). Acked-by: Krzysztof Kozlowski Signed-off-by: Lukas Walter Link: https://lore.kernel.org/r/20231021143025.77088-1-lukas.walter@aceart.de Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index ace3a2a18a8a..ba0616445cdd 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -187,6 +187,7 @@ properties: - items: - enum: + - huawei,kiwi - longcheer,l9100 - samsung,a7 - sony,kanuti-tulip -- cgit v1.2.3 From d69e34675a8be0affe8c55dbf50f795dac521933 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sat, 25 Nov 2023 13:05:33 +0100 Subject: dt-bindings: vendor-prefixes: document HTC Corporation Add the vendor prefix for HTC (https://www.htc.com/). Acked-by: Krzysztof Kozlowski Signed-off-by: Luca Weiss Link: https://lore.kernel.org/r/20231125-htc-memul-v3-1-e8f4c5839e23@z3ntu.xyz Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 309b94c328c8..b752f8902367 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -597,6 +597,8 @@ patternProperties: description: Hewlett Packard Enterprise "^hsg,.*": description: HannStar Display Co. + "^htc,.*": + description: HTC Corporation "^huawei,.*": description: Huawei Technologies Co., Ltd. "^hugsun,.*": -- cgit v1.2.3 From bfccc195192ea6ae72a4a49a85c94f1ad8ee7a13 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sat, 25 Nov 2023 13:05:34 +0100 Subject: dt-bindings: arm: qcom: Add HTC One Mini 2 Document the compatible for the MSM8926-based HTC One Mini 2 smartphone. Acked-by: Krzysztof Kozlowski Signed-off-by: Luca Weiss Link: https://lore.kernel.org/r/20231125-htc-memul-v3-2-e8f4c5839e23@z3ntu.xyz Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index ba0616445cdd..e09745a802fd 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -256,6 +256,11 @@ properties: - const: qcom,msm8916-v1-qrd/9-v1 - const: qcom,msm8916 + - items: + - enum: + - htc,memul + - const: qcom,msm8926 + - items: - enum: - motorola,potter -- cgit v1.2.3 From 56bde00f7d151d90c66dada007f13f92b95b0d05 Mon Sep 17 00:00:00 2001 From: Tim Lunn Date: Sun, 3 Dec 2023 23:40:04 +1100 Subject: dt-bindings: arm: rockchip: Add Sonoff iHost Sonoff iHost is a smart home hub with built in radios for wifi/bt and Zigbee. It is based off the Rockchip RV1126 (or RV1109) SoC. Signed-off-by: Tim Lunn Acked-by: Rob Herring Link: https://lore.kernel.org/r/20231203124004.2676174-9-tim@feathertop.org Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index d3c5b25fc2fd..560177823d4a 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -927,6 +927,13 @@ properties: - const: rockchip,rk3568-bpi-r2pro - const: rockchip,rk3568 + - description: Sonoff iHost Smart Home Hub + items: + - const: itead,sonoff-ihost + - enum: + - rockchip,rv1126 + - rockchip,rv1109 + additionalProperties: true ... -- cgit v1.2.3 From 29b560a4e37ed70d6c233a50ecad84097d50b816 Mon Sep 17 00:00:00 2001 From: Hugo Villeneuve Date: Tue, 5 Dec 2023 10:08:12 -0500 Subject: dt-bindings: vendor-prefixes: add rve MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add vendor prefix for Recharge Véhicule Électrique (RVE), which manufactures electric vehicle chargers infrastructure components. Acked-by: Krzysztof Kozlowski Signed-off-by: Hugo Villeneuve Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 309b94c328c8..71dcd6240a99 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1179,6 +1179,8 @@ patternProperties: description: Shenzhen Roofull Technology Co, Ltd "^roseapplepi,.*": description: RoseapplePi.org + "^rve,.*": + description: Recharge Véhicule Électrique (RVE) inc. "^saef,.*": description: Saef Technology Limited "^samsung,.*": -- cgit v1.2.3 From bb405e8b5336344c02a80d10979e17ff7629541c Mon Sep 17 00:00:00 2001 From: Hugo Villeneuve Date: Tue, 5 Dec 2023 10:08:13 -0500 Subject: dt-bindings: arm: fsl: add RVE gateway board Add DT compatible string for RVE gateway board based on a Variscite VAR-SOM-NANO with a NXP MX8MN nano CPU. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Hugo Villeneuve Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 32b195852a75..5b98a17b65b5 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1022,7 +1022,9 @@ properties: - description: Variscite VAR-SOM-MX8MN based boards items: - - const: variscite,var-som-mx8mn-symphony + - enum: + - rve,rve-gateway # i.MX8MN RVE Gateway Board + - variscite,var-som-mx8mn-symphony - const: variscite,var-som-mx8mn - const: fsl,imx8mn -- cgit v1.2.3 From 37dbc39776db525e1738ed5d67251f30ad5e6f19 Mon Sep 17 00:00:00 2001 From: Oleksij Rempel Date: Mon, 13 Nov 2023 12:38:54 +0100 Subject: dt-bindings: arm: Add compatible for SKOV i.MX8MP RevB board Add DT compatible string for a SKOV i.MX8MP RevB climate controller board. Signed-off-by: Oleksij Rempel Acked-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 5b98a17b65b5..dc45b4cd867f 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1050,6 +1050,9 @@ properties: - gateworks,imx8mp-gw73xx-2x # i.MX8MP Gateworks Board - gateworks,imx8mp-gw74xx # i.MX8MP Gateworks Board - gateworks,imx8mp-gw7905-2x # i.MX8MP Gateworks Board + - skov,imx8mp-skov-revb-hdmi # SKOV i.MX8MP climate control without panel + - skov,imx8mp-skov-revb-lt6 # SKOV i.MX8MP climate control with 7” panel + - skov,imx8mp-skov-revb-mi1010ait-1cp1 # SKOV i.MX8MP climate control with 10.1" panel - toradex,verdin-imx8mp # Verdin iMX8M Plus Modules - toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Modules without Wi-Fi / BT - toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Modules -- cgit v1.2.3 From ffce67b61108aaab6061f122b5cffe6c4e59fee2 Mon Sep 17 00:00:00 2001 From: Joao Paulo Goncalves Date: Fri, 1 Dec 2023 16:07:32 +0100 Subject: dt-bindings: arm: fsl: add verdin imx8mm mallow board Add Mallow carrier board for wifi and nonwifi variants of Toradex Verdin IMX8MM SoM. Mallow is a low-cost carrier board in the Verdin family with a small form factor and build for volume production making it ideal for industrial and embedded applications. https://www.toradex.com/products/carrier-board/mallow-carrier-board Signed-off-by: Joao Paulo Goncalves Signed-off-by: Francesco Dolcini Acked-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index dc45b4cd867f..810857bacaa9 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -967,6 +967,7 @@ properties: - menlo,mx8menlo # Verdin iMX8M Mini Module on i.MX8MM Menlo board - toradex,verdin-imx8mm-nonwifi-dahlia # Verdin iMX8M Mini Module on Dahlia - toradex,verdin-imx8mm-nonwifi-dev # Verdin iMX8M Mini Module on Verdin Development Board + - toradex,verdin-imx8mm-nonwifi-mallow # Verdin iMX8M Mini Module on Mallow - toradex,verdin-imx8mm-nonwifi-yavia # Verdin iMX8M Mini Module on Yavia - const: toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Module without Wi-Fi / BT - const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module @@ -977,6 +978,7 @@ properties: - enum: - toradex,verdin-imx8mm-wifi-dahlia # Verdin iMX8M Mini Wi-Fi / BT Module on Dahlia - toradex,verdin-imx8mm-wifi-dev # Verdin iMX8M Mini Wi-Fi / BT M. on Verdin Development B. + - toradex,verdin-imx8mm-wifi-mallow # Verdin iMX8M Mini Wi-Fi / BT Module on Mallow - toradex,verdin-imx8mm-wifi-yavia # Verdin iMX8M Mini Wi-Fi / BT Module on Yavia - const: toradex,verdin-imx8mm-wifi # Verdin iMX8M Mini Wi-Fi / BT Module - const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module -- cgit v1.2.3 From 63ff54dfa832695263e60215c07768adad98f573 Mon Sep 17 00:00:00 2001 From: Joao Paulo Goncalves Date: Fri, 1 Dec 2023 16:39:28 +0100 Subject: dt-bindings: arm: fsl: add verdin imx8mp mallow board Add Mallow carrier board for wifi and nonwifi variants of Toradex Verdin IMX8MP SoM. Mallow is a low-cost carrier board in the Verdin family with a small form factor and build for volume production making it ideal for industrial and embedded applications. https://www.toradex.com/products/carrier-board/mallow-carrier-board Signed-off-by: Joao Paulo Goncalves Signed-off-by: Francesco Dolcini Acked-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 810857bacaa9..cd87d1afe7b7 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1107,6 +1107,7 @@ properties: - enum: - toradex,verdin-imx8mp-nonwifi-dahlia # Verdin iMX8M Plus Module on Dahlia - toradex,verdin-imx8mp-nonwifi-dev # Verdin iMX8M Plus Module on Verdin Development Board + - toradex,verdin-imx8mp-nonwifi-mallow # Verdin iMX8M Plus Module on Mallow - toradex,verdin-imx8mp-nonwifi-yavia # Verdin iMX8M Plus Module on Yavia - const: toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Module without Wi-Fi / BT - const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module @@ -1117,6 +1118,7 @@ properties: - enum: - toradex,verdin-imx8mp-wifi-dahlia # Verdin iMX8M Plus Wi-Fi / BT Module on Dahlia - toradex,verdin-imx8mp-wifi-dev # Verdin iMX8M Plus Wi-Fi / BT M. on Verdin Development B. + - toradex,verdin-imx8mp-wifi-mallow # Verdin iMX8M Plus Wi-Fi / BT Module on Mallow - toradex,verdin-imx8mp-wifi-yavia # Verdin iMX8M Plus Wi-Fi / BT Module on Yavia - const: toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Module - const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module -- cgit v1.2.3 From 658902913c7044ac5d56b14cea54e735a071fe41 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Wed, 29 Nov 2023 15:41:01 +0100 Subject: dt-bindings: interconnect: Add Qualcomm SM6115 NoC Add bindings for Qualcomm SM6115 Network-On-Chip interconnect. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231125-topic-6115icc-v3-1-bd8907b8cfd7@linaro.org Signed-off-by: Georgi Djakov --- .../bindings/interconnect/qcom,sm6115.yaml | 152 +++++++++++++++++++++ 1 file changed, 152 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml new file mode 100644 index 000000000000..14b1a0b08e73 --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml @@ -0,0 +1,152 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,sm6115.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM6115 Network-On-Chip interconnect + +maintainers: + - Konrad Dybcio + +description: + The Qualcomm SM6115 interconnect providers support adjusting the + bandwidth requirements between the various NoC fabrics. + +properties: + compatible: + enum: + - qcom,sm6115-bimc + - qcom,sm6115-cnoc + - qcom,sm6115-snoc + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 4 + + clock-names: + minItems: 1 + maxItems: 4 + +# Child node's properties +patternProperties: + '^interconnect-[a-z0-9]+$': + type: object + description: + The interconnect providers do not have a separate QoS register space, + but share parent's space. + + $ref: qcom,rpm-common.yaml# + + properties: + compatible: + enum: + - qcom,sm6115-clk-virt + - qcom,sm6115-mmrt-virt + - qcom,sm6115-mmnrt-virt + + required: + - compatible + + unevaluatedProperties: false + +required: + - compatible + - reg + +allOf: + - $ref: qcom,rpm-common.yaml# + - if: + properties: + compatible: + const: qcom,sm6115-cnoc + + then: + properties: + clocks: + items: + - description: USB-NoC AXI clock + + clock-names: + items: + - const: usb_axi + + - if: + properties: + compatible: + const: qcom,sm6115-snoc + + then: + properties: + clocks: + items: + - description: CPU-NoC AXI clock. + - description: UFS-NoC AXI clock. + - description: USB-NoC AXI clock. + - description: IPA clock. + + clock-names: + items: + - const: cpu_axi + - const: ufs_axi + - const: usb_axi + - const: ipa + + - if: + properties: + compatible: + enum: + - qcom,sm6115-bimc + - qcom,sm6115-clk-virt + - qcom,sm6115-mmrt-virt + - qcom,sm6115-mmnrt-virt + + then: + properties: + clocks: false + clock-names: false + +unevaluatedProperties: false + +examples: + - | + #include + #include + + snoc: interconnect@1880000 { + compatible = "qcom,sm6115-snoc"; + reg = <0x01880000 0x60200>; + clocks = <&gcc GCC_SYS_NOC_CPUSS_AHB_CLK>, + <&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>, + <&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>, + <&rpmcc RPM_SMD_IPA_CLK>; + clock-names = "cpu_axi", + "ufs_axi", + "usb_axi", + "ipa"; + #interconnect-cells = <1>; + + qup_virt: interconnect-clk { + compatible = "qcom,sm6115-clk-virt"; + #interconnect-cells = <1>; + }; + + mmnrt_virt: interconnect-mmnrt { + compatible = "qcom,sm6115-mmnrt-virt"; + #interconnect-cells = <1>; + }; + + mmrt_virt: interconnect-mmrt { + compatible = "qcom,sm6115-mmrt-virt"; + #interconnect-cells = <1>; + }; + }; + + cnoc: interconnect@1900000 { + compatible = "qcom,sm6115-cnoc"; + reg = <0x01900000 0x8200>; + #interconnect-cells = <1>; + }; -- cgit v1.2.3 From f9b5aae471dca94de2ea525136a59927e9b1d7cf Mon Sep 17 00:00:00 2001 From: Joao Paulo Goncalves Date: Tue, 5 Dec 2023 19:46:04 +0100 Subject: dt-bindings: arm: ti: Add verdin am62 mallow board Add Mallow carrier board for wifi and nonwifi variants of Toradex Verdin AM62 SoM. Mallow is a low-cost carrier board in the Verdin family with a small form factor and build for volume production making it ideal for industrial and embedded applications. https://www.toradex.com/products/carrier-board/mallow-carrier-board Acked-by: Krzysztof Kozlowski Signed-off-by: Joao Paulo Goncalves Signed-off-by: Francesco Dolcini Link: https://lore.kernel.org/r/20231205184605.35225-3-francesco@dolcini.it Signed-off-by: Nishanth Menon --- Documentation/devicetree/bindings/arm/ti/k3.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index 03d2a0d79fb0..c6506bccfe88 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -50,6 +50,7 @@ properties: - enum: - toradex,verdin-am62-nonwifi-dahlia # Verdin AM62 Module on Dahlia - toradex,verdin-am62-nonwifi-dev # Verdin AM62 Module on Verdin Development Board + - toradex,verdin-am62-nonwifi-mallow # Verdin AM62 Module on Mallow - toradex,verdin-am62-nonwifi-yavia # Verdin AM62 Module on Yavia - const: toradex,verdin-am62-nonwifi # Verdin AM62 Module without Wi-Fi / BT - const: toradex,verdin-am62 # Verdin AM62 Module @@ -60,6 +61,7 @@ properties: - enum: - toradex,verdin-am62-wifi-dahlia # Verdin AM62 Wi-Fi / BT Module on Dahlia - toradex,verdin-am62-wifi-dev # Verdin AM62 Wi-Fi / BT M. on Verdin Development B. + - toradex,verdin-am62-wifi-mallow # Verdin AM62 Wi-Fi / BT Module on Mallow - toradex,verdin-am62-wifi-yavia # Verdin AM62 Wi-Fi / BT Module on Yavia - const: toradex,verdin-am62-wifi # Verdin AM62 Wi-Fi / BT Module - const: toradex,verdin-am62 # Verdin AM62 Module -- cgit v1.2.3 From 7677fdbc036b93a882f660ca2484a6807e72f0be Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 5 Dec 2023 10:22:24 +0100 Subject: dt-bindings: i2c: exynos5: add specific compatible for Tesla FSD Tesla FSD is a derivative of Samsung Exynos SoC, thus just like the others it reuses several devices from older designs. Historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add Tesla FSD compatible specific to be used with an existing fallback. Acked-by: Rob Herring Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20231205092229.19135-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml index c1f5d2cb7709..df9c57bca2a8 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml @@ -29,6 +29,7 @@ properties: - items: - enum: - samsung,exynos5433-hsi2c + - tesla,fsd-hsi2c - const: samsung,exynos7-hsi2c - items: - enum: -- cgit v1.2.3 From edb32ec3cea79b518e6af841ecb01c839818f562 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 5 Dec 2023 10:22:25 +0100 Subject: dt-bindings: pwm: samsung: add specific compatible for Tesla FSD MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Tesla FSD is a derivative of Samsung Exynos SoC, thus just like the others it reuses several devices from older designs. Historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add Tesla FSD compatible specific to be used with an existing fallback. Acked-by: Rob Herring Acked-by: Uwe Kleine-König Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20231205092229.19135-3-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/pwm/pwm-samsung.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml index 16de6434693b..17a2b927af33 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml @@ -33,6 +33,7 @@ properties: - samsung,exynos7-pwm - samsung,exynosautov9-pwm - samsung,exynosautov920-pwm + - tesla,fsd-pwm - const: samsung,exynos4210-pwm reg: -- cgit v1.2.3 From 921f4f1db7f5bf6798349db8a4382c032f144b98 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 5 Dec 2023 10:22:26 +0100 Subject: dt-bindings: serial: samsung: add specific compatible for Tesla FSD Tesla FSD is a derivative of Samsung Exynos SoC, thus just like the others it reuses several devices from older designs. Historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add Tesla FSD compatible specific to be used with an existing fallback. Acked-by: Rob Herring Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20231205092229.19135-4-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/serial/samsung_uart.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml index e32c1b462836..4b6fc82c2edf 100644 --- a/Documentation/devicetree/bindings/serial/samsung_uart.yaml +++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml @@ -29,6 +29,7 @@ properties: - items: - enum: - samsung,exynos7-uart + - tesla,fsd-uart - const: samsung,exynos4210-uart - items: - enum: -- cgit v1.2.3 From 54772f1d61cd99ea1ed0febd4187bf24ef63bccd Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 5 Dec 2023 10:22:27 +0100 Subject: dt-bindings: samsung: exynos-pmu: add specific compatible for Tesla FSD Tesla FSD is a derivative of Samsung Exynos SoC, thus just like the others it reuses several devices from older designs. Historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add Tesla FSD compatible specific to be used with an existing fallback. Acked-by: Rob Herring Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20231205092229.19135-5-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml index 28e2cb50d85e..65f77442ff23 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml @@ -53,6 +53,7 @@ properties: - samsung,exynos7885-pmu - samsung,exynosautov9-pmu - samsung,exynosautov920-pmu + - tesla,fsd-pmu - const: samsung,exynos7-pmu - const: syscon - items: -- cgit v1.2.3 From bf1e24c5330af06b2f7f1a166a1011d8d48e8651 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 5 Dec 2023 10:22:28 +0100 Subject: dt-bindings: watchdog: samsung: add specific compatible for Tesla FSD Tesla FSD is a derivative of Samsung Exynos SoC, thus just like the others it reuses several devices from older designs. Historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add Tesla FSD compatible specific to be used with an existing fallback. Acked-by: Rob Herring Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20231205092229.19135-6-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/watchdog/samsung-wdt.yaml | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml b/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml index 8fb6656ba0c2..ea2d206b05ab 100644 --- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml @@ -16,14 +16,19 @@ description: |+ properties: compatible: - enum: - - samsung,s3c2410-wdt # for S3C2410 - - samsung,s3c6410-wdt # for S3C6410, S5PV210 and Exynos4 - - samsung,exynos5250-wdt # for Exynos5250 - - samsung,exynos5420-wdt # for Exynos5420 - - samsung,exynos7-wdt # for Exynos7 - - samsung,exynos850-wdt # for Exynos850 - - samsung,exynosautov9-wdt # for Exynosautov9 + oneOf: + - enum: + - samsung,s3c2410-wdt # for S3C2410 + - samsung,s3c6410-wdt # for S3C6410, S5PV210 and Exynos4 + - samsung,exynos5250-wdt # for Exynos5250 + - samsung,exynos5420-wdt # for Exynos5420 + - samsung,exynos7-wdt # for Exynos7 + - samsung,exynos850-wdt # for Exynos850 + - samsung,exynosautov9-wdt # for Exynosautov9 + - items: + - enum: + - tesla,fsd-wdt + - const: samsung,exynos7-wdt reg: maxItems: 1 -- cgit v1.2.3 From 4ab1721694a07651afef97dfb150f06c267cf2c4 Mon Sep 17 00:00:00 2001 From: Bryan O'Donoghue Date: Thu, 26 Oct 2023 11:53:42 +0100 Subject: dt-bindings: clock: Use gcc.yaml for common clock properties Various of the camcc bindings are repeated serially. We can use qcom,gcc.yaml to encapsulate the generic repeated patterns. Signed-off-by: Bryan O'Donoghue Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231026105345.3376-2-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson --- .../devicetree/bindings/clock/qcom,camcc-sm8250.yaml | 18 ++++-------------- .../devicetree/bindings/clock/qcom,sc7180-camcc.yaml | 18 ++++-------------- .../devicetree/bindings/clock/qcom,sc7280-camcc.yaml | 18 ++++-------------- .../devicetree/bindings/clock/qcom,sdm845-camcc.yaml | 18 ++++-------------- .../devicetree/bindings/clock/qcom,sm8450-camcc.yaml | 18 ++++-------------- 5 files changed, 20 insertions(+), 70 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml index 426335a2841c..3fd3dc1069fb 100644 --- a/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml @@ -15,6 +15,9 @@ description: | See also:: include/dt-bindings/clock/qcom,camcc-sm8250.h +allOf: + - $ref: qcom,gcc.yaml# + properties: compatible: const: qcom,sm8250-camcc @@ -33,15 +36,6 @@ properties: - const: bi_tcxo_ao - const: sleep_clk - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - power-domains: items: - description: MMCX power domain @@ -56,14 +50,10 @@ properties: required: - compatible - - reg - clocks - clock-names - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml index 2dfc2a4f1918..c7fe6400ea13 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml @@ -15,6 +15,9 @@ description: | See also:: include/dt-bindings/clock/qcom,camcc-sc7180.h +allOf: + - $ref: qcom,gcc.yaml# + properties: compatible: const: qcom,sc7180-camcc @@ -31,28 +34,15 @@ properties: - const: iface - const: xo - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - reg: maxItems: 1 required: - compatible - - reg - clocks - clock-names - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml index 01feef1cab0a..dcef8de3a905 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml @@ -15,6 +15,9 @@ description: | See also:: include/dt-bindings/clock/qcom,camcc-sc7280.h +allOf: + - $ref: qcom,gcc.yaml# + properties: compatible: const: qcom,sc7280-camcc @@ -31,28 +34,15 @@ properties: - const: bi_tcxo_ao - const: sleep_clk - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - reg: maxItems: 1 required: - compatible - - reg - clocks - clock-names - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml index 91d1f7918037..810b852ae371 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml @@ -15,6 +15,9 @@ description: | See also:: include/dt-bindings/clock/qcom,camcc-sm845.h +allOf: + - $ref: qcom,gcc.yaml# + properties: compatible: const: qcom,sdm845-camcc @@ -27,28 +30,15 @@ properties: items: - const: bi_tcxo - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - reg: maxItems: 1 required: - compatible - - reg - clocks - clock-names - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml index dc3c18e4ead7..6915498deacf 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml @@ -17,6 +17,9 @@ description: | include/dt-bindings/clock/qcom,sm8450-camcc.h include/dt-bindings/clock/qcom,sm8550-camcc.h +allOf: + - $ref: qcom,gcc.yaml# + properties: compatible: enum: @@ -40,29 +43,16 @@ properties: description: A phandle to an OPP node describing required MMCX performance point. - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - reg: maxItems: 1 required: - compatible - - reg - clocks - power-domains - required-opps - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +unevaluatedProperties: false examples: - | -- cgit v1.2.3 From 206cd759fbd2fce07cadb6c73a302ecfc95ebdff Mon Sep 17 00:00:00 2001 From: Bryan O'Donoghue Date: Thu, 26 Oct 2023 11:53:43 +0100 Subject: dt-bindings: clock: Add SC8280XP CAMCC Add device tree bindings for the camera clock controller on Qualcomm SC8280XP platform. Signed-off-by: Bryan O'Donoghue Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231026105345.3376-3-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml index 6915498deacf..48986460f994 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml @@ -16,6 +16,7 @@ description: | See also:: include/dt-bindings/clock/qcom,sm8450-camcc.h include/dt-bindings/clock/qcom,sm8550-camcc.h + include/dt-bindings/clock/qcom,sc8280xp-camcc.h allOf: - $ref: qcom,gcc.yaml# @@ -23,6 +24,7 @@ allOf: properties: compatible: enum: + - qcom,sc8280xp-camcc - qcom,sm8450-camcc - qcom,sm8550-camcc -- cgit v1.2.3 From 1a3b3bd142ffea56cdfd458246b2e4da6df19da6 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 6 Nov 2023 09:25:54 +0100 Subject: dt-bindings: clock: qcom: document the SM8650 TCSR Clock Controller Add bindings documentation for the SM8650 TCSR Clock Controller. Signed-off-by: Neil Armstrong Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-1-761a6fadb4c0@linaro.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml index 1bf1a41fd89c..af16b05eac96 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml @@ -13,12 +13,16 @@ description: | Qualcomm TCSR clock control module provides the clocks, resets and power domains on SM8550 - See also:: include/dt-bindings/clock/qcom,sm8550-tcsr.h + See also: + - include/dt-bindings/clock/qcom,sm8550-tcsr.h + - include/dt-bindings/clock/qcom,sm8650-tcsr.h properties: compatible: items: - - const: qcom,sm8550-tcsr + - enum: + - qcom,sm8550-tcsr + - qcom,sm8650-tcsr - const: syscon clocks: -- cgit v1.2.3 From b69d932154dcfa84540aea55dd51a74fbc88d370 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 6 Nov 2023 09:25:55 +0100 Subject: dt-bindings: clock: qcom: document the SM8650 General Clock Controller Add bindings documentation for the SM8650 General Clock Controller. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-2-761a6fadb4c0@linaro.org Signed-off-by: Bjorn Andersson --- .../devicetree/bindings/clock/qcom,sm8650-gcc.yaml | 65 ++++++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8650-gcc.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8650-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8650-gcc.yaml new file mode 100644 index 000000000000..b54761cc8674 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,sm8650-gcc.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sm8650-gcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller on SM8650 + +maintainers: + - Bjorn Andersson + +description: | + Qualcomm global clock control module provides the clocks, resets and power + domains on SM8650 + + See also:: include/dt-bindings/clock/qcom,sm8650-gcc.h + +properties: + compatible: + const: qcom,sm8650-gcc + + clocks: + items: + - description: Board XO source + - description: Board Always On XO source + - description: Sleep clock source + - description: PCIE 0 Pipe clock source + - description: PCIE 1 Pipe clock source + - description: PCIE 1 Phy Auxiliary clock source + - description: UFS Phy Rx symbol 0 clock source + - description: UFS Phy Rx symbol 1 clock source + - description: UFS Phy Tx symbol 0 clock source + - description: USB3 Phy wrapper pipe clock source + +required: + - compatible + - clocks + +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + clock-controller@100000 { + compatible = "qcom,sm8650-gcc"; + reg = <0x00100000 0x001f4200>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>, + <&sleep_clk>, + <&pcie0_phy>, + <&pcie1_phy>, + <&pcie_1_phy_aux_clk>, + <&ufs_mem_phy 0>, + <&ufs_mem_phy 1>, + <&ufs_mem_phy 2>, + <&usb_1_qmpphy>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + +... -- cgit v1.2.3 From c1120359d4c2a1050e6a5bddd47ee1887bb0c713 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 6 Nov 2023 09:25:56 +0100 Subject: dt-bindings: clock: qcom: document the SM8650 Display Clock Controller Add bindings documentation for the SM8650 Display Clock Controller. Reviewed-by: Rob Herring Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-3-761a6fadb4c0@linaro.org Signed-off-by: Bjorn Andersson --- .../bindings/clock/qcom,sm8650-dispcc.yaml | 106 +++++++++++++++++++++ 1 file changed, 106 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8650-dispcc.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8650-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8650-dispcc.yaml new file mode 100644 index 000000000000..5e0c45c380f5 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,sm8650-dispcc.yaml @@ -0,0 +1,106 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sm8650-dispcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Display Clock & Reset Controller for SM8650 + +maintainers: + - Bjorn Andersson + - Neil Armstrong + +description: | + Qualcomm display clock control module provides the clocks, resets and power + domains on SM8650. + + See also:: include/dt-bindings/clock/qcom,sm8650-dispcc.h + +properties: + compatible: + enum: + - qcom,sm8650-dispcc + + clocks: + items: + - description: Board XO source + - description: Board Always On XO source + - description: Display's AHB clock + - description: sleep clock + - description: Byte clock from DSI PHY0 + - description: Pixel clock from DSI PHY0 + - description: Byte clock from DSI PHY1 + - description: Pixel clock from DSI PHY1 + - description: Link clock from DP PHY0 + - description: VCO DIV clock from DP PHY0 + - description: Link clock from DP PHY1 + - description: VCO DIV clock from DP PHY1 + - description: Link clock from DP PHY2 + - description: VCO DIV clock from DP PHY2 + - description: Link clock from DP PHY3 + - description: VCO DIV clock from DP PHY3 + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + + power-domains: + description: + A phandle and PM domain specifier for the MMCX power domain. + maxItems: 1 + + required-opps: + description: + A phandle to an OPP node describing required MMCX performance point. + maxItems: 1 + +required: + - compatible + - reg + - clocks + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + clock-controller@af00000 { + compatible = "qcom,sm8650-dispcc"; + reg = <0x0af00000 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>, + <&gcc GCC_DISP_AHB_CLK>, + <&sleep_clk>, + <&dsi0_phy 0>, + <&dsi0_phy 1>, + <&dsi1_phy 0>, + <&dsi1_phy 1>, + <&dp0_phy 0>, + <&dp0_phy 1>, + <&dp1_phy 0>, + <&dp1_phy 1>, + <&dp2_phy 0>, + <&dp2_phy 1>, + <&dp3_phy 0>, + <&dp3_phy 1>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + power-domains = <&rpmhpd RPMHPD_MMCX>; + required-opps = <&rpmhpd_opp_low_svs>; + }; +... -- cgit v1.2.3 From a0aa7fa5c3f0e74e684c667e26824fe1e28f5c27 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 6 Nov 2023 09:25:57 +0100 Subject: dt-bindings: clock: qcom: document the SM8650 GPU Clock Controller Add bindings documentation for the SM8650 Graphics Clock Controller. Reviewed-by: Rob Herring Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-4-761a6fadb4c0@linaro.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml index 2320be920a5f..1a384e8532a5 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml @@ -17,12 +17,14 @@ description: | include/dt-bindings/clock/qcom,sm8450-gpucc.h include/dt-bindings/clock/qcom,sm8550-gpucc.h include/dt-bindings/reset/qcom,sm8450-gpucc.h + include/dt-bindings/reset/qcom,sm8650-gpucc.h properties: compatible: enum: - qcom,sm8450-gpucc - qcom,sm8550-gpucc + - qcom,sm8650-gpucc clocks: items: -- cgit v1.2.3 From 873f22440338d84ad911c4b8373afc3d8d413587 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 6 Nov 2023 09:25:58 +0100 Subject: dt-bindings: clock: qcom: Document the SM8650 RPMH Clock Controller Add bindings documentation for the SM8650 RPMH Clock Controller. Acked-by: Rob Herring Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-5-761a6fadb4c0@linaro.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml index 4eb5e59f6772..9be952a5a227 100644 --- a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml @@ -35,6 +35,7 @@ properties: - qcom,sm8350-rpmh-clk - qcom,sm8450-rpmh-clk - qcom,sm8550-rpmh-clk + - qcom,sm8650-rpmh-clk clocks: maxItems: 1 -- cgit v1.2.3 From 08105d9a5490551d86d95729bbbd3161652850dd Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 20 Nov 2023 11:06:17 +0100 Subject: dt-bindings: arm: qcom-soc: extend pattern for matching existing SoCs Add missing QDU, QRU and SDA platform names to the pattern matching all Qualcomm compatibles. Signed-off-by: Krzysztof Kozlowski Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20231120100617.47156-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom-soc.yaml | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/qcom-soc.yaml b/Documentation/devicetree/bindings/arm/qcom-soc.yaml index 97621c92a1ab..09db42456c12 100644 --- a/Documentation/devicetree/bindings/arm/qcom-soc.yaml +++ b/Documentation/devicetree/bindings/arm/qcom-soc.yaml @@ -23,7 +23,7 @@ description: | select: properties: compatible: - pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$" + pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" required: - compatible @@ -31,17 +31,17 @@ properties: compatible: oneOf: # Preferred naming style for compatibles of SoC components: - - pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+(pro)?-.*$" + - pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+(pro)?-.*$" - pattern: "^qcom,(sa|sc)8[0-9]+[a-z][a-z]?-.*$" # Legacy namings - variations of existing patterns/compatibles are OK, # but do not add completely new entries to these: - - pattern: "^qcom,[ak]pss-wdt-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$" - - pattern: "^qcom,gcc-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$" - - pattern: "^qcom,mmcc-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$" - - pattern: "^qcom,pcie-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$" - - pattern: "^qcom,rpm-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$" - - pattern: "^qcom,scm-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$" + - pattern: "^qcom,[ak]pss-wdt-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" + - pattern: "^qcom,gcc-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" + - pattern: "^qcom,mmcc-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" + - pattern: "^qcom,pcie-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" + - pattern: "^qcom,rpm-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" + - pattern: "^qcom,scm-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" - enum: - qcom,dsi-ctrl-6g-qcm2290 - qcom,gpucc-sdm630 -- cgit v1.2.3 From ef9284a55a78bf712e0bbe12b0d72d0a8ccd005e Mon Sep 17 00:00:00 2001 From: Sibi Sankar Date: Fri, 24 Nov 2023 15:36:04 +0530 Subject: dt-bindings: arm: qcom-soc: extend pattern matching for X1E80100 SoC Extend pattern matching to support the X1E platform name. Signed-off-by: Sibi Sankar Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231124100608.29964-2-quic_sibis@quicinc.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom-soc.yaml | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/qcom-soc.yaml b/Documentation/devicetree/bindings/arm/qcom-soc.yaml index 09db42456c12..d0751a572af3 100644 --- a/Documentation/devicetree/bindings/arm/qcom-soc.yaml +++ b/Documentation/devicetree/bindings/arm/qcom-soc.yaml @@ -23,7 +23,7 @@ description: | select: properties: compatible: - pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" + pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+.*$" required: - compatible @@ -31,7 +31,7 @@ properties: compatible: oneOf: # Preferred naming style for compatibles of SoC components: - - pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+(pro)?-.*$" + - pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+(pro)?-.*$" - pattern: "^qcom,(sa|sc)8[0-9]+[a-z][a-z]?-.*$" # Legacy namings - variations of existing patterns/compatibles are OK, @@ -39,9 +39,9 @@ properties: - pattern: "^qcom,[ak]pss-wdt-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" - pattern: "^qcom,gcc-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" - pattern: "^qcom,mmcc-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" - - pattern: "^qcom,pcie-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" + - pattern: "^qcom,pcie-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+.*$" - pattern: "^qcom,rpm-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" - - pattern: "^qcom,scm-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" + - pattern: "^qcom,scm-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+.*$" - enum: - qcom,dsi-ctrl-6g-qcm2290 - qcom,gpucc-sdm630 -- cgit v1.2.3 From 25bb226508a1384723b201da8bd5c16ac57f34cd Mon Sep 17 00:00:00 2001 From: Luka Panio Date: Sat, 25 Nov 2023 23:03:14 +0100 Subject: dt-bindings: arm: qcom: Add Xiaomi Pad 6 (xiaomi-pipa) Add a compatible for Xiaomi Pad 6. Acked-by: Conor Dooley Signed-off-by: Luka Panio Link: https://lore.kernel.org/r/20231125220315.118922-1-lukapanio@gmail.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index e09745a802fd..a4393a891f30 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1013,6 +1013,7 @@ properties: - sony,pdx203-generic - sony,pdx206-generic - xiaomi,elish + - xiaomi,pipa - const: qcom,sm8250 - items: -- cgit v1.2.3 From 78804eecbe5c4d533ae8b7c3a85b278e3594ec94 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 30 Nov 2023 11:19:56 +0100 Subject: dt-bindings: arm: qcom: document SM8650 and the reference boards Document the SM8650 SoC and based MTP (Mobile Test Platforms) and QRD (Qualcomm Reference Device) boards. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20231130-topic-sm8650-upstream-dt-v5-1-b25fb781da52@linaro.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index a4393a891f30..670e61cbb644 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -87,6 +87,7 @@ description: | sm8350 sm8450 sm8550 + sm8650 The 'board' element must be one of the following strings: @@ -1039,6 +1040,12 @@ properties: - qcom,sm8550-qrd - const: qcom,sm8550 + - items: + - enum: + - qcom,sm8650-mtp + - qcom,sm8650-qrd + - const: qcom,sm8650 + # Board compatibles go above qcom,msm-id: -- cgit v1.2.3 From 4dc7e7d2eead9abc10e2327d40ff6ca0d24cd83a Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Tue, 5 Dec 2023 11:39:59 +0530 Subject: dt-bindings: clock: qcom: Add X1E80100 GCC clocks Add device tree bindings for global clock controller on X1E80100 SoCs. Signed-off-by: Rajendra Nayak Co-developed-by: Sibi Sankar Signed-off-by: Sibi Sankar Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231205061002.30759-2-quic_sibis@quicinc.com Signed-off-by: Bjorn Andersson --- .../bindings/clock/qcom,x1e80100-gcc.yaml | 72 ++++++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml new file mode 100644 index 000000000000..14a796dbf8bc --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,x1e80100-gcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller on X1E80100 + +maintainers: + - Rajendra Nayak + +description: | + Qualcomm global clock control module provides the clocks, resets and power + domains on X1E80100 + + See also:: include/dt-bindings/clock/qcom,x1e80100-gcc.h + +properties: + compatible: + const: qcom,x1e80100-gcc + + clocks: + items: + - description: Board XO source + - description: Sleep clock source + - description: PCIe 3 pipe clock + - description: PCIe 4 pipe clock + - description: PCIe 5 pipe clock + - description: PCIe 6a pipe clock + - description: PCIe 6b pipe clock + - description: USB QMP Phy 0 clock source + - description: USB QMP Phy 1 clock source + - description: USB QMP Phy 2 clock source + + power-domains: + description: + A phandle and PM domain specifier for the CX power domain. + maxItems: 1 + +required: + - compatible + - clocks + - power-domains + +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + clock-controller@100000 { + compatible = "qcom,x1e80100-gcc"; + reg = <0x00100000 0x200000>; + clocks = <&bi_tcxo_div2>, + <&sleep_clk>, + <&pcie3_phy>, + <&pcie4_phy>, + <&pcie5_phy>, + <&pcie6a_phy>, + <&pcie6b_phy>, + <&usb_1_ss0_qmpphy 0>, + <&usb_1_ss1_qmpphy 1>, + <&usb_1_ss2_qmpphy 2>; + power-domains = <&rpmhpd RPMHPD_CX>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + +... -- cgit v1.2.3 From 4c413512ed2d06077e93127e81780c25113d4269 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Tue, 5 Dec 2023 11:40:01 +0530 Subject: dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for X1E80100 Add bindings and update documentation for clock rpmh driver on X1E80100 SoCs. Signed-off-by: Rajendra Nayak Co-developed-by: Sibi Sankar Signed-off-by: Sibi Sankar Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231205061002.30759-4-quic_sibis@quicinc.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml index 4eb5e59f6772..603da187d62e 100644 --- a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml @@ -35,6 +35,7 @@ properties: - qcom,sm8350-rpmh-clk - qcom,sm8450-rpmh-clk - qcom,sm8550-rpmh-clk + - qcom,x1e80100-rpmh-clk clocks: maxItems: 1 -- cgit v1.2.3 From bfea2924fc28b1b9985a208223f315992a68fc56 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Tue, 5 Dec 2023 11:53:59 +0530 Subject: dt-bindings: arm: cpus: Add qcom,oryon compatible Oryon is the custom ARM CPU core implementation used in Qualcomm's X1E80100 SoC, document it. Signed-off-by: Rajendra Nayak Co-developed-by: Sibi Sankar Signed-off-by: Sibi Sankar Link: https://lore.kernel.org/r/20231205062403.14848-2-quic_sibis@quicinc.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/cpus.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index ffd526363fda..cc5a21b47e26 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -198,6 +198,7 @@ properties: - qcom,kryo660 - qcom,kryo685 - qcom,kryo780 + - qcom,oryon - qcom,scorpion enable-method: -- cgit v1.2.3 From 7a85cecf98ca175d11b7133f7c4e88bbcc0fe5d3 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Tue, 5 Dec 2023 11:54:00 +0530 Subject: dt-bindings: arm: qcom: Document X1E80100 SoC and boards Document the X1E80100 SoC binding and also the boards using it. Also document the new board id qcp (Qualcomm Compute Platform). Signed-off-by: Rajendra Nayak Co-developed-by: Sibi Sankar Signed-off-by: Sibi Sankar Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231205062403.14848-3-quic_sibis@quicinc.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 670e61cbb644..c968412d86b8 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -88,6 +88,7 @@ description: | sm8450 sm8550 sm8650 + x1e80100 The 'board' element must be one of the following strings: @@ -97,6 +98,7 @@ description: | idp liquid mtp + qcp qrd rb2 ride @@ -1046,6 +1048,12 @@ properties: - qcom,sm8650-qrd - const: qcom,sm8650 + - items: + - enum: + - qcom,x1e80100-crd + - qcom,x1e80100-qcp + - const: qcom,x1e80100 + # Board compatibles go above qcom,msm-id: -- cgit v1.2.3 From e6fe33c66d69385a67b1b03f93641aa264fbb75a Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 22 Nov 2023 16:50:58 -0700 Subject: dt-bindings: hisilicon: Merge hi3620-clock into hisilicon,sysctrl binding The hi3620-clock binding is simple and always a child of the "hisilicon,sysctrl" node, so just add it into the hisilicon,sysctrl binding and drop the old txt binding. Signed-off-by: Rob Herring Reviewed-by: Krzysztof Kozlowski Signed-off-by: Wei Xu --- .../bindings/arm/hisilicon/controller/sysctrl.yaml | 17 +++++++++++++++++ .../devicetree/bindings/clock/hi3620-clock.txt | 20 -------------------- 2 files changed, 17 insertions(+), 20 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/hi3620-clock.txt (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml index 5a53d433b6f0..7a221e1c09df 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml @@ -82,6 +82,23 @@ properties: ranges: true +patternProperties: + '^clock@': + type: object + additionalProperties: false + + properties: + compatible: + enum: + - hisilicon,hi3620-clock + - hisilicon,hi3620-mmc-clock + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/clock/hi3620-clock.txt b/Documentation/devicetree/bindings/clock/hi3620-clock.txt deleted file mode 100644 index dad6269f52c5..000000000000 --- a/Documentation/devicetree/bindings/clock/hi3620-clock.txt +++ /dev/null @@ -1,20 +0,0 @@ -* Hisilicon Hi3620 Clock Controller - -The Hi3620 clock controller generates and supplies clock to various -controllers within the Hi3620 SoC. - -Required Properties: - -- compatible: should be one of the following. - - "hisilicon,hi3620-clock" - controller compatible with Hi3620 SoC. - - "hisilicon,hi3620-mmc-clock" - controller specific for Hi3620 mmc. - -- reg: physical base address of the controller and length of memory mapped - region. - -- #clock-cells: should be 1. - -Each clock is assigned an identifier and client nodes use this identifier -to specify the clock which they consume. - -All these identifier could be found in . -- cgit v1.2.3 From fdd78ff04ccc96f628c2f93e0d48ab0a74bf34ef Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Sat, 9 Dec 2023 23:30:47 +0000 Subject: dt-bindings: soc: samsung: exynos-pmu: Add gs101 compatible Add gs101-pmu compatible to the bindings documentation. Reviewed-by: Sam Protsenko Signed-off-by: Peter Griffin Link: https://lore.kernel.org/r/20231209233106.147416-2-peter.griffin@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml index 65f77442ff23..15fcd8f1d8bc 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml @@ -15,6 +15,7 @@ select: compatible: contains: enum: + - google,gs101-pmu - samsung,exynos3250-pmu - samsung,exynos4210-pmu - samsung,exynos4212-pmu @@ -35,6 +36,7 @@ properties: oneOf: - items: - enum: + - google,gs101-pmu - samsung,exynos3250-pmu - samsung,exynos4210-pmu - samsung,exynos4212-pmu -- cgit v1.2.3 From 0a910f1606384a5886a045e36b1fc80a7fa6706b Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Sat, 9 Dec 2023 23:30:48 +0000 Subject: dt-bindings: clock: Add Google gs101 clock management unit bindings Provide dt-schema documentation for Google gs101 SoC clock controller. Currently this adds support for cmu_top, cmu_misc and cmu_apm. Reviewed-by: Sam Protsenko Signed-off-by: Peter Griffin Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231209233106.147416-3-peter.griffin@linaro.org Signed-off-by: Krzysztof Kozlowski --- .../bindings/clock/google,gs101-clock.yaml | 106 +++++++++++++++++++++ 1 file changed, 106 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/google,gs101-clock.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml new file mode 100644 index 000000000000..3eebc03a309b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml @@ -0,0 +1,106 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/google,gs101-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Google GS101 SoC clock controller + +maintainers: + - Peter Griffin + +description: | + Google GS101 clock controller is comprised of several CMU units, generating + clocks for different domains. Those CMU units are modeled as separate device + tree nodes, and might depend on each other. The root clock in that clock tree + is OSCCLK (24.576 MHz). That external clock must be defined as a fixed-rate + clock in dts. + + CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and + dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP. + + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All clocks available for usage + in clock consumer nodes are defined as preprocessor macros in + 'dt-bindings/clock/gs101.h' header. + +properties: + compatible: + enum: + - google,gs101-cmu-top + - google,gs101-cmu-apm + - google,gs101-cmu-misc + + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + maxItems: 2 + + "#clock-cells": + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - "#clock-cells" + - clocks + - clock-names + - reg + +allOf: + - if: + properties: + compatible: + contains: + enum: + - google,gs101-cmu-top + - google,gs101-cmu-apm + then: + properties: + clocks: + items: + - description: External reference clock (24.576 MHz) + + clock-names: + items: + - const: oscclk + + - if: + properties: + compatible: + contains: + const: google,gs101-cmu-misc + + then: + properties: + clocks: + items: + - description: Misc bus clock (from CMU_TOP) + - description: Misc sss clock (from CMU_TOP) + + clock-names: + items: + - const: dout_cmu_misc_bus + - const: dout_cmu_misc_sss + +additionalProperties: false + +examples: + # Clock controller node for CMU_TOP + - | + #include + + cmu_top: clock-controller@1e080000 { + compatible = "google,gs101-cmu-top"; + reg = <0x1e080000 0x8000>; + #clock-cells = <1>; + clocks = <&ext_24_5m>; + clock-names = "oscclk"; + }; + +... -- cgit v1.2.3 From d9232785858eafde8553932f96fb7e25c2191ed2 Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Sat, 9 Dec 2023 23:30:49 +0000 Subject: dt-bindings: soc: google: exynos-sysreg: add dedicated SYSREG compatibles to GS101 GS101 has three different SYSREG controllers, add dedicated compatibles for them to the documentation. Reviewed-by: Sam Protsenko Signed-off-by: Peter Griffin Link: https://lore.kernel.org/r/20231209233106.147416-4-peter.griffin@linaro.org [krzysztof: move Google entries to existing enum] Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml index 2de4301a467d..925f787e1ea1 100644 --- a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml @@ -14,6 +14,9 @@ properties: oneOf: - items: - enum: + - google,gs101-apm-sysreg + - google,gs101-peric0-sysreg + - google,gs101-peric1-sysreg - samsung,exynos3-sysreg - samsung,exynos4-sysreg - samsung,exynos5-sysreg -- cgit v1.2.3 From e4f027756dff6a4e2abc640f276f91219559a3c9 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 10 Dec 2023 14:48:34 +0100 Subject: dt-bindings: samsung: exynos-sysreg: combine exynosautov920 with other enum No need to create a new enum every time we bring-up new SoC. Reviewed-by: Sam Protsenko Reviewed-by: Jaewon Kim Link: https://lore.kernel.org/r/20231210134834.43943-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml index 925f787e1ea1..1794e3799f21 100644 --- a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml @@ -20,6 +20,8 @@ properties: - samsung,exynos3-sysreg - samsung,exynos4-sysreg - samsung,exynos5-sysreg + - samsung,exynosautov920-peric0-sysreg + - samsung,exynosautov920-peric1-sysreg - tesla,fsd-cam-sysreg - tesla,fsd-fsys0-sysreg - tesla,fsd-fsys1-sysreg @@ -53,11 +55,6 @@ properties: - samsung,exynosautov9-peric1-sysreg - const: samsung,exynosautov9-sysreg - const: syscon - - items: - - enum: - - samsung,exynosautov920-peric0-sysreg - - samsung,exynosautov920-peric1-sysreg - - const: syscon reg: maxItems: 1 -- cgit v1.2.3 From 26bcd8a53098f8cb8f6101a52aa79fabac3bfd9b Mon Sep 17 00:00:00 2001 From: "yu-chang.lee" Date: Mon, 20 Nov 2023 18:02:58 +0800 Subject: dt-bindings: arm: mediatek: mmsys: Add VPPSYS compatible for MT8188 For MT8188, VPPSYS0 and VPPSYS1 are 2 display pipes with hardware differences in power domains, clocks and subsystem counts, which should be probed from mtk-mmsys driver to populate device by platform_device_register_data then start its own clock driver. Signed-off-by: yu-chang.lee Acked-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 2 ++ Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml | 2 -- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml index 536f5a5ebd24..50324248b965 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml @@ -32,6 +32,8 @@ properties: - mediatek,mt8183-mmsys - mediatek,mt8186-mmsys - mediatek,mt8188-vdosys0 + - mediatek,mt8188-vppsys0 + - mediatek,mt8188-vppsys1 - mediatek,mt8192-mmsys - mediatek,mt8195-vdosys1 - mediatek,mt8195-vppsys0 diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml index d7214d97b2ba..860570320545 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml @@ -43,8 +43,6 @@ properties: - mediatek,mt8188-vdecsys - mediatek,mt8188-vdecsys-soc - mediatek,mt8188-vencsys - - mediatek,mt8188-vppsys0 - - mediatek,mt8188-vppsys1 - mediatek,mt8188-wpesys - mediatek,mt8188-wpesys-vpp0 -- cgit v1.2.3 From a37edd208ab38ab9234de62499f8d8e4daf6dcbd Mon Sep 17 00:00:00 2001 From: Mark Tseng Date: Thu, 16 Nov 2023 19:04:47 +0800 Subject: dt-bindings: soc: mediatek: add mt8186 and mt8195 svs dt-bindings Support more SoC svs compatible in dt-bindings. 1. MT8186 2. MT8195 Signed-off-by: Mark Tseng Acked-by: Conor Dooley Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml index 7eda63d5682f..742b91d1d28e 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml @@ -22,8 +22,10 @@ properties: compatible: enum: - mediatek,mt8183-svs + - mediatek,mt8186-svs - mediatek,mt8188-svs - mediatek,mt8192-svs + - mediatek,mt8195-svs reg: maxItems: 1 -- cgit v1.2.3 From fddb94ff7a5765368131aaf5c8b2dfb28f8e84b1 Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Thu, 26 Oct 2023 12:09:11 -0700 Subject: dt-bindings: arm64: mediatek: Add mt8183-kukui-katsu Add katsu sku32 and sku38 which uses different audio codec. Signed-off-by: Hsin-Yi Wang Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/arm/mediatek.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index a5999b3afc35..4fe58cfe6f1b 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -235,6 +235,13 @@ properties: items: - const: google,kappa - const: mediatek,mt8183 + - description: Google Katsu (ASUS Chromebook Detachable CZ1) + items: + - enum: + - google,katsu-sku32 + - google,katsu-sku38 + - const: google,katsu + - const: mediatek,mt8183 - description: Google Kodama (Lenovo 10e Chromebook Tablet) items: - enum: -- cgit v1.2.3 From d056270bdb70beae8aa70e71a06ffddbf5cf0d47 Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Thu, 26 Oct 2023 12:09:13 -0700 Subject: dt-bindings: arm64: mediatek: Add mt8183-kukui-jacuzzi-makomo Add makomo sku0 and sku1 which uses different audio codec. Signed-off-by: Hsin-Yi Wang Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/arm/mediatek.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 4fe58cfe6f1b..c937f49ba3b4 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -251,6 +251,13 @@ properties: - google,kodama-sku32 - const: google,kodama - const: mediatek,mt8183 + - description: Google Makomo (Lenovo 100e Chromebook 2nd Gen MTK 2) + items: + - enum: + - google,makomo-sku0 + - google,makomo-sku1 + - const: google,makomo + - const: mediatek,mt8183 - description: Google Willow (Acer Chromebook 311 C722/C722T) items: - enum: -- cgit v1.2.3 From c0860b688af7d5660d6ea0f7480cb1fc0f032ecb Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Thu, 26 Oct 2023 12:09:15 -0700 Subject: dt-bindings: arm64: mediatek: Add mt8183-kukui-jacuzzi-pico Add pico (sku1) and pico6 (sku2). Signed-off-by: Hsin-Yi Wang Acked-by: Conor Dooley Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/arm/mediatek.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index c937f49ba3b4..f133d9673803 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -258,6 +258,13 @@ properties: - google,makomo-sku1 - const: google,makomo - const: mediatek,mt8183 + - description: Google Pico (Acer Chromebook Spin 311) + items: + - enum: + - google,pico-sku1 + - google,pico-sku2 + - const: google,pico + - const: mediatek,mt8183 - description: Google Willow (Acer Chromebook 311 C722/C722T) items: - enum: -- cgit v1.2.3 From 10bbf22de75a43e63d10e2763e74e930e797a621 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Fri, 17 Nov 2023 06:22:14 +0100 Subject: dt-bindings: thermal: convert Mediatek Thermal to the json-schema MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This helps validating DTS files. Introduced changes: 1. Improved title 2. Simplified description (dropped "This describes the device tree...") 3. Dropped undocumented "reset-names" from example Signed-off-by: Rafał Miłecki Reviewed-by: Rob Herring Signed-off-by: AngeloGioacchino Del Regno --- .../bindings/thermal/mediatek,thermal.yaml | 99 ++++++++++++++++++++++ .../bindings/thermal/mediatek-thermal.txt | 52 ------------ 2 files changed, 99 insertions(+), 52 deletions(-) create mode 100644 Documentation/devicetree/bindings/thermal/mediatek,thermal.yaml delete mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/thermal/mediatek,thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,thermal.yaml new file mode 100644 index 000000000000..d96a2e32bd8f --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/mediatek,thermal.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/mediatek,thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek thermal controller for on-SoC temperatures + +maintainers: + - Sascha Hauer + +description: + This device does not have its own ADC, instead it directly controls the AUXADC + via AHB bus accesses. For this reason it needs phandles to the AUXADC. Also it + controls a mux in the apmixedsys register space via AHB bus accesses, so a + phandle to the APMIXEDSYS is also needed. + +allOf: + - $ref: thermal-sensor.yaml# + +properties: + compatible: + enum: + - mediatek,mt2701-thermal + - mediatek,mt2712-thermal + - mediatek,mt7622-thermal + - mediatek,mt7981-thermal + - mediatek,mt7986-thermal + - mediatek,mt8173-thermal + - mediatek,mt8183-thermal + - mediatek,mt8365-thermal + - mediatek,mt8516-thermal + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Main clock needed for register access + - description: The AUXADC clock + + clock-names: + items: + - const: therm + - const: auxadc + + mediatek,auxadc: + $ref: /schemas/types.yaml#/definitions/phandle + description: A phandle to the AUXADC which the thermal controller uses + + mediatek,apmixedsys: + $ref: /schemas/types.yaml#/definitions/phandle + description: A phandle to the APMIXEDSYS controller + + resets: + description: Reset controller controlling the thermal controller + + nvmem-cells: + items: + - description: + NVMEM cell with EEPROMA phandle to the calibration data provided by an + NVMEM device. If unspecified default values shall be used. + + nvmem-cell-names: + items: + - const: calibration-data + +required: + - reg + - interrupts + - clocks + - clock-names + - mediatek,auxadc + - mediatek,apmixedsys + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + thermal@1100b000 { + compatible = "mediatek,mt8173-thermal"; + reg = <0x1100b000 0x1000>; + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>; + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>; + clock-names = "therm", "auxadc"; + resets = <&pericfg MT8173_PERI_THERM_SW_RST>; + mediatek,auxadc = <&auxadc>; + mediatek,apmixedsys = <&apmixedsys>; + nvmem-cells = <&thermal_calibration_data>; + nvmem-cell-names = "calibration-data"; + #thermal-sensor-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt deleted file mode 100644 index ac39c7156fde..000000000000 --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt +++ /dev/null @@ -1,52 +0,0 @@ -* Mediatek Thermal - -This describes the device tree binding for the Mediatek thermal controller -which measures the on-SoC temperatures. This device does not have its own ADC, -instead it directly controls the AUXADC via AHB bus accesses. For this reason -this device needs phandles to the AUXADC. Also it controls a mux in the -apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS -is also needed. - -Required properties: -- compatible: - - "mediatek,mt8173-thermal" : For MT8173 family of SoCs - - "mediatek,mt2701-thermal" : For MT2701 family of SoCs - - "mediatek,mt2712-thermal" : For MT2712 family of SoCs - - "mediatek,mt7622-thermal" : For MT7622 SoC - - "mediatek,mt7981-thermal", "mediatek,mt7986-thermal" : For MT7981 SoC - - "mediatek,mt7986-thermal" : For MT7986 SoC - - "mediatek,mt8183-thermal" : For MT8183 family of SoCs - - "mediatek,mt8365-thermal" : For MT8365 family of SoCs - - "mediatek,mt8516-thermal", "mediatek,mt2701-thermal : For MT8516 family of SoCs -- reg: Address range of the thermal controller -- interrupts: IRQ for the thermal controller -- clocks, clock-names: Clocks needed for the thermal controller. required - clocks are: - "therm": Main clock needed for register access - "auxadc": The AUXADC clock -- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses -- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller. -- #thermal-sensor-cells : Should be 0. See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for a description. - -Optional properties: -- resets: Reference to the reset controller controlling the thermal controller. -- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If - unspecified default values shall be used. -- nvmem-cell-names: Should be "calibration-data" - -Example: - - thermal: thermal@1100b000 { - #thermal-sensor-cells = <1>; - compatible = "mediatek,mt8173-thermal"; - reg = <0 0x1100b000 0 0x1000>; - interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>; - clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>; - clock-names = "therm", "auxadc"; - resets = <&pericfg MT8173_PERI_THERM_SW_RST>; - reset-names = "therm"; - mediatek,auxadc = <&auxadc>; - mediatek,apmixedsys = <&apmixedsys>; - nvmem-cells = <&thermal_calibration_data>; - nvmem-cell-names = "calibration-data"; - }; -- cgit v1.2.3 From 2381de61fef91900341c4a5cbab7d562353d194a Mon Sep 17 00:00:00 2001 From: Hsiao Chien Sung Date: Tue, 24 Oct 2023 21:00:26 +0800 Subject: dt-bindings: display: mediatek: ethdr: Add compatible for MT8188 Add compatible name for MediaTek MT8188 ETHDR. Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski Reviewed-by: CK Hu Signed-off-by: Hsiao Chien Sung Signed-off-by: AngeloGioacchino Del Regno --- .../devicetree/bindings/display/mediatek/mediatek,ethdr.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml index 801fa66ae615..677882348ede 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml @@ -23,7 +23,11 @@ description: properties: compatible: - const: mediatek,mt8195-disp-ethdr + oneOf: + - const: mediatek,mt8195-disp-ethdr + - items: + - const: mediatek,mt8188-disp-ethdr + - const: mediatek,mt8195-disp-ethdr reg: maxItems: 7 -- cgit v1.2.3 From ba0a6faceee073f752cca4fcc2e206f33c1e16a8 Mon Sep 17 00:00:00 2001 From: Hsiao Chien Sung Date: Tue, 24 Oct 2023 21:00:27 +0800 Subject: dt-bindings: display: mediatek: mdp-rdma: Add compatible for MT8188 Add compatible name for MediaTek MT8188 MDP-RDMA. Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski Reviewed-by: CK Hu Signed-off-by: Hsiao Chien Sung Signed-off-by: AngeloGioacchino Del Regno --- .../devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml index dd12e2ff685c..7570a0684967 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml @@ -21,7 +21,11 @@ description: properties: compatible: - const: mediatek,mt8195-vdo1-rdma + oneOf: + - const: mediatek,mt8195-vdo1-rdma + - items: + - const: mediatek,mt8188-vdo1-rdma + - const: mediatek,mt8195-vdo1-rdma reg: maxItems: 1 -- cgit v1.2.3 From c2501ad27a59cf1756a9a838782df52bca45b7b3 Mon Sep 17 00:00:00 2001 From: Hsiao Chien Sung Date: Tue, 24 Oct 2023 21:00:28 +0800 Subject: dt-bindings: display: mediatek: merge: Add compatible for MT8188 Add compatible name for MediaTek MT8188 MERGE. Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski Reviewed-by: CK Hu Signed-off-by: Hsiao Chien Sung Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml index eead5cb8636e..5c678695162e 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml @@ -27,6 +27,9 @@ properties: - items: - const: mediatek,mt6795-disp-merge - const: mediatek,mt8173-disp-merge + - items: + - const: mediatek,mt8188-disp-merge + - const: mediatek,mt8195-disp-merge reg: maxItems: 1 -- cgit v1.2.3 From 64e5d3ada25433c04c496e035677ddd165a63c9a Mon Sep 17 00:00:00 2001 From: Hsiao Chien Sung Date: Tue, 24 Oct 2023 21:00:29 +0800 Subject: dt-bindings: display: mediatek: padding: Add MT8188 Padding is a new hardware module on MediaTek MT8188, add dt-bindings for it. Reviewed-by: Krzysztof Kozlowski Reviewed-by: CK Hu Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Hsiao Chien Sung Signed-off-by: AngeloGioacchino Del Regno --- .../display/mediatek/mediatek,padding.yaml | 81 ++++++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml new file mode 100644 index 000000000000..6bad7dc2d69f --- /dev/null +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/mediatek/mediatek,padding.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Display Padding + +maintainers: + - Chun-Kuang Hu + - Philipp Zabel + +description: + Padding provides ability to add pixels to width and height of a layer with + specified colors. Due to hardware design, Mixer in VDOSYS1 requires + width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled, + we need Padding to deal with odd width. + Please notice that even if the Padding is in bypass mode, settings in + register must be cleared to 0, or undefined behaviors could happen. + +properties: + compatible: + const: mediatek,mt8188-disp-padding + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + items: + - description: Padding's clocks + + mediatek,gce-client-reg: + description: + GCE (Global Command Engine) is a multi-core micro processor that helps + its clients to execute commands without interrupting CPU. This property + describes GCE client's information that is composed by 4 fields. + 1. Phandle of the GCE (there may be several GCE processors) + 2. Sub-system ID defined in the dt-binding like a user ID + (Please refer to include/dt-bindings/gce/-gce.h) + 3. Offset from base address of the subsys you are at + 4. Size of the register the client needs + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: Phandle of the GCE + - description: Subsys ID defined in the dt-binding + - description: Offset from base address of the subsys + - description: Size of register + maxItems: 1 + +required: + - compatible + - reg + - power-domains + - clocks + - mediatek,gce-client-reg + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + padding0: padding@1c11d000 { + compatible = "mediatek,mt8188-disp-padding"; + reg = <0 0x1c11d000 0 0x1000>; + clocks = <&vdosys1 CLK_VDO1_PADDING0>; + power-domains = <&spm MT8188_POWER_DOMAIN_VDOSYS1>; + mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0xd000 0x1000>; + }; + }; -- cgit v1.2.3 From 41b3a96c4a0365ec5e2b308268f3509999dcfac4 Mon Sep 17 00:00:00 2001 From: Hsiao Chien Sung Date: Tue, 24 Oct 2023 21:00:30 +0800 Subject: dt-bindings: arm: mediatek: Add compatible for MT8188 Add compatible name for MediaTek MT8188 VDOSYS1. Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski Signed-off-by: Hsiao Chien Sung Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml index 50324248b965..b3c6888c1457 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml @@ -32,6 +32,7 @@ properties: - mediatek,mt8183-mmsys - mediatek,mt8186-mmsys - mediatek,mt8188-vdosys0 + - mediatek,mt8188-vdosys1 - mediatek,mt8188-vppsys0 - mediatek,mt8188-vppsys1 - mediatek,mt8192-mmsys -- cgit v1.2.3 From a17cf4c6de2defcd4a2205671a8ed8ff5a6500dd Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 5 Oct 2023 12:49:04 +0200 Subject: media: dt-bindings: mediatek: Add phandle to mediatek,scp on MDP3 RDMA The MDP3 RDMA needs to communicate with the SCP remote processor: allow specifying a phandle to a SCP core. Reviewed-by: Conor Dooley Reviewed-by: Alexandre Mergnat Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml index 7032c7e15039..59dcea797b71 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml @@ -45,6 +45,14 @@ properties: include/dt-bindings/gce/-gce.h of each chips. $ref: /schemas/types.yaml#/definitions/uint32-array + mediatek,scp: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the System Control Processor (SCP) used for initializing + and stopping the MDP3, for sending frame data locations to the MDP3's + VPU and to install Inter-Processor Interrupt handlers to control + processing states. + power-domains: maxItems: 1 -- cgit v1.2.3 From f5f185bf7c42f6ca885202fefc40fc871d08a722 Mon Sep 17 00:00:00 2001 From: Moudy Ho Date: Tue, 31 Oct 2023 16:33:42 +0800 Subject: dt-bindings: media: mediatek: mdp3: correct RDMA and WROT node with generic names The DMA-related nodes RDMA/WROT in MDP3 should be changed to generic names. In addition, fix improper space indent in example. Fixes: 4ad7b39623ab ("media: dt-binding: mediatek: add bindings for MediaTek MDP3 components") Signed-off-by: Moudy Ho Acked-by: Rob Herring Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: AngeloGioacchino Del Regno --- .../bindings/media/mediatek,mdp3-rdma.yaml | 29 +++++++++++++--------- .../bindings/media/mediatek,mdp3-wrot.yaml | 23 ++++++++++------- 2 files changed, 31 insertions(+), 21 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml index 59dcea797b71..e1ffe7eb2cdf 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml @@ -69,6 +69,9 @@ properties: - description: used for 1st data pipe from RDMA - description: used for 2nd data pipe from RDMA + '#dma-cells': + const: 1 + required: - compatible - reg @@ -78,6 +81,7 @@ required: - clocks - iommus - mboxes + - '#dma-cells' additionalProperties: false @@ -88,16 +92,17 @@ examples: #include #include - mdp3_rdma0: mdp3-rdma0@14001000 { - compatible = "mediatek,mt8183-mdp3-rdma"; - reg = <0x14001000 0x1000>; - mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>; - mediatek,gce-events = , - ; - power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; - clocks = <&mmsys CLK_MM_MDP_RDMA0>, - <&mmsys CLK_MM_MDP_RSZ1>; - iommus = <&iommu>; - mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST>, - <&gce 21 CMDQ_THR_PRIO_LOWEST>; + dma-controller@14001000 { + compatible = "mediatek,mt8183-mdp3-rdma"; + reg = <0x14001000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>; + mediatek,gce-events = , + ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_MDP_RDMA0>, + <&mmsys CLK_MM_MDP_RSZ1>; + iommus = <&iommu>; + mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST>, + <&gce 21 CMDQ_THR_PRIO_LOWEST>; + #dma-cells = <1>; }; diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml index 0baa77198fa2..64ea98aa0592 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml @@ -50,6 +50,9 @@ properties: iommus: maxItems: 1 + '#dma-cells': + const: 1 + required: - compatible - reg @@ -58,6 +61,7 @@ required: - power-domains - clocks - iommus + - '#dma-cells' additionalProperties: false @@ -68,13 +72,14 @@ examples: #include #include - mdp3_wrot0: mdp3-wrot0@14005000 { - compatible = "mediatek,mt8183-mdp3-wrot"; - reg = <0x14005000 0x1000>; - mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>; - mediatek,gce-events = , - ; - power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; - clocks = <&mmsys CLK_MM_MDP_WROT0>; - iommus = <&iommu>; + dma-controller@14005000 { + compatible = "mediatek,mt8183-mdp3-wrot"; + reg = <0x14005000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>; + mediatek,gce-events = , + ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_MDP_WROT0>; + iommus = <&iommu>; + #dma-cells = <1>; }; -- cgit v1.2.3 From 3bae0d638a37122e7f372376d9572dfc5620afa2 Mon Sep 17 00:00:00 2001 From: Moudy Ho Date: Tue, 31 Oct 2023 16:33:43 +0800 Subject: dt-bindings: media: mediatek: mdp3: merge the indentical RDMA under display To simplify maintenance and avoid branches, the identical component should be merged and placed in the path belonging to the MDP (from display/* to media/*). In addition, currently only MDP utilizes RDMA through CMDQ, and the necessary properties for "mediatek,gce-events", and "mboxes" have been set up for this purpose. Within DISP, it directly receives component interrupt signals. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring Signed-off-by: AngeloGioacchino Del Regno --- .../display/mediatek/mediatek,mdp-rdma.yaml | 92 ---------------------- .../bindings/media/mediatek,mdp3-rdma.yaml | 46 ++++++++++- 2 files changed, 42 insertions(+), 96 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml deleted file mode 100644 index 7570a0684967..000000000000 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml +++ /dev/null @@ -1,92 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: MediaTek MDP RDMA - -maintainers: - - Chun-Kuang Hu - - Philipp Zabel - -description: - The MediaTek MDP RDMA stands for Read Direct Memory Access. - It provides real time data to the back-end panel driver, such as DSI, - DPI and DP_INTF. - It contains one line buffer to store the sufficient pixel data. - RDMA device node must be siblings to the central MMSYS_CONFIG node. - For a description of the MMSYS_CONFIG binding, see - Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml for details. - -properties: - compatible: - oneOf: - - const: mediatek,mt8195-vdo1-rdma - - items: - - const: mediatek,mt8188-vdo1-rdma - - const: mediatek,mt8195-vdo1-rdma - - reg: - maxItems: 1 - - interrupts: - maxItems: 1 - - power-domains: - maxItems: 1 - - clocks: - items: - - description: RDMA Clock - - iommus: - maxItems: 1 - - mediatek,gce-client-reg: - description: - The register of display function block to be set by gce. There are 4 arguments, - such as gce node, subsys id, offset and register size. The subsys id that is - mapping to the register of display function blocks is defined in the gce header - include/dt-bindings/gce/-gce.h of each chips. - $ref: /schemas/types.yaml#/definitions/phandle-array - items: - items: - - description: phandle of GCE - - description: GCE subsys id - - description: register offset - - description: register size - maxItems: 1 - -required: - - compatible - - reg - - power-domains - - clocks - - iommus - - mediatek,gce-client-reg - -additionalProperties: false - -examples: - - | - #include - #include - #include - #include - #include - - soc { - #address-cells = <2>; - #size-cells = <2>; - - rdma@1c104000 { - compatible = "mediatek,mt8195-vdo1-rdma"; - reg = <0 0x1c104000 0 0x1000>; - interrupts = ; - clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>; - power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; - iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>; - mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>; - }; - }; diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml index e1ffe7eb2cdf..b178b74829b4 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml @@ -20,8 +20,13 @@ description: | properties: compatible: - items: - - const: mediatek,mt8183-mdp3-rdma + oneOf: + - enum: + - mediatek,mt8183-mdp3-rdma + - mediatek,mt8195-vdo1-rdma + - items: + - const: mediatek,mt8188-vdo1-rdma + - const: mediatek,mt8195-vdo1-rdma reg: maxItems: 1 @@ -60,6 +65,7 @@ properties: items: - description: RDMA clock - description: RSZ clock + minItems: 1 iommus: maxItems: 1 @@ -68,6 +74,10 @@ properties: items: - description: used for 1st data pipe from RDMA - description: used for 2nd data pipe from RDMA + minItems: 1 + + interrupts: + maxItems: 1 '#dma-cells': const: 1 @@ -76,13 +86,41 @@ required: - compatible - reg - mediatek,gce-client-reg - - mediatek,gce-events - power-domains - clocks - iommus - - mboxes - '#dma-cells' +allOf: + - if: + properties: + compatible: + contains: + const: mediatek,mt8183-mdp3-rdma + + then: + properties: + clocks: + minItems: 2 + + mboxes: + minItems: 2 + + required: + - mboxes + - mediatek,gce-events + + - if: + properties: + compatible: + contains: + const: mediatek,mt8195-vdo1-rdma + + then: + properties: + clocks: + maxItems: 1 + additionalProperties: false examples: -- cgit v1.2.3 From f0c9cafda864fd66d3a3f63e5371bcc8d98f9b8e Mon Sep 17 00:00:00 2001 From: Moudy Ho Date: Tue, 31 Oct 2023 16:33:44 +0800 Subject: dt-bindings: media: mediatek: mdp3: add config for MT8195 RDMA Added the configuration for MT8195 RDMA. In comparison to MT8183, it no longer shares SRAM with RSZ, and there are now preconfigured 5 mbox. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring Signed-off-by: AngeloGioacchino Del Regno --- .../bindings/media/mediatek,mdp3-rdma.yaml | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml index b178b74829b4..59db8306485b 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml @@ -23,6 +23,7 @@ properties: oneOf: - enum: - mediatek,mt8183-mdp3-rdma + - mediatek,mt8195-mdp3-rdma - mediatek,mt8195-vdo1-rdma - items: - const: mediatek,mt8188-vdo1-rdma @@ -74,6 +75,9 @@ properties: items: - description: used for 1st data pipe from RDMA - description: used for 2nd data pipe from RDMA + - description: used for 3rd data pipe from RDMA + - description: used for 4th data pipe from RDMA + - description: used for the data pipe from SPLIT minItems: 1 interrupts: @@ -110,6 +114,23 @@ allOf: - mboxes - mediatek,gce-events + - if: + properties: + compatible: + contains: + const: mediatek,mt8195-mdp3-rdma + + then: + properties: + clocks: + maxItems: 1 + + mboxes: + minItems: 5 + + required: + - mediatek,gce-events + - if: properties: compatible: -- cgit v1.2.3 From ba61ee5bf4849abedbdf6161ca232aa6c248fc19 Mon Sep 17 00:00:00 2001 From: Moudy Ho Date: Tue, 31 Oct 2023 16:33:45 +0800 Subject: dt-bindings: media: mediatek: mdp3: add compatible for MT8195 RSZ MT8195 RSZ inherited from MT8183, add the corresponding compatible name to it. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml index 78f9de6192ef..f5676bec4326 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml @@ -15,9 +15,13 @@ description: | properties: compatible: - items: + oneOf: - enum: - mediatek,mt8183-mdp3-rsz + - items: + - enum: + - mediatek,mt8195-mdp3-rsz + - const: mediatek,mt8183-mdp3-rsz reg: maxItems: 1 -- cgit v1.2.3 From 032388dd6d17670cf4dec933543b0937011dc07f Mon Sep 17 00:00:00 2001 From: Moudy Ho Date: Tue, 31 Oct 2023 16:33:46 +0800 Subject: dt-bindings: media: mediatek: mdp3: add compatible for MT8195 WROT MT8195 WROT inherited from MT8183, add the corresponding compatible name to it. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml index 64ea98aa0592..53a679338402 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml @@ -15,9 +15,13 @@ description: | properties: compatible: - items: + oneOf: - enum: - mediatek,mt8183-mdp3-wrot + - items: + - enum: + - mediatek,mt8195-mdp3-wrot + - const: mediatek,mt8183-mdp3-wrot reg: maxItems: 1 -- cgit v1.2.3 From 936996afa440426c27473a6c2da4d5adcaa6b7dd Mon Sep 17 00:00:00 2001 From: Moudy Ho Date: Tue, 31 Oct 2023 16:33:47 +0800 Subject: dt-bindings: media: mediatek: mdp3: add component FG for MT8195 Add the fundamental hardware configuration of component FG, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski Signed-off-by: AngeloGioacchino Del Regno --- .../bindings/media/mediatek,mdp3-fg.yaml | 61 ++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml new file mode 100644 index 000000000000..03f31b009085 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-fg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 Film Grain + +maintainers: + - Matthias Brugger + - Moudy Ho + +description: + Film Grain (FG) is a Media Data Path 3 (MDP3) component used to add + the film grain according to the AOMedia Video 1 (AV1) standard. + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-fg + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + display@14002000 { + compatible = "mediatek,mt8195-mdp3-fg"; + reg = <0x14002000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x2000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_MDP_FG>; + }; -- cgit v1.2.3 From 8109d8ecb5b94ed1ed4c37070aa0e59405e55922 Mon Sep 17 00:00:00 2001 From: Moudy Ho Date: Tue, 31 Oct 2023 16:33:48 +0800 Subject: dt-bindings: media: mediatek: mdp3: add component HDR for MT8195 Add the fundamental hardware configuration of component HDR, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski Signed-off-by: AngeloGioacchino Del Regno --- .../bindings/media/mediatek,mdp3-hdr.yaml | 61 ++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml new file mode 100644 index 000000000000..d4609bba6578 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-hdr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 HDR + +maintainers: + - Matthias Brugger + - Moudy Ho + +description: + A Media Data Path 3 (MDP3) component used to perform conversion from + High Dynamic Range (HDR) to Standard Dynamic Range (SDR). + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-hdr + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + display@14004000 { + compatible = "mediatek,mt8195-mdp3-hdr"; + reg = <0x14004000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x4000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_MDP_HDR>; + }; -- cgit v1.2.3 From e078d0c0246ea5924a43bd50c4268c84d79df89a Mon Sep 17 00:00:00 2001 From: Moudy Ho Date: Tue, 31 Oct 2023 16:33:49 +0800 Subject: dt-bindings: media: mediatek: mdp3: add component STITCH for MT8195 Add the fundamental hardware configuration of component STITCH, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho Reviewed-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: AngeloGioacchino Del Regno --- .../bindings/media/mediatek,mdp3-stitch.yaml | 61 ++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml new file mode 100644 index 000000000000..d815bea29154 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-stitch.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 STITCH + +maintainers: + - Matthias Brugger + - Moudy Ho + +description: + One of Media Data Path 3 (MDP3) components used to combine multiple video frame + with overlapping fields of view to produce a segmented panorame. + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-stitch + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + display@14003000 { + compatible = "mediatek,mt8195-mdp3-stitch"; + reg = <0x14003000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x3000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_STITCH>; + }; -- cgit v1.2.3 From 6af46f2c33766f74e8562a48bf03960a7529f532 Mon Sep 17 00:00:00 2001 From: Moudy Ho Date: Tue, 31 Oct 2023 16:33:50 +0800 Subject: dt-bindings: media: mediatek: mdp3: add component TCC for MT8195 Add the fundamental hardware configuration of component TCC, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski Signed-off-by: AngeloGioacchino Del Regno --- .../bindings/media/mediatek,mdp3-tcc.yaml | 62 ++++++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml new file mode 100644 index 000000000000..14ea556d4f82 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-tcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 Tone Curve Conversion + +maintainers: + - Matthias Brugger + +description: + Tone Curve Conversion (TCC) is one of Media Profile Path 3 (MDP3) components. + It is used to handle the tone mapping of various gamma curves in order to + achieve HDR10 effects. This helps adapt the content to the color and + brightness range that standard display devices typically support. + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-tcc + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + display@1400b000 { + compatible = "mediatek,mt8195-mdp3-tcc"; + reg = <0x1400b000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xb000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_MDP_TCC>; + }; -- cgit v1.2.3 From 8bf482aff22bdeee0b531bb133a8bd7abe6ee8fd Mon Sep 17 00:00:00 2001 From: Moudy Ho Date: Tue, 31 Oct 2023 16:33:51 +0800 Subject: dt-bindings: media: mediatek: mdp3: add component TDSHP for MT8195 Add the fundamental hardware configuration of component TDSHP, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho Reviewed-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: AngeloGioacchino Del Regno --- .../bindings/media/mediatek,mdp3-tdshp.yaml | 61 ++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml new file mode 100644 index 000000000000..8ab7f2d8e148 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-tdshp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 Two-Dimensional Sharpness + +maintainers: + - Matthias Brugger + - Moudy Ho + +description: + Two-Dimensional Sharpness (TDSHP) is a Media Profile Path 3 (MDP3) component + used to perform image edge sharpening and enhance vividness and contrast. + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-tdshp + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + display@14007000 { + compatible = "mediatek,mt8195-mdp3-tdshp"; + reg = <0x14007000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x7000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_MDP_TDSHP>; + }; -- cgit v1.2.3 From dacfb5dd8ffe3e35c7bdee670a82c000bf7c66fd Mon Sep 17 00:00:00 2001 From: Moudy Ho Date: Tue, 31 Oct 2023 16:33:52 +0800 Subject: dt-bindings: display: mediatek: aal: add compatible for MT8195 Add a compatible string for the AAL block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by: Moudy Ho Acked-by: Conor Dooley Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml index 7fd42c8fdc32..b4c28e96dd55 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml @@ -24,6 +24,7 @@ properties: - enum: - mediatek,mt8173-disp-aal - mediatek,mt8183-disp-aal + - mediatek,mt8195-mdp3-aal - items: - enum: - mediatek,mt2712-disp-aal -- cgit v1.2.3 From 3e54624f946b4a7e0948f0953c776b287a36f208 Mon Sep 17 00:00:00 2001 From: Moudy Ho Date: Tue, 31 Oct 2023 16:33:53 +0800 Subject: dt-bindings: display: mediatek: color: add compatible for MT8195 Add a compatible string for the COLOR block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml index f21e44092043..b886ca0d89ea 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml @@ -26,6 +26,7 @@ properties: - mediatek,mt2701-disp-color - mediatek,mt8167-disp-color - mediatek,mt8173-disp-color + - mediatek,mt8195-mdp3-color - items: - enum: - mediatek,mt7623-disp-color -- cgit v1.2.3 From 4ae88e9c53a48eaf21209d400c7374374934bf83 Mon Sep 17 00:00:00 2001 From: Moudy Ho Date: Tue, 31 Oct 2023 16:33:54 +0800 Subject: dt-bindings: display: mediatek: merge: add compatible for MT8195 Add a compatible string for the MERGE block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml index 5c678695162e..dae839279950 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml @@ -24,6 +24,7 @@ properties: - enum: - mediatek,mt8173-disp-merge - mediatek,mt8195-disp-merge + - mediatek,mt8195-mdp3-merge - items: - const: mediatek,mt6795-disp-merge - const: mediatek,mt8173-disp-merge -- cgit v1.2.3 From fe49f432abf267a167cb4318093e97c92f21dae6 Mon Sep 17 00:00:00 2001 From: Moudy Ho Date: Tue, 31 Oct 2023 16:33:55 +0800 Subject: dt-bindings: display: mediatek: ovl: add compatible for MT8195 Add a compatible string for the OVL block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml index 3e1069b00b56..c471a181d125 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml @@ -26,6 +26,7 @@ properties: - mediatek,mt8173-disp-ovl - mediatek,mt8183-disp-ovl - mediatek,mt8192-disp-ovl + - mediatek,mt8195-mdp3-ovl - items: - enum: - mediatek,mt7623-disp-ovl -- cgit v1.2.3 From 739058a9c5c31181a3f5599c30690be82d252428 Mon Sep 17 00:00:00 2001 From: Moudy Ho Date: Tue, 31 Oct 2023 16:33:56 +0800 Subject: dt-bindings: display: mediatek: split: add compatible for MT8195 Add compatible string and GCE property for MT8195 SPLIT, of which is operated by MDP3. Signed-off-by: Moudy Ho Reviewed-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: AngeloGioacchino Del Regno --- .../bindings/display/mediatek/mediatek,split.yaml | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml index a8a5c9608598..e4affc854f3d 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml @@ -23,6 +23,7 @@ properties: oneOf: - enum: - mediatek,mt8173-disp-split + - mediatek,mt8195-mdp3-split - items: - const: mediatek,mt6795-disp-split - const: mediatek,mt8173-disp-split @@ -38,6 +39,21 @@ properties: the power controller specified by phandle. See Documentation/devicetree/bindings/power/power-domain.yaml for details. + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + clocks: items: - description: SPLIT Clock @@ -48,6 +64,17 @@ required: - power-domains - clocks +allOf: + - if: + properties: + compatible: + contains: + const: mediatek,mt8195-mdp3-split + + then: + required: + - mediatek,gce-client-reg + additionalProperties: false examples: -- cgit v1.2.3 From 6b7e0eb682af13cb603d8151ddbbfec064e96086 Mon Sep 17 00:00:00 2001 From: Moudy Ho Date: Tue, 31 Oct 2023 16:33:57 +0800 Subject: dt-bindings: display: mediatek: padding: add compatible for MT8195 Add a compatible string for the PADDING block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by: Moudy Ho Acked-by: Rob Herring Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: AngeloGioacchino Del Regno --- .../devicetree/bindings/display/mediatek/mediatek,padding.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml index 6bad7dc2d69f..be07bbdc54e3 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml @@ -20,7 +20,9 @@ description: properties: compatible: - const: mediatek,mt8188-disp-padding + enum: + - mediatek,mt8188-disp-padding + - mediatek,mt8195-mdp3-padding reg: maxItems: 1 -- cgit v1.2.3 From e97c618234d930469a080051c20d4261d27de34b Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Mon, 16 Oct 2023 23:39:15 +0300 Subject: dt-bindings: arm: mediatek: convert audsys and mt2701-afe-pcm to yaml Convert the mediatek,audsys binding to YAML, together with the associated binding bindings/sound/mt2701-afe-pcm.yaml . Signed-off-by: Eugen Hristev Reviewed-by: Rob Herring Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: AngeloGioacchino Del Regno --- .../bindings/arm/mediatek/mediatek,audsys.txt | 39 ------ .../bindings/arm/mediatek/mediatek,audsys.yaml | 153 +++++++++++++++++++++ .../bindings/sound/mediatek,mt2701-audio.yaml | 116 ++++++++++++++++ .../devicetree/bindings/sound/mt2701-afe-pcm.txt | 146 -------------------- 4 files changed, 269 insertions(+), 185 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml create mode 100644 Documentation/devicetree/bindings/sound/mediatek,mt2701-audio.yaml delete mode 100644 Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt deleted file mode 100644 index 699776be1dd3..000000000000 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt +++ /dev/null @@ -1,39 +0,0 @@ -MediaTek AUDSYS controller -============================ - -The MediaTek AUDSYS controller provides various clocks to the system. - -Required Properties: - -- compatible: Should be one of: - - "mediatek,mt2701-audsys", "syscon" - - "mediatek,mt6765-audsys", "syscon" - - "mediatek,mt6779-audio", "syscon" - - "mediatek,mt7622-audsys", "syscon" - - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon" - - "mediatek,mt8167-audiosys", "syscon" - - "mediatek,mt8183-audiosys", "syscon" - - "mediatek,mt8192-audsys", "syscon" - - "mediatek,mt8516-audsys", "syscon" -- #clock-cells: Must be 1 - -The AUDSYS controller uses the common clk binding from -Documentation/devicetree/bindings/clock/clock-bindings.txt -The available clocks are defined in dt-bindings/clock/mt*-clk.h. - -Required sub-nodes: -------- -For common binding part and usage, refer to -../sonud/mt2701-afe-pcm.txt. - -Example: - - audsys: clock-controller@11220000 { - compatible = "mediatek,mt7622-audsys", "syscon"; - reg = <0 0x11220000 0 0x2000>; - #clock-cells = <1>; - - afe: audio-controller { - ... - }; - }; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml new file mode 100644 index 000000000000..45d4a6620041 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml @@ -0,0 +1,153 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,audsys.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek AUDSYS controller + +maintainers: + - Eugen Hristev + +description: + The MediaTek AUDSYS controller provides various clocks to the system. + +properties: + compatible: + oneOf: + - items: + - enum: + - mediatek,mt2701-audsys + - mediatek,mt6765-audsys + - mediatek,mt6779-audsys + - mediatek,mt7622-audsys + - mediatek,mt8167-audsys + - mediatek,mt8173-audsys + - mediatek,mt8183-audsys + - mediatek,mt8186-audsys + - mediatek,mt8192-audsys + - mediatek,mt8516-audsys + - const: syscon + - items: + # Special case for mt7623 for backward compatibility + - const: mediatek,mt7623-audsys + - const: mediatek,mt2701-audsys + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + audio-controller: + $ref: /schemas/sound/mediatek,mt2701-audio.yaml# + type: object + +required: + - compatible + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + soc { + #address-cells = <2>; + #size-cells = <2>; + audsys: clock-controller@11220000 { + compatible = "mediatek,mt7622-audsys", "syscon"; + reg = <0 0x11220000 0 0x2000>; + #clock-cells = <1>; + + afe: audio-controller { + compatible = "mediatek,mt2701-audio"; + interrupts = , + ; + interrupt-names = "afe", "asys"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; + + clocks = <&infracfg CLK_INFRA_AUDIO>, + <&topckgen CLK_TOP_AUD_MUX1_SEL>, + <&topckgen CLK_TOP_AUD_MUX2_SEL>, + <&topckgen CLK_TOP_AUD_48K_TIMING>, + <&topckgen CLK_TOP_AUD_44K_TIMING>, + <&topckgen CLK_TOP_AUD_K1_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K2_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K3_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K4_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K1_SRC_DIV>, + <&topckgen CLK_TOP_AUD_K2_SRC_DIV>, + <&topckgen CLK_TOP_AUD_K3_SRC_DIV>, + <&topckgen CLK_TOP_AUD_K4_SRC_DIV>, + <&topckgen CLK_TOP_AUD_I2S1_MCLK>, + <&topckgen CLK_TOP_AUD_I2S2_MCLK>, + <&topckgen CLK_TOP_AUD_I2S3_MCLK>, + <&topckgen CLK_TOP_AUD_I2S4_MCLK>, + <&audsys CLK_AUD_I2SO1>, + <&audsys CLK_AUD_I2SO2>, + <&audsys CLK_AUD_I2SO3>, + <&audsys CLK_AUD_I2SO4>, + <&audsys CLK_AUD_I2SIN1>, + <&audsys CLK_AUD_I2SIN2>, + <&audsys CLK_AUD_I2SIN3>, + <&audsys CLK_AUD_I2SIN4>, + <&audsys CLK_AUD_ASRCO1>, + <&audsys CLK_AUD_ASRCO2>, + <&audsys CLK_AUD_ASRCO3>, + <&audsys CLK_AUD_ASRCO4>, + <&audsys CLK_AUD_AFE>, + <&audsys CLK_AUD_AFE_CONN>, + <&audsys CLK_AUD_A1SYS>, + <&audsys CLK_AUD_A2SYS>, + <&audsys CLK_AUD_AFE_MRGIF>; + + clock-names = "infra_sys_audio_clk", + "top_audio_mux1_sel", + "top_audio_mux2_sel", + "top_audio_a1sys_hp", + "top_audio_a2sys_hp", + "i2s0_src_sel", + "i2s1_src_sel", + "i2s2_src_sel", + "i2s3_src_sel", + "i2s0_src_div", + "i2s1_src_div", + "i2s2_src_div", + "i2s3_src_div", + "i2s0_mclk_en", + "i2s1_mclk_en", + "i2s2_mclk_en", + "i2s3_mclk_en", + "i2so0_hop_ck", + "i2so1_hop_ck", + "i2so2_hop_ck", + "i2so3_hop_ck", + "i2si0_hop_ck", + "i2si1_hop_ck", + "i2si2_hop_ck", + "i2si3_hop_ck", + "asrc0_out_ck", + "asrc1_out_ck", + "asrc2_out_ck", + "asrc3_out_ck", + "audio_afe_pd", + "audio_afe_conn_pd", + "audio_a1sys_pd", + "audio_a2sys_pd", + "audio_mrgif_pd"; + + assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>, + <&topckgen CLK_TOP_AUD_MUX2_SEL>, + <&topckgen CLK_TOP_AUD_MUX1_DIV>, + <&topckgen CLK_TOP_AUD_MUX2_DIV>; + assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>, + <&topckgen CLK_TOP_AUD2PLL_90M>; + assigned-clock-rates = <0>, <0>, <49152000>, <45158400>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt2701-audio.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt2701-audio.yaml new file mode 100644 index 000000000000..45382c4d86aa --- /dev/null +++ b/Documentation/devicetree/bindings/sound/mediatek,mt2701-audio.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/mediatek,mt2701-audio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Audio Front End (AFE) PCM controller for mt2701 + +description: + The AFE PCM node must be a subnode of the MediaTek audsys device tree node. + +maintainers: + - Eugen Hristev + +properties: + compatible: + enum: + - mediatek,mt2701-audio + - mediatek,mt7622-audio + + interrupts: + items: + - description: AFE interrupt + - description: ASYS interrupt + + interrupt-names: + items: + - const: afe + - const: asys + + power-domains: + maxItems: 1 + + clocks: + items: + - description: audio infra sys clock + - description: top audio mux 1 + - description: top audio mux 2 + - description: top audio sys a1 clock + - description: top audio sys a2 clock + - description: i2s0 source selection + - description: i2s1 source selection + - description: i2s2 source selection + - description: i2s3 source selection + - description: i2s0 source divider + - description: i2s1 source divider + - description: i2s2 source divider + - description: i2s3 source divider + - description: i2s0 master clock + - description: i2s1 master clock + - description: i2s2 master clock + - description: i2s3 master clock + - description: i2so0 hopping clock + - description: i2so1 hopping clock + - description: i2so2 hopping clock + - description: i2so3 hopping clock + - description: i2si0 hopping clock + - description: i2si1 hopping clock + - description: i2si2 hopping clock + - description: i2si3 hopping clock + - description: asrc0 output clock + - description: asrc1 output clock + - description: asrc2 output clock + - description: asrc3 output clock + - description: audio front end pd clock + - description: audio front end conn pd clock + - description: top audio a1 sys pd + - description: top audio a2 sys pd + - description: audio merge interface pd + + clock-names: + items: + - const: infra_sys_audio_clk + - const: top_audio_mux1_sel + - const: top_audio_mux2_sel + - const: top_audio_a1sys_hp + - const: top_audio_a2sys_hp + - const: i2s0_src_sel + - const: i2s1_src_sel + - const: i2s2_src_sel + - const: i2s3_src_sel + - const: i2s0_src_div + - const: i2s1_src_div + - const: i2s2_src_div + - const: i2s3_src_div + - const: i2s0_mclk_en + - const: i2s1_mclk_en + - const: i2s2_mclk_en + - const: i2s3_mclk_en + - const: i2so0_hop_ck + - const: i2so1_hop_ck + - const: i2so2_hop_ck + - const: i2so3_hop_ck + - const: i2si0_hop_ck + - const: i2si1_hop_ck + - const: i2si2_hop_ck + - const: i2si3_hop_ck + - const: asrc0_out_ck + - const: asrc1_out_ck + - const: asrc2_out_ck + - const: asrc3_out_ck + - const: audio_afe_pd + - const: audio_afe_conn_pd + - const: audio_a1sys_pd + - const: audio_a2sys_pd + - const: audio_mrgif_pd + +required: + - compatible + - interrupts + - interrupt-names + - power-domains + - clocks + - clock-names + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt b/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt deleted file mode 100644 index f548e6a58240..000000000000 --- a/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt +++ /dev/null @@ -1,146 +0,0 @@ -Mediatek AFE PCM controller for mt2701 - -Required properties: -- compatible: should be one of the following. - - "mediatek,mt2701-audio" - - "mediatek,mt7622-audio" -- interrupts: should contain AFE and ASYS interrupts -- interrupt-names: should be "afe" and "asys" -- power-domains: should define the power domain -- clocks: Must contain an entry for each entry in clock-names - See ../clocks/clock-bindings.txt for details -- clock-names: should have these clock names: - "infra_sys_audio_clk", - "top_audio_mux1_sel", - "top_audio_mux2_sel", - "top_audio_a1sys_hp", - "top_audio_a2sys_hp", - "i2s0_src_sel", - "i2s1_src_sel", - "i2s2_src_sel", - "i2s3_src_sel", - "i2s0_src_div", - "i2s1_src_div", - "i2s2_src_div", - "i2s3_src_div", - "i2s0_mclk_en", - "i2s1_mclk_en", - "i2s2_mclk_en", - "i2s3_mclk_en", - "i2so0_hop_ck", - "i2so1_hop_ck", - "i2so2_hop_ck", - "i2so3_hop_ck", - "i2si0_hop_ck", - "i2si1_hop_ck", - "i2si2_hop_ck", - "i2si3_hop_ck", - "asrc0_out_ck", - "asrc1_out_ck", - "asrc2_out_ck", - "asrc3_out_ck", - "audio_afe_pd", - "audio_afe_conn_pd", - "audio_a1sys_pd", - "audio_a2sys_pd", - "audio_mrgif_pd"; -- assigned-clocks: list of input clocks and dividers for the audio system. - See ../clocks/clock-bindings.txt for details. -- assigned-clocks-parents: parent of input clocks of assigned clocks. -- assigned-clock-rates: list of clock frequencies of assigned clocks. - -Must be a subnode of MediaTek audsys device tree node. -See ../arm/mediatek/mediatek,audsys.txt for details about the parent node. - -Example: - - audsys: audio-subsystem@11220000 { - compatible = "mediatek,mt2701-audsys", "syscon"; - ... - - afe: audio-controller { - compatible = "mediatek,mt2701-audio"; - interrupts = , - ; - interrupt-names = "afe", "asys"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; - - clocks = <&infracfg CLK_INFRA_AUDIO>, - <&topckgen CLK_TOP_AUD_MUX1_SEL>, - <&topckgen CLK_TOP_AUD_MUX2_SEL>, - <&topckgen CLK_TOP_AUD_48K_TIMING>, - <&topckgen CLK_TOP_AUD_44K_TIMING>, - <&topckgen CLK_TOP_AUD_K1_SRC_SEL>, - <&topckgen CLK_TOP_AUD_K2_SRC_SEL>, - <&topckgen CLK_TOP_AUD_K3_SRC_SEL>, - <&topckgen CLK_TOP_AUD_K4_SRC_SEL>, - <&topckgen CLK_TOP_AUD_K1_SRC_DIV>, - <&topckgen CLK_TOP_AUD_K2_SRC_DIV>, - <&topckgen CLK_TOP_AUD_K3_SRC_DIV>, - <&topckgen CLK_TOP_AUD_K4_SRC_DIV>, - <&topckgen CLK_TOP_AUD_I2S1_MCLK>, - <&topckgen CLK_TOP_AUD_I2S2_MCLK>, - <&topckgen CLK_TOP_AUD_I2S3_MCLK>, - <&topckgen CLK_TOP_AUD_I2S4_MCLK>, - <&audsys CLK_AUD_I2SO1>, - <&audsys CLK_AUD_I2SO2>, - <&audsys CLK_AUD_I2SO3>, - <&audsys CLK_AUD_I2SO4>, - <&audsys CLK_AUD_I2SIN1>, - <&audsys CLK_AUD_I2SIN2>, - <&audsys CLK_AUD_I2SIN3>, - <&audsys CLK_AUD_I2SIN4>, - <&audsys CLK_AUD_ASRCO1>, - <&audsys CLK_AUD_ASRCO2>, - <&audsys CLK_AUD_ASRCO3>, - <&audsys CLK_AUD_ASRCO4>, - <&audsys CLK_AUD_AFE>, - <&audsys CLK_AUD_AFE_CONN>, - <&audsys CLK_AUD_A1SYS>, - <&audsys CLK_AUD_A2SYS>, - <&audsys CLK_AUD_AFE_MRGIF>; - - clock-names = "infra_sys_audio_clk", - "top_audio_mux1_sel", - "top_audio_mux2_sel", - "top_audio_a1sys_hp", - "top_audio_a2sys_hp", - "i2s0_src_sel", - "i2s1_src_sel", - "i2s2_src_sel", - "i2s3_src_sel", - "i2s0_src_div", - "i2s1_src_div", - "i2s2_src_div", - "i2s3_src_div", - "i2s0_mclk_en", - "i2s1_mclk_en", - "i2s2_mclk_en", - "i2s3_mclk_en", - "i2so0_hop_ck", - "i2so1_hop_ck", - "i2so2_hop_ck", - "i2so3_hop_ck", - "i2si0_hop_ck", - "i2si1_hop_ck", - "i2si2_hop_ck", - "i2si3_hop_ck", - "asrc0_out_ck", - "asrc1_out_ck", - "asrc2_out_ck", - "asrc3_out_ck", - "audio_afe_pd", - "audio_afe_conn_pd", - "audio_a1sys_pd", - "audio_a2sys_pd", - "audio_mrgif_pd"; - - assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>, - <&topckgen CLK_TOP_AUD_MUX2_SEL>, - <&topckgen CLK_TOP_AUD_MUX1_DIV>, - <&topckgen CLK_TOP_AUD_MUX2_DIV>; - assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>, - <&topckgen CLK_TOP_AUD2PLL_90M>; - assigned-clock-rates = <0>, <0>, <49152000>, <45158400>; - }; - }; -- cgit v1.2.3 From 9d1029e76700a097c1a2e850d24ac747564efb16 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Thu, 23 Nov 2023 14:37:46 +0100 Subject: dt-bindings: display: mediatek: dsi: add compatible for MediaTek MT8195 Add the compatible string for MediaTek MT8195 SoC, using the same DSI block as the MT8183. Signed-off-by: Michael Walle Acked-by: Conor Dooley Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml index 537e5304b730..4a7a9ff21996 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml @@ -35,6 +35,10 @@ properties: - enum: - mediatek,mt6795-dsi - const: mediatek,mt8173-dsi + - items: + - enum: + - mediatek,mt8195-dsi + - const: mediatek,mt8183-dsi reg: maxItems: 1 -- cgit v1.2.3 From 6741cbb7875d12c7bb33099aeb4eafa497008ce0 Mon Sep 17 00:00:00 2001 From: jason-ch chen Date: Mon, 23 Oct 2023 16:38:36 +0800 Subject: dt-bindings: arm: Add compatible for MediaTek MT8188 This commit adds dt-binding documentation for the MediaTek MT8188 reference board. Signed-off-by: jason-ch chen Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring Link: https://lore.kernel.org/r/20231023083839.24453-2-jason-ch.chen@mediatek.com Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/arm/mediatek.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index f133d9673803..6f2f64ae76fc 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -174,6 +174,10 @@ properties: - enum: - mediatek,mt8186-evb - const: mediatek,mt8186 + - items: + - enum: + - mediatek,mt8188-evb + - const: mediatek,mt8188 - items: - enum: - mediatek,mt8192-evb -- cgit v1.2.3 From 7711c3c46249344fcbbfdb3ba626801e4392fa5c Mon Sep 17 00:00:00 2001 From: jason-ch chen Date: Mon, 23 Oct 2023 16:38:37 +0800 Subject: dt-bindings: arm: mediatek: Add mt8188 pericfg compatible Add mt8188 pericfg compatible to binding document. Signed-off-by: jason-ch chen Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring Link: https://lore.kernel.org/r/20231023083839.24453-3-jason-ch.chen@mediatek.com Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml index 26158d0d72f3..33c94c491828 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml @@ -28,6 +28,7 @@ properties: - mediatek,mt8173-pericfg - mediatek,mt8183-pericfg - mediatek,mt8186-pericfg + - mediatek,mt8188-pericfg - mediatek,mt8195-pericfg - mediatek,mt8516-pericfg - const: syscon -- cgit v1.2.3 From 040c3303f1106f95a1f2ee0231f959f2b6fa730e Mon Sep 17 00:00:00 2001 From: jason-ch chen Date: Mon, 23 Oct 2023 16:38:38 +0800 Subject: dt-bindings: soc: mediatek: pwrap: Modify compatible for MT8188 The reason for changing the patch was that while MT8188 uses the same pwrap as MT8195, the original code was only applicable to 'compatible = "mediatek,mt8188-pwrap"'. To resolve the DTBS check warning that '['mediatek,mt8188-pwrap', 'mediatek,mt8195-pwrap', 'syscon'] is too long', it is necessary to modify the code. Signed-off-by: jason-ch chen Acked-by: Conor Dooley Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20231023083839.24453-4-jason-ch.chen@mediatek.com Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml index a06ac2177444..4737e5f45d54 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml @@ -41,7 +41,6 @@ properties: - mediatek,mt8173-pwrap - mediatek,mt8183-pwrap - mediatek,mt8186-pwrap - - mediatek,mt8188-pwrap - mediatek,mt8195-pwrap - mediatek,mt8365-pwrap - mediatek,mt8516-pwrap @@ -50,6 +49,11 @@ properties: - mediatek,mt8186-pwrap - mediatek,mt8195-pwrap - const: syscon + - items: + - enum: + - mediatek,mt8188-pwrap + - const: mediatek,mt8195-pwrap + - const: syscon reg: minItems: 1 -- cgit v1.2.3 From 18f413c5dc285373ad440a5054f760a6a0452d48 Mon Sep 17 00:00:00 2001 From: Chris Morgan Date: Mon, 4 Dec 2023 12:57:18 -0600 Subject: dt-bindings: arm: rockchip: Add Powkiddy X55 The Powkiddy X55 is a handheld gaming device made by Powkiddy and powered by the Rockchip RK3566 SoC. This device is somewhat similar to the existing Powkiddy RK3566 devices, which have been grouped together with a previous commit[1]. [1] https://lore.kernel.org/linux-rockchip/20231117202536.1387815-1-macroalpha82@gmail.com/T/#m4764997cfafaca22fe677200de96caa5fb8f0005 Signed-off-by: Chris Morgan Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231204185719.569021-10-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index e756977acd51..e5f19dd2ff38 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -675,6 +675,7 @@ properties: - enum: - powkiddy,rgb30 - powkiddy,rk2023 + - powkiddy,x55 - const: rockchip,rk3566 - description: Radxa Compute Module 3(CM3) -- cgit v1.2.3 From ba2110e546705f410cea7bff06e1f19453290996 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 1 Dec 2023 20:11:02 +0100 Subject: dt-bindings: arm: rockchip: Add Theobroma-Systems Jaguar SBC Add the binding for the Jaguar board from Theobroma-Systems. Signed-off-by: Heiko Stuebner Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20231201191103.343097-2-heiko@sntech.de --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index e5f19dd2ff38..da13cd665fc2 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -874,6 +874,11 @@ properties: - const: tsd,rk3399-puma-haikou - const: rockchip,rk3399 + - description: Theobroma Systems RK3588-SBC Jaguar + items: + - const: tsd,rk3588-jaguar + - const: rockchip,rk3588 + - description: Tronsmart Orion R68 Meta items: - const: tronsmart,orion-r68-meta -- cgit v1.2.3 From 8a64f5f0c692261a3e6686aee89f5c7136f54b89 Mon Sep 17 00:00:00 2001 From: Chris Morgan Date: Mon, 20 Nov 2023 17:01:29 -0600 Subject: dt-bindings: arm: rockchip: Add Anbernic RG351V The Anbernic RG351V is a portable gaming console from Anbernic with the RK3326 SoC. Signed-off-by: Chris Morgan Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231120230131.57705-2-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index da13cd665fc2..ee92f0535f27 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -30,9 +30,11 @@ properties: - const: amarula,vyasa-rk3288 - const: rockchip,rk3288 - - description: Anbernic RG351M + - description: Anbernic RK3326 Handheld Gaming Console items: - - const: anbernic,rg351m + - enum: + - anbernic,rg351m + - anbernic,rg351v - const: rockchip,rk3326 - description: Anbernic RG353P -- cgit v1.2.3 From bb65de5becfe9ce5d11a2d99647ee817d51b0213 Mon Sep 17 00:00:00 2001 From: Gregor Herburger Date: Wed, 6 Dec 2023 15:01:01 +0100 Subject: dt-bindings: arm: fsl: Add TQ-Systems LX2160A based boards TQMLX2160A is a TQ-Systems GmbH SoM using the LX2160A SoC. MBLX2160a is the starterkit baseboard for TQMLX2160A. Signed-off-by: Gregor Herburger Acked-by: Conor Dooley Reviewed-by: Alexander Stein Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index cd87d1afe7b7..a7013b4b5767 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1485,6 +1485,16 @@ properties: - const: solidrun,lx2162a-som - const: fsl,lx2160a + - description: + TQ-Systems TQMLX2160A is a series of socketable SOM featuring + LX2160A system-on-chip variants. MBLX2160A mainboard can be used a + starterkit. + items: + - enum: + - tq,lx2160a-tqmlx2160a-mblx2160a + - const: tq,lx2160a-tqmlx2160a + - const: fsl,lx2160a + - description: S32G2 based Boards items: - enum: -- cgit v1.2.3 From 1a648f8b7994dca4c323911607cf28d1eb44c198 Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Mon, 11 Dec 2023 19:58:36 +0800 Subject: dt-bindings: soc: rockchip: add rk3588 vop/vo syscon Add VOP and VO GRF syscon compatibles for RK3588 Signed-off-by: Andy Yan Acked-by: Rob Herring Link: https://lore.kernel.org/r/20231211115836.1785248-1-andyshrk@163.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml index e4fa6a07b4fa..26db4f48ff62 100644 --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml @@ -28,6 +28,8 @@ properties: - rockchip,rk3588-sys-grf - rockchip,rk3588-pcie3-phy-grf - rockchip,rk3588-pcie3-pipe-grf + - rockchip,rk3588-vo-grf + - rockchip,rk3588-vop-grf - rockchip,rv1108-usbgrf - const: syscon - items: -- cgit v1.2.3 From 6f3ecaea6324e77ad9d8f4a27345f59f47b5025f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 23 Nov 2023 08:02:27 +0100 Subject: dt-bindings: soc: xilinx: Move xilinx.yaml from arm to soc All Xilinx boards can hosts also soft core CPUs like MicroBlaze or MicroBlaze V (RISC-V ISA) that's why move boards description from arm folder to soc folder. Similar change was done for Renesas by commit c27ce08b806d ("dt-bindings: soc: renesas: Move renesas.yaml from arm to soc"). Acked-by: Krzysztof Kozlowski Signed-off-by: Michal Simek --- Documentation/devicetree/bindings/arm/xilinx.yaml | 137 --------------------- .../devicetree/bindings/soc/xilinx/xilinx.yaml | 137 +++++++++++++++++++++ 2 files changed, 137 insertions(+), 137 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/xilinx.yaml create mode 100644 Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/xilinx.yaml b/Documentation/devicetree/bindings/arm/xilinx.yaml deleted file mode 100644 index f57ed0347894..000000000000 --- a/Documentation/devicetree/bindings/arm/xilinx.yaml +++ /dev/null @@ -1,137 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/arm/xilinx.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Xilinx Zynq Platforms - -maintainers: - - Michal Simek - -description: | - Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC - -properties: - $nodename: - const: '/' - compatible: - oneOf: - - items: - - enum: - - adapteva,parallella - - digilent,zynq-zybo - - digilent,zynq-zybo-z7 - - ebang,ebaz4205 - - myir,zynq-zturn-v5 - - myir,zynq-zturn - - xlnx,zynq-cc108 - - xlnx,zynq-zc702 - - xlnx,zynq-zc706 - - xlnx,zynq-zc770-xm010 - - xlnx,zynq-zc770-xm011 - - xlnx,zynq-zc770-xm012 - - xlnx,zynq-zc770-xm013 - - const: xlnx,zynq-7000 - - - items: - - const: avnet,zynq-microzed - - const: xlnx,zynq-microzed - - const: xlnx,zynq-7000 - - - items: - - const: avnet,zynq-zed - - const: xlnx,zynq-zed - - const: xlnx,zynq-7000 - - - items: - - enum: - - xlnx,zynqmp-zc1751 - - const: xlnx,zynqmp - - - description: Xilinx internal board zc1232 - items: - - const: xlnx,zynqmp-zc1232-revA - - const: xlnx,zynqmp-zc1232 - - const: xlnx,zynqmp - - - description: Xilinx internal board zc1254 - items: - - const: xlnx,zynqmp-zc1254-revA - - const: xlnx,zynqmp-zc1254 - - const: xlnx,zynqmp - - - description: Xilinx evaluation board zcu1275 - items: - - const: xlnx,zynqmp-zcu1275-revA - - const: xlnx,zynqmp-zcu1275 - - const: xlnx,zynqmp - - - description: Xilinx 96boards compatible board zcu100 - items: - - const: xlnx,zynqmp-zcu100-revC - - const: xlnx,zynqmp-zcu100 - - const: xlnx,zynqmp - - - description: Xilinx 96boards compatible board Ultra96 - items: - - const: avnet,ultra96-rev1 - - const: avnet,ultra96 - - const: xlnx,zynqmp-zcu100-revC - - const: xlnx,zynqmp-zcu100 - - const: xlnx,zynqmp - - - description: Xilinx evaluation board zcu102 - items: - - enum: - - xlnx,zynqmp-zcu102-revA - - xlnx,zynqmp-zcu102-revB - - xlnx,zynqmp-zcu102-rev1.0 - - xlnx,zynqmp-zcu102-rev1.1 - - const: xlnx,zynqmp-zcu102 - - const: xlnx,zynqmp - - - description: Xilinx evaluation board zcu104 - items: - - enum: - - xlnx,zynqmp-zcu104-revA - - xlnx,zynqmp-zcu104-revC - - xlnx,zynqmp-zcu104-rev1.0 - - const: xlnx,zynqmp-zcu104 - - const: xlnx,zynqmp - - - description: Xilinx evaluation board zcu106 - items: - - enum: - - xlnx,zynqmp-zcu106-revA - - xlnx,zynqmp-zcu106-rev1.0 - - const: xlnx,zynqmp-zcu106 - - const: xlnx,zynqmp - - - description: Xilinx evaluation board zcu111 - items: - - enum: - - xlnx,zynqmp-zcu111-revA - - xlnx,zynqmp-zcu111-rev1.0 - - const: xlnx,zynqmp-zcu111 - - const: xlnx,zynqmp - - - description: Xilinx Kria SOMs - items: - - const: xlnx,zynqmp-sm-k26-rev1 - - const: xlnx,zynqmp-sm-k26-revB - - const: xlnx,zynqmp-sm-k26-revA - - const: xlnx,zynqmp-sm-k26 - - const: xlnx,zynqmp - - - description: Xilinx Kria SOMs (starter) - items: - - const: xlnx,zynqmp-smk-k26-rev1 - - const: xlnx,zynqmp-smk-k26-revB - - const: xlnx,zynqmp-smk-k26-revA - - const: xlnx,zynqmp-smk-k26 - - const: xlnx,zynqmp - -additionalProperties: true - -... diff --git a/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml b/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml new file mode 100644 index 000000000000..95758deca325 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml @@ -0,0 +1,137 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/xilinx/xilinx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Zynq Platforms + +maintainers: + - Michal Simek + +description: | + Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - adapteva,parallella + - digilent,zynq-zybo + - digilent,zynq-zybo-z7 + - ebang,ebaz4205 + - myir,zynq-zturn-v5 + - myir,zynq-zturn + - xlnx,zynq-cc108 + - xlnx,zynq-zc702 + - xlnx,zynq-zc706 + - xlnx,zynq-zc770-xm010 + - xlnx,zynq-zc770-xm011 + - xlnx,zynq-zc770-xm012 + - xlnx,zynq-zc770-xm013 + - const: xlnx,zynq-7000 + + - items: + - const: avnet,zynq-microzed + - const: xlnx,zynq-microzed + - const: xlnx,zynq-7000 + + - items: + - const: avnet,zynq-zed + - const: xlnx,zynq-zed + - const: xlnx,zynq-7000 + + - items: + - enum: + - xlnx,zynqmp-zc1751 + - const: xlnx,zynqmp + + - description: Xilinx internal board zc1232 + items: + - const: xlnx,zynqmp-zc1232-revA + - const: xlnx,zynqmp-zc1232 + - const: xlnx,zynqmp + + - description: Xilinx internal board zc1254 + items: + - const: xlnx,zynqmp-zc1254-revA + - const: xlnx,zynqmp-zc1254 + - const: xlnx,zynqmp + + - description: Xilinx evaluation board zcu1275 + items: + - const: xlnx,zynqmp-zcu1275-revA + - const: xlnx,zynqmp-zcu1275 + - const: xlnx,zynqmp + + - description: Xilinx 96boards compatible board zcu100 + items: + - const: xlnx,zynqmp-zcu100-revC + - const: xlnx,zynqmp-zcu100 + - const: xlnx,zynqmp + + - description: Xilinx 96boards compatible board Ultra96 + items: + - const: avnet,ultra96-rev1 + - const: avnet,ultra96 + - const: xlnx,zynqmp-zcu100-revC + - const: xlnx,zynqmp-zcu100 + - const: xlnx,zynqmp + + - description: Xilinx evaluation board zcu102 + items: + - enum: + - xlnx,zynqmp-zcu102-revA + - xlnx,zynqmp-zcu102-revB + - xlnx,zynqmp-zcu102-rev1.0 + - xlnx,zynqmp-zcu102-rev1.1 + - const: xlnx,zynqmp-zcu102 + - const: xlnx,zynqmp + + - description: Xilinx evaluation board zcu104 + items: + - enum: + - xlnx,zynqmp-zcu104-revA + - xlnx,zynqmp-zcu104-revC + - xlnx,zynqmp-zcu104-rev1.0 + - const: xlnx,zynqmp-zcu104 + - const: xlnx,zynqmp + + - description: Xilinx evaluation board zcu106 + items: + - enum: + - xlnx,zynqmp-zcu106-revA + - xlnx,zynqmp-zcu106-rev1.0 + - const: xlnx,zynqmp-zcu106 + - const: xlnx,zynqmp + + - description: Xilinx evaluation board zcu111 + items: + - enum: + - xlnx,zynqmp-zcu111-revA + - xlnx,zynqmp-zcu111-rev1.0 + - const: xlnx,zynqmp-zcu111 + - const: xlnx,zynqmp + + - description: Xilinx Kria SOMs + items: + - const: xlnx,zynqmp-sm-k26-rev1 + - const: xlnx,zynqmp-sm-k26-revB + - const: xlnx,zynqmp-sm-k26-revA + - const: xlnx,zynqmp-sm-k26 + - const: xlnx,zynqmp + + - description: Xilinx Kria SOMs (starter) + items: + - const: xlnx,zynqmp-smk-k26-rev1 + - const: xlnx,zynqmp-smk-k26-revB + - const: xlnx,zynqmp-smk-k26-revA + - const: xlnx,zynqmp-smk-k26 + - const: xlnx,zynqmp + +additionalProperties: true + +... -- cgit v1.2.3 From fc622c97d3e290437bb48d2fcb0987dd73234b90 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 23 Nov 2023 08:02:28 +0100 Subject: dt-bindings: soc: Add new board description for MicroBlaze V MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP. It is hardware compatible with classic MicroBlaze processor. Processor can be used with standard AMD/Xilinx IPs including interrupt controller and timer. Acked-by: Krzysztof Kozlowski Signed-off-by: Michal Simek --- Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml b/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml index 95758deca325..d4c0fe1fe435 100644 --- a/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml +++ b/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml @@ -132,6 +132,11 @@ properties: - const: xlnx,zynqmp-smk-k26 - const: xlnx,zynqmp + - description: AMD MicroBlaze V (QEMU) + items: + - const: qemu,mbv + - const: amd,mbv + additionalProperties: true ... -- cgit v1.2.3 From b3582328b9c52f179de7fdd7694c42548d416e39 Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Mon, 11 Dec 2023 16:23:17 +0000 Subject: dt-bindings: arm: google: Add bindings for Google ARM platforms This introduces bindings and dt-schema for the Google Tensor SoCs. Currently just gs101 and pixel 6 are supported. Reviewed-by: Sam Protsenko Signed-off-by: Peter Griffin Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20231211162331.435900-3-peter.griffin@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/google.yaml | 53 +++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/google.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/google.yaml b/Documentation/devicetree/bindings/arm/google.yaml new file mode 100644 index 000000000000..e20b5c9b16bc --- /dev/null +++ b/Documentation/devicetree/bindings/arm/google.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/google.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Google Tensor platforms + +maintainers: + - Peter Griffin + +description: | + ARM platforms using SoCs designed by Google branded "Tensor" used in Pixel + devices. + + Currently upstream this is devices using "gs101" SoC which is found in Pixel + 6, Pixel 6 Pro and Pixel 6a. + + Google have a few different names for the SoC: + - Marketing name ("Tensor") + - Codename ("Whitechapel") + - SoC ID ("gs101") + - Die ID ("S5P9845") + + Likewise there are a couple of names for the actual device + - Marketing name ("Pixel 6") + - Codename ("Oriole") + + Devicetrees should use the lowercased SoC ID and lowercased board codename, + e.g. gs101 and gs101-oriole. + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Google Pixel 6 / Oriole + items: + - enum: + - google,gs101-oriole + - const: google,gs101 + + # Bootloader requires empty ect node to be present + ect: + type: object + additionalProperties: false + +required: + - ect + +additionalProperties: true + +... -- cgit v1.2.3 From ef510cbd92c0ba9cf770c9e1fcdefbd7d0837d8c Mon Sep 17 00:00:00 2001 From: Hugo Villeneuve Date: Thu, 7 Dec 2023 10:05:17 -0500 Subject: dt-bindings: vendor-prefixes: add dimonoff Add vendor prefix for Dimonoff, which provides IoT smart solutions and custom engineering services. Acked-by: Krzysztof Kozlowski Signed-off-by: Hugo Villeneuve Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 71dcd6240a99..338ad15a7ab2 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -352,6 +352,8 @@ patternProperties: description: Digi International Inc. "^digilent,.*": description: Diglent, Inc. + "^dimonoff,.*": + description: Dimonoff inc. "^diodes,.*": description: Diodes, Inc. "^dioo,.*": -- cgit v1.2.3 From 6cbac23b309cc6454779703a741392df4e80455f Mon Sep 17 00:00:00 2001 From: Hugo Villeneuve Date: Thu, 7 Dec 2023 10:05:18 -0500 Subject: dt-bindings: arm: fsl: add Dimonoff gateway EVK board Add DT compatible string for Dimonoff gateway EVK board based on a Variscite VAR-SOM-NANO with a NXP MX8MN nano CPU. Signed-off-by: Hugo Villeneuve Acked-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index a7013b4b5767..228dcc5c7d6f 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1025,6 +1025,7 @@ properties: - description: Variscite VAR-SOM-MX8MN based boards items: - enum: + - dimonoff,gateway-evk # i.MX8MN Dimonoff Gateway EVK Board - rve,rve-gateway # i.MX8MN RVE Gateway Board - variscite,var-som-mx8mn-symphony - const: variscite,var-som-mx8mn -- cgit v1.2.3 From a55383dec6056928dc06ff9acd88f4f974dd1f9b Mon Sep 17 00:00:00 2001 From: Ahmad Fatoum Date: Wed, 22 Nov 2023 19:52:33 +0100 Subject: dt-bindings: arm: stm32: don't mix SCMI and non-SCMI board compatibles SCMI-enabled boards may restrict access to resources like clocks, resets and regulators to the secure world. A normal world bootloader or kernel compatible with the non-SCMI-enabled board is thus not guaranteed to be able to deal with the SCMI variant. It follows, that the SCMI-enabled board is not compatible with the non-SCMI enabled board, so drop that compatible. This change is motivated by the barebox' bootloader's use of bootloader specification files[1][2]: barebox for non-SCMI DK2 will compare its own top-level "stm32mp157c-dk2" compatible with all compatibles listed in the device tree referenced by each bootloader spec file. If the boot medium contains a configuration with compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157c-dk2", "st,stm32mp157"; it will match, because of the second compatible and boot a kernel with SCMI enabled, although no SCMI may exist on the platform. [1]: https://uapi-group.org/specifications/specs/boot_loader_specification/ [2]: https://www.barebox.org/doc/latest/user/booting-linux.html#boot-loader-specification Fixes: 8e14ebb1f08f ("dt-bindings: arm: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)") Signed-off-by: Ahmad Fatoum Acked-by: Rob Herring Signed-off-by: Alexandre Torgue --- Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 16 +++------------- 1 file changed, 3 insertions(+), 13 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml index df087c81c69e..bc2f43330ae4 100644 --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -82,29 +82,19 @@ properties: - shiratech,stm32mp157a-iot-box # IoT Box - shiratech,stm32mp157a-stinger96 # Stinger96 - st,stm32mp157c-ed1 + - st,stm32mp157c-ed1-scmi - st,stm32mp157a-dk1 + - st,stm32mp157a-dk1-scmi - st,stm32mp157c-dk2 + - st,stm32mp157c-dk2-scmi - const: st,stm32mp157 - - items: - - const: st,stm32mp157a-dk1-scmi - - const: st,stm32mp157a-dk1 - - const: st,stm32mp157 - - items: - - const: st,stm32mp157c-dk2-scmi - - const: st,stm32mp157c-dk2 - - const: st,stm32mp157 - - items: - - const: st,stm32mp157c-ed1-scmi - - const: st,stm32mp157c-ed1 - - const: st,stm32mp157 - items: - const: st,stm32mp157c-ev1 - const: st,stm32mp157c-ed1 - const: st,stm32mp157 - items: - const: st,stm32mp157c-ev1-scmi - - const: st,stm32mp157c-ev1 - const: st,stm32mp157c-ed1 - const: st,stm32mp157 -- cgit v1.2.3 From a0b4600c777d6ab74a3c2857026a0a3c3e1f7100 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Thu, 14 Dec 2023 01:53:10 +0000 Subject: dt-bindings: vendor-prefixes: add Transpeed This is a name used by some Chinese TV boxes, add it to the bindings. Signed-off-by: Andre Przywara Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231214015312.17363-2-andre.przywara@arm.com Signed-off-by: Jernej Skrabec --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 309b94c328c8..c545c63b316d 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1434,6 +1434,8 @@ patternProperties: description: TPO "^tq,.*": description: TQ-Systems GmbH + "^transpeed,.*": + description: Transpeed "^traverse,.*": description: Traverse Technologies Australia Pty Ltd "^tronfy,.*": -- cgit v1.2.3 From 3094e7282f6bae36520ca2807303adea7ae5ab50 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Thu, 14 Dec 2023 01:53:11 +0000 Subject: dt-bindings: arm: sunxi: document Transpeed 8K618-T board name The Transpeed 8K618-T TV box is a Chinese Android TV box, using the Allwinner H618 SoC. Add the board/SoC compatible string pair to the list of known boards. Signed-off-by: Andre Przywara Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231214015312.17363-3-andre.przywara@arm.com Signed-off-by: Jernej Skrabec --- Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index 6f481e8bb4bf..a9d8e85565b8 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -868,6 +868,11 @@ properties: - const: topwise,a721 - const: allwinner,sun4i-a10 + - description: Transpeed 8K618-T + items: + - const: transpeed,8k618-t + - const: allwinner,sun50i-h618 + - description: Utoo P66 items: - const: utoo,p66 -- cgit v1.2.3 From c604a4d1833c1affc7717117a8ea499d2b8a321b Mon Sep 17 00:00:00 2001 From: Elad Nachman Date: Mon, 11 Dec 2023 19:17:38 +0200 Subject: dt-bindings: arm64: add Marvell COM Express boards Add dt bindings for: CN9130 COM Express CPU module CN9131 COM Express CPU module AC5X RD COM Express Type 7 carrier board. AC5X RD COM Express board with a CN9131 COM Express Type 7 CPU module. Signed-off-by: Elad Nachman Reviewed-by: Andrew Lunn Acked-by: Conor Dooley Signed-off-by: Gregory CLEMENT --- .../bindings/arm/marvell/armada-7k-8k.yaml | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml index 52d78521e412..16d2e132d3d1 100644 --- a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml +++ b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml @@ -60,4 +60,26 @@ properties: - const: marvell,armada-ap807-quad - const: marvell,armada-ap807 + - description: + Alleycat5X (98DX35xx) Reference Design as COM Express Carrier plus + Armada CN9130 COM Express CPU module + items: + - const: marvell,cn9130-ac5x-carrier + - const: marvell,rd-ac5x-carrier + - const: marvell,cn9130-cpu-module + - const: marvell,cn9130 + - const: marvell,armada-ap807-quad + - const: marvell,armada-ap807 + + - description: + Alleycat5X (98DX35xx) Reference Design as COM Express Carrier plus + Armada CN9131 COM Express CPU module + items: + - const: marvell,cn9131-ac5x-carrier + - const: marvell,rd-ac5x-carrier + - const: marvell,cn9131-cpu-module + - const: marvell,cn9131 + - const: marvell,armada-ap807-quad + - const: marvell,armada-ap807 + additionalProperties: true -- cgit v1.2.3 From 82d8c1e49c1be63c6927842a7c3042d4d53fe8b2 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Mon, 11 Dec 2023 20:28:07 +0100 Subject: dt-bindings: arm: qcom: Fix up htc-memul compatible While applying the original patch, some things got messed up and it didn't apply to the correct section. Move the compatible to the correct location to fix that. Fixes: bfccc195192e ("dt-bindings: arm: qcom: Add HTC One Mini 2") Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231211-htc-memul-fixup-v1-1-c0aeab5aaf44@z3ntu.xyz Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index c968412d86b8..96eba7454c82 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -183,6 +183,7 @@ properties: - items: - enum: + - htc,memul - microsoft,superman-lte - microsoft,tesla - const: qcom,msm8926 @@ -259,11 +260,6 @@ properties: - const: qcom,msm8916-v1-qrd/9-v1 - const: qcom,msm8916 - - items: - - enum: - - htc,memul - - const: qcom,msm8926 - - items: - enum: - motorola,potter -- cgit v1.2.3 From 4029bd91c34956add282632cd3b5ec858d010eb9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andr=C3=A9=20Apitzsch?= Date: Thu, 14 Dec 2023 21:59:33 +0100 Subject: dt-bindings: arm: qcom: Add Motorola Moto G 4G (2013) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Document the compatible for the MSM8926-based Motorola Moto G 4G smartphone released in 2013. Acked-by: Krzysztof Kozlowski Signed-off-by: André Apitzsch Link: https://lore.kernel.org/r/20231214-peregrine-v2-1-a35102268442@apitzsch.eu Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 96eba7454c82..1a5fb889a444 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -186,6 +186,7 @@ properties: - htc,memul - microsoft,superman-lte - microsoft,tesla + - motorola,peregrine - const: qcom,msm8926 - const: qcom,msm8226 -- cgit v1.2.3 From a6c06d4469e745f78dd5b0a1515429ff18c83a53 Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Tue, 12 Dec 2023 20:42:23 +0800 Subject: dt-bindings: vendor-prefixes: Add Cool Pi Add vendor prefix for Cool Pi(https://cool-pi.com/) Signed-off-by: Andy Yan Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231212124223.1897314-1-andyshrk@163.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 309b94c328c8..ddbba46fcbad 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -294,6 +294,8 @@ patternProperties: description: CompuLab Ltd. "^congatec,.*": description: congatec GmbH + "^coolpi,.*": + description: cool-pi.com "^coreriver,.*": description: CORERIVER Semiconductor Co.,Ltd. "^corpro,.*": -- cgit v1.2.3 From c0a38606e6763f1d7152a644ad8bb8804f1756de Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Tue, 12 Dec 2023 20:42:37 +0800 Subject: dt-bindings: arm: rockchip: Add Cool Pi 4B Add Cool Pi 4B, a SBC powered by RK3588S Signed-off-by: Andy Yan Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231212124237.1897378-1-andyshrk@163.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index ee92f0535f27..2f5cf25c5349 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -97,6 +97,11 @@ properties: - const: chipspark,rayeager-px2 - const: rockchip,rk3066a + - description: Cool Pi 4 Model B + items: + - const: coolpi,pi-4b + - const: rockchip,rk3588s + - description: Edgeble Neural Compute Module 2(Neu2) SoM based boards items: - const: edgeble,neural-compute-module-2-io # Edgeble Neural Compute Module 2 IO Board -- cgit v1.2.3 From e2637a4d67c6310871a1fd67595b0c201f3a83ba Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Tue, 12 Dec 2023 20:43:40 +0800 Subject: dt-bindings: arm: rockchip: Add Cool Pi CM5 Add Cool Pi CM5, a board powered by RK3588 CM5 EVB works with a mother board connect with CM5 Signed-off-by: Andy Yan Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231212124340.1897502-1-andyshrk@163.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 2f5cf25c5349..5b93989d3b41 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -97,6 +97,13 @@ properties: - const: chipspark,rayeager-px2 - const: rockchip,rk3066a + - description: Cool Pi Compute Module 5(CM5) EVB + items: + - enum: + - coolpi,pi-cm5-evb + - const: coolpi,pi-cm5 + - const: rockchip,rk3588 + - description: Cool Pi 4 Model B items: - const: coolpi,pi-4b -- cgit v1.2.3 From 07bc2433a944f767e49b373f6cdfe6b0eac801f6 Mon Sep 17 00:00:00 2001 From: Chunyan Zhang Date: Mon, 18 Dec 2023 18:02:33 +0800 Subject: dt-bindings: arm: Add compatible strings for Unisoc's UMS9620 Added bindings for Unisoc's UMS9620-2H10 board and UMS9620 SoC. Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231218100234.1102916-3-chunyan.zhang@unisoc.com Signed-off-by: Chunyan Zhang --- Documentation/devicetree/bindings/arm/sprd/sprd.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/arm/sprd/sprd.yaml b/Documentation/devicetree/bindings/arm/sprd/sprd.yaml index eaa67b8e0d6c..40fc3c8b9dce 100644 --- a/Documentation/devicetree/bindings/arm/sprd/sprd.yaml +++ b/Documentation/devicetree/bindings/arm/sprd/sprd.yaml @@ -35,6 +35,11 @@ properties: - sprd,ums512-1h10 - const: sprd,ums512 + - items: + - enum: + - sprd,ums9620-2h10 + - const: sprd,ums9620 + additionalProperties: true ... -- cgit v1.2.3