From 8bf8d3cbe357580b48df6f2e352e64ad606ef4a4 Mon Sep 17 00:00:00 2001 From: Richard Zhu Date: Fri, 5 Feb 2021 15:07:09 +0800 Subject: MLK-25283-1 dt-binding: imx6q-pcie: add the l1sub for imx8m pcie Add one clkreq reset to support the L1sub for i.MX8M PCIe. Signed-off-by: Richard Zhu Reviewed-by: Jun Li (cherry picked from commit 3ac7bf70f9cda0f25b8d94678e5bbbd70c387b2f) (cherry picked from commit 3b776f7bc054e69f4cdd2b2ac9f85f05c7e6602f) Signed-off-by: Andrey Zhizhikin --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index 09326ffaee52..3e3e2818bd9b 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -83,6 +83,11 @@ Additional required properties for imx8mq-pcie: - clock-names: Must include the following additional entries: - "pcie_aux" +Additional required properties to enable L1sub for imx8mq-pcie, imx8mm-pcie +and imx8mp-pcie: +- reset-names: Must contain the following entries: + - "clkreq" + Additional required properties for imx8 pcie: - hsio-cfg: hsio configration mode when the pcie node is supported. mode 1: pciea 2 lanes and one sata ahci port. -- cgit v1.2.3