From 27aaa8ad5a5e79d01653523c305fe6af707dce8e Mon Sep 17 00:00:00 2001 From: Michael Shych Date: Tue, 27 Mar 2018 14:01:26 +0000 Subject: i2c: mlxcpld: Add capability register description to documentation It adds capability register description to documentation. Signed-off-by: Michael Shych Signed-off-by: Wolfram Sang --- Documentation/i2c/busses/i2c-mlxcpld | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/i2c') diff --git a/Documentation/i2c/busses/i2c-mlxcpld b/Documentation/i2c/busses/i2c-mlxcpld index 4e46c440b38d..925904aa9b57 100644 --- a/Documentation/i2c/busses/i2c-mlxcpld +++ b/Documentation/i2c/busses/i2c-mlxcpld @@ -20,6 +20,10 @@ The next transaction types are supported: - Write Byte/Block. Registers: +CPBLTY 0x0 - capability reg. + Bits [6:5] - transaction length. b01 - 72B is supported, + 36B in other case. + Bit 7 - SMBus block read support. CTRL 0x1 - control reg. Resets all the registers. HALF_CYC 0x4 - cycle reg. -- cgit v1.2.3