From 2e9a6b1ae0865ce8bb1406306e5df0d79f3de5d0 Mon Sep 17 00:00:00 2001 From: Fugang Duan Date: Fri, 14 Aug 2015 14:46:23 +0800 Subject: MLK-11360-01 crypto: caam_snvs: add snvs clock management caam_snvs driver involves snvs HP registers access that needs to enable snvs clock source. The patch add the clock management. Signed-off-by: Fugang Duan Signed-off-by: Dan Douglass --- Documentation/devicetree/bindings/crypto/fsl-sec4.txt | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt index e4022776ac6e..711d2b19086b 100644 --- a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt +++ b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt @@ -364,6 +364,15 @@ Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node Definition: A standard property. Specifies the physical address and length of the SNVS LP configuration registers. + - clocks + Usage: optional + Value type: + Definition: A standard property. Specifies the source clock for + snvs register access. If i.MX clk driver defines the clock node, + it needs user to specify the clocks in device tree for all modules + with snvs LP/HP registers access. The modules involved snvs LP/HP + registers access are snvs-power key, snvs-rtc, and caam. + EXAMPLE sec_mon_rtc_lp@314000 { compatible = "fsl,sec-v4.0-mon-rtc-lp"; -- cgit v1.2.3