From ed98261b41687323ffa02ca20fef1e60b38fd1aa Mon Sep 17 00:00:00 2001 From: Tomeu Vizoso Date: Mon, 21 Jul 2025 11:17:29 +0200 Subject: accel/rocket: Add a new driver for Rockchip's NPU This initial version supports the NPU as shipped in the RK3588 SoC and described in the first part of its TRM, in Chapter 36. This NPU contains 3 independent cores that the driver can submit jobs to. This commit adds just hardware initialization and power management. v2: - Split cores and IOMMUs as independent devices (Sebastian Reichel) - Add some documentation (Jeffrey Hugo) - Be more explicit in the Kconfig documentation (Jeffrey Hugo) - Remove resets, as these haven't been found useful so far (Zenghui Yu) - Repack structs (Jeffrey Hugo) - Use DEFINE_DRM_ACCEL_FOPS (Jeffrey Hugo) - Use devm_drm_dev_alloc (Jeffrey Hugo) - Use probe log helper (Jeffrey Hugo) - Introduce UABI header in a later patch (Jeffrey Hugo) v3: - Adapt to a split of the register block in the DT bindings (Nicolas Frattaroli) - Move registers header to its own commit (Thomas Zimmermann) - Misc. cleanups (Thomas Zimmermann and Jeff Hugo) - Make use of GPL-2.0-only for the copyright notice (Jeff Hugo) - PM improvements (Nicolas Frattaroli) v4: - Use bulk clk API (Krzysztof Kozlowski) v6: - Remove mention to NVDLA, as the hardware is only incidentally related (Kever Yang) - Use calloc instead of GFP_ZERO (Jeff Hugo) - Explicitly include linux/container_of.h (Jeff Hugo) - pclk and npu clocks are now needed by all cores (Rob Herring) v7: - Assign its own IOMMU domain to each client, for isolation (Daniel Stone and Robin Murphy) v8: - Kconfig: fix depends to be more explicit about Rockchip, and remove superfluous selects (Robin Murphy) - Use reset lines to reset the cores (Robin Murphy) - Reference count the module - Set dma_set_max_seg_size - Correctly acquire a reference to the IOMMU (Robin Murphy) - Remove notion of top core (Robin Murphy) Reviewed-by: Robert Foss Tested-by: Heiko Stuebner Reviewed-by: Jeff Hugo Signed-off-by: Tomeu Vizoso Signed-off-by: Jeff Hugo Link: https://lore.kernel.org/r/20250721-6-10-rocket-v9-2-77ebd484941e@tomeuvizoso.net --- Documentation/accel/index.rst | 1 + Documentation/accel/rocket/index.rst | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+) create mode 100644 Documentation/accel/rocket/index.rst (limited to 'Documentation') diff --git a/Documentation/accel/index.rst b/Documentation/accel/index.rst index bc85f26533d8..d8fa332d60a8 100644 --- a/Documentation/accel/index.rst +++ b/Documentation/accel/index.rst @@ -10,6 +10,7 @@ Compute Accelerators introduction amdxdna/index qaic/index + rocket/index .. only:: subproject and html diff --git a/Documentation/accel/rocket/index.rst b/Documentation/accel/rocket/index.rst new file mode 100644 index 000000000000..70f97bccf100 --- /dev/null +++ b/Documentation/accel/rocket/index.rst @@ -0,0 +1,19 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +===================================== + accel/rocket Rockchip NPU driver +===================================== + +The accel/rocket driver supports the Neural Processing Units (NPUs) inside some +Rockchip SoCs such as the RK3588. Rockchip calls it RKNN and sometimes RKNPU. + +The hardware is described in chapter 36 in the RK3588 TRM. + +This driver just powers the hardware on and off, allocates and maps buffers to +the device and submits jobs to the frontend unit. Everything else is done in +userspace, as a Gallium driver (also called rocket) that is part of the Mesa3D +project. + +Hardware currently supported: + +* RK3588 -- cgit v1.2.3 From a7352c849492a30b5d8491fcb9314ab376a3942f Mon Sep 17 00:00:00 2001 From: Tomeu Vizoso Date: Mon, 21 Jul 2025 11:17:33 +0200 Subject: dt-bindings: npu: rockchip,rknn: Add bindings MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add the bindings for the Neural Processing Unit IP from Rockchip. v2: - Adapt to new node structure (one node per core, each with its own IOMMU) - Several misc. fixes from Sebastian Reichel v3: - Split register block in its constituent subblocks, and only require the ones that the kernel would ever use (Nicolas Frattaroli) - Group supplies (Rob Herring) - Explain the way in which the top core is special (Rob Herring) v4: - Change required node name to npu@ (Rob Herring and Krzysztof Kozlowski) - Remove unneeded items: (Krzysztof Kozlowski) - Fix use of minItems/maxItems (Krzysztof Kozlowski) - Add reg-names to list of required properties (Krzysztof Kozlowski) - Fix example (Krzysztof Kozlowski) v5: - Rename file to rockchip,rk3588-rknn-core.yaml (Krzysztof Kozlowski) - Streamline compatible property (Krzysztof Kozlowski) v6: - Remove mention to NVDLA, as the hardware is only incidentally related (Kever Yang) - Mark pclk and npu clocks as required by all clocks (Rob Herring) v7: - Remove allOf section, not needed now that all nodes require 4 clocks (Heiko Stübner) v8: - Remove notion of top core (Robin Murphy) Signed-off-by: Sebastian Reichel Reviewed-by: Krzysztof Kozlowski Tested-by: Heiko Stuebner Signed-off-by: Tomeu Vizoso Reviewed-by: Rob Herring (Arm) Signed-off-by: Jeff Hugo Link: https://lore.kernel.org/r/20250721-6-10-rocket-v9-6-77ebd484941e@tomeuvizoso.net --- .../bindings/npu/rockchip,rk3588-rknn-core.yaml | 112 +++++++++++++++++++++ 1 file changed, 112 insertions(+) create mode 100644 Documentation/devicetree/bindings/npu/rockchip,rk3588-rknn-core.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/npu/rockchip,rk3588-rknn-core.yaml b/Documentation/devicetree/bindings/npu/rockchip,rk3588-rknn-core.yaml new file mode 100644 index 000000000000..caca2a4903cd --- /dev/null +++ b/Documentation/devicetree/bindings/npu/rockchip,rk3588-rknn-core.yaml @@ -0,0 +1,112 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/npu/rockchip,rk3588-rknn-core.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Neural Processing Unit IP from Rockchip + +maintainers: + - Tomeu Vizoso + +description: + Rockchip IP for accelerating inference of neural networks. + + There is to be a node per each NPU core in the SoC, and each core should reference all the + resources that it needs to function, such as clocks, power domains, and resets. + +properties: + $nodename: + pattern: '^npu@[a-f0-9]+$' + + compatible: + enum: + - rockchip,rk3588-rknn-core + + reg: + maxItems: 3 + + reg-names: + items: + - const: pc # Program Control-related registers + - const: cna # Convolution Neural Network Accelerator registers + - const: core # Main NPU core processing unit registers + + clocks: + maxItems: 4 + + clock-names: + items: + - const: aclk + - const: hclk + - const: npu + - const: pclk + + interrupts: + maxItems: 1 + + iommus: + maxItems: 1 + + npu-supply: true + + power-domains: + maxItems: 1 + + resets: + maxItems: 2 + + reset-names: + items: + - const: srst_a + - const: srst_h + + sram-supply: true + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - iommus + - power-domains + - resets + - reset-names + - npu-supply + - sram-supply + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + bus { + #address-cells = <2>; + #size-cells = <2>; + + npu@fdab0000 { + compatible = "rockchip,rk3588-rknn-core"; + reg = <0x0 0xfdab0000 0x0 0x1000>, + <0x0 0xfdab1000 0x0 0x1000>, + <0x0 0xfdab3000 0x0 0x1000>; + reg-names = "pc", "cna", "core"; + clocks = <&cru ACLK_NPU0>, <&cru HCLK_NPU0>, + <&scmi_clk SCMI_CLK_NPU>, <&cru PCLK_NPU_ROOT>; + clock-names = "aclk", "hclk", "npu", "pclk"; + interrupts = ; + iommus = <&rknn_mmu_0>; + npu-supply = <&vdd_npu_s0>; + power-domains = <&power RK3588_PD_NPUTOP>; + resets = <&cru SRST_A_RKNN0>, <&cru SRST_H_RKNN0>; + reset-names = "srst_a", "srst_h"; + sram-supply = <&vdd_npu_mem_s0>; + }; + }; +... -- cgit v1.2.3 From c2aa3089ad7e7fec3ec4a58d8d0904b5e9b392a1 Mon Sep 17 00:00:00 2001 From: Yann Dirson Date: Sun, 20 Jul 2025 16:13:16 +0200 Subject: Documentation/amdgpu: fix 'in the amdgfx' formulation Clarify the mailing list. Signed-off-by: Yann Dirson Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/display/dc-glossary.rst | 2 +- Documentation/gpu/amdgpu/display/display-contributing.rst | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/display/dc-glossary.rst b/Documentation/gpu/amdgpu/display/dc-glossary.rst index 7dc034e9e586..cbe737d1fcea 100644 --- a/Documentation/gpu/amdgpu/display/dc-glossary.rst +++ b/Documentation/gpu/amdgpu/display/dc-glossary.rst @@ -5,7 +5,7 @@ DC Glossary On this page, we try to keep track of acronyms related to the display component. If you do not find what you are looking for, look at the 'Documentation/gpu/amdgpu/amdgpu-glossary.rst'; if you cannot find it anywhere, -consider asking in the amdgfx and update this page. +consider asking on the amd-gfx mailing list and update this page. .. glossary:: diff --git a/Documentation/gpu/amdgpu/display/display-contributing.rst b/Documentation/gpu/amdgpu/display/display-contributing.rst index 36f3077eee00..2f741c52dce5 100644 --- a/Documentation/gpu/amdgpu/display/display-contributing.rst +++ b/Documentation/gpu/amdgpu/display/display-contributing.rst @@ -9,8 +9,8 @@ contribution to the display code, and for that, we say thank you :) This page summarizes some of the issues you can help with; keep in mind that this is a static page, and it is always a good idea to try to reach developers -in the amdgfx or some of the maintainers. Finally, this page follows the DRM -way of creating a TODO list; for more information, check +on the amd-gfx mailing list or some of the maintainers. Finally, this page +follows the DRM way of creating a TODO list; for more information, check 'Documentation/gpu/todo.rst'. Gitlab issues -- cgit v1.2.3 From 85c23f28905cf20a86ceec3cfd7a0a5572c9eb13 Mon Sep 17 00:00:00 2001 From: Brigham Campbell Date: Mon, 21 Jul 2025 19:53:11 -0600 Subject: drm: docs: Update task from drm TODO list Update TODO item from drm documentation to contain more applicable information regarding the removal of deprecated MIPI DSI functions and no longer reference functions which have already been removed from the kernel. Reviewed-by: Douglas Anderson Signed-off-by: Brigham Campbell Signed-off-by: Douglas Anderson Link: https://lore.kernel.org/r/20250722015313.561966-5-me@brighamcampbell.com --- Documentation/gpu/todo.rst | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) (limited to 'Documentation') diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst index be8637da3fe9..92db80793bba 100644 --- a/Documentation/gpu/todo.rst +++ b/Documentation/gpu/todo.rst @@ -497,19 +497,19 @@ Contact: Douglas Anderson Level: Intermediate -Transition away from using mipi_dsi_*_write_seq() -------------------------------------------------- - -The macros mipi_dsi_generic_write_seq() and mipi_dsi_dcs_write_seq() are -non-intuitive because, if there are errors, they return out of the *caller's* -function. We should move all callers to use mipi_dsi_generic_write_seq_multi() -and mipi_dsi_dcs_write_seq_multi() macros instead. - -Once all callers are transitioned, the macros and the functions that they call, -mipi_dsi_generic_write_chatty() and mipi_dsi_dcs_write_buffer_chatty(), can -probably be removed. Alternatively, if people feel like the _multi() variants -are overkill for some use cases, we could keep the mipi_dsi_*_write_seq() -variants but change them not to return out of the caller. +Transition away from using deprecated MIPI DSI functions +-------------------------------------------------------- + +There are many functions defined in ``drm_mipi_dsi.c`` which have been +deprecated. Each deprecated function was deprecated in favor of its `multi` +variant (e.g. `mipi_dsi_generic_write()` and `mipi_dsi_generic_write_multi()`). +The `multi` variant of a function includes improved error handling and logic +which makes it more convenient to make several calls in a row, as most MIPI +drivers do. + +Drivers should be updated to use undeprecated functions. Once all usages of the +deprecated MIPI DSI functions have been removed, their definitions may be +removed from ``drm_mipi_dsi.c``. Contact: Douglas Anderson -- cgit v1.2.3 From 784c99331c8d54a51d4f3e772c81f7fb82b7a1f8 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Wed, 30 Jul 2025 08:54:23 +0300 Subject: dt-bindings: display: bridge: Document Solomon SSD2825 Add bindings for Solomon SSD2825 MIPI master bridge chip that connects an application processor with traditional parallel LCD interface and an LCD driver with MIPI slave interface. The SSD2825 supports both parallel RGB interface and serial SPI interface. Signed-off-by: Svyatoslav Ryhel Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250730055424.6718-2-clamor95@gmail.com Signed-off-by: Dmitry Baryshkov --- .../bindings/display/bridge/solomon,ssd2825.yaml | 141 +++++++++++++++++++++ 1 file changed, 141 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/solomon,ssd2825.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/bridge/solomon,ssd2825.yaml b/Documentation/devicetree/bindings/display/bridge/solomon,ssd2825.yaml new file mode 100644 index 000000000000..e2d293d623b8 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/solomon,ssd2825.yaml @@ -0,0 +1,141 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/solomon,ssd2825.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Solomon SSD2825 RGB to MIPI-DSI bridge + +maintainers: + - Svyatoslav Ryhel + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + const: solomon,ssd2825 + + reg: + maxItems: 1 + + reset-gpios: true + + dvdd-supply: + description: Regulator for 1.2V digital power supply. + + avdd-supply: + description: Regulator for 1.2V analog power supply. + + vddio-supply: + description: Regulator for 1.8V IO power supply. + + spi-max-frequency: + maximum: 1000000 + + spi-cpha: true + spi-cpol: true + + clocks: + maxItems: 1 + description: Reference TX_CLK used before PLL is locked. + + solomon,hs-zero-delay-ns: + description: + HS zero delay period + minimum: 0 + maximum: 1700 + default: 133 + + solomon,hs-prep-delay-ns: + description: + HS prep delay period + minimum: 0 + maximum: 1728 + default: 40 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Video port for RGB input + + properties: + endpoint: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + unevaluatedProperties: false + + properties: + bus-width: + enum: [ 16, 18, 24 ] + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: + Video port for DSI output (panel or connector) + + required: + - port@0 + - port@1 + +required: + - compatible + - ports + +additionalProperties: false + +examples: + - | + #include + + spi { + #address-cells = <1>; + #size-cells = <0>; + + dsi@2 { + compatible = "solomon,ssd2825"; + reg = <2>; + + spi-max-frequency = <1000000>; + + spi-cpha; + spi-cpol; + + reset-gpios = <&gpio 114 GPIO_ACTIVE_LOW>; + + dvdd-supply = <&vdd_1v2>; + avdd-supply = <&vdd_1v2>; + vddio-supply = <&vdd_1v8_io>; + + solomon,hs-zero-delay-ns = <300>; + solomon,hs-prep-delay-ns = <65>; + + clocks = <&ssd2825_tx_clk>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + bridge_input: endpoint { + remote-endpoint = <&dpi_output>; + bus-width = <24>; + }; + }; + + port@1 { + reg = <1>; + + bridge_output: endpoint { + remote-endpoint = <&panel_input>; + }; + }; + }; + }; + }; -- cgit v1.2.3 From d680a7959b9d7cce9526b1b391cc7b13e313a096 Mon Sep 17 00:00:00 2001 From: Aleksandrs Vinarskis Date: Thu, 31 Jul 2025 23:55:08 +0200 Subject: dt-bindings: display: panel: samsung,atna40cu11: document ATNA40CU11 The Samsung ATNA40CU11 panel is a 14" AMOLED eDP panel. It is similar to the ATNA33XC20 except that it is larger and has a different resolution. It is found in some arm64 laptops, eg. Asus Zenbook A14 UX3407RA. Raw panel edid: 00 ff ff ff ff ff ff 00 4c 83 9d 41 00 00 00 00 00 20 01 04 b5 1e 13 78 03 cf d1 ae 51 3e b6 23 0b 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 cb fe 40 64 b0 08 38 77 20 08 88 00 2e bd 10 00 00 1b 00 00 00 fd 00 30 78 da da 42 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 fe 00 41 54 4e 41 34 30 43 55 31 31 2d 30 20 01 2a 70 20 79 02 00 20 00 0c 4c 83 00 9d 41 00 00 00 00 00 20 00 21 00 1d b8 0b 6c 07 40 0b 08 07 00 ee ea 50 ec d3 b6 3d 42 0b 01 45 54 40 5e d0 60 18 10 23 78 26 00 09 07 06 03 00 00 00 50 00 00 22 00 14 e7 f3 09 85 3f 0b 63 00 1f 00 07 00 07 07 17 00 07 00 07 00 81 00 1f 73 1a 00 00 03 03 30 78 00 a0 74 02 60 02 78 00 00 00 00 8d e3 05 80 00 e6 06 05 01 74 60 02 00 00 00 00 00 91 90 Acked-by: Krzysztof Kozlowski Signed-off-by: Aleksandrs Vinarskis Signed-off-by: Douglas Anderson Link: https://lore.kernel.org/r/20250731215635.206702-2-alex.vinarskis@gmail.com --- Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml b/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml index e36659340ef3..5e2ce200025f 100644 --- a/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml +++ b/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml @@ -21,6 +21,8 @@ properties: - enum: # Samsung 13" 3K (2880×1920 pixels) eDP AMOLED panel - samsung,atna30dw01 + # Samsung 14" WQXGA+ (2880x1800 pixels) eDP AMOLED panel + - samsung,atna40cu11 # Samsung 14" WQXGA+ (2880×1800 pixels) eDP AMOLED panel - samsung,atna40yk20 # Samsung 14.5" WQXGA+ (2880x1800 pixels) eDP AMOLED panel -- cgit v1.2.3 From d7c2aad1254a1b4e6d76947cbdd18813b02a0e24 Mon Sep 17 00:00:00 2001 From: Aleksandrs Vinarskis Date: Thu, 31 Jul 2025 23:55:09 +0200 Subject: dt-bindings: display: panel: samsung,atna40ct06: document ATNA40CT06 The Samsung ATNA40CT06 panel is a 14" AMOLED eDP panel. It is similar to the ATNA33XC20 except that it is larger and has a different resolution. It is found in some arm64 laptops, eg. Asus Zenbook A14 UX3407QA. Raw panel edid: 00 ff ff ff ff ff ff 00 4c 83 0d 42 00 00 00 00 00 22 01 04 b5 1e 13 78 02 0c f1 ae 52 3c b9 23 0c 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 42 3c 80 a0 70 b0 24 40 30 20 88 00 2e bd 10 00 00 1b 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 fc 00 41 54 4e 41 34 30 43 54 30 36 2d 30 20 01 7d 70 20 79 02 00 20 00 0c 4c 83 00 0d 42 00 00 00 00 00 22 00 21 00 1d ca 0b 5e 07 80 07 b0 04 00 e1 fa 51 cb 13 b9 3d d2 0c 01 45 54 40 5e d0 60 18 10 23 78 26 00 09 07 06 03 00 00 00 50 00 00 22 00 14 8d 5a 02 85 7f 07 9f 00 2f 00 1f 00 af 04 23 00 07 00 07 00 81 00 0b e3 05 80 00 e6 06 05 01 74 60 02 2e 00 06 00 45 40 5e d0 60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0 90 Acked-by: Krzysztof Kozlowski Signed-off-by: Aleksandrs Vinarskis Signed-off-by: Douglas Anderson Link: https://lore.kernel.org/r/20250731215635.206702-3-alex.vinarskis@gmail.com --- Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml b/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml index 5e2ce200025f..ccb574caed28 100644 --- a/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml +++ b/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml @@ -21,6 +21,8 @@ properties: - enum: # Samsung 13" 3K (2880×1920 pixels) eDP AMOLED panel - samsung,atna30dw01 + # Samsung 14" FHD+ (1920x1200 pixels) eDP AMOLED panel + - samsung,atna40ct06 # Samsung 14" WQXGA+ (2880x1800 pixels) eDP AMOLED panel - samsung,atna40cu11 # Samsung 14" WQXGA+ (2880×1800 pixels) eDP AMOLED panel -- cgit v1.2.3 From 1da71a08080bb5cf5601f237e94c3dd5cede446b Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Wed, 2 Jul 2025 10:22:29 +0200 Subject: dt-bindings: display: simple: Add Olimex LCD-OLinuXino-5CTS Add the Olimex LCD-OLinuXino-5CTS, a 5-inch TFT LCD panel. Signed-off-by: Paul Kocialkowski Acked-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20250702082230.1291953-1-paulk@sys-base.io --- Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index 1ac1f0219079..a03a9f1dd9f6 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -236,6 +236,8 @@ properties: - okaya,rs800480t-7x0gp # Olimex 4.3" TFT LCD panel - olimex,lcd-olinuxino-43-ts + # Olimex 5.0" TFT LCD panel + - olimex,lcd-olinuxino-5-cts # On Tat Industrial Company 5" DPI TFT panel. - ontat,kd50g21-40nt-a1 # On Tat Industrial Company 7" DPI TFT panel. -- cgit v1.2.3 From f3e1caef597e7f29dd2326dae7fa5964ae46c91d Mon Sep 17 00:00:00 2001 From: Kaustabh Chakraborty Date: Mon, 21 Jul 2025 20:08:59 +0530 Subject: dt-bindings: display: panel: document Samsung AMS561RA01 panel with S6E8AA5X01 controller Samsung AMS561RA01 is an AMOLED panel, using the Samsung S6E8AA5X01 MIPI DSI panel controller. Document the compatible and devicetree properties of this hardware. It has a reset GPIO and two voltage regulators. Acked-by: Conor Dooley Signed-off-by: Kaustabh Chakraborty Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20250721-panel-samsung-s6e8aa5x01-v5-1-1a315aba530b@disroot.org --- .../panel/samsung,s6e8aa5x01-ams561ra01.yaml | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/samsung,s6e8aa5x01-ams561ra01.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/samsung,s6e8aa5x01-ams561ra01.yaml b/Documentation/devicetree/bindings/display/panel/samsung,s6e8aa5x01-ams561ra01.yaml new file mode 100644 index 000000000000..eccfc66d7fe2 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/samsung,s6e8aa5x01-ams561ra01.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/samsung,s6e8aa5x01-ams561ra01.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung AMS561RA01 panel with S6E8AA5X01 controller + +maintainers: + - Kaustabh Chakraborty + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: samsung,s6e8aa5x01-ams561ra01 + + reg: + maxItems: 1 + + vdd-supply: + description: core voltage supply + + vci-supply: + description: voltage supply for analog circuits + + reset-gpios: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "samsung,s6e8aa5x01-ams561ra01"; + reg = <0>; + + vdd-supply = <&panel_vdd_reg>; + vci-supply = <&panel_vci_reg>; + + reset-gpios = <&gpd3 4 GPIO_ACTIVE_HIGH>; + }; + }; + +... -- cgit v1.2.3 From bd068333ef090d63a7cf952d70040e768b0aa4cf Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Thu, 17 Jul 2025 16:57:51 +0300 Subject: dt-bindings: display: panel: Document Hydis HV101HD1 DSI panel Hydis HV101HD1 is a 2-lane 1366x768 MIPI DSI panel found in ASUS VivoTab RT TF600T tablet. Signed-off-by: Svyatoslav Ryhel Reviewed-by: Rob Herring (Arm) Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20250717135752.55958-2-clamor95@gmail.com --- .../bindings/display/panel/hydis,hv101hd1.yaml | 60 ++++++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/hydis,hv101hd1.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/hydis,hv101hd1.yaml b/Documentation/devicetree/bindings/display/panel/hydis,hv101hd1.yaml new file mode 100644 index 000000000000..f429e84ee65d --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/hydis,hv101hd1.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/hydis,hv101hd1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hydis HV101HD1 DSI Display Panel + +maintainers: + - Svyatoslav Ryhel + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: hydis,hv101hd1 + + reg: + maxItems: 1 + + vdd-supply: true + vio-supply: true + + backlight: true + port: true + +required: + - compatible + - vdd-supply + - vio-supply + - backlight + +additionalProperties: false + +examples: + - | + #include + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "hydis,hv101hd1"; + reg = <0>; + + vdd-supply = <&vdd_lcd>; + vio-supply = <&vddio_lcd>; + + backlight = <&backlight>; + + port { + panel_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + }; + }; +... -- cgit v1.2.3 From 810a8809ccc69a67af74f3bd63f4d99da08049e7 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 28 Jul 2025 11:15:40 -0400 Subject: Documentation: update APU and dGPU tables with MP0/1 info Add MP1 for APUs and MP0 and MP1 details for dGPUs. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3905 Reviewed-by: Mario Limonciello Signed-off-by: Alex Deucher --- .../gpu/amdgpu/amd-hardware-list-info.rst | 4 +- Documentation/gpu/amdgpu/apu-asic-info-table.csv | 34 ++++++------- Documentation/gpu/amdgpu/dgpu-asic-info-table.csv | 56 +++++++++++----------- 3 files changed, 47 insertions(+), 47 deletions(-) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/amd-hardware-list-info.rst b/Documentation/gpu/amdgpu/amd-hardware-list-info.rst index 1786544fe7c1..e72f4ff770c4 100644 --- a/Documentation/gpu/amdgpu/amd-hardware-list-info.rst +++ b/Documentation/gpu/amdgpu/amd-hardware-list-info.rst @@ -10,7 +10,7 @@ Accelerated Processing Units (APU) Info .. csv-table:: :header-rows: 1 - :widths: 3, 2, 2, 1, 1, 1, 1 + :widths: 3, 2, 2, 1, 1, 1, 1, 1 :file: ./apu-asic-info-table.csv Discrete GPU Info @@ -18,6 +18,6 @@ Discrete GPU Info .. csv-table:: :header-rows: 1 - :widths: 3, 2, 2, 1, 1, 1 + :widths: 3, 2, 2, 1, 1, 1, 1, 1 :file: ./dgpu-asic-info-table.csv diff --git a/Documentation/gpu/amdgpu/apu-asic-info-table.csv b/Documentation/gpu/amdgpu/apu-asic-info-table.csv index 1d50b539677f..b479c5629146 100644 --- a/Documentation/gpu/amdgpu/apu-asic-info-table.csv +++ b/Documentation/gpu/amdgpu/apu-asic-info-table.csv @@ -1,17 +1,17 @@ -Product Name, Code Reference, DCN/DCE version, GC version, VCE/UVD/VCN version, SDMA version, MP0 version -Radeon R* Graphics, CARRIZO/STONEY, DCE 11, 8, VCE 3 / UVD 6, 3, n/a -Ryzen 3000 series / AMD Ryzen Embedded V1*/R1* with Radeon Vega Gfx, RAVEN/PICASSO, DCN 1.0, 9.1.0, VCN 1.0, 4.1.0, 10.0.0 -Ryzen 4000 series, RENOIR, DCN 2.1, 9.3, VCN 2.2, 4.1.2, 11.0.3 -Ryzen 3000 series / AMD Ryzen Embedded V1*/R1* with Radeon Vega Gfx, RAVEN2, DCN 1.0, 9.2.2, VCN 1.0.1, 4.1.1, 10.0.1 -SteamDeck, VANGOGH, DCN 3.0.1, 10.3.1, VCN 3.1.0, 5.2.1, 11.5.0 -Ryzen 5000 series / Ryzen 7x30 series, GREEN SARDINE / Cezanne / Barcelo / Barcelo-R, DCN 2.1, 9.3, VCN 2.2, 4.1.1, 12.0.1 -Ryzen 6000 series / Ryzen 7x35 series / Ryzen 7x36 series, YELLOW CARP / Rembrandt / Rembrandt-R, 3.1.2, 10.3.3, VCN 3.1.1, 5.2.3, 13.0.3 -Ryzen 7000 series (AM5), Raphael, 3.1.5, 10.3.6, 3.1.2, 5.2.6, 13.0.5 -Ryzen 9000 series (AM5), Granite Ridge, 3.1.5, 10.3.6, 3.1.2, 5.2.6, 13.0.5 -Ryzen 7x45 series (FL1), Dragon Range, 3.1.5, 10.3.6, 3.1.2, 5.2.6, 13.0.5 -Ryzen 7x20 series, Mendocino, 3.1.6, 10.3.7, 3.1.1, 5.2.7, 13.0.8 -Ryzen 7x40 series, Phoenix, 3.1.4, 11.0.1 / 11.0.4, 4.0.2, 6.0.1, 13.0.4 / 13.0.11 -Ryzen 8x40 series, Hawk Point, 3.1.4, 11.0.1 / 11.0.4, 4.0.2, 6.0.1, 13.0.4 / 13.0.11 -Ryzen AI 300 series, Strix Point, 3.5.0, 11.5.0, 4.0.5, 6.1.0, 14.0.0 -Ryzen AI 350 series, Krackan Point, 3.5.0, 11.5.2, 4.0.5, 6.1.2, 14.0.4 -Ryzen AI Max 300 series, Strix Halo, 3.5.1, 11.5.1, 4.0.6, 6.1.1, 14.0.1 +Product Name, Code Reference, DCN/DCE version, GC version, VCE/UVD/VCN version, SDMA version, MP0 version, MP1 version +Radeon R* Graphics, CARRIZO/STONEY, DCE 11, 8, VCE 3 / UVD 6, 3, n/a, 8 +Ryzen 3000 series / AMD Ryzen Embedded V1*/R1* with Radeon Vega Gfx, RAVEN/PICASSO, DCN 1.0, 9.1.0, VCN 1.0, 4.1.0, 10.0.0, 10.0.0 +Ryzen 4000 series, RENOIR, DCN 2.1, 9.3, VCN 2.2, 4.1.2, 11.0.3, 12.0.1 +Ryzen 3000 series / AMD Ryzen Embedded V1*/R1* with Radeon Vega Gfx, RAVEN2, DCN 1.0, 9.2.2, VCN 1.0.1, 4.1.1, 10.0.1, 10.0.1 +SteamDeck, VANGOGH, DCN 3.0.1, 10.3.1, VCN 3.1.0, 5.2.1, 11.5.0, 11.5.0 +Ryzen 5000 series / Ryzen 7x30 series, GREEN SARDINE / Cezanne / Barcelo / Barcelo-R, DCN 2.1, 9.3, VCN 2.2, 4.1.1, 12.0.1, 12.0.1 +Ryzen 6000 series / Ryzen 7x35 series / Ryzen 7x36 series, YELLOW CARP / Rembrandt / Rembrandt-R, 3.1.2, 10.3.3, VCN 3.1.1, 5.2.3, 13.0.3, 13.0.3 +Ryzen 7000 series (AM5), Raphael, 3.1.5, 10.3.6, 3.1.2, 5.2.6, 13.0.5, 13.0.5 +Ryzen 9000 series (AM5), Granite Ridge, 3.1.5, 10.3.6, 3.1.2, 5.2.6, 13.0.5, 13.0.5 +Ryzen 7x45 series (FL1), Dragon Range, 3.1.5, 10.3.6, 3.1.2, 5.2.6, 13.0.5, 13.0.5 +Ryzen 7x20 series, Mendocino, 3.1.6, 10.3.7, 3.1.1, 5.2.7, 13.0.8, 13.0.8 +Ryzen 7x40 series, Phoenix, 3.1.4, 11.0.1 / 11.0.4, 4.0.2, 6.0.1, 13.0.4 / 13.0.11, 13.0.4 / 13.0.11 +Ryzen 8x40 series, Hawk Point, 3.1.4, 11.0.1 / 11.0.4, 4.0.2, 6.0.1, 13.0.4 / 13.0.11, 13.0.4 / 13.0.11 +Ryzen AI 300 series, Strix Point, 3.5.0, 11.5.0, 4.0.5, 6.1.0, 14.0.0, 14.0.0 +Ryzen AI 350 series, Krackan Point, 3.5.0, 11.5.2, 4.0.5, 6.1.2, 14.0.4, 14.0.4 +Ryzen AI Max 300 series, Strix Halo, 3.5.1, 11.5.1, 4.0.6, 6.1.1, 14.0.1, 14.0.1 diff --git a/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv b/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv index d2f10ee69dfc..0f822a252fcb 100644 --- a/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv +++ b/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv @@ -1,28 +1,28 @@ -Product Name, Code Reference, DCN/DCE version, GC version, VCN version, SDMA version -AMD Radeon (TM) HD 8500M/ 8600M /M200 /M320 /M330 /M335 Series, HAINAN, --, 6, --, -- -AMD Radeon HD 7800 /7900 /FireGL Series, TAHITI, DCE 6, 6, VCE 1 / UVD 3, -- -AMD Radeon R7 (TM|HD) M265 /M370 /8500M /8600 /8700 /8700M, OLAND, DCE 6, 6, VCE 1 / UVD 3, -- -AMD Radeon (TM) (HD|R7) 7800 /7970 /8800 /8970 /370/ Series, PITCAIRN, DCE 6, 6, VCE 1 / UVD 3, -- -AMD Radeon (TM|R7|R9|HD) E8860 /M360 /7700 /7800 /8800 /9000(M) /W4100 Series, VERDE, DCE 6, 6, VCE 1 / UVD 3, -- -AMD Radeon HD M280X /M380 /7700 /8950 /W5100, BONAIRE, DCE 8, 7, VCE 2 / UVD 4.2, 1 -AMD Radeon (R9|TM) 200 /390 /W8100 /W9100 Series, HAWAII, DCE 8, 7, VCE 2 / UVD 4.2, 1 -AMD Radeon (TM) R(5|7) M315 /M340 /M360, TOPAZ, *, 8, --, 2 -AMD Radeon (TM) R9 200 /380 /W7100 /S7150 /M390 /M395 Series, TONGA, DCE 10, 8, VCE 3 / UVD 5, 3 -AMD Radeon (FirePro) (TM) R9 Fury Series, FIJI, DCE 10, 8, VCE 3 / UVD 6, 3 -Radeon RX 470 /480 /570 /580 /590 Series - AMD Radeon (TM) (Pro WX) 5100 /E9390 /E9560 /E9565 /V7350 /7100 /P30PH, POLARIS10, DCE 11.2, 8, VCE 3.4 / UVD 6.3, 3 -Radeon (TM) (RX|Pro WX) E9260 /460 /V5300X /550 /560(X) Series, POLARIS11, DCE 11.2, 8, VCE 3.4 / UVD 6.3, 3 -Radeon (RX/Pro) 500 /540(X) /550 /640 /WX2100 /WX3100 /WX200 Series, POLARIS12, DCE 11.2, 8, VCE 3.4 / UVD 6.3, 3 -Radeon (RX|TM) (PRO|WX) Vega /MI25 /V320 /V340L /8200 /9100 /SSG MxGPU, VEGA10, DCE 12, 9.0.1, VCE 4.0.0 / UVD 7.0.0, 4.0.0 -AMD Radeon (Pro) VII /MI50 /MI60, VEGA20, DCE 12, 9.4.0, VCE 4.1.0 / UVD 7.2.0, 4.2.0 -MI100, ARCTURUS, *, 9.4.1, VCN 2.5.0, 4.2.2 -MI200 Series, ALDEBARAN, *, 9.4.2, VCN 2.6.0, 4.4.0 -MI300 Series, AQUA_VANJARAM, *, 9.4.3, VCN 4.0.3, 4.4.2 -AMD Radeon (RX|Pro) 5600(M|XT) /5700 (M|XT|XTB) /W5700, NAVI10, DCN 2.0.0, 10.1.10, VCN 2.0.0, 5.0.0 -AMD Radeon (Pro) 5300 /5500XTB/5500(XT|M) /W5500M /W5500, NAVI14, DCN 2.0.0, 10.1.1, VCN 2.0.2, 5.0.2 -AMD Radeon RX 6800(XT) /6900(XT) /W6800, SIENNA_CICHLID, DCN 3.0.0, 10.3.0, VCN 3.0.0, 5.2.0 -AMD Radeon RX 6700 XT / 6800M / 6700M, NAVY_FLOUNDER, DCN 3.0.0, 10.3.2, VCN 3.0.0, 5.2.2 -AMD Radeon RX 6600(XT) /6600M /W6600 /W6600M, DIMGREY_CAVEFISH, DCN 3.0.2, 10.3.4, VCN 3.0.16, 5.2.4 -AMD Radeon RX 6500M /6300M /W6500M /W6300M, BEIGE_GOBY, DCN 3.0.3, 10.3.5, VCN 3.0.33, 5.2.5 -AMD Radeon RX 7900 XT /XTX, , DCN 3.2.0, 11.0.0, VCN 4.0.0, 6.0.0 -AMD Radeon RX 7800 XT, , DCN 3.2.0, 11.0.3, VCN 4.0.0, 6.0.3 -AMD Radeon RX 7600M (XT) /7700S /7600S, , DCN 3.2.1, 11.0.2, VCN 4.0.4, 6.0.2 +Product Name, Code Reference, DCN/DCE version, GC version, VCN version, SDMA version, MP0 version, MP1 version +AMD Radeon (TM) HD 8500M/ 8600M /M200 /M320 /M330 /M335 Series, HAINAN, --, 6, --, --, --, 6 +AMD Radeon HD 7800 /7900 /FireGL Series, TAHITI, DCE 6, 6, VCE 1 / UVD 3, --, --, 6 +AMD Radeon R7 (TM|HD) M265 /M370 /8500M /8600 /8700 /8700M, OLAND, DCE 6, 6, VCE 1 / UVD 3, --, --, 6 +AMD Radeon (TM) (HD|R7) 7800 /7970 /8800 /8970 /370/ Series, PITCAIRN, DCE 6, 6, VCE 1 / UVD 3, --, --, 6 +AMD Radeon (TM|R7|R9|HD) E8860 /M360 /7700 /7800 /8800 /9000(M) /W4100 Series, VERDE, DCE 6, 6, VCE 1 / UVD 3, --, --, 6 +AMD Radeon HD M280X /M380 /7700 /8950 /W5100, BONAIRE, DCE 8, 7, VCE 2 / UVD 4.2, 1, --, 7 +AMD Radeon (R9|TM) 200 /390 /W8100 /W9100 Series, HAWAII, DCE 8, 7, VCE 2 / UVD 4.2, 1, --, 7 +AMD Radeon (TM) R(5|7) M315 /M340 /M360, TOPAZ, *, 8, --, 2, n/a, 7 +AMD Radeon (TM) R9 200 /380 /W7100 /S7150 /M390 /M395 Series, TONGA, DCE 10, 8, VCE 3 / UVD 5, 3, n/a, 7 +AMD Radeon (FirePro) (TM) R9 Fury Series, FIJI, DCE 10, 8, VCE 3 / UVD 6, 3, n/a, 7 +Radeon RX 470 /480 /570 /580 /590 Series - AMD Radeon (TM) (Pro WX) 5100 /E9390 /E9560 /E9565 /V7350 /7100 /P30PH, POLARIS10, DCE 11.2, 8, VCE 3.4 / UVD 6.3, 3, n/a, 7 +Radeon (TM) (RX|Pro WX) E9260 /460 /V5300X /550 /560(X) Series, POLARIS11, DCE 11.2, 8, VCE 3.4 / UVD 6.3, 3, n/a, 7 +Radeon (RX/Pro) 500 /540(X) /550 /640 /WX2100 /WX3100 /WX200 Series, POLARIS12, DCE 11.2, 8, VCE 3.4 / UVD 6.3, 3, n/a, 7 +Radeon (RX|TM) (PRO|WX) Vega /MI25 /V320 /V340L /8200 /9100 /SSG MxGPU, VEGA10, DCE 12, 9.0.1, VCE 4.0.0 / UVD 7.0.0, 4.0.0, 9.0.0, 9.0.0 +AMD Radeon (Pro) VII /MI50 /MI60, VEGA20, DCE 12, 9.4.0, VCE 4.1.0 / UVD 7.2.0, 4.2.0, 11.0.2, 11.0.2 +MI100, ARCTURUS, *, 9.4.1, VCN 2.5.0, 4.2.2, 11.0.4, 11.0.2 +MI200 Series, ALDEBARAN, *, 9.4.2, VCN 2.6.0, 4.4.0, 13.0.2, 13.0.2 +MI300 Series, AQUA_VANJARAM, *, 9.4.3, VCN 4.0.3, 4.4.2, 13.0.6, 13.0.6 +AMD Radeon (RX|Pro) 5600(M|XT) /5700 (M|XT|XTB) /W5700, NAVI10, DCN 2.0.0, 10.1.10, VCN 2.0.0, 5.0.0, 11.0.0, 11.0.0 +AMD Radeon (Pro) 5300 /5500XTB/5500(XT|M) /W5500M /W5500, NAVI14, DCN 2.0.0, 10.1.1, VCN 2.0.2, 5.0.2, 11.0.5, 11.0.5 +AMD Radeon RX 6800(XT) /6900(XT) /W6800, SIENNA_CICHLID, DCN 3.0.0, 10.3.0, VCN 3.0.0, 5.2.0, 11.0.7, 11.0.7 +AMD Radeon RX 6700 XT / 6800M / 6700M, NAVY_FLOUNDER, DCN 3.0.0, 10.3.2, VCN 3.0.0, 5.2.2, 11.0.11, 11.0.11 +AMD Radeon RX 6600(XT) /6600M /W6600 /W6600M, DIMGREY_CAVEFISH, DCN 3.0.2, 10.3.4, VCN 3.0.16, 5.2.4, 11.0.12, 11.0.12 +AMD Radeon RX 6500M /6300M /W6500M /W6300M, BEIGE_GOBY, DCN 3.0.3, 10.3.5, VCN 3.0.33, 5.2.5, 11.0.13, 11.0.13 +AMD Radeon RX 7900 XT /XTX, , DCN 3.2.0, 11.0.0, VCN 4.0.0, 6.0.0, 13.0.0, 13.0.0 +AMD Radeon RX 7800 XT, , DCN 3.2.0, 11.0.3, VCN 4.0.0, 6.0.3, 13.0.10, 13.0.10 +AMD Radeon RX 7600M (XT) /7700S /7600S, , DCN 3.2.1, 11.0.2, VCN 4.0.4, 6.0.2, 13.0.7, 13.0.7 -- cgit v1.2.3 From 8f249ba6ec607313c2dd5d6c8f99ad647c99af02 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 28 Jul 2025 11:21:19 -0400 Subject: Documentation: add RDNA4 dGPUs Add RDNA4 dGPUs to the dGPU table. Link: https://www.amd.com/en/products/graphics/desktops/radeon/9000-series/amd-radeon-rx-9070xt.html Link: https://www.amd.com/en/products/graphics/desktops/radeon/9000-series/amd-radeon-rx-9070.html Link: https://www.amd.com/en/products/graphics/desktops/radeon/9000-series/amd-radeon-rx-9060xt.html Link: https://www.amd.com/en/products/graphics/desktops/radeon/9000-series/amd-radeon-rx-9060xt-8gb.html Reviewed-by: Mario Limonciello Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/dgpu-asic-info-table.csv | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv b/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv index 0f822a252fcb..a3796daec9ec 100644 --- a/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv +++ b/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv @@ -26,3 +26,5 @@ AMD Radeon RX 6500M /6300M /W6500M /W6300M, BEIGE_GOBY, DCN 3.0.3, 10.3.5, VCN 3 AMD Radeon RX 7900 XT /XTX, , DCN 3.2.0, 11.0.0, VCN 4.0.0, 6.0.0, 13.0.0, 13.0.0 AMD Radeon RX 7800 XT, , DCN 3.2.0, 11.0.3, VCN 4.0.0, 6.0.3, 13.0.10, 13.0.10 AMD Radeon RX 7600M (XT) /7700S /7600S, , DCN 3.2.1, 11.0.2, VCN 4.0.4, 6.0.2, 13.0.7, 13.0.7 +AMD Radeon RX 9070 (XT), , DCN 4.0.1, 12.0.1, VCN 5.0.0, 7.0.1, 14.0.3, 14.0.3 +AMD Radeon RX 9060 XT, , DCN 4.0.1, 12.0.0, VCN 5.0.0, 7.0.0, 14.0.2, 14.0.2 -- cgit v1.2.3 From 01048738d6b618fc1dba564b38b3df06b0937eb0 Mon Sep 17 00:00:00 2001 From: Joseph Guo Date: Wed, 6 Aug 2025 10:33:32 +0900 Subject: dt-bindings: display: bridge: Add waveshare DSI2DPI unit support Add dt-binding documentation for waveshare DSI2DPI unit Signed-off-by: Joseph Guo Suggested-by: Liu Ying Reviewed-by: Rob Herring (Arm) Acked-by: Liu Ying Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20250806-waveshare-v3-1-fd28e01f064f@nxp.com --- .../bindings/display/bridge/waveshare,dsi2dpi.yaml | 103 +++++++++++++++++++++ 1 file changed, 103 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/waveshare,dsi2dpi.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/bridge/waveshare,dsi2dpi.yaml b/Documentation/devicetree/bindings/display/bridge/waveshare,dsi2dpi.yaml new file mode 100644 index 000000000000..5e8498c8303d --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/waveshare,dsi2dpi.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/waveshare,dsi2dpi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Waveshare MIPI-DSI to DPI Converter bridge + +maintainers: + - Joseph Guo + +description: + Waveshare bridge board is part of Waveshare panel which converts DSI to DPI. + +properties: + compatible: + const: waveshare,dsi2dpi + + reg: + maxItems: 1 + description: base I2C address of the device + + power-supply: true + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Video port for MIPI DSI input + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + description: array of physical DSI data lane indexes. + items: + - const: 1 + - const: 2 + + required: + - data-lanes + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: + Video port for MIPI DPI output panel. + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - ports + - power-supply + +additionalProperties: false + +examples: + - | + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + bridge@45 { + compatible = "waveshare,dsi2dpi"; + reg = <0x45>; + power-supply = <®_3p3v>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + waveshare_from_dsim: endpoint { + data-lanes = <1 2>; + remote-endpoint = <&dsim_to_waveshare>; + }; + }; + + port@1 { + reg = <1>; + + waveshare_to_panel: endpoint { + remote-endpoint = <&panel_to_waveshare>; + }; + }; + }; + }; + }; + +... -- cgit v1.2.3 From 80b0eb11f8e0a504078c3b405b54cddaf535ff97 Mon Sep 17 00:00:00 2001 From: Joseph Guo Date: Wed, 6 Aug 2025 10:33:33 +0900 Subject: dt-bindings: display: panel: Add waveshare DPI panel support Add dt-binding documentation for waveshare DPI panel Signed-off-by: Joseph Guo Suggested-by: Liu Ying Acked-by: Rob Herring (Arm) Acked-by: Liu Ying Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20250806-waveshare-v3-2-fd28e01f064f@nxp.com --- Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index a03a9f1dd9f6..5e8dc9afa1fd 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -323,6 +323,10 @@ properties: - vivax,tpc9150-panel # VXT 800x480 color TFT LCD panel - vxt,vl050-8048nt-c01 + # Waveshare 13.3" FHD (1920x1080) LCD panel + - waveshare,13.3inch-panel + # Waveshare 7.0" WSVGA (1024x600) LCD panel + - waveshare,7.0inch-c-panel # Winstar Display Corporation 3.5" QVGA (320x240) TFT LCD panel - winstar,wf35ltiacd # Yes Optoelectronics YTC700TLAG-05-201C 7" TFT LCD panel -- cgit v1.2.3 From 1b392348de8ffc340545c62079645cb4695f5602 Mon Sep 17 00:00:00 2001 From: Alexandre Demers Date: Sat, 2 Aug 2025 22:27:31 -0400 Subject: Documentation: Remove VCE support from OLAND's features OLAND doesn't support VCE at all, but it does support UVD (3 or 4, depending of the sources). Signed-off-by: Alexandre Demers Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/dgpu-asic-info-table.csv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv b/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv index a3796daec9ec..bfd44c6e052a 100644 --- a/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv +++ b/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv @@ -1,7 +1,7 @@ Product Name, Code Reference, DCN/DCE version, GC version, VCN version, SDMA version, MP0 version, MP1 version AMD Radeon (TM) HD 8500M/ 8600M /M200 /M320 /M330 /M335 Series, HAINAN, --, 6, --, --, --, 6 AMD Radeon HD 7800 /7900 /FireGL Series, TAHITI, DCE 6, 6, VCE 1 / UVD 3, --, --, 6 -AMD Radeon R7 (TM|HD) M265 /M370 /8500M /8600 /8700 /8700M, OLAND, DCE 6, 6, VCE 1 / UVD 3, --, --, 6 +AMD Radeon R7 (TM|HD) M265 /M370 /8500M /8600 /8700 /8700M, OLAND, DCE 6, 6, -- / UVD 3, --, --, 6 AMD Radeon (TM) (HD|R7) 7800 /7970 /8800 /8970 /370/ Series, PITCAIRN, DCE 6, 6, VCE 1 / UVD 3, --, --, 6 AMD Radeon (TM|R7|R9|HD) E8860 /M360 /7700 /7800 /8800 /9000(M) /W4100 Series, VERDE, DCE 6, 6, VCE 1 / UVD 3, --, --, 6 AMD Radeon HD M280X /M380 /7700 /8950 /W5100, BONAIRE, DCE 8, 7, VCE 2 / UVD 4.2, 1, --, 7 -- cgit v1.2.3 From 605d902bb6b6f5b12a5baeaca0dc359ced7685cb Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 7 Aug 2025 16:43:57 -0500 Subject: ASoC: dt-bindings: Drop imx-audio-sgtl5000.txt The "fsl,imx-audio-sgtl5000" binding is already covered by fsl-asoc-card.yaml, so remove the old text binding. Signed-off-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250807214358.4172451-1-robh@kernel.org Acked-by: Conor Dooley Signed-off-by: Mark Brown --- .../bindings/sound/imx-audio-sgtl5000.txt | 56 ---------------------- 1 file changed, 56 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt b/Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt deleted file mode 100644 index 2f89db88fd57..000000000000 --- a/Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt +++ /dev/null @@ -1,56 +0,0 @@ -Freescale i.MX audio complex with SGTL5000 codec - -Required properties: - - - compatible : "fsl,imx-audio-sgtl5000" - - - model : The user-visible name of this sound complex - - - ssi-controller : The phandle of the i.MX SSI controller - - - audio-codec : The phandle of the SGTL5000 audio codec - - - audio-routing : A list of the connections between audio components. - Each entry is a pair of strings, the first being the - connection's sink, the second being the connection's - source. Valid names could be power supplies, SGTL5000 - pins, and the jacks on the board: - - Power supplies: - * Mic Bias - - SGTL5000 pins: - * MIC_IN - * LINE_IN - * HP_OUT - * LINE_OUT - - Board connectors: - * Mic Jack - * Line In Jack - * Headphone Jack - * Line Out Jack - * Ext Spk - - - mux-int-port : The internal port of the i.MX audio muxer (AUDMUX) - - - mux-ext-port : The external port of the i.MX audio muxer - -Note: The AUDMUX port numbering should start at 1, which is consistent with -hardware manual. - -Example: - -sound { - compatible = "fsl,imx51-babbage-sgtl5000", - "fsl,imx-audio-sgtl5000"; - model = "imx51-babbage-sgtl5000"; - ssi-controller = <&ssi1>; - audio-codec = <&sgtl5000>; - audio-routing = - "MIC_IN", "Mic Jack", - "Mic Jack", "Mic Bias", - "Headphone Jack", "HP_OUT"; - mux-int-port = <1>; - mux-ext-port = <3>; -}; -- cgit v1.2.3 From 82f0907931f016c04bcb992f764bd65992c7008e Mon Sep 17 00:00:00 2001 From: Joy Zou Date: Thu, 31 Jul 2025 18:44:41 +0800 Subject: dt-bindings: regulator: add PF0900 regulator yaml Add device binding doc for PF0900 PMIC driver. Can not get the I2C_CRC_EN config by reading register. If the PMIC OTP_I2C_CRC_EN is enable, need to add the nxp,i2c-crc-enable property. Signed-off-by: Joy Zou Link: https://patch.msgid.link/20250731-b4-pf09-v2-v3-1-4c2659516582@nxp.com Reviewed-by: Rob Herring (Arm) Signed-off-by: Mark Brown --- .../devicetree/bindings/regulator/nxp,pf0900.yaml | 163 +++++++++++++++++++++ 1 file changed, 163 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/nxp,pf0900.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/regulator/nxp,pf0900.yaml b/Documentation/devicetree/bindings/regulator/nxp,pf0900.yaml new file mode 100644 index 000000000000..8c8fc2cd4ced --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/nxp,pf0900.yaml @@ -0,0 +1,163 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/nxp,pf0900.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP PF0900 Power Management Integrated Circuit regulators + +maintainers: + - Joy Zou + +description: + The PF0900 is a power management integrated circuit (PMIC) optimized + for high performance i.MX9x based applications. It features five high + efficiency buck converters, three linear and one vaon regulators. It + provides low quiescent current in Standby and low power off Modes. + +properties: + compatible: + enum: + - nxp,pf0900 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + regulators: + type: object + additionalProperties: false + + properties: + vaon: + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + + patternProperties: + "^ldo[1-3]$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + + "^sw[1-5]$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + + nxp,i2c-crc-enable: + type: boolean + description: + The CRC enabled during register read/write. Controlled by customer + unviewable fuse bits OTP_I2C_CRC_EN. Check chip part number. + +required: + - compatible + - reg + - interrupts + - regulators + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@8 { + compatible = "nxp,pf0900"; + reg = <0x08>; + interrupt-parent = <&pcal6524>; + interrupts = <89 IRQ_TYPE_LEVEL_LOW>; + nxp,i2c-crc-enable; + + regulators { + vaon { + regulator-name = "VAON"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + sw1 { + regulator-name = "SW1"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <1950>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-max-microvolt = <650000>; + regulator-suspend-min-microvolt = <650000>; + }; + }; + + sw2 { + regulator-name = "SW2"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <1950>; + }; + + sw3 { + regulator-name = "SW3"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <1950>; + }; + + sw4 { + regulator-name = "SW4"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <1950>; + }; + + sw5 { + regulator-name = "SW5"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <1950>; + }; + + ldo1 { + regulator-name = "LDO1"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo2 { + regulator-name = "LDO2"; + regulator-min-microvolt = <650000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo3 { + regulator-name = "LDO3"; + regulator-min-microvolt = <650000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + }; -- cgit v1.2.3 From 83656699ba3ab61a86b83daf4579cb5598d68c55 Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Sun, 27 Jul 2025 22:56:08 -0700 Subject: dt-bindings: arm: aspeed: add Facebook Wedge400-data64 board Document the new compatibles used on Meta/Facebook Wedge400-data64 board. Signed-off-by: Tao Ren Acked-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250728055618.61616-7-rentao.bupt@gmail.com Signed-off-by: Andrew Jeffery --- Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml index 456dbf7b5ec8..5a01e2f4ce20 100644 --- a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml +++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml @@ -46,6 +46,7 @@ properties: - facebook,yamp-bmc - facebook,yosemitev2-bmc - facebook,wedge400-bmc + - facebook,wedge400-data64-bmc - hxt,stardragon4800-rep2-bmc - ibm,mihawk-bmc - ibm,mowgli-bmc -- cgit v1.2.3 From 36296b06cd50e790d1769bb1299670b5c83ba3a7 Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Sun, 27 Jul 2025 22:56:11 -0700 Subject: dt-bindings: arm: aspeed: add Facebook Fuji-data64 board Document the new compatibles used on Meta/Facebook Fuji-data64 board. Signed-off-by: Tao Ren Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250728055618.61616-10-rentao.bupt@gmail.com Signed-off-by: Andrew Jeffery --- Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml index 5a01e2f4ce20..e06a2e75e00d 100644 --- a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml +++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml @@ -85,6 +85,7 @@ properties: - facebook,cloudripper-bmc - facebook,elbert-bmc - facebook,fuji-bmc + - facebook,fuji-data64-bmc - facebook,greatlakes-bmc - facebook,harma-bmc - facebook,minerva-cmc -- cgit v1.2.3 From 0ae11080995f30cfb8362d5680e361da04fa6f79 Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Sun, 27 Jul 2025 22:56:14 -0700 Subject: dt-bindings: arm: aspeed: add Facebook Darwin board Document the new compatibles used on Meta/Facebook Darwin board. Signed-off-by: Tao Ren Acked-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250728055618.61616-13-rentao.bupt@gmail.com Signed-off-by: Andrew Jeffery --- Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml index e06a2e75e00d..b3c9d3310d57 100644 --- a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml +++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml @@ -83,6 +83,7 @@ properties: - facebook,bletchley-bmc - facebook,catalina-bmc - facebook,cloudripper-bmc + - facebook,darwin-bmc - facebook,elbert-bmc - facebook,fuji-bmc - facebook,fuji-data64-bmc -- cgit v1.2.3 From e9d84a1f8bfe85b6c406c4a088e537d4a5f83a87 Mon Sep 17 00:00:00 2001 From: Wasim Nazir Date: Sun, 3 Aug 2025 16:31:11 +0530 Subject: dt-bindings: arm: qcom: lemans: Add bindings for Lemans Evaluation Kit (EVK) Introduce new bindings for the Lemans EVK, an IoT board without safety features. Signed-off-by: Wasim Nazir Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250803110113.401927-8-wasim.nazir@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index ae43b3556580..bf5f3beb320b 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -969,6 +969,7 @@ properties: - items: - enum: + - qcom,lemans-evk - qcom,qcs9100-ride - qcom,qcs9100-ride-r3 - const: qcom,qcs9100 -- cgit v1.2.3 From 684339e80a9392cf8d331479d0942682ba0bb5ac Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 1 Aug 2025 15:07:27 -0500 Subject: dt-bindings: PCI: Add missing "#address-cells" to interrupt controllers An interrupt-controller node which is the parent provider for "interrupt-map" needs an "#address-cells" property. This fixes "interrupt_map" warnings in new dtc. Acked-by: Bjorn Helgaas Link: https://lore.kernel.org/r/20250801200728.3252036-2-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml | 1 + Documentation/devicetree/bindings/pci/marvell,armada-3700-pcie.yaml | 4 ++++ Documentation/devicetree/bindings/pci/marvell,kirkwood-pcie.yaml | 3 +++ Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml | 4 ++++ Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml | 3 +++ 5 files changed, 15 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml index 5434c144d2ec..18e7981241b5 100644 --- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml @@ -108,6 +108,7 @@ examples: #include gic: interrupt-controller { + #address-cells = <0>; interrupt-controller; #interrupt-cells = <3>; }; diff --git a/Documentation/devicetree/bindings/pci/marvell,armada-3700-pcie.yaml b/Documentation/devicetree/bindings/pci/marvell,armada-3700-pcie.yaml index 68090b3ca419..8403c79634ed 100644 --- a/Documentation/devicetree/bindings/pci/marvell,armada-3700-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/marvell,armada-3700-pcie.yaml @@ -42,6 +42,9 @@ properties: additionalProperties: false properties: + '#address-cells': + const: 0 + interrupt-controller: true '#interrupt-cells': @@ -92,6 +95,7 @@ examples: reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; pcie_intc: interrupt-controller { + #address-cells = <0>; interrupt-controller; #interrupt-cells = <1>; }; diff --git a/Documentation/devicetree/bindings/pci/marvell,kirkwood-pcie.yaml b/Documentation/devicetree/bindings/pci/marvell,kirkwood-pcie.yaml index 7be695320ddf..3d68bfbe6feb 100644 --- a/Documentation/devicetree/bindings/pci/marvell,kirkwood-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/marvell,kirkwood-pcie.yaml @@ -101,6 +101,9 @@ patternProperties: additionalProperties: false properties: + '#address-cells': + const: 0 + interrupt-controller: true '#interrupt-cells': diff --git a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml index 638b99db0433..c07b0ed51613 100644 --- a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml @@ -56,6 +56,9 @@ properties: additionalProperties: false properties: + '#address-cells': + const: 0 + interrupt-controller: true '#interrupt-cells': @@ -109,6 +112,7 @@ examples: <0 0 0 4 &pcie_intc 3>; pcie_intc: interrupt-controller { + #address-cells = <0>; interrupt-controller; #interrupt-cells = <1>; interrupt-parent = <&gic>; diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml index 69b499c96c71..c704099f134b 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml @@ -99,6 +99,9 @@ properties: additionalProperties: false properties: + '#address-cells': + const: 0 + interrupt-controller: true '#interrupt-cells': -- cgit v1.2.3 From 62498af7b1082d76031f98e4c3d6fb2b9af47772 Mon Sep 17 00:00:00 2001 From: Nicolas Frattaroli Date: Wed, 16 Jul 2025 19:51:22 +0200 Subject: dt-bindings: cpufreq: Add mediatek,mt8196-cpufreq-hw binding The MediaTek MT8196 SoC has new cpufreq hardware, with added memory register ranges to control Dynamic-Voltage-Frequency-Scaling. The DVFS hardware is controlled through a set of registers referred to as "FDVFS". They set the target frequency the DVFS hardware should aim for for each performance domain. Instead of working around the old binding and its already established meanings for the reg items, add a new binding. The FDVFS register memory region is at the beginning, which allows us to easily expand this binding for future SoCs which may have more than 3 performance domains. Signed-off-by: Nicolas Frattaroli Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Signed-off-by: Viresh Kumar --- .../cpufreq/mediatek,mt8196-cpufreq-hw.yaml | 82 ++++++++++++++++++++++ 1 file changed, 82 insertions(+) create mode 100644 Documentation/devicetree/bindings/cpufreq/mediatek,mt8196-cpufreq-hw.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/cpufreq/mediatek,mt8196-cpufreq-hw.yaml b/Documentation/devicetree/bindings/cpufreq/mediatek,mt8196-cpufreq-hw.yaml new file mode 100644 index 000000000000..5f3c7db3f3aa --- /dev/null +++ b/Documentation/devicetree/bindings/cpufreq/mediatek,mt8196-cpufreq-hw.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/cpufreq/mediatek,mt8196-cpufreq-hw.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Hybrid CPUFreq for MT8196/MT6991 series SoCs + +maintainers: + - Nicolas Frattaroli + +description: + MT8196 uses CPUFreq management hardware that supports dynamic voltage + frequency scaling (dvfs), and can support several performance domains. + +properties: + compatible: + const: mediatek,mt8196-cpufreq-hw + + reg: + items: + - description: FDVFS control register region + - description: OPP tables and control for performance domain 0 + - description: OPP tables and control for performance domain 1 + - description: OPP tables and control for performance domain 2 + + "#performance-domain-cells": + const: 1 + +required: + - compatible + - reg + - "#performance-domain-cells" + +additionalProperties: false + +examples: + - | + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a720"; + enable-method = "psci"; + performance-domains = <&performance 0>; + reg = <0x000>; + }; + + /* ... */ + + cpu6: cpu@600 { + device_type = "cpu"; + compatible = "arm,cortex-x4"; + enable-method = "psci"; + performance-domains = <&performance 1>; + reg = <0x600>; + }; + + cpu7: cpu@700 { + device_type = "cpu"; + compatible = "arm,cortex-x925"; + enable-method = "psci"; + performance-domains = <&performance 2>; + reg = <0x700>; + }; + }; + + /* ... */ + + soc { + #address-cells = <2>; + #size-cells = <2>; + + performance: performance-controller@c2c2034 { + compatible = "mediatek,mt8196-cpufreq-hw"; + reg = <0 0xc220400 0 0x20>, <0 0xc2c0f20 0 0x120>, + <0 0xc2c1040 0 0x120>, <0 0xc2c1160 0 0x120>; + #performance-domain-cells = <1>; + }; + }; -- cgit v1.2.3 From 187a3426a664737381a70a3fca3b8108f2300de9 Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Wed, 30 Jul 2025 10:27:30 +0300 Subject: dt-bindings: soc: samsung: usi: add samsung,exynos2200-usi compatible Add samsung,exynos2200-usi dedicated compatible for representing the USI of Samsung Exynos 2200 SoC. Signed-off-by: Ivaylo Ivanov Reviewed-by: Sam Protsenko Link: https://lore.kernel.org/r/20250730072730.1882549-1-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml index cb22637091e8..c694926e56ef 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml @@ -36,6 +36,7 @@ properties: - items: - enum: - google,gs101-usi + - samsung,exynos2200-usi - samsung,exynosautov9-usi - samsung,exynosautov920-usi - const: samsung,exynos850-usi -- cgit v1.2.3 From 0b9275edc3543d0d2d03313a7c8de5157d61b189 Mon Sep 17 00:00:00 2001 From: Sai Krishna Musham Date: Thu, 7 Aug 2025 13:10:18 +0530 Subject: dt-bindings: PCI: amd-mdb: Add example usage of reset-gpios for PCIe RP PERST# Update the device tree binding example to include usage of the `reset-gpios` property in PCIe Root Port (RP) bridge node for PERST# signal handling. Signed-off-by: Sai Krishna Musham Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250807074019.811672-2-sai.krishna.musham@amd.com --- .../bindings/pci/amd,versal2-mdb-host.yaml | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml index 43dc2585c237..421e1116ae7e 100644 --- a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml +++ b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml @@ -71,6 +71,17 @@ properties: - "#address-cells" - "#interrupt-cells" +patternProperties: + '^pcie@[0-2],0$': + type: object + $ref: /schemas/pci/pci-pci-bridge.yaml# + + properties: + reg: + maxItems: 1 + + unevaluatedProperties: false + required: - reg - reg-names @@ -87,6 +98,7 @@ examples: - | #include #include + #include soc { #address-cells = <2>; @@ -112,6 +124,16 @@ examples: #size-cells = <2>; #interrupt-cells = <1>; device_type = "pci"; + + pcie@0,0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + reset-gpios = <&tca6416_u37 7 GPIO_ACTIVE_LOW>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + pcie_intc_0: interrupt-controller { #address-cells = <0>; #interrupt-cells = <1>; -- cgit v1.2.3 From 243167e96939630b7d0d7f61be926d327e14a017 Mon Sep 17 00:00:00 2001 From: Nick Li Date: Mon, 11 Aug 2025 18:46:06 +0800 Subject: dt-bindings: vendor-prefixes: Add Shanghai FourSemi Semiconductor Co.,Ltd Add vendor prefix for Shanghai FourSemi Semiconductor Co.,Ltd Link: https://en.foursemi.com/ Signed-off-by: Nick Li Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/EA25BCF08F8BA128+20250811104610.8993-2-nick.li@foursemi.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 77160cd47f54..a92261b10c52 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -552,6 +552,8 @@ patternProperties: description: FocalTech Systems Co.,Ltd "^forlinx,.*": description: Baoding Forlinx Embedded Technology Co., Ltd. + "^foursemi,.*": + description: Shanghai FourSemi Semiconductor Co.,Ltd. "^freebox,.*": description: Freebox SAS "^freecom,.*": -- cgit v1.2.3 From fd90680da7e2d92e50ad72dfd4ea601098ab3493 Mon Sep 17 00:00:00 2001 From: Nick Li Date: Mon, 11 Aug 2025 18:46:07 +0800 Subject: ASoC: dt-bindings: Add FS2104/5S audio amplifiers Add a DT schema for describing FourSemi FS2104/5S audio amplifiers which support both I2S and I2C interface. Signed-off-by: Nick Li Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/350C011186D85903+20250811104610.8993-3-nick.li@foursemi.com Signed-off-by: Mark Brown --- .../bindings/sound/foursemi,fs2105s.yaml | 101 +++++++++++++++++++++ 1 file changed, 101 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/foursemi,fs2105s.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/foursemi,fs2105s.yaml b/Documentation/devicetree/bindings/sound/foursemi,fs2105s.yaml new file mode 100644 index 000000000000..4da735317e0f --- /dev/null +++ b/Documentation/devicetree/bindings/sound/foursemi,fs2105s.yaml @@ -0,0 +1,101 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/foursemi,fs2105s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: FourSemi FS2104/5S Digital Audio Amplifier + +maintainers: + - Nick Li + +description: + The FS2104 is a 15W Inductor-Less, Stereo, Closed-Loop, + Digital Input Class-D Power Amplifier with Enhanced Signal Processing. + The FS2105S is a 30W Inductor-Less, Stereo, Closed-Loop, + Digital Input Class-D Power Amplifier with Enhanced Signal Processing. + +properties: + compatible: + oneOf: + - items: + - enum: + - foursemi,fs2104 + - const: foursemi,fs2105s + - enum: + - foursemi,fs2105s + + reg: + maxItems: 1 + + clocks: + items: + - description: The clock of I2S BCLK + + clock-names: + items: + - const: bclk + + interrupts: + maxItems: 1 + + '#sound-dai-cells': + const: 0 + + pvdd-supply: + description: + Regulator for power supply(PVDD in datasheet). + + dvdd-supply: + description: + Regulator for digital supply(DVDD in datasheet). + + reset-gpios: + maxItems: 1 + description: + It's the SDZ pin in datasheet, the pin is active low, + it will power down and reset the chip to shut down state. + + firmware-name: + maxItems: 1 + description: | + The firmware(*.bin) contains: + a. Register initialization settings + b. DSP effect parameters + c. Multi-scene sound effect configurations(optional) + It's gernerated by FourSemi's tuning tool. + +required: + - compatible + - reg + - '#sound-dai-cells' + - pvdd-supply + - dvdd-supply + - reset-gpios + - firmware-name + +allOf: + - $ref: dai-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + audio-codec@68 { + compatible = "foursemi,fs2105s"; + reg = <0x68>; + clocks = <&clocks 18>; + clock-names = "bclk"; + #sound-dai-cells = <0>; + pvdd-supply = <&pvdd_supply>; + dvdd-supply = <&dvdd_supply>; + reset-gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + firmware-name = "fs2105s-btl-2p0-0s.bin"; + pinctrl-names = "default"; + pinctrl-0 = <&fs210x_pins_default>; + }; + }; -- cgit v1.2.3 From 92becd1701a835d0807fa1f5c03b43762af27444 Mon Sep 17 00:00:00 2001 From: Pedro Falcato Date: Wed, 23 Jul 2025 14:21:56 +0100 Subject: docs/vfs: Remove mentions to the old mount API helpers Now that mount_bdev(), mount_nodev() and mount_single() have all been removed, remove mentions to them in vfs.rst. While we're at it, redirect people looking for mount API docs to mount_api.rst (which documents the newer API). Signed-off-by: Pedro Falcato Link: https://lore.kernel.org/20250723132156.225410-4-pfalcato@suse.de Signed-off-by: Christian Brauner --- Documentation/filesystems/vfs.rst | 27 ++------------------------- 1 file changed, 2 insertions(+), 25 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/vfs.rst b/Documentation/filesystems/vfs.rst index 486a91633474..229eb90c96f2 100644 --- a/Documentation/filesystems/vfs.rst +++ b/Documentation/filesystems/vfs.rst @@ -209,31 +209,8 @@ method fills in is the "s_op" field. This is a pointer to a "struct super_operations" which describes the next level of the filesystem implementation. -Usually, a filesystem uses one of the generic mount() implementations -and provides a fill_super() callback instead. The generic variants are: - -``mount_bdev`` - mount a filesystem residing on a block device - -``mount_nodev`` - mount a filesystem that is not backed by a device - -``mount_single`` - mount a filesystem which shares the instance between all mounts - -A fill_super() callback implementation has the following arguments: - -``struct super_block *sb`` - the superblock structure. The callback must initialize this - properly. - -``void *data`` - arbitrary mount options, usually comes as an ASCII string (see - "Mount Options" section) - -``int silent`` - whether or not to be silent on error - +For more information on mounting (and the new mount API), see +Documentation/filesystems/mount_api.rst. The Superblock Object ===================== -- cgit v1.2.3 From a54ef14188519a0994d0264f701f5771815fa11e Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 7 Aug 2025 16:44:57 -0500 Subject: regulator: dt-bindings: Clean-up active-semi,act8945a duplication The active-semi,act8945a binding is documented in multiple places. The charger child node is documented in regulator/active-semi,act8945a.yaml and power/supply/active-semi,act8945a-charger.yaml. An old text binding is in mfd/act8945a.txt. Update the regulator/active-semi,act8945a.yaml with the additional descriptions and constraints from power/supply/active-semi,act8945a-charger.yaml, and then remove it and mfd/act8945a.txt. Signed-off-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250807214459.4173892-1-robh@kernel.org Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/mfd/act8945a.txt | 82 ---------------------- .../power/supply/active-semi,act8945a-charger.yaml | 76 -------------------- .../bindings/regulator/active-semi,act8945a.yaml | 25 +++++-- 3 files changed, 19 insertions(+), 164 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mfd/act8945a.txt delete mode 100644 Documentation/devicetree/bindings/power/supply/active-semi,act8945a-charger.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/act8945a.txt b/Documentation/devicetree/bindings/mfd/act8945a.txt deleted file mode 100644 index 5ca75d888b4a..000000000000 --- a/Documentation/devicetree/bindings/mfd/act8945a.txt +++ /dev/null @@ -1,82 +0,0 @@ -Device-Tree bindings for Active-semi ACT8945A MFD driver - -Required properties: - - compatible: "active-semi,act8945a". - - reg: the I2C slave address for the ACT8945A chip - -The chip exposes two subdevices: - - a regulators: see ../regulator/act8945a-regulator.txt - - a charger: see ../power/act8945a-charger.txt - -Example: - pmic@5b { - compatible = "active-semi,act8945a"; - reg = <0x5b>; - - active-semi,vsel-high; - - regulators { - vdd_1v35_reg: REG_DCDC1 { - regulator-name = "VDD_1V35"; - regulator-min-microvolt = <1350000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - }; - - vdd_1v2_reg: REG_DCDC2 { - regulator-name = "VDD_1V2"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1300000>; - regulator-always-on; - }; - - vdd_3v3_reg: REG_DCDC3 { - regulator-name = "VDD_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd_fuse_reg: REG_LDO1 { - regulator-name = "VDD_FUSE"; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - regulator-always-on; - }; - - vdd_3v3_lp_reg: REG_LDO2 { - regulator-name = "VDD_3V3_LP"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd_led_reg: REG_LDO3 { - regulator-name = "VDD_LED"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd_sdhc_1v8_reg: REG_LDO4 { - regulator-name = "VDD_SDHC_1V8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - }; - - charger { - compatible = "active-semi,act8945a-charger"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_charger_chglev &pinctrl_charger_lbo &pinctrl_charger_irq>; - interrupt-parent = <&pioA>; - interrupts = <45 IRQ_TYPE_LEVEL_LOW>; - - active-semi,chglev-gpios = <&pioA 12 GPIO_ACTIVE_HIGH>; - active-semi,lbo-gpios = <&pioA 72 GPIO_ACTIVE_LOW>; - active-semi,input-voltage-threshold-microvolt = <6600>; - active-semi,precondition-timeout = <40>; - active-semi,total-timeout = <3>; - }; - }; diff --git a/Documentation/devicetree/bindings/power/supply/active-semi,act8945a-charger.yaml b/Documentation/devicetree/bindings/power/supply/active-semi,act8945a-charger.yaml deleted file mode 100644 index 5220d9cb16d8..000000000000 --- a/Documentation/devicetree/bindings/power/supply/active-semi,act8945a-charger.yaml +++ /dev/null @@ -1,76 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/power/supply/active-semi,act8945a-charger.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Active-semi ACT8945A Charger Function - -maintainers: - - Sebastian Reichel - -allOf: - - $ref: power-supply.yaml# - -properties: - compatible: - const: active-semi,act8945a-charger - - interrupts: - maxItems: 1 - - active-semi,chglev-gpios: - maxItems: 1 - description: charge current level GPIO - - active-semi,lbo-gpios: - maxItems: 1 - description: low battery voltage detect GPIO - - active-semi,input-voltage-threshold-microvolt: - description: | - Specifies the charger's input over-voltage threshold value. - Despite the name, specified values are in millivolt (mV). - Defaults to 6.6 V - enum: [ 6600, 7000, 7500, 8000 ] - - active-semi,precondition-timeout: - $ref: /schemas/types.yaml#/definitions/uint32 - description: | - Specifies the charger's PRECONDITION safety timer setting value in minutes. - If 0, it means to disable this timer. - Defaults to 40 minutes. - enum: [ 0, 40, 60, 80 ] - - active-semi,total-timeout: - $ref: /schemas/types.yaml#/definitions/uint32 - description: | - Specifies the charger's total safety timer setting value in hours; - If 0, it means to disable this timer; - Defaults to 3 hours. - enum: [ 0, 3, 4, 5 ] - -required: - - compatible - - interrupts - - active-semi,chglev-gpios - - active-semi,lbo-gpios - -additionalProperties: false - -examples: - - | - #include - #include - pmic { - charger { - compatible = "active-semi,act8945a-charger"; - interrupt-parent = <&pioA>; - interrupts = <45 IRQ_TYPE_LEVEL_LOW>; - active-semi,chglev-gpios = <&pioA 12 GPIO_ACTIVE_HIGH>; - active-semi,lbo-gpios = <&pioA 72 GPIO_ACTIVE_LOW>; - active-semi,input-voltage-threshold-microvolt = <6600>; - active-semi,precondition-timeout = <40>; - active-semi,total-timeout = <3>; - }; - }; diff --git a/Documentation/devicetree/bindings/regulator/active-semi,act8945a.yaml b/Documentation/devicetree/bindings/regulator/active-semi,act8945a.yaml index bdf3f7d34ef5..a8d579844dc7 100644 --- a/Documentation/devicetree/bindings/regulator/active-semi,act8945a.yaml +++ b/Documentation/devicetree/bindings/regulator/active-semi,act8945a.yaml @@ -91,28 +91,41 @@ properties: maxItems: 1 active-semi,chglev-gpios: - description: CGHLEV GPIO + description: charge current level GPIO maxItems: 1 active-semi,lbo-gpios: - description: LBO GPIO + description: low battery voltage detect GPIO maxItems: 1 active-semi,input-voltage-threshold-microvolt: - description: Input voltage threshold - maxItems: 1 + description: + Specifies the charger's input over-voltage threshold value. Despite + the name, specified values are in millivolt (mV). + enum: [ 6600, 7000, 7500, 8000 ] + default: 6600 active-semi,precondition-timeout: - description: Precondition timeout + description: + Specifies the charger's PRECONDITION safety timer setting value in + minutes. If 0, it means to disable this timer. + enum: [ 0, 40, 60, 80 ] + default: 40 $ref: /schemas/types.yaml#/definitions/uint32 active-semi,total-timeout: - description: Total timeout + description: + Specifies the charger's total safety timer setting value in hours; If + 0, it means to disable this timer; + enum: [ 0, 3, 4, 5 ] + default: 3 $ref: /schemas/types.yaml#/definitions/uint32 required: - compatible - interrupts + - active-semi,chglev-gpios + - active-semi,lbo-gpios additionalProperties: false -- cgit v1.2.3 From 17c66b1037aa52277d42c942db76672a1298858e Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 31 Jul 2025 17:12:22 -0500 Subject: dt-bindings: fsi: Convert fsi-master-gpio to DT schema Convert the GPIO-based FSI master binding to DT schema format. Drop the "fsi-master" compatible as it has not be used consistently and doesn't represent anything. Acked-by: Eddie James Link: https://lore.kernel.org/r/20250731-dt-fsi-cleanups-v1-5-e7b695a29fc3@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/fsi/fsi-master-gpio.txt | 28 ---------- .../devicetree/bindings/fsi/fsi-master-gpio.yaml | 63 ++++++++++++++++++++++ 2 files changed, 63 insertions(+), 28 deletions(-) delete mode 100644 Documentation/devicetree/bindings/fsi/fsi-master-gpio.txt create mode 100644 Documentation/devicetree/bindings/fsi/fsi-master-gpio.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/fsi/fsi-master-gpio.txt b/Documentation/devicetree/bindings/fsi/fsi-master-gpio.txt deleted file mode 100644 index 1e442450747f..000000000000 --- a/Documentation/devicetree/bindings/fsi/fsi-master-gpio.txt +++ /dev/null @@ -1,28 +0,0 @@ -Device-tree bindings for gpio-based FSI master driver ------------------------------------------------------ - -Required properties: - - compatible = "fsi-master-gpio"; - - clock-gpios = ; : GPIO for FSI clock - - data-gpios = ; : GPIO for FSI data signal - -Optional properties: - - enable-gpios = ; : GPIO for enable signal - - trans-gpios = ; : GPIO for voltage translator enable - - mux-gpios = ; : GPIO for pin multiplexing with other - functions (eg, external FSI masters) - - no-gpio-delays; : Don't add extra delays between GPIO - accesses. This is useful when the HW - GPIO block is running at a low enough - frequency. - -Examples: - - fsi-master { - compatible = "fsi-master-gpio", "fsi-master"; - clock-gpios = <&gpio 0>; - data-gpios = <&gpio 1>; - enable-gpios = <&gpio 2>; - trans-gpios = <&gpio 3>; - mux-gpios = <&gpio 4>; - } diff --git a/Documentation/devicetree/bindings/fsi/fsi-master-gpio.yaml b/Documentation/devicetree/bindings/fsi/fsi-master-gpio.yaml new file mode 100644 index 000000000000..21bfbad595b3 --- /dev/null +++ b/Documentation/devicetree/bindings/fsi/fsi-master-gpio.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/fsi-master-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: fsi-master-gpio + +maintainers: + - Eddie James + +allOf: + - $ref: /schemas/fsi/fsi-controller.yaml + +properties: + compatible: + items: + - const: fsi-master-gpio + + clock-gpios: + description: GPIO for FSI clock + maxItems: 1 + + data-gpios: + description: GPIO for FSI data signal + maxItems: 1 + + enable-gpios: + description: GPIO for enable signal + maxItems: 1 + + trans-gpios: + description: GPIO for voltage translator enable + maxItems: 1 + + mux-gpios: + description: GPIO for pin multiplexing with other functions (eg, external + FSI masters) + maxItems: 1 + + no-gpio-delays: + description: + Don't add extra delays between GPIO accesses. This is useful when the HW + GPIO block is running at a low enough frequency. + type: boolean + +required: + - compatible + - clock-gpios + - data-gpios + +unevaluatedProperties: false + +examples: + - | + fsi-master { + compatible = "fsi-master-gpio"; + clock-gpios = <&gpio 0>; + data-gpios = <&gpio 1>; + enable-gpios = <&gpio 2>; + trans-gpios = <&gpio 3>; + mux-gpios = <&gpio 4>; + }; -- cgit v1.2.3 From a678ec17f57c97e9bdcb81f67f9af73ae72b3422 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 31 Jul 2025 17:12:23 -0500 Subject: dt-bindings: fsi: Convert aspeed,ast2400-cf-fsi-master to DT schema Convert the ASpeed Coldfire offloaded GPIO FSI master. Drop the "fsi-master" compatible as it has not be used consistently and doesn't represent anything. Acked-by: Eddie James Link: https://lore.kernel.org/r/20250731-dt-fsi-cleanups-v1-6-e7b695a29fc3@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/fsi/aspeed,ast2400-cf-fsi-master.yaml | 81 ++++++++++++++++++++++ .../devicetree/bindings/fsi/fsi-master-ast-cf.txt | 36 ---------- 2 files changed, 81 insertions(+), 36 deletions(-) create mode 100644 Documentation/devicetree/bindings/fsi/aspeed,ast2400-cf-fsi-master.yaml delete mode 100644 Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/fsi/aspeed,ast2400-cf-fsi-master.yaml b/Documentation/devicetree/bindings/fsi/aspeed,ast2400-cf-fsi-master.yaml new file mode 100644 index 000000000000..690b6c936f18 --- /dev/null +++ b/Documentation/devicetree/bindings/fsi/aspeed,ast2400-cf-fsi-master.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/aspeed,ast2400-cf-fsi-master.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASpeed ColdFire offloaded GPIO-based FSI master + +maintainers: + - Eddie James + +allOf: + - $ref: /schemas/fsi/fsi-controller.yaml# + +properties: + compatible: + enum: + - aspeed,ast2400-cf-fsi-master + - aspeed,ast2500-cf-fsi-master + + clock-gpios: + maxItems: 1 + description: GPIO for FSI clock + + data-gpios: + maxItems: 1 + description: GPIO for FSI data signal + + enable-gpios: + maxItems: 1 + description: GPIO for enable signal + + trans-gpios: + maxItems: 1 + description: GPIO for voltage translator enable + + mux-gpios: + maxItems: 1 + description: + GPIO for pin multiplexing with other functions (eg, external FSI masters) + + memory-region: + maxItems: 1 + description: + Reference to the reserved memory for the ColdFire. Must be 2M aligned on + AST2400 and 1M aligned on AST2500. + + aspeed,cvic: + description: Reference to the CVIC node. + $ref: /schemas/types.yaml#/definitions/phandle + + aspeed,sram: + description: Reference to the SRAM node. + $ref: /schemas/types.yaml#/definitions/phandle + +required: + - compatible + - clock-gpios + - data-gpios + - enable-gpios + - trans-gpios + - mux-gpios + - memory-region + - aspeed,cvic + - aspeed,sram + +unevaluatedProperties: false + +examples: + - | + fsi-master { + compatible = "aspeed,ast2500-cf-fsi-master"; + clock-gpios = <&gpio 0>; + data-gpios = <&gpio 1>; + enable-gpios = <&gpio 2>; + trans-gpios = <&gpio 3>; + mux-gpios = <&gpio 4>; + memory-region = <&coldfire_memory>; + aspeed,cvic = <&cvic>; + aspeed,sram = <&sram>; + }; diff --git a/Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt b/Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt deleted file mode 100644 index 3dc752db748b..000000000000 --- a/Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt +++ /dev/null @@ -1,36 +0,0 @@ -Device-tree bindings for ColdFire offloaded gpio-based FSI master driver ------------------------------------------------------------------------- - -Required properties: - - compatible = - "aspeed,ast2400-cf-fsi-master" for an AST2400 based system - or - "aspeed,ast2500-cf-fsi-master" for an AST2500 based system - - - clock-gpios = ; : GPIO for FSI clock - - data-gpios = ; : GPIO for FSI data signal - - enable-gpios = ; : GPIO for enable signal - - trans-gpios = ; : GPIO for voltage translator enable - - mux-gpios = ; : GPIO for pin multiplexing with other - functions (eg, external FSI masters) - - memory-region = ; : Reference to the reserved memory for - the ColdFire. Must be 2M aligned on - AST2400 and 1M aligned on AST2500 - - aspeed,sram = ; : Reference to the SRAM node. - - aspeed,cvic = ; : Reference to the CVIC node. - -Examples: - - fsi-master { - compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master"; - - clock-gpios = <&gpio 0>; - data-gpios = <&gpio 1>; - enable-gpios = <&gpio 2>; - trans-gpios = <&gpio 3>; - mux-gpios = <&gpio 4>; - - memory-region = <&coldfire_memory>; - aspeed,sram = <&sram>; - aspeed,cvic = <&cvic>; - } -- cgit v1.2.3 From 59304e7b80b4554fae6f1df0f518bd341a0fedc9 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 6 Aug 2025 01:03:08 +0200 Subject: dt-bindings: arm: Spell out acronym When I authored these bindings I had no idea what "AEM" stood for. Now I know: it means "Architecture Envelope Model". Detail this in the bindings. Signed-off-by: Linus Walleij Acked-by: Conor Dooley Reviewed-by: Sudeep Holla Link: https://lore.kernel.org/r/20250806-aem-dt-bind-v1-1-d14676dfb027@linaro.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml index 8dd6b6446394..89298b39903f 100644 --- a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml +++ b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml @@ -103,8 +103,9 @@ properties: - const: arm,juno-r2 - const: arm,juno - const: arm,vexpress - - description: Arm AEMv8a Versatile Express Real-Time System Model - (VE RTSM) is a programmers view of the Versatile Express with Arm + - description: Arm AEMv8a (Architecture Envelope Model) + Versatile Express Real-Time System Model (VE RTSM) + is a programmers view of the Versatile Express with Arm v8A hardware. See ARM DUI 0575D. items: - const: arm,rtsm_ve,aemv8a -- cgit v1.2.3 From 5293e8f2a854344ef9aba2391b44c7a437889ebb Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Fri, 8 Aug 2025 14:30:15 +0100 Subject: dt-bindings: pinctrl: renesas: Document RZ/T2H and RZ/N2H SoCs Document the pin and GPIO controller IP for the Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs, and add the shared DTSI header file used by both the bindings and the driver. The RZ/T2H SoC supports 729 pins, while RZ/N2H supports 576 pins. Both share the same controller architecture; separate compatible strings are added for each SoC to distinguish them. Co-developed-by: Thierry Bultel Signed-off-by: Thierry Bultel Signed-off-by: Lad Prabhakar Reviewed-by: "Rob Herring (Arm)" Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250808133017.2053637-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- .../pinctrl/renesas,r9a09g077-pinctrl.yaml | 172 +++++++++++++++++++++ 1 file changed, 172 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml new file mode 100644 index 000000000000..36d665971484 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml @@ -0,0 +1,172 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/renesas,r9a09g077-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/T2H and RZ/N2H Pin and GPIO controller + +maintainers: + - Lad Prabhakar + +description: + The Renesas RZ/T2H and RZ/N2H SoCs feature a combined Pin and GPIO controller. + Pin multiplexing and GPIO configuration are performed on a per-pin basis. + Each port supports up to 8 pins, each configurable for either GPIO (port mode) + or alternate function mode. Each pin supports function mode values ranging from + 0x0 to 0x2A, allowing selection from up to 43 different functions. + +properties: + compatible: + enum: + - renesas,r9a09g077-pinctrl # RZ/T2H + - renesas,r9a09g087-pinctrl # RZ/N2H + + reg: + minItems: 1 + items: + - description: Non-safety I/O Port base + - description: Safety I/O Port safety region base + - description: Safety I/O Port Non-safety region base + + reg-names: + minItems: 1 + items: + - const: nsr + - const: srs + - const: srn + + gpio-controller: true + + '#gpio-cells': + const: 2 + description: + The first cell contains the global GPIO port index, constructed using the + RZT2H_GPIO() helper macro from + (e.g. "RZT2H_GPIO(3, 0)" for P03_0). The second cell represents the consumer + flag. Use the macros defined in include/dt-bindings/gpio/gpio.h. + + gpio-ranges: + maxItems: 1 + + clocks: + maxItems: 1 + + power-domains: + maxItems: 1 + +definitions: + renesas-rzt2h-n2h-pins-node: + type: object + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + properties: + pinmux: + description: + Values are constructed from I/O port number, pin number, and + alternate function configuration number using the RZT2H_PORT_PINMUX() + helper macro from . + pins: true + phandle: true + input: true + input-enable: true + output-enable: true + oneOf: + - required: [pinmux] + - required: [pins] + additionalProperties: false + +patternProperties: + # Grouping nodes: allow multiple "-pins" subnodes within a "-group" + '.*-group$': + type: object + description: + Pin controller client devices can organize pin configuration entries into + grouping nodes ending in "-group". These group nodes may contain multiple + child nodes each ending in "-pins" to configure distinct sets of pins. + additionalProperties: false + patternProperties: + '-pins$': + $ref: '#/definitions/renesas-rzt2h-n2h-pins-node' + + # Standalone "-pins" nodes under client devices or groups + '-pins$': + $ref: '#/definitions/renesas-rzt2h-n2h-pins-node' + + '-hog$': + type: object + description: GPIO hog node + properties: + gpio-hog: true + gpios: true + input: true + output-high: true + output-low: true + line-name: true + required: + - gpio-hog + - gpios + additionalProperties: false + +allOf: + - $ref: pinctrl.yaml# + +required: + - compatible + - reg + - reg-names + - gpio-controller + - '#gpio-cells' + - gpio-ranges + - clocks + - power-domains + +unevaluatedProperties: false + +examples: + - | + #include + #include + + pinctrl@802c0000 { + compatible = "renesas,r9a09g077-pinctrl"; + reg = <0x802c0000 0x2000>, + <0x812c0000 0x2000>, + <0x802b0000 0x2000>; + reg-names = "nsr", "srs", "srn"; + clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKM>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 288>; + power-domains = <&cpg>; + + serial0-pins { + pinmux = , /* Tx */ + ; /* Rx */ + }; + + sd1-pwr-en-hog { + gpio-hog; + gpios = ; + output-high; + line-name = "sd1_pwr_en"; + }; + + i2c0-pins { + pins = "RIIC0_SDA", "RIIC0_SCL"; + input-enable; + }; + + sd0-sd-group { + ctrl-pins { + pinmux = , /* SD0_CLK */ + ; /* SD0_CMD */ + }; + + data-pins { + pinmux = , /* SD0_CLK */ + ; /* SD0_CMD */ + }; + }; + }; -- cgit v1.2.3 From c17ccefb611fdb346eef9be6bfbd0bfd04afa204 Mon Sep 17 00:00:00 2001 From: Sricharan Ramabadhran Date: Mon, 11 Aug 2025 14:39:51 +0530 Subject: dt-bindings: clock: ipq5424-apss-clk: Add ipq5424 apss clock controller The CPU core in ipq5424 is clocked by a huayra PLL with RCG support. The RCG and PLL have a separate register space from the GCC. Also the L3 cache has a separate pll and needs to be scaled along with the CPU. Co-developed-by: Md Sadre Alam Signed-off-by: Md Sadre Alam Signed-off-by: Sricharan Ramabadhran [ Added interconnect related changes ] Reviewed-by: Krzysztof Kozlowski Signed-off-by: Varadarajan Narayanan Link: https://lore.kernel.org/r/20250811090954.2854440-2-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson --- .../bindings/clock/qcom,ipq5424-apss-clk.yaml | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,ipq5424-apss-clk.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5424-apss-clk.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5424-apss-clk.yaml new file mode 100644 index 000000000000..def739fa0a8c --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5424-apss-clk.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,ipq5424-apss-clk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm APSS IPQ5424 Clock Controller + +maintainers: + - Varadarajan Narayanan + +description: + The CPU core in ipq5424 is clocked by a huayra PLL with RCG support. + The RCG and PLL have a separate register space from the GCC. + +properties: + compatible: + enum: + - qcom,ipq5424-apss-clk + + reg: + maxItems: 1 + + clocks: + items: + - description: Reference to the XO clock. + - description: Reference to the GPLL0 clock. + + '#clock-cells': + const: 1 + + '#interconnect-cells': + const: 1 + +required: + - compatible + - reg + - clocks + - '#clock-cells' + - '#interconnect-cells' + +additionalProperties: false + +examples: + - | + #include + + apss_clk: clock-controller@fa80000 { + compatible = "qcom,ipq5424-apss-clk"; + reg = <0x0fa80000 0x20000>; + clocks = <&xo_board>, + <&gcc GPLL0>; + #clock-cells = <1>; + #interconnect-cells = <1>; + }; -- cgit v1.2.3 From bc20c56e98e0bd08e89f4fe327f4f14994d339b5 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 29 Jul 2025 18:43:04 +0200 Subject: docs: changes: better document Python needs Python is listed as an optional dependency, but this is not true, as: 1) arm (multi_v7_defconfig and other defconfigs) and arm64 defconfig needs it due to DRM_MSM dependencies; 2) CONFIG_LTO_CLANG runs a python script at scripts/Makefile.vmlinux_o; 3) kernel-doc is called during compilation when some DRM options like CONFIG_DRM_I915_WERROR are enabled; 4) allyesconfig/allmodconfig will enable CONFIG_* dependencies that needs it; 5) besides DRM, other subsystems seem to have logic calling *.py scripts. So, better document that and change the dependency from optional to mandatory to reflect the current needs. Signed-off-by: Mauro Carvalho Chehab Acked-by: Rob Herring (Arm) Acked-by: Akira Yokosawa Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/b03b95b8d09358e81e4f27942839191f49b0ba80.1753806485.git.mchehab+huawei@kernel.org --- Documentation/process/changes.rst | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/process/changes.rst b/Documentation/process/changes.rst index bccfa19b45df..4c9088e429c8 100644 --- a/Documentation/process/changes.rst +++ b/Documentation/process/changes.rst @@ -61,7 +61,7 @@ Sphinx\ [#f1]_ 3.4.3 sphinx-build --version GNU tar 1.28 tar --version gtags (optional) 6.6.5 gtags --version mkimage (optional) 2017.01 mkimage --version -Python (optional) 3.9.x python3 --version +Python 3.9.x python3 --version GNU AWK (optional) 5.1.0 gawk --version ====================== =============== ======================================== @@ -154,6 +154,13 @@ Perl You will need perl 5 and the following modules: ``Getopt::Long``, ``Getopt::Std``, ``File::Basename``, and ``File::Find`` to build the kernel. +Python +------ + +Several config options require it: it is required for arm/arm64 +default configs, CONFIG_LTO_CLANG, some DRM optional configs, +the kernel-doc tool, and docs build (Sphinx), among others. + BC -- -- cgit v1.2.3 From 119996c9a4be91f70779efe0a4f178356820249a Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 7 Aug 2025 09:36:01 +0200 Subject: Documentation/printf: Use literal fwnode_handle MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When looking for fwnode_handle in the printk format documentation, it is only found in the Chinese translation: $ git grep fwnode_handle -- Documentation/*printk-formats.rst Documentation/translations/zh_CN/core-api/printk-formats.rst:用于打印fwnode_handles的消息。默认情况下是打印完整的节点名称，包括路径。 This happens because the original documentation talks about "fwnode handles", without mentioning the actual type name. Signed-off-by: Geert Uytterhoeven Tested-by: Kunwu Chan Reviewed-by: Kunwu Chan Reviewed-by: Andy Shevchenko Reviewed-by: Sakari Ailus Fixes: 3bd32d6a2ee62db3 ("lib/vsprintf: Add %pfw conversion specifier for printing fwnode names") Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/07262c55e82fc4a3e3dbe7c45713b14955271e7f.1754552156.git.geert+renesas@glider.be --- Documentation/core-api/printk-formats.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/core-api/printk-formats.rst b/Documentation/core-api/printk-formats.rst index 4b7f3646ec6c..7f2f11b48286 100644 --- a/Documentation/core-api/printk-formats.rst +++ b/Documentation/core-api/printk-formats.rst @@ -521,7 +521,7 @@ Fwnode handles %pfw[fP] -For printing information on fwnode handles. The default is to print the full +For printing information on an fwnode_handle. The default is to print the full node name, including the path. The modifiers are functionally equivalent to %pOF above. -- cgit v1.2.3 From 3feaa8a469ccb14e8adf69ae3235785182905bfc Mon Sep 17 00:00:00 2001 From: Osama Albahrani Date: Mon, 4 Aug 2025 18:25:14 +0300 Subject: docs: aoe: Remove trailing whitespace Fix `ERROR: trailing whitespace` errors from scripts/checkpatch.pl Signed-off-by: Osama Albahrani Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250804152516.16493-1-osalbahr@gmail.com --- Documentation/admin-guide/aoe/udev.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/aoe/udev.txt b/Documentation/admin-guide/aoe/udev.txt index 5fb756466bc7..d55ecb411c21 100644 --- a/Documentation/admin-guide/aoe/udev.txt +++ b/Documentation/admin-guide/aoe/udev.txt @@ -2,7 +2,7 @@ # They may be installed along the following lines. Check the section # 8 udev manpage to see whether your udev supports SUBSYSTEM, and # whether it uses one or two equal signs for SUBSYSTEM and KERNEL. -# +# # ecashin@makki ~$ su # Password: # bash# find /etc -type f -name udev.conf @@ -13,7 +13,7 @@ # 10-wacom.rules 50-udev.rules # bash# cp /path/to/linux/Documentation/admin-guide/aoe/udev.txt \ # /etc/udev/rules.d/60-aoe.rules -# +# # aoe char devices SUBSYSTEM=="aoe", KERNEL=="discover", NAME="etherd/%k", GROUP="disk", MODE="0220" @@ -22,5 +22,5 @@ SUBSYSTEM=="aoe", KERNEL=="interfaces", NAME="etherd/%k", GROUP="disk", MODE="02 SUBSYSTEM=="aoe", KERNEL=="revalidate", NAME="etherd/%k", GROUP="disk", MODE="0220" SUBSYSTEM=="aoe", KERNEL=="flush", NAME="etherd/%k", GROUP="disk", MODE="0220" -# aoe block devices +# aoe block devices KERNEL=="etherd*", GROUP="disk" -- cgit v1.2.3 From 632f0b6c3e32758e5c93d4e3c2860a3708b9853e Mon Sep 17 00:00:00 2001 From: Daniel Lee Date: Mon, 4 Aug 2025 23:52:26 -0700 Subject: f2fs: add lookup_mode mount option For casefolded directories, f2fs may fall back to a linear search if a hash-based lookup fails. This can cause severe performance regressions. While this behavior can be controlled by userspace tools (e.g. mkfs, fsck) by setting an on-disk flag, a kernel-level solution is needed to guarantee the lookup behavior regardless of the on-disk state. This commit introduces the 'lookup_mode' mount option to provide this kernel-side control. The option accepts three values: - perf: (Default) Enforces a hash-only lookup. The linear fallback is always disabled. - compat: Enables the linear search fallback for compatibility with directory entries from older kernels. - auto: Determines the mode based on the on-disk flag, preserving the userspace-based behavior. Signed-off-by: Daniel Lee Reviewed-by: Chao Yu Signed-off-by: Jaegeuk Kim --- Documentation/filesystems/f2fs.rst | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/f2fs.rst b/Documentation/filesystems/f2fs.rst index e5bb89452aff..5cad369ceb92 100644 --- a/Documentation/filesystems/f2fs.rst +++ b/Documentation/filesystems/f2fs.rst @@ -370,6 +370,25 @@ errors=%s Specify f2fs behavior on critical errors. This supports modes: ====================== =============== =============== ======== nat_bits Enable nat_bits feature to enhance full/empty nat blocks access, by default it's disabled. +lookup_mode=%s Control the directory lookup behavior for casefolded + directories. This option has no effect on directories + that do not have the casefold feature enabled. + + ================== ======================================== + Value Description + ================== ======================================== + perf (Default) Enforces a hash-only lookup. + The linear search fallback is always + disabled, ignoring the on-disk flag. + compat Enables the linear search fallback for + compatibility with directory entries + created by older kernel that used a + different case-folding algorithm. + This mode ignores the on-disk flag. + auto F2FS determines the mode based on the + on-disk `SB_ENC_NO_COMPAT_FALLBACK_FL` + flag. + ================== ======================================== ======================== ============================================================ Debugfs Entries -- cgit v1.2.3 From 4fff5db420fef91d439f87f6c0d439ef291b3dd2 Mon Sep 17 00:00:00 2001 From: Kim Tae Hyun Date: Sat, 2 Aug 2025 21:58:01 +0900 Subject: docs: update physical memory documentation by adding N_GENERIC_INITIATOR to enum node_states While reading physical_memory.rst, I noticed that N_GENERIC_INITIATOR has not been update from the node_states list, even though it's already added in commit 894c26a1c274b8eafbb4b1dad67e70e51a106061. Signed-off-by: Kim Tae Hyun Acked-by: Mike Rapoport (Microsoft) Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250802125801.10068-1-kimth0312@gmail.com --- Documentation/mm/physical_memory.rst | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/mm/physical_memory.rst b/Documentation/mm/physical_memory.rst index 9af11b5bd145..b76183545e5b 100644 --- a/Documentation/mm/physical_memory.rst +++ b/Documentation/mm/physical_memory.rst @@ -171,6 +171,8 @@ nodes with particular properties as defined by ``enum node_states``: The node has memory(regular, high, movable) ``N_CPU`` The node has one or more CPUs +``N_GENERIC_INITIATOR`` + The node has one or more Generic Initiators For each node that has a property described above, the bit corresponding to the node ID in the ``node_states[]`` bitmask is set. -- cgit v1.2.3 From 1bd119da0b93d6d61891edf2b9d036800aba687f Mon Sep 17 00:00:00 2001 From: Daniel Lee Date: Mon, 4 Aug 2025 23:52:27 -0700 Subject: f2fs: add sysfs entry for effective lookup mode This commit introduces a new read-only sysfs entry at /sys/fs/f2fs//effective_lookup_mode. This entry displays the actual directory lookup mode F2FS is currently using. This is needed for debugging and verification, as the behavior is determined by both on-disk flags and mount options. Signed-off-by: Daniel Lee Reviewed-by: Chao Yu Signed-off-by: Jaegeuk Kim --- Documentation/ABI/testing/sysfs-fs-f2fs | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs index bc0e7fefc39d..ce189acd1908 100644 --- a/Documentation/ABI/testing/sysfs-fs-f2fs +++ b/Documentation/ABI/testing/sysfs-fs-f2fs @@ -883,3 +883,18 @@ Date: June 2025 Contact: "Daeho Jeong" Description: Control GC algorithm for boost GC. 0: cost benefit, 1: greedy Default: 1 + +What: /sys/fs/f2fs//effective_lookup_mode +Date: August 2025 +Contact: "Daniel Lee" +Description: + This is a read-only entry to show the effective directory lookup mode + F2FS is currently using for casefolded directories. + This considers both the "lookup_mode" mount option and the on-disk + encoding flag, SB_ENC_NO_COMPAT_FALLBACK_FL. + + Possible values are: + - "perf": Hash-only lookup. + - "compat": Hash-based lookup with a linear search fallback enabled + - "auto:perf": lookup_mode is auto and fallback is disabled on-disk + - "auto:compat": lookup_mode is auto and fallback is enabled on-disk -- cgit v1.2.3 From 7069b5296e968d0e7d5fd6b825f221f0d766f3ea Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=A0t=C4=9Bp=C3=A1n=20N=C4=9Bmec?= Date: Tue, 29 Jul 2025 20:40:36 +0200 Subject: docs: admin-guide: update to current minimum pipe size default MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The pipe size limit used when the fs.pipe-user-pages-soft sysctl value is reached was increased from one to two pages in commit 46c4c9d1beb7; update the documentation to match the new reality. Fixes: 46c4c9d1beb7 ("pipe: increase minimum default pipe size to 2 pages") Signed-off-by: Štěpán Němec Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250729-pipedoc-v2-1-18b8e735a9c6@smrk.net --- Documentation/admin-guide/sysctl/fs.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/sysctl/fs.rst b/Documentation/admin-guide/sysctl/fs.rst index 6c54718c9d04..9b7f65c3efd8 100644 --- a/Documentation/admin-guide/sysctl/fs.rst +++ b/Documentation/admin-guide/sysctl/fs.rst @@ -164,8 +164,8 @@ pipe-user-pages-soft -------------------- Maximum total number of pages a non-privileged user may allocate for pipes -before the pipe size gets limited to a single page. Once this limit is reached, -new pipes will be limited to a single page in size for this user in order to +before the pipe size gets limited to two pages. Once this limit is reached, +new pipes will be limited to two pages in size for this user in order to limit total memory usage, and trying to increase them using ``fcntl()`` will be denied until usage goes below the limit again. The default value allows to allocate up to 1024 pipes at their default size. When set to 0, no limit is -- cgit v1.2.3 From 1f590377eb3c2680cb1101fa1a6a1f20a5fc4002 Mon Sep 17 00:00:00 2001 From: Ranganath V N Date: Sat, 26 Jul 2025 12:06:44 +0530 Subject: Documentation: Fix minor typos Corrected a few spelling errors and improved the phrasing changes since v1: --corrected as per review Signed-off-by: Ranganath V N Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250726063645.4156-1-vnranganath.20@gmail.com --- Documentation/arch/loongarch/irq-chip-model.rst | 4 ++-- Documentation/arch/x86/cpuinfo.rst | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/arch/loongarch/irq-chip-model.rst b/Documentation/arch/loongarch/irq-chip-model.rst index a7ecce11e445..8f5c3345109e 100644 --- a/Documentation/arch/loongarch/irq-chip-model.rst +++ b/Documentation/arch/loongarch/irq-chip-model.rst @@ -139,13 +139,13 @@ Feature EXTIOI_HAS_INT_ENCODE is part of standard EIOINTC. If it is 1, it indicates that CPU Interrupt Pin selection can be normal method rather than bitmap method, so interrupt can be routed to IP0 - IP15. -Feature EXTIOI_HAS_CPU_ENCODE is entension of V-EIOINTC. If it is 1, it +Feature EXTIOI_HAS_CPU_ENCODE is extension of V-EIOINTC. If it is 1, it indicates that CPU selection can be normal method rather than bitmap method, so interrupt can be routed to CPU0 - CPU255. EXTIOI_VIRT_CONFIG ------------------ -This register is read-write register, for compatibility intterupt routed uses +This register is read-write register, for compatibility interrupt routed uses the default method which is the same with standard EIOINTC. If the bit is set with 1, it indicated HW to use normal method rather than bitmap method. diff --git a/Documentation/arch/x86/cpuinfo.rst b/Documentation/arch/x86/cpuinfo.rst index dd8b7806944e..9f2e47c4b1c8 100644 --- a/Documentation/arch/x86/cpuinfo.rst +++ b/Documentation/arch/x86/cpuinfo.rst @@ -11,7 +11,7 @@ The list of feature flags in /proc/cpuinfo is not complete and represents an ill-fated attempt from long time ago to put feature flags in an easy to find place for userspace. -However, the amount of feature flags is growing by the CPU generation, +However, the number of feature flags is growing with each CPU generation, leading to unparseable and unwieldy /proc/cpuinfo. What is more, those feature flags do not even need to be in that file -- cgit v1.2.3 From 3fa1095979393d5b178264cc1bdfb473e80ab774 Mon Sep 17 00:00:00 2001 From: Kathiravan Thirumoorthy Date: Fri, 2 May 2025 18:47:49 +0530 Subject: dt-bindings: sram: qcom,imem: Document IPQ5424 compatible Add compatible for Qualcomm's IPQ5424 IMEM. Acked-by: Rob Herring (Arm) Signed-off-by: Kathiravan Thirumoorthy Link: https://lore.kernel.org/r/20250502-wdt_reset_reason-v3-1-b2dc7ace38ca@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/sram/qcom,imem.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sram/qcom,imem.yaml b/Documentation/devicetree/bindings/sram/qcom,imem.yaml index 72d35e30c439..6a627c57ae2f 100644 --- a/Documentation/devicetree/bindings/sram/qcom,imem.yaml +++ b/Documentation/devicetree/bindings/sram/qcom,imem.yaml @@ -18,6 +18,7 @@ properties: items: - enum: - qcom,apq8064-imem + - qcom,ipq5424-imem - qcom,msm8226-imem - qcom,msm8974-imem - qcom,msm8976-imem -- cgit v1.2.3 From 2115dc3e3376b7bd5021950b45eebbcd992e9be9 Mon Sep 17 00:00:00 2001 From: Bart Van Assche Date: Thu, 24 Jul 2025 08:34:42 -0700 Subject: docs: filesystems: sysfs: Recommend sysfs_emit() for new code only The advantages of converting existing sysfs show() methods to sysfs_emit() and sysfs_emit_at() do not outweigh the risk of introducing bugs. Hence recommend sysfs_emit() and sysfs_emit_at() only for new implementations of show() methods. Cc: Greg Kroah-Hartman Cc: James Bottomley Cc: Martin K. Petersen Signed-off-by: Bart Van Assche Reviewed-by: Martin K. Petersen Acked-by: Greg Kroah-Hartman Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250724153449.2433395-1-bvanassche@acm.org --- Documentation/filesystems/sysfs.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/sysfs.rst b/Documentation/filesystems/sysfs.rst index c32993bc83c7..624e4f51212e 100644 --- a/Documentation/filesystems/sysfs.rst +++ b/Documentation/filesystems/sysfs.rst @@ -243,8 +243,8 @@ Other notes: - show() methods should return the number of bytes printed into the buffer. -- show() should only use sysfs_emit() or sysfs_emit_at() when formatting - the value to be returned to user space. +- New implementations of show() methods should only use sysfs_emit() or + sysfs_emit_at() when formatting the value to be returned to user space. - store() should return the number of bytes used from the buffer. If the entire buffer has been used, just return the count argument. -- cgit v1.2.3 From 3e0252ea5d91ac21c6b606f71f42733b526646df Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 4 Jun 2025 16:40:28 +0300 Subject: dt-bindings: arm: qcom: add qcom,sm6150 fallback compatible to QCS615 QCS615 SoC is based on the earlier mobile chip SM6150. Add corresponding compatible string to follow established practice for IoT chips. Signed-off-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250604-qcs615-sm6150-v1-1-2f01fd46c365@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index bf5f3beb320b..1b705079c1ae 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -87,6 +87,7 @@ description: | sm6115 sm6115p sm6125 + sm6150 sm6350 sm6375 sm7125 @@ -949,6 +950,7 @@ properties: - enum: - qcom,qcs615-ride - const: qcom,qcs615 + - const: qcom,sm6150 - items: - enum: -- cgit v1.2.3 From 1a67f85c690658a35cac41c070df33e3e5a72868 Mon Sep 17 00:00:00 2001 From: Val Packett Date: Sun, 25 May 2025 06:53:33 -0300 Subject: dt-bindings: arm: qcom: Add Dell Latitude 7455 Document the X1E80100-based Dell Latitude 7455 laptop. Signed-off-by: Val Packett Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250525095341.12462-3-val@packett.cool Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 1b705079c1ae..c8a71a33d358 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1149,6 +1149,7 @@ properties: - enum: - asus,vivobook-s15 - asus,zenbook-a14-ux3407ra + - dell,latitude-7455 - dell,xps13-9345 - hp,elitebook-ultra-g1q - hp,omnibook-x14 -- cgit v1.2.3 From cb69daf085b5974fef2df9789f8c1b35e78e7913 Mon Sep 17 00:00:00 2001 From: Nick Hu Date: Fri, 1 Aug 2025 15:01:12 +0800 Subject: dt-bindings: riscv: Add SiFive vendor extensions description Add description for SiFive vendor extensions "xsfcflushdlone", "xsfpgflushdlone" and "xsfcease". This is used in the SBI implementation [1]. Link: https://lore.kernel.org/opensbi/20250708074940.10904-1-nick.hu@sifive.com/ [1] Signed-off-by: Nick Hu Acked-by: Conor Dooley Signed-off-by: Conor Dooley --- .../devicetree/bindings/riscv/extensions.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index ede6a58ccf53..5638297759df 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -663,6 +663,24 @@ properties: https://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf # SiFive + - const: xsfcease + description: + SiFive CEASE Instruction Extensions Specification. + See more details in + https://www.sifive.com/document-file/freedom-u740-c000-manual + + - const: xsfcflushdlone + description: + SiFive L1D Cache Flush Instruction Extensions Specification. + See more details in + https://www.sifive.com/document-file/freedom-u740-c000-manual + + - const: xsfpgflushdlone + description: + SiFive PGFLUSH Instruction Extensions for the power management. The + CPU will flush the L1D and enter the cease state after executing + the instruction. + - const: xsfvqmaccdod description: SiFive Int8 Matrix Multiplication Extensions Specification. -- cgit v1.2.3 From f93e5882134a314760d47536d93b57fbd32d0da1 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Jul 2025 15:24:37 +0200 Subject: dt-bindings: arm: qcom: Drop redundant free-form SoC list The schema and Devicetree specification defines how list of top-level compatibles should be created, thus first paragraph explaining this is completely redundant. The list of SoCs is redundant as well, because the schema lists them. On the other hand, Linux kernel should not be place to store marketing names of some company products, so such list is irrelevant here. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250724132436.77160-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 95 ------------------------- 1 file changed, 95 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index c8a71a33d358..1df00d9e6de0 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -10,101 +10,6 @@ maintainers: - Bjorn Andersson description: | - For devices using the Qualcomm SoC the "compatible" properties consists of - one or several "manufacturer,model" strings, describing the device itself, - followed by one or several "qcom," strings, describing the SoC used in - the device. - - The 'SoC' element must be one of the following strings: - - apq8016 - apq8026 - apq8064 - apq8074 - apq8084 - apq8094 - apq8096 - ipq4018 - ipq4019 - ipq5018 - ipq5332 - ipq5424 - ipq6018 - ipq8064 - ipq8074 - ipq9574 - mdm9615 - msm8226 - msm8660 - msm8916 - msm8917 - msm8926 - msm8929 - msm8939 - msm8953 - msm8956 - msm8960 - msm8974 - msm8974pro - msm8976 - msm8992 - msm8994 - msm8996 - msm8996pro - msm8998 - qcs404 - qcs615 - qcs8300 - qcs8550 - qcm2290 - qcm6490 - qcs9100 - qdu1000 - qrb2210 - qrb4210 - qru1000 - sa8155p - sa8540p - sa8775p - sar2130p - sc7180 - sc7280 - sc8180x - sc8280xp - sda660 - sdm450 - sdm630 - sdm632 - sdm636 - sdm660 - sdm670 - sdm845 - sdx55 - sdx65 - sdx75 - sm4250 - sm4450 - sm6115 - sm6115p - sm6125 - sm6150 - sm6350 - sm6375 - sm7125 - sm7150 - sm7225 - sm7325 - sm8150 - sm8250 - sm8350 - sm8450 - sm8550 - sm8650 - sm8750 - x1e78100 - x1e80100 - x1p42100 - There are many devices in the list below that run the standard ChromeOS bootloader setup and use the open source depthcharge bootloader to boot the OS. These devices use the bootflow explained at -- cgit v1.2.3 From a6c4d92fcc74b4402d1ecdf6f4a7304a37a69ada Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Thu, 17 Jul 2025 08:54:46 +0200 Subject: dt-bindings: soc: qcom,rpmh-rsc: Remove double colon from description No double colon is necessary in the description. Fix it. Reported-by: Rob Herring Closes: https://lore.kernel.org/lkml/20250625150458.GA1182597-robh@kernel.org/ Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250717-bindings-double-colon-v1-3-c04abc180fcd@fairphone.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml index 036562eb5140..26d9bc773ec5 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml @@ -28,7 +28,7 @@ description: | SLEEP - Triggered by F/W WAKE - Triggered by F/W CONTROL - Triggered by F/W - See also:: + See also: The order in which they are described in the DT, should match the hardware configuration. -- cgit v1.2.3 From 474aa14da0e160f2f3fb002b64b8363ae91f9590 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 16 Jul 2025 18:24:13 +0200 Subject: dt-bindings: arm: qcom-soc: Document new Milos and Glymur SoCs Extend the schema enforcing correct SoC-block naming to cover Milos (compatibles already accepted by some maintainers for next release) and Glymur (posted on mailing lists [1]) SoCs. Link: https://lore.kernel.org/linux-devicetree/20250716152017.4070029-1-pankaj.patil@oss.qualcomm.com/ [1] Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250716162412.27471-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom-soc.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom-soc.yaml b/Documentation/devicetree/bindings/arm/qcom-soc.yaml index a77d68dcad4e..27261039d56f 100644 --- a/Documentation/devicetree/bindings/arm/qcom-soc.yaml +++ b/Documentation/devicetree/bindings/arm/qcom-soc.yaml @@ -23,7 +23,9 @@ description: | select: properties: compatible: - pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sar|sc|sd[amx]|sm|x1[ep])[0-9]+.*$" + oneOf: + - pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sar|sc|sd[amx]|sm|x1[ep])[0-9]+.*$" + - pattern: "^qcom,.*(glymur|milos).*$" required: - compatible @@ -34,6 +36,7 @@ properties: - pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1[ep])[0-9]+(pro)?-.*$" - pattern: "^qcom,sar[0-9]+[a-z]?-.*$" - pattern: "^qcom,(sa|sc)8[0-9]+[a-z][a-z]?-.*$" + - pattern: "^qcom,(glymur|milos)-.*$" # Legacy namings - variations of existing patterns/compatibles are OK, # but do not add completely new entries to these: -- cgit v1.2.3 From bae72efa3ca6674ff99668b00290376babae10f5 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Wed, 16 Jul 2025 12:16:08 +0200 Subject: dt-bindings: arm: qcom: Remove sdm845-cheza Cheza was a prototype board, used mainly by the ChromeOS folks. Almost no working devices are known to exist, and the small amount of remaining ones are not in use anymore. Remove the compatible strings reserved for it, as, quite frankly, Cheza is no more. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Reviewed-by: Douglas Anderson Link: https://lore.kernel.org/r/20250716-topic-goodnight_cheza-v2-2-6fa8d3261813@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 3 --- 1 file changed, 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 1df00d9e6de0..b5acb0d26346 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -884,9 +884,6 @@ properties: - items: - enum: - - google,cheza - - google,cheza-rev1 - - google,cheza-rev2 - lenovo,yoga-c630 - lg,judyln - lg,judyp -- cgit v1.2.3 From 3a99873d8b9f6c1ec027987fff7b32eab9273316 Mon Sep 17 00:00:00 2001 From: Antony Kurniawan Soemardi Date: Sun, 22 Jun 2025 18:26:47 +0000 Subject: dt-bindings: arm: qcom: add Sony Xperia SP Document the Sony Xperia SP (huashan), which uses the MSM8960T SoC. The MSM8960T is a variant of the MSM8960 featuring an upgraded GPU (Adreno 320 instead of Adreno 225) and a slightly overclocked CPU (1.7GHz instead of 1.5GHz). Signed-off-by: Antony Kurniawan Soemardi Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250623-msm8960-sdcard-v2-4-340a5e8f7df0@smankusors.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index ae43b3556580..b9e8defc7ffe 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -203,6 +203,12 @@ properties: - samsung,expressatt - const: qcom,msm8960 + - items: + - enum: + - sony,huashan + - const: qcom,msm8960t + - const: qcom,msm8960 + - items: - enum: - lge,hammerhead -- cgit v1.2.3 From be477c3924f80809871df12f72d80d405d482ba2 Mon Sep 17 00:00:00 2001 From: Satya Priya Kakitapalli Date: Thu, 10 Jul 2025 18:30:39 +0530 Subject: dt-bindings: clock: qcom,videocc: Add sc8180x compatible The sc8180x video clock controller block is identical to that of sm8150. Add a new compatible string for sc8180x videocc and use sm8150 as fallback. Signed-off-by: Satya Priya Kakitapalli Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250710-sc8180x-videocc-dt-v4-1-07a9d9d5e0e6@quicinc.com Signed-off-by: Bjorn Andersson --- .../devicetree/bindings/clock/qcom,videocc.yaml | 23 +++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml index 5f7738d6835c..f4ff9acef9d5 100644 --- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml @@ -23,13 +23,17 @@ description: | properties: compatible: - enum: - - qcom,sc7180-videocc - - qcom,sc7280-videocc - - qcom,sdm845-videocc - - qcom,sm6350-videocc - - qcom,sm8150-videocc - - qcom,sm8250-videocc + oneOf: + - enum: + - qcom,sc7180-videocc + - qcom,sc7280-videocc + - qcom,sdm845-videocc + - qcom,sm6350-videocc + - qcom,sm8150-videocc + - qcom,sm8250-videocc + - items: + - const: qcom,sc8180x-videocc + - const: qcom,sm8150-videocc clocks: minItems: 1 @@ -110,8 +114,9 @@ allOf: - if: properties: compatible: - enum: - - qcom,sm8150-videocc + contains: + enum: + - qcom,sm8150-videocc then: properties: clocks: -- cgit v1.2.3 From e98329896b5639f8437af8ff9316f20cb50d9187 Mon Sep 17 00:00:00 2001 From: Taniya Das Date: Wed, 2 Jul 2025 14:43:09 +0530 Subject: dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCS615 compatible Document compatible for cpufreq hardware on Qualcomm QCS615 platform. Signed-off-by: Taniya Das Acked-by: Krzysztof Kozlowski Signed-off-by: Viresh Kumar --- Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml index e0242bed3342..2d42fc3d8ef8 100644 --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml @@ -22,6 +22,7 @@ properties: items: - enum: - qcom,qcm2290-cpufreq-hw + - qcom,qcs615-cpufreq-hw - qcom,sc7180-cpufreq-hw - qcom,sc8180x-cpufreq-hw - qcom,sdm670-cpufreq-hw @@ -132,6 +133,7 @@ allOf: compatible: contains: enum: + - qcom,qcs615-cpufreq-hw - qcom,qdu1000-cpufreq-epss - qcom,sa8255p-cpufreq-epss - qcom,sa8775p-cpufreq-epss -- cgit v1.2.3 From dd5d5a11bacb2eb0e00e0f6a9bc919afed2ec751 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 10 Jun 2025 11:42:30 +0200 Subject: docs: netlink: netlink-raw.rst: use :ref: instead of :doc: Currently, rt documents are referred with: Documentation/userspace-api/netlink/netlink-raw.rst: :doc:`rt-link<../../networking/netlink_spec/rt-link>` Documentation/userspace-api/netlink/netlink-raw.rst: :doc:`tc<../../networking/netlink_spec/tc>` Documentation/userspace-api/netlink/netlink-raw.rst: :doc:`tc<../../networking/netlink_spec/tc>` Having :doc: references with relative paths doesn't always work, as it may have troubles when O= is used. Also that's hard to maintain, and may break if we change the way rst files are generated from yaml. Better to use instead a reference for the netlink family. So, replace them by Sphinx cross-reference tag that are created by ynl_gen_rst.py. Signed-off-by: Mauro Carvalho Chehab Reviewed-by: Donald Hunter --- Documentation/userspace-api/netlink/netlink-raw.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/userspace-api/netlink/netlink-raw.rst b/Documentation/userspace-api/netlink/netlink-raw.rst index 31fc91020eb3..aae296c170c5 100644 --- a/Documentation/userspace-api/netlink/netlink-raw.rst +++ b/Documentation/userspace-api/netlink/netlink-raw.rst @@ -62,8 +62,8 @@ Sub-messages ------------ Several raw netlink families such as -:doc:`rt-link<../../networking/netlink_spec/rt-link>` and -:doc:`tc<../../networking/netlink_spec/tc>` use attribute nesting as an +:ref:`rt-link` and +:ref:`tc` use attribute nesting as an abstraction to carry module specific information. Conceptually it looks as follows:: @@ -162,7 +162,7 @@ then this is an error. Nested struct definitions ------------------------- -Many raw netlink families such as :doc:`tc<../../networking/netlink_spec/tc>` +Many raw netlink families such as :ref:`tc` make use of nested struct definitions. The ``netlink-raw`` schema makes it possible to embed a struct within a struct definition using the ``struct`` property. For example, the following struct definition embeds the -- cgit v1.2.3 From beaea9c4ba2d8ef1b10223dc3a75a7d7be3e5cd9 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 12 Jun 2025 10:34:30 +0200 Subject: docs: netlink: index.rst: add a netlink index file Instead of generating the index file, use glob to automatically include all data from yaml. Signed-off-by: Mauro Carvalho Chehab Reviewed-by: Donald Hunter --- Documentation/netlink/specs/index.rst | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 Documentation/netlink/specs/index.rst (limited to 'Documentation') diff --git a/Documentation/netlink/specs/index.rst b/Documentation/netlink/specs/index.rst new file mode 100644 index 000000000000..7f7cf4a096f2 --- /dev/null +++ b/Documentation/netlink/specs/index.rst @@ -0,0 +1,13 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. _specs: + +============================= +Netlink Family Specifications +============================= + +.. toctree:: + :maxdepth: 1 + :glob: + + * -- cgit v1.2.3 From bb1e3629b2e684e03adb21d75c7839f3afeb488e Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 12 Jun 2025 09:58:56 +0200 Subject: docs: sphinx: add a parser for yaml files for Netlink specs Add a simple sphinx.Parser to handle yaml files and add the the code to handle Netlink specs. All other yaml files are ignored. The code was written in a way that parsing yaml for different subsystems and even for different parts of Netlink are easy. All it takes to have a different parser is to add an import line similar to: from doc_generator import YnlDocGenerator adding the corresponding parser somewhere at the extension: netlink_parser = YnlDocGenerator() And then add a logic inside parse() to handle different doc outputs, depending on the file location, similar to: if "/netlink/specs/" in fname: msg = self.netlink_parser.parse_yaml_file(fname) Signed-off-by: Mauro Carvalho Chehab Reviewed-by: Donald Hunter --- Documentation/sphinx/parser_yaml.py | 104 ++++++++++++++++++++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100755 Documentation/sphinx/parser_yaml.py (limited to 'Documentation') diff --git a/Documentation/sphinx/parser_yaml.py b/Documentation/sphinx/parser_yaml.py new file mode 100755 index 000000000000..fa2e6da17617 --- /dev/null +++ b/Documentation/sphinx/parser_yaml.py @@ -0,0 +1,104 @@ +# SPDX-License-Identifier: GPL-2.0 +# Copyright 2025 Mauro Carvalho Chehab + +""" +Sphinx extension for processing YAML files +""" + +import os +import re +import sys + +from pprint import pformat + +from docutils.parsers.rst import Parser as RSTParser +from docutils.statemachine import ViewList + +from sphinx.util import logging +from sphinx.parsers import Parser + +srctree = os.path.abspath(os.environ["srctree"]) +sys.path.insert(0, os.path.join(srctree, "tools/net/ynl/pyynl/lib")) + +from doc_generator import YnlDocGenerator # pylint: disable=C0413 + +logger = logging.getLogger(__name__) + +class YamlParser(Parser): + """ + Kernel parser for YAML files. + + This is a simple sphinx.Parser to handle yaml files inside the + Kernel tree that will be part of the built documentation. + + The actual parser function is not contained here: the code was + written in a way that parsing yaml for different subsystems + can be done from a single dispatcher. + + All it takes to have parse YAML patches is to have an import line: + + from some_parser_code import NewYamlGenerator + + To this module. Then add an instance of the parser with: + + new_parser = NewYamlGenerator() + + and add a logic inside parse() to handle it based on the path, + like this: + + if "/foo" in fname: + msg = self.new_parser.parse_yaml_file(fname) + """ + + supported = ('yaml', ) + + netlink_parser = YnlDocGenerator() + + def rst_parse(self, inputstring, document, msg): + """ + Receives a ReST content that was previously converted by the + YAML parser, adding it to the document tree. + """ + + self.setup_parse(inputstring, document) + + result = ViewList() + + try: + # Parse message with RSTParser + for i, line in enumerate(msg.split('\n')): + result.append(line, document.current_source, i) + + rst_parser = RSTParser() + rst_parser.parse('\n'.join(result), document) + + except Exception as e: + document.reporter.error("YAML parsing error: %s" % pformat(e)) + + self.finish_parse() + + # Overrides docutils.parsers.Parser. See sphinx.parsers.RSTParser + def parse(self, inputstring, document): + """Check if a YAML is meant to be parsed.""" + + fname = document.current_source + + # Handle netlink yaml specs + if "/netlink/specs/" in fname: + msg = self.netlink_parser.parse_yaml_file(fname) + self.rst_parse(inputstring, document, msg) + + # All other yaml files are ignored + +def setup(app): + """Setup function for the Sphinx extension.""" + + # Add YAML parser + app.add_source_parser(YamlParser) + app.add_source_suffix('.yaml', 'yaml') + + return { + 'version': '1.0', + 'parallel_read_safe': True, + 'parallel_write_safe': True, + } -- cgit v1.2.3 From 1ce4da3dd99e98bd4a8b396c291041080e0fe85e Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 12 Jun 2025 10:34:30 +0200 Subject: docs: use parser_yaml extension to handle Netlink specs Instead of manually calling ynl_gen_rst.py, use a Sphinx extension. This way, no .rst files would be written to the Kernel source directories. We are using here a toctree with :glob: property. This way, there is no need to touch the netlink/specs/index.rst file every time a new Netlink spec is added/renamed/removed. Signed-off-by: Mauro Carvalho Chehab Reviewed-by: Donald Hunter --- Documentation/Makefile | 17 ----------------- Documentation/conf.py | 20 +++++++++++++++----- Documentation/networking/index.rst | 2 +- Documentation/networking/netlink_spec/readme.txt | 4 ---- 4 files changed, 16 insertions(+), 27 deletions(-) delete mode 100644 Documentation/networking/netlink_spec/readme.txt (limited to 'Documentation') diff --git a/Documentation/Makefile b/Documentation/Makefile index b98477df5ddf..820f07e0afe6 100644 --- a/Documentation/Makefile +++ b/Documentation/Makefile @@ -104,22 +104,6 @@ quiet_cmd_sphinx = SPHINX $@ --> file://$(abspath $(BUILDDIR)/$3/$4) cp $(if $(patsubst /%,,$(DOCS_CSS)),$(abspath $(srctree)/$(DOCS_CSS)),$(DOCS_CSS)) $(BUILDDIR)/$3/_static/; \ fi -YNL_INDEX:=$(srctree)/Documentation/networking/netlink_spec/index.rst -YNL_RST_DIR:=$(srctree)/Documentation/networking/netlink_spec -YNL_YAML_DIR:=$(srctree)/Documentation/netlink/specs -YNL_TOOL:=$(srctree)/tools/net/ynl/pyynl/ynl_gen_rst.py - -YNL_RST_FILES_TMP := $(patsubst %.yaml,%.rst,$(wildcard $(YNL_YAML_DIR)/*.yaml)) -YNL_RST_FILES := $(patsubst $(YNL_YAML_DIR)%,$(YNL_RST_DIR)%, $(YNL_RST_FILES_TMP)) - -$(YNL_INDEX): $(YNL_RST_FILES) - $(Q)$(YNL_TOOL) -o $@ -x - -$(YNL_RST_DIR)/%.rst: $(YNL_YAML_DIR)/%.yaml $(YNL_TOOL) - $(Q)$(YNL_TOOL) -i $< -o $@ - -htmldocs texinfodocs latexdocs epubdocs xmldocs: $(YNL_INDEX) - htmldocs: @$(srctree)/scripts/sphinx-pre-install --version-check @+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,html,$(var),,$(var))) @@ -186,7 +170,6 @@ refcheckdocs: $(Q)cd $(srctree);scripts/documentation-file-ref-check cleandocs: - $(Q)rm -f $(YNL_INDEX) $(YNL_RST_FILES) $(Q)rm -rf $(BUILDDIR) $(Q)$(MAKE) BUILDDIR=$(abspath $(BUILDDIR)) $(build)=Documentation/userspace-api/media clean diff --git a/Documentation/conf.py b/Documentation/conf.py index 700516238d3f..f9828f3862f9 100644 --- a/Documentation/conf.py +++ b/Documentation/conf.py @@ -42,6 +42,15 @@ exclude_patterns = [] dyn_include_patterns = [] dyn_exclude_patterns = ["output"] +# Currently, only netlink/specs has a parser for yaml. +# Prefer using include patterns if available, as it is faster +if has_include_patterns: + dyn_include_patterns.append("netlink/specs/*.yaml") +else: + dyn_exclude_patterns.append("netlink/*.yaml") + dyn_exclude_patterns.append("devicetree/bindings/**.yaml") + dyn_exclude_patterns.append("core-api/kho/bindings/**.yaml") + # Properly handle include/exclude patterns # ---------------------------------------- @@ -102,12 +111,12 @@ extensions = [ "kernel_include", "kfigure", "maintainers_include", + "parser_yaml", "rstFlatTable", "sphinx.ext.autosectionlabel", "sphinx.ext.ifconfig", "translations", ] - # Since Sphinx version 3, the C function parser is more pedantic with regards # to type checking. Due to that, having macros at c:function cause problems. # Those needed to be escaped by using c_id_attributes[] array @@ -204,10 +213,11 @@ else: # Add any paths that contain templates here, relative to this directory. templates_path = ["sphinx/templates"] -# The suffix(es) of source filenames. -# You can specify multiple suffix as a list of string: -# source_suffix = ['.rst', '.md'] -source_suffix = '.rst' +# The suffixes of source filenames that will be automatically parsed +source_suffix = { + ".rst": "restructuredtext", + ".yaml": "yaml", +} # The encoding of source files. # source_encoding = 'utf-8-sig' diff --git a/Documentation/networking/index.rst b/Documentation/networking/index.rst index ac90b82f3ce9..b7a4969e9bc9 100644 --- a/Documentation/networking/index.rst +++ b/Documentation/networking/index.rst @@ -57,7 +57,7 @@ Contents: filter generic-hdlc generic_netlink - netlink_spec/index + ../netlink/specs/index gen_stats gtp ila diff --git a/Documentation/networking/netlink_spec/readme.txt b/Documentation/networking/netlink_spec/readme.txt deleted file mode 100644 index 030b44aca4e6..000000000000 --- a/Documentation/networking/netlink_spec/readme.txt +++ /dev/null @@ -1,4 +0,0 @@ -SPDX-License-Identifier: GPL-2.0 - -This file is populated during the build of the documentation (htmldocs) by the -tools/net/ynl/pyynl/ynl_gen_rst.py script. -- cgit v1.2.3 From 11d137aaef802fb2a22b917b4d91e800141140c7 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 12 Jun 2025 15:27:39 +0200 Subject: docs: uapi: netlink: update netlink specs link With the recent parser_yaml extension, and the removal of the auto-generated ReST source files, the location of netlink specs changed. Update uAPI accordingly. Signed-off-by: Mauro Carvalho Chehab Reviewed-by: Donald Hunter --- Documentation/userspace-api/netlink/index.rst | 2 +- Documentation/userspace-api/netlink/specs.rst | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/userspace-api/netlink/index.rst b/Documentation/userspace-api/netlink/index.rst index c1b6765cc963..83ae25066591 100644 --- a/Documentation/userspace-api/netlink/index.rst +++ b/Documentation/userspace-api/netlink/index.rst @@ -18,4 +18,4 @@ Netlink documentation for users. See also: - :ref:`Documentation/core-api/netlink.rst ` - - :ref:`Documentation/networking/netlink_spec/index.rst ` + - :ref:`Documentation/netlink/specs/index.rst ` diff --git a/Documentation/userspace-api/netlink/specs.rst b/Documentation/userspace-api/netlink/specs.rst index 1b50d97d8d7c..debb4bfca5c4 100644 --- a/Documentation/userspace-api/netlink/specs.rst +++ b/Documentation/userspace-api/netlink/specs.rst @@ -15,7 +15,7 @@ kernel headers directly. Internally kernel uses the YAML specs to generate: - the C uAPI header - - documentation of the protocol as a ReST file - see :ref:`Documentation/networking/netlink_spec/index.rst ` + - documentation of the protocol as a ReST file - see :ref:`Documentation/netlink/specs/index.rst ` - policy tables for input attribute validation - operation tables -- cgit v1.2.3 From 6abc773747a80dfcbf8aa05fce7bb8d5d815fdb3 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 10 Jun 2025 10:44:45 +0200 Subject: docs: netlink: remove obsolete .gitignore from unused directory The previous code was generating source rst files under Documentation/networking/netlink_spec/. With the Sphinx YAML parser, this is now gone. So, stop ignoring *.rst files inside netlink specs directory. Signed-off-by: Mauro Carvalho Chehab Reviewed-by: Donald Hunter --- Documentation/networking/netlink_spec/.gitignore | 1 - 1 file changed, 1 deletion(-) delete mode 100644 Documentation/networking/netlink_spec/.gitignore (limited to 'Documentation') diff --git a/Documentation/networking/netlink_spec/.gitignore b/Documentation/networking/netlink_spec/.gitignore deleted file mode 100644 index 30d85567b592..000000000000 --- a/Documentation/networking/netlink_spec/.gitignore +++ /dev/null @@ -1 +0,0 @@ -*.rst -- cgit v1.2.3 From 0b24dfdd12f4ca3ef5efa0cfaad3fc14f5b3fbf1 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 17 Jun 2025 17:54:03 +0200 Subject: docs: parser_yaml.py: add support for line numbers from the parser Instead of printing line numbers from the temp converted ReST file, get them from the original source. Signed-off-by: Mauro Carvalho Chehab --- Documentation/sphinx/parser_yaml.py | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/parser_yaml.py b/Documentation/sphinx/parser_yaml.py index fa2e6da17617..8288e2ff7c7c 100755 --- a/Documentation/sphinx/parser_yaml.py +++ b/Documentation/sphinx/parser_yaml.py @@ -54,6 +54,8 @@ class YamlParser(Parser): netlink_parser = YnlDocGenerator() + re_lineno = re.compile(r"\.\. LINENO ([0-9]+)$") + def rst_parse(self, inputstring, document, msg): """ Receives a ReST content that was previously converted by the @@ -66,8 +68,14 @@ class YamlParser(Parser): try: # Parse message with RSTParser - for i, line in enumerate(msg.split('\n')): - result.append(line, document.current_source, i) + lineoffset = 0; + for line in msg.split('\n'): + match = self.re_lineno.match(line) + if match: + lineoffset = int(match.group(1)) + continue + + result.append(line, document.current_source, lineoffset) rst_parser = RSTParser() rst_parser.parse('\n'.join(result), document) -- cgit v1.2.3 From d90555ef0603935529837e490d5acc8436297c56 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 19 Jun 2025 14:55:33 +0200 Subject: docs: parser_yaml.py: fix backward compatibility with old docutils As reported by Akira, older docutils versions are not compatible with the way some Sphinx versions send tab_width. Add a code to address it. Reported-by: Akira Yokosawa Closes: https://lore.kernel.org/linux-doc/598b2cb7-2fd7-4388-96ba-2ddf0ab55d2a@gmail.com/ Tested-by: Akira Yokosawa Signed-off-by: Mauro Carvalho Chehab --- Documentation/sphinx/parser_yaml.py | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/sphinx/parser_yaml.py b/Documentation/sphinx/parser_yaml.py index 8288e2ff7c7c..1602b31f448e 100755 --- a/Documentation/sphinx/parser_yaml.py +++ b/Documentation/sphinx/parser_yaml.py @@ -77,6 +77,10 @@ class YamlParser(Parser): result.append(line, document.current_source, lineoffset) + # Fix backward compatibility with docutils < 0.17.1 + if "tab_width" not in vars(document.settings): + document.settings.tab_width = 8 + rst_parser = RSTParser() rst_parser.parse('\n'.join(result), document) -- cgit v1.2.3 From 47459937be8031aae6aaa17ac5f60985f7c9e1bd Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 10 Jul 2025 18:36:40 +0200 Subject: sphinx: parser_yaml.py: fix line numbers information As reported by Donald, this code: rst_parser = RSTParser() rst_parser.parse('\n'.join(result), document) breaks line parsing. As an alternative, I tested a variant of it: rst_parser.parse(result, document) but still line number was not preserved. As Donald noted, standard Parser classes don't have a direct mechanism to preserve line numbers from ViewList(). So, instead, let's use a mechanism similar to what we do already at kerneldoc.py: call the statemachine mechanism directly there. I double-checked when states and statemachine were introduced: both were back in 2002. I also tested doc build with docutils 0.16 and 0.21.2. It worked with both, so it seems to be stable enough for our needs. Reported-by: Donald Hunter Closes: https://lore.kernel.org/linux-doc/m24ivk78ng.fsf@gmail.com/T/#u Signed-off-by: Mauro Carvalho Chehab --- Documentation/sphinx/parser_yaml.py | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/parser_yaml.py b/Documentation/sphinx/parser_yaml.py index 1602b31f448e..634d84a202fc 100755 --- a/Documentation/sphinx/parser_yaml.py +++ b/Documentation/sphinx/parser_yaml.py @@ -11,7 +11,9 @@ import sys from pprint import pformat +from docutils import statemachine from docutils.parsers.rst import Parser as RSTParser +from docutils.parsers.rst import states from docutils.statemachine import ViewList from sphinx.util import logging @@ -56,6 +58,8 @@ class YamlParser(Parser): re_lineno = re.compile(r"\.\. LINENO ([0-9]+)$") + tab_width = 8 + def rst_parse(self, inputstring, document, msg): """ Receives a ReST content that was previously converted by the @@ -66,10 +70,18 @@ class YamlParser(Parser): result = ViewList() + self.statemachine = states.RSTStateMachine(state_classes=states.state_classes, + initial_state='Body', + debug=document.reporter.debug_flag) + try: # Parse message with RSTParser lineoffset = 0; - for line in msg.split('\n'): + + lines = statemachine.string2lines(msg, self.tab_width, + convert_whitespace=True) + + for line in lines: match = self.re_lineno.match(line) if match: lineoffset = int(match.group(1)) @@ -77,12 +89,7 @@ class YamlParser(Parser): result.append(line, document.current_source, lineoffset) - # Fix backward compatibility with docutils < 0.17.1 - if "tab_width" not in vars(document.settings): - document.settings.tab_width = 8 - - rst_parser = RSTParser() - rst_parser.parse('\n'.join(result), document) + self.statemachine.run(result, document) except Exception as e: document.reporter.error("YAML parsing error: %s" % pformat(e)) -- cgit v1.2.3 From 78a474b5a31a25e0a77e50df42be925f7cb575e6 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 11 Aug 2025 15:54:04 +0200 Subject: dt-bindings: phy: fsl,imx8mq-usb: Drop 'db' suffix duplicating dtschema A common property unit suffix '-db' was added to dtschema, thus in-kernel bindings should not reference the type. Signed-off-by: Krzysztof Kozlowski Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250811-dt-bindings-db-v1-2-457301523bb5@linaro.org Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml index 22dd91591a09..6a47e08e0e97 100644 --- a/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml @@ -76,7 +76,6 @@ properties: description: Adjust TX de-emphasis attenuation in dB at nominal 3.5dB point as per USB specification - $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0 maximum: 36 -- cgit v1.2.3 From 8c02c8353460f8630313aef6810f34e134a3c1ee Mon Sep 17 00:00:00 2001 From: Mahdi Khosravi Date: Mon, 11 Aug 2025 11:09:40 +0300 Subject: ASoC: dt-bindings: realtek,alc5623: convert to DT schema Convert alc5623 audio codec binding to DT schema. Also add "realtek,alc5621" to the compatible list for existing use in kirkwood-t5325.dts. Signed-off-by: Mahdi Khosravi Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250811080940.7909-1-mmk1776@gmail.com Signed-off-by: Mark Brown --- .../devicetree/bindings/sound/alc5623.txt | 25 ---------- .../devicetree/bindings/sound/realtek,alc5623.yaml | 54 ++++++++++++++++++++++ 2 files changed, 54 insertions(+), 25 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/alc5623.txt create mode 100644 Documentation/devicetree/bindings/sound/realtek,alc5623.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/alc5623.txt b/Documentation/devicetree/bindings/sound/alc5623.txt deleted file mode 100644 index 26c86c98d671..000000000000 --- a/Documentation/devicetree/bindings/sound/alc5623.txt +++ /dev/null @@ -1,25 +0,0 @@ -ALC5621/ALC5622/ALC5623 audio Codec - -Required properties: - - - compatible: "realtek,alc5623" - - reg: the I2C address of the device. - -Optional properties: - - - add-ctrl: Default register value for Reg-40h, Additional Control - Register. If absent or has the value of 0, the - register is untouched. - - - jack-det-ctrl: Default register value for Reg-5Ah, Jack Detect - Control Register. If absent or has value 0, the - register is untouched. - -Example: - - alc5621: alc5621@1a { - compatible = "alc5621"; - reg = <0x1a>; - add-ctrl = <0x3700>; - jack-det-ctrl = <0x4810>; - }; diff --git a/Documentation/devicetree/bindings/sound/realtek,alc5623.yaml b/Documentation/devicetree/bindings/sound/realtek,alc5623.yaml new file mode 100644 index 000000000000..683c58c3ef50 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/realtek,alc5623.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/realtek,alc5623.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ALC5621/ALC5623 Audio Codec + +maintainers: + - Mahdi Khosravi + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + enum: + - realtek,alc5621 + - realtek,alc5623 + + reg: + maxItems: 1 + + add-ctrl: + description: + Default register value for Reg-40h, Additional Control Register. + If absent or zero, the register is left untouched. + $ref: /schemas/types.yaml#/definitions/uint32 + + jack-det-ctrl: + description: + Default register value for Reg-5Ah, Jack Detect Control Register. + If absent or zero, the register is left untouched. + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + codec@1a { + compatible = "realtek,alc5623"; + reg = <0x1a>; + add-ctrl = <0x3700>; + jack-det-ctrl = <0x4810>; + }; + }; -- cgit v1.2.3 From ebfe5797ac3e6e9fb56340b6b228d2747fdec912 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Eric=20Gon=C3=A7alves?= Date: Sun, 15 Jun 2025 20:44:37 +0000 Subject: dt-bindings: arm: qcom: document r0q board binding MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Adds compatible for the Samsung Galaxy S22 (SM-S901E) (r0q), based on the Snapdragon 8 Gen 1 SoC. Signed-off-by: Eric Gonçalves Link: https://lore.kernel.org/r/20250615204438.1130213-1-ghatto404@gmail.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index b5acb0d26346..fa929698229e 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1002,6 +1002,7 @@ properties: - qcom,sm8450-qrd - sony,pdx223 - sony,pdx224 + - samsung,r0q - const: qcom,sm8450 - items: -- cgit v1.2.3 From 0e6bb6888791656c3973f26da3288323524573c0 Mon Sep 17 00:00:00 2001 From: Gopi Krishna Menon Date: Mon, 11 Aug 2025 05:23:44 +0530 Subject: docs: folio_queue: Fix minor typo in folio_queue page Specifically, fix typo 'hese'-> 'these' Signed-off-by: Gopi Krishna Menon Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250810235346.4153-1-krishnagopi487@gmail.com --- Documentation/core-api/folio_queue.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/core-api/folio_queue.rst b/Documentation/core-api/folio_queue.rst index 83cfbc157e49..b7628896d2b6 100644 --- a/Documentation/core-api/folio_queue.rst +++ b/Documentation/core-api/folio_queue.rst @@ -44,7 +44,7 @@ Each segment in the list also stores: * the size of each folio and * three 1-bit marks per folio, -but hese should not be accessed directly as the underlying data structure may +but these should not be accessed directly as the underlying data structure may change, but rather the access functions outlined below should be used. The facility can be made accessible by:: -- cgit v1.2.3 From 70d476b63a1494337f2b9fec1e9b1cab2e6116d3 Mon Sep 17 00:00:00 2001 From: Gopi Krishna Menon Date: Sun, 10 Aug 2025 16:42:48 +0530 Subject: Documentation/rv: Fix minor typo in monitor_synthesis page Specifically, fix spelling of "practice" Signed-off-by: Gopi Krishna Menon Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250810111249.93181-1-krishnagopi487@gmail.com --- Documentation/trace/rv/monitor_synthesis.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/trace/rv/monitor_synthesis.rst b/Documentation/trace/rv/monitor_synthesis.rst index ac808a7554f5..3a7d7b2f6cb6 100644 --- a/Documentation/trace/rv/monitor_synthesis.rst +++ b/Documentation/trace/rv/monitor_synthesis.rst @@ -181,7 +181,7 @@ which is the list of atomic propositions present in the LTL specification functions interacting with the Buchi automaton. While generating code, `rvgen` cannot understand the meaning of the atomic -propositions. Thus, that task is left for manual work. The recommended pratice +propositions. Thus, that task is left for manual work. The recommended practice is adding tracepoints to places where the atomic propositions change; and in the tracepoints' handlers: the Buchi automaton is executed using:: -- cgit v1.2.3 From a49eebfa8ba1a90cbe01371f852b8da805d3aa55 Mon Sep 17 00:00:00 2001 From: Akshaykumar Gunari Date: Thu, 7 Aug 2025 20:21:19 +0530 Subject: docs: arm: stm32: fix typo "busses" -> "buses" Fix the spelling of "busses" to the preferred form "buses" in STM32 ARM architecture documentation. Signed-off-by: Akshaykumar Gunari Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250807145119.2214-1-akshaygunari@gmail.com --- Documentation/arch/arm/stm32/stm32f746-overview.rst | 2 +- Documentation/arch/arm/stm32/stm32f769-overview.rst | 2 +- Documentation/arch/arm/stm32/stm32h743-overview.rst | 2 +- Documentation/arch/arm/stm32/stm32h750-overview.rst | 2 +- Documentation/arch/arm/stm32/stm32mp13-overview.rst | 2 +- Documentation/arch/arm/stm32/stm32mp151-overview.rst | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/arch/arm/stm32/stm32f746-overview.rst b/Documentation/arch/arm/stm32/stm32f746-overview.rst index 78befddc7740..335f0855a858 100644 --- a/Documentation/arch/arm/stm32/stm32f746-overview.rst +++ b/Documentation/arch/arm/stm32/stm32f746-overview.rst @@ -15,7 +15,7 @@ It features: - SD/MMC/SDIO support - Ethernet controller - USB OTFG FS & HS controllers -- I2C, SPI, CAN busses support +- I2C, SPI, CAN buses support - Several 16 & 32 bits general purpose timers - Serial Audio interface - LCD controller diff --git a/Documentation/arch/arm/stm32/stm32f769-overview.rst b/Documentation/arch/arm/stm32/stm32f769-overview.rst index e482980ddf21..ef31aadee68f 100644 --- a/Documentation/arch/arm/stm32/stm32f769-overview.rst +++ b/Documentation/arch/arm/stm32/stm32f769-overview.rst @@ -15,7 +15,7 @@ It features: - SD/MMC/SDIO support*2 - Ethernet controller - USB OTFG FS & HS controllers -- I2C*4, SPI*6, CAN*3 busses support +- I2C*4, SPI*6, CAN*3 buses support - Several 16 & 32 bits general purpose timers - Serial Audio interface*2 - LCD controller diff --git a/Documentation/arch/arm/stm32/stm32h743-overview.rst b/Documentation/arch/arm/stm32/stm32h743-overview.rst index 4e15f1a42730..7659df24d362 100644 --- a/Documentation/arch/arm/stm32/stm32h743-overview.rst +++ b/Documentation/arch/arm/stm32/stm32h743-overview.rst @@ -15,7 +15,7 @@ It features: - SD/MMC/SDIO support - Ethernet controller - USB OTFG FS & HS controllers -- I2C, SPI, CAN busses support +- I2C, SPI, CAN buses support - Several 16 & 32 bits general purpose timers - Serial Audio interface - LCD controller diff --git a/Documentation/arch/arm/stm32/stm32h750-overview.rst b/Documentation/arch/arm/stm32/stm32h750-overview.rst index 0e51235c9547..be032b77d1f1 100644 --- a/Documentation/arch/arm/stm32/stm32h750-overview.rst +++ b/Documentation/arch/arm/stm32/stm32h750-overview.rst @@ -15,7 +15,7 @@ It features: - SD/MMC/SDIO support - Ethernet controller - USB OTFG FS & HS controllers -- I2C, SPI, CAN busses support +- I2C, SPI, CAN buses support - Several 16 & 32 bits general purpose timers - Serial Audio interface - LCD controller diff --git a/Documentation/arch/arm/stm32/stm32mp13-overview.rst b/Documentation/arch/arm/stm32/stm32mp13-overview.rst index 3bb9492dad49..b5e9589fb06f 100644 --- a/Documentation/arch/arm/stm32/stm32mp13-overview.rst +++ b/Documentation/arch/arm/stm32/stm32mp13-overview.rst @@ -24,7 +24,7 @@ More details: - ADC/DAC - USB EHCI/OHCI controllers - USB OTG -- I2C, SPI, CAN busses support +- I2C, SPI, CAN buses support - Several general purpose timers - Serial Audio interface - LCD controller diff --git a/Documentation/arch/arm/stm32/stm32mp151-overview.rst b/Documentation/arch/arm/stm32/stm32mp151-overview.rst index f42a2ac309c0..b58c256ede9a 100644 --- a/Documentation/arch/arm/stm32/stm32mp151-overview.rst +++ b/Documentation/arch/arm/stm32/stm32mp151-overview.rst @@ -23,7 +23,7 @@ More details: - ADC/DAC - USB EHCI/OHCI controllers - USB OTG -- I2C, SPI busses support +- I2C, SPI buses support - Several general purpose timers - Serial Audio interface - LCD-TFT controller -- cgit v1.2.3 From f8262b8dadfa635cc8f203c40eb0b75b8625f44c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 11 Aug 2025 16:22:36 +0200 Subject: dt-bindings: nfc: ti,trf7970a: Drop 'db' suffix duplicating dtschema A common property unit suffix '-db' was added to dtschema, thus in-kernel bindings should not reference the type. Signed-off-by: Krzysztof Kozlowski Acked-by: Conor Dooley Link: https://patch.msgid.link/20250811142235.170407-2-krzysztof.kozlowski@linaro.org Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml b/Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml index 5f49bd9ac5e6..783a85b84893 100644 --- a/Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml +++ b/Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml @@ -56,7 +56,6 @@ properties: Regulator for supply voltage to VIN pin ti,rx-gain-reduction-db: - $ref: /schemas/types.yaml#/definitions/uint32 description: | Specify an RX gain reduction to reduce antenna sensitivity with 5dB per increment, with a maximum of 15dB. Supported values: [0, 5, 10, 15]. -- cgit v1.2.3 From bab4ab484a6ca170847da9bffe86f1fa90df4bbe Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 15:33:55 -0500 Subject: ASoC: dt-bindings: Convert brcm,bcm2835-i2s to DT schema Convert the Broadcom BCM2835 I2S/PCM binding to DT schema format. It's a straightforward conversion. Signed-off-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250812203356.735234-1-robh@kernel.org Signed-off-by: Mark Brown --- .../devicetree/bindings/sound/brcm,bcm2835-i2s.txt | 24 ---------- .../bindings/sound/brcm,bcm2835-i2s.yaml | 51 ++++++++++++++++++++++ 2 files changed, 51 insertions(+), 24 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt create mode 100644 Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt b/Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt deleted file mode 100644 index 7bb0362828ec..000000000000 --- a/Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt +++ /dev/null @@ -1,24 +0,0 @@ -* Broadcom BCM2835 SoC I2S/PCM module - -Required properties: -- compatible: "brcm,bcm2835-i2s" -- reg: Should contain PCM registers location and length. -- clocks: the (PCM) clock to use -- dmas: List of DMA controller phandle and DMA request line ordered pairs. -- dma-names: Identifier string for each DMA request line in the dmas property. - These strings correspond 1:1 with the ordered pairs in dmas. - - One of the DMA channels will be responsible for transmission (should be - named "tx") and one for reception (should be named "rx"). - -Example: - -bcm2835_i2s: i2s@7e203000 { - compatible = "brcm,bcm2835-i2s"; - reg = <0x7e203000 0x24>; - clocks = <&clocks BCM2835_CLOCK_PCM>; - - dmas = <&dma 2>, - <&dma 3>; - dma-names = "tx", "rx"; -}; diff --git a/Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.yaml b/Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.yaml new file mode 100644 index 000000000000..f3cfe92684d0 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/brcm,bcm2835-i2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM2835 SoC I2S/PCM module + +maintainers: + - Florian Fainelli + +properties: + compatible: + const: brcm,bcm2835-i2s + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + dmas: + items: + - description: Transmission DMA controller phandle and request line. + - description: Reception DMA controller phandle and request line. + + dma-names: + items: + - const: tx + - const: rx + +required: + - compatible + - reg + - clocks + - dmas + - dma-names + +additionalProperties: false + +examples: + - | + #include + + i2s@7e203000 { + compatible = "brcm,bcm2835-i2s"; + reg = <0x7e203000 0x24>; + clocks = <&clocks BCM2835_CLOCK_PCM>; + dmas = <&dma 2>, <&dma 3>; + dma-names = "tx", "rx"; + }; -- cgit v1.2.3 From c3dd67681c70cc95cc2c889b1b58a1667bb1c48b Mon Sep 17 00:00:00 2001 From: Alison Schofield Date: Mon, 4 Aug 2025 01:00:13 -0700 Subject: cxl/region: Add inject and clear poison by region offset Add CXL region debugfs attributes to inject and clear poison based on an offset into the region. These new interfaces allow users to operate on poison at the region level without needing to resolve Device Physical Addresses (DPA) or target individual memdevs. The implementation uses a new helper, region_offset_to_dpa_result() that applies decoder interleave logic, including XOR-based address decoding when applicable. Note that XOR decodes rely on driver internal xormaps which are not exposed to userspace. So, this support is not only a simplification of poison operations that could be done using existing per memdev operations, but also it enables this functionality for XOR interleaved regions for the first time. New debugfs attributes are added in /sys/kernel/debug/cxl/regionX/: inject_poison and clear_poison. These are only exposed if all memdevs participating in the region support both inject and clear commands, ensuring consistent and reliable behavior across multi-device regions. If tracing is enabled, these operations are logged as cxl_poison events in /sys/kernel/tracing/trace. The ABI documentation warns users of the significant risks that come with using these capabilities. A CXL Maturity Map update shows this user flow is now supported. Signed-off-by: Alison Schofield Reviewed-by: Jonathan Cameron Link: https://patch.msgid.link/f3fd8628ab57ea79704fb2d645902cd499c066af.1754290144.git.alison.schofield@intel.com Signed-off-by: Dave Jiang --- Documentation/ABI/testing/debugfs-cxl | 87 +++++++++++++++++++++++++++ Documentation/driver-api/cxl/maturity-map.rst | 2 +- 2 files changed, 88 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/debugfs-cxl b/Documentation/ABI/testing/debugfs-cxl index e95e21f131e9..2989d4da96c1 100644 --- a/Documentation/ABI/testing/debugfs-cxl +++ b/Documentation/ABI/testing/debugfs-cxl @@ -19,6 +19,20 @@ Description: is returned to the user. The inject_poison attribute is only visible for devices supporting the capability. + TEST-ONLY INTERFACE: This interface is intended for testing + and validation purposes only. It is not a data repair mechanism + and should never be used on production systems or live data. + + DATA LOSS RISK: For CXL persistent memory (PMEM) devices, + poison injection can result in permanent data loss. Injected + poison may render data permanently inaccessible even after + clearing, as the clear operation writes zeros and does not + recover original data. + + SYSTEM STABILITY RISK: For volatile memory, poison injection + can cause kernel crashes, system instability, or unpredictable + behavior if the poisoned addresses are accessed by running code + or critical kernel structures. What: /sys/kernel/debug/cxl/memX/clear_poison Date: April, 2023 @@ -35,6 +49,79 @@ Description: The clear_poison attribute is only visible for devices supporting the capability. + TEST-ONLY INTERFACE: This interface is intended for testing + and validation purposes only. It is not a data repair mechanism + and should never be used on production systems or live data. + + CLEAR IS NOT DATA RECOVERY: This operation writes zeros to the + specified address range and removes the address from the poison + list. It does NOT recover or restore original data that may have + been present before poison injection. Any original data at the + cleared address is permanently lost and replaced with zeros. + + CLEAR IS NOT A REPAIR MECHANISM: This interface is for testing + purposes only and should not be used as a data repair tool. + Clearing poison is fundamentally different from data recovery + or error correction. + +What: /sys/kernel/debug/cxl/regionX/inject_poison +Date: August, 2025 +Contact: linux-cxl@vger.kernel.org +Description: + (WO) When a Host Physical Address (HPA) is written to this + attribute, the region driver translates it to a Device + Physical Address (DPA) and identifies the corresponding + memdev. It then sends an inject poison command to that memdev + at the translated DPA. Refer to the memdev ABI entry at: + /sys/kernel/debug/cxl/memX/inject_poison for the detailed + behavior. This attribute is only visible if all memdevs + participating in the region support both inject and clear + poison commands. + + TEST-ONLY INTERFACE: This interface is intended for testing + and validation purposes only. It is not a data repair mechanism + and should never be used on production systems or live data. + + DATA LOSS RISK: For CXL persistent memory (PMEM) devices, + poison injection can result in permanent data loss. Injected + poison may render data permanently inaccessible even after + clearing, as the clear operation writes zeros and does not + recover original data. + + SYSTEM STABILITY RISK: For volatile memory, poison injection + can cause kernel crashes, system instability, or unpredictable + behavior if the poisoned addresses are accessed by running code + or critical kernel structures. + +What: /sys/kernel/debug/cxl/regionX/clear_poison +Date: August, 2025 +Contact: linux-cxl@vger.kernel.org +Description: + (WO) When a Host Physical Address (HPA) is written to this + attribute, the region driver translates it to a Device + Physical Address (DPA) and identifies the corresponding + memdev. It then sends a clear poison command to that memdev + at the translated DPA. Refer to the memdev ABI entry at: + /sys/kernel/debug/cxl/memX/clear_poison for the detailed + behavior. This attribute is only visible if all memdevs + participating in the region support both inject and clear + poison commands. + + TEST-ONLY INTERFACE: This interface is intended for testing + and validation purposes only. It is not a data repair mechanism + and should never be used on production systems or live data. + + CLEAR IS NOT DATA RECOVERY: This operation writes zeros to the + specified address range and removes the address from the poison + list. It does NOT recover or restore original data that may have + been present before poison injection. Any original data at the + cleared address is permanently lost and replaced with zeros. + + CLEAR IS NOT A REPAIR MECHANISM: This interface is for testing + purposes only and should not be used as a data repair tool. + Clearing poison is fundamentally different from data recovery + or error correction. + What: /sys/kernel/debug/cxl/einj_types Date: January, 2024 KernelVersion: v6.9 diff --git a/Documentation/driver-api/cxl/maturity-map.rst b/Documentation/driver-api/cxl/maturity-map.rst index 1330f3f52129..282c1102dd81 100644 --- a/Documentation/driver-api/cxl/maturity-map.rst +++ b/Documentation/driver-api/cxl/maturity-map.rst @@ -173,7 +173,7 @@ Accelerator User Flow Support ----------------- -* [0] Inject & clear poison by HPA +* [2] Inject & clear poison by region offset Details ======= -- cgit v1.2.3 From cebd717d8f010a9897105434dbc6bdbd85693596 Mon Sep 17 00:00:00 2001 From: Lorenzo Bianconi Date: Mon, 11 Aug 2025 17:31:36 +0200 Subject: dt-bindings: net: airoha: npu: Add memory regions used for wlan offload Document memory regions used by Airoha EN7581 NPU for wlan traffic offloading. The brand new added memory regions do not introduce any backward compatibility issues since they will be used just to offload traffic to/from the MT76 wireless NIC and the MT76 probing will not fail if these memory regions are not provide, it will just disable offloading via the NPU module. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Lorenzo Bianconi Link: https://patch.msgid.link/20250811-airoha-en7581-wlan-offlaod-v7-1-58823603bb4e@kernel.org Signed-off-by: Jakub Kicinski --- .../devicetree/bindings/net/airoha,en7581-npu.yaml | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml b/Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml index 76dd97c3fb40..c7644e6586d3 100644 --- a/Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml +++ b/Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml @@ -41,9 +41,21 @@ properties: - description: wlan irq line5 memory-region: - maxItems: 1 - description: - Memory used to store NPU firmware binary. + oneOf: + - items: + - description: NPU firmware binary region + - items: + - description: NPU firmware binary region + - description: NPU wlan offload RX buffers region + - description: NPU wlan offload TX buffers region + - description: NPU wlan offload TX packet identifiers region + + memory-region-names: + items: + - const: firmware + - const: pkt + - const: tx-pkt + - const: tx-bufid required: - compatible @@ -79,6 +91,8 @@ examples: , , ; - memory-region = <&npu_binary>; + memory-region = <&npu_firmware>, <&npu_pkt>, <&npu_txpkt>, + <&npu_txbufid>; + memory-region-names = "firmware", "pkt", "tx-pkt", "tx-bufid"; }; }; -- cgit v1.2.3 From 618882c92681de18e9bd99d2a88bb21c897283f3 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Sun, 10 Aug 2025 04:29:50 +0300 Subject: media: Wrap file->private_data access with a helper function Accessing file->private_data manually to retrieve the v4l2_fh pointer is error-prone, as the field is a void * and will happily convert implicitly to any pointer type. To avoid direct access to file->private_data, introduce a new inline function that retrieves the v4l2_fh pointer, and use it to replace common access patterns through the kernel. Changes to drivers have been generated with the following coccinelle semantic patch: @@ struct file *filp; identifier fh; @@ - struct v4l2_fh *fh = filp->private_data; + struct v4l2_fh *fh = file_to_v4l2_fh(filp); Manual changes have been applied to Documentation/ to update the usage patterns, and to include/media/v4l2-fh.h to add the new function. While at it, fix a typo in the title of v4l2-fh.rst: the file describes the "file handles" API, not "file handlers". No functional change is intended, this only paves the way to remove direct accesses to file->private_data and make V4L2 drivers safer. Other accesses to the field will be addressed separately. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- Documentation/driver-api/media/v4l2-fh.rst | 16 ++++++++++------ .../translations/zh_CN/video4linux/v4l2-framework.txt | 2 +- 2 files changed, 11 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/media/v4l2-fh.rst b/Documentation/driver-api/media/v4l2-fh.rst index 3eeaa8da0c9e..2c87b74578d9 100644 --- a/Documentation/driver-api/media/v4l2-fh.rst +++ b/Documentation/driver-api/media/v4l2-fh.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0 -V4L2 File handlers ------------------- +V4L2 File handles +----------------- struct v4l2_fh provides a way to easily keep file handle specific data that is used by the V4L2 framework. @@ -18,7 +18,9 @@ This bit is set whenever :c:func:`v4l2_fh_init` is called. struct v4l2_fh is allocated as a part of the driver's own file handle structure and ``file->private_data`` is set to it in the driver's ``open()`` -function by the driver. +function by the driver. The :c:type:`v4l2_fh` file handle can be retrieved +from the :c:type:`file` using :c:func:`file_to_v4l2_fh`. Drivers must not +access ``file->private_data`` directly. In many cases the struct v4l2_fh will be embedded in a larger structure. In that case you should call: @@ -63,7 +65,7 @@ Example: int my_release(struct file *file) { - struct v4l2_fh *fh = file->private_data; + struct v4l2_fh *fh = file_to_v4l2_fh(file); struct my_fh *my_fh = container_of(fh, struct my_fh, fh); ... @@ -78,11 +80,9 @@ Below is a short description of the :c:type:`v4l2_fh` functions used: :c:func:`v4l2_fh_init ` (:c:type:`fh `, :c:type:`vdev `) - - Initialise the file handle. This **MUST** be performed in the driver's :c:type:`v4l2_file_operations`->open() handler. - :c:func:`v4l2_fh_add ` (:c:type:`fh `) @@ -101,6 +101,10 @@ Below is a short description of the :c:type:`v4l2_fh` functions used: - Uninitialise the file handle. After uninitialisation the :c:type:`v4l2_fh` memory can be freed. +:c:func:`file_to_v4l2_fh ` +(struct file \*filp) + +- Retrieve the :c:type:`v4l2_fh` instance associated with a :c:type:`file`. If struct v4l2_fh is not embedded, then you can use these helper functions: diff --git a/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt b/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt index 9cc97ec75d7a..a9eb62fa1531 100644 --- a/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt +++ b/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt @@ -819,7 +819,7 @@ int my_open(struct file *file) int my_release(struct file *file) { - struct v4l2_fh *fh = file->private_data; + struct v4l2_fh *fh = file_to_v4l2_fh(file); struct my_fh *my_fh = container_of(fh, struct my_fh, fh); ... -- cgit v1.2.3 From 47f4b1acb4d505b1e7e81d8e0ebce774422b8c2e Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Sun, 10 Aug 2025 04:30:08 +0300 Subject: media: Set file->private_data in v4l2_fh_add() All the drivers that use v4l2_fh and call v4l2_fh_add() manually store a pointer to the v4l2_fh instance in file->private_data in their video device .open() file operation handler. Move the code to the v4l2_fh_add() function to avoid direct access to file->private_data in drivers. This requires adding a file pointer argument to the function. Changes to drivers have been generated with the following coccinelle semantic patch: @@ expression fh; identifier filp; identifier open; type ret; @@ ret open(..., struct file *filp, ...) { <... - filp->private_data = fh; ... - v4l2_fh_add(fh); + v4l2_fh_add(fh, filp); ...> } @@ expression fh; identifier filp; identifier open; type ret; @@ ret open(..., struct file *filp, ...) { <... - v4l2_fh_add(fh); + v4l2_fh_add(fh, filp); ... - filp->private_data = fh; ...> } Manual changes have been applied to Documentation/ to update the usage patterns, to drivers/media/v4l2-core/v4l2-fh.c to update the v4l2_fh_add() prototype set file->private_data, and to include/media/v4l2-fh.h to update the v4l2_fh_add() function prototype and its documentation. Additionally, white space issues have been fixed manually in drivers/media/platform/nvidia/tegra-vde/v4l2.c, drivers/media/platform/rockchip/rkvdec/rkvdec.c, drivers/media/v4l2-core/v4l2-fh.c and drivers/staging/most/video/video.c. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- Documentation/driver-api/media/v4l2-fh.rst | 46 +++++++++++----------- .../zh_CN/video4linux/v4l2-framework.txt | 5 +-- 2 files changed, 26 insertions(+), 25 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/media/v4l2-fh.rst b/Documentation/driver-api/media/v4l2-fh.rst index 2c87b74578d9..a7393067f5db 100644 --- a/Documentation/driver-api/media/v4l2-fh.rst +++ b/Documentation/driver-api/media/v4l2-fh.rst @@ -11,25 +11,22 @@ data that is used by the V4L2 framework. since it is also used to implement priority handling (:ref:`VIDIOC_G_PRIORITY`). -The users of :c:type:`v4l2_fh` (in the V4L2 framework, not the driver) know -whether a driver uses :c:type:`v4l2_fh` as its ``file->private_data`` pointer -by testing the ``V4L2_FL_USES_V4L2_FH`` bit in :c:type:`video_device`->flags. -This bit is set whenever :c:func:`v4l2_fh_init` is called. - -struct v4l2_fh is allocated as a part of the driver's own file handle -structure and ``file->private_data`` is set to it in the driver's ``open()`` -function by the driver. The :c:type:`v4l2_fh` file handle can be retrieved -from the :c:type:`file` using :c:func:`file_to_v4l2_fh`. Drivers must not -access ``file->private_data`` directly. - -In many cases the struct v4l2_fh will be embedded in a larger -structure. In that case you should call: - -#) :c:func:`v4l2_fh_init` and :c:func:`v4l2_fh_add` in ``open()`` -#) :c:func:`v4l2_fh_del` and :c:func:`v4l2_fh_exit` in ``release()`` - -Drivers can extract their own file handle structure by using the container_of -macro. +struct v4l2_fh is allocated in the driver's ``open()`` file operation handler. +It is typically embedded in a larger driver-specific structure. The +:c:type:`v4l2_fh` must be initialized with a call to :c:func:`v4l2_fh_init`, +and added to the video device with :c:func:`v4l2_fh_add`. This associates the +:c:type:`v4l2_fh` with the :c:type:`file` by setting ``file->private_data`` to +point to the :c:type:`v4l2_fh`. + +Similarly, the struct v4l2_fh is freed in the driver's ``release()`` file +operation handler. It must be removed from the video device with +:c:func:`v4l2_fh_del` and cleaned up with :c:func:`v4l2_fh_exit` before being +freed. + +Drivers must not access ``file->private_data`` directly. They can retrieve the +:c:type:`v4l2_fh` associated with a :c:type:`file` by calling +:c:func:`file_to_v4l2_fh`. Drivers can extract their own file handle structure +by using the container_of macro. Example: @@ -58,8 +55,7 @@ Example: ... - file->private_data = &my_fh->fh; - v4l2_fh_add(&my_fh->fh); + v4l2_fh_add(&my_fh->fh, file); return 0; } @@ -84,7 +80,7 @@ Below is a short description of the :c:type:`v4l2_fh` functions used: :c:type:`v4l2_file_operations`->open() handler. :c:func:`v4l2_fh_add ` -(:c:type:`fh `) +(:c:type:`fh `, struct file \*filp) - Add a :c:type:`v4l2_fh` to :c:type:`video_device` file handle list. Must be called once the file handle is completely initialized. @@ -138,6 +134,12 @@ associated device node: - Same, but it calls v4l2_fh_is_singular with filp->private_data. +.. note:: + The V4L2 framework knows whether a driver uses :c:type:`v4l2_fh` as its + ``file->private_data`` pointer by testing the ``V4L2_FL_USES_V4L2_FH`` + bit in :c:type:`video_device`->flags. This bit is set whenever + :c:func:`v4l2_fh_init` is called. + V4L2 fh functions and data structures ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt b/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt index a9eb62fa1531..2d38ae17d940 100644 --- a/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt +++ b/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt @@ -812,8 +812,7 @@ int my_open(struct file *file) ... - file->private_data = &my_fh->fh; - v4l2_fh_add(&my_fh->fh); + v4l2_fh_add(&my_fh->fh, file); return 0; } @@ -836,7 +835,7 @@ void v4l2_fh_init(struct v4l2_fh *fh, struct video_device *vdev) 初始化文件句柄。这*必须*在驱动的 v4l2_file_operations->open() 函数中执行。 -void v4l2_fh_add(struct v4l2_fh *fh) +void v4l2_fh_add(struct v4l2_fh *fh, struct file *filp) 添加一个 v4l2_fh 到 video_device 文件句柄列表。一旦文件句柄 初始化完成就必须调用。 -- cgit v1.2.3 From 277966749f46bc6292c4052b4e66a554f193a78a Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Sun, 10 Aug 2025 04:30:09 +0300 Subject: media: Reset file->private_data to NULL in v4l2_fh_del() Multiple drivers that use v4l2_fh and call v4l2_fh_del() manually reset the file->private_data pointer to NULL in their video device .release() file operation handler. Move the code to the v4l2_fh_del() function to avoid direct access to file->private_data in drivers. This requires adding a file pointer argument to the function. Changes to drivers have been generated with the following coccinelle semantic patch: @@ expression fh; identifier filp; identifier release; type ret; @@ ret release(..., struct file *filp, ...) { <... - filp->private_data = NULL; ... - v4l2_fh_del(fh); + v4l2_fh_del(fh, filp); ...> } @@ expression fh; identifier filp; identifier release; type ret; @@ ret release(..., struct file *filp, ...) { <... - v4l2_fh_del(fh); + v4l2_fh_del(fh, filp); ... - filp->private_data = NULL; ...> } @@ expression fh; identifier filp; identifier release; type ret; @@ ret release(..., struct file *filp, ...) { <... - v4l2_fh_del(fh); + v4l2_fh_del(fh, filp); ...> } Manual changes have been applied to Documentation/ to update the usage patterns, to drivers/media/v4l2-core/v4l2-fh.c to update the v4l2_fh_del() prototype and reset file->private_data, and to include/media/v4l2-fh.h to update the v4l2_fh_del() function prototype and its documentation. Additionally, white space issues have been fixed manually in drivers/usb/gadget/function/uvc_v4l2.c Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- Documentation/driver-api/media/v4l2-fh.rst | 4 ++-- Documentation/translations/zh_CN/video4linux/v4l2-framework.txt | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/media/v4l2-fh.rst b/Documentation/driver-api/media/v4l2-fh.rst index a7393067f5db..afcad22ead7c 100644 --- a/Documentation/driver-api/media/v4l2-fh.rst +++ b/Documentation/driver-api/media/v4l2-fh.rst @@ -65,7 +65,7 @@ Example: struct my_fh *my_fh = container_of(fh, struct my_fh, fh); ... - v4l2_fh_del(&my_fh->fh); + v4l2_fh_del(&my_fh->fh, file); v4l2_fh_exit(&my_fh->fh); kfree(my_fh); return 0; @@ -86,7 +86,7 @@ Below is a short description of the :c:type:`v4l2_fh` functions used: Must be called once the file handle is completely initialized. :c:func:`v4l2_fh_del ` -(:c:type:`fh `) +(:c:type:`fh `, struct file \*filp) - Unassociate the file handle from :c:type:`video_device`. The file handle exit function may now be called. diff --git a/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt b/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt index 2d38ae17d940..1653c6e2cb46 100644 --- a/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt +++ b/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt @@ -822,7 +822,7 @@ int my_release(struct file *file) struct my_fh *my_fh = container_of(fh, struct my_fh, fh); ... - v4l2_fh_del(&my_fh->fh); + v4l2_fh_del(&my_fh->fh, file); v4l2_fh_exit(&my_fh->fh); kfree(my_fh); return 0; @@ -840,7 +840,7 @@ void v4l2_fh_add(struct v4l2_fh *fh, struct file *filp) 添加一个 v4l2_fh 到 video_device 文件句柄列表。一旦文件句柄 初始化完成就必须调用。 -void v4l2_fh_del(struct v4l2_fh *fh) +void v4l2_fh_del(struct v4l2_fh *fh, struct file *filp) 从 video_device() 中解除文件句柄的关联。文件句柄的退出函数也 将被调用。 -- cgit v1.2.3 From bb4d6be205dae94aa2d3c3a1ad814dad90d4fd62 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Sun, 10 Aug 2025 04:30:14 +0300 Subject: media: Drop V4L2_FL_USES_V4L2_FH checks Now that all drivers use v4l2_fh, we can drop the V4L2_FL_USES_V4L2_FH checks through the V4L2 core. To ensure that all new drivers use v4l2_fh, keep setting the V4L2_FL_USES_V4L2_FH flag in v4l2_fh_init(), and verify it is set after the .open() file operation returns. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- Documentation/driver-api/media/v4l2-fh.rst | 15 ++------------- .../translations/zh_CN/video4linux/v4l2-framework.txt | 5 ----- 2 files changed, 2 insertions(+), 18 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/media/v4l2-fh.rst b/Documentation/driver-api/media/v4l2-fh.rst index afcad22ead7c..a934caa483a4 100644 --- a/Documentation/driver-api/media/v4l2-fh.rst +++ b/Documentation/driver-api/media/v4l2-fh.rst @@ -3,13 +3,8 @@ V4L2 File handles ----------------- -struct v4l2_fh provides a way to easily keep file handle specific -data that is used by the V4L2 framework. - -.. attention:: - New drivers must use struct v4l2_fh - since it is also used to implement priority handling - (:ref:`VIDIOC_G_PRIORITY`). +struct v4l2_fh provides a way to easily keep file handle specific data that is +used by the V4L2 framework. Its usage is mandatory in all drivers. struct v4l2_fh is allocated in the driver's ``open()`` file operation handler. It is typically embedded in a larger driver-specific structure. The @@ -134,12 +129,6 @@ associated device node: - Same, but it calls v4l2_fh_is_singular with filp->private_data. -.. note:: - The V4L2 framework knows whether a driver uses :c:type:`v4l2_fh` as its - ``file->private_data`` pointer by testing the ``V4L2_FL_USES_V4L2_FH`` - bit in :c:type:`video_device`->flags. This bit is set whenever - :c:func:`v4l2_fh_init` is called. - V4L2 fh functions and data structures ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt b/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt index 1653c6e2cb46..f0be21a60a0f 100644 --- a/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt +++ b/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt @@ -775,11 +775,6 @@ v4l2_fh 结构体提供一个保存用于 V4L2 框架的文件句柄特定数据 如果 video_device 标志，新驱动 必须使用 v4l2_fh 结构体，因为它也用于实现优先级处理（VIDIOC_G/S_PRIORITY）。 -v4l2_fh 的用户（位于 V4l2 框架中，并非驱动）可通过测试 -video_device->flags 中的 V4L2_FL_USES_V4L2_FH 位得知驱动是否使用 -v4l2_fh 作为他的 file->private_data 指针。这个位会在调用 v4l2_fh_init() -时被设置。 - v4l2_fh 结构体作为驱动自身文件句柄结构体的一部分被分配，且驱动在 其打开函数中将 file->private_data 指向它。 -- cgit v1.2.3 From 4ca28157bd52dfa6df665f8854d754cc03f45acf Mon Sep 17 00:00:00 2001 From: Yao Zi Date: Mon, 28 Jul 2025 10:29:43 +0000 Subject: dt-bindings: soc: rockchip: Add RK3528 pipe-phy GRF syscon Add compatible string for pipe-phy GRF found on RK3528 SoC, which controls misc settings for the integrated naneng-combphy. Signed-off-by: Yao Zi Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250728102947.38984-3-ziyao@disroot.org Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml index 1ab0b092e2a5..fe5361713167 100644 --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml @@ -16,6 +16,7 @@ properties: - enum: - rockchip,rk3288-sgrf - rockchip,rk3528-ioc-grf + - rockchip,rk3528-pipe-phy-grf - rockchip,rk3528-vo-grf - rockchip,rk3528-vpu-grf - rockchip,rk3562-ioc-grf -- cgit v1.2.3 From 43a9fade69799bd10e315e87cdc60a3f75b85414 Mon Sep 17 00:00:00 2001 From: Yao Zi Date: Mon, 28 Jul 2025 10:29:44 +0000 Subject: dt-bindings: phy: rockchip: naneng-combphy: Add power-domains property Though isn't described in existing devicetrees, most Rockchip combphys belong to a specific power-domain of the SoC. Taking RK3588 as example, combphy 0 and combphy 2 belong to the PD_BUS domain. Document the power-domains property to allow describing the information correctly in devicetree. Signed-off-by: Yao Zi Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250728102947.38984-4-ziyao@disroot.org Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml index 3e101c3c5ea9..db293d2fbf1a 100644 --- a/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml @@ -45,6 +45,9 @@ properties: phy-supply: description: Single PHY regulator + power-domains: + maxItems: 1 + rockchip,enable-ssc: type: boolean description: -- cgit v1.2.3 From b6c02cba32b9902b2b51dee740f1d3af8271820a Mon Sep 17 00:00:00 2001 From: Yao Zi Date: Mon, 28 Jul 2025 10:29:45 +0000 Subject: dt-bindings: phy: rockchip: naneng-combphy: Add RK3528 variant Rockchip RK3528 ships one naneng-combphy which operates in either PCIe or USB 3 mode. Document its compatible string. Signed-off-by: Yao Zi Acked-by: Conor Dooley Reviewed-by: Heiko Stuebner Link: https://lore.kernel.org/r/20250728102947.38984-5-ziyao@disroot.org Signed-off-by: Vinod Koul --- .../devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml index db293d2fbf1a..379b08bd9e97 100644 --- a/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml @@ -12,6 +12,7 @@ maintainers: properties: compatible: enum: + - rockchip,rk3528-naneng-combphy - rockchip,rk3562-naneng-combphy - rockchip,rk3568-naneng-combphy - rockchip,rk3576-naneng-combphy @@ -108,7 +109,9 @@ allOf: properties: compatible: contains: - const: rockchip,rk3588-naneng-combphy + enum: + - rockchip,rk3528-naneng-combphy + - rockchip,rk3588-naneng-combphy then: properties: resets: -- cgit v1.2.3 From 791cfbe1c56076c9d3bcf856b5175bfbc9c5a2d4 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Wed, 9 Jul 2025 16:55:14 +0200 Subject: dt-bindings: phy: qcom,snps-eusb2-repeater: Document qcom,tune-res-fsdif Document the FS Differential TX Output Resistance Tuning value found on the eUSB2 repeater on Qualcomm PMICs. The tuning values have special meanings, being different offsets of the resistance to the default value in Ohms but the exact meaning is not relevant here, as the correct tuning is determined by hardware engineers to make sure the electrical properties are as expected. Signed-off-by: Luca Weiss Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250709-sm7635-eusb-repeater-v2-1-b6eff075c097@fairphone.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml index 27f064a71c9f..6bfd11657e29 100644 --- a/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml @@ -52,6 +52,12 @@ properties: minimum: 0 maximum: 7 + qcom,tune-res-fsdif: + $ref: /schemas/types.yaml#/definitions/uint8 + description: FS Differential TX Output Resistance Tuning + minimum: 0 + maximum: 7 + required: - compatible - reg -- cgit v1.2.3 From 5edc4054655009691deb79142af1ffe5aba0a224 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Wed, 9 Jul 2025 16:55:16 +0200 Subject: dt-bindings: phy: qcom,snps-eusb2-repeater: Add compatible for PMIV0104 Add a dt-bindings compatible string for the Qualcomm's PMIV0104 PMIC. Acked-by: Krzysztof Kozlowski Signed-off-by: Luca Weiss Link: https://lore.kernel.org/r/20250709-sm7635-eusb-repeater-v2-3-b6eff075c097@fairphone.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml index 6bfd11657e29..5bf0d6c9c025 100644 --- a/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml @@ -22,6 +22,7 @@ properties: - const: qcom,pm8550b-eusb2-repeater - enum: - qcom,pm8550b-eusb2-repeater + - qcom,pmiv0104-eusb2-repeater - qcom,smb2360-eusb2-repeater reg: -- cgit v1.2.3 From 1fd143c24fb621f063f913cb1e48cc688c7eca15 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Tue, 21 May 2024 23:08:31 -0400 Subject: scsi: switch scsi_bios_ptable() and scsi_partsize() to gendisk Both helpers are reading the partition table of the disk specified by block_device of some partition on it; result depends only upon the disk in question, so we might as well pass the struct gendisk instead. Reviewed-by: Martin K. Petersen Reviewed-by: Christoph Hellwig Acked-by: Jens Axboe Signed-off-by: Al Viro --- Documentation/scsi/scsi_mid_low_api.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/scsi/scsi_mid_low_api.rst b/Documentation/scsi/scsi_mid_low_api.rst index 3ac4c7fafb55..96c8230d638e 100644 --- a/Documentation/scsi/scsi_mid_low_api.rst +++ b/Documentation/scsi/scsi_mid_low_api.rst @@ -380,7 +380,7 @@ Details:: /** * scsi_bios_ptable - return copy of block device's partition table - * @dev: pointer to block device + * @dev: pointer to gendisk * * Returns pointer to partition table, or NULL for failure * @@ -390,7 +390,7 @@ Details:: * * Defined in: drivers/scsi/scsicam.c **/ - unsigned char *scsi_bios_ptable(struct block_device *dev) + unsigned char *scsi_bios_ptable(struct gendisk *dev) /** -- cgit v1.2.3 From 3eb50369c09efb0f668a7f568a7e6f7cf4194cde Mon Sep 17 00:00:00 2001 From: Al Viro Date: Tue, 21 May 2024 23:22:01 -0400 Subject: scsi: switch ->bios_param() to passing gendisk Instances are passed struct block_device *bdev argument; the only thing it is used for (if it's used in the first place) is bdev->bd_disk. Might as well pass that in the first place... Reviewed-by: Martin K. Petersen Reviewed-by: Christoph Hellwig Acked-by: Jens Axboe Signed-off-by: Al Viro --- Documentation/scsi/scsi_mid_low_api.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/scsi/scsi_mid_low_api.rst b/Documentation/scsi/scsi_mid_low_api.rst index 96c8230d638e..634f5c28a849 100644 --- a/Documentation/scsi/scsi_mid_low_api.rst +++ b/Documentation/scsi/scsi_mid_low_api.rst @@ -623,7 +623,7 @@ Details:: * bios_param - fetch head, sector, cylinder info for a disk * @sdev: pointer to scsi device context (defined in * include/scsi/scsi_device.h) - * @bdev: pointer to block device context (defined in fs.h) + * @disk: pointer to gendisk (defined in blkdev.h) * @capacity: device size (in 512 byte sectors) * @params: three element array to place output: * params[0] number of heads (max 255) @@ -643,7 +643,7 @@ Details:: * * Optionally defined in: LLD **/ - int bios_param(struct scsi_device * sdev, struct block_device *bdev, + int bios_param(struct scsi_device * sdev, struct gendisk *disk, sector_t capacity, int params[3]) -- cgit v1.2.3 From 4fc8728aa34f54835b72e4db0f3db76a72948b65 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Tue, 21 May 2024 22:19:55 -0400 Subject: block: switch ->getgeo() to struct gendisk Instances are happier that way and it makes more sense anyway - the only part of the result that is related to partition we are given is the start sector, and that has been filled in by the caller. Everything else is a function of the disk. Only one instance (DASD) is ever looking at anything other than bdev->bd_disk and that one is trivial to adjust. Reviewed-by: Martin K. Petersen Reviewed-by: Christoph Hellwig Acked-by: Jens Axboe Signed-off-by: Al Viro --- Documentation/filesystems/locking.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/locking.rst b/Documentation/filesystems/locking.rst index aa287ccdac2f..77704fde9845 100644 --- a/Documentation/filesystems/locking.rst +++ b/Documentation/filesystems/locking.rst @@ -443,7 +443,7 @@ prototypes:: int (*direct_access) (struct block_device *, sector_t, void **, unsigned long *); void (*unlock_native_capacity) (struct gendisk *); - int (*getgeo)(struct block_device *, struct hd_geometry *); + int (*getgeo)(struct gendisk *, struct hd_geometry *); void (*swap_slot_free_notify) (struct block_device *, unsigned long); locking rules: -- cgit v1.2.3 From 1aba1eab0bd896928ae20dbf1f60a175a6e1ad0f Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Tue, 29 Jul 2025 13:52:12 -0700 Subject: dt-bindings: memory: Update brcmstb-memc-ddr binding with older chips The older MIPS-based chips incorporated a memory controller with the revision A.0.0, update the binding to list that compatible. Signed-off-by: Florian Fainelli Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250729205213.3392481-2-florian.fainelli@broadcom.com Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml b/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml index b935894bd4fc..3328c8df8190 100644 --- a/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml @@ -42,6 +42,10 @@ properties: items: - const: brcm,brcmstb-memc-ddr-rev-b.1.x - const: brcm,brcmstb-memc-ddr + - description: Revision 0.x controllers + items: + - const: brcm,brcmstb-memc-ddr-rev-a.0.0 + - const: brcm,brcmstb-memc-ddr reg: maxItems: 1 -- cgit v1.2.3 From d0de6895095356f1cc2d5f9825df220f10d34cee Mon Sep 17 00:00:00 2001 From: Jeff Chang Date: Wed, 13 Aug 2025 10:08:50 +0800 Subject: regulator: dt-bindings: Add Richtek RT5133 Support Add bindings for Richtek RT5133 IC Controlled PMIC Signed-off-by: Jeff Chang Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250813020910.2977555-1-jeff_chang@richtek.com Signed-off-by: Mark Brown --- .../bindings/regulator/richtek,rt5133.yaml | 178 +++++++++++++++++++++ 1 file changed, 178 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/richtek,rt5133.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt5133.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt5133.yaml new file mode 100644 index 000000000000..d2e007fee6ba --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/richtek,rt5133.yaml @@ -0,0 +1,178 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/richtek,rt5133.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Richtek RT5133 PMIC Regulator + +maintainers: + - ShihChia Chang + +description: + The RT5133 is an integrated Power Management IC for portable devices, + featuring 8 LDOs and 3 GPOs. It allows programmable output voltages, + soft-start times, and protections via I2C. GPO operation depends on LDO1 + voltage. + +properties: + compatible: + enum: + - richtek,rt5133 + + reg: + maxItems: 1 + + enable-gpios: + maxItems: 1 + + wakeup-source: true + + interrupts: + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + richtek,oc-shutdown-all: + type: boolean + description: + Controls the behavior when any LDO (Low Dropout Regulator) enters an + Over Current state. + If set to true, all LDO channels will be shut down. + If set to false, only the affected LDO channel will shut down itself. + + richtek,pgb-shutdown-all: + type: boolean + description: + Controls the behavior when any LDO enters a Power Good Bad state. + If set to true, all LDO channels will be shut down. + If set to false, only the affected LDO channel will shut down itself. + + regulators: + type: object + additionalProperties: false + + properties: + base: + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for the base regulator, which is the top-level supply for + LDO1 to LDO6. It functions merely as an on/off switch rather than + regulating voltages. If none of LDO1 to LDO6 are in use, switching + off the base will reduce the quiescent current. + + required: + - regulator-name + + patternProperties: + "^ldo([1-6])$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for single LDO regulator + + required: + - regulator-name + + "^ldo([7-8])$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for single LDO regulator + + properties: + vin-supply: true + + required: + - regulator-name + - vin-supply + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@18 { + compatible = "richtek,rt5133"; + reg = <0x18>; + wakeup-source; + interrupts-extended = <&gpio 0 IRQ_TYPE_EDGE_FALLING>; + enable-gpios = <&gpio 2 GPIO_ACTIVE_HIGH>; + gpio-controller; + #gpio-cells = <2>; + richtek,oc-shutdown-all; + richtek,pgb-shutdown-all; + regulators { + base { + regulator-name = "base"; + }; + pvin78: ldo1 { + regulator-name = "ldo1"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3199998>; + regulator-active-discharge = <1>; + }; + ldo2 { + regulator-name = "ldo2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3200000>; + regulator-active-discharge = <1>; + }; + ldo3 { + regulator-name = "ldo3"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3000000>; + regulator-active-discharge = <1>; + }; + ldo4 { + regulator-name = "ldo4"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3000000>; + regulator-active-discharge = <1>; + }; + ldo5 { + regulator-name = "ldo5"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3000000>; + regulator-active-discharge = <1>; + }; + ldo6 { + regulator-name = "ldo6"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3000000>; + regulator-active-discharge = <1>; + }; + ldo7 { + regulator-name = "ldo7"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1200000>; + regulator-active-discharge = <1>; + vin-supply = <&pvin78>; + }; + ldo8 { + regulator-name = "ldo8"; + regulator-min-microvolt = <855000>; + regulator-max-microvolt = <1200000>; + regulator-active-discharge = <1>; + vin-supply = <&pvin78>; + }; + }; + }; + }; -- cgit v1.2.3 From e2b1ebd72c81ca7bcceb0ed2cea2200978b6e975 Mon Sep 17 00:00:00 2001 From: Mehdi Djait Date: Thu, 26 Jun 2025 15:33:53 +0200 Subject: Documentation: media: camera-sensor: Mention v4l2_devm_sensor_clk_get() for obtaining the clock Add the new v4l2 helper devm_v4l2_sensor_clk_get() to Documentation. the helper works on both DT- and ACPI-based platforms to retrieve a reference to the clock producer from firmware. Reviewed-by: Lad Prabhakar Reviewed-by: Laurent Pinchart Signed-off-by: Mehdi Djait Co-developed-by: Laurent Pinchart Signed-off-by: Laurent Pinchart Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- Documentation/driver-api/media/camera-sensor.rst | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/media/camera-sensor.rst b/Documentation/driver-api/media/camera-sensor.rst index c290833165e6..94bd1dae82d5 100644 --- a/Documentation/driver-api/media/camera-sensor.rst +++ b/Documentation/driver-api/media/camera-sensor.rst @@ -29,21 +29,31 @@ used in the system. Using another frequency may cause harmful effects elsewhere. Therefore only the pre-determined frequencies are configurable by the user. +The external clock frequency shall be retrieved by obtaining the external clock +using the ``devm_v4l2_sensor_clk_get()`` helper function, and then getting its +frequency with ``clk_get_rate()``. Usage of the helper function guarantees +correct behaviour regardless of whether the sensor is integrated in a DT-based +or ACPI-based system. + ACPI ~~~~ -Read the ``clock-frequency`` _DSD property to denote the frequency. The driver -can rely on this frequency being used. +ACPI-based systems typically don't register the sensor external clock with the +kernel, but specify the external clock frequency in the ``clock-frequency`` +_DSD property. The ``devm_v4l2_sensor_clk_get()`` helper creates and returns a +fixed clock set at that rate. Devicetree ~~~~~~~~~~ -The preferred way to achieve this is using ``assigned-clocks``, -``assigned-clock-parents`` and ``assigned-clock-rates`` properties. See the -`clock device tree bindings +Devicetree-based systems declare the sensor external clock in the device tree +and reference it from the sensor node. The preferred way to select the external +clock frequency is to use the ``assigned-clocks``, ``assigned-clock-parents`` +and ``assigned-clock-rates`` properties in the sensor node to set the clock +rate. See the `clock device tree bindings `_ -for more information. The driver then gets the frequency using -``clk_get_rate()``. +for more information. The ``devm_v4l2_sensor_clk_get()`` helper retrieves and +returns that clock. This approach has the drawback that there's no guarantee that the frequency hasn't been modified directly or indirectly by another driver, or supported by -- cgit v1.2.3 From 20b3c9a403ee23e57a7e6bf5370ca438c3cd2e99 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 6 Aug 2025 16:28:23 -0500 Subject: dt-bindings: arm: Convert ti,keystone to DT schema Signed-off-by: Rob Herring (Arm) Reviewed-by: Andrew Davis Link: https://lore.kernel.org/r/20250806212824.1635084-1-robh@kernel.org Signed-off-by: Nishanth Menon --- .../devicetree/bindings/arm/keystone/keystone.txt | 42 ---------------------- .../devicetree/bindings/arm/ti/ti,keystone.yaml | 42 ++++++++++++++++++++++ 2 files changed, 42 insertions(+), 42 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/keystone/keystone.txt create mode 100644 Documentation/devicetree/bindings/arm/ti/ti,keystone.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/keystone/keystone.txt b/Documentation/devicetree/bindings/arm/keystone/keystone.txt deleted file mode 100644 index f310bad04483..000000000000 --- a/Documentation/devicetree/bindings/arm/keystone/keystone.txt +++ /dev/null @@ -1,42 +0,0 @@ -TI Keystone Platforms Device Tree Bindings ------------------------------------------------ - -Boards with Keystone2 based devices (TCI66xxK2H) SOC shall have the -following properties. - -Required properties: - - compatible: All TI specific devices present in Keystone SOC should be in - the form "ti,keystone-*". Generic devices like gic, arch_timers, ns16550 - type UART should use the specified compatible for those devices. - -SoC families: - -- Keystone 2 generic SoC: - compatible = "ti,keystone" - -SoCs: - -- Keystone 2 Hawking/Kepler - compatible = "ti,k2hk", "ti,keystone" -- Keystone 2 Lamarr - compatible = "ti,k2l", "ti,keystone" -- Keystone 2 Edison - compatible = "ti,k2e", "ti,keystone" -- K2G - compatible = "ti,k2g", "ti,keystone" - -Boards: -- Keystone 2 Hawking/Kepler EVM - compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone" - -- Keystone 2 Lamarr EVM - compatible = "ti,k2l-evm", "ti, k2l", "ti,keystone" - -- Keystone 2 Edison EVM - compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone" - -- K2G EVM - compatible = "ti,k2g-evm", "ti,k2g", "ti-keystone" - -- K2G Industrial Communication Engine EVM - compatible = "ti,k2g-ice", "ti,k2g", "ti-keystone" diff --git a/Documentation/devicetree/bindings/arm/ti/ti,keystone.yaml b/Documentation/devicetree/bindings/arm/ti/ti,keystone.yaml new file mode 100644 index 000000000000..20d4084f4506 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/ti/ti,keystone.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/ti/ti,keystone.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI Keystone Platforms + +maintainers: + - Nishanth Menon + - Santosh Shilimkar + +properties: + compatible: + oneOf: + - description: K2G + items: + - enum: + - ti,k2g-evm + - ti,k2g-ice + - const: ti,k2g + - const: ti,keystone + - description: Keystone 2 Edison + items: + - enum: + - ti,k2e-evm + - const: ti,k2e + - const: ti,keystone + - description: Keystone 2 Lamarr + items: + - enum: + - ti,k2l-evm + - const: ti,k2l + - const: ti,keystone + - description: Keystone 2 Hawking/Kepler + items: + - enum: + - ti,k2hk-evm + - const: ti,k2hk + - const: ti,keystone + +additionalProperties: true -- cgit v1.2.3 From e58ebd14a5f15eccf3dd45edf4bc900b346096bf Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Tue, 5 Aug 2025 12:47:29 +0100 Subject: dt-bindings: usb: renesas,usbhs: Add RZ/T2H and RZ/N2H support Document the USBHS controller for the Renesas RZ/T2H (r9a09g077) and RZ/N2H (r9a09g087) SoCs. While the USBHS block is similar to the one found on the RZ/G2L SoC, it differs slightly in terms of interrupt configuration, clock/reset requirements, and register bit definitions. Due to these differences, a new compatible string `renesas,usbhs-r9a09g077` is introduced for the RZ/T2H SoC. The USBHS controller on the RZ/N2H (r9a09g087) SoC is identical to that on the RZ/T2H, so it uses the `renesas,usbhs-r9a09g077` compatible string as a fallback. Signed-off-by: Lad Prabhakar Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250805114730.2491238-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/renesas,usbhs.yaml | 28 +++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml b/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml index a19816bbb1fd..0b8b90dd1951 100644 --- a/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml +++ b/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml @@ -59,6 +59,12 @@ properties: - renesas,usbhs-r8a77995 # R-Car D3 - const: renesas,rcar-gen3-usbhs + - const: renesas,usbhs-r9a09g077 # RZ/T2H + + - items: + - const: renesas,usbhs-r9a09g087 # RZ/N2H + - const: renesas,usbhs-r9a09g077 # RZ/T2H + reg: maxItems: 1 @@ -141,9 +147,25 @@ allOf: required: - resets else: - properties: - interrupts: - maxItems: 1 + if: + properties: + compatible: + contains: + const: renesas,usbhs-r9a09g077 + then: + properties: + resets: false + clocks: + maxItems: 1 + interrupts: + items: + - description: USB function interrupt USB_FI + - description: USB function DMA0 transmit completion interrupt USB_FDMA0 + - description: USB function DMA1 transmit completion interrupt USB_FDMA1 + else: + properties: + interrupts: + maxItems: 1 additionalProperties: false -- cgit v1.2.3 From 738812440b3c9083188191caa62ef950cf1ed9ed Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 7 Aug 2025 16:43:50 -0500 Subject: dt-bindings: usb: Drop duplicate nvidia,tegra20-ehci.txt The nvidia,tegra20-ehci binding is already documented in ci-hdrc-usb2.yaml, so drop the old text binding. Signed-off-by: "Rob Herring (Arm)" Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250807214351.4172243-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman --- .../bindings/usb/nvidia,tegra20-ehci.txt | 23 ---------------------- 1 file changed, 23 deletions(-) delete mode 100644 Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt deleted file mode 100644 index f60785f73d3d..000000000000 --- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt +++ /dev/null @@ -1,23 +0,0 @@ -Tegra SOC USB controllers - -The device node for a USB controller that is part of a Tegra -SOC is as described in the document "Open Firmware Recommended -Practice : Universal Serial Bus" with the following modifications -and additions : - -Required properties : - - compatible : For Tegra20, must contain "nvidia,tegra20-ehci". - For Tegra30, must contain "nvidia,tegra30-ehci". Otherwise, must contain - "nvidia,-ehci" plus at least one of the above, where is - tegra114, tegra124, tegra132, or tegra210. - - nvidia,phy : phandle of the PHY that the controller is connected to. - - clocks : Must contain one entry, for the module clock. - See ../clocks/clock-bindings.txt for details. - - resets : Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. - - reset-names : Must include the following entries: - - usb - -Optional properties: - - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20 - USB ports, which need reset twice due to hardware issues. -- cgit v1.2.3 From d903f5c60a0ea95aa03d5158d38bb057da6eae3e Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 4 Aug 2025 17:20:40 -0500 Subject: dt-bindings: clock: Convert silabs,si514/544 to DT schema Convert the Silicon Labs SI514 and SI544 bindings to DT schema format. Combine the bindings into a single schema as they are the same. Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250804222042.4083656-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski Signed-off-by: Stephen Boyd --- .../devicetree/bindings/clock/silabs,si514.txt | 24 ---------- .../devicetree/bindings/clock/silabs,si544.txt | 25 ---------- .../devicetree/bindings/clock/silabs,si544.yaml | 54 ++++++++++++++++++++++ 3 files changed, 54 insertions(+), 49 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/silabs,si514.txt delete mode 100644 Documentation/devicetree/bindings/clock/silabs,si544.txt create mode 100644 Documentation/devicetree/bindings/clock/silabs,si544.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/silabs,si514.txt b/Documentation/devicetree/bindings/clock/silabs,si514.txt deleted file mode 100644 index a4f28ec86f35..000000000000 --- a/Documentation/devicetree/bindings/clock/silabs,si514.txt +++ /dev/null @@ -1,24 +0,0 @@ -Binding for Silicon Labs 514 programmable I2C clock generator. - -Reference -This binding uses the common clock binding[1]. Details about the device can be -found in the datasheet[2]. - -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] Si514 datasheet - https://www.silabs.com/Support%20Documents/TechnicalDocs/si514.pdf - -Required properties: - - compatible: Shall be "silabs,si514" - - reg: I2C device address. - - #clock-cells: From common clock bindings: Shall be 0. - -Optional properties: - - clock-output-names: From common clock bindings. Recommended to be "si514". - -Example: - si514: clock-generator@55 { - reg = <0x55>; - #clock-cells = <0>; - compatible = "silabs,si514"; - }; diff --git a/Documentation/devicetree/bindings/clock/silabs,si544.txt b/Documentation/devicetree/bindings/clock/silabs,si544.txt deleted file mode 100644 index b86535b80920..000000000000 --- a/Documentation/devicetree/bindings/clock/silabs,si544.txt +++ /dev/null @@ -1,25 +0,0 @@ -Binding for Silicon Labs 544 programmable I2C clock generator. - -Reference -This binding uses the common clock binding[1]. Details about the device can be -found in the datasheet[2]. - -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] Si544 datasheet - https://www.silabs.com/documents/public/data-sheets/si544-datasheet.pdf - -Required properties: - - compatible: One of "silabs,si514a", "silabs,si514b" "silabs,si514c" according - to the speed grade of the chip. - - reg: I2C device address. - - #clock-cells: From common clock bindings: Shall be 0. - -Optional properties: - - clock-output-names: From common clock bindings. Recommended to be "si544". - -Example: - si544: clock-controller@55 { - reg = <0x55>; - #clock-cells = <0>; - compatible = "silabs,si544b"; - }; diff --git a/Documentation/devicetree/bindings/clock/silabs,si544.yaml b/Documentation/devicetree/bindings/clock/silabs,si544.yaml new file mode 100644 index 000000000000..f87e71867108 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/silabs,si544.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/silabs,si544.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Silicon Labs SI514/SI544 clock generator + +maintainers: + - Mike Looijmans + +description: > + Silicon Labs 514/544 programmable I2C clock generator. Details about the device + can be found in the datasheet: + + https://www.silabs.com/Support%20Documents/TechnicalDocs/si514.pdf + https://www.silabs.com/documents/public/data-sheets/si544-datasheet.pdf + +properties: + compatible: + enum: + - silabs,si514 + - silabs,si544a + - silabs,si544b + - silabs,si544c + + reg: + maxItems: 1 + + "#clock-cells": + const: 0 + + clock-output-names: + maxItems: 1 + +required: + - compatible + - reg + - "#clock-cells" + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + clock-controller@55 { + reg = <0x55>; + #clock-cells = <0>; + compatible = "silabs,si544b"; + }; + }; -- cgit v1.2.3 From b02011c8c61f1e61d6b4edf6a9e24620c965d376 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 4 Aug 2025 17:20:32 -0500 Subject: dt-bindings: clock: Convert silabs,si5341 to DT schema Convert the Silicon Labs SI5341 binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250804222034.4083410-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski Signed-off-by: Stephen Boyd --- .../devicetree/bindings/clock/silabs,si5341.txt | 175 ----------------- .../devicetree/bindings/clock/silabs,si5341.yaml | 217 +++++++++++++++++++++ 2 files changed, 217 insertions(+), 175 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/silabs,si5341.txt create mode 100644 Documentation/devicetree/bindings/clock/silabs,si5341.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/silabs,si5341.txt b/Documentation/devicetree/bindings/clock/silabs,si5341.txt deleted file mode 100644 index ce55aba0ce22..000000000000 --- a/Documentation/devicetree/bindings/clock/silabs,si5341.txt +++ /dev/null @@ -1,175 +0,0 @@ -Binding for Silicon Labs Si5340, Si5341 Si5342, Si5344 and Si5345 programmable -i2c clock generator. - -Reference -[1] Si5341 Data Sheet - https://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf -[2] Si5341 Reference Manual - https://www.silabs.com/documents/public/reference-manuals/Si5341-40-D-RM.pdf -[3] Si5345 Reference Manual - https://www.silabs.com/documents/public/reference-manuals/Si5345-44-42-D-RM.pdf - -The Si5341 and Si5340 are programmable i2c clock generators with up to 10 output -clocks. The chip contains a PLL that sources 5 (or 4) multisynth clocks, which -in turn can be directed to any of the 10 (or 4) outputs through a divider. -The internal structure of the clock generators can be found in [2]. -The Si5345 is similar to the Si5341 with the addition of fractional input -dividers and automatic input selection, as described in [3]. -The Si5342 and Si5344 are smaller versions of the Si5345, with 2 or 4 outputs. - -The driver can be used in "as is" mode, reading the current settings from the -chip at boot, in case you have a (pre-)programmed device. If the PLL is not -configured when the driver probes, it assumes the driver must fully initialize -it. - -The device type, speed grade and revision are determined runtime by probing. - -The driver currently does not support any fancy input configurations. They can -still be programmed into the chip and the driver will leave them "as is". - -==I2C device node== - -Required properties: -- compatible: shall be one of the following: - "silabs,si5340" - Si5340 A/B/C/D - "silabs,si5341" - Si5341 A/B/C/D - "silabs,si5342" - Si5342 A/B/C/D - "silabs,si5344" - Si5344 A/B/C/D - "silabs,si5345" - Si5345 A/B/C/D -- reg: i2c device address, usually 0x74 -- #clock-cells: from common clock binding; shall be set to 2. - The first value is "0" for outputs, "1" for synthesizers. - The second value is the output or synthesizer index. -- clocks: from common clock binding; list of parent clock handles, - corresponding to inputs. Use a fixed clock for the "xtal" input. - At least one must be present. -- clock-names: One of: "xtal", "in0", "in1", "in2" - -Optional properties: -- vdd-supply: Regulator node for VDD -- vdda-supply: Regulator node for VDDA -- vdds-supply: Regulator node for VDDS -- silabs,pll-m-num, silabs,pll-m-den: Numerator and denominator for PLL - feedback divider. Must be such that the PLL output is in the valid range. For - example, to create 14GHz from a 48MHz xtal, use m-num=14000 and m-den=48. Only - the fraction matters, using 3500 and 12 will deliver the exact same result. - If these are not specified, and the PLL is not yet programmed when the driver - probes, the PLL will be set to 14GHz. -- silabs,reprogram: When present, the driver will always assume the device must - be initialized, and always performs the soft-reset routine. Since this will - temporarily stop all output clocks, don't do this if the chip is generating - the CPU clock for example. -- silabs,xaxb-ext-clk: When present, indicates that the XA/XB pins are used - in EXTCLK (external reference clock) rather than XTAL (crystal) mode. -- interrupts: Interrupt for INTRb pin. -- silabs,iovdd-33: When present, indicates that the I2C lines are using 3.3V - rather than 1.8V thresholds. -- vddoX-supply (where X is an output index): Regulator node for VDDO for the - specified output. The driver selects the output VDD_SEL setting based on this - voltage. -- #address-cells: shall be set to 1. -- #size-cells: shall be set to 0. - - -== Child nodes: Outputs == - -The child nodes list the output clocks. - -Each of the clock outputs can be overwritten individually by using a child node. -If a child node for a clock output is not set, the configuration remains -unchanged. - -Required child node properties: -- reg: number of clock output. - -Optional child node properties: -- silabs,format: Output format, one of: - 1 = differential (defaults to LVDS levels) - 2 = low-power (defaults to HCSL levels) - 4 = LVCMOS -- silabs,common-mode: Manually override output common mode, see [2] for values -- silabs,amplitude: Manually override output amplitude, see [2] for values -- silabs,synth-master: boolean. If present, this output is allowed to change the - multisynth frequency dynamically. -- silabs,silabs,disable-high: boolean. If set, the clock output is driven HIGH - when disabled, otherwise it's driven LOW. - -==Example== - -/* 48MHz reference crystal */ -ref48: ref48M { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <48000000>; -}; - -i2c-master-node { - /* Programmable clock (for logic) */ - si5341: clock-generator@74 { - reg = <0x74>; - compatible = "silabs,si5341"; - #clock-cells = <2>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&ref48>; - clock-names = "xtal"; - - silabs,pll-m-num = <14000>; /* PLL at 14.0 GHz */ - silabs,pll-m-den = <48>; - silabs,reprogram; /* Chips are not programmed, always reset */ - - out@0 { - reg = <0>; - silabs,format = <1>; /* LVDS 3v3 */ - silabs,common-mode = <3>; - silabs,amplitude = <3>; - silabs,synth-master; - }; - - /* - * Output 6 configuration: - * LVDS 1v8 - */ - out@6 { - reg = <6>; - silabs,format = <1>; /* LVDS 1v8 */ - silabs,common-mode = <13>; - silabs,amplitude = <3>; - }; - - /* - * Output 8 configuration: - * HCSL 3v3 - */ - out@8 { - reg = <8>; - silabs,format = <2>; - silabs,common-mode = <11>; - silabs,amplitude = <3>; - }; - }; -}; - -some-video-node { - /* Standard clock bindings */ - clock-names = "pixel"; - clocks = <&si5341 0 7>; /* Output 7 */ - - /* Set output 7 to use syntesizer 3 as its parent */ - assigned-clocks = <&si5341 0 7>, <&si5341 1 3>; - assigned-clock-parents = <&si5341 1 3>; - /* Set output 7 to 148.5 MHz using a synth frequency of 594 MHz */ - assigned-clock-rates = <148500000>, <594000000>; -}; - -some-audio-node { - clock-names = "i2s-clk"; - clocks = <&si5341 0 0>; - /* - * since output 0 is a synth-master, the synth will be automatically set - * to an appropriate frequency when the audio driver requests another - * frequency. We give control over synth 2 to this output here. - */ - assigned-clocks = <&si5341 0 0>; - assigned-clock-parents = <&si5341 1 2>; -}; diff --git a/Documentation/devicetree/bindings/clock/silabs,si5341.yaml b/Documentation/devicetree/bindings/clock/silabs,si5341.yaml new file mode 100644 index 000000000000..b4f7efdf0b7b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/silabs,si5341.yaml @@ -0,0 +1,217 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/silabs,si5341.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Silicon Labs Si5340/1/2/4/5 programmable i2c clock generator + +maintainers: + - Mike Looijmans + +description: > + Silicon Labs Si5340, Si5341 Si5342, Si5344 and Si5345 programmable i2c clock + generator. + + Reference + [1] Si5341 Data Sheet + https://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf + [2] Si5341 Reference Manual + https://www.silabs.com/documents/public/reference-manuals/Si5341-40-D-RM.pdf + [3] Si5345 Reference Manual + https://www.silabs.com/documents/public/reference-manuals/Si5345-44-42-D-RM.pdf + + The Si5341 and Si5340 are programmable i2c clock generators with up to 10 output + clocks. The chip contains a PLL that sources 5 (or 4) multisynth clocks, which + in turn can be directed to any of the 10 (or 4) outputs through a divider. + The internal structure of the clock generators can be found in [2]. + The Si5345 is similar to the Si5341 with the addition of fractional input + dividers and automatic input selection, as described in [3]. + The Si5342 and Si5344 are smaller versions of the Si5345, with 2 or 4 outputs. + + The driver can be used in "as is" mode, reading the current settings from the + chip at boot, in case you have a (pre-)programmed device. If the PLL is not + configured when the driver probes, it assumes the driver must fully initialize + it. + + The device type, speed grade and revision are determined runtime by probing. + +properties: + compatible: + enum: + - silabs,si5340 + - silabs,si5341 + - silabs,si5342 + - silabs,si5344 + - silabs,si5345 + + reg: + maxItems: 1 + + "#clock-cells": + const: 2 + description: > + The first value is "0" for outputs, "1" for synthesizers. + + The second value is the output or synthesizer index. + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + clocks: + minItems: 1 + maxItems: 4 + + clock-names: + minItems: 1 + items: + - const: xtal + - const: in0 + - const: in1 + - const: in2 + + interrupts: + maxItems: 1 + description: Interrupt for INTRb pin + + vdd-supply: + description: Regulator node for VDD + + vdda-supply: + description: Regulator node for VDDA + + vdds-supply: + description: Regulator node for VDDS + + silabs,pll-m-num: + description: + Numerator for PLL feedback divider. Must be such that the PLL output is in + the valid range. For example, to create 14GHz from a 48MHz xtal, use + m-num=14000 and m-den=48. Only the fraction matters, using 3500 and 12 + will deliver the exact same result. If these are not specified, and the + PLL is not yet programmed when the driver probes, the PLL will be set to + 14GHz. + $ref: /schemas/types.yaml#/definitions/uint32 + + silabs,pll-m-den: + description: Denominator for PLL feedback divider + $ref: /schemas/types.yaml#/definitions/uint32 + + silabs,reprogram: + description: Always perform soft-reset and reinitialize PLL + type: boolean + + silabs,xaxb-ext-clk: + description: Use XA/XB pins as external reference clock + type: boolean + + silabs,iovdd-33: + description: I2C lines use 3.3V thresholds + type: boolean + +patternProperties: + "^vddo[0-9]-supply$": true + + "^out@[0-9]$": + description: > + Output-specific override nodes + + Each of the clock outputs can be overwritten individually by using a child + node. If a child node for a clock output is not set, the configuration + remains unchanged. + type: object + additionalProperties: false + + properties: + reg: + description: Number of clock output + maximum: 9 + + silabs,format: + description: Output format + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [1, 2, 4] + + silabs,common-mode: + description: Override output common mode + $ref: /schemas/types.yaml#/definitions/uint32 + + silabs,amplitude: + description: Override output amplitude + $ref: /schemas/types.yaml#/definitions/uint32 + + silabs,synth-master: + description: Allow dynamic multisynth rate control + type: boolean + + silabs,disable-high: + description: Drive output HIGH when disabled + type: boolean + + required: + - reg + +required: + - compatible + - reg + - "#clock-cells" + - "#address-cells" + - "#size-cells" + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + clock-generator@74 { + reg = <0x74>; + compatible = "silabs,si5341"; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&ref48>; + clock-names = "xtal"; + + silabs,pll-m-num = <14000>; /* PLL at 14.0 GHz */ + silabs,pll-m-den = <48>; + silabs,reprogram; /* Chips are not programmed, always reset */ + + out@0 { + reg = <0>; + silabs,format = <1>; /* LVDS 3v3 */ + silabs,common-mode = <3>; + silabs,amplitude = <3>; + silabs,synth-master; + }; + + /* + * Output 6 configuration: + * LVDS 1v8 + */ + out@6 { + reg = <6>; + silabs,format = <1>; /* LVDS 1v8 */ + silabs,common-mode = <13>; + silabs,amplitude = <3>; + }; + + /* + * Output 8 configuration: + * HCSL 3v3 + */ + out@8 { + reg = <8>; + silabs,format = <2>; + silabs,common-mode = <11>; + silabs,amplitude = <3>; + }; + }; + }; -- cgit v1.2.3 From 7513cc391400ef1b27c422b251c2444097ed1ce7 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 4 Aug 2025 17:20:08 -0500 Subject: dt-bindings: clock: Convert silabs,si570 to DT schema Convert the Silicon Labs SI570 binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250804222010.4082782-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski Signed-off-by: Stephen Boyd --- .../devicetree/bindings/clock/silabs,si570.txt | 41 ----------- .../devicetree/bindings/clock/silabs,si570.yaml | 80 ++++++++++++++++++++++ 2 files changed, 80 insertions(+), 41 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/silabs,si570.txt create mode 100644 Documentation/devicetree/bindings/clock/silabs,si570.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/silabs,si570.txt b/Documentation/devicetree/bindings/clock/silabs,si570.txt deleted file mode 100644 index 5dda17df1ac5..000000000000 --- a/Documentation/devicetree/bindings/clock/silabs,si570.txt +++ /dev/null @@ -1,41 +0,0 @@ -Binding for Silicon Labs 570, 571, 598 and 599 programmable -I2C clock generators. - -Reference -This binding uses the common clock binding[1]. Details about the devices can be -found in the data sheets[2][3]. - -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] Si570/571 Data Sheet - https://www.silabs.com/Support%20Documents/TechnicalDocs/si570.pdf -[3] Si598/599 Data Sheet - https://www.silabs.com/Support%20Documents/TechnicalDocs/si598-99.pdf - -Required properties: - - compatible: Shall be one of "silabs,si570", "silabs,si571", - "silabs,si598", "silabs,si599" - - reg: I2C device address. - - #clock-cells: From common clock bindings: Shall be 0. - - factory-fout: Factory set default frequency. This frequency is part specific. - The correct frequency for the part used has to be provided in - order to generate the correct output frequencies. For more - details, please refer to the data sheet. - - temperature-stability: Temperature stability of the device in PPM. Should be - one of: 7, 20, 50 or 100. - -Optional properties: - - clock-output-names: From common clock bindings. Recommended to be "si570". - - clock-frequency: Output frequency to generate. This defines the output - frequency set during boot. It can be reprogrammed during - runtime through the common clock framework. - - silabs,skip-recall: Do not perform NVM->RAM recall operation. It will rely - on hardware loading of RAM from NVM at power on. - -Example: - si570: clock-generator@5d { - #clock-cells = <0>; - compatible = "silabs,si570"; - temperature-stability = <50>; - reg = <0x5d>; - factory-fout = <156250000>; - }; diff --git a/Documentation/devicetree/bindings/clock/silabs,si570.yaml b/Documentation/devicetree/bindings/clock/silabs,si570.yaml new file mode 100644 index 000000000000..90e2f79e2b2a --- /dev/null +++ b/Documentation/devicetree/bindings/clock/silabs,si570.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/silabs,si570.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Silicon Labs Si570/Si571/Si598/Si599 programmable I2C clock generator + +maintainers: + - Soren Brinkmann + +description: > + Silicon Labs 570, 571, 598 and 599 programmable I2C clock generators. Details + about the devices can be found in the data sheets[1][2]. + + [1] Si570/571 Data Sheet + https://www.silabs.com/Support%20Documents/TechnicalDocs/si570.pdf + [2] Si598/599 Data Sheet + https://www.silabs.com/Support%20Documents/TechnicalDocs/si598-99.pdf + +properties: + compatible: + enum: + - silabs,si570 + - silabs,si571 + - silabs,si598 + - silabs,si599 + + reg: + maxItems: 1 + + '#clock-cells': + const: 0 + + factory-fout: + description: Factory-set default frequency in Hz. + $ref: /schemas/types.yaml#/definitions/uint32 + + temperature-stability: + description: Temperature stability of the device in PPM. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 7 + - 20 + - 50 + - 100 + + clock-output-names: + maxItems: 1 + + clock-frequency: + description: Output frequency to generate at boot; can be reprogrammed at runtime. + + silabs,skip-recall: + description: Skip the NVM-to-RAM recall operation during boot. + type: boolean + +required: + - compatible + - reg + - '#clock-cells' + - factory-fout + - temperature-stability + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + clock-generator@5d { + compatible = "silabs,si570"; + reg = <0x5d>; + #clock-cells = <0>; + temperature-stability = <50>; + factory-fout = <156250000>; + }; + }; -- cgit v1.2.3 From bedeb73fb9848df572bd6e06bcac3bb374cd0e5b Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 4 Aug 2025 12:53:03 -0500 Subject: dt-bindings: clock: Remove unused fujitsu,mb86s70-crg11 binding The fujitsu,mb86s70-crg11 binding is unused. The driver for it was removed in 2017. It's not used for Synquacer DT either like some other mb86s70 bindings are. Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250804175304.3423965-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski Signed-off-by: Stephen Boyd --- .../bindings/clock/fujitsu,mb86s70-crg11.txt | 26 ---------------------- 1 file changed, 26 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/fujitsu,mb86s70-crg11.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/fujitsu,mb86s70-crg11.txt b/Documentation/devicetree/bindings/clock/fujitsu,mb86s70-crg11.txt deleted file mode 100644 index 332396265689..000000000000 --- a/Documentation/devicetree/bindings/clock/fujitsu,mb86s70-crg11.txt +++ /dev/null @@ -1,26 +0,0 @@ -Fujitsu CRG11 clock driver bindings ------------------------------------ - -Required properties : -- compatible : Shall contain "fujitsu,mb86s70-crg11" -- #clock-cells : Shall be 3 {cntrlr domain port} - -The consumer specifies the desired clock pointing to its phandle. - -Example: - - clock: crg11 { - compatible = "fujitsu,mb86s70-crg11"; - #clock-cells = <3>; - }; - - mhu: mhu0@2b1f0000 { - #mbox-cells = <1>; - compatible = "arm,mhu"; - reg = <0 0x2B1F0000 0x1000>; - interrupts = <0 36 4>, /* LP Non-Sec */ - <0 35 4>, /* HP Non-Sec */ - <0 37 4>; /* Secure */ - clocks = <&clock 0 2 1>; /* Cntrlr:0 Domain:2 Port:1 */ - clock-names = "clk"; - }; -- cgit v1.2.3 From 6793ca9a43c8c9262802af3e6096df0fa2dcaa6c Mon Sep 17 00:00:00 2001 From: David Lechner Date: Mon, 11 Aug 2025 17:17:01 -0500 Subject: dt-bindings: clock: adi,axi-clkgen: add clock-output-names property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add an optional `clock-output-names` property to the ADI AXI Clock Generator binding. This is already being used in the Linux driver and real-world dtbs, so we should document it to allow for correct binding validation. Signed-off-by: David Lechner Link: https://lore.kernel.org/r/20250811-dt-bindings-clk-axi-clkgen-add-clock-output-names-property-v1-1-f02727736aa7@baylibre.com Reviewed-by: Nuno Sá Acked-by: Conor Dooley Signed-off-by: Stephen Boyd --- Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml b/Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml index 2b2041818a0a..6eea1a41150a 100644 --- a/Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml +++ b/Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml @@ -42,6 +42,9 @@ properties: - const: clkin2 - const: s_axi_aclk + clock-output-names: + maxItems: 1 + '#clock-cells': const: 0 @@ -65,4 +68,5 @@ examples: reg = <0xff000000 0x1000>; clocks = <&osc 1>, <&clkc 15>; clock-names = "clkin1", "s_axi_aclk"; + clock-output-names = "spi_sclk"; }; -- cgit v1.2.3 From 152a09361bb2b0679277406be43d797d05e2104b Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Thu, 31 Jul 2025 14:49:01 +0200 Subject: Documentation: PCI: endpoint: Document BAR assignment It is now possible to assign BARs while creating a vNTB endpoint function. Update the documentation accordingly. Suggested-by: Bjorn Helgaas Signed-off-by: Jerome Brunet Signed-off-by: Manivannan Sadhasivam Signed-off-by: Bjorn Helgaas Link: https://patch.msgid.link/20250731-vntb-doc-v1-1-95a0e0cd28d0@baylibre.com --- Documentation/PCI/endpoint/pci-vntb-howto.rst | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/PCI/endpoint/pci-vntb-howto.rst b/Documentation/PCI/endpoint/pci-vntb-howto.rst index 70d3bc90893f..9a7a2f0a6849 100644 --- a/Documentation/PCI/endpoint/pci-vntb-howto.rst +++ b/Documentation/PCI/endpoint/pci-vntb-howto.rst @@ -90,8 +90,9 @@ of the function device and is populated with the following NTB specific attributes that can be configured by the user:: # ls functions/pci_epf_vntb/func1/pci_epf_vntb.0/ - db_count mw1 mw2 mw3 mw4 num_mws - spad_count + ctrl_bar db_count mw1_bar mw2_bar mw3_bar mw4_bar spad_count + db_bar mw1 mw2 mw3 mw4 num_mws vbus_number + vntb_vid vntb_pid A sample configuration for NTB function is given below:: @@ -100,6 +101,10 @@ A sample configuration for NTB function is given below:: # echo 1 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/num_mws # echo 0x100000 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/mw1 +By default, each construct is assigned a BAR, as needed and in order. +Should a specific BAR setup be required by the platform, BAR may be assigned +to each construct using the related ``XYZ_bar`` entry. + A sample configuration for virtual NTB driver for virtual PCI bus:: # echo 0x1957 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/vntb_vid -- cgit v1.2.3 From f22cc6f766f84496b260347d4f0d92cf95f30699 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Mon, 11 Aug 2025 16:42:09 -0700 Subject: net: ethtool: support including Flow Label in the flow hash for RSS Some modern NICs support including the IPv6 Flow Label in the flow hash for RSS queue selection. This is outside the old "Microsoft spec", but was included in the OCP NIC spec: [ ] RSS include flow label in the hash (configurable) https://www.opencompute.org/w/index.php?title=Core_Offloads#Receive_Side_Scaling RSS Flow Label hashing allows TCP Protective Load Balancing (PLB) to recover from receiver congestion / overload. Rx CPU/queue hotspots are relatively common for data ingest workloads, and so far we had to try to detect the condition at the RPC layer and reopen the connection. PLB lets us change the Flow Label and therefore Rx CPU on RTO, with minimal packet reordering. PLB reaction times are much faster, and can happen at any point in the connection, not just at RPC boundaries. Due to the nature of host processing (relatively long queues, other kernel subsystems masking IRQs for 100s of msecs) the risk of reordering within the host is higher than in the network. But for applications which need it - it is far preferable to potentially persistent overload of subset of queues. It is expected that the hash communicated to the host may change if the Flow Label changes. This may be surprising to some host software, but I don't expect the devices can compute two Toeplitz hashes, one with the Flow Label for queue selection and one without for the rx hash communicated to the host. Besides, changing the hash may potentially help to change the path thru host queues. User can disable NETIF_F_RXHASH if they require a stable flow hash. The name RXH_IP6_FL was chosen based on what we call Flow Label variables in IPv6 processing (fl). I prefer fl_lbl but that appears to be an fbnic-only spelling. We could spell out RXH_IP6_FLOW_LABEL but existing RXH_ defines are a lot more terse. Willem notes [1] that Flow Label is defined as identifying the flow and therefore including both the flow label _and_ the L4 header fields is not generally necessary. But it should not hurt so it's not explicitly prevented if the driver supports hashing on both at the same time. Link: https://lore.kernel.org/68483433b45e2_3cd66f29440@willemb.c.googlers.com.notmuch [1] Signed-off-by: Jakub Kicinski Reviewed-by: Joe Damato Link: https://patch.msgid.link/20250811234212.580748-2-kuba@kernel.org Signed-off-by: Paolo Abeni --- Documentation/netlink/specs/ethtool.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netlink/specs/ethtool.yaml index 1bc1bd7d33c2..7a7594713f1f 100644 --- a/Documentation/netlink/specs/ethtool.yaml +++ b/Documentation/netlink/specs/ethtool.yaml @@ -204,6 +204,9 @@ definitions: doc: dst port in case of TCP/UDP/SCTP - name: gtp-teid + - + name: ip6-fl + doc: IPv6 Flow Label - name: discard value: 31 -- cgit v1.2.3 From a341bcfbfa74a00ddb741bbfe9a7c08c63382235 Mon Sep 17 00:00:00 2001 From: Kyle Hendry Date: Tue, 15 Jul 2025 16:46:03 -0700 Subject: dt-bindings: reset: add compatible for bcm63xx ephy control Add compatible string for bcm63xx ephy control. Signed-off-by: Kyle Hendry Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250715234605.36216-3-kylehendrydev@gmail.com Signed-off-by: Philipp Zabel --- Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml b/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml index 00150b93fca0..b8a320bb1776 100644 --- a/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml +++ b/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml @@ -13,7 +13,9 @@ maintainers: properties: compatible: - const: brcm,bcm6345-reset + enum: + - brcm,bcm6345-reset + - brcm,bcm63xx-ephy-ctrl reg: maxItems: 1 -- cgit v1.2.3 From f93dd842719b123cfad6385a32acf6386a3c7659 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 7 Aug 2025 16:45:07 -0500 Subject: dt-bindings: display: Drop duplicate ti,opa362 binding The "ti,opa362" binding is already supported in simple-bridge.yaml, so remove the old binding doc. Acked-by: Conor Dooley Reviewed-by: Tomi Valkeinen Link: https://lore.kernel.org/r/20250807214508.4174167-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/display/ti/ti,opa362.txt | 38 ---------------------- 1 file changed, 38 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/ti/ti,opa362.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/ti/ti,opa362.txt b/Documentation/devicetree/bindings/display/ti/ti,opa362.txt deleted file mode 100644 index f96083c0bd17..000000000000 --- a/Documentation/devicetree/bindings/display/ti/ti,opa362.txt +++ /dev/null @@ -1,38 +0,0 @@ -OPA362 analog video amplifier - -Required properties: -- compatible: "ti,opa362" -- enable-gpios: enable/disable output gpio - -Required node: -- Video port 0 for opa362 input -- Video port 1 for opa362 output - -Example: - -tv_amp: opa362 { - compatible = "ti,opa362"; - enable-gpios = <&gpio1 23 0>; /* GPIO to enable video out amplifier */ - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - opa_in: endpoint@0 { - remote-endpoint = <&venc_out>; - }; - }; - - port@1 { - reg = <1>; - opa_out: endpoint@0 { - remote-endpoint = <&tv_connector_in>; - }; - }; - }; -}; - - - -- cgit v1.2.3 From 6b8c52b41be4b3940f38b037cc953505aeb5768c Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 6 Aug 2025 16:27:40 -0500 Subject: dt-bindings: arm: Convert cavium,thunder-88xx to DT schema Convert Cavium Thunder-88xx boards to DT schema format. There's not any defined board compatibles in this case. Link: https://lore.kernel.org/r/20250806212741.1633917-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/arm/cavium,thunder-88xx.yaml | 19 +++++++++++++++++++ .../devicetree/bindings/arm/cavium-thunder.txt | 10 ---------- 2 files changed, 19 insertions(+), 10 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/cavium,thunder-88xx.yaml delete mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/cavium,thunder-88xx.yaml b/Documentation/devicetree/bindings/arm/cavium,thunder-88xx.yaml new file mode 100644 index 000000000000..d7c813118c1c --- /dev/null +++ b/Documentation/devicetree/bindings/arm/cavium,thunder-88xx.yaml @@ -0,0 +1,19 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/cavium,thunder-88xx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cavium Thunder 88xx SoC + +maintainers: + - Robert Richter + +properties: + $nodename: + const: '/' + compatible: + items: + - const: cavium,thunder-88xx + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder.txt b/Documentation/devicetree/bindings/arm/cavium-thunder.txt deleted file mode 100644 index 6f63a5866902..000000000000 --- a/Documentation/devicetree/bindings/arm/cavium-thunder.txt +++ /dev/null @@ -1,10 +0,0 @@ -Cavium Thunder platform device tree bindings --------------------------------------------- - -Boards with Cavium's Thunder SoC shall have following properties. - -Root Node ---------- -Required root node properties: - - - compatible = "cavium,thunder-88xx"; -- cgit v1.2.3 From f56fbb6a1b36da1d481d7ce8245f7bedad3aa863 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 6 Aug 2025 16:28:11 -0500 Subject: dt-bindings: arm: Drop obsolete cavium-thunder2.txt The binding is already converted to schema and is located in Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml. Link: https://lore.kernel.org/r/20250806212812.1634740-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 8 -------- 1 file changed, 8 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt deleted file mode 100644 index dc5dd65cbce7..000000000000 --- a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt +++ /dev/null @@ -1,8 +0,0 @@ -Cavium ThunderX2 CN99XX platform tree bindings ----------------------------------------------- - -Boards with Cavium ThunderX2 CN99XX SoC shall have the root property: - compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc"; - -These SoC uses the "cavium,thunder2" core which will be compatible -with "brcm,vulcan". -- cgit v1.2.3 From 5de28cf4ae21aebb6a5af09c96d1fad9eb03f2f8 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 13:14:27 -0500 Subject: dt-bindings: arm/cpus: Add missing Applied Micro CPU compatibles "apm,potenza" and "apm,strega" CPU compatibles have been in use for some time. Link: https://lore.kernel.org/r/20250812181428.69490-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 5bd517befb68..bb1ab514924d 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -80,6 +80,8 @@ properties: compatible: enum: + - apm,potenza + - apm,strega - apple,avalanche - apple,blizzard - apple,cyclone -- cgit v1.2.3 From 01ce6aa56caa9dc7b240828ed40df8180df7afb7 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 15:33:25 -0500 Subject: dt-bindings: interrupt-controller: Convert hisilicon,mbigen-v2 to DT schema Convert the HiSilicon MBIGEN binding to DT schema format. It's a straight-forward conversion. Link: https://lore.kernel.org/r/20250812203327.730393-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/hisilicon,mbigen-v2.txt | 84 ---------------------- .../interrupt-controller/hisilicon,mbigen-v2.yaml | 76 ++++++++++++++++++++ 2 files changed, 76 insertions(+), 84 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt b/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt deleted file mode 100644 index a6813a071f15..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt +++ /dev/null @@ -1,84 +0,0 @@ -Hisilicon mbigen device tree bindings. -======================================= - -Mbigen means: message based interrupt generator. - -MBI is kind of msi interrupt only used on Non-PCI devices. - -To reduce the wired interrupt number connected to GIC, -Hisilicon designed mbigen to collect and generate interrupt. - - -Non-pci devices can connect to mbigen and generate the -interrupt by writing ITS register. - -The mbigen chip and devices connect to mbigen have the following properties: - -Mbigen main node required properties: -------------------------------------------- -- compatible: Should be "hisilicon,mbigen-v2" - -- reg: Specifies the base physical address and size of the Mbigen - registers. - -Mbigen sub node required properties: ------------------------------------------- -- interrupt controller: Identifies the node as an interrupt controller - -- msi-parent: Specifies the MSI controller this mbigen use. - For more detail information,please refer to the generic msi-parent binding in - Documentation/devicetree/bindings/interrupt-controller/msi.txt. - -- num-pins: the total number of pins implemented in this Mbigen - instance. - -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value must be 2. - - The 1st cell is hardware pin number of the interrupt.This number is local to - each mbigen chip and in the range from 0 to the maximum interrupts number - of the mbigen. - - The 2nd cell is the interrupt trigger type. - The value of this cell should be: - 1: rising edge triggered - or - 4: high level triggered - -Examples: - - mbigen_chip_dsa { - compatible = "hisilicon,mbigen-v2"; - reg = <0x0 0xc0080000 0x0 0x10000>; - - mbigen_gmac:intc_gmac { - interrupt-controller; - msi-parent = <&its_dsa 0x40b1c>; - num-pins = <9>; - #interrupt-cells = <2>; - }; - - mbigen_i2c:intc_i2c { - interrupt-controller; - msi-parent = <&its_dsa 0x40b0e>; - num-pins = <2>; - #interrupt-cells = <2>; - }; - }; - -Devices connect to mbigen required properties: ----------------------------------------------------- --interrupts:Specifies the interrupt source. - For the specific information of each cell in this property,please refer to - the "interrupt-cells" description mentioned above. - -Examples: - gmac0: ethernet@c2080000 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0 0xc2080000 0 0x20000>, - <0 0xc0000000 0 0x1000>; - interrupt-parent = <&mbigen_device_gmac>; - interrupts = <656 1>, - <657 1>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.yaml b/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.yaml new file mode 100644 index 000000000000..326424e6e02a --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/hisilicon,mbigen-v2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon mbigen v2 + +maintainers: + - Wei Xu + +description: > + Mbigen means: message based interrupt generator. + + MBI is kind of msi interrupt only used on Non-PCI devices. + + To reduce the wired interrupt number connected to GIC, Hisilicon designed + mbigen to collect and generate interrupt. + + Non-pci devices can connect to mbigen and generate the interrupt by writing + ITS register. + +properties: + compatible: + const: hisilicon,mbigen-v2 + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: + type: object + additionalProperties: false + + properties: + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + msi-parent: + maxItems: 1 + + num-pins: + description: The total number of pins implemented in this Mbigen instance. + $ref: /schemas/types.yaml#/definitions/uint32 + + required: + - interrupt-controller + - "#interrupt-cells" + - msi-parent + - num-pins + +examples: + - | + mbigen@c0080000 { + compatible = "hisilicon,mbigen-v2"; + reg = <0xc0080000 0x10000>; + + mbigen_gmac: intc_gmac { + interrupt-controller; + #interrupt-cells = <2>; + msi-parent = <&its_dsa 0x40b1c>; + num-pins = <9>; + }; + + mbigen_i2c: intc_i2c { + interrupt-controller; + #interrupt-cells = <2>; + msi-parent = <&its_dsa 0x40b0e>; + num-pins = <2>; + }; + }; -- cgit v1.2.3 From 7fdc1d1b02e471c2ad4292705265706e003430a0 Mon Sep 17 00:00:00 2001 From: Raviteja Laggyshetty Date: Thu, 14 Aug 2025 14:54:19 +0000 Subject: dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Glymur SoC Document the RPMh Network-On-Chip Interconnect in Glymur platform. Co-developed-by: Odelu Kukatla Signed-off-by: Odelu Kukatla Reviewed-by: "Rob Herring (Arm)" Signed-off-by: Raviteja Laggyshetty Link: https://lore.kernel.org/r/20250814-glymur-icc-v2-1-596cca6b6015@oss.qualcomm.com Signed-off-by: Georgi Djakov --- .../bindings/interconnect/qcom,glymur-rpmh.yaml | 172 +++++++++++++++++++++ 1 file changed, 172 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,glymur-rpmh.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interconnect/qcom,glymur-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,glymur-rpmh.yaml new file mode 100644 index 000000000000..d55a7bcf5591 --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom,glymur-rpmh.yaml @@ -0,0 +1,172 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,glymur-rpmh.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm RPMh Network-On-Chip Interconnect on GLYMUR + +maintainers: + - Raviteja Laggyshetty + +description: | + RPMh interconnect providers support system bandwidth requirements through + RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is + able to communicate with the BCM through the Resource State Coordinator (RSC) + associated with each execution environment. Provider nodes must point to at + least one RPMh device child node pertaining to their RSC and each provider + can map to multiple RPMh resources. + + See also: include/dt-bindings/interconnect/qcom,glymur-rpmh.h + +properties: + compatible: + enum: + - qcom,glymur-aggre1-noc + - qcom,glymur-aggre2-noc + - qcom,glymur-aggre3-noc + - qcom,glymur-aggre4-noc + - qcom,glymur-clk-virt + - qcom,glymur-cnoc-cfg + - qcom,glymur-cnoc-main + - qcom,glymur-hscnoc + - qcom,glymur-lpass-ag-noc + - qcom,glymur-lpass-lpiaon-noc + - qcom,glymur-lpass-lpicx-noc + - qcom,glymur-mc-virt + - qcom,glymur-mmss-noc + - qcom,glymur-nsinoc + - qcom,glymur-nsp-noc + - qcom,glymur-oobm-ss-noc + - qcom,glymur-pcie-east-anoc + - qcom,glymur-pcie-east-slv-noc + - qcom,glymur-pcie-west-anoc + - qcom,glymur-pcie-west-slv-noc + - qcom,glymur-system-noc + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 4 + +required: + - compatible + +allOf: + - $ref: qcom,rpmh-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - qcom,glymur-clk-virt + - qcom,glymur-mc-virt + then: + properties: + reg: false + else: + required: + - reg + + - if: + properties: + compatible: + contains: + enum: + - qcom,glymur-pcie-west-anoc + then: + properties: + clocks: + items: + - description: aggre PCIE_3A WEST AXI clock + - description: aggre PCIE_3B WEST AXI clock + - description: aggre PCIE_4 WEST AXI clock + - description: aggre PCIE_6 WEST AXI clock + + - if: + properties: + compatible: + contains: + enum: + - qcom,glymur-pcie-east-anoc + then: + properties: + clocks: + items: + - description: aggre PCIE_5 EAST AXI clock + + - if: + properties: + compatible: + contains: + enum: + - qcom,glymur-aggre2-noc + then: + properties: + clocks: + items: + - description: aggre USB3 TERT AXI clock + - description: aggre USB4_2 AXI clock + - description: aggre UFS PHY AXI clock + + - if: + properties: + compatible: + contains: + enum: + - qcom,glymur-aggre4-noc + then: + properties: + clocks: + items: + - description: aggre USB3 PRIM AXI clock + - description: aggre USB3 SEC AXI clock + - description: aggre USB4_0 AXI clock + - description: aggre USB4_1 AXI clock + + - if: + properties: + compatible: + contains: + enum: + - qcom,glymur-pcie-west-anoc + - qcom,glymur-pcie-east-anoc + - qcom,glymur-aggre2-noc + - qcom,glymur-aggre4-noc + then: + required: + - clocks + else: + properties: + clocks: false + +unevaluatedProperties: false + +examples: + - | + #include + clk_virt: interconnect-0 { + compatible = "qcom,glymur-clk-virt"; + #interconnect-cells = <2>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + + aggre1_noc: interconnect@16e0000 { + compatible = "qcom,glymur-aggre1-noc"; + reg = <0x016e0000 0x14400>; + #interconnect-cells = <2>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + + aggre4_noc: interconnect@1740000 { + compatible = "qcom,glymur-aggre4-noc"; + reg = <0x01740000 0x14400>; + #interconnect-cells = <2>; + qcom,bcm-voters = <&apps_bcm_voter>; + clocks = <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, + <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, + <&gcc GCC_AGGRE_USB4_0_AXI_CLK>, + <&gcc GCC_AGGRE_USB4_1_AXI_CLK>; + }; -- cgit v1.2.3 From f10512e2c44e6ee3242314d43102acab7340e2d3 Mon Sep 17 00:00:00 2001 From: Hendrik Hamerlinck Date: Wed, 13 Aug 2025 11:22:39 +0200 Subject: dt-bindings: riscv: spacemit: Add OrangePi RV2 board Document the compatible string for the OrangePi RV2 board [1]. The board is described as using the Ky X1 SoC, which, based on available downstream sources and testing, appears to be identical or very closely related to the SpacemiT K1 SoC [2]. Link: http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/details/Orange-Pi-RV2.html [1] Link: https://www.spacemit.com/en/key-stone-k1 [2] Signed-off-by: Hendrik Hamerlinck Reviewed-by: Yixun Lan Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250813092240.180333-2-hendrik.hamerlinck@hammernet.be Signed-off-by: Yixun Lan --- Documentation/devicetree/bindings/riscv/spacemit.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/riscv/spacemit.yaml b/Documentation/devicetree/bindings/riscv/spacemit.yaml index 077b94f10dca..c56b62a6299a 100644 --- a/Documentation/devicetree/bindings/riscv/spacemit.yaml +++ b/Documentation/devicetree/bindings/riscv/spacemit.yaml @@ -22,6 +22,7 @@ properties: - enum: - bananapi,bpi-f3 - milkv,jupiter + - xunlong,orangepi-rv2 - const: spacemit,k1 additionalProperties: true -- cgit v1.2.3 From 7f224967aee7d5ad88b6db76ca161be622ae7b34 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 31 Jul 2025 09:15:52 +0200 Subject: scsi: ufs: qcom: dt-bindings: Split common part to qcom,ufs-common.yaml The binding for Qualcomm SoC UFS controllers grew and it will grow further. It already includes several conditionals, partially for difference in handling encryption block (ICE, either as phandle or as I/O address space) but it will further grow for MCQ. Prepare for splitting this one big binding into several ones for common group of devices by defining common part for all Qualcomm UFS schemas. This only moves code, no functional impact expected. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250731-dt-bindings-ufs-qcom-v2-1-53bb634bf95a@linaro.org Reviewed-by: Rob Herring (Arm) Signed-off-by: Martin K. Petersen --- .../devicetree/bindings/ufs/qcom,ufs-common.yaml | 67 ++++++++++++++++++++++ .../devicetree/bindings/ufs/qcom,ufs.yaml | 53 +---------------- 2 files changed, 68 insertions(+), 52 deletions(-) create mode 100644 Documentation/devicetree/bindings/ufs/qcom,ufs-common.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs-common.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs-common.yaml new file mode 100644 index 000000000000..962dffcd28b4 --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs-common.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/qcom,ufs-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Universal Flash Storage (UFS) Controller Common Properties + +maintainers: + - Bjorn Andersson + +properties: + clocks: + minItems: 7 + maxItems: 9 + + clock-names: + minItems: 7 + maxItems: 9 + + dma-coherent: true + + interconnects: + minItems: 2 + maxItems: 2 + + interconnect-names: + items: + - const: ufs-ddr + - const: cpu-ufs + + iommus: + minItems: 1 + maxItems: 2 + + phys: + maxItems: 1 + + phy-names: + items: + - const: ufsphy + + power-domains: + maxItems: 1 + + required-opps: + maxItems: 1 + + resets: + maxItems: 1 + + '#reset-cells': + const: 1 + + reset-names: + items: + - const: rst + + reset-gpios: + maxItems: 1 + description: + GPIO connected to the RESET pin of the UFS memory device. + +allOf: + - $ref: ufs-common.yaml + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml index 6c6043d9809e..fc0f7b8d1cd1 100644 --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml @@ -47,39 +47,6 @@ properties: - const: qcom,ufshc - const: jedec,ufs-2.0 - clocks: - minItems: 7 - maxItems: 9 - - clock-names: - minItems: 7 - maxItems: 9 - - dma-coherent: true - - interconnects: - minItems: 2 - maxItems: 2 - - interconnect-names: - items: - - const: ufs-ddr - - const: cpu-ufs - - iommus: - minItems: 1 - maxItems: 2 - - phys: - maxItems: 1 - - phy-names: - items: - - const: ufsphy - - power-domains: - maxItems: 1 - qcom,ice: $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the Inline Crypto Engine node @@ -93,30 +60,12 @@ properties: - const: std - const: ice - required-opps: - maxItems: 1 - - resets: - maxItems: 1 - - '#reset-cells': - const: 1 - - reset-names: - items: - - const: rst - - reset-gpios: - maxItems: 1 - description: - GPIO connected to the RESET pin of the UFS memory device. - required: - compatible - reg allOf: - - $ref: ufs-common.yaml + - $ref: qcom,ufs-common.yaml - if: properties: -- cgit v1.2.3 From 655c8f511926250e0da9e8b1a9b8f1cf2c173b41 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 31 Jul 2025 09:15:53 +0200 Subject: scsi: ufs: qcom: dt-bindings: Split SC7180 and similar The binding for Qualcomm SoC UFS controllers grew and it will grow further. Split SC7180 and several other devices which: 1. Do not reference ICE as I/O address space, but as a phandle, 2. Have same order of clocks (SC7180 has one clock less than SC7280 and other variants in split binding). The split allows easier review and maintenance of the binding. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250731-dt-bindings-ufs-qcom-v2-2-53bb634bf95a@linaro.org Reviewed-by: Rob Herring (Arm) Signed-off-by: Martin K. Petersen --- .../devicetree/bindings/ufs/qcom,sc7180-ufshc.yaml | 167 +++++++++++++++++++++ .../devicetree/bindings/ufs/qcom,ufs.yaml | 104 +++++-------- 2 files changed, 202 insertions(+), 69 deletions(-) create mode 100644 Documentation/devicetree/bindings/ufs/qcom,sc7180-ufshc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ufs/qcom,sc7180-ufshc.yaml b/Documentation/devicetree/bindings/ufs/qcom,sc7180-ufshc.yaml new file mode 100644 index 000000000000..d94ef4e6b85a --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/qcom,sc7180-ufshc.yaml @@ -0,0 +1,167 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/qcom,sc7180-ufshc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SC7180 and Other SoCs UFS Controllers + +maintainers: + - Bjorn Andersson + +# Select only our matches, not all jedec,ufs-2.0 +select: + properties: + compatible: + contains: + enum: + - qcom,msm8998-ufshc + - qcom,qcs8300-ufshc + - qcom,sa8775p-ufshc + - qcom,sc7180-ufshc + - qcom,sc7280-ufshc + - qcom,sc8180x-ufshc + - qcom,sc8280xp-ufshc + - qcom,sm8250-ufshc + - qcom,sm8350-ufshc + - qcom,sm8450-ufshc + - qcom,sm8550-ufshc + required: + - compatible + +properties: + compatible: + items: + - enum: + - qcom,msm8998-ufshc + - qcom,qcs8300-ufshc + - qcom,sa8775p-ufshc + - qcom,sc7180-ufshc + - qcom,sc7280-ufshc + - qcom,sc8180x-ufshc + - qcom,sc8280xp-ufshc + - qcom,sm8250-ufshc + - qcom,sm8350-ufshc + - qcom,sm8450-ufshc + - qcom,sm8550-ufshc + - const: qcom,ufshc + - const: jedec,ufs-2.0 + + reg: + maxItems: 1 + + reg-names: + items: + - const: std + + clocks: + minItems: 7 + maxItems: 8 + + clock-names: + minItems: 7 + items: + - const: core_clk + - const: bus_aggr_clk + - const: iface_clk + - const: core_clk_unipro + - const: ref_clk + - const: tx_lane0_sync_clk + - const: rx_lane0_sync_clk + - const: rx_lane1_sync_clk + + qcom,ice: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to the Inline Crypto Engine node + +required: + - compatible + - reg + +allOf: + - $ref: qcom,ufs-common.yaml + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7180-ufshc + then: + properties: + clocks: + maxItems: 7 + clock-names: + maxItems: 7 + else: + properties: + clocks: + minItems: 8 + clock-names: + minItems: 8 + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + ufs@1d84000 { + compatible = "qcom,sm8450-ufshc", "qcom,ufshc", + "jedec,ufs-2.0"; + reg = <0x0 0x01d84000 0x0 0x3000>; + interrupts = ; + phys = <&ufs_mem_phy_lanes>; + phy-names = "ufsphy"; + lanes-per-direction = <2>; + #reset-cells = <1>; + resets = <&gcc GCC_UFS_PHY_BCR>; + reset-names = "rst"; + reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>; + + vcc-supply = <&vreg_l7b_2p5>; + vcc-max-microamp = <1100000>; + vccq-supply = <&vreg_l9b_1p2>; + vccq-max-microamp = <1200000>; + + power-domains = <&gcc UFS_PHY_GDSC>; + iommus = <&apps_smmu 0xe0 0x0>; + interconnects = <&aggre1_noc MASTER_UFS_MEM &mc_virt SLAVE_EBI1>, + <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>; + interconnect-names = "ufs-ddr", "cpu-ufs"; + + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, + <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, + <&gcc GCC_UFS_PHY_AHB_CLK>, + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; + clock-names = "core_clk", + "bus_aggr_clk", + "iface_clk", + "core_clk_unipro", + "ref_clk", + "tx_lane0_sync_clk", + "rx_lane0_sync_clk", + "rx_lane1_sync_clk"; + freq-table-hz = <75000000 300000000>, + <0 0>, + <0 0>, + <75000000 300000000>, + <75000000 300000000>, + <0 0>, + <0 0>, + <0 0>; + qcom,ice = <&ice>; + }; + }; diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml index fc0f7b8d1cd1..191b88120d13 100644 --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml @@ -15,7 +15,17 @@ select: properties: compatible: contains: - const: qcom,ufshc + enum: + - qcom,msm8994-ufshc + - qcom,msm8996-ufshc + - qcom,qcs615-ufshc + - qcom,sdm845-ufshc + - qcom,sm6115-ufshc + - qcom,sm6125-ufshc + - qcom,sm6350-ufshc + - qcom,sm8150-ufshc + - qcom,sm8650-ufshc + - qcom,sm8750-ufshc required: - compatible @@ -25,23 +35,12 @@ properties: - enum: - qcom,msm8994-ufshc - qcom,msm8996-ufshc - - qcom,msm8998-ufshc - qcom,qcs615-ufshc - - qcom,qcs8300-ufshc - - qcom,sa8775p-ufshc - - qcom,sc7180-ufshc - - qcom,sc7280-ufshc - - qcom,sc8180x-ufshc - - qcom,sc8280xp-ufshc - qcom,sdm845-ufshc - qcom,sm6115-ufshc - qcom,sm6125-ufshc - qcom,sm6350-ufshc - qcom,sm8150-ufshc - - qcom,sm8250-ufshc - - qcom,sm8350-ufshc - - qcom,sm8450-ufshc - - qcom,sm8550-ufshc - qcom,sm8650-ufshc - qcom,sm8750-ufshc - const: qcom,ufshc @@ -72,41 +71,6 @@ allOf: compatible: contains: enum: - - qcom,sc7180-ufshc - then: - properties: - clocks: - minItems: 7 - maxItems: 7 - clock-names: - items: - - const: core_clk - - const: bus_aggr_clk - - const: iface_clk - - const: core_clk_unipro - - const: ref_clk - - const: tx_lane0_sync_clk - - const: rx_lane0_sync_clk - reg: - maxItems: 1 - reg-names: - maxItems: 1 - - - if: - properties: - compatible: - contains: - enum: - - qcom,msm8998-ufshc - - qcom,qcs8300-ufshc - - qcom,sa8775p-ufshc - - qcom,sc7280-ufshc - - qcom,sc8180x-ufshc - - qcom,sc8280xp-ufshc - - qcom,sm8250-ufshc - - qcom,sm8350-ufshc - - qcom,sm8450-ufshc - - qcom,sm8550-ufshc - qcom,sm8650-ufshc - qcom,sm8750-ufshc then: @@ -246,10 +210,10 @@ unevaluatedProperties: false examples: - | - #include + #include #include #include - #include + #include #include soc { @@ -257,9 +221,12 @@ examples: #size-cells = <2>; ufs@1d84000 { - compatible = "qcom,sm8450-ufshc", "qcom,ufshc", + compatible = "qcom,sm8150-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; - reg = <0 0x01d84000 0 0x3000>; + reg = <0x0 0x01d84000 0x0 0x2500>, + <0x0 0x01d90000 0x0 0x8000>; + reg-names = "std", "ice"; + interrupts = ; phys = <&ufs_mem_phy_lanes>; phy-names = "ufsphy"; @@ -275,19 +242,8 @@ examples: vccq-max-microamp = <1200000>; power-domains = <&gcc UFS_PHY_GDSC>; - iommus = <&apps_smmu 0xe0 0x0>; - interconnects = <&aggre1_noc MASTER_UFS_MEM &mc_virt SLAVE_EBI1>, - <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>; - interconnect-names = "ufs-ddr", "cpu-ufs"; + iommus = <&apps_smmu 0x300 0>; - clock-names = "core_clk", - "bus_aggr_clk", - "iface_clk", - "core_clk_unipro", - "ref_clk", - "tx_lane0_sync_clk", - "rx_lane0_sync_clk", - "rx_lane1_sync_clk"; clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, <&gcc GCC_UFS_PHY_AHB_CLK>, @@ -295,15 +251,25 @@ examples: <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, - <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; - freq-table-hz = <75000000 300000000>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>, + <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; + clock-names = "core_clk", + "bus_aggr_clk", + "iface_clk", + "core_clk_unipro", + "ref_clk", + "tx_lane0_sync_clk", + "rx_lane0_sync_clk", + "rx_lane1_sync_clk", + "ice_core_clk"; + freq-table-hz = <37500000 300000000>, + <0 0>, + <0 0>, + <37500000 300000000>, <0 0>, <0 0>, - <75000000 300000000>, - <75000000 300000000>, <0 0>, <0 0>, - <0 0>; - qcom,ice = <&ice>; + <0 300000000>; }; }; -- cgit v1.2.3 From 149009f2dc6f781f490a13264eaa565281e4d490 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 31 Jul 2025 09:15:54 +0200 Subject: scsi: ufs: qcom: dt-bindings: Split SM8650 and similar The binding for Qualcomm SoC UFS controllers grew and it will grow further. Split SM8650 and SM8750 UFS controllers which: 1. Do not reference ICE as IO address space, but as phandle, 2. Have same order of clocks. 3. Have MCQ I/O address space. Document that MCQ address space as optional to maintain backwards compatibility and because Linux drivers can operate perfectly fine without it (thus without MCQ feature). Linux driver already uses "mcq" as possible name for "reg-names" property. The split allows easier review and maintenance of the binding. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250731-dt-bindings-ufs-qcom-v2-3-53bb634bf95a@linaro.org Reviewed-by: Rob Herring (Arm) Acked-by: Manivannan Sadhasivam Signed-off-by: Martin K. Petersen --- .../devicetree/bindings/ufs/qcom,sm8650-ufshc.yaml | 178 +++++++++++++++++++++ .../devicetree/bindings/ufs/qcom,ufs.yaml | 32 ---- 2 files changed, 178 insertions(+), 32 deletions(-) create mode 100644 Documentation/devicetree/bindings/ufs/qcom,sm8650-ufshc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ufs/qcom,sm8650-ufshc.yaml b/Documentation/devicetree/bindings/ufs/qcom,sm8650-ufshc.yaml new file mode 100644 index 000000000000..aaa0bbb5bfe1 --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/qcom,sm8650-ufshc.yaml @@ -0,0 +1,178 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/qcom,sm8650-ufshc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM8650 and Other SoCs UFS Controllers + +maintainers: + - Bjorn Andersson + +# Select only our matches, not all jedec,ufs-2.0 +select: + properties: + compatible: + contains: + enum: + - qcom,sm8650-ufshc + - qcom,sm8750-ufshc + required: + - compatible + +properties: + compatible: + items: + - enum: + - qcom,sm8650-ufshc + - qcom,sm8750-ufshc + - const: qcom,ufshc + - const: jedec,ufs-2.0 + + reg: + minItems: 1 + maxItems: 2 + + reg-names: + minItems: 1 + items: + - const: std + - const: mcq + + clocks: + minItems: 8 + maxItems: 8 + + clock-names: + items: + - const: core_clk + - const: bus_aggr_clk + - const: iface_clk + - const: core_clk_unipro + - const: ref_clk + - const: tx_lane0_sync_clk + - const: rx_lane0_sync_clk + - const: rx_lane1_sync_clk + + qcom,ice: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to the Inline Crypto Engine node + +required: + - compatible + - reg + +allOf: + - $ref: qcom,ufs-common.yaml + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + ufshc@1d84000 { + compatible = "qcom,sm8650-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; + reg = <0x0 0x01d84000 0x0 0x3000>; + + interrupts = ; + + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, + <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, + <&gcc GCC_UFS_PHY_AHB_CLK>, + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, + <&tcsr TCSR_UFS_PAD_CLKREF_EN>, + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; + clock-names = "core_clk", + "bus_aggr_clk", + "iface_clk", + "core_clk_unipro", + "ref_clk", + "tx_lane0_sync_clk", + "rx_lane0_sync_clk", + "rx_lane1_sync_clk"; + + resets = <&gcc GCC_UFS_PHY_BCR>; + reset-names = "rst"; + reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>; + + interconnects = <&aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; + interconnect-names = "ufs-ddr", + "cpu-ufs"; + + power-domains = <&gcc UFS_PHY_GDSC>; + required-opps = <&rpmhpd_opp_nom>; + + operating-points-v2 = <&ufs_opp_table>; + + iommus = <&apps_smmu 0x60 0>; + + lanes-per-direction = <2>; + qcom,ice = <&ice>; + + phys = <&ufs_mem_phy>; + phy-names = "ufsphy"; + + #reset-cells = <1>; + + vcc-supply = <&vreg_l7b_2p5>; + vcc-max-microamp = <1100000>; + vccq-supply = <&vreg_l9b_1p2>; + vccq-max-microamp = <1200000>; + + ufs_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <100000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-201500000 { + opp-hz = /bits/ 64 <201500000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <201500000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-403000000 { + opp-hz = /bits/ 64 <403000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <403000000>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>, + /bits/ 64 <0>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml index 191b88120d13..1dd41f6d5258 100644 --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml @@ -24,8 +24,6 @@ select: - qcom,sm6125-ufshc - qcom,sm6350-ufshc - qcom,sm8150-ufshc - - qcom,sm8650-ufshc - - qcom,sm8750-ufshc required: - compatible @@ -41,8 +39,6 @@ properties: - qcom,sm6125-ufshc - qcom,sm6350-ufshc - qcom,sm8150-ufshc - - qcom,sm8650-ufshc - - qcom,sm8750-ufshc - const: qcom,ufshc - const: jedec,ufs-2.0 @@ -66,34 +62,6 @@ required: allOf: - $ref: qcom,ufs-common.yaml - - if: - properties: - compatible: - contains: - enum: - - qcom,sm8650-ufshc - - qcom,sm8750-ufshc - then: - properties: - clocks: - minItems: 8 - maxItems: 8 - clock-names: - items: - - const: core_clk - - const: bus_aggr_clk - - const: iface_clk - - const: core_clk_unipro - - const: ref_clk - - const: tx_lane0_sync_clk - - const: rx_lane0_sync_clk - - const: rx_lane1_sync_clk - reg: - minItems: 1 - maxItems: 1 - reg-names: - maxItems: 1 - - if: properties: compatible: -- cgit v1.2.3 From af10924fc471d1c693b8689249f53ea10b0519b7 Mon Sep 17 00:00:00 2001 From: Alexandre Courbot Date: Fri, 18 Jul 2025 16:26:20 +0900 Subject: gpu: nova-core: register: redesign relative registers The relative registers are currently very unsafe to use: callers can specify any constant as the base address for access, meaning they can effectively interpret any I/O address as any relative register. Ideally, valid base addresses for a family of registers should be explicitly defined in the code, and could only be used with the relevant registers This patch changes the relative register declaration from e.g.: register!(CPU_CTL @ +0x0000010, "CPU core control" { 0:0 start as bool, "Start the CPU core"; }); into: register!(CPU_CTL @ CpuCtlBase[0x10], "CPU core control" { 0:0 start as bool, "Start the CPU core"; }); Where `CpuCtlBase` is the name of a ZST used as a parameter of the `RegisterBase<>` trait to define a trait unique to a class of register. This specialized trait is then implemented for every type that provides a valid base address, enabling said types to be passed as the base address provider for the register's I/O accessor methods. This design thus makes it impossible to pass an unexpected base address to a relative register, and, since the valid bases are all known at compile-time, also guarantees that all I/O accesses are done within the valid bounds of the I/O range. [acourbot@nvidia.com: add example in the commit log.] Reviewed-by: Lyude Paul Link: https://lore.kernel.org/r/20250718-nova-regs-v2-15-7b6a762aa1cd@nvidia.com Signed-off-by: Alexandre Courbot --- Documentation/gpu/nova/core/todo.rst | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/gpu/nova/core/todo.rst b/Documentation/gpu/nova/core/todo.rst index 894a1e9c3741..a1d12c1b289d 100644 --- a/Documentation/gpu/nova/core/todo.rst +++ b/Documentation/gpu/nova/core/todo.rst @@ -131,7 +131,6 @@ crate so it can be used by other components as well. Features desired before this happens: -* Relative register with build-time base address validation, * Arrays of registers with build-time index validation, * Make I/O optional I/O (for field values that are not registers), * Support other sizes than `u32`, -- cgit v1.2.3 From 0988099646cfc6c72a4448cad39d4ee22ad457a7 Mon Sep 17 00:00:00 2001 From: Alexandre Courbot Date: Fri, 18 Jul 2025 16:26:24 +0900 Subject: gpu: nova-core: register: add support for relative array registers Add support for declaring arrays of registers available from a variable base. This is effectively a combination of the relative and array registers features. nova-core does not make much use of this yet, but it will become helpful to have for GSP boot. Reviewed-by: Lyude Paul Link: https://lore.kernel.org/r/20250718-nova-regs-v2-19-7b6a762aa1cd@nvidia.com Signed-off-by: Alexandre Courbot --- Documentation/gpu/nova/core/todo.rst | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/gpu/nova/core/todo.rst b/Documentation/gpu/nova/core/todo.rst index a1d12c1b289d..48b20656dcb1 100644 --- a/Documentation/gpu/nova/core/todo.rst +++ b/Documentation/gpu/nova/core/todo.rst @@ -131,7 +131,6 @@ crate so it can be used by other components as well. Features desired before this happens: -* Arrays of registers with build-time index validation, * Make I/O optional I/O (for field values that are not registers), * Support other sizes than `u32`, * Allow visibility control for registers and individual fields, -- cgit v1.2.3 From eb0e3f301d6ee7c813556fa6ca714e436f5235b0 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 16 Jul 2025 18:06:30 -0700 Subject: dt-bindings: arm: cpus: Add edac-enabled property Some ARM Cortex CPUs including A72 have Error Detection And Correction (EDAC) support on their L1 and L2 caches. That functionality is in implementation defined registers, so using it is not safe in virtualized environments or when EL3 already uses these registers. Add a edac-enabled flag which can be explicitly set when EDAC can be used. [ bp: Massage commit message. ] Signed-off-by: Sascha Hauer Signed-off-by: Vijay Balakrishna Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/1752714390-27389-3-git-send-email-vijayb@linux.microsoft.com --- Documentation/devicetree/bindings/arm/cpus.yaml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 5bd517befb68..4accf4cbc6c7 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -353,6 +353,12 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle description: Link to Mediatek Cache Coherent Interconnect + edac-enabled: + $ref: /schemas/types.yaml#/definitions/flag + description: + A72 CPUs support Error Detection And Correction (EDAC) on their L1 and + L2 caches. This flag marks this function as usable. + qcom,saw: $ref: /schemas/types.yaml#/definitions/phandle description: @@ -399,6 +405,17 @@ properties: allOf: - $ref: /schemas/cpu.yaml# - $ref: /schemas/opp/opp-v1.yaml# + - if: + not: + properties: + compatible: + contains: + const: arm,cortex-a72 + then: + # Allow edac-enabled only for Cortex A72 + properties: + edac-enabled: false + - if: # If the enable-method property contains one of those values properties: -- cgit v1.2.3 From 38f9f4f5f8828e43c549fd07b70fe5bc4c2ef2f6 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 6 Aug 2025 16:27:32 -0500 Subject: dt-bindings: arm: Convert marvell,berlin to DT schema Reviewed-by: Jisheng Zhang Link: https://lore.kernel.org/r/20250806212733.1633662-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/arm/marvell,berlin.yaml | 45 +++++++++++ Documentation/devicetree/bindings/arm/syna.txt | 89 ---------------------- 2 files changed, 45 insertions(+), 89 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/marvell,berlin.yaml delete mode 100644 Documentation/devicetree/bindings/arm/syna.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/marvell,berlin.yaml b/Documentation/devicetree/bindings/arm/marvell,berlin.yaml new file mode 100644 index 000000000000..4e8442980dcb --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell,berlin.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell,berlin.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synaptics/Marvell Berlin SoC + +maintainers: + - Jisheng Zhang + +description: + According to https://www.synaptics.com/company/news/conexant-marvell + Synaptics has acquired the Multimedia Solutions Business of Marvell, so + Berlin SoCs are now Synaptics' SoCs. + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - sony,nsz-gs7 + - const: marvell,berlin2 + - const: marvell,berlin + - items: + - enum: + - google,chromecast + - valve,steamlink + - const: marvell,berlin2cd + - const: marvell,berlin + - items: + - enum: + - marvell,berlin2q-dmp + - const: marvell,berlin2q + - const: marvell,berlin + - items: + - enum: + - marvell,berlin4ct-dmp + - marvell,berlin4ct-stb + - const: marvell,berlin4ct + - const: marvell,berlin + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/syna.txt b/Documentation/devicetree/bindings/arm/syna.txt deleted file mode 100644 index f53c430f648c..000000000000 --- a/Documentation/devicetree/bindings/arm/syna.txt +++ /dev/null @@ -1,89 +0,0 @@ -Synaptics SoC Device Tree Bindings - -According to https://www.synaptics.com/company/news/conexant-marvell -Synaptics has acquired the Multimedia Solutions Business of Marvell, so -berlin SoCs are now Synaptics' SoCs now. - ---------------------------------------------------------------- - -Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500 -shall have the following properties: - -* Required root node properties: -compatible: must contain "marvell,berlin" - -In addition, the above compatible shall be extended with the specific -SoC and board used. Currently known SoC compatibles are: - "marvell,berlin2" for Marvell Armada 1500 (BG2, 88DE3100), - "marvell,berlin2cd" for Marvell Armada 1500-mini (BG2CD, 88DE3005) - "marvell,berlin2ct" for Marvell Armada ? (BG2CT, 88DE????) - "marvell,berlin2q" for Marvell Armada 1500-pro (BG2Q, 88DE3114) - "marvell,berlin3" for Marvell Armada ? (BG3, 88DE????) - -* Example: - -/ { - model = "Sony NSZ-GS7"; - compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin"; - - ... -} - -* Marvell Berlin CPU control bindings - -CPU control register allows various operations on CPUs, like resetting them -independently. - -Required properties: -- compatible: should be "marvell,berlin-cpu-ctrl" -- reg: address and length of the register set - -Example: - -cpu-ctrl@f7dd0000 { - compatible = "marvell,berlin-cpu-ctrl"; - reg = <0xf7dd0000 0x10000>; -}; - -* Marvell Berlin2 chip control binding - -Marvell Berlin SoCs have a chip control register set providing several -individual registers dealing with pinmux, padmux, clock, reset, and secondary -CPU boot address. Unfortunately, the individual registers are spread among the -chip control registers, so there should be a single DT node only providing the -different functions which are described below. - -Required properties: -- compatible: - * the first and second values must be: - "simple-mfd", "syscon" -- reg: address and length of following register sets for - BG2/BG2CD: chip control register set - BG2Q: chip control register set and cpu pll registers - -* Marvell Berlin2 system control binding - -Marvell Berlin SoCs have a system control register set providing several -individual registers dealing with pinmux, padmux, and reset. - -Required properties: -- compatible: - * the first and second values must be: - "simple-mfd", "syscon" -- reg: address and length of the system control register set - -Example: - -chip: chip-control@ea0000 { - compatible = "simple-mfd", "syscon"; - reg = <0xea0000 0x400>; - - /* sub-device nodes */ -}; - -sysctrl: system-controller@d000 { - compatible = "simple-mfd", "syscon"; - reg = <0xd000 0x100>; - - /* sub-device nodes */ -}; -- cgit v1.2.3 From 47829efa1cf42993e5bea2b4aea7e1cfcf8bd438 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 13:14:20 -0500 Subject: dt-bindings: perf: Convert apm,xgene-pmu to DT schema Convert the Applied Micro X-Gene PMU binding to DT schema format. It is a straightforward conversion. Link: https://lore.kernel.org/r/20250812181422.68286-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/perf/apm,xgene-pmu.yaml | 142 +++++++++++++++++++++ .../devicetree/bindings/perf/apm-xgene-pmu.txt | 112 ---------------- 2 files changed, 142 insertions(+), 112 deletions(-) create mode 100644 Documentation/devicetree/bindings/perf/apm,xgene-pmu.yaml delete mode 100644 Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/perf/apm,xgene-pmu.yaml b/Documentation/devicetree/bindings/perf/apm,xgene-pmu.yaml new file mode 100644 index 000000000000..314048a2a134 --- /dev/null +++ b/Documentation/devicetree/bindings/perf/apm,xgene-pmu.yaml @@ -0,0 +1,142 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/apm,xgene-pmu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: APM X-Gene SoC PMU + +maintainers: + - Khuong Dinh + +description: | + This is APM X-Gene SoC PMU (Performance Monitoring Unit) module. + The following PMU devices are supported: + + L3C - L3 cache controller + IOB - IO bridge + MCB - Memory controller bridge + MC - Memory controller + +properties: + compatible: + enum: + - apm,xgene-pmu + - apm,xgene-pmu-v2 + + "#address-cells": + const: 2 + + "#size-cells": + const: 2 + + ranges: true + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + regmap-csw: + $ref: /schemas/types.yaml#/definitions/phandle + + regmap-mcba: + $ref: /schemas/types.yaml#/definitions/phandle + + regmap-mcbb: + $ref: /schemas/types.yaml#/definitions/phandle + +required: + - compatible + - regmap-csw + - regmap-mcba + - regmap-mcbb + - reg + - interrupts + +additionalProperties: + type: object + additionalProperties: false + + properties: + compatible: + enum: + - apm,xgene-pmu-l3c + - apm,xgene-pmu-iob + - apm,xgene-pmu-mcb + - apm,xgene-pmu-mc + + reg: + maxItems: 1 + + enable-bit-index: + description: + Specifies which bit enables the associated resource in MCB or MC subnodes. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 31 + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + pmu@78810000 { + compatible = "apm,xgene-pmu-v2"; + reg = <0x0 0x78810000 0x0 0x1000>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + regmap-csw = <&csw>; + regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + interrupts = <0x0 0x22 0x4>; + + pmul3c@7e610000 { + compatible = "apm,xgene-pmu-l3c"; + reg = <0x0 0x7e610000 0x0 0x1000>; + }; + + pmuiob@7e940000 { + compatible = "apm,xgene-pmu-iob"; + reg = <0x0 0x7e940000 0x0 0x1000>; + }; + + pmucmcb@7e710000 { + compatible = "apm,xgene-pmu-mcb"; + reg = <0x0 0x7e710000 0x0 0x1000>; + enable-bit-index = <0>; + }; + + pmucmcb@7e730000 { + compatible = "apm,xgene-pmu-mcb"; + reg = <0x0 0x7e730000 0x0 0x1000>; + enable-bit-index = <1>; + }; + + pmucmc@7e810000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e810000 0x0 0x1000>; + enable-bit-index = <0>; + }; + + pmucmc@7e850000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e850000 0x0 0x1000>; + enable-bit-index = <1>; + }; + + pmucmc@7e890000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e890000 0x0 0x1000>; + enable-bit-index = <2>; + }; + + pmucmc@7e8d0000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e8d0000 0x0 0x1000>; + enable-bit-index = <3>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt b/Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt deleted file mode 100644 index afb11cf693c0..000000000000 --- a/Documentation/devicetree/bindings/perf/apm-xgene-pmu.txt +++ /dev/null @@ -1,112 +0,0 @@ -* APM X-Gene SoC PMU bindings - -This is APM X-Gene SoC PMU (Performance Monitoring Unit) module. -The following PMU devices are supported: - - L3C - L3 cache controller - IOB - IO bridge - MCB - Memory controller bridge - MC - Memory controller - -The following section describes the SoC PMU DT node binding. - -Required properties: -- compatible : Shall be "apm,xgene-pmu" for revision 1 or - "apm,xgene-pmu-v2" for revision 2. -- regmap-csw : Regmap of the CPU switch fabric (CSW) resource. -- regmap-mcba : Regmap of the MCB-A (memory bridge) resource. -- regmap-mcbb : Regmap of the MCB-B (memory bridge) resource. -- reg : First resource shall be the CPU bus PMU resource. -- interrupts : Interrupt-specifier for PMU IRQ. - -Required properties for L3C subnode: -- compatible : Shall be "apm,xgene-pmu-l3c". -- reg : First resource shall be the L3C PMU resource. - -Required properties for IOB subnode: -- compatible : Shall be "apm,xgene-pmu-iob". -- reg : First resource shall be the IOB PMU resource. - -Required properties for MCB subnode: -- compatible : Shall be "apm,xgene-pmu-mcb". -- reg : First resource shall be the MCB PMU resource. -- enable-bit-index : The bit indicates if the according MCB is enabled. - -Required properties for MC subnode: -- compatible : Shall be "apm,xgene-pmu-mc". -- reg : First resource shall be the MC PMU resource. -- enable-bit-index : The bit indicates if the according MC is enabled. - -Example: - csw: csw@7e200000 { - compatible = "apm,xgene-csw", "syscon"; - reg = <0x0 0x7e200000 0x0 0x1000>; - }; - - mcba: mcba@7e700000 { - compatible = "apm,xgene-mcb", "syscon"; - reg = <0x0 0x7e700000 0x0 0x1000>; - }; - - mcbb: mcbb@7e720000 { - compatible = "apm,xgene-mcb", "syscon"; - reg = <0x0 0x7e720000 0x0 0x1000>; - }; - - pmu: pmu@78810000 { - compatible = "apm,xgene-pmu-v2"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - regmap-csw = <&csw>; - regmap-mcba = <&mcba>; - regmap-mcbb = <&mcbb>; - reg = <0x0 0x78810000 0x0 0x1000>; - interrupts = <0x0 0x22 0x4>; - - pmul3c@7e610000 { - compatible = "apm,xgene-pmu-l3c"; - reg = <0x0 0x7e610000 0x0 0x1000>; - }; - - pmuiob@7e940000 { - compatible = "apm,xgene-pmu-iob"; - reg = <0x0 0x7e940000 0x0 0x1000>; - }; - - pmucmcb@7e710000 { - compatible = "apm,xgene-pmu-mcb"; - reg = <0x0 0x7e710000 0x0 0x1000>; - enable-bit-index = <0>; - }; - - pmucmcb@7e730000 { - compatible = "apm,xgene-pmu-mcb"; - reg = <0x0 0x7e730000 0x0 0x1000>; - enable-bit-index = <1>; - }; - - pmucmc@7e810000 { - compatible = "apm,xgene-pmu-mc"; - reg = <0x0 0x7e810000 0x0 0x1000>; - enable-bit-index = <0>; - }; - - pmucmc@7e850000 { - compatible = "apm,xgene-pmu-mc"; - reg = <0x0 0x7e850000 0x0 0x1000>; - enable-bit-index = <1>; - }; - - pmucmc@7e890000 { - compatible = "apm,xgene-pmu-mc"; - reg = <0x0 0x7e890000 0x0 0x1000>; - enable-bit-index = <2>; - }; - - pmucmc@7e8d0000 { - compatible = "apm,xgene-pmu-mc"; - reg = <0x0 0x7e8d0000 0x0 0x1000>; - enable-bit-index = <3>; - }; - }; -- cgit v1.2.3 From 326d2519811200da0e301dce3e93389dadd197a4 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 14 Aug 2025 08:51:56 -0500 Subject: dt-bindings: powerpc: Drop duplicate fsl/mpic.txt The chrp,open-pic binding schema already supports the "fsl,mpic" compatible. Add a couple of missing properties and support for 4 "#interrupt-cells" to the chrp,open-pic binding, so fsl/mpic.txt can be removed. Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250814135157.2747346-2-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/chrp,open-pic.yaml | 17 +- .../devicetree/bindings/powerpc/fsl/mpic.txt | 231 --------------------- 2 files changed, 16 insertions(+), 232 deletions(-) delete mode 100644 Documentation/devicetree/bindings/powerpc/fsl/mpic.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/chrp,open-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/chrp,open-pic.yaml index f0d9bbd7d510..642738512f3c 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/chrp,open-pic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/chrp,open-pic.yaml @@ -36,12 +36,27 @@ properties: const: 0 '#interrupt-cells': - const: 2 + description: + A value of 4 means that interrupt specifiers contain the interrupt-type or + type-specific information cells. + enum: [ 2, 4 ] pic-no-reset: description: Indicates the PIC shall not be reset during runtime initialization. type: boolean + single-cpu-affinity: + description: + If present, non-IPI interrupts will be routed to a single CPU at a time. + type: boolean + + last-interrupt-source: + description: + Some MPICs do not correctly report the number of hardware sources in the + global feature registers. This value, if specified, overrides the value + read from MPIC_GREG_FEATURE_LAST_SRC. + $ref: /schemas/types.yaml#/definitions/uint32 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt b/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt deleted file mode 100644 index dc5744636a57..000000000000 --- a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt +++ /dev/null @@ -1,231 +0,0 @@ -===================================================================== -Freescale MPIC Interrupt Controller Node -Copyright (C) 2010,2011 Freescale Semiconductor Inc. -===================================================================== - -The Freescale MPIC interrupt controller is found on all PowerQUICC -and QorIQ processors and is compatible with the Open PIC. The -notable difference from Open PIC binding is the addition of 2 -additional cells in the interrupt specifier defining interrupt type -information. - -PROPERTIES - - - compatible - Usage: required - Value type: - Definition: Shall include "fsl,mpic". Freescale MPIC - controllers compatible with this binding have Block - Revision Registers BRR1 and BRR2 at offset 0x0 and - 0x10 in the MPIC. - - - reg - Usage: required - Value type: - Definition: A standard property. Specifies the physical - offset and length of the device's registers within the - CCSR address space. - - - interrupt-controller - Usage: required - Value type: - Definition: Specifies that this node is an interrupt - controller - - - #interrupt-cells - Usage: required - Value type: - Definition: Shall be 2 or 4. A value of 2 means that interrupt - specifiers do not contain the interrupt-type or type-specific - information cells. - - - #address-cells - Usage: required - Value type: - Definition: Shall be 0. - - - pic-no-reset - Usage: optional - Value type: - Definition: The presence of this property specifies that the - MPIC must not be reset by the client program, and that - the boot program has initialized all interrupt source - configuration registers to a sane state-- masked or - directed at other cores. This ensures that the client - program will not receive interrupts for sources not belonging - to the client. The presence of this property also mandates - that any initialization related to interrupt sources shall - be limited to sources explicitly referenced in the device tree. - - - big-endian - Usage: optional - Value type: - If present the MPIC will be assumed to be big-endian. Some - device-trees omit this property on MPIC nodes even when the MPIC is - in fact big-endian, so certain boards override this property. - - - single-cpu-affinity - Usage: optional - Value type: - If present the MPIC will be assumed to only be able to route - non-IPI interrupts to a single CPU at a time (EG: Freescale MPIC). - - - last-interrupt-source - Usage: optional - Value type: - Some MPICs do not correctly report the number of hardware sources - in the global feature registers. If specified, this field will - override the value read from MPIC_GREG_FEATURE_LAST_SRC. - -INTERRUPT SPECIFIER DEFINITION - - Interrupt specifiers consists of 4 cells encoded as - follows: - - <1st-cell> interrupt-number - - Identifies the interrupt source. The meaning - depends on the type of interrupt. - - Note: If the interrupt-type cell is undefined - (i.e. #interrupt-cells = 2), this cell - should be interpreted the same as for - interrupt-type 0-- i.e. an external or - normal SoC device interrupt. - - <2nd-cell> level-sense information, encoded as follows: - 0 = low-to-high edge triggered - 1 = active low level-sensitive - 2 = active high level-sensitive - 3 = high-to-low edge triggered - - <3rd-cell> interrupt-type - - The following types are supported: - - 0 = external or normal SoC device interrupt - - The interrupt-number cell contains - the SoC device interrupt number. The - type-specific cell is undefined. The - interrupt-number is derived from the - MPIC a block of registers referred to as - the "Interrupt Source Configuration Registers". - Each source has 32-bytes of registers - (vector/priority and destination) in this - region. So interrupt 0 is at offset 0x0, - interrupt 1 is at offset 0x20, and so on. - - 1 = error interrupt - - The interrupt-number cell contains - the SoC device interrupt number for - the error interrupt. The type-specific - cell identifies the specific error - interrupt number. - - 2 = MPIC inter-processor interrupt (IPI) - - The interrupt-number cell identifies - the MPIC IPI number. The type-specific - cell is undefined. - - 3 = MPIC timer interrupt - - The interrupt-number cell identifies - the MPIC timer number. The type-specific - cell is undefined. - - <4th-cell> type-specific information - - The type-specific cell is encoded as follows: - - - For interrupt-type 1 (error interrupt), - the type-specific cell contains the - bit number of the error interrupt in the - Error Interrupt Summary Register. - -EXAMPLE 1 - /* - * mpic interrupt controller with 4 cells per specifier - */ - mpic: pic@40000 { - compatible = "fsl,mpic"; - interrupt-controller; - #interrupt-cells = <4>; - #address-cells = <0>; - reg = <0x40000 0x40000>; - }; - -EXAMPLE 2 - /* - * The MPC8544 I2C controller node has an internal - * interrupt number of 27. As per the reference manual - * this corresponds to interrupt source configuration - * registers at 0x5_0560. - * - * The interrupt source configuration registers begin - * at 0x5_0000. - * - * To compute the interrupt specifier interrupt number - * - * 0x560 >> 5 = 43 - * - * The interrupt source configuration registers begin - * at 0x5_0000, and so the i2c vector/priority registers - * are at 0x5_0560. - */ - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - -EXAMPLE 3 - /* - * Definition of a node defining the 4 - * MPIC IPI interrupts. Note the interrupt - * type of 2. - */ - ipi@410a0 { - compatible = "fsl,mpic-ipi"; - reg = <0x40040 0x10>; - interrupts = <0 0 2 0 - 1 0 2 0 - 2 0 2 0 - 3 0 2 0>; - }; - -EXAMPLE 4 - /* - * Definition of a node defining the MPIC - * global timers. Note the interrupt - * type of 3. - */ - timer0: timer@41100 { - compatible = "fsl,mpic-global-timer"; - reg = <0x41100 0x100 0x41300 4>; - interrupts = <0 0 3 0 - 1 0 3 0 - 2 0 3 0 - 3 0 3 0>; - }; - -EXAMPLE 5 - /* - * Definition of an error interrupt (interrupt type 1). - * SoC interrupt number is 16 and the specific error - * interrupt bit in the error interrupt summary register - * is 23. - */ - memory-controller@8000 { - compatible = "fsl,p4080-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; -- cgit v1.2.3 From 9ea349e4b94114f9fd8f01102b7db66edd9bd026 Mon Sep 17 00:00:00 2001 From: Vijay Sundar Selvamani Date: Fri, 25 Jul 2025 10:09:29 +0100 Subject: crypto: qat - add ring buffer idle telemetry counter for GEN6 Add a new performance counter that measures the average ring buffer idle duration. This metric is now included in the telemetry counters exposed via debugfs for QAT GEN6 devices. Update the documentation to reflect the new idle duration counter Co-developed-by: George Abraham P Signed-off-by: George Abraham P Signed-off-by: Vijay Sundar Selvamani Signed-off-by: Suman Kumar Chakraborty Reviewed-by: Giovanni Cabiddu Signed-off-by: Herbert Xu --- Documentation/ABI/testing/debugfs-driver-qat_telemetry | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/debugfs-driver-qat_telemetry b/Documentation/ABI/testing/debugfs-driver-qat_telemetry index 0dfd8d97e169..53abf9275147 100644 --- a/Documentation/ABI/testing/debugfs-driver-qat_telemetry +++ b/Documentation/ABI/testing/debugfs-driver-qat_telemetry @@ -57,6 +57,7 @@ Description: (RO) Reports device telemetry counters. gp_lat_acc_avg average get to put latency [ns] bw_in PCIe, write bandwidth [Mbps] bw_out PCIe, read bandwidth [Mbps] + re_acc_avg average ring empty time [ns] at_page_req_lat_avg Address Translator(AT), average page request latency [ns] at_trans_lat_avg AT, average page translation latency [ns] -- cgit v1.2.3 From 3ed63344657a48b19be6f4a697d94a436c0c7edc Mon Sep 17 00:00:00 2001 From: Vijay Sundar Selvamani Date: Fri, 25 Jul 2025 10:09:30 +0100 Subject: crypto: qat - add command queue telemetry counters for GEN6 Add slice-specific command queue counters for QAT GEN6 devices to monitor utilization metrics, including wait time, execution duration, and release events. Update the documentation to reflect the new command queue counter functionality. Co-developed-by: George Abraham P Signed-off-by: George Abraham P Signed-off-by: Vijay Sundar Selvamani Signed-off-by: Suman Kumar Chakraborty Reviewed-by: Giovanni Cabiddu Signed-off-by: Herbert Xu --- .../ABI/testing/debugfs-driver-qat_telemetry | 26 ++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/debugfs-driver-qat_telemetry b/Documentation/ABI/testing/debugfs-driver-qat_telemetry index 53abf9275147..06097ee0f154 100644 --- a/Documentation/ABI/testing/debugfs-driver-qat_telemetry +++ b/Documentation/ABI/testing/debugfs-driver-qat_telemetry @@ -86,6 +86,32 @@ Description: (RO) Reports device telemetry counters. exec_cph execution count of Cipher slice N util_ath utilization of Authentication slice N [%] exec_ath execution count of Authentication slice N + cmdq_wait_cnv wait time for cmdq N to get Compression and verify + slice ownership + cmdq_exec_cnv Compression and verify slice execution time while + owned by cmdq N + cmdq_drain_cnv time taken for cmdq N to release Compression and + verify slice ownership + cmdq_wait_dcprz wait time for cmdq N to get Decompression + slice N ownership + cmdq_exec_dcprz Decompression slice execution time while + owned by cmdq N + cmdq_drain_dcprz time taken for cmdq N to release Decompression + slice ownership + cmdq_wait_pke wait time for cmdq N to get PKE slice ownership + cmdq_exec_pke PKE slice execution time while owned by cmdq N + cmdq_drain_pke time taken for cmdq N to release PKE slice + ownership + cmdq_wait_ucs wait time for cmdq N to get UCS slice ownership + cmdq_exec_ucs UCS slice execution time while owned by cmdq N + cmdq_drain_ucs time taken for cmdq N to release UCS slice + ownership + cmdq_wait_ath wait time for cmdq N to get Authentication slice + ownership + cmdq_exec_ath Authentication slice execution time while owned + by cmdq N + cmdq_drain_ath time taken for cmdq N to release Authentication + slice ownership ======================= ======================================== The telemetry report file can be read with the following command:: -- cgit v1.2.3 From 83d76bf0360f7041d03d8f70301b0a8f96c9c872 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 23 Jul 2025 08:56:45 +0000 Subject: dt-bindings: iio: adc: rockchip-saradc: Allow use of a power-domain The SARADC controller in most Rockchip SoCs are part of power domains that are always powered on, i.e. PD_BUS or PD_PERI. These always powered on power domains have typically not been described in the device tree. Because these power domains have been left out of the device tree there has not been any real need to properly describe the power domain of the SARADC controller. On RK3528 the SARADC controller is part of the PD_VPU power domain. Add support to describe an optional power-domains for the SARADC controller in Rockchip SoCs. Signed-off-by: Jonas Karlman Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250723085654.2273324-4-jonas@kwiboo.se Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml index 41e0c56ef8e3..f776041fd08f 100644 --- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml @@ -47,6 +47,9 @@ properties: - const: saradc - const: apb_pclk + power-domains: + maxItems: 1 + resets: maxItems: 1 -- cgit v1.2.3 From 07306551cb76d61b02391d26a2e85c7711e92e1c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Jul 2025 13:13:46 +0200 Subject: dt-bindings: iio: Drop unused header includes in examples Drop includes of headers which example code does not use. No functional impact. Signed-off-by: Krzysztof Kozlowski Reviewed-by: David Heidelberg Acked-by: Matti Vaittinen Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250724111345.47889-5-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml | 1 - Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml | 2 -- Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml | 2 -- Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml | 2 -- Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml | 2 -- Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml | 1 - Documentation/devicetree/bindings/iio/accel/bosch,bma400.yaml | 1 - Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml | 1 - Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml | 1 - Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml | 1 - Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml | 1 - Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml | 1 - Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml | 1 - Documentation/devicetree/bindings/iio/adc/ti,ads1298.yaml | 1 - Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml | 1 - Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml | 2 -- Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml | 2 -- Documentation/devicetree/bindings/iio/light/st,vl6180.yaml | 1 - .../devicetree/bindings/iio/magnetometer/voltafield,af8133j.yaml | 1 - Documentation/devicetree/bindings/iio/pressure/bmp085.yaml | 1 - 20 files changed, 26 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml index 5887021cc90f..3dc973b98f81 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml @@ -37,7 +37,6 @@ unevaluatedProperties: false examples: - | - #include #include spi { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml index 0c5b64cae965..3a8c69eecfde 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml @@ -57,7 +57,6 @@ unevaluatedProperties: false examples: - | - #include #include i2c { #address-cells = <1>; @@ -73,7 +72,6 @@ examples: }; }; - | - #include #include spi { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml index 84d949392012..a23a626bfab6 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml @@ -56,7 +56,6 @@ unevaluatedProperties: false examples: - | - #include #include i2c { #address-cells = <1>; @@ -72,7 +71,6 @@ examples: }; }; - | - #include #include spi { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml index c07261c71013..f39e2912731f 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml @@ -58,7 +58,6 @@ unevaluatedProperties: false examples: - | - #include #include i2c { #address-cells = <1>; @@ -74,7 +73,6 @@ examples: }; }; - | - #include #include spi { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml index 62465e36a590..88aa67bf2280 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml @@ -37,7 +37,6 @@ unevaluatedProperties: false examples: - | - #include #include i2c { #address-cells = <1>; @@ -52,7 +51,6 @@ examples: }; }; - | - #include #include spi { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml b/Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml index 457a709b583c..85c9537f1f02 100644 --- a/Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml +++ b/Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml @@ -107,7 +107,6 @@ examples: }; }; - | - # include spi { #address-cells = <1>; #size-cells = <0>; diff --git a/Documentation/devicetree/bindings/iio/accel/bosch,bma400.yaml b/Documentation/devicetree/bindings/iio/accel/bosch,bma400.yaml index 8723a336229e..c5fedcf998f2 100644 --- a/Documentation/devicetree/bindings/iio/accel/bosch,bma400.yaml +++ b/Documentation/devicetree/bindings/iio/accel/bosch,bma400.yaml @@ -40,7 +40,6 @@ additionalProperties: false examples: - | - #include #include i2c { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml b/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml index f64d99b35492..53de921768ac 100644 --- a/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml +++ b/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml @@ -57,7 +57,6 @@ examples: }; }; - | - # include spi { #address-cells = <1>; #size-cells = <0>; diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml index ddec9747436c..705adbe88def 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml @@ -93,7 +93,6 @@ unevaluatedProperties: false examples: - | - #include #include i2c { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml index 21ee319d4675..62d906e24997 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml @@ -379,7 +379,6 @@ unevaluatedProperties: false examples: # Example AD7173-8 with external reference connected to REF+/REF-: - | - #include #include spi { diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml index c28db0d635a0..b9dc04b0d307 100644 --- a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml @@ -278,7 +278,6 @@ examples: - | #include #include - #include pmic { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml b/Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml index 2a8ad4fdfc6b..f0a1347ba4db 100644 --- a/Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml +++ b/Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml @@ -50,7 +50,6 @@ unevaluatedProperties: false examples: - | - #include spi { #address-cells = <1>; #size-cells = <0>; diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml index 775eee972b12..044b66a3b00c 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml @@ -44,7 +44,6 @@ unevaluatedProperties: false examples: - | - #include spi { #address-cells = <1>; #size-cells = <0>; diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads1298.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads1298.yaml index bf5a43a81d59..71f9f9b745cb 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,ads1298.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads1298.yaml @@ -59,7 +59,6 @@ unevaluatedProperties: false examples: - | - #include #include spi { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml b/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml index 4cacc9948726..3a725ece7ec4 100644 --- a/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml +++ b/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml @@ -44,7 +44,6 @@ unevaluatedProperties: false examples: - | - #include #include spi { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml b/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml index d4d4e5c3d856..119e28a833fd 100644 --- a/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml +++ b/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml @@ -74,7 +74,6 @@ unevaluatedProperties: false examples: - | - #include #include i2c { #address-cells = <1>; @@ -91,7 +90,6 @@ examples: }; }; - | - #include #include spi { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml index 688100b240bc..2930b3386703 100644 --- a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml +++ b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml @@ -47,7 +47,6 @@ unevaluatedProperties: false examples: - | - #include #include i2c { #address-cells = <1>; @@ -63,7 +62,6 @@ examples: }; }; - | - #include #include spi { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/iio/light/st,vl6180.yaml b/Documentation/devicetree/bindings/iio/light/st,vl6180.yaml index 27c36ab7990d..8598fb631aac 100644 --- a/Documentation/devicetree/bindings/iio/light/st,vl6180.yaml +++ b/Documentation/devicetree/bindings/iio/light/st,vl6180.yaml @@ -32,7 +32,6 @@ required: examples: - | - #include i2c { #address-cells = <1>; #size-cells = <0>; diff --git a/Documentation/devicetree/bindings/iio/magnetometer/voltafield,af8133j.yaml b/Documentation/devicetree/bindings/iio/magnetometer/voltafield,af8133j.yaml index b6ab01a6914a..ed42dc5afb99 100644 --- a/Documentation/devicetree/bindings/iio/magnetometer/voltafield,af8133j.yaml +++ b/Documentation/devicetree/bindings/iio/magnetometer/voltafield,af8133j.yaml @@ -44,7 +44,6 @@ additionalProperties: false examples: - | - #include #include i2c { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml b/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml index 706b7e24f182..b9ea37317b53 100644 --- a/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml +++ b/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml @@ -109,7 +109,6 @@ examples: }; - | # include - # include spi { #address-cells = <1>; #size-cells = <0>; -- cgit v1.2.3 From 1c3e87983cf0d71139afe88db440e3a42ea34ebe Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Jul 2025 13:13:47 +0200 Subject: dt-bindings: iio: adc: Replace hard-coded GPIO/IRQ flag with a define For readability use known defines instead of hard-coding GPIO or interrupt flag. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) Acked-by: Matti Vaittinen Link: https://patch.msgid.link/20250724111345.47889-6-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml | 2 +- Documentation/devicetree/bindings/iio/adc/rohm,bd79124.yaml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml index ef8d51e74c08..592854766583 100644 --- a/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml @@ -63,6 +63,6 @@ examples: vdd-supply = <&adc_vdd>; vref-supply = <&adc_vref>; spi-max-frequency = <1000000>; - shutdown-gpios = <&gpio 26 1>; + shutdown-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; }; }; diff --git a/Documentation/devicetree/bindings/iio/adc/rohm,bd79124.yaml b/Documentation/devicetree/bindings/iio/adc/rohm,bd79124.yaml index 503285823376..4a8f127de7e3 100644 --- a/Documentation/devicetree/bindings/iio/adc/rohm,bd79124.yaml +++ b/Documentation/devicetree/bindings/iio/adc/rohm,bd79124.yaml @@ -81,7 +81,7 @@ examples: reg = <0x10>; interrupt-parent = <&gpio1>; - interrupts = <29 8>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; vdd-supply = <&dummyreg>; iovdd-supply = <&dummyreg>; -- cgit v1.2.3 From 971255565074b160d5d05d6b0d9e6f70cbb7c4a9 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Jul 2025 13:13:48 +0200 Subject: dt-bindings: iio: adc: samsung,exynos-adc: Use correct IRQ level in example The interrupt line to GIC is IRQ_TYPE_LEVEL_HIGH, so use that instead of "none". Also replace the hard-coded GIC_SPI flag. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alim Akhtar Reviewed-by: Sam Protsenko Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250724111345.47889-7-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml index 4e40f6bed5db..8069e99ddac8 100644 --- a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml @@ -128,10 +128,12 @@ allOf: examples: - | + #include + adc: adc@12d10000 { compatible = "samsung,exynos-adc-v1"; reg = <0x12d10000 0x100>; - interrupts = <0 106 0>; + interrupts = ; #io-channel-cells = <1>; clocks = <&clock 303>; @@ -152,11 +154,12 @@ examples: - | #include + #include adc@126c0000 { compatible = "samsung,exynos3250-adc"; reg = <0x126c0000 0x100>; - interrupts = <0 137 0>; + interrupts = ; #io-channel-cells = <1>; clocks = <&cmu CLK_TSADC>, -- cgit v1.2.3 From 0a84f5105b405d8506707d244f225b040dfb04f4 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Jul 2025 13:13:49 +0200 Subject: dt-bindings: iio: light: Simplify interrupts property in the example dynaimage,al3010 and dynaimage,al3320a are I2C devices, so their interrupts are not routed to GIC and rarely first interrupt cell is <0>. This looks like copy-paste from some SoC block, so drop it and also for readability use known defines instead of hard-coding interrupt flag. Signed-off-by: Krzysztof Kozlowski Reviewed-by: David Heidelberg Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250724111345.47889-8-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/light/dynaimage,al3010.yaml | 2 +- Documentation/devicetree/bindings/iio/light/dynaimage,al3320a.yaml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/light/dynaimage,al3010.yaml b/Documentation/devicetree/bindings/iio/light/dynaimage,al3010.yaml index f1048c30e73e..1472c997c16f 100644 --- a/Documentation/devicetree/bindings/iio/light/dynaimage,al3010.yaml +++ b/Documentation/devicetree/bindings/iio/light/dynaimage,al3010.yaml @@ -42,6 +42,6 @@ examples: compatible = "dynaimage,al3010"; reg = <0x1c>; vdd-supply = <&vdd_reg>; - interrupts = <0 99 4>; + interrupts = <99 IRQ_TYPE_LEVEL_HIGH>; }; }; diff --git a/Documentation/devicetree/bindings/iio/light/dynaimage,al3320a.yaml b/Documentation/devicetree/bindings/iio/light/dynaimage,al3320a.yaml index 8249be99cff9..d06db737cd9e 100644 --- a/Documentation/devicetree/bindings/iio/light/dynaimage,al3320a.yaml +++ b/Documentation/devicetree/bindings/iio/light/dynaimage,al3320a.yaml @@ -40,6 +40,6 @@ examples: compatible = "dynaimage,al3320a"; reg = <0x1c>; vdd-supply = <&vdd_reg>; - interrupts = <0 99 4>; + interrupts = <99 IRQ_TYPE_LEVEL_HIGH>; }; }; -- cgit v1.2.3 From 33c52b2d85b7c04386b1dda1428c0160ec29169e Mon Sep 17 00:00:00 2001 From: David Lechner Date: Thu, 10 Jul 2025 17:39:53 -0500 Subject: iio: ABI: alphabetize filter types MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Put the filter types in alphabetical order by name. This makes it easier to find a specific filter type when looking through the documentation. Signed-off-by: David Lechner Reviewed-by: Nuno Sá Link: https://patch.msgid.link/20250710-iio-adc-ad7137-add-filter-support-v1-4-acffe401c4d2@baylibre.com Signed-off-by: Jonathan Cameron --- Documentation/ABI/testing/sysfs-bus-iio | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio index 7e31b8cd49b3..2fb2cea4b192 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio +++ b/Documentation/ABI/testing/sysfs-bus-iio @@ -2281,21 +2281,21 @@ Description: conversion time. Poor noise performance. * "sinc3" - The digital sinc3 filter. Moderate 1st conversion time. Good noise performance. - * "sinc4" - Sinc 4. Excellent noise performance. Long - 1st conversion time. - * "sinc5" - The digital sinc5 filter. Excellent noise - performance - * "sinc4+sinc1" - Sinc4 + averaging by 8. Low 1st conversion - time. - * "sinc3+rej60" - Sinc3 + 60Hz rejection. - * "sinc3+sinc1" - Sinc3 + averaging by 8. Low 1st conversion - time. * "sinc3+pf1" - Sinc3 + device specific Post Filter 1. * "sinc3+pf2" - Sinc3 + device specific Post Filter 2. * "sinc3+pf3" - Sinc3 + device specific Post Filter 3. * "sinc3+pf4" - Sinc3 + device specific Post Filter 4. - * "sinc5+pf1" - Sinc5 + device specific Post Filter 1. + * "sinc3+rej60" - Sinc3 + 60Hz rejection. + * "sinc3+sinc1" - Sinc3 + averaging by 8. Low 1st conversion + time. + * "sinc4" - Sinc 4. Excellent noise performance. Long + 1st conversion time. + * "sinc4+sinc1" - Sinc4 + averaging by 8. Low 1st conversion + time. + * "sinc5" - The digital sinc5 filter. Excellent noise + performance * "sinc5+avg" - Sinc5 + averaging by 4. + * "sinc5+pf1" - Sinc5 + device specific Post Filter 1. * "wideband" - filter with wideband low ripple passband and sharp transition band. -- cgit v1.2.3 From 73c8b83b4aedae07b3c45379fe14be5a2734cbca Mon Sep 17 00:00:00 2001 From: Rodrigo Gobbi Date: Fri, 1 Aug 2025 19:10:00 -0300 Subject: dt-bindings: iio: pressure: add invensense,icp10100 There is no txt file for it, add yaml for invensense,icp10100 which is already used in the driver. Also, document other compatibles for ICP-101xx family and add invensense,icp10100 as a fallback. Acked-by: Jean-Baptiste Maneyrol Signed-off-by: Rodrigo Gobbi Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250801221424.132305-1-rodrigo.gobbi.7@gmail.com Signed-off-by: Jonathan Cameron --- .../bindings/iio/pressure/invensense,icp10100.yaml | 52 ++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/pressure/invensense,icp10100.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/pressure/invensense,icp10100.yaml b/Documentation/devicetree/bindings/iio/pressure/invensense,icp10100.yaml new file mode 100644 index 000000000000..5d980aa04bb3 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/pressure/invensense,icp10100.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/pressure/invensense,icp10100.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: InvenSense ICP-101xx Barometric Pressure Sensors + +maintainers: + - Jean-Baptiste Maneyrol + +description: | + Support for ICP-101xx family: ICP-10100, ICP-10101, ICP-10110, ICP-10111. + Those devices uses a simple I2C communication bus, measuring the pressure + in a ultra-low noise at the lowest power. + Datasheet: https://product.tdk.com/system/files/dam/doc/product/sensor/pressure/capacitive-pressure/data_sheet/ds-000186-icp-101xx.pdf + +properties: + compatible: + oneOf: + - items: + - enum: + - invensense,icp10101 + - invensense,icp10110 + - invensense,icp10111 + - const: invensense,icp10100 + - const: invensense,icp10100 + + reg: + maxItems: 1 + + vdd-supply: true + +required: + - compatible + - reg + - vdd-supply + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + pressure@63 { + compatible = "invensense,icp10101", "invensense,icp10100"; + reg = <0x63>; + vdd-supply = <&vdd_1v8>; + }; + }; +... -- cgit v1.2.3 From fdcb9cb9178ac3066cf907fe5d74ad3c856c2d46 Mon Sep 17 00:00:00 2001 From: Lothar Rubusch Date: Sun, 27 Jul 2025 21:00:13 +0000 Subject: docs: iio: add documentation for adxl345 driver The documentation describes the ADXL345 driver, IIO interface, interface usage and configuration. Signed-off-by: Lothar Rubusch Link: https://patch.msgid.link/20250727210014.27766-7-l.rubusch@gmail.com Signed-off-by: Jonathan Cameron --- Documentation/iio/adxl345.rst | 418 ++++++++++++++++++++++++++++++++++++++++++ Documentation/iio/index.rst | 1 + 2 files changed, 419 insertions(+) create mode 100644 Documentation/iio/adxl345.rst (limited to 'Documentation') diff --git a/Documentation/iio/adxl345.rst b/Documentation/iio/adxl345.rst new file mode 100644 index 000000000000..8ee01b8b87f4 --- /dev/null +++ b/Documentation/iio/adxl345.rst @@ -0,0 +1,418 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=============== +ADXL345 driver +=============== + +This driver supports Analog Device's ADXL345/375 on SPI/I2C bus. + +1. Supported Devices +==================== + +* `ADXL345 `_ +* `ADXL375 `_ + +The ADXL345 is a generic purpose low power, 3-axis accelerometer with selectable +measurement ranges. The ADXL345 supports the ±2 g, ±4 g, ±8 g, and ±16 g ranges. + +2. Device Attributes +==================== + +Each IIO device, has a device folder under ``/sys/bus/iio/devices/iio:deviceX``, +where X is the IIO index of the device. Under these folders reside a set of +device files, depending on the characteristics and features of the hardware +device in questions. These files are consistently generalized and documented in +the IIO ABI documentation. + +The following table shows the ADXL345 related device files, found in the +specific device folder path ``/sys/bus/iio/devices/iio:deviceX``. + ++-------------------------------------------+----------------------------------------------------------+ +| 3-Axis Accelerometer related device files | Description | ++-------------------------------------------+----------------------------------------------------------+ +| in_accel_sampling_frequency | Currently selected sample rate. | ++-------------------------------------------+----------------------------------------------------------+ +| in_accel_sampling_frequency_available | Available sampling frequency configurations. | ++-------------------------------------------+----------------------------------------------------------+ +| in_accel_scale | Scale/range for the accelerometer channels. | ++-------------------------------------------+----------------------------------------------------------+ +| in_accel_scale_available | Available scale ranges for the accelerometer channel. | ++-------------------------------------------+----------------------------------------------------------+ +| in_accel_x_calibbias | Calibration offset for the X-axis accelerometer channel. | ++-------------------------------------------+----------------------------------------------------------+ +| in_accel_x_raw | Raw X-axis accelerometer channel value. | ++-------------------------------------------+----------------------------------------------------------+ +| in_accel_y_calibbias | y-axis acceleration offset correction | ++-------------------------------------------+----------------------------------------------------------+ +| in_accel_y_raw | Raw Y-axis accelerometer channel value. | ++-------------------------------------------+----------------------------------------------------------+ +| in_accel_z_calibbias | Calibration offset for the Z-axis accelerometer channel. | ++-------------------------------------------+----------------------------------------------------------+ +| in_accel_z_raw | Raw Z-axis accelerometer channel value. | ++-------------------------------------------+----------------------------------------------------------+ + +Channel Processed Values +------------------------- + +A channel value can be read from its _raw attribute. The value returned is the +raw value as reported by the devices. To get the processed value of the channel, +apply the following formula: + +.. code-block:: bash + + processed value = (_raw + _offset) * _scale + +Where _offset and _scale are device attributes. If no _offset attribute is +present, simply assume its value is 0. + ++-------------------------------------+---------------------------+ +| Channel type | Measurement unit | ++-------------------------------------+---------------------------+ +| Acceleration on X, Y, and Z axis | Meters per second squared | ++-------------------------------------+---------------------------+ + +Sensor Events +------------- + +Specific IIO events are triggered by their corresponding interrupts. The sensor +driver supports either none or a single active interrupt (INT) line, selectable +from the two available options: INT1 or INT2. The active INT line should be +specified in the device tree. If no INT line is configured, the sensor defaults +to FIFO bypass mode, where event detection is disabled and only X, Y, and Z axis +measurements are available. + +The table below lists the ADXL345-related device files located in the +device-specific path: ``/sys/bus/iio/devices/iio:deviceX/events``. +Note that activity and inactivity detection are DC-coupled by default; +therefore, only the AC-coupled activity and inactivity events are explicitly +listed. + ++---------------------------------------------+---------------------------------------------+ +| Event handle | Description | ++---------------------------------------------+---------------------------------------------+ +| in_accel_gesture_doubletap_en | Enable double tap detection on all axis | ++---------------------------------------------+---------------------------------------------+ +| in_accel_gesture_doubletap_reset_timeout | Double tap window in [us] | ++---------------------------------------------+---------------------------------------------+ +| in_accel_gesture_doubletap_tap2_min_delay | Double tap latent in [us] | ++---------------------------------------------+---------------------------------------------+ +| in_accel_gesture_singletap_timeout | Single tap duration in [us] | ++---------------------------------------------+---------------------------------------------+ +| in_accel_gesture_singletap_value | Single tap threshold value in 62.5/LSB | ++---------------------------------------------+---------------------------------------------+ +| in_accel_mag_falling_period | Inactivity time in seconds | ++---------------------------------------------+---------------------------------------------+ +| in_accel_mag_falling_value | Inactivity threshold value in 62.5/LSB | ++---------------------------------------------+---------------------------------------------+ +| in_accel_mag_adaptive_rising_en | Enable AC coupled activity on X axis | ++---------------------------------------------+---------------------------------------------+ +| in_accel_mag_adaptive_falling_period | AC coupled inactivity time in seconds | ++---------------------------------------------+---------------------------------------------+ +| in_accel_mag_adaptive_falling_value | AC coupled inactivity threshold in 62.5/LSB | ++---------------------------------------------+---------------------------------------------+ +| in_accel_mag_adaptive_rising_value | AC coupled activity threshold in 62.5/LSB | ++---------------------------------------------+---------------------------------------------+ +| in_accel_mag_rising_en | Enable activity detection on X axis | ++---------------------------------------------+---------------------------------------------+ +| in_accel_mag_rising_value | Activity threshold value in 62.5/LSB | ++---------------------------------------------+---------------------------------------------+ +| in_accel_x_gesture_singletap_en | Enable single tap detection on X axis | ++---------------------------------------------+---------------------------------------------+ +| in_accel_x&y&z_mag_falling_en | Enable inactivity detection on all axis | ++---------------------------------------------+---------------------------------------------+ +| in_accel_x&y&z_mag_adaptive_falling_en | Enable AC coupled inactivity on all axis | ++---------------------------------------------+---------------------------------------------+ +| in_accel_y_gesture_singletap_en | Enable single tap detection on Y axis | ++---------------------------------------------+---------------------------------------------+ +| in_accel_z_gesture_singletap_en | Enable single tap detection on Z axis | ++---------------------------------------------+---------------------------------------------+ + +Please refer to the sensor's datasheet for a detailed description of this +functionality. + +Manually setting the **ODR** will cause the driver to estimate default values +for inactivity detection timing, where higher ODR values correspond to longer +default wait times, and lower ODR values to shorter ones. If these defaults do +not meet your application’s needs, you can explicitly configure the inactivity +wait time. Setting this value to 0 will revert to the default behavior. + +When changing the **g range** configuration, the driver attempts to estimate +appropriate activity and inactivity thresholds by scaling the default values +based on the ratio of the previous range to the new one. The resulting threshold +will never be zero and will always fall between 1 and 255, corresponding to up +to 62.5 g/LSB as specified in the datasheet. However, you can override these +estimated thresholds by setting explicit values. + +When **activity** and **inactivity** events are enabled, the driver +automatically manages hysteresis behavior by setting the **link** and +**auto-sleep** bits. The link bit connects the activity and inactivity +functions, so that one follows the other. The auto-sleep function puts the +sensor into sleep mode when inactivity is detected, reducing power consumption +to the sub-12.5 Hz rate. + +In DC-coupled mode, the current acceleration magnitude is directly compared to +the values in the THRESH_ACT and THRESH_INACT registers to determine activity or +inactivity. In contrast, AC-coupled activity detection uses the acceleration +value at the start of detection as a reference point, and subsequent samples are +compared against this reference. While DC-coupling is the default mode-comparing +live values to fixed thresholds-AC-coupling relies on an internal filter +relative to the configured threshold. + +AC and DC coupling modes are configured separately for activity and inactivity +detection, but only one mode can be active at a time for each. For example, if +AC-coupled activity detection is enabled and then DC-coupled mode is set, only +DC-coupled activity detection will be active. In other words, only the most +recent configuration is applied. + +**Single tap** detection can be configured per the datasheet by setting the +threshold and duration parameters. When only single tap detection is enabled, +the single tap interrupt triggers as soon as the acceleration exceeds the +threshold (marking the start of the duration) and then falls below it, provided +the duration limit is not exceeded. If both single tap and double tap detections +are enabled, the single tap interrupt is triggered only after the double tap +event has been either confirmed or dismissed. + +To configure **double tap** detection, you must also set the window and latency +parameters in microseconds (µs). The latency period begins once the single tap +signal drops below the threshold and acts as a waiting time during which any +spikes are ignored for double tap detection. After the latency period ends, the +detection window starts. If the acceleration rises above the threshold and then +falls below it again within this window, a double tap event is triggered upon +the fall below the threshold. + +Double tap event detection is thoroughly explained in the datasheet. After a +single tap event is detected, a double tap event may follow, provided the signal +meets certain criteria. However, double tap detection can be invalidated for +three reasons: + +* If the **suppress bit** is set, any acceleration spike above the tap + threshold during the tap latency period immediately invalidates the double tap + detection. In other words, no spikes are allowed during latency when the + suppress bit is active. + +* The double tap event is invalid if the acceleration is above the threshold at + the start of the double tap window. + +* Double tap detection is also invalidated if the acceleration duration exceeds + the limit set by the duration register. + +For double tap detection, the same duration applies as for single tap: the +acceleration must rise above the threshold and then fall below it within the +specified duration. Note that the suppress bit is typically enabled when double +tap detection is active. + +Usage Examples +-------------- + +Show device name: + +.. code-block:: bash + + root:/sys/bus/iio/devices/iio:device0> cat name + adxl345 + +Show accelerometer channels value: + +.. code-block:: bash + + root:/sys/bus/iio/devices/iio:device0> cat in_accel_x_raw + -1 + root:/sys/bus/iio/devices/iio:device0> cat in_accel_y_raw + 2 + root:/sys/bus/iio/devices/iio:device0> cat in_accel_z_raw + -253 + +Set calibration offset for accelerometer channels: + +.. code-block:: bash + + root:/sys/bus/iio/devices/iio:device0> cat in_accel_x_calibbias + 0 + + root:/sys/bus/iio/devices/iio:device0> echo 50 > in_accel_x_calibbias + root:/sys/bus/iio/devices/iio:device0> cat in_accel_x_calibbias + 50 + +Given the 13-bit full resolution, the available ranges are calculated by the +following formula: + +.. code-block:: bash + + (g * 2 * 9.80665) / (2^(resolution) - 1) * 100; for g := 2|4|8|16 + +Scale range configuration: + +.. code-block:: bash + + root:/sys/bus/iio/devices/iio:device0> cat ./in_accel_scale + 0.478899 + root:/sys/bus/iio/devices/iio:device0> cat ./in_accel_scale_available + 0.478899 0.957798 1.915595 3.831190 + + root:/sys/bus/iio/devices/iio:device0> echo 1.915595 > ./in_accel_scale + root:/sys/bus/iio/devices/iio:device0> cat ./in_accel_scale + 1.915595 + +Set output data rate (ODR): + +.. code-block:: bash + + root:/sys/bus/iio/devices/iio:device0> cat ./in_accel_sampling_frequency + 200.000000 + + root:/sys/bus/iio/devices/iio:device0> cat ./in_accel_sampling_frequency_available + 0.097000 0.195000 0.390000 0.781000 1.562000 3.125000 6.250000 12.500000 25.000000 50.000000 100.000000 200.000000 400.000000 800.000000 1600.000000 3200.000000 + + root:/sys/bus/iio/devices/iio:device0> echo 1.562000 > ./in_accel_sampling_frequency + root:/sys/bus/iio/devices/iio:device0> cat ./in_accel_sampling_frequency + 1.562000 + +Configure one or several events: + +.. code-block:: bash + + root:> cd /sys/bus/iio/devices/iio:device0 + + root:/sys/bus/iio/devices/iio:device0> echo 1 > ./buffer0/in_accel_x_en + root:/sys/bus/iio/devices/iio:device0> echo 1 > ./buffer0/in_accel_y_en + root:/sys/bus/iio/devices/iio:device0> echo 1 > ./buffer0/in_accel_z_en + + root:/sys/bus/iio/devices/iio:device0> echo 1 > ./scan_elements/in_accel_x_en + root:/sys/bus/iio/devices/iio:device0> echo 1 > ./scan_elements/in_accel_y_en + root:/sys/bus/iio/devices/iio:device0> echo 1 > ./scan_elements/in_accel_z_en + + root:/sys/bus/iio/devices/iio:device0> echo 14 > ./in_accel_x_calibbias + root:/sys/bus/iio/devices/iio:device0> echo 2 > ./in_accel_y_calibbias + root:/sys/bus/iio/devices/iio:device0> echo -250 > ./in_accel_z_calibbias + + root:/sys/bus/iio/devices/iio:device0> echo 24 > ./buffer0/length + + ## AC coupled activity, threshold [62.5/LSB] + root:/sys/bus/iio/devices/iio:device0> echo 6 > ./events/in_accel_mag_adaptive_rising_value + + ## AC coupled inactivity, threshold, [62.5/LSB] + root:/sys/bus/iio/devices/iio:device0> echo 4 > ./events/in_accel_mag_adaptive_falling_value + + ## AC coupled inactivity, time [s] + root:/sys/bus/iio/devices/iio:device0> echo 3 > ./events/in_accel_mag_adaptive_falling_period + + ## singletap, threshold + root:/sys/bus/iio/devices/iio:device0> echo 35 > ./events/in_accel_gesture_singletap_value + + ## singletap, duration [us] + root:/sys/bus/iio/devices/iio:device0> echo 0.001875 > ./events/in_accel_gesture_singletap_timeout + + ## doubletap, window [us] + root:/sys/bus/iio/devices/iio:device0> echo 0.025 > ./events/in_accel_gesture_doubletap_reset_timeout + + ## doubletap, latent [us] + root:/sys/bus/iio/devices/iio:device0> echo 0.025 > ./events/in_accel_gesture_doubletap_tap2_min_delay + + ## AC coupled activity, enable + root:/sys/bus/iio/devices/iio:device0> echo 1 > ./events/in_accel_mag_adaptive_rising_en + + ## AC coupled inactivity, enable + root:/sys/bus/iio/devices/iio:device0> echo 1 > ./events/in_accel_x\&y\&z_mag_adaptive_falling_en + + ## singletap, enable + root:/sys/bus/iio/devices/iio:device0> echo 1 > ./events/in_accel_x_gesture_singletap_en + root:/sys/bus/iio/devices/iio:device0> echo 1 > ./events/in_accel_y_gesture_singletap_en + root:/sys/bus/iio/devices/iio:device0> echo 1 > ./events/in_accel_z_gesture_singletap_en + + ## doubletap, enable + root:/sys/bus/iio/devices/iio:device0> echo 1 > ./events/in_accel_gesture_doubletap_en + +Verify incoming events: + +.. code-block:: bash + + root:# iio_event_monitor adxl345 + Found IIO device with name adxl345 with device number 0 + Event: time: 1739063415957073383, type: accel(z), channel: 0, evtype: mag, direction: rising + Event: time: 1739063415963770218, type: accel(z), channel: 0, evtype: mag, direction: rising + Event: time: 1739063416002563061, type: accel(z), channel: 0, evtype: gesture, direction: singletap + Event: time: 1739063426271128739, type: accel(x&y&z), channel: 0, evtype: mag, direction: falling + Event: time: 1739063436539080713, type: accel(x&y&z), channel: 0, evtype: mag, direction: falling + Event: time: 1739063438357970381, type: accel(z), channel: 0, evtype: mag, direction: rising + Event: time: 1739063446726161586, type: accel(z), channel: 0, evtype: mag, direction: rising + Event: time: 1739063446727892670, type: accel(z), channel: 0, evtype: mag, direction: rising + Event: time: 1739063446743019768, type: accel(z), channel: 0, evtype: mag, direction: rising + Event: time: 1739063446744650696, type: accel(z), channel: 0, evtype: mag, direction: rising + Event: time: 1739063446763559386, type: accel(z), channel: 0, evtype: gesture, direction: singletap + Event: time: 1739063448818126480, type: accel(x&y&z), channel: 0, evtype: mag, direction: falling + ... + +Activity and inactivity belong together and indicate state changes as follows + +.. code-block:: bash + + root:# iio_event_monitor adxl345 + Found IIO device with name adxl345 with device number 0 + Event: time: 1744648001133946293, type: accel(x), channel: 0, evtype: mag, direction: rising + + Event: time: 1744648057724775499, type: accel(x&y&z), channel: 0, evtype: mag, direction: falling + ... + +3. Device Buffers +================= + +This driver supports IIO buffers. + +All devices support retrieving the raw acceleration and temperature measurements +using buffers. + +Usage examples +-------------- + +Select channels for buffer read: + +.. code-block:: bash + + root:/sys/bus/iio/devices/iio:device0> echo 1 > scan_elements/in_accel_x_en + root:/sys/bus/iio/devices/iio:device0> echo 1 > scan_elements/in_accel_y_en + root:/sys/bus/iio/devices/iio:device0> echo 1 > scan_elements/in_accel_z_en + +Set the number of samples to be stored in the buffer: + +.. code-block:: bash + + root:/sys/bus/iio/devices/iio:device0> echo 10 > buffer/length + +Enable buffer readings: + +.. code-block:: bash + + root:/sys/bus/iio/devices/iio:device0> echo 1 > buffer/enable + +Obtain buffered data: + +.. code-block:: bash + + root:> iio_readdev -b 16 -s 1024 adxl345 | hexdump -d + WARNING: High-speed mode not enabled + 0000000 00003 00012 00013 00005 00010 00011 00005 00011 + 0000010 00013 00004 00012 00011 00003 00012 00014 00007 + 0000020 00011 00013 00004 00013 00014 00003 00012 00013 + 0000030 00004 00012 00013 00005 00011 00011 00005 00012 + 0000040 00014 00005 00012 00014 00004 00010 00012 00004 + 0000050 00013 00011 00003 00011 00012 00005 00011 00013 + 0000060 00003 00012 00012 00003 00012 00012 00004 00012 + 0000070 00012 00003 00013 00013 00003 00013 00012 00005 + 0000080 00012 00013 00003 00011 00012 00005 00012 00013 + 0000090 00003 00013 00011 00005 00013 00014 00003 00012 + 00000a0 00012 00003 00012 00013 00004 00012 00015 00004 + 00000b0 00014 00011 00003 00014 00013 00004 00012 00011 + 00000c0 00004 00012 00013 00004 00014 00011 00004 00013 + 00000d0 00012 00002 00014 00012 00005 00012 00013 00005 + 00000e0 00013 00013 00003 00013 00013 00005 00012 00013 + 00000f0 00004 00014 00015 00005 00012 00011 00005 00012 + ... + +See ``Documentation/iio/iio_devbuf.rst`` for more information about how buffered +data is structured. + +4. IIO Interfacing Tools +======================== + +See ``Documentation/iio/iio_tools.rst`` for the description of the available IIO +interfacing tools. diff --git a/Documentation/iio/index.rst b/Documentation/iio/index.rst index c106402a91f7..9d34d9c89c43 100644 --- a/Documentation/iio/index.rst +++ b/Documentation/iio/index.rst @@ -33,6 +33,7 @@ Industrial I/O Kernel Drivers adis16550 adxl313 adxl380 + adxl345 bno055 ep93xx_adc opt4060 -- cgit v1.2.3 From ee6ef19778fd7604ddf6c3a3e307c0f36748f70c Mon Sep 17 00:00:00 2001 From: Lothar Rubusch Date: Sun, 27 Jul 2025 21:00:14 +0000 Subject: docs: iio: describe inactivity and free-fall detection on the ADXL345 Describe the inactivity detection additionally using the free-fall register. Due to the controversial discussions on the mailing list, this section of the documentation will be committed separately to allow for a more focused and detailed elaboration of the topic. Signed-off-by: Lothar Rubusch Link: https://patch.msgid.link/20250727210014.27766-8-l.rubusch@gmail.com Signed-off-by: Jonathan Cameron --- Documentation/iio/adxl345.rst | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'Documentation') diff --git a/Documentation/iio/adxl345.rst b/Documentation/iio/adxl345.rst index 8ee01b8b87f4..4bd038cb4a37 100644 --- a/Documentation/iio/adxl345.rst +++ b/Documentation/iio/adxl345.rst @@ -150,6 +150,30 @@ functions, so that one follows the other. The auto-sleep function puts the sensor into sleep mode when inactivity is detected, reducing power consumption to the sub-12.5 Hz rate. +The inactivity time is configurable between 1 and 255 seconds. In addition to +inactivity detection, the sensor also supports free-fall detection, which, from +the IIO perspective, is treated as a fall in magnitude across all axes. In +sensor terms, free-fall is defined using an inactivity period ranging from 0.000 +to 1.000 seconds. + +The driver behaves as follows: +* If the configured inactivity period is 1 second or more, the driver uses the + sensor's inactivity register. This allows the event to be linked with + activity detection, use auto-sleep, and be either AC- or DC-coupled. + +* If the inactivity period is less than 1 second, the event is treated as plain + inactivity or free-fall detection. In this case, auto-sleep and coupling + (AC/DC) are not applied. + +* If an inactivity time of 0 seconds is configured, the driver selects a + heuristically determined default period (greater than 1 second) to optimize + power consumption. This also uses the inactivity register. + +Note: According to the datasheet, the optimal ODR for detecting activity, +or inactivity (or when operating with the free-fall register) should fall within +the range of 12.5 Hz to 400 Hz. The recommended free-fall threshold is between +300 mg and 600 mg (register values 0x05 to 0x09). + In DC-coupled mode, the current acceleration magnitude is directly compared to the values in the THRESH_ACT and THRESH_INACT registers to determine activity or inactivity. In contrast, AC-coupled activity detection uses the acceleration -- cgit v1.2.3 From 7e2d03d00475b1a560e7e8f166b7534f4ade8fff Mon Sep 17 00:00:00 2001 From: Andreas Klinger Date: Mon, 28 Jul 2025 09:54:44 +0200 Subject: dt-bindings: iio: light: veml6046x00: add color sensor Add a new compatible for Vishay high accuracy RGBIR color sensor veml6046x00. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Andreas Klinger Link: https://patch.msgid.link/20250728075447.338725-2-ak@it-klinger.de Signed-off-by: Jonathan Cameron --- .../bindings/iio/light/vishay,veml6046x00.yaml | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/light/vishay,veml6046x00.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/light/vishay,veml6046x00.yaml b/Documentation/devicetree/bindings/iio/light/vishay,veml6046x00.yaml new file mode 100644 index 000000000000..112d448ff0bf --- /dev/null +++ b/Documentation/devicetree/bindings/iio/light/vishay,veml6046x00.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/vishay,veml6046x00.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Vishay VEML6046X00 High accuracy RGBIR color sensor + +maintainers: + - Andreas Klinger + +description: + VEML6046X00 datasheet at https://www.vishay.com/docs/80173/veml6046x00.pdf + +properties: + compatible: + enum: + - vishay,veml6046x00 + + reg: + maxItems: 1 + + vdd-supply: true + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - vdd-supply + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + color-sensor@29 { + compatible = "vishay,veml6046x00"; + reg = <0x29>; + vdd-supply = <&vdd_reg>; + interrupt-parent = <&gpio2>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + }; + }; +... -- cgit v1.2.3 From c1d7b8fe67e6b05a4a521d00ddc015811cb29b61 Mon Sep 17 00:00:00 2001 From: Erick Setubal Bacurau Date: Fri, 15 Aug 2025 09:00:01 +0200 Subject: docs: iio: bno055: Correct wording in driver documentation Fix typos and improve wording in the bno055 driver documentation. Signed-off-by: Erick Setubal Bacurau Reviewed-by: Bagas Sanjaya Link: https://patch.msgid.link/20250815070001.55185-1-erick.setubal@gmx.de Signed-off-by: Jonathan Cameron --- Documentation/iio/bno055.rst | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/iio/bno055.rst b/Documentation/iio/bno055.rst index f1111ff3fe2e..c6042586b2ae 100644 --- a/Documentation/iio/bno055.rst +++ b/Documentation/iio/bno055.rst @@ -9,11 +9,11 @@ BNO055 driver This driver supports Bosch BNO055 IMUs (on both serial and I2C busses). -Accelerometer, magnetometer and gyroscope measures are always provided. +Accelerometer, magnetometer and gyroscope measurements are always available. When "fusion_enable" sysfs attribute is set to 1, orientation (both Euler angles and quaternion), linear velocity and gravity vector are also provided, but some sensor settings (e.g. low pass filtering and range) -became locked (the IMU firmware controls them). +become locked (the IMU firmware controls them). This driver supports also IIO buffers. @@ -24,14 +24,14 @@ The IMU continuously performs an autocalibration procedure if (and only if) operating in fusion mode. The magnetometer autocalibration can however be disabled by writing 0 in the sysfs in_magn_calibration_fast_enable attribute. -The driver provides access to autocalibration flags (i.e. you can known if -the IMU has successfully autocalibrated) and to the calibration data blob. +The driver provides access to autocalibration flags (i.e. you can determine +if the IMU has successfully autocalibrated) and to the calibration data blob. The user can save this blob in a firmware file (i.e. in /lib/firmware) that the driver looks for at probe time. If found, then the IMU is initialized with this calibration data. This saves the user from performing the -calibration procedure every time (which consist of moving the IMU in -various way). +calibration procedure every time (which consists of moving the IMU in +various ways). The driver looks for calibration data file using two different names: first a file whose name is suffixed with the IMU unique ID (exposed in sysfs as -- cgit v1.2.3 From 260bb98ce3df870ef3d73361f6918463bc88a5b6 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 11 Aug 2025 11:51:50 +0300 Subject: dt-bindings: iio: adc: ad7476: Drop redundant prop: true The ad7476 supports a few variants with different power-supplies and control GPIOs. The binding first unconditionally introduces all the properties, and later sets them 'true' or 'false' based on the combatible. The 'true' seems to be implied by the initial property introduction so the 'true' -branches in later conditional handling (based on the compatible) can be omitted. Drop the redundant true -branches. Signed-off-by: Matti Vaittinen Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/bee66444bf628ba9a34a02738a1842e2abc14290.1754901948.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron --- .../devicetree/bindings/iio/adc/adi,ad7476.yaml | 54 ++++++++++------------ 1 file changed, 24 insertions(+), 30 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml index d0cb32f136e5..db2a9662bd94 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml @@ -106,19 +106,17 @@ allOf: - vcc-supply # Devices with a vref - if: - properties: - compatible: - contains: - enum: - - adi,ad7091r - - adi,ad7273 - - adi,ad7274 - - adi,ad7475 - - lltc,ltc2314-14 + not: + properties: + compatible: + contains: + enum: + - adi,ad7091r + - adi,ad7273 + - adi,ad7274 + - adi,ad7475 + - lltc,ltc2314-14 then: - properties: - vref-supply: true - else: properties: vref-supply: false # Devices with a vref where it is not optional @@ -135,29 +133,25 @@ allOf: required: - vref-supply - if: - properties: - compatible: - contains: - enum: - - adi,ad7475 - - adi,ad7495 + not: + properties: + compatible: + contains: + enum: + - adi,ad7475 + - adi,ad7495 then: - properties: - vdrive-supply: true - else: properties: vdrive-supply: false - if: - properties: - compatible: - contains: - enum: - - adi,ad7091 - - adi,ad7091r + not: + properties: + compatible: + contains: + enum: + - adi,ad7091 + - adi,ad7091r then: - properties: - adi,conversion-start-gpios: true - else: properties: adi,conversion-start-gpios: false -- cgit v1.2.3 From 261b90763fc4d51637abd44ae248a6183fc2de4d Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 11 Aug 2025 11:52:04 +0300 Subject: dt-bindings: iio: adc: ad7476: Add ROHM bd79105 The ROHM BD79105 is a simple, 16-bit, 1-channel ADC with a 'CONVSTART' pin used to start the ADC conversion. Other than the 'CONVSTART', there are 3 supply pins (one used as a reference), analog inputs, ground and communication pins. It's worth noting that the pin somewhat confusingly labeled as 'DIN', is a pin which should be used as a chip-select. The IC does not have any writable registers. The device is designed so that the output pin can, in addition to outputting the data, be used as a 'data-ready'-IRQ. There are cases where the IRQ can't be used (because it is delivered via SPI data-line). Hence, some systems may use a GPIO for polling the data readiness. Add a compatible for the bd79105 and add the data-ready GPIO to the binding. Signed-off-by: Matti Vaittinen Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/3f70f68665225be3091f8a0412e74037b6a2a88e.1754901948.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron --- .../devicetree/bindings/iio/adc/adi,ad7476.yaml | 52 ++++++++++++++++++++++ 1 file changed, 52 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml index db2a9662bd94..55880191c511 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml @@ -41,6 +41,7 @@ properties: - adi,ad7910 - adi,ad7920 - adi,ad7940 + - rohm,bd79105 - ti,adc081s - ti,adc101s - ti,adc121s @@ -55,6 +56,11 @@ properties: reg: maxItems: 1 + interrupts: + description: + The data-ready interrupt. Provided via DOUT pin. + maxItems: 1 + vcc-supply: description: Main powersupply voltage for the chips, sometimes referred to as VDD on @@ -75,6 +81,10 @@ properties: description: A GPIO used to trigger the start of a conversion maxItems: 1 + rdy-gpios: + description: A GPIO for detecting the data-ready. + maxItems: 1 + required: - compatible - reg @@ -82,6 +92,20 @@ required: allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# +# Devices with an IRQ + - if: + properties: + compatible: + contains: + enum: + - rohm,bd79105 + then: + properties: + interrupts: true + else: + properties: + interrupts: false + # Devices where reference is vcc - if: properties: @@ -116,6 +140,7 @@ allOf: - adi,ad7274 - adi,ad7475 - lltc,ltc2314-14 + - rohm,bd79105 then: properties: vref-supply: false @@ -129,6 +154,7 @@ allOf: - adi,ad7274 - adi,ad7475 - lltc,ltc2314-14 + - rohm,bd79105 then: required: - vref-supply @@ -140,9 +166,23 @@ allOf: enum: - adi,ad7475 - adi,ad7495 + - rohm,bd79105 then: properties: vdrive-supply: false + + # Devices which support polling the data-ready via GPIO + - if: + not: + properties: + compatible: + contains: + enum: + - rohm,bd79105 + then: + properties: + rdy-gpios: false + - if: not: properties: @@ -151,10 +191,22 @@ allOf: enum: - adi,ad7091 - adi,ad7091r + - rohm,bd79105 then: properties: adi,conversion-start-gpios: false + # Devices with a convstart GPIO where it is not optional + - if: + properties: + compatible: + contains: + enum: + - rohm,bd79105 + then: + required: + - adi,conversion-start-gpios + unevaluatedProperties: false examples: -- cgit v1.2.3 From 26f0675fba4360516ee717ecc5ea099fe6819f1b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 12 Aug 2025 15:24:46 +0200 Subject: dt-bindings: iio: Replace bouncing Analog emails MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Emails to stefan.popa@analog.com and alexandru.tachici@analog.com bounce permanently: Remote Server returned '550 5.1.10 RESOLVER.ADR.RecipientNotFound; Recipient not found by SMTP address lookup' so replace them with Marcelo Schmitt and Nuno Sá (listed alphabetically by first name) from Analog where appropriate. Acked-by: Rob Herring (Arm) Signed-off-by: Krzysztof Kozlowski Acked-by: Nuno Sá Acked-by: Marcelo Schmitt Link: https://patch.msgid.link/20250812132445.75398-2-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml | 3 ++- Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml | 3 ++- Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml | 3 ++- Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml | 1 - Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml | 3 ++- Documentation/devicetree/bindings/iio/frequency/adf4371.yaml | 3 ++- Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml | 3 ++- 7 files changed, 12 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml index 3dc973b98f81..a92e153705f3 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml @@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: ADIS16240 Programmable Impact Sensor and Recorder driver maintainers: - - Alexandru Tachici + - Marcelo Schmitt + - Nuno Sá description: | ADIS16240 Programmable Impact Sensor and Recorder driver that supports diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml index 88aa67bf2280..0ba0df46c3a9 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml @@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices ADXL372 3-Axis, +/-(200g) Digital Accelerometer maintainers: - - Stefan Popa + - Marcelo Schmitt + - Nuno Sá description: | Analog Devices ADXL372 3-Axis, +/-(200g) Digital Accelerometer that supports diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml index 7146a654ae38..4dd5395730c1 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml @@ -8,7 +8,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices AD7124 ADC device driver maintainers: - - Stefan Popa + - Marcelo Schmitt + - Nuno Sá description: | Bindings for the Analog Devices AD7124 ADC device. Datasheet can be diff --git a/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml b/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml index 5207c919abe0..eac48166fe72 100644 --- a/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml +++ b/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml @@ -9,7 +9,6 @@ title: Linear Technology / Analog Devices LTC2496 ADC maintainers: - Lars-Peter Clausen - Michael Hennerich - - Stefan Popa properties: compatible: diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml index 82b0eed6a7b7..091cc93f1f90 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml @@ -8,7 +8,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices AD5770R DAC device driver maintainers: - - Alexandru Tachici + - Marcelo Schmitt + - Nuno Sá description: | Bindings for the Analog Devices AD5770R current DAC device. Datasheet can be diff --git a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml index 53d607441612..2e1ff77fd1de 100644 --- a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml +++ b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml @@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices ADF4371/ADF4372 Wideband Synthesizers maintainers: - - Popa Stefan + - Marcelo Schmitt + - Nuno Sá description: | Analog Devices ADF4371/ADF4372 SPI Wideband Synthesizers diff --git a/Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml b/Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml index 7a1a74fec281..43ecf46e9c20 100644 --- a/Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml +++ b/Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml @@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices ADIS16480 and similar IMUs maintainers: - - Alexandru Tachici + - Marcelo Schmitt + - Nuno Sá properties: compatible: -- cgit v1.2.3 From 0caebd1658bbb3796bec4e3449876742d29701ab Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Fri, 25 Jul 2025 08:01:51 +0200 Subject: dt-bindings: mmc: fsl,esdhc: Add explicit reference to mmc-controller-common Even though it is referenced by mmc/mmc-controller.yaml it still raises the warning: esdhc@1560000 (fsl,ls1021a-esdhc): Unevaluated properties are not allowed ('bus-width' was unexpected) Adding an explicit reference fixes this. Signed-off-by: Alexander Stein Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250725060152.262094-1-alexander.stein@ew.tq-group.com Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml b/Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml index 62087cf920df..f45e592901e2 100644 --- a/Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml +++ b/Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml @@ -90,6 +90,7 @@ required: allOf: - $ref: sdhci-common.yaml# + - $ref: mmc-controller-common.yaml# unevaluatedProperties: false -- cgit v1.2.3 From cefbc3109932d7a34040b4d87746af1d36567358 Mon Sep 17 00:00:00 2001 From: Raphael Gallais-Pou Date: Sun, 13 Jul 2025 15:27:28 +0200 Subject: dt-bindings: arm: sti: drop B2120 board support B2120 boards are internal boards which never were commercialised. Remove them from bindings. Signed-off-by: Raphael Gallais-Pou Acked-by: Krzysztof Kozlowski Signed-off-by: Patrice Chotard --- Documentation/devicetree/bindings/arm/sti.yaml | 4 ---- 1 file changed, 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/sti.yaml b/Documentation/devicetree/bindings/arm/sti.yaml index 842def3e3f2b..177358895fe1 100644 --- a/Documentation/devicetree/bindings/arm/sti.yaml +++ b/Documentation/devicetree/bindings/arm/sti.yaml @@ -14,12 +14,8 @@ properties: const: '/' compatible: oneOf: - - items: - - const: st,stih407-b2120 - - const: st,stih407 - items: - enum: - - st,stih410-b2120 - st,stih410-b2260 - const: st,stih410 - items: -- cgit v1.2.3 From 65fe705367efc3e06ccfa2a3a107081d8e69f70e Mon Sep 17 00:00:00 2001 From: Julien Massot Date: Fri, 1 Aug 2025 13:18:09 +0200 Subject: dt-bindings: pinctrl: mediatek: mt8183: Allow gpio-line-names Add support for the 'gpio-line-names' property in the MT8183 pinctrl binding. This allows naming the GPIOs, which is already done in several device trees (e.g. mt8183-kukui-jacuzzi.dtsi, mt8183-kukui-kakadu.dtsi, mt8183-kukui-krane.dtsi), but was previously generating DT schema warnings. Signed-off-by: Julien Massot Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/20250801-mtk-dtb-warnings-v1-7-6ba4e432427b@collabora.com Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml index 464879274cae..3db2438fadc7 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml @@ -48,6 +48,8 @@ properties: description: GPIO valid number range. + gpio-line-names: true + interrupt-controller: true interrupts: -- cgit v1.2.3 From fce343d8546e47053b47c30f23dd0ac4729b2f66 Mon Sep 17 00:00:00 2001 From: Iris Shi <0.0@owo.li> Date: Mon, 18 Aug 2025 17:47:48 +0800 Subject: Documentation/sphinx: Fix typo in automarkup.py "whan" -> "when" Signed-off-by: Iris Shi <0.0@owo.li> Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/8e5ddb7d-8faf-314f-b1b1-2d15d6900862@owo.li --- Documentation/sphinx/automarkup.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/automarkup.py b/Documentation/sphinx/automarkup.py index 563033f764bb..1d9dada40a74 100644 --- a/Documentation/sphinx/automarkup.py +++ b/Documentation/sphinx/automarkup.py @@ -244,7 +244,7 @@ def add_and_resolve_xref(app, docname, domain, reftype, target, contnode=None): return contnode # -# Variant of markup_abi_ref() that warns whan a reference is not found +# Variant of markup_abi_ref() that warns when a reference is not found # def markup_abi_file_ref(docname, app, match): return markup_abi_ref(docname, app, match, warning=True) -- cgit v1.2.3 From ed14c74ddf4932a2505afae30dac7639c96bcb0c Mon Sep 17 00:00:00 2001 From: "Nikola Z. Ivanov" Date: Sat, 16 Aug 2025 22:00:28 +0300 Subject: docs: Replace dead links to spectre side channel white papers The papers are published by Intel, AMD and MIPS. Signed-off-by: Nikola Z. Ivanov Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250816190028.55573-1-zlatistiv@gmail.com --- Documentation/admin-guide/hw-vuln/spectre.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/hw-vuln/spectre.rst b/Documentation/admin-guide/hw-vuln/spectre.rst index 132e0bc6007e..991f12adef8d 100644 --- a/Documentation/admin-guide/hw-vuln/spectre.rst +++ b/Documentation/admin-guide/hw-vuln/spectre.rst @@ -664,7 +664,7 @@ Intel white papers: .. _spec_ref1: -[1] `Intel analysis of speculative execution side channels `_. +[1] `Intel analysis of speculative execution side channels `_. .. _spec_ref2: @@ -682,7 +682,7 @@ AMD white papers: .. _spec_ref5: -[5] `AMD64 technology indirect branch control extension `_. +[5] `AMD64 technology indirect branch control extension `_. .. _spec_ref6: @@ -708,7 +708,7 @@ MIPS white paper: .. _spec_ref10: -[10] `MIPS: response on speculative execution and side channel vulnerabilities `_. +[10] `MIPS: response on speculative execution and side channel vulnerabilities `_. Academic papers: -- cgit v1.2.3 From 6865cb19082140a07da356f57d52168aec38340c Mon Sep 17 00:00:00 2001 From: Vivek Yadav Date: Sat, 16 Aug 2025 01:24:52 -0700 Subject: docs: remove a duplicated word from kernel-parameters.txt Fix kernel-doc warning in kernel-parameters.txt WARNING: Possible repeated word: 'is' Signed-off-by: Vivek Yadav Acked-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250816082452.219009-1-vivekyadav1207731111@gmail.com --- Documentation/admin-guide/kernel-parameters.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 747a55abf494..302145870f1c 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -7506,7 +7506,7 @@ Set a trigger on top of a specific event, with an optional filter. - The format is is "trace_trigger=.[ if ],..." + The format is "trace_trigger=.[ if ],..." Where more than one trigger may be specified that are comma deliminated. For example: -- cgit v1.2.3 From 6cf5f13ef3f1c032b48fddd4f0f9108236c7762a Mon Sep 17 00:00:00 2001 From: Ranganath V N Date: Fri, 15 Aug 2025 00:13:03 +0530 Subject: Documentation: Fix driver-api typos Corrected a few spelling mistakes functionalty ==> functionality in Documentation/driver-api/cxl/devices/device-types.rst adjascent ==> adjacent in Documentation/driver-api/cxl/platform/example-configurations/one-dev-per-hb.rst succeessful ==> successful in Documentation/driver-api/thermal/exynos_thermal_emulation.rst Signed-off-by: Ranganath V N Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250814184304.20448-1-vnranganath.20@gmail.com --- Documentation/driver-api/cxl/devices/device-types.rst | 2 +- .../cxl/platform/example-configurations/one-dev-per-hb.rst | 2 +- .../driver-api/thermal/exynos_thermal_emulation.rst | 14 +++++++------- 3 files changed, 9 insertions(+), 9 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/devices/device-types.rst b/Documentation/driver-api/cxl/devices/device-types.rst index 923f5d89bc04..7f69dfa4509b 100644 --- a/Documentation/driver-api/cxl/devices/device-types.rst +++ b/Documentation/driver-api/cxl/devices/device-types.rst @@ -22,7 +22,7 @@ The basic interaction protocol, similar to PCIe configuration mechanisms. Typically used for initialization, configuration, and I/O access for anything other than memory (CXL.mem) or cache (CXL.cache) operations. -The Linux CXL driver exposes access to .io functionalty via the various sysfs +The Linux CXL driver exposes access to .io functionality via the various sysfs interfaces and /dev/cxl/ devices (which exposes direct access to device mailboxes). diff --git a/Documentation/driver-api/cxl/platform/example-configurations/one-dev-per-hb.rst b/Documentation/driver-api/cxl/platform/example-configurations/one-dev-per-hb.rst index aebda0eb3e17..a4c3fb51ea7d 100644 --- a/Documentation/driver-api/cxl/platform/example-configurations/one-dev-per-hb.rst +++ b/Documentation/driver-api/cxl/platform/example-configurations/one-dev-per-hb.rst @@ -10,7 +10,7 @@ has a single CXL memory expander with a 4GB of memory. Things to note: * Cross-Bridge interleave is not being used. -* The expanders are in two separate but adjascent memory regions. +* The expanders are in two separate but adjacent memory regions. * This CEDT/SRAT describes one node per device * The expanders have the same performance and will be in the same memory tier. diff --git a/Documentation/driver-api/thermal/exynos_thermal_emulation.rst b/Documentation/driver-api/thermal/exynos_thermal_emulation.rst index c21d10838bc5..c679502f01c7 100644 --- a/Documentation/driver-api/thermal/exynos_thermal_emulation.rst +++ b/Documentation/driver-api/thermal/exynos_thermal_emulation.rst @@ -28,13 +28,13 @@ changed into it. delay of changing temperature. However, this node only uses same delay of real sensing time, 938us.) -Exynos emulation mode requires synchronous of value changing and -enabling. It means when you want to update the any value of delay or -next temperature, then you have to enable emulation mode at the same -time. (Or you have to keep the mode enabling.) If you don't, it fails to -change the value to updated one and just use last succeessful value -repeatedly. That's why this node gives users the right to change -termerpature only. Just one interface makes it more simply to use. +Exynos emulation mode requires that value changes and enabling are performed +synchronously. This means that when you want to update any value, such as the +delay or the next temperature, you must enable emulation mode at the same +time (or keep the mode enabled). If you do not, the value will fail to update +and the last successful value will continue to be used. For this reason, +this node only allows users to change the temperature. Providing a single +interface makes it simpler to use. Disabling emulation mode only requires writing value 0 to sysfs node. -- cgit v1.2.3 From 359ad700eb8b563461819b6227b021b280e37e3e Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Thu, 14 Aug 2025 08:20:45 +0700 Subject: Documentation: ktap: Correct "its" spelling Fix possessive adjective "its" spelling. Signed-off-by: Bagas Sanjaya Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250814012046.21235-2-bagasdotme@gmail.com --- Documentation/dev-tools/ktap.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/dev-tools/ktap.rst b/Documentation/dev-tools/ktap.rst index 414c105b10a9..54fac3d3bf7b 100644 --- a/Documentation/dev-tools/ktap.rst +++ b/Documentation/dev-tools/ktap.rst @@ -5,7 +5,7 @@ The Kernel Test Anything Protocol (KTAP), version 1 =================================================== TAP, or the Test Anything Protocol is a format for specifying test results used -by a number of projects. It's website and specification are found at this `link +by a number of projects. Its website and specification are found at this `link `_. The Linux Kernel largely uses TAP output for test results. However, Kernel testing frameworks have special needs for test results which don't align with the original TAP specification. Thus, a "Kernel TAP" -- cgit v1.2.3 From fea71fe1f060a722f7cb26aeca27d36d9370916d Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Thu, 14 Aug 2025 08:20:46 +0700 Subject: Documentation: ktap: Separate first bullet list items The first bullet list items are shown in htmldocs output as combined with previous paragraph due to missing blank line separator. Add it. Signed-off-by: Bagas Sanjaya Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250814012046.21235-3-bagasdotme@gmail.com --- Documentation/dev-tools/ktap.rst | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/dev-tools/ktap.rst b/Documentation/dev-tools/ktap.rst index 54fac3d3bf7b..a9810bed5fd4 100644 --- a/Documentation/dev-tools/ktap.rst +++ b/Documentation/dev-tools/ktap.rst @@ -20,6 +20,7 @@ machine-readable, whereas the diagnostic data is unstructured and is there to aid human debugging. KTAP output is built from four different types of lines: + - Version lines - Plan lines - Test case result lines @@ -38,6 +39,7 @@ All KTAP-formatted results begin with a "version line" which specifies which version of the (K)TAP standard the result is compliant with. For example: + - "KTAP version 1" - "TAP version 13" - "TAP version 14" @@ -276,6 +278,7 @@ Example KTAP output This output defines the following hierarchy: A single test called "main_test", which fails, and has three subtests: + - "example_test_1", which passes, and has one subtest: - "test_1", which passes, and outputs the diagnostic message "test_1: initializing test_1" -- cgit v1.2.3 From 126750523eac0ea79df672d9771eb483f7497b16 Mon Sep 17 00:00:00 2001 From: Mohammad Rafi Shaik Date: Fri, 15 Aug 2025 22:53:52 +0530 Subject: ASoC: dt-bindings: qcom,wsa8830: Add reset-gpios for shared line On Qualcomm platforms such as QCS6490-RB3Gen2, the WSA883x speaker amplifiers share the SD_N GPIO line between two speakers, thus requires coordinated control when asserting the GPIO. Linux supports shared GPIO handling via the "reset-gpios" property, which can be used to specify either the powerdown or reset GPIOs. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Mohammad Rafi Shaik Link: https://patch.msgid.link/20250815172353.2430981-2-mohammad.rafi.shaik@oss.qualcomm.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/sound/qcom,wsa883x.yaml | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/qcom,wsa883x.yaml b/Documentation/devicetree/bindings/sound/qcom,wsa883x.yaml index 14d312f9c345..098f1df62c8c 100644 --- a/Documentation/devicetree/bindings/sound/qcom,wsa883x.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,wsa883x.yaml @@ -29,6 +29,10 @@ properties: description: GPIO spec for Powerdown/Shutdown line to use (pin SD_N) maxItems: 1 + reset-gpios: + description: Powerdown/Shutdown line to use (pin SD_N) + maxItems: 1 + vdd-supply: description: VDD Supply for the Codec @@ -50,10 +54,15 @@ required: - compatible - reg - vdd-supply - - powerdown-gpios - "#thermal-sensor-cells" - "#sound-dai-cells" +oneOf: + - required: + - powerdown-gpios + - required: + - reset-gpios + unevaluatedProperties: false examples: -- cgit v1.2.3 From c676a536f6b5d4c423ff66a2aa27b6c4141e4895 Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Wed, 13 Aug 2025 15:04:57 -0500 Subject: Documentation: Fix PCI typos Fix typos. Signed-off-by: Bjorn Helgaas Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250813200526.290420-2-helgaas@kernel.org --- Documentation/PCI/endpoint/pci-endpoint-cfs.rst | 4 ++-- Documentation/PCI/endpoint/pci-endpoint.rst | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/PCI/endpoint/pci-endpoint-cfs.rst b/Documentation/PCI/endpoint/pci-endpoint-cfs.rst index fb73345cfb8a..e69c2872ce3b 100644 --- a/Documentation/PCI/endpoint/pci-endpoint-cfs.rst +++ b/Documentation/PCI/endpoint/pci-endpoint-cfs.rst @@ -86,7 +86,7 @@ The directory can have a list of symbolic links be created by the user to represent the virtual functions that are bound to the physical function. In the above directory structure is a physical function and is a virtual function. An EPF device once -it's linked to another EPF device, cannot be linked to a EPC device. +it's linked to another EPF device, cannot be linked to an EPC device. EPC Device ========== @@ -108,7 +108,7 @@ entries corresponding to EPC device will be created by the EPC core. The directory will have a list of symbolic links to . These symbolic links should be created by the user to represent the functions present in the endpoint device. Only -that represents a physical function can be linked to a EPC device. +that represents a physical function can be linked to an EPC device. The directory will also have a *start* field. Once "1" is written to this field, the endpoint device will be ready to diff --git a/Documentation/PCI/endpoint/pci-endpoint.rst b/Documentation/PCI/endpoint/pci-endpoint.rst index 599763aa01ca..0741c8cbd74e 100644 --- a/Documentation/PCI/endpoint/pci-endpoint.rst +++ b/Documentation/PCI/endpoint/pci-endpoint.rst @@ -197,8 +197,8 @@ by the PCI endpoint function driver. * pci_epf_register_driver() The PCI Endpoint Function driver should implement the following ops: - * bind: ops to perform when a EPC device has been bound to EPF device - * unbind: ops to perform when a binding has been lost between a EPC + * bind: ops to perform when an EPC device has been bound to EPF device + * unbind: ops to perform when a binding has been lost between an EPC device and EPF device * add_cfs: optional ops to create function specific configfs attributes @@ -251,7 +251,7 @@ pci-ep-cfs.c can be used as reference for using these APIs. * pci_epf_bind() pci_epf_bind() should be invoked when the EPF device has been bound to - a EPC device. + an EPC device. * pci_epf_unbind() -- cgit v1.2.3 From aa7acf34c50b991702a0d052aa2b99b434e8a01c Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Wed, 13 Aug 2025 15:04:58 -0500 Subject: Documentation: Fix RCU typos Fix typos. Signed-off-by: Bjorn Helgaas Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250813200526.290420-3-helgaas@kernel.org --- Documentation/RCU/lockdep.rst | 2 +- Documentation/RCU/stallwarn.rst | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/RCU/lockdep.rst b/Documentation/RCU/lockdep.rst index 69e73a39bd11..741b157bbacb 100644 --- a/Documentation/RCU/lockdep.rst +++ b/Documentation/RCU/lockdep.rst @@ -106,7 +106,7 @@ or the RCU-protected data that it points to can change concurrently. Like rcu_dereference(), when lockdep is enabled, RCU list and hlist traversal primitives check for being called from within an RCU read-side critical section. However, a lockdep expression can be passed to them -as a additional optional argument. With this lockdep expression, these +as an additional optional argument. With this lockdep expression, these traversal primitives will complain only if the lockdep expression is false and they are called from outside any RCU read-side critical section. diff --git a/Documentation/RCU/stallwarn.rst b/Documentation/RCU/stallwarn.rst index d1ccd6039a8c..d7c8eff63317 100644 --- a/Documentation/RCU/stallwarn.rst +++ b/Documentation/RCU/stallwarn.rst @@ -119,7 +119,7 @@ warnings: uncommon in large datacenter. In one memorable case some decades back, a CPU failed in a running system, becoming unresponsive, but not causing an immediate crash. This resulted in a series - of RCU CPU stall warnings, eventually leading the realization + of RCU CPU stall warnings, eventually leading to the realization that the CPU had failed. The RCU, RCU-sched, RCU-tasks, and RCU-tasks-trace implementations have -- cgit v1.2.3 From c349216707362a8c2376995296cb55604d4c0ee9 Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Wed, 13 Aug 2025 15:04:59 -0500 Subject: Documentation: Fix admin-guide typos Fix typos. Signed-off-by: Bjorn Helgaas Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250813200526.290420-4-helgaas@kernel.org --- Documentation/admin-guide/LSM/SafeSetID.rst | 2 +- Documentation/admin-guide/RAS/main.rst | 2 +- Documentation/admin-guide/blockdev/paride.rst | 2 +- Documentation/admin-guide/device-mapper/vdo-design.rst | 2 +- Documentation/admin-guide/hw-vuln/mds.rst | 2 +- Documentation/admin-guide/kdump/kdump.rst | 2 +- Documentation/admin-guide/kernel-parameters.txt | 12 ++++++------ Documentation/admin-guide/laptops/sonypi.rst | 2 +- Documentation/admin-guide/media/imx.rst | 2 +- Documentation/admin-guide/media/si4713.rst | 6 +++--- Documentation/admin-guide/mm/damon/usage.rst | 2 +- Documentation/admin-guide/perf/hisi-pmu.rst | 4 ++-- Documentation/admin-guide/quickly-build-trimmed-linux.rst | 4 ++-- Documentation/admin-guide/reporting-issues.rst | 4 ++-- .../admin-guide/verify-bugs-and-bisect-regressions.rst | 2 +- 15 files changed, 25 insertions(+), 25 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/LSM/SafeSetID.rst b/Documentation/admin-guide/LSM/SafeSetID.rst index 0ec34863c674..6d439c987563 100644 --- a/Documentation/admin-guide/LSM/SafeSetID.rst +++ b/Documentation/admin-guide/LSM/SafeSetID.rst @@ -41,7 +41,7 @@ namespace). The higher level goal is to allow for uid-based sandboxing of system services without having to give out CAP_SETUID all over the place just so that non-root programs can drop to even-lesser-privileged uids. This is especially relevant when one non-root daemon on the system should be allowed to spawn other -processes as different uids, but its undesirable to give the daemon a +processes as different uids, but it's undesirable to give the daemon a basically-root-equivalent CAP_SETUID. diff --git a/Documentation/admin-guide/RAS/main.rst b/Documentation/admin-guide/RAS/main.rst index 7ac1d4ccc509..447bfde509fb 100644 --- a/Documentation/admin-guide/RAS/main.rst +++ b/Documentation/admin-guide/RAS/main.rst @@ -253,7 +253,7 @@ interface. Some architectures have ECC detectors for L1, L2 and L3 caches, along with DMA engines, fabric switches, main data path switches, interconnections, and various other hardware data paths. If the hardware -reports it, then a edac_device device probably can be constructed to +reports it, then an edac_device device probably can be constructed to harvest and present that to userspace. diff --git a/Documentation/admin-guide/blockdev/paride.rst b/Documentation/admin-guide/blockdev/paride.rst index e85ad37cc0e5..b2f627d4c2f8 100644 --- a/Documentation/admin-guide/blockdev/paride.rst +++ b/Documentation/admin-guide/blockdev/paride.rst @@ -118,7 +118,7 @@ and high-level drivers that you would use: ================ ============ ======== All parports and all protocol drivers are probed automatically unless probe=0 -parameter is used. So just "modprobe epat" is enough for a Imation SuperDisk +parameter is used. So just "modprobe epat" is enough for an Imation SuperDisk drive to work. Manual device creation:: diff --git a/Documentation/admin-guide/device-mapper/vdo-design.rst b/Documentation/admin-guide/device-mapper/vdo-design.rst index 3cd59decbec0..faa0ecd4a5ae 100644 --- a/Documentation/admin-guide/device-mapper/vdo-design.rst +++ b/Documentation/admin-guide/device-mapper/vdo-design.rst @@ -600,7 +600,7 @@ lock and return itself to the pool. All storage within vdo is managed as 4KB blocks, but it can accept writes as small as 512 bytes. Processing a write that is smaller than 4K requires a read-modify-write operation that reads the relevant 4K block, copies the -new data over the approriate sectors of the block, and then launches a +new data over the appropriate sectors of the block, and then launches a write operation for the modified data block. The read and write stages of this operation are nearly identical to the normal read and write operations, and a single data_vio is used throughout this operation. diff --git a/Documentation/admin-guide/hw-vuln/mds.rst b/Documentation/admin-guide/hw-vuln/mds.rst index 48c7b0b72aed..754679db0ce8 100644 --- a/Documentation/admin-guide/hw-vuln/mds.rst +++ b/Documentation/admin-guide/hw-vuln/mds.rst @@ -214,7 +214,7 @@ XEON PHI specific considerations command line with the 'ring3mwait=disable' command line option. XEON PHI is not affected by the other MDS variants and MSBDS is mitigated - before the CPU enters a idle state. As XEON PHI is not affected by L1TF + before the CPU enters an idle state. As XEON PHI is not affected by L1TF either disabling SMT is not required for full protection. .. _mds_smt_control: diff --git a/Documentation/admin-guide/kdump/kdump.rst b/Documentation/admin-guide/kdump/kdump.rst index 9c6cd52f69cf..7b011eb116a7 100644 --- a/Documentation/admin-guide/kdump/kdump.rst +++ b/Documentation/admin-guide/kdump/kdump.rst @@ -471,7 +471,7 @@ Notes on loading the dump-capture kernel: performance degradation. To enable multi-cpu support, you should bring up an SMP dump-capture kernel and specify maxcpus/nr_cpus options while loading it. -* For s390x there are two kdump modes: If a ELF header is specified with +* For s390x there are two kdump modes: If an ELF header is specified with the elfcorehdr= kernel parameter, it is used by the kdump kernel as it is done on all other architectures. If no elfcorehdr= kernel parameter is specified, the s390x kdump kernel dynamically creates the header. The diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 747a55abf494..d4a91dec20b8 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -3700,7 +3700,7 @@ looking for corruption. Enabling this will both detect corruption and prevent the kernel from using the memory being corrupted. - However, its intended as a diagnostic tool; if + However, it's intended as a diagnostic tool; if repeatable BIOS-originated corruption always affects the same memory, you can use memmap= to prevent the kernel from using that memory. @@ -7382,7 +7382,7 @@ (converted into nanoseconds). Fast, but depending on the architecture, may not be in sync between CPUs. - global - Event time stamps are synchronize across + global - Event time stamps are synchronized across CPUs. May be slower than the local clock, but better for some race conditions. counter - Simple counting of events (1, 2, ..) @@ -7502,12 +7502,12 @@ section. trace_trigger=[trigger-list] - [FTRACE] Add a event trigger on specific events. + [FTRACE] Add an event trigger on specific events. Set a trigger on top of a specific event, with an optional filter. - The format is is "trace_trigger=.[ if ],..." - Where more than one trigger may be specified that are comma deliminated. + The format is "trace_trigger=.[ if ],..." + Where more than one trigger may be specified that are comma delimited. For example: @@ -7515,7 +7515,7 @@ The above will enable the "stacktrace" trigger on the "sched_switch" event but only trigger it if the "prev_state" of the "sched_switch" - event is "2" (TASK_UNINTERUPTIBLE). + event is "2" (TASK_UNINTERRUPTIBLE). See also "Event triggers" in Documentation/trace/events.rst diff --git a/Documentation/admin-guide/laptops/sonypi.rst b/Documentation/admin-guide/laptops/sonypi.rst index 190da1234314..7541f56e0007 100644 --- a/Documentation/admin-guide/laptops/sonypi.rst +++ b/Documentation/admin-guide/laptops/sonypi.rst @@ -25,7 +25,7 @@ generate, like: (when available) Those events (see linux/sonypi.h) can be polled using the character device node -/dev/sonypi (major 10, minor auto allocated or specified as a option). +/dev/sonypi (major 10, minor auto allocated or specified as an option). A simple daemon which translates the jogdial movements into mouse wheel events can be downloaded at: diff --git a/Documentation/admin-guide/media/imx.rst b/Documentation/admin-guide/media/imx.rst index b8fa70f854fd..bb68100d8acb 100644 --- a/Documentation/admin-guide/media/imx.rst +++ b/Documentation/admin-guide/media/imx.rst @@ -96,7 +96,7 @@ Some of the features of this driver include: motion compensation modes: low, medium, and high motion. Pipelines are defined that allow sending frames to the VDIC subdev directly from the CSI. There is also support in the future for sending frames to the - VDIC from memory buffers via a output/mem2mem devices. + VDIC from memory buffers via output/mem2mem devices. - Includes a Frame Interval Monitor (FIM) that can correct vertical sync problems with the ADV718x video decoders. diff --git a/Documentation/admin-guide/media/si4713.rst b/Documentation/admin-guide/media/si4713.rst index be8e6b49b7b4..85dcf1cd2df8 100644 --- a/Documentation/admin-guide/media/si4713.rst +++ b/Documentation/admin-guide/media/si4713.rst @@ -13,7 +13,7 @@ Contact: Eduardo Valentin Information about the Device ---------------------------- -This chip is a Silicon Labs product. It is a I2C device, currently on 0x63 address. +This chip is a Silicon Labs product. It is an I2C device, currently on 0x63 address. Basically, it has transmission and signal noise level measurement features. The Si4713 integrates transmit functions for FM broadcast stereo transmission. @@ -28,7 +28,7 @@ Users must comply with local regulations on radio frequency (RF) transmission. Device driver description ------------------------- -There are two modules to handle this device. One is a I2C device driver +There are two modules to handle this device. One is an I2C device driver and the other is a platform driver. The I2C device driver exports a v4l2-subdev interface to the kernel. @@ -113,7 +113,7 @@ Here is a summary of them: - acomp_attack_time - Sets the attack time for audio dynamic range control. - acomp_release_time - Sets the release time for audio dynamic range control. -* Limiter setups audio deviation limiter feature. Once a over deviation occurs, +* Limiter sets up the audio deviation limiter feature. Once an over deviation occurs, it is possible to adjust the front-end gain of the audio input and always prevent over deviation. diff --git a/Documentation/admin-guide/mm/damon/usage.rst b/Documentation/admin-guide/mm/damon/usage.rst index ff3a2dda1f02..5cd42d428c89 100644 --- a/Documentation/admin-guide/mm/damon/usage.rst +++ b/Documentation/admin-guide/mm/damon/usage.rst @@ -357,7 +357,7 @@ The directory for the :ref:`quotas ` of the given DAMON-based operation scheme. Under ``quotas`` directory, four files (``ms``, ``bytes``, -``reset_interval_ms``, ``effective_bytes``) and two directores (``weights`` and +``reset_interval_ms``, ``effective_bytes``) and two directories (``weights`` and ``goals``) exist. You can set the ``time quota`` in milliseconds, ``size quota`` in bytes, and diff --git a/Documentation/admin-guide/perf/hisi-pmu.rst b/Documentation/admin-guide/perf/hisi-pmu.rst index 48992a0b8e94..721eb1623ca7 100644 --- a/Documentation/admin-guide/perf/hisi-pmu.rst +++ b/Documentation/admin-guide/perf/hisi-pmu.rst @@ -109,8 +109,8 @@ uring channel. It is 2 bits. Some important codes are as follows: - 2'b11: count the events which sent to the uring_ext (MATA) channel; - 2'b01: is the same as 2'b11; - 2'b10: count the events which sent to the uring (non-MATA) channel; -- 2'b00: default value, count the events which sent to the both uring and - uring_ext channel; +- 2'b00: default value, count the events which sent to both uring and + uring_ext channels; Users could configure IDs to count data come from specific CCL/ICL, by setting srcid_cmd & srcid_msk, and data desitined for specific CCL/ICL by setting diff --git a/Documentation/admin-guide/quickly-build-trimmed-linux.rst b/Documentation/admin-guide/quickly-build-trimmed-linux.rst index 4a5ffb0996a3..cb4b78468a93 100644 --- a/Documentation/admin-guide/quickly-build-trimmed-linux.rst +++ b/Documentation/admin-guide/quickly-build-trimmed-linux.rst @@ -273,7 +273,7 @@ again. does nothing at all; in that case you have to manually install your kernel, as outlined in the reference section. - If you are running a immutable Linux distribution, check its documentation + If you are running an immutable Linux distribution, check its documentation and the web to find out how to install your own kernel there. [:ref:`details`] @@ -884,7 +884,7 @@ When a build error occurs, it might be caused by some aspect of your machine's setup that often can be fixed quickly; other times though the problem lies in the code and can only be fixed by a developer. A close examination of the failure messages coupled with some research on the internet will often tell you -which of the two it is. To perform such a investigation, restart the build +which of the two it is. To perform such an investigation, restart the build process like this:: make V=1 diff --git a/Documentation/admin-guide/reporting-issues.rst b/Documentation/admin-guide/reporting-issues.rst index 9a847506f6ec..a68e6d909274 100644 --- a/Documentation/admin-guide/reporting-issues.rst +++ b/Documentation/admin-guide/reporting-issues.rst @@ -611,7 +611,7 @@ better place. How to read the MAINTAINERS file ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -To illustrate how to use the :ref:`MAINTAINERS ` file, lets assume +To illustrate how to use the :ref:`MAINTAINERS ` file, let's assume the WiFi in your Laptop suddenly misbehaves after updating the kernel. In that case it's likely an issue in the WiFi driver. Obviously it could also be some code it builds upon, but unless you suspect something like that stick to the @@ -1543,7 +1543,7 @@ as well, because that will speed things up. And note, it helps developers a great deal if you can specify the exact version that introduced the problem. Hence if possible within a reasonable time frame, -try to find that version using vanilla kernels. Lets assume something broke when +try to find that version using vanilla kernels. Let's assume something broke when your distributor released a update from Linux kernel 5.10.5 to 5.10.8. Then as instructed above go and check the latest kernel from that version line, say 5.10.9. If it shows the problem, try a vanilla 5.10.5 to ensure that no patches diff --git a/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst b/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst index d8946b084b1e..d83601f2a459 100644 --- a/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst +++ b/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst @@ -1757,7 +1757,7 @@ or all of these tasks: to your bootloader's configuration. You have to take care of some or all of the tasks yourself, if your -distribution lacks a installkernel script or does only handle part of them. +distribution lacks an installkernel script or does only handle part of them. Consult the distribution's documentation for details. If in doubt, install the kernel manually:: -- cgit v1.2.3 From 8900f9ad90c05d0c44a21786cfef08061230f5b7 Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Wed, 13 Aug 2025 15:05:00 -0500 Subject: Documentation: Fix core-api typos Fix typos. Signed-off-by: Bjorn Helgaas Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250813200526.290420-5-helgaas@kernel.org --- Documentation/core-api/irq/irq-affinity.rst | 6 ++--- Documentation/core-api/irq/irq-domain.rst | 38 ++++++++++++++--------------- 2 files changed, 22 insertions(+), 22 deletions(-) (limited to 'Documentation') diff --git a/Documentation/core-api/irq/irq-affinity.rst b/Documentation/core-api/irq/irq-affinity.rst index 29da5000836a..9cb460cf60b6 100644 --- a/Documentation/core-api/irq/irq-affinity.rst +++ b/Documentation/core-api/irq/irq-affinity.rst @@ -9,9 +9,9 @@ ChangeLog: /proc/irq/IRQ#/smp_affinity and /proc/irq/IRQ#/smp_affinity_list specify which target CPUs are permitted for a given IRQ source. It's a bitmask -(smp_affinity) or cpu list (smp_affinity_list) of allowed CPUs. It's not +(smp_affinity) or CPU list (smp_affinity_list) of allowed CPUs. It's not allowed to turn off all CPUs, and if an IRQ controller does not support -IRQ affinity then the value will not change from the default of all cpus. +IRQ affinity then the value will not change from the default of all CPUs. /proc/irq/default_smp_affinity specifies default affinity mask that applies to all non-active IRQs. Once IRQ is allocated/activated its affinity bitmask @@ -60,7 +60,7 @@ Now lets restrict that IRQ to CPU(4-7). This time around IRQ44 was delivered only to the last four processors. i.e counters for the CPU0-3 did not change. -Here is an example of limiting that same irq (44) to cpus 1024 to 1031:: +Here is an example of limiting that same IRQ (44) to CPUs 1024 to 1031:: [root@moon 44]# echo 1024-1031 > smp_affinity_list [root@moon 44]# cat smp_affinity_list diff --git a/Documentation/core-api/irq/irq-domain.rst b/Documentation/core-api/irq/irq-domain.rst index a01c6ead1bc0..68eb2612e8a4 100644 --- a/Documentation/core-api/irq/irq-domain.rst +++ b/Documentation/core-api/irq/irq-domain.rst @@ -18,8 +18,8 @@ handlers as irqchips. I.e. in effect cascading interrupt controllers. So in the past, IRQ numbers could be chosen so that they match the hardware IRQ line into the root interrupt controller (i.e. the component actually firing the interrupt line to the CPU). Nowadays, -this number is just a number and the number loose all kind of -correspondence to hardware interrupt numbers. +this number is just a number and the number has no +relationship to hardware interrupt numbers. For this reason, we need a mechanism to separate controller-local interrupt numbers, called hardware IRQs, from Linux IRQ numbers. @@ -77,15 +77,15 @@ Once a mapping has been established, it can be retrieved or used via a variety of methods: - irq_resolve_mapping() returns a pointer to the irq_desc structure - for a given domain and hwirq number, and NULL if there was no + for a given domain and hwirq number, or NULL if there was no mapping. - irq_find_mapping() returns a Linux IRQ number for a given domain and - hwirq number, and 0 if there was no mapping + hwirq number, or 0 if there was no mapping - generic_handle_domain_irq() handles an interrupt described by a domain and a hwirq number -Note that irq domain lookups must happen in contexts that are -compatible with a RCU read-side critical section. +Note that irq_domain lookups must happen in contexts that are +compatible with an RCU read-side critical section. The irq_create_mapping() function must be called *at least once* before any call to irq_find_mapping(), lest the descriptor will not @@ -100,7 +100,7 @@ Types of irq_domain Mappings ============================ There are several mechanisms available for reverse mapping from hwirq -to Linux irq, and each mechanism uses a different allocation function. +to Linux IRQ, and each mechanism uses a different allocation function. Which reverse map type should be used depends on the use case. Each of the reverse map types are described below: @@ -111,13 +111,13 @@ Linear irq_domain_create_linear() -The linear reverse map maintains a fixed size table indexed by the +The linear reverse map maintains a fixed-size table indexed by the hwirq number. When a hwirq is mapped, an irq_desc is allocated for the hwirq, and the IRQ number is stored in the table. The Linear map is a good choice when the maximum number of hwirqs is fixed and a relatively small number (~ < 256). The advantages of this -map are fixed time lookup for IRQ numbers, and irq_descs are only +map are fixed-time lookup for IRQ numbers, and irq_descs are only allocated for in-use IRQs. The disadvantage is that the table must be as large as the largest possible hwirq number. @@ -134,7 +134,7 @@ The irq_domain maintains a radix tree map from hwirq numbers to Linux IRQs. When an hwirq is mapped, an irq_desc is allocated and the hwirq is used as the lookup key for the radix tree. -The tree map is a good choice if the hwirq number can be very large +The Tree map is a good choice if the hwirq number can be very large since it doesn't need to allocate a table as large as the largest hwirq number. The disadvantage is that hwirq to IRQ number lookup is dependent on how many entries are in the table. @@ -169,10 +169,10 @@ Legacy The Legacy mapping is a special case for drivers that already have a range of irq_descs allocated for the hwirqs. It is used when the -driver cannot be immediately converted to use the linear mapping. For +driver cannot be immediately converted to use the Linear mapping. For example, many embedded system board support files use a set of #defines for IRQ numbers that are passed to struct device registrations. In that -case the Linux IRQ numbers cannot be dynamically assigned and the legacy +case the Linux IRQ numbers cannot be dynamically assigned and the Legacy mapping should be used. As the name implies, the \*_legacy() functions are deprecated and only @@ -180,15 +180,15 @@ exist to ease the support of ancient platforms. No new users should be added. Same goes for the \*_simple() functions when their use results in the legacy behaviour. -The legacy map assumes a contiguous range of IRQ numbers has already +The Legacy map assumes a contiguous range of IRQ numbers has already been allocated for the controller and that the IRQ number can be calculated by adding a fixed offset to the hwirq number, and visa-versa. The disadvantage is that it requires the interrupt controller to manage IRQ allocations and it requires an irq_desc to be allocated for every hwirq, even if it is unused. -The legacy map should only be used if fixed IRQ mappings must be -supported. For example, ISA controllers would use the legacy map for +The Legacy map should only be used if fixed IRQ mappings must be +supported. For example, ISA controllers would use the Legacy map for mapping Linux IRQs 0-15 so that existing ISA drivers get the correct IRQ numbers. @@ -197,7 +197,7 @@ which will use a legacy domain only if an IRQ range is supplied by the system and will otherwise use a linear domain mapping. The semantics of this call are such that if an IRQ range is specified then descriptors will be allocated on-the-fly for it, and if no range is specified it -will fall through to irq_domain_create_linear() which means *no* irq +will fall through to irq_domain_create_linear() which means *no* IRQ descriptors will be allocated. A typical use case for simple domains is where an irqchip provider @@ -214,7 +214,7 @@ Hierarchy IRQ Domain On some architectures, there may be multiple interrupt controllers involved in delivering an interrupt from the device to the target CPU. -Let's look at a typical interrupt delivering path on x86 platforms:: +Let's look at a typical interrupt delivery path on x86 platforms:: Device --> IOAPIC -> Interrupt remapping Controller -> Local APIC -> CPU @@ -227,8 +227,8 @@ There are three interrupt controllers involved: To support such a hardware topology and make software architecture match hardware architecture, an irq_domain data structure is built for each interrupt controller and those irq_domains are organized into hierarchy. -When building irq_domain hierarchy, the irq_domain near to the device is -child and the irq_domain near to CPU is parent. So a hierarchy structure +When building irq_domain hierarchy, the irq_domain nearest the device is +child and the irq_domain nearest the CPU is parent. So a hierarchy structure as below will be built for the example above:: CPU Vector irq_domain (root irq_domain to manage CPU vectors) -- cgit v1.2.3 From 81fd803b5a5da3fad0140163091e12b3ac2ae484 Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Wed, 13 Aug 2025 15:05:01 -0500 Subject: Documentation: Fix filesystems typos Fix typos. Signed-off-by: Bjorn Helgaas Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250813200526.290420-6-helgaas@kernel.org --- Documentation/filesystems/erofs.rst | 2 +- Documentation/filesystems/gfs2-glocks.rst | 2 +- Documentation/filesystems/hpfs.rst | 2 +- Documentation/filesystems/resctrl.rst | 2 +- Documentation/filesystems/xfs/xfs-online-fsck-design.rst | 4 ++-- 5 files changed, 6 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/erofs.rst b/Documentation/filesystems/erofs.rst index 7ddb235aee9d..08194f194b94 100644 --- a/Documentation/filesystems/erofs.rst +++ b/Documentation/filesystems/erofs.rst @@ -116,7 +116,7 @@ cache_strategy=%s Select a strategy for cached decompression from now on: cluster for further reading. It still does in-place I/O decompression for the rest compressed physical clusters; - readaround Cache the both ends of incomplete compressed + readaround Cache both ends of incomplete compressed physical clusters for further reading. It still does in-place I/O decompression for the rest compressed physical clusters. diff --git a/Documentation/filesystems/gfs2-glocks.rst b/Documentation/filesystems/gfs2-glocks.rst index adc0d4c4d979..ce5ff08cbd59 100644 --- a/Documentation/filesystems/gfs2-glocks.rst +++ b/Documentation/filesystems/gfs2-glocks.rst @@ -105,7 +105,7 @@ go_unlocked Yes No Operations must not drop either the bit lock or the spinlock if its held on entry. go_dump and do_demote_ok must never block. Note that go_dump will only be called if the glock's state - indicates that it is caching uptodate data. + indicates that it is caching up-to-date data. Glock locking order within GFS2: diff --git a/Documentation/filesystems/hpfs.rst b/Documentation/filesystems/hpfs.rst index 7e0dd2f4373e..0f9516b5eb07 100644 --- a/Documentation/filesystems/hpfs.rst +++ b/Documentation/filesystems/hpfs.rst @@ -65,7 +65,7 @@ are case sensitive, so for example when you create a file FOO, you can use 'cat FOO', 'cat Foo', 'cat foo' or 'cat F*' but not 'cat f*'. Note, that you also won't be able to compile linux kernel (and maybe other things) on HPFS because kernel creates different files with names like bootsect.S and -bootsect.s. When searching for file thats name has characters >= 128, codepages +bootsect.s. When searching for file whose name has characters >= 128, codepages are used - see below. OS/2 ignores dots and spaces at the end of file name, so this driver does as well. If you create 'a. ...', the file 'a' will be created, but you can still diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesystems/resctrl.rst index c7949dd44f2f..4db3b07c16c5 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -563,7 +563,7 @@ this would be dependent on number of cores the benchmark is run on. depending on # of threads: For the same SKU in #1, a 'single thread, with 10% bandwidth' and '4 -thread, with 10% bandwidth' can consume upto 10GBps and 40GBps although +thread, with 10% bandwidth' can consume up to 10GBps and 40GBps although they have same percentage bandwidth of 10%. This is simply because as threads start using more cores in an rdtgroup, the actual bandwidth may increase or vary although user specified bandwidth percentage is same. diff --git a/Documentation/filesystems/xfs/xfs-online-fsck-design.rst b/Documentation/filesystems/xfs/xfs-online-fsck-design.rst index e231d127cd40..9fe994353395 100644 --- a/Documentation/filesystems/xfs/xfs-online-fsck-design.rst +++ b/Documentation/filesystems/xfs/xfs-online-fsck-design.rst @@ -454,7 +454,7 @@ filesystem so that it can apply pending filesystem updates to the staging information. Once the scan is done, the owning object is re-locked, the live data is used to write a new ondisk structure, and the repairs are committed atomically. -The hooks are disabled and the staging staging area is freed. +The hooks are disabled and the staging area is freed. Finally, the storage from the old data structure are carefully reaped. Introducing concurrency helps online repair avoid various locking problems, but @@ -2185,7 +2185,7 @@ The chapter about :ref:`secondary metadata` mentioned that checking and repairing of secondary metadata commonly requires coordination between a live metadata scan of the filesystem and writer threads that are updating that metadata. -Keeping the scan data up to date requires requires the ability to propagate +Keeping the scan data up to date requires the ability to propagate metadata updates from the filesystem into the data being collected by the scan. This *can* be done by appending concurrent updates into a separate log file and applying them before writing the new metadata to disk, but this leads to -- cgit v1.2.3 From e855d7e5e2e9ed311930d557f7ed033e200fcdef Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Wed, 13 Aug 2025 15:05:02 -0500 Subject: Documentation: Fix networking typos Fix typos. Signed-off-by: Bjorn Helgaas Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250813200526.290420-7-helgaas@kernel.org --- Documentation/networking/can.rst | 2 +- .../networking/device_drivers/ethernet/ti/am65_nuss_cpsw_switchdev.rst | 2 +- Documentation/networking/device_drivers/ethernet/ti/cpsw_switchdev.rst | 2 +- Documentation/networking/rds.rst | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/can.rst b/Documentation/networking/can.rst index bc1b585355f7..680dc7451493 100644 --- a/Documentation/networking/can.rst +++ b/Documentation/networking/can.rst @@ -539,7 +539,7 @@ CAN Filter Usage Optimisation The CAN filters are processed in per-device filter lists at CAN frame reception time. To reduce the number of checks that need to be performed while walking through the filter lists the CAN core provides an optimized -filter handling when the filter subscription focusses on a single CAN ID. +filter handling when the filter subscription focuses on a single CAN ID. For the possible 2048 SFF CAN identifiers the identifier is used as an index to access the corresponding subscription list without any further checks. diff --git a/Documentation/networking/device_drivers/ethernet/ti/am65_nuss_cpsw_switchdev.rst b/Documentation/networking/device_drivers/ethernet/ti/am65_nuss_cpsw_switchdev.rst index 25fd9aa284e2..f0424597aac1 100644 --- a/Documentation/networking/device_drivers/ethernet/ti/am65_nuss_cpsw_switchdev.rst +++ b/Documentation/networking/device_drivers/ethernet/ti/am65_nuss_cpsw_switchdev.rst @@ -42,7 +42,7 @@ Port's netdev devices have to be in UP before joining to the bridge to avoid overwriting of bridge configuration as CPSW switch driver completely reloads its configuration when first port changes its state to UP. -When the both interfaces joined the bridge - CPSW switch driver will enable +When both interfaces have joined the bridge - CPSW switch driver will enable marking packets with offload_fwd_mark flag. All configuration is implemented via switchdev API. diff --git a/Documentation/networking/device_drivers/ethernet/ti/cpsw_switchdev.rst b/Documentation/networking/device_drivers/ethernet/ti/cpsw_switchdev.rst index 464dce938ed1..2f3c43a32bfc 100644 --- a/Documentation/networking/device_drivers/ethernet/ti/cpsw_switchdev.rst +++ b/Documentation/networking/device_drivers/ethernet/ti/cpsw_switchdev.rst @@ -92,7 +92,7 @@ Port's netdev devices have to be in UP before joining to the bridge to avoid overwriting of bridge configuration as CPSW switch driver copletly reloads its configuration when first Port changes its state to UP. -When the both interfaces joined the bridge - CPSW switch driver will enable +When both interfaces have joined the bridge - CPSW switch driver will enable marking packets with offload_fwd_mark flag unless "ale_bypass=0" All configuration is implemented via switchdev API. diff --git a/Documentation/networking/rds.rst b/Documentation/networking/rds.rst index 41b0a6182fe4..4261146e9d92 100644 --- a/Documentation/networking/rds.rst +++ b/Documentation/networking/rds.rst @@ -339,7 +339,7 @@ The send path rds_sendmsg() - struct rds_message built from incoming data - CMSGs parsed (e.g. RDMA ops) - - transport connection alloced and connected if not already + - transport connection allocated and connected if not already - rds_message placed on send queue - send worker awoken -- cgit v1.2.3 From 3dae66aec6b0bd847e5056fb5174dfc325162734 Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Wed, 13 Aug 2025 15:05:03 -0500 Subject: Documentation: Fix power typos Fix typos. Signed-off-by: Bjorn Helgaas Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250813200526.290420-8-helgaas@kernel.org --- Documentation/power/pci.rst | 4 ++-- Documentation/power/suspend-and-cpuhotplug.rst | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/power/pci.rst b/Documentation/power/pci.rst index 9ebecb7b00b2..38e614d92a4a 100644 --- a/Documentation/power/pci.rst +++ b/Documentation/power/pci.rst @@ -472,7 +472,7 @@ in the device tree from the root bridge to a leaf device contains both of them). The pci_pm_suspend_noirq() routine is executed after suspend_device_irqs() has been called, which means that the device driver's interrupt handler won't be invoked while this routine is running. It first checks if the device's driver -implements legacy PCI suspends routines (Section 3), in which case the legacy +implements legacy PCI suspend routines (Section 3), in which case the legacy late suspend routine is called and its result is returned (the standard configuration registers of the device are saved if the driver's callback hasn't done that). Second, if the device driver's struct dev_pm_ops object is not @@ -544,7 +544,7 @@ result is then returned). The resume phase is carried out asynchronously for PCI devices, like the suspend phase described above, which means that if two PCI devices don't depend on each other in a known way, the pci_pm_resume() routine may be executed for -the both of them in parallel. +both of them in parallel. The pci_pm_complete() routine only executes the device driver's pm->complete() callback, if defined. diff --git a/Documentation/power/suspend-and-cpuhotplug.rst b/Documentation/power/suspend-and-cpuhotplug.rst index ebedb6c75db9..641d09a6546b 100644 --- a/Documentation/power/suspend-and-cpuhotplug.rst +++ b/Documentation/power/suspend-and-cpuhotplug.rst @@ -13,7 +13,7 @@ infrastructure uses it internally? And where do they share common code? Well, a picture is worth a thousand words... So ASCII art follows :-) -[This depicts the current design in the kernel, and focusses only on the +[This depicts the current design in the kernel, and focuses only on the interactions involving the freezer and CPU hotplug and also tries to explain the locking involved. It outlines the notifications involved as well. But please note that here, only the call paths are illustrated, with the aim -- cgit v1.2.3 From 29fe206065f3784397252c7f6aa28dc6d413fb94 Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Wed, 13 Aug 2025 15:05:04 -0500 Subject: Documentation: Fix trace typos Fix typos. Signed-off-by: Bjorn Helgaas Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250813200526.290420-9-helgaas@kernel.org --- Documentation/trace/fprobe.rst | 2 +- Documentation/trace/ftrace-uses.rst | 2 +- Documentation/trace/ftrace.rst | 14 +++++++------- Documentation/trace/histogram.rst | 2 +- 4 files changed, 10 insertions(+), 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/trace/fprobe.rst b/Documentation/trace/fprobe.rst index 71cd40472d36..06b0edad0179 100644 --- a/Documentation/trace/fprobe.rst +++ b/Documentation/trace/fprobe.rst @@ -81,7 +81,7 @@ Same as ftrace, the registered callbacks will start being called some time after the register_fprobe() is called and before it returns. See :file:`Documentation/trace/ftrace.rst`. -Also, the unregister_fprobe() will guarantee that the both enter and exit +Also, the unregister_fprobe() will guarantee that both enter and exit handlers are no longer being called by functions after unregister_fprobe() returns as same as unregister_ftrace_function(). diff --git a/Documentation/trace/ftrace-uses.rst b/Documentation/trace/ftrace-uses.rst index e198854ace79..e225cc46b71e 100644 --- a/Documentation/trace/ftrace-uses.rst +++ b/Documentation/trace/ftrace-uses.rst @@ -193,7 +193,7 @@ FTRACE_OPS_FL_RECURSION Note, if this flag is set, then the callback will always be called with preemption disabled. If it is not set, then it is possible (but not guaranteed) that the callback will be called in - preemptable context. + preemptible context. FTRACE_OPS_FL_IPMODIFY Requires FTRACE_OPS_FL_SAVE_REGS set. If the callback is to "hijack" diff --git a/Documentation/trace/ftrace.rst b/Documentation/trace/ftrace.rst index af66a05e18cc..aef674df3afd 100644 --- a/Documentation/trace/ftrace.rst +++ b/Documentation/trace/ftrace.rst @@ -30,7 +30,7 @@ disabled and enabled, as well as for preemption and from a time a task is woken to the task is actually scheduled in. One of the most common uses of ftrace is the event tracing. -Throughout the kernel is hundreds of static event points that +Throughout the kernel are hundreds of static event points that can be enabled via the tracefs file system to see what is going on in certain parts of the kernel. @@ -383,7 +383,7 @@ of ftrace. Here is a list of some of the key files: not be listed in this count. If the callback registered to be traced by a function with - the "save regs" attribute (thus even more overhead), a 'R' + the "save regs" attribute (thus even more overhead), an 'R' will be displayed on the same line as the function that is returning registers. @@ -392,7 +392,7 @@ of ftrace. Here is a list of some of the key files: an 'I' will be displayed on the same line as the function that can be overridden. - If a non ftrace trampoline is attached (BPF) a 'D' will be displayed. + If a non-ftrace trampoline is attached (BPF) a 'D' will be displayed. Note, normal ftrace trampolines can also be attached, but only one "direct" trampoline can be attached to a given function at a time. @@ -402,7 +402,7 @@ of ftrace. Here is a list of some of the key files: If a function had either the "ip modify" or a "direct" call attached to it in the past, a 'M' will be shown. This flag is never cleared. It is - used to know if a function was every modified by the ftrace infrastructure, + used to know if a function was ever modified by the ftrace infrastructure, and can be used for debugging. If the architecture supports it, it will also show what callback @@ -418,7 +418,7 @@ of ftrace. Here is a list of some of the key files: This file contains all the functions that ever had a function callback to it via the ftrace infrastructure. It has the same format as - enabled_functions but shows all functions that have every been + enabled_functions but shows all functions that have ever been traced. To see any function that has every been modified by "ip modify" or a @@ -517,7 +517,7 @@ of ftrace. Here is a list of some of the key files: Whenever an event is recorded into the ring buffer, a "timestamp" is added. This stamp comes from a specified clock. By default, ftrace uses the "local" clock. This - clock is very fast and strictly per cpu, but on some + clock is very fast and strictly per CPU, but on some systems it may not be monotonic with respect to other CPUs. In other words, the local clocks may not be in sync with local clocks on other CPUs. @@ -868,7 +868,7 @@ Here is the list of current tracers that may be configured. "mmiotrace" - A special tracer that is used to trace binary module. + A special tracer that is used to trace binary modules. It will trace all the calls that a module makes to the hardware. Everything it writes and reads from the I/O as well. diff --git a/Documentation/trace/histogram.rst b/Documentation/trace/histogram.rst index 2b98c1720a54..af6d2e15568e 100644 --- a/Documentation/trace/histogram.rst +++ b/Documentation/trace/histogram.rst @@ -840,7 +840,7 @@ Extended error information The compound key examples used a key and a sum value (hitcount) to sort the output, but we can just as easily use two keys instead. - Here's an example where we use a compound key composed of the the + Here's an example where we use a compound key composed of the common_pid and size event fields. Sorting with pid as the primary key and 'size' as the secondary key allows us to display an ordered summary of the recvfrom sizes, with counts, received by -- cgit v1.2.3 From 37c52167b007d9d0bb8c5ed53dd6efc4969a1356 Mon Sep 17 00:00:00 2001 From: David Sterba Date: Wed, 13 Aug 2025 12:00:52 +0200 Subject: docs: Remove remainders of reiserfs Reiserfs has been removed in 6.13, there are still some mentions in the documentation about it and the tools. Remove those that don't seem relevant anymore but keep references to reiserfs' r5 hash used by some code. There's one change in a script scripts/selinux/install_policy.sh but it does not seem to be relevant either. Signed-off-by: David Sterba Acked-by: Paul Moore Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250813100053.1291961-1-dsterba@suse.com --- Documentation/admin-guide/ext4.rst | 2 +- Documentation/admin-guide/laptops/laptop-mode.rst | 8 ++++---- Documentation/arch/powerpc/eeh-pci-error-recovery.rst | 1 - Documentation/translations/it_IT/process/changes.rst | 14 -------------- 4 files changed, 5 insertions(+), 20 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/ext4.rst b/Documentation/admin-guide/ext4.rst index b857eb6ca1b6..ac0c709ea9e7 100644 --- a/Documentation/admin-guide/ext4.rst +++ b/Documentation/admin-guide/ext4.rst @@ -398,7 +398,7 @@ There are 3 different data modes: * writeback mode In data=writeback mode, ext4 does not journal data at all. This mode provides - a similar level of journaling as that of XFS, JFS, and ReiserFS in its default + a similar level of journaling as that of XFS and JFS in its default mode - metadata journaling. A crash+recovery can cause incorrect data to appear in files which were written shortly before the crash. This mode will typically provide the best ext4 performance. diff --git a/Documentation/admin-guide/laptops/laptop-mode.rst b/Documentation/admin-guide/laptops/laptop-mode.rst index b61cc601d298..66eb9cd918b5 100644 --- a/Documentation/admin-guide/laptops/laptop-mode.rst +++ b/Documentation/admin-guide/laptops/laptop-mode.rst @@ -61,7 +61,7 @@ Caveats Check your drive's rating, and don't wear down your drive's lifetime if you don't need to. -* If you mount some of your ext3/reiserfs filesystems with the -n option, then +* If you mount some of your ext3 filesystems with the -n option, then the control script will not be able to remount them correctly. You must set DO_REMOUNTS=0 in the control script, otherwise it will remount them with the wrong options -- or it will fail because it cannot write to /etc/mtab. @@ -96,7 +96,7 @@ control script increases dirty_expire_centisecs and dirty_writeback_centisecs in dirtied are not forced to be written to disk as often. The control script also changes the dirty background ratio, so that background writeback of dirty pages is not done anymore. Combined with a higher commit value (also 10 minutes) for -ext3 or ReiserFS filesystems (also done automatically by the control script), +ext3 filesystem (also done automatically by the control script), this results in concentration of disk activity in a small time interval which occurs only once every 10 minutes, or whenever the disk is forced to spin up by a cache miss. The disk can then be spun down in the periods of inactivity. @@ -587,7 +587,7 @@ Control script:: FST=$(deduce_fstype $MP) fi case "$FST" in - "ext3"|"reiserfs") + "ext3") PARSEDOPTS="$(parse_mount_opts commit "$OPTS")" mount $DEV -t $FST $MP -o remount,$PARSEDOPTS,commit=$MAX_AGE$NOATIME_OPT ;; @@ -647,7 +647,7 @@ Control script:: FST=$(deduce_fstype $MP) fi case "$FST" in - "ext3"|"reiserfs") + "ext3") PARSEDOPTS="$(parse_mount_opts_wfstab $DEV commit $OPTS)" PARSEDOPTS="$(parse_yesno_opts_wfstab $DEV atime atime $PARSEDOPTS)" mount $DEV -t $FST $MP -o remount,$PARSEDOPTS diff --git a/Documentation/arch/powerpc/eeh-pci-error-recovery.rst b/Documentation/arch/powerpc/eeh-pci-error-recovery.rst index d6643a91bdf8..153d0af055b6 100644 --- a/Documentation/arch/powerpc/eeh-pci-error-recovery.rst +++ b/Documentation/arch/powerpc/eeh-pci-error-recovery.rst @@ -315,7 +315,6 @@ network daemons and file systems that didn't need to be disturbed. ideally, the reset should happen at or below the block layer, so that the file systems are not disturbed. - Reiserfs does not tolerate errors returned from the block device. Ext3fs seems to be tolerant, retrying reads/writes until it does succeed. Both have been only lightly tested in this scenario. diff --git a/Documentation/translations/it_IT/process/changes.rst b/Documentation/translations/it_IT/process/changes.rst index 77db13c4022b..7e93833b4511 100644 --- a/Documentation/translations/it_IT/process/changes.rst +++ b/Documentation/translations/it_IT/process/changes.rst @@ -46,7 +46,6 @@ util-linux 2.10o mount --version kmod 13 depmod -V e2fsprogs 1.41.4 e2fsck -V jfsutils 1.1.3 fsck.jfs -V -reiserfsprogs 3.6.3 reiserfsck -V xfsprogs 2.6.0 xfs_db -V squashfs-tools 4.0 mksquashfs -version btrfs-progs 0.18 btrfsck @@ -260,14 +259,6 @@ Sono disponibili i seguenti strumenti: - sono disponibili altri strumenti per il file-system. -Reiserfsprogs -------------- - -Il pacchetto reiserfsprogs dovrebbe essere usato con reiserfs-3.6.x (Linux -kernel 2.4.x). Questo è un pacchetto combinato che contiene versioni -funzionanti di ``mkreiserfs``, ``resize_reiserfs``, ``debugreiserfs`` e -``reiserfsck``. Questi programmi funzionano sulle piattaforme i386 e alpha. - Xfsprogs -------- @@ -479,11 +470,6 @@ JFSutils - -Reiserfsprogs -------------- - -- - Xfsprogs -------- -- cgit v1.2.3 From f1bbfc405e3d36545f4fd1931c3e1d32396d1b63 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 18 Aug 2025 11:12:22 +0300 Subject: dt-bindings: iio: adc: Add BD7910[0,1,2,3] The ROHM BD79100, BD79101, BD79102, BD79103 are very similar ADCs as the ROHM BD79104. The BD79100 has only 1 channel. BD79101 has 2 channels and the BD79102 has 4 channels. Both BD79103 and BD79104 have 4 channels, and, based on the data sheets, they seem identical from the software point-of-view. Signed-off-by: Matti Vaittinen Acked-by: Conor Dooley Reviewed-by: David Lechner Link: https://patch.msgid.link/0874c5933cf56430b9440d19ff46f746e4897952.1755504346.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml b/Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml index f0a1347ba4db..d5192ec58f59 100644 --- a/Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml +++ b/Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml @@ -14,7 +14,15 @@ description: | properties: compatible: - const: rohm,bd79104 + oneOf: + - enum: + - rohm,bd79100 + - rohm,bd79101 + - rohm,bd79102 + - rohm,bd79104 + - items: + - const: rohm,bd79103 + - const: rohm,bd79104 reg: maxItems: 1 -- cgit v1.2.3 From 788c57f4766bd5802af9918ea350053a91488c60 Mon Sep 17 00:00:00 2001 From: Jorge Marques Date: Mon, 18 Aug 2025 16:44:23 +0200 Subject: docs: iio: ad3552r: Fix malformed code-block directive Missing required double dot and line break. Fixes: ede84c455659 ("docs: iio: add documentation for ad3552r driver") Signed-off-by: Jorge Marques Reviewed-by: David Lechner Link: https://patch.msgid.link/20250818-docs-ad3552r-code-block-fix-v1-1-4430cbc26676@analog.com Signed-off-by: Jonathan Cameron --- Documentation/iio/ad3552r.rst | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/iio/ad3552r.rst b/Documentation/iio/ad3552r.rst index f5d59e4e86c7..4274e35f503d 100644 --- a/Documentation/iio/ad3552r.rst +++ b/Documentation/iio/ad3552r.rst @@ -64,7 +64,8 @@ specific debugfs path ``/sys/kernel/debug/iio/iio:deviceX``. Usage examples -------------- -. code-block:: bash +.. code-block:: bash + root:/sys/bus/iio/devices/iio:device0# cat data_source normal root:/sys/bus/iio/devices/iio:device0# echo -n ramp-16bit > data_source -- cgit v1.2.3 From a510980e740cc58be5733d4c15b22c7822e84c71 Mon Sep 17 00:00:00 2001 From: "Russell King (Oracle)" Date: Wed, 13 Aug 2025 12:21:19 +0100 Subject: dt-bindings: net: realtek,rtl82xx: document wakeup-source property The RTL8211F PHY has two modes for a single INTB/PMEB pin: 1. INTB mode, where it signals interrupts to the CPU, which can include wake-on-LAN events. 2. PMEB mode, where it only signals a wake-on-LAN event, which may either be a latched logic low until software manually clears the WoL state, or pulsed mode. In the case of (1), there is no way to know whether the interrupt to which the PHY is connected is capable of waking the system. In the case of (2), there would be no interrupt property in the PHY's DT description, and thus there is nothing to describe whether the pin is even wired to anything such as a power management controller. There is a "wakeup-source" property which can be applied to any device - see Documentation/devicetree/bindings/power/wakeup-source.txt Case 1 above matches example 2 in this document, and case 2 above matches example 3. Therefore, it seems reasonable to make use of this existing specification, albiet it hasn't been converted to YAML. Document the wakeup-source property in the device description, which will indicate that the PHY has been wired up in such a way that it can wake the system from a low power state. We will use this in a rewrite of the existing broken Wake-on-Lan code that was merged during the 6.16 merge window to support case 1. Case 2 can be added to the driver later without needing to further alter the DT description. To be clear, the existing Wake-on-Lan code that was recently merged has multiple functional issues. Signed-off-by: Russell King (Oracle) Acked-by: Conor Dooley Link: https://patch.msgid.link/E1um9Xj-008kBx-72@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml b/Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml index d248a08a2136..2b5697bd7c5d 100644 --- a/Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml +++ b/Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml @@ -45,12 +45,16 @@ properties: description: Disable CLKOUT clock, CLKOUT clock default is enabled after hardware reset. - realtek,aldps-enable: type: boolean description: Enable ALDPS mode, ALDPS mode default is disabled after hardware reset. + wakeup-source: + type: boolean + description: + Enable Wake-on-LAN support for the RTL8211F PHY. + unevaluatedProperties: false allOf: -- cgit v1.2.3 From ab4ee77ed9bddfc1c3461b42ef4875068928d2e6 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Fri, 15 Aug 2025 09:52:42 -0700 Subject: docs: netdev: refine the clean-up patch examples We discourage sending trivial patches to clean up checkpatch warnings. There are other tools which lead to patches of similarly low value like some coccicheck warnings. The warnings are useful for new code but fixing them in the existing code base is a waste of review time. Broaden the example given in the doc a little bit. Link: https://patch.msgid.link/20250815165242.124240-1-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/process/maintainer-netdev.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/process/maintainer-netdev.rst b/Documentation/process/maintainer-netdev.rst index e1755610b4bc..989192421cc9 100644 --- a/Documentation/process/maintainer-netdev.rst +++ b/Documentation/process/maintainer-netdev.rst @@ -407,7 +407,7 @@ Clean-up patches Netdev discourages patches which perform simple clean-ups, which are not in the context of other work. For example: -* Addressing ``checkpatch.pl`` warnings +* Addressing ``checkpatch.pl``, and other trivial coding style warnings * Addressing :ref:`Local variable ordering` issues * Conversions to device-managed APIs (``devm_`` helpers) -- cgit v1.2.3 From edafd4f3fd52a614c5cee2684559367eac2286dc Mon Sep 17 00:00:00 2001 From: Krishna Chaitanya Chundru Date: Sat, 9 Aug 2025 15:29:16 +0530 Subject: dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the SM8750 QMP PCIe PHY Gen3 x2 Document the QMP PCIe PHY on the SM8750 platform. Signed-off-by: Krishna Chaitanya Chundru Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250809-pakala-v1-1-abf1c416dbaa@oss.qualcomm.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml index a1ae8c7988c8..cb706cf8219d 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml @@ -42,6 +42,7 @@ properties: - qcom,sm8550-qmp-gen4x2-pcie-phy - qcom,sm8650-qmp-gen3x2-pcie-phy - qcom,sm8650-qmp-gen4x2-pcie-phy + - qcom,sm8750-qmp-gen3x2-pcie-phy - qcom,x1e80100-qmp-gen3x2-pcie-phy - qcom,x1e80100-qmp-gen4x2-pcie-phy - qcom,x1e80100-qmp-gen4x4-pcie-phy @@ -164,6 +165,7 @@ allOf: - qcom,sm8550-qmp-gen4x2-pcie-phy - qcom,sm8650-qmp-gen3x2-pcie-phy - qcom,sm8650-qmp-gen4x2-pcie-phy + - qcom,sm8750-qmp-gen3x2-pcie-phy then: properties: clocks: -- cgit v1.2.3 From 5213ff086344394ddb586298ad1d408c93406621 Mon Sep 17 00:00:00 2001 From: Mohsin Bashir Date: Wed, 13 Aug 2025 15:13:18 -0700 Subject: eth: fbnic: Collect packet statistics for XDP Add support for XDP statistics collection and reporting via rtnl_link and netdev_queue API. For XDP programs without frags support, fbnic requires MTU to be less than the HDS threshold. If an over-sized frame is received, the frame is dropped and recorded as rx_length_errors reported via ip stats to highlight that this is an error. Signed-off-by: Jakub Kicinski Signed-off-by: Mohsin Bashir Link: https://patch.msgid.link/20250813221319.3367670-9-mohsin.bashr@gmail.com Signed-off-by: Paolo Abeni --- .../networking/device_drivers/ethernet/meta/fbnic.rst | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst index afb8353daefd..fb6559fa4be4 100644 --- a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst +++ b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst @@ -160,3 +160,14 @@ behavior and potential performance bottlenecks. credit exhaustion - ``pcie_ob_rd_no_np_cred``: Read requests dropped due to non-posted credit exhaustion + +XDP Length Error: +~~~~~~~~~~~~~~~~~ + +For XDP programs without frags support, fbnic tries to make sure that MTU fits +into a single buffer. If an oversized frame is received and gets fragmented, +it is dropped and the following netlink counters are updated + + - ``rx-length``: number of frames dropped due to lack of fragmentation + support in the attached XDP program + - ``rx-errors``: total number of packets with errors received on the interface -- cgit v1.2.3 From 5d1c82943f3beaa8b97eb11d865239cbab88e527 Mon Sep 17 00:00:00 2001 From: Shubham Sharma Date: Sun, 10 Aug 2025 17:00:08 +0530 Subject: docs: device-mapper: fix typos in delay.rst and vdo-design.rst Fixed the following typos in device-mapper documentation: - explicitely -> explicitly - approriate -> appropriate Signed-off-by: Shubham Sharma Signed-off-by: Mikulas Patocka --- Documentation/admin-guide/device-mapper/delay.rst | 2 +- Documentation/admin-guide/device-mapper/vdo-design.rst | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/device-mapper/delay.rst b/Documentation/admin-guide/device-mapper/delay.rst index 4d667228e744..982136160d6f 100644 --- a/Documentation/admin-guide/device-mapper/delay.rst +++ b/Documentation/admin-guide/device-mapper/delay.rst @@ -18,7 +18,7 @@ Table line has to either have 3, 6 or 9 arguments: to write and flush operations on optionally different write_device with optionally different sector offset -9: same as 6 arguments plus define flush_offset and flush_delay explicitely +9: same as 6 arguments plus define flush_offset and flush_delay explicitly on/with optionally different flush_device/flush_offset. Offsets are specified in sectors. diff --git a/Documentation/admin-guide/device-mapper/vdo-design.rst b/Documentation/admin-guide/device-mapper/vdo-design.rst index 3cd59decbec0..faa0ecd4a5ae 100644 --- a/Documentation/admin-guide/device-mapper/vdo-design.rst +++ b/Documentation/admin-guide/device-mapper/vdo-design.rst @@ -600,7 +600,7 @@ lock and return itself to the pool. All storage within vdo is managed as 4KB blocks, but it can accept writes as small as 512 bytes. Processing a write that is smaller than 4K requires a read-modify-write operation that reads the relevant 4K block, copies the -new data over the approriate sectors of the block, and then launches a +new data over the appropriate sectors of the block, and then launches a write operation for the modified data block. The read and write stages of this operation are nearly identical to the normal read and write operations, and a single data_vio is used throughout this operation. -- cgit v1.2.3 From a86f1b4047a9ccaa5a0e691e7cf52928b68f4595 Mon Sep 17 00:00:00 2001 From: Soham Metha Date: Wed, 13 Aug 2025 02:19:47 +0530 Subject: docs: device-mapper: fixed spelling mistakes in documentation found/fixed the following typos - flushs -> flushes in `Documentation/admin-guide/device-mapper/delay.rst` Signed-off-by: Soham Metha Signed-off-by: Mikulas Patocka --- Documentation/admin-guide/device-mapper/delay.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/device-mapper/delay.rst b/Documentation/admin-guide/device-mapper/delay.rst index 982136160d6f..a1e673c0e782 100644 --- a/Documentation/admin-guide/device-mapper/delay.rst +++ b/Documentation/admin-guide/device-mapper/delay.rst @@ -3,7 +3,7 @@ dm-delay ======== Device-Mapper's "delay" target delays reads and/or writes -and/or flushs and optionally maps them to different devices. +and/or flushes and optionally maps them to different devices. Arguments:: @@ -40,7 +40,7 @@ Example scripts #!/bin/sh # # Create mapped device delaying write and flush operations for 400ms and - # splitting reads to device $1 but writes and flushs to different device $2 + # splitting reads to device $1 but writes and flushes to different device $2 # to different offsets of 2048 and 4096 sectors respectively. # dmsetup create delayed --table "0 `blockdev --getsz $1` delay $1 2048 0 $2 4096 400" @@ -48,7 +48,7 @@ Example scripts :: #!/bin/sh # - # Create mapped device delaying reads for 50ms, writes for 100ms and flushs for 333ms + # Create mapped device delaying reads for 50ms, writes for 100ms and flushes for 333ms # onto the same backing device at offset 0 sectors. # dmsetup create delayed --table "0 `blockdev --getsz $1` delay $1 0 50 $2 0 100 $1 0 333" -- cgit v1.2.3 From c7c61bc417b0334c4feb2bac455c17bf36c5891b Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Fri, 15 Aug 2025 15:03:13 +0700 Subject: dm-vdo: Promote dm-vdo title to title heading dm-vdo docs currently has no explicit title heading but instead there are multiple section headings as top-level heading. As such, these sections are rendered as titles and inflates number of entries in the toctree index. Promote the first section heading ("dm-vdo") to title heading. Fixes: 04bf7ac646ab ("dm: add documentation for dm-vdo target") Signed-off-by: Bagas Sanjaya Signed-off-by: Mikulas Patocka --- Documentation/admin-guide/device-mapper/vdo.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/device-mapper/vdo.rst b/Documentation/admin-guide/device-mapper/vdo.rst index a14e6d3e787c..8a67b320a97b 100644 --- a/Documentation/admin-guide/device-mapper/vdo.rst +++ b/Documentation/admin-guide/device-mapper/vdo.rst @@ -1,5 +1,6 @@ .. SPDX-License-Identifier: GPL-2.0-only +====== dm-vdo ====== -- cgit v1.2.3 From 91d7789fd016e0616913313b3306b83f8a608489 Mon Sep 17 00:00:00 2001 From: Joy Zou Date: Wed, 6 Aug 2025 19:41:10 +0800 Subject: dt-bindings: soc: imx-blk-ctrl: add i.MX91 blk-ctrl compatible Add new compatible string "fsl,imx91-media-blk-ctrl" for i.MX91, which has different input clocks compared to i.MX93. Update the clock-names list and handle it in the if-else branch accordingly. Keep the same restriction for the existed compatible strings. Reviewed-by: Rob Herring (Arm) Reviewed-by: Frank Li Signed-off-by: Joy Zou Link: https://lore.kernel.org/r/20250806114119.1948624-3-joy.zou@nxp.com Signed-off-by: Ulf Hansson --- .../bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml | 59 +++++++++++++++++----- 1 file changed, 47 insertions(+), 12 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml index b3554e7f9e76..34aea58094e5 100644 --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml @@ -18,7 +18,9 @@ description: properties: compatible: items: - - const: fsl,imx93-media-blk-ctrl + - enum: + - fsl,imx91-media-blk-ctrl + - fsl,imx93-media-blk-ctrl - const: syscon reg: @@ -31,21 +33,54 @@ properties: maxItems: 1 clocks: + minItems: 8 maxItems: 10 clock-names: - items: - - const: apb - - const: axi - - const: nic - - const: disp - - const: cam - - const: pxp - - const: lcdif - - const: isi - - const: csi - - const: dsi + minItems: 8 + maxItems: 10 +allOf: + - if: + properties: + compatible: + contains: + const: fsl,imx91-media-blk-ctrl + then: + properties: + clocks: + maxItems: 8 + clock-names: + items: + - const: apb + - const: axi + - const: nic + - const: disp + - const: cam + - const: lcdif + - const: isi + - const: csi + - if: + properties: + compatible: + contains: + const: fsl,imx93-media-blk-ctrl + then: + properties: + clocks: + minItems: 10 + clock-names: + items: + - const: apb + - const: axi + - const: nic + - const: disp + - const: cam + - const: pxp + - const: lcdif + - const: isi + - const: csi + - const: dsi required: - compatible - reg -- cgit v1.2.3 From 46b4ddd2c4951c073a16bbf271221240fe2584e5 Mon Sep 17 00:00:00 2001 From: Abd-Alrhman Masalkhi Date: Thu, 17 Jul 2025 06:39:32 +0000 Subject: dt-bindings: eeprom: Add ST M24LR support Add support for STMicroelectronics M24LR RFID/NFC EEPROM chips. These devices use two I2C addresses: the primary address provides access to control and system parameter registers, while the secondary address is used for EEPROM access. Signed-off-by: Abd-Alrhman Masalkhi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250717063934.5083-2-abd.masalkhi@gmail.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/eeprom/st,m24lr.yaml | 52 ++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/eeprom/st,m24lr.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/eeprom/st,m24lr.yaml b/Documentation/devicetree/bindings/eeprom/st,m24lr.yaml new file mode 100644 index 000000000000..0a0820e9d11f --- /dev/null +++ b/Documentation/devicetree/bindings/eeprom/st,m24lr.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/eeprom/st,m24lr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics M24LR NFC/RFID EEPROM + +maintainers: + - Abd-Alrhman Masalkhi + +description: + STMicroelectronics M24LR series are dual-interface (RF + I2C) + EEPROM chips. These devices support I2C-based access to both + memory and a system area that controls authentication and configuration. + They expose two I2C addresses, one for the system parameter sector and + one for the EEPROM. + +allOf: + - $ref: /schemas/nvmem/nvmem.yaml# + +properties: + compatible: + enum: + - st,m24lr04e-r + - st,m24lr16e-r + - st,m24lr64e-r + + reg: + items: + - description: I2C address used for control/system registers + - description: I2C address used for EEPROM memory access + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + eeprom@57 { + compatible = "st,m24lr04e-r"; + reg = <0x57>, /* primary-device */ + <0x53>; /* secondary-device */ + }; + }; +... -- cgit v1.2.3 From bb7aa579efd68c905159b03b255d1437f9f4201b Mon Sep 17 00:00:00 2001 From: Abd-Alrhman Masalkhi Date: Thu, 17 Jul 2025 06:39:34 +0000 Subject: ABI: sysfs: add documentation for ST M24LR EEPROM and control interface Add sysfs ABI documentation for the STMicroelectronics M24LR device, covering both the control interface (e.g., unlock, password update, UID, total sectors, and SSS entries) and EEPROM access via the nvmem subsystem. Signed-off-by: Abd-Alrhman Masalkhi Link: https://lore.kernel.org/r/20250717063934.5083-4-abd.masalkhi@gmail.com Signed-off-by: Greg Kroah-Hartman --- .../ABI/testing/sysfs-bus-i2c-devices-m24lr | 100 +++++++++++++++++++++ 1 file changed, 100 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-bus-i2c-devices-m24lr (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-bus-i2c-devices-m24lr b/Documentation/ABI/testing/sysfs-bus-i2c-devices-m24lr new file mode 100644 index 000000000000..7c51ce8d38ba --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-i2c-devices-m24lr @@ -0,0 +1,100 @@ +What: /sys/bus/i2c/devices/-/unlock +Date: 2025-07-04 +KernelVersion: 6.17 +Contact: Abd-Alrhman Masalkhi +Description: + Write-only attribute used to present a password and unlock + access to protected areas of the M24LR chip, including + configuration registers such as the Sector Security Status + (SSS) bytes. A valid password must be written to enable write + access to these regions via the I2C interface. + + Format: + - Hexadecimal string representing a 32-bit (4-byte) password + - Accepts 1 to 8 hex digits (e.g., "c", "1F", "a1b2c3d4") + - No "0x" prefix, whitespace, or trailing newline + - Case-insensitive + + Behavior: + - If the password matches the internal stored value, + access to protected memory/configuration is granted + - If the password does not match the internally stored value, + it will fail silently + +What: /sys/bus/i2c/devices/-/new_pass +Date: 2025-07-04 +KernelVersion: 6.17 +Contact: Abd-Alrhman Masalkhi +Description: + Write-only attribute used to update the password required to + unlock the M24LR chip. + + Format: + - Hexadecimal string representing a new 32-bit password + - Accepts 1 to 8 hex digits (e.g., "1A", "ffff", "c0ffee00") + - No "0x" prefix, whitespace, or trailing newline + - Case-insensitive + + Behavior: + - Overwrites the current password stored in the I2C password + register + - Requires the device to be unlocked before changing the + password + - If the device is locked, the write silently fails + +What: /sys/bus/i2c/devices/-/uid +Date: 2025-07-04 +KernelVersion: 6.17 +Contact: Abd-Alrhman Masalkhi +Description: + Read-only attribute that exposes the 8-byte unique identifier + programmed into the M24LR chip at the factory. + + Format: + - Lowercase hexadecimal string representing a 64-bit value + - 1 to 16 hex digits (e.g., "e00204f12345678") + - No "0x" prefix + - Includes a trailing newline + +What: /sys/bus/i2c/devices/-/total_sectors +Date: 2025-07-04 +KernelVersion: 6.17 +Contact: Abd-Alrhman Masalkhi +Description: + Read-only attribute that exposes the total number of EEPROM + sectors available in the M24LR chip. + + Format: + - 1 to 2 hex digits (e.g. "F") + - No "0x" prefix + - Includes a trailing newline + + Notes: + - Value is encoded by the chip and corresponds to the EEPROM + size (e.g., 3 = 4 kbit for M24LR04E-R) + +What: /sys/bus/i2c/devices/-/sss +Date: 2025-07-04 +KernelVersion: 6.17 +Contact: Abd-Alrhman Masalkhi +Description: + Read/write binary attribute representing the Sector Security + Status (SSS) bytes for all EEPROM sectors in STMicroelectronics + M24LR chips. + + Each EEPROM sector has one SSS byte, which controls I2C and + RF access through protection bits and optional password + authentication. + + Format: + - The file contains one byte per EEPROM sector + - Byte at offset N corresponds to sector N + - Binary access only; use tools like dd, Python, or C that + support byte-level I/O and offset control. + + Notes: + - The number of valid bytes in this file is equal to the + value exposed by 'total_sectors' file + - Write access requires prior password authentication in + I2C mode + - Refer to the M24LR datasheet for full SSS bit layout -- cgit v1.2.3 From 63740349eba78f242bcbf60d5244d7f2b2600853 Mon Sep 17 00:00:00 2001 From: Li Li Date: Sun, 27 Jul 2025 18:29:06 +0000 Subject: binder: introduce transaction reports via netlink Introduce a generic netlink multicast event to report binder transaction failures to userspace. This allows subscribers to monitor these events and take appropriate actions, such as stopping a misbehaving application that is spamming a service with huge amount of transactions. The multicast event contains full details of the failed transactions, including the sender/target PIDs, payload size and specific error code. This interface is defined using a YAML spec, from which the UAPI and kernel headers and source are auto-generated. Signed-off-by: Li Li Signed-off-by: Carlos Llamas Link: https://lore.kernel.org/r/20250727182932.2499194-4-cmllamas@google.com Signed-off-by: Greg Kroah-Hartman --- Documentation/netlink/specs/binder.yaml | 93 +++++++++++++++++++++++++++++++++ 1 file changed, 93 insertions(+) create mode 100644 Documentation/netlink/specs/binder.yaml (limited to 'Documentation') diff --git a/Documentation/netlink/specs/binder.yaml b/Documentation/netlink/specs/binder.yaml new file mode 100644 index 000000000000..140b77a6afee --- /dev/null +++ b/Documentation/netlink/specs/binder.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) +# +# Copyright 2025 Google LLC +# +--- +name: binder +protocol: genetlink +uapi-header: linux/android/binder_netlink.h +doc: Binder interface over generic netlink + +attribute-sets: + - + name: report + doc: | + Attributes included within a transaction failure report. The elements + correspond directly with the specific transaction that failed, along + with the error returned to the sender e.g. BR_DEAD_REPLY. + + attributes: + - + name: error + type: u32 + doc: The enum binder_driver_return_protocol returned to the sender. + - + name: context + type: string + doc: The binder context where the transaction occurred. + - + name: from_pid + type: u32 + doc: The PID of the sender process. + - + name: from_tid + type: u32 + doc: The TID of the sender thread. + - + name: to_pid + type: u32 + doc: | + The PID of the recipient process. This attribute may not be present + if the target could not be determined. + - + name: to_tid + type: u32 + doc: | + The TID of the recipient thread. This attribute may not be present + if the target could not be determined. + - + name: is_reply + type: flag + doc: When present, indicates the failed transaction is a reply. + - + name: flags + type: u32 + doc: The bitmask of enum transaction_flags from the transaction. + - + name: code + type: u32 + doc: The application-defined code from the transaction. + - + name: data_size + type: u32 + doc: The transaction payload size in bytes. + +operations: + list: + - + name: report + doc: | + A multicast event sent to userspace subscribers to notify them about + binder transaction failures. The generated report provides the full + details of the specific transaction that failed. The intention is for + programs to monitor these events and react to the failures as needed. + + attribute-set: report + mcgrp: report + event: + attributes: + - error + - context + - from_pid + - from_tid + - to_pid + - to_tid + - is_reply + - flags + - code + - data_size + +mcast-groups: + list: + - + name: report -- cgit v1.2.3 From 15e3363af00a9e5b4f5c10b17940733a8613ef57 Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Tue, 12 Aug 2025 16:24:40 -0500 Subject: dt-bindings: pinctrl: Document Tegra186 pin controllers Tegra186 contains two pin controllers. Document their compatible strings and describe the list of pins and functions that they provide. Reviewed-by: Rob Herring (Arm) Signed-off-by: Aaron Kling Link: https://lore.kernel.org/20250812-tegra186-pinctrl-v3-1-115714eeecb1@gmail.com Signed-off-by: Linus Walleij --- .../bindings/pinctrl/nvidia,tegra186-pinmux.yaml | 285 +++++++++++++++++++++ 1 file changed, 285 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/nvidia,tegra186-pinmux.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra186-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra186-pinmux.yaml new file mode 100644 index 000000000000..ac764d0ac4b6 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra186-pinmux.yaml @@ -0,0 +1,285 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra186-pinmux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra186 Pinmux Controller + +maintainers: + - Thierry Reding + - Jon Hunter + +properties: + compatible: + enum: + - nvidia,tegra186-pinmux + - nvidia,tegra186-pinmux-aon + + reg: + items: + - description: pinmux registers + +patternProperties: + "^pinmux(-[a-z0-9-]+)?$": + type: object + + # pin groups + additionalProperties: + $ref: nvidia,tegra-pinmux-common.yaml + unevaluatedProperties: false + properties: + nvidia,function: + enum: [ aud, can0, can1, ccla, dca, dcb, dcc, directdc, directdc1, + displaya, displayb, dmic1, dmic2, dmic3, dmic4, dmic5, dp, + dspk0, dspk1, dtv, eqos, extperiph1, extperiph2, extperiph3, + extperiph4, gp, gpio, hdmi, i2c1, i2c2, i2c3, i2c5, i2c7, + i2c8, i2c9, i2s1, i2s2, i2s3, i2s4, i2s5, i2s6, iqc0, iqc1, + nv, pe, pe0, pe1, pe2, qspi, rsvd0, rsvd1, rsvd2, rsvd3, + sata, sce, sdmmc1, sdmmc2, sdmmc3, sdmmc4, soc, spdif, spi1, + spi2, spi3, spi4, touch, uarta, uartb, uartc, uartd, uarte, + uartf, uartg, ufs0, usb, vgp1, vgp2, vgp3, vgp4, vgp5, vgp6, + wdt ] + + nvidia,pull: true + nvidia,tristate: true + nvidia,schmitt: true + nvidia,enable-input: true + nvidia,open-drain: true + nvidia,lock: true + nvidia,drive-type: true + nvidia,io-hv: true + + required: + - nvidia,pins + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + const: nvidia,tegra186-pinmux + then: + patternProperties: + "^pinmux(-[a-z0-9-]+)?$": + type: object + additionalProperties: + properties: + nvidia,pins: + description: An array of strings. Each string contains the name + of a pin or group. Valid values for these names are listed + below. + items: + enum: [ pex_l0_rst_n_pa0, pex_l0_clkreq_n_pa1, + pex_wake_n_pa2, pex_l1_rst_n_pa3, + pex_l1_clkreq_n_pa4, pex_l2_rst_n_pa5, + pex_l2_clkreq_n_pa6, uart4_tx_pb0, uart4_rx_pb1, + uart4_rts_pb2, uart4_cts_pb3, gpio_wan1_pb4, + gpio_wan2_pb5, gpio_wan3_pb6, gpio_wan4_pc0, + dap2_sclk_pc1, dap2_dout_pc2, dap2_din_pc3, + dap2_fs_pc4, gen1_i2c_scl_pc5, gen1_i2c_sda_pc6, + sdmmc1_clk_pd0, sdmmc1_cmd_pd1, sdmmc1_dat0_pd2, + sdmmc1_dat1_pd3, sdmmc1_dat2_pd4, sdmmc1_dat3_pd5, + eqos_txc_pe0, eqos_td0_pe1, eqos_td1_pe2, + eqos_td2_pe3, eqos_td3_pe4, eqos_tx_ctl_pe5, + eqos_rd0_pe6, eqos_rd1_pe7, eqos_rd2_pf0, + eqos_rd3_pf1, eqos_rx_ctl_pf2, eqos_rxc_pf3, + eqos_mdio_pf4, eqos_mdc_pf5, sdmmc3_clk_pg0, + sdmmc3_cmd_pg1, sdmmc3_dat0_pg2, sdmmc3_dat1_pg3, + sdmmc3_dat2_pg4, sdmmc3_dat3_pg5, gpio_wan5_ph0, + gpio_wan6_ph1, gpio_wan7_ph2, gpio_wan8_ph3, + bcpu_pwr_req_ph4, mcpu_pwr_req_ph5, gpu_pwr_req_ph6, + gpio_pq0_pi0, gpio_pq1_pi1, gpio_pq2_pi2, + gpio_pq3_pi3, gpio_pq4_pi4, gpio_pq5_pi5, + gpio_pq6_pi6, gpio_pq7_pi7, dap1_sclk_pj0, + dap1_dout_pj1, dap1_din_pj2, dap1_fs_pj3, + aud_mclk_pj4, gpio_aud0_pj5, gpio_aud1_pj6, + gpio_aud2_pj7, gpio_aud3_pk0, gen7_i2c_scl_pl0, + gen7_i2c_sda_pl1, gen9_i2c_scl_pl2, gen9_i2c_sda_pl3, + usb_vbus_en0_pl4, usb_vbus_en1_pl5, gp_pwm6_pl6, + gp_pwm7_pl7, dmic1_dat_pm0, dmic1_clk_pm1, + dmic2_dat_pm2, dmic2_clk_pm3, dmic4_dat_pm4, + dmic4_clk_pm5, gpio_cam1_pn0, gpio_cam2_pn1, + gpio_cam3_pn2, gpio_cam4_pn3, gpio_cam6_pn5, + gpio_cam7_pn6, extperiph1_clk_po0, + extperiph2_clk_po1, cam_i2c_scl_po2, cam_i2c_sda_po3, + dp_aux_ch0_hpd_pp0, dp_aux_ch1_hpd_pp1, hdmi_cec_pp2, + gpio_edp0_pp3, gpio_edp1_pp4, gpio_edp2_pp5, + gpio_edp3_pp6, directdc1_clk_pq0, directdc1_in_pq1, + directdc1_out0_pq2, directdc1_out1_pq3, + directdc1_out2_pq4, directdc1_out3_pq5, + qspi_sck_pr0, qspi_io0_pr1, qspi_io1_pr2, + qspi_io2_pr3, qspi_io3_pr4, qspi_cs_n_pr5, + uart1_tx_pt0, uart1_rx_pt1, uart1_rts_pt2, + uart1_cts_pt3, uart2_tx_px0, uart2_rx_px1, + uart2_rts_px2, uart2_cts_px3, uart5_tx_px4, + uart5_rx_px5, uart5_rts_px6, uart5_cts_px7, + gpio_mdm1_py0, gpio_mdm2_py1, gpio_mdm3_py2, + gpio_mdm4_py3, gpio_mdm5_py4, gpio_mdm6_py5, + gpio_mdm7_py6, ufs0_ref_clk_pbb0, ufs0_rst_pbb1, + dap4_sclk_pcc0, dap4_dout_pcc1, dap4_din_pcc2, + dap4_fs_pcc3, directdc_comp, sdmmc1_comp, eqos_comp, + sdmmc3_comp, qspi_comp, + # drive groups + drive_gpio_aud3_pk0, drive_gpio_aud2_pj7, + drive_gpio_aud1_pj6, drive_gpio_aud0_pj5, + drive_aud_mclk_pj4, drive_dap1_fs_pj3, + drive_dap1_din_pj2, drive_dap1_dout_pj1, + drive_dap1_sclk_pj0, drive_dmic1_clk_pm1, + drive_dmic1_dat_pm0, drive_dmic2_dat_pm2, + drive_dmic2_clk_pm3, drive_dmic4_dat_pm4, + drive_dmic4_clk_pm5, drive_dap4_fs_pcc3, + drive_dap4_din_pcc2, drive_dap4_dout_pcc1, + drive_dap4_sclk_pcc0, drive_extperiph2_clk_po1, + drive_extperiph1_clk_po0, drive_cam_i2c_sda_po3, + drive_cam_i2c_scl_po2, drive_gpio_cam1_pn0, + drive_gpio_cam2_pn1, drive_gpio_cam3_pn2, + drive_gpio_cam4_pn3, drive_gpio_cam5_pn4, + drive_gpio_cam6_pn5, drive_gpio_cam7_pn6, + drive_dap2_din_pc3, drive_dap2_dout_pc2, + drive_dap2_fs_pc4, drive_dap2_sclk_pc1, + drive_uart4_cts_pb3, drive_uart4_rts_pb2, + drive_uart4_rx_pb1, drive_uart4_tx_pb0, + drive_gpio_wan4_pc0, drive_gpio_wan3_pb6, + drive_gpio_wan2_pb5, drive_gpio_wan1_pb4, + drive_gen1_i2c_scl_pc5, drive_gen1_i2c_sda_pc6, + drive_uart1_cts_pt3, drive_uart1_rts_pt2, + drive_uart1_rx_pt1, drive_uart1_tx_pt0, + drive_directdc1_out3_pq5, drive_directdc1_out2_pq4, + drive_directdc1_out1_pq3, drive_directdc1_out0_pq2, + drive_directdc1_in_pq1, drive_directdc1_clk_pq0, + drive_gpio_pq0_pi0, drive_gpio_pq1_pi1, + drive_gpio_pq2_pi2, drive_gpio_pq3_pi3, + drive_gpio_pq4_pi4, drive_gpio_pq5_pi5, + drive_gpio_pq6_pi6, drive_gpio_pq7_pi7, + drive_gpio_edp2_pp5, drive_gpio_edp3_pp6, + drive_gpio_edp0_pp3, drive_gpio_edp1_pp4, + drive_dp_aux_ch0_hpd_pp0, drive_dp_aux_ch1_hpd_pp1, + drive_hdmi_cec_pp2, drive_pex_l2_clkreq_n_pa6, + drive_pex_wake_n_pa2, drive_pex_l1_clkreq_n_pa4, + drive_pex_l1_rst_n_pa3, drive_pex_l0_clkreq_n_pa1, + drive_pex_l0_rst_n_pa0, drive_pex_l2_rst_n_pa5, + drive_sdmmc1_clk_pd0, drive_sdmmc1_cmd_pd1, + drive_sdmmc1_dat3_pd5, drive_sdmmc1_dat2_pd4, + drive_sdmmc1_dat1_pd3, drive_sdmmc1_dat0_pd2, + drive_eqos_td3_pe4, drive_eqos_td2_pe3, + drive_eqos_td1_pe2, drive_eqos_td0_pe1, + drive_eqos_rd3_pf1, drive_eqos_rd2_pf0, + drive_eqos_rd1_pe7, drive_eqos_mdio_pf4, + drive_eqos_rd0_pe6, drive_eqos_mdc_pf5, + drive_eqos_txc_pe0, drive_eqos_rxc_pf3, + drive_eqos_tx_ctl_pe5, drive_eqos_rx_ctl_pf2, + drive_sdmmc3_dat3_pg5, drive_sdmmc3_dat2_pg4, + drive_sdmmc3_dat1_pg3, drive_sdmmc3_dat0_pg2, + drive_sdmmc3_cmd_pg1, drive_sdmmc3_clk_pg0, + drive_qspi_io3_pr4, drive_qspi_io2_pr3, + drive_qspi_io1_pr2, drive_qspi_io0_pr1, + drive_qspi_sck_pr0, drive_qspi_cs_n_pr5, + drive_gpio_wan8_ph3, drive_gpio_wan7_ph2, + drive_gpio_wan6_ph1, drive_gpio_wan5_ph0, + drive_uart2_tx_px0, drive_uart2_rx_px1, + drive_uart2_rts_px2, drive_uart2_cts_px3, + drive_uart5_rx_px5, drive_uart5_tx_px4, + drive_uart5_rts_px6, drive_uart5_cts_px7, + drive_gpio_mdm1_py0, drive_gpio_mdm2_py1, + drive_gpio_mdm3_py2, drive_gpio_mdm4_py3, + drive_gpio_mdm5_py4, drive_gpio_mdm6_py5, + drive_gpio_mdm7_py6, drive_bcpu_pwr_req_ph4, + drive_mcpu_pwr_req_ph5, drive_gpu_pwr_req_ph6, + drive_gen7_i2c_scl_pl0, drive_gen7_i2c_sda_pl1, + drive_gen9_i2c_sda_pl3, drive_gen9_i2c_scl_pl2, + drive_usb_vbus_en0_pl4, drive_usb_vbus_en1_pl5, + drive_gp_pwm7_pl7, drive_gp_pwm6_pl6, + drive_ufs0_rst_pbb1, drive_ufs0_ref_clk_pbb0, + drive_directdc_comp, drive_sdmmc1_comp, + drive_eqos_comp, drive_sdmmc3_comp, drive_sdmmc4_clk, + drive_sdmmc4_cmd, drive_sdmmc4_dqs, + drive_sdmmc4_dat7, drive_sdmmc4_dat6, + drive_sdmmc4_dat5, drive_sdmmc4_dat4, + drive_sdmmc4_dat3, drive_sdmmc4_dat2, + drive_sdmmc4_dat1, drive_sdmmc4_dat0, + drive_qspi_comp ] + + - if: + properties: + compatible: + const: nvidia,tegra186-pinmux-aon + then: + patternProperties: + "^pinmux(-[a-z0-9-]+)?$": + type: object + additionalProperties: + properties: + nvidia,pins: + items: + enum: [ pwr_i2c_scl_ps0, pwr_i2c_sda_ps1, batt_oc_ps2, + safe_state_ps3, vcomp_alert_ps4, gpio_dis0_pu0, + gpio_dis1_pu1, gpio_dis2_pu2, gpio_dis3_pu3, + gpio_dis4_pu4, gpio_dis5_pu5, gpio_sen0_pv0, + gpio_sen1_pv1, gpio_sen2_pv2, gpio_sen3_pv3, + gpio_sen4_pv4, gpio_sen5_pv5, gpio_sen6_pv6, + gpio_sen7_pv7, gen8_i2c_scl_pw0, gen8_i2c_sda_pw1, + uart3_tx_pw2, uart3_rx_pw3, uart3_rts_pw4, + uart3_cts_pw5, uart7_tx_pw6, uart7_rx_pw7, + can1_dout_pz0, can1_din_pz1, can0_dout_pz2, + can0_din_pz3, can_gpio0_paa0, can_gpio1_paa1, + can_gpio2_paa2, can_gpio3_paa3, can_gpio4_paa4, + can_gpio5_paa5, can_gpio6_paa6, can_gpio7_paa7, + gpio_sen8_pee0, gpio_sen9_pee1, touch_clk_pee2, + power_on_pff0, gpio_sw1_pff1, gpio_sw2_pff2, + gpio_sw3_pff3, gpio_sw4_pff4, shutdown, pmu_int, + soc_pwr_req, clk_32k_in, + # drive groups + drive_touch_clk_pee2, drive_uart3_cts_pw5, + drive_uart3_rts_pw4, drive_uart3_rx_pw3, + drive_uart3_tx_pw2, drive_gen8_i2c_sda_pw1, + drive_gen8_i2c_scl_pw0, drive_uart7_rx_pw7, + drive_uart7_tx_pw6, drive_gpio_sen0_pv0, + drive_gpio_sen1_pv1, drive_gpio_sen2_pv2, + drive_gpio_sen3_pv3, drive_gpio_sen4_pv4, + drive_gpio_sen5_pv5, drive_gpio_sen6_pv6, + drive_gpio_sen7_pv7, drive_gpio_sen8_pee0, + drive_gpio_sen9_pee1, drive_can_gpio7_paa7, + drive_can1_dout_pz0, drive_can1_din_pz1, + drive_can0_dout_pz2, drive_can0_din_pz3, + drive_can_gpio0_paa0, drive_can_gpio1_paa1, + drive_can_gpio2_paa2, drive_can_gpio3_paa3, + drive_can_gpio4_paa4, drive_can_gpio5_paa5, + drive_can_gpio6_paa6, drive_gpio_sw1_pff1, + drive_gpio_sw2_pff2, drive_gpio_sw3_pff3, + drive_gpio_sw4_pff4, drive_shutdown, drive_pmu_int, + drive_safe_state_ps3, drive_vcomp_alert_ps4, + drive_soc_pwr_req, drive_batt_oc_ps2, + drive_clk_32k_in, drive_power_on_pff0, + drive_pwr_i2c_scl_ps0, drive_pwr_i2c_sda_ps1, + drive_gpio_dis0_pu0, drive_gpio_dis1_pu1, + drive_gpio_dis2_pu2, drive_gpio_dis3_pu3, + drive_gpio_dis4_pu4, drive_gpio_dis5_pu5 ] + +required: + - compatible + - reg + +examples: + - | + #include + + pinmux@2430000 { + compatible = "nvidia,tegra186-pinmux"; + reg = <0x2430000 0x15000>; + + pinctrl-names = "jetson_io"; + pinctrl-0 = <&jetson_io_pinmux>; + + jetson_io_pinmux: pinmux { + hdr40-pin7 { + nvidia,pins = "aud_mclk_pj4"; + nvidia,function = "aud"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + }; + }; +... -- cgit v1.2.3 From 29a799917947d24c55e8902ef29f5cb52195682c Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Tue, 5 Aug 2025 09:47:39 +0200 Subject: dt-bindings: power: mediatek: Document access-controllers property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Allow specifying access-controllers in the main power controller node and deprecate the old mediatek,infracfg, mediatek,infracfg-nao and mediatek,smi properties located in the children. This is done in order to both simplify the power controller nodes and in preparation for adding support for new generation SoCs like MT8196/MT6991 and other variants, which will need to set protection on new busses. Reviewed-by: Nícolas F. R. A. Prado Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250805074746.29457-4-angelogioacchino.delregno@collabora.com Signed-off-by: Ulf Hansson --- .../bindings/power/mediatek,power-controller.yaml | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml index 9c7cc632abee..500d98921581 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -44,6 +44,15 @@ properties: '#size-cells': const: 0 + access-controllers: + description: + A number of phandles to external blocks to set and clear the required + bits to enable or disable bus protection, necessary to avoid any bus + faults while enabling or disabling a power domain. + For example, this may hold phandles to INFRACFG and SMI. + minItems: 1 + maxItems: 3 + patternProperties: "^power-domain@[0-9a-f]+$": $ref: "#/$defs/power-domain-node" @@ -123,14 +132,17 @@ $defs: mediatek,infracfg: $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the device containing the INFRACFG register range. + deprecated: true mediatek,infracfg-nao: $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the device containing the INFRACFG-NAO register range. + deprecated: true mediatek,smi: $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the device containing the SMI register range. + deprecated: true required: - reg @@ -138,6 +150,31 @@ $defs: required: - compatible +allOf: + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8183-power-controller + then: + properties: + access-controllers: + minItems: 2 + maxItems: 2 + + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8365-power-controller + then: + properties: + access-controllers: + minItems: 3 + maxItems: 3 + additionalProperties: false examples: -- cgit v1.2.3 From 0106b6c114cf8b77d801d9e280b221f8b4d5595b Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 3 Jul 2025 14:08:46 +0200 Subject: dt-bindings: PCI: mediatek-gen3: Add support for MT6991/MT8196 Add compatible strings for MT8196 and MT6991 (which are fully compatible between each other) and clock definitions. These new SoCs don't have tl_96m and tl_32k clocks, but need an AHB to APB bus clock and a low power clock. Signed-off-by: AngeloGioacchino Del Regno [mani: changed 'maxItems' to 'minItems' for reset] Signed-off-by: Manivannan Sadhasivam Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250703120847.121826-3-angelogioacchino.delregno@collabora.com --- .../bindings/pci/mediatek-pcie-gen3.yaml | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml index 162406e0691a..0278845701ce 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml @@ -52,7 +52,12 @@ properties: - mediatek,mt8188-pcie - mediatek,mt8195-pcie - const: mediatek,mt8192-pcie + - items: + - enum: + - mediatek,mt6991-pcie + - const: mediatek,mt8196-pcie - const: mediatek,mt8192-pcie + - const: mediatek,mt8196-pcie - const: airoha,en7581-pcie reg: @@ -212,6 +217,36 @@ allOf: mediatek,pbus-csr: false + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8196-pcie + then: + properties: + clocks: + minItems: 6 + + clock-names: + items: + - const: pl_250m + - const: tl_26m + - const: bus + - const: low_power + - const: peri_26m + - const: peri_mem + + resets: + minItems: 2 + + reset-names: + items: + - const: phy + - const: mac + + mediatek,pbus-csr: false + - if: properties: compatible: -- cgit v1.2.3 From ec0be3cdf40b5302248f3fb27a911cc630e8b855 Mon Sep 17 00:00:00 2001 From: Javier Carrasco Date: Tue, 19 Aug 2025 12:25:43 +0800 Subject: regulator: consumer.rst: document bulk operations The current consumer documentation does not include bulk operations, providing an example of how to acquire multiple regulators by calling regulator_get() multiple times. That solution is valid and slightly simpler for a small amount of regulators, but it does not scale well. Document the bulk operations to get, enable and disable regulators. Signed-off-by: Javier Carrasco Link: https://patch.msgid.link/20250819-reg_consumer_doc-v1-1-b631fc0d35a3@gmail.com Signed-off-by: Mark Brown --- Documentation/power/regulator/consumer.rst | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/power/regulator/consumer.rst b/Documentation/power/regulator/consumer.rst index 9d2416f63f6e..c01675b25a90 100644 --- a/Documentation/power/regulator/consumer.rst +++ b/Documentation/power/regulator/consumer.rst @@ -23,10 +23,18 @@ To release the regulator the consumer driver should call :: regulator_put(regulator); Consumers can be supplied by more than one regulator e.g. codec consumer with -analog and digital supplies :: +analog and digital supplies by means of bulk operations :: + + struct regulator_bulk_data supplies[2]; + + supplies[0].supply = "Vcc"; /* digital core */ + supplies[1].supply = "Avdd"; /* analog */ + + ret = regulator_bulk_get(dev, ARRAY_SIZE(supplies), supplies); + + // convenience helper to call regulator_put() on multiple regulators + regulator_bulk_free(ARRAY_SIZE(supplies), supplies); - digital = regulator_get(dev, "Vcc"); /* digital core */ - analog = regulator_get(dev, "Avdd"); /* analog */ The regulator access functions regulator_get() and regulator_put() will usually be called in your device drivers probe() and remove() respectively. @@ -51,11 +59,21 @@ A consumer can determine if a regulator is enabled by calling:: This will return > zero when the regulator is enabled. +A set of regulators can be enabled with a single bulk operation :: + + int regulator_bulk_enable(int num_consumers, + struct regulator_bulk_data *consumers); + A consumer can disable its supply when no longer needed by calling:: int regulator_disable(regulator); +Or a number of them :: + + int regulator_bulk_disable(int num_consumers, + struct regulator_bulk_data *consumers); + NOTE: This may not disable the supply if it's shared with other consumers. The regulator will only be disabled when the enabled reference count is zero. @@ -64,11 +82,15 @@ Finally, a regulator can be forcefully disabled in the case of an emergency:: int regulator_force_disable(regulator); +This operation is also supported for multiple regulators :: + + int regulator_bulk_force_disable(int num_consumers, + struct regulator_bulk_data *consumers); + NOTE: this will immediately and forcefully shutdown the regulator output. All consumers will be powered off. - 3. Regulator Voltage Control & Status (dynamic drivers) ======================================================= -- cgit v1.2.3 From 2f3dd6ec901f29aef5fff3d7a63b1371d67c1760 Mon Sep 17 00:00:00 2001 From: Eric Biggers Date: Mon, 18 Aug 2025 13:54:25 -0700 Subject: sctp: Convert cookie authentication to use HMAC-SHA256 Convert SCTP cookies to use HMAC-SHA256, instead of the previous choice of the legacy algorithms HMAC-MD5 and HMAC-SHA1. Simplify and optimize the code by using the HMAC-SHA256 library instead of crypto_shash, and by preparing the HMAC key when it is generated instead of per-operation. This doesn't break compatibility, since the cookie format is an implementation detail, not part of the SCTP protocol itself. Note that the cookie size doesn't change either. The HMAC field was already 32 bytes, even though previously at most 20 bytes were actually compared. 32 bytes exactly fits an untruncated HMAC-SHA256 value. So, although we could safely truncate the MAC to something slightly shorter, for now just keep the cookie size the same. I also considered SipHash, but that would generate only 8-byte MACs. An 8-byte MAC *might* suffice here. However, there's quite a lot of information in the SCTP cookies: more than in TCP SYN cookies. So absent an analysis that occasional forgeries of all that information is okay in SCTP, I errored on the side of caution. Remove HMAC-MD5 and HMAC-SHA1 as options, since the new HMAC-SHA256 option is just better. It's faster as well as more secure. For example, benchmarking on x86_64, cookie authentication is now nearly 3x as fast as the previous default choice and implementation of HMAC-MD5. Also just make the kernel always support cookie authentication if SCTP is supported at all, rather than making it optional in the build. (It was sort of optional before, but it didn't really work properly. E.g., a kernel with CONFIG_SCTP_COOKIE_HMAC_MD5=n still supported HMAC-MD5 cookie authentication if CONFIG_CRYPTO_HMAC and CONFIG_CRYPTO_MD5 happened to be enabled in the kconfig for other reasons.) Acked-by: Xin Long Signed-off-by: Eric Biggers Link: https://patch.msgid.link/20250818205426.30222-5-ebiggers@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/networking/ip-sysctl.rst | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/ip-sysctl.rst b/Documentation/networking/ip-sysctl.rst index 9756d16e3df1..3d6782683eee 100644 --- a/Documentation/networking/ip-sysctl.rst +++ b/Documentation/networking/ip-sysctl.rst @@ -3508,16 +3508,13 @@ cookie_hmac_alg - STRING a listening sctp socket to a connecting client in the INIT-ACK chunk. Valid values are: - * md5 - * sha1 + * sha256 * none - Ability to assign md5 or sha1 as the selected alg is predicated on the - configuration of those algorithms at build time (CONFIG_CRYPTO_MD5 and - CONFIG_CRYPTO_SHA1). + md5 and sha1 are also accepted for backwards compatibility, but cause + sha256 to be selected. - Default: Dependent on configuration. MD5 if available, else SHA1 if - available, else none. + Default: sha256 rcvbuf_policy - INTEGER Determines if the receive buffer is attributed to the socket or to -- cgit v1.2.3 From d5a253702add0da3e1e19252ae2a251ee24b486d Mon Sep 17 00:00:00 2001 From: Eric Biggers Date: Mon, 18 Aug 2025 13:54:26 -0700 Subject: sctp: Stop accepting md5 and sha1 for net.sctp.cookie_hmac_alg The upgrade of the cookie authentication algorithm to HMAC-SHA256 kept some backwards compatibility for the net.sctp.cookie_hmac_alg sysctl by still accepting the values 'md5' and 'sha1'. Those algorithms are no longer actually used, but rather those values were just treated as requests to enable cookie authentication. As requested at https://lore.kernel.org/netdev/CADvbK_fmCRARc8VznH8cQa-QKaCOQZ6yFbF=1-VDK=zRqv_cXw@mail.gmail.com/ and https://lore.kernel.org/netdev/20250818084345.708ac796@kernel.org/ , go further and start rejecting 'md5' and 'sha1' completely. Signed-off-by: Eric Biggers Link: https://patch.msgid.link/20250818205426.30222-6-ebiggers@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/networking/ip-sysctl.rst | 3 --- 1 file changed, 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/ip-sysctl.rst b/Documentation/networking/ip-sysctl.rst index 3d6782683eee..43badb338d22 100644 --- a/Documentation/networking/ip-sysctl.rst +++ b/Documentation/networking/ip-sysctl.rst @@ -3511,9 +3511,6 @@ cookie_hmac_alg - STRING * sha256 * none - md5 and sha1 are also accepted for backwards compatibility, but cause - sha256 to be selected. - Default: sha256 rcvbuf_policy - INTEGER -- cgit v1.2.3 From 566c269873c642856bceced2add800d2ce8b8c94 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Goran=20Ra=C4=91enovi=C4=87?= Date: Wed, 16 Jul 2025 17:48:05 +0200 Subject: dt-bindings: arm: imx8mp: Add Ultratronik Ultra-MACH SBC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Document the Ultratronik Ultra-MACH SBC, based on the NXP i.MX8MP SoC. This board is manufactured by Ultratronik GmbH and uses the compatible string "ux,imx8mp-ultra-mach-sbc". Acked-by: Krzysztof Kozlowski Signed-off-by: Goran Rađenović Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index a3e9f9e0735a..839f428c9f75 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1112,6 +1112,7 @@ properties: - skov,imx8mp-skov-revb-mi1010ait-1cp1 # SKOV i.MX8MP climate control with 10.1" panel - skov,imx8mp-skov-revc-bd500 # SKOV i.MX8MP climate control with LED frontplate - skov,imx8mp-skov-revc-tian-g07017 # SKOV i.MX8MP climate control with 7" panel + - ultratronik,imx8mp-ultra-mach-sbc # Ultratronik SBC i.MX8MP based board - ysoft,imx8mp-iota2-lumpy # Y Soft i.MX8MP IOTA2 Lumpy Board - const: fsl,imx8mp -- cgit v1.2.3 From 04113322406b4763677922f80ba5ab44a8dae7bb Mon Sep 17 00:00:00 2001 From: Jihed Chaibi Date: Tue, 19 Aug 2025 22:13:01 +0200 Subject: ASoC: dt-bindings: ti,twl4030-audio: convert to DT schema Convert the TWL4030 audio module bindings from txt to YAML format and move them to the sound subsystem bindings directory. This patch also refines the schema by adding an enum constraint for ti,enable-vibra and updates the example to remove irrelevant I2C clock-frequency property. Signed-off-by: Jihed Chaibi Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250819201302.80712-2-jihed.chaibi.dev@gmail.com Signed-off-by: Mark Brown --- .../devicetree/bindings/mfd/twl4030-audio.txt | 46 ----------- .../bindings/sound/ti,twl4030-audio.yaml | 90 ++++++++++++++++++++++ 2 files changed, 90 insertions(+), 46 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mfd/twl4030-audio.txt create mode 100644 Documentation/devicetree/bindings/sound/ti,twl4030-audio.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/twl4030-audio.txt b/Documentation/devicetree/bindings/mfd/twl4030-audio.txt deleted file mode 100644 index 414d2ae0adf6..000000000000 --- a/Documentation/devicetree/bindings/mfd/twl4030-audio.txt +++ /dev/null @@ -1,46 +0,0 @@ -Texas Instruments TWL family (twl4030) audio module - -The audio module inside the TWL family consist of an audio codec and a vibra -driver. - -Required properties: -- compatible : must be "ti,twl4030-audio" - -Optional properties, nodes: - -Audio functionality: -- codec { }: Need to be present if the audio functionality is used. Within this - section the following options can be used: -- ti,digimic_delay: Delay need after enabling the digimic to reduce artifacts - from the start of the recorded sample (in ms) --ti,ramp_delay_value: HS ramp delay configuration to reduce pop noise --ti,hs_extmute: Use external mute for HS pop reduction --ti,hs_extmute_gpio: Use external GPIO to control the external mute --ti,offset_cncl_path: Offset cancellation path selection, refer to TRM for the - valid values. - -Vibra functionality -- ti,enable-vibra: Need to be set to <1> if the vibra functionality is used. if - missing or it is 0, the vibra functionality is disabled. - -Example: -&i2c1 { - clock-frequency = <2600000>; - - twl: twl@48 { - reg = <0x48>; - interrupts = <7>; /* SYS_NIRQ cascaded to intc */ - interrupt-parent = <&intc>; - - twl_audio: audio { - compatible = "ti,twl4030-audio"; - - ti,enable-vibra = <1>; - - codec { - ti,ramp_delay_value = <3>; - }; - - }; - }; -}; diff --git a/Documentation/devicetree/bindings/sound/ti,twl4030-audio.yaml b/Documentation/devicetree/bindings/sound/ti,twl4030-audio.yaml new file mode 100644 index 000000000000..c9c3f7513ad4 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/ti,twl4030-audio.yaml @@ -0,0 +1,90 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/ti,twl4030-audio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments TWL4030-family Audio Module + +maintainers: + - Peter Ujfalusi + +description: + The audio module within the TWL4030-family of companion chips consists + of an audio codec and a vibra driver. This binding describes the parent + node for these functions. + +properties: + compatible: + const: ti,twl4030-audio + + codec: + type: object + description: Node containing properties for the audio codec functionality. + + properties: + ti,digimic_delay: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Delay in milliseconds after enabling digital microphones to reduce + artifacts. + + ti,ramp_delay_value: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Headset ramp delay configuration to reduce pop noise. + + ti,hs_extmute: + type: boolean + description: + Enable the use of an external mute for headset pop reduction. + + ti,hs_extmute_gpio: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + The GPIO specifier for the external mute control. + maxItems: 1 + + ti,offset_cncl_path: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Offset cancellation path selection. Refer to the Technical + Reference Manual for valid values. + + # The 'codec' node itself is optional, but if it exists, it can be empty. + # We don't require any of its sub-properties. + + ti,enable-vibra: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: + Enable or disable the vibra functionality. + +additionalProperties: false + +required: + - compatible + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + twl: twl@48 { + reg = <0x48>; + interrupts = <7>; /* SYS_NIRQ cascaded to intc */ + interrupt-parent = <&intc>; + + twl_audio: audio { + compatible = "ti,twl4030-audio"; + + ti,enable-vibra = <1>; + + codec { + ti,ramp_delay_value = <3>; + }; + + }; + }; + }; -- cgit v1.2.3 From c232495d28ca092d0c39b10e35d3d613bd2414ab Mon Sep 17 00:00:00 2001 From: Jihed Chaibi Date: Tue, 19 Aug 2025 22:13:02 +0200 Subject: ASoC: dt-bindings: omap-twl4030: convert to DT schema Convert the legacy TXT binding for the OMAP TWL4030 sound card to the modern YAML DT schema format. This adds formal validation and improves documentation. Acked-by: Mark Brown Signed-off-by: Jihed Chaibi Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250819201302.80712-3-jihed.chaibi.dev@gmail.com Signed-off-by: Mark Brown --- .../devicetree/bindings/sound/omap-twl4030.txt | 62 -------------- .../devicetree/bindings/sound/ti,omap-twl4030.yaml | 98 ++++++++++++++++++++++ 2 files changed, 98 insertions(+), 62 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/omap-twl4030.txt create mode 100644 Documentation/devicetree/bindings/sound/ti,omap-twl4030.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/omap-twl4030.txt b/Documentation/devicetree/bindings/sound/omap-twl4030.txt deleted file mode 100644 index f6a715e4ef43..000000000000 --- a/Documentation/devicetree/bindings/sound/omap-twl4030.txt +++ /dev/null @@ -1,62 +0,0 @@ -* Texas Instruments SoC with twl4030 based audio setups - -Required properties: -- compatible: "ti,omap-twl4030" -- ti,model: Name of the sound card (for example "omap3beagle") -- ti,mcbsp: phandle for the McBSP node - -Optional properties: -- ti,codec: phandle for the twl4030 audio node -- ti,mcbsp-voice: phandle for the McBSP node connected to the voice port of twl -- ti, jack-det-gpio: Jack detect GPIO -- ti,audio-routing: List of connections between audio components. - Each entry is a pair of strings, the first being the connection's sink, - the second being the connection's source. - If the routing is not provided all possible connection will be available - -Available audio endpoints for the audio-routing table: - -Board connectors: - * Headset Stereophone - * Earpiece Spk - * Handsfree Spk - * Ext Spk - * Main Mic - * Sub Mic - * Headset Mic - * Carkit Mic - * Digital0 Mic - * Digital1 Mic - * Line In - -twl4030 pins: - * HSOL - * HSOR - * EARPIECE - * HFL - * HFR - * PREDRIVEL - * PREDRIVER - * CARKITL - * CARKITR - * MAINMIC - * SUBMIC - * HSMIC - * DIGIMIC0 - * DIGIMIC1 - * CARKITMIC - * AUXL - * AUXR - - * Headset Mic Bias - * Mic Bias 1 /* Used for Main Mic or Digimic0 */ - * Mic Bias 2 /* Used for Sub Mic or Digimic1 */ - -Example: - -sound { - compatible = "ti,omap-twl4030"; - ti,model = "omap3beagle"; - - ti,mcbsp = <&mcbsp2>; -}; diff --git a/Documentation/devicetree/bindings/sound/ti,omap-twl4030.yaml b/Documentation/devicetree/bindings/sound/ti,omap-twl4030.yaml new file mode 100644 index 000000000000..27c7019bdc85 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/ti,omap-twl4030.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/ti,omap-twl4030.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments SoC with twl4030 based audio setups + +maintainers: + - Peter Ujfalusi + +description: + Audio setups on TI OMAP SoCs using TWL4030-family + audio codec connected via a McBSP port. + +properties: + compatible: + const: ti,omap-twl4030 + + ti,model: + $ref: /schemas/types.yaml#/definitions/string + description: Name of the sound card (for example "omap3beagle"). + + ti,mcbsp: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle for the McBSP node. + + ti,codec: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle for the twl4030 audio node. + + ti,mcbsp-voice: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to the McBSP node connected to the voice port. + + ti,jack-det-gpio: + description: GPIO specifier for jack detection. + maxItems: 1 + + ti,audio-routing: + description: | + A list of audio routing connections. Each entry is a pair of strings, + with the first being the connection's sink and the second being the + source. If not provided, all possible connections are available. + + $ref: /schemas/types.yaml#/definitions/non-unique-string-array + items: + enum: + # Board Connectors + - Headset Stereophone + - Earpiece Spk + - Handsfree Spk + - Ext Spk + - Main Mic + - Sub Mic + - Headset Mic + - Carkit Mic + - Digital0 Mic + - Digital1 Mic + - Line In + + # CODEC Pins + - HSOL + - HSOR + - EARPIECE + - HFL + - HFR + - PREDRIVEL + - PREDRIVER + - CARKITL + - CARKITR + - MAINMIC + - SUBMIC + - HSMIC + - DIGIMIC0 + - DIGIMIC1 + - CARKITMIC + - AUXL + - AUXR + + # Headset Mic Bias + - Mic Bias 1 # Used for Main Mic or Digimic0 + - Mic Bias 2 # Used for Sub Mic or Digimic1 + +required: + - compatible + - ti,model + - ti,mcbsp + +additionalProperties: false + +examples: + - | + sound { + compatible = "ti,omap-twl4030"; + ti,model = "omap3beagle"; + ti,mcbsp = <&mcbsp2>; + }; -- cgit v1.2.3 From 3bad7fe22796a420c6e16b591c37ed1bd6cc2a30 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 7 Aug 2025 18:33:19 +0200 Subject: dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp: Reference usb-switch.yaml to allow mode-switch The QMP USB3/DP Combo PHY can work in 3 modes: - DisplayPort Only - USB3 Only - USB3 + DisplayPort Combo mode In order to switch between those modes, the PHY needs to receive Type-C events, allow marking to the phy with the mode-switch property in order to allow the PHY to Type-C events. Reference usb-switch.yaml as a simpler way to allow the mode-switch property instead of duplicating the property definition. Signed-off-by: Neil Armstrong Reviewed-by: Krzysztof Kozlowski Signed-off-by: Konrad Dybcio Tested-by: Neil Armstrong # on Lenovo Thinkpad T14S Link: https://lore.kernel.org/r/20250807-topic-4ln_dp_respin-v4-1-43272d6eca92@oss.qualcomm.com Signed-off-by: Vinod Koul --- .../devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml index 38ce04c35d94..c8bc512df08b 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml @@ -73,10 +73,8 @@ properties: description: See include/dt-bindings/phy/phy-qcom-qmp.h - orientation-switch: - description: - Flag the PHY as possible handler of USB Type-C orientation switching - type: boolean + mode-switch: true + orientation-switch: true ports: $ref: /schemas/graph.yaml#/properties/ports @@ -106,6 +104,7 @@ required: - "#phy-cells" allOf: + - $ref: /schemas/usb/usb-switch.yaml# - if: properties: compatible: -- cgit v1.2.3 From ab9c8aeb2d208381a7c948ea2f753cbe8a451502 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Fri, 8 Aug 2025 22:52:05 +0100 Subject: dt-bindings: phy: renesas,usb2-phy: Add RZ/T2H and RZ/N2H support Document the USB2 PHY controller for the Renesas RZ/T2H (r9a09g077) and RZ/N2H (r9a09g087) SoCs. These SoCs share the same PHY block, which is similar to the one on RZ/G2L but differs in clocks, resets, and register bits. To account for these differences, a new compatible string `renesas,usb2-phy-r9a09g077` is introduced. The RZ/N2H SoC uses the same PHY as RZ/T2H, so it reuses the RZ/T2H compatible string as a fallback. Signed-off-by: Lad Prabhakar Acked-by: Conor Dooley Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20250808215209.3692744-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul --- .../devicetree/bindings/phy/renesas,usb2-phy.yaml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml index f45c5f039ae8..179cb4bfc424 100644 --- a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml @@ -44,6 +44,12 @@ properties: - const: renesas,usb2-phy-r9a09g056 # RZ/V2N - const: renesas,usb2-phy-r9a09g057 + - const: renesas,usb2-phy-r9a09g077 # RZ/T2H + + - items: + - const: renesas,usb2-phy-r9a09g087 # RZ/N2H + - const: renesas,usb2-phy-r9a09g077 + reg: maxItems: 1 @@ -120,6 +126,17 @@ allOf: required: - resets + - if: + properties: + compatible: + contains: + const: renesas,usb2-phy-r9a09g077 + then: + properties: + clocks: + minItems: 2 + resets: false + additionalProperties: false examples: -- cgit v1.2.3 From ce489635960a6a3fcb0abe0918994f2d8deb02ed Mon Sep 17 00:00:00 2001 From: Yongxing Mou Date: Wed, 30 Jul 2025 15:27:25 +0800 Subject: dt-bindings: phy: Add eDP PHY compatible for QCS8300 Add compatible string for the supported eDP PHY on QCS8300 platform. QCS8300 have the same eDP PHY with SA8775P. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Yongxing Mou Link: https://lore.kernel.org/r/20250730072725.1433360-1-quic_yongmou@quicinc.com Signed-off-by: Vinod Koul --- .../devicetree/bindings/phy/qcom,edp-phy.yaml | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml index 293fb6a9b1c3..eb97181cbb95 100644 --- a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml @@ -16,13 +16,18 @@ description: properties: compatible: - enum: - - qcom,sa8775p-edp-phy - - qcom,sc7280-edp-phy - - qcom,sc8180x-edp-phy - - qcom,sc8280xp-dp-phy - - qcom,sc8280xp-edp-phy - - qcom,x1e80100-dp-phy + oneOf: + - enum: + - qcom,sa8775p-edp-phy + - qcom,sc7280-edp-phy + - qcom,sc8180x-edp-phy + - qcom,sc8280xp-dp-phy + - qcom,sc8280xp-edp-phy + - qcom,x1e80100-dp-phy + - items: + - enum: + - qcom,qcs8300-edp-phy + - const: qcom,sa8775p-edp-phy reg: items: -- cgit v1.2.3 From 7a430af7d135be5042f14987bce16f6b40a3f694 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 15:33:07 -0500 Subject: dt-bindings: dma: nvidia,tegra20-apbdma: Add undocumented compatibles and "clock-names" Add the undocumented NVIDIA APBDMA compatibles and "clock-names" which are already in use. There doesn't appear to be any per compatible differences. Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250812203308.727731-1-robh@kernel.org Signed-off-by: Vinod Koul --- .../devicetree/bindings/dma/nvidia,tegra20-apbdma.yaml | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.yaml index a2ffd5209b3b..ea40c4e27a97 100644 --- a/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.yaml +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.yaml @@ -18,10 +18,17 @@ maintainers: properties: compatible: oneOf: - - const: nvidia,tegra20-apbdma + - enum: + - nvidia,tegra114-apbdma + - nvidia,tegra20-apbdma - items: - const: nvidia,tegra30-apbdma - const: nvidia,tegra20-apbdma + - items: + - enum: + - nvidia,tegra124-apbdma + - nvidia,tegra210-apbdma + - const: nvidia,tegra148-apbdma reg: maxItems: 1 @@ -32,6 +39,9 @@ properties: clocks: maxItems: 1 + clock-names: + const: dma + interrupts: description: Should contain all of the per-channel DMA interrupts in -- cgit v1.2.3 From 00798cd24f014fe55cbcdfeac4bab19ad6cd2bcb Mon Sep 17 00:00:00 2001 From: Liao Yuanhong Date: Fri, 8 Aug 2025 17:48:01 +0800 Subject: f2fs: Add bggc_io_aware to adjust the priority of BG_GC when issuing IO Currently, we have encountered some issues while testing ZUFS. In situations near the storage limit (e.g., 50GB remaining), and after simulating fragmentation by repeatedly writing and deleting data, we found that application installation and startup tests conducted after idling for a few minutes take significantly longer several times that of traditional UFS. Tracing the operations revealed that the majority of I/Os were issued by background GC, which blocks normal I/O operations. Under normal circumstances, ZUFS indeed requires more background GC and employs a more aggressive GC strategy. However, I aim to find a way to minimize the impact on regular I/O operations under these near-limit conditions. To address this, I have introduced a bggc_io_aware feature, which controls the prioritization of background GC in the presence of I/Os. This switch can be adjusted at the framework level to implement different strategies. If set to AWARE_ALL_IO, all background GC operations will be skipped during active I/O issuance. The default option remains consistent with the current strategy, ensuring no change in behavior. Signed-off-by: Liao Yuanhong Reviewed-by: Chao Yu Signed-off-by: Jaegeuk Kim --- Documentation/ABI/testing/sysfs-fs-f2fs | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs index ce189acd1908..66ee15681983 100644 --- a/Documentation/ABI/testing/sysfs-fs-f2fs +++ b/Documentation/ABI/testing/sysfs-fs-f2fs @@ -898,3 +898,16 @@ Description: - "compat": Hash-based lookup with a linear search fallback enabled - "auto:perf": lookup_mode is auto and fallback is disabled on-disk - "auto:compat": lookup_mode is auto and fallback is enabled on-disk + +What: /sys/fs/f2fs//bggc_io_aware +Date: August 2025 +Contact: "Liao Yuanhong" +Description: Used to adjust the BG_GC priority when pending IO, with a default value + of 0. Specifically, for ZUFS, the default value is 1. + + ================== ====================================================== + value description + bggc_io_aware = 0 skip background GC if there is any kind of pending IO + bggc_io_aware = 1 skip background GC if there is pending read IO + bggc_io_aware = 2 don't aware IO for background GC + ================== ====================================================== -- cgit v1.2.3 From 2141879369681ff899a6a0857eef8bded785a5b5 Mon Sep 17 00:00:00 2001 From: Chunhai Guo Date: Thu, 7 Aug 2025 21:35:01 +0800 Subject: f2fs: add reserved nodes for privileged users This patch allows privileged users to reserve nodes via the 'reserve_node' mount option, which is similar to the existing 'reserve_root' option. "-o reserve_node=" means nodes are reserved for privileged users only. Signed-off-by: Chunhai Guo Reviewed-by: Chao Yu Signed-off-by: Jaegeuk Kim --- Documentation/filesystems/f2fs.rst | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/f2fs.rst b/Documentation/filesystems/f2fs.rst index 5cad369ceb92..e06cbb823bb7 100644 --- a/Documentation/filesystems/f2fs.rst +++ b/Documentation/filesystems/f2fs.rst @@ -173,9 +173,12 @@ data_flush Enable data flushing before checkpoint in order to persist data of regular and symlink. reserve_root=%d Support configuring reserved space which is used for allocation from a privileged user with specified uid or - gid, unit: 4KB, the default limit is 0.2% of user blocks. -resuid=%d The user ID which may use the reserved blocks. -resgid=%d The group ID which may use the reserved blocks. + gid, unit: 4KB, the default limit is 12.5% of user blocks. +reserve_node=%d Support configuring reserved nodes which are used for + allocation from a privileged user with specified uid or + gid, the default limit is 12.5% of all nodes. +resuid=%d The user ID which may use the reserved blocks and nodes. +resgid=%d The group ID which may use the reserved blocks and nodes. fault_injection=%d Enable fault injection in all supported types with specified injection rate. fault_type=%d Support configuring fault injection type, should be -- cgit v1.2.3 From 248a99832499036b330d471336b8765ef0e14cb4 Mon Sep 17 00:00:00 2001 From: Soham Metha Date: Wed, 13 Aug 2025 01:45:15 +0530 Subject: docs: f2fs: fixed spelling mistakes in documentation found/fixed the following typos - deivces -> devices - substracting -> subtracting in `Documentation/ABI/testing/sysfs-fs-f2fs` Signed-off-by: Soham Metha Reviewed-by: Chao Yu Signed-off-by: Jaegeuk Kim --- Documentation/ABI/testing/sysfs-fs-f2fs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs index 66ee15681983..ee3acc8c2cb8 100644 --- a/Documentation/ABI/testing/sysfs-fs-f2fs +++ b/Documentation/ABI/testing/sysfs-fs-f2fs @@ -822,8 +822,8 @@ What: /sys/fs/f2fs//gc_valid_thresh_ratio Date: September 2024 Contact: "Daeho Jeong" Description: It controls the valid block ratio threshold not to trigger excessive GC - for zoned deivces. The initial value of it is 95(%). F2FS will stop the - background GC thread from intiating GC for sections having valid blocks + for zoned devices. The initial value of it is 95(%). F2FS will stop the + background GC thread from initiating GC for sections having valid blocks exceeding the ratio. What: /sys/fs/f2fs//max_read_extent_count @@ -847,7 +847,7 @@ Description: For several zoned storage devices, vendors will provide extra space filesystem level GC. To do that, we can reserve the space using reserved_blocks. However, it is not enough, since this extra space should not be shown to users. So, with this new sysfs node, we can hide the space - by substracting reserved_blocks from total bytes. + by subtracting reserved_blocks from total bytes. What: /sys/fs/f2fs//encoding_flags Date: April 2025 -- cgit v1.2.3 From 46e2c5d604c7de1083ddf7a5f53edcf2eb3f4d12 Mon Sep 17 00:00:00 2001 From: "Paul E. McKenney" Date: Tue, 15 Jul 2025 12:10:05 -0700 Subject: doc: Update whatisRCU.rst for recent RCU API additions Bring this file kicking and screaming into the year 2025! [ paulmck: Apply feedback from Bagas Sanjaya. ] Signed-off-by: Paul E. McKenney --- Documentation/RCU/whatisRCU.rst | 150 +++++++++++++++++++++++++++++++--------- 1 file changed, 118 insertions(+), 32 deletions(-) (limited to 'Documentation') diff --git a/Documentation/RCU/whatisRCU.rst b/Documentation/RCU/whatisRCU.rst index be2eb6be16ec..cf0b0ac9f463 100644 --- a/Documentation/RCU/whatisRCU.rst +++ b/Documentation/RCU/whatisRCU.rst @@ -1021,32 +1021,41 @@ RCU list traversal:: list_entry_rcu list_entry_lockless list_first_entry_rcu + list_first_or_null_rcu + list_tail_rcu list_next_rcu + list_next_or_null_rcu list_for_each_entry_rcu list_for_each_entry_continue_rcu list_for_each_entry_from_rcu - list_first_or_null_rcu - list_next_or_null_rcu + list_for_each_entry_lockless hlist_first_rcu hlist_next_rcu hlist_pprev_rcu hlist_for_each_entry_rcu + hlist_for_each_entry_rcu_notrace hlist_for_each_entry_rcu_bh hlist_for_each_entry_from_rcu hlist_for_each_entry_continue_rcu hlist_for_each_entry_continue_rcu_bh hlist_nulls_first_rcu + hlist_nulls_next_rcu hlist_nulls_for_each_entry_rcu + hlist_nulls_for_each_entry_safe hlist_bl_first_rcu hlist_bl_for_each_entry_rcu RCU pointer/list update:: rcu_assign_pointer + rcu_replace_pointer + INIT_LIST_HEAD_RCU list_add_rcu list_add_tail_rcu list_del_rcu list_replace_rcu + list_splice_init_rcu + list_splice_tail_init_rcu hlist_add_behind_rcu hlist_add_before_rcu hlist_add_head_rcu @@ -1054,34 +1063,53 @@ RCU pointer/list update:: hlist_del_rcu hlist_del_init_rcu hlist_replace_rcu - list_splice_init_rcu - list_splice_tail_init_rcu hlist_nulls_del_init_rcu hlist_nulls_del_rcu hlist_nulls_add_head_rcu + hlist_nulls_add_tail_rcu + hlist_nulls_add_fake + hlists_swap_heads_rcu hlist_bl_add_head_rcu - hlist_bl_del_init_rcu hlist_bl_del_rcu hlist_bl_set_first_rcu RCU:: - Critical sections Grace period Barrier - - rcu_read_lock synchronize_net rcu_barrier - rcu_read_unlock synchronize_rcu - rcu_dereference synchronize_rcu_expedited - rcu_read_lock_held call_rcu - rcu_dereference_check kfree_rcu - rcu_dereference_protected + Critical sections Grace period Barrier + + rcu_read_lock synchronize_net rcu_barrier + rcu_read_unlock synchronize_rcu + guard(rcu)() synchronize_rcu_expedited + scoped_guard(rcu) synchronize_rcu_mult + rcu_dereference call_rcu + rcu_dereference_check call_rcu_hurry + rcu_dereference_protected kfree_rcu + rcu_read_lock_held kvfree_rcu + rcu_read_lock_any_held kfree_rcu_mightsleep + rcu_pointer_handoff cond_synchronize_rcu + unrcu_pointer cond_synchronize_rcu_full + cond_synchronize_rcu_expedited + cond_synchronize_rcu_expedited_full + get_completed_synchronize_rcu + get_completed_synchronize_rcu_full + get_state_synchronize_rcu + get_state_synchronize_rcu_full + poll_state_synchronize_rcu + poll_state_synchronize_rcu_full + same_state_synchronize_rcu + same_state_synchronize_rcu_full + start_poll_synchronize_rcu + start_poll_synchronize_rcu_full + start_poll_synchronize_rcu_expedited + start_poll_synchronize_rcu_expedited_full bh:: Critical sections Grace period Barrier - rcu_read_lock_bh call_rcu rcu_barrier - rcu_read_unlock_bh synchronize_rcu - [local_bh_disable] synchronize_rcu_expedited + rcu_read_lock_bh [Same as RCU] [Same as RCU] + rcu_read_unlock_bh + [local_bh_disable] [and friends] rcu_dereference_bh rcu_dereference_bh_check @@ -1092,9 +1120,9 @@ sched:: Critical sections Grace period Barrier - rcu_read_lock_sched call_rcu rcu_barrier - rcu_read_unlock_sched synchronize_rcu - [preempt_disable] synchronize_rcu_expedited + rcu_read_lock_sched [Same as RCU] [Same as RCU] + rcu_read_unlock_sched + [preempt_disable] [and friends] rcu_read_lock_sched_notrace rcu_read_unlock_sched_notrace @@ -1104,46 +1132,104 @@ sched:: rcu_read_lock_sched_held +RCU: Initialization/cleanup/ordering:: + + RCU_INIT_POINTER + RCU_INITIALIZER + RCU_POINTER_INITIALIZER + init_rcu_head + destroy_rcu_head + init_rcu_head_on_stack + destroy_rcu_head_on_stack + SLAB_TYPESAFE_BY_RCU + + +RCU: Quiescents states and control:: + + cond_resched_tasks_rcu_qs + rcu_all_qs + rcu_softirq_qs_periodic + rcu_end_inkernel_boot + rcu_expedite_gp + rcu_gp_is_expedited + rcu_unexpedite_gp + rcu_cpu_stall_reset + rcu_head_after_call_rcu + rcu_is_watching + + +RCU-sync primitive:: + + rcu_sync_is_idle + rcu_sync_init + rcu_sync_enter + rcu_sync_exit + rcu_sync_dtor + + RCU-Tasks:: - Critical sections Grace period Barrier + Critical sections Grace period Barrier - N/A call_rcu_tasks rcu_barrier_tasks + N/A call_rcu_tasks rcu_barrier_tasks synchronize_rcu_tasks RCU-Tasks-Rude:: - Critical sections Grace period Barrier + Critical sections Grace period Barrier - N/A N/A - synchronize_rcu_tasks_rude + N/A synchronize_rcu_tasks_rude rcu_barrier_tasks_rude + call_rcu_tasks_rude RCU-Tasks-Trace:: - Critical sections Grace period Barrier + Critical sections Grace period Barrier - rcu_read_lock_trace call_rcu_tasks_trace rcu_barrier_tasks_trace + rcu_read_lock_trace call_rcu_tasks_trace rcu_barrier_tasks_trace rcu_read_unlock_trace synchronize_rcu_tasks_trace + guard(rcu_tasks_trace)() + scoped_guard(rcu_tasks_trace) -SRCU:: +SRCU list traversal:: + list_for_each_entry_srcu + hlist_for_each_entry_srcu - Critical sections Grace period Barrier - srcu_read_lock call_srcu srcu_barrier - srcu_read_unlock synchronize_srcu - srcu_dereference synchronize_srcu_expedited +SRCU:: + + Critical sections Grace period Barrier + + srcu_read_lock call_srcu srcu_barrier + srcu_read_unlock synchronize_srcu + srcu_read_lock_fast synchronize_srcu_expedited + srcu_read_unlock_fast get_state_synchronize_srcu + srcu_read_lock_nmisafe start_poll_synchronize_srcu + srcu_read_unlock_nmisafe start_poll_synchronize_srcu_expedited + srcu_read_lock_notrace poll_state_synchronize_srcu + srcu_read_unlock_notrace + srcu_down_read + srcu_up_read + srcu_down_read_fast + srcu_up_read_fast + guard(srcu)() + scoped_guard(srcu) + srcu_read_lock_held + srcu_dereference srcu_dereference_check + srcu_dereference_notrace srcu_read_lock_held -SRCU: Initialization/cleanup:: + +SRCU: Initialization/cleanup/ordering:: DEFINE_SRCU DEFINE_STATIC_SRCU init_srcu_struct cleanup_srcu_struct + smp_mb__after_srcu_read_unlock All: lockdep-checked RCU utility APIs:: -- cgit v1.2.3 From 820f8da73dfeccf32e7b6580b4c41d0d3e2c2e02 Mon Sep 17 00:00:00 2001 From: "Paul E. McKenney" Date: Tue, 15 Jul 2025 12:19:33 -0700 Subject: doc: Add RCU guards to checklist.rst Also note that RCU guards can be easier to use. Signed-off-by: Paul E. McKenney --- Documentation/RCU/checklist.rst | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/RCU/checklist.rst b/Documentation/RCU/checklist.rst index 7de3e308f330..c9bfb2b218e5 100644 --- a/Documentation/RCU/checklist.rst +++ b/Documentation/RCU/checklist.rst @@ -69,7 +69,13 @@ over a rather long period of time, but improvements are always welcome! Explicit disabling of preemption (preempt_disable(), for example) can serve as rcu_read_lock_sched(), but is less readable and prevents lockdep from detecting locking issues. Acquiring a - spinlock also enters an RCU read-side critical section. + raw spinlock also enters an RCU read-side critical section. + + The guard(rcu)() and scoped_guard(rcu) primitives designate + the remainder of the current scope or the next statement, + respectively, as the RCU read-side critical section. Use of + these guards can be less error-prone than rcu_read_lock(), + rcu_read_unlock(), and friends. Please note that you *cannot* rely on code known to be built only in non-preemptible kernels. Such code can and will break, @@ -405,9 +411,11 @@ over a rather long period of time, but improvements are always welcome! 13. Unlike most flavors of RCU, it *is* permissible to block in an SRCU read-side critical section (demarked by srcu_read_lock() and srcu_read_unlock()), hence the "SRCU": "sleepable RCU". - Please note that if you don't need to sleep in read-side critical - sections, you should be using RCU rather than SRCU, because RCU - is almost always faster and easier to use than is SRCU. + As with RCU, guard(srcu)() and scoped_guard(srcu) forms are + available, and often provide greater ease of use. Please note + that if you don't need to sleep in read-side critical sections, + you should be using RCU rather than SRCU, because RCU is almost + always faster and easier to use than is SRCU. Also unlike other forms of RCU, explicit initialization and cleanup is required either at build time via DEFINE_SRCU() @@ -443,10 +451,13 @@ over a rather long period of time, but improvements are always welcome! real-time workloads than is synchronize_rcu_expedited(). It is also permissible to sleep in RCU Tasks Trace read-side - critical section, which are delimited by rcu_read_lock_trace() and - rcu_read_unlock_trace(). However, this is a specialized flavor - of RCU, and you should not use it without first checking with - its current users. In most cases, you should instead use SRCU. + critical section, which are delimited by rcu_read_lock_trace() + and rcu_read_unlock_trace(). However, this is a specialized + flavor of RCU, and you should not use it without first checking + with its current users. In most cases, you should instead + use SRCU. As with RCU and SRCU, guard(rcu_tasks_trace)() and + scoped_guard(rcu_tasks_trace) are available, and often provide + greater ease of use. Note that rcu_assign_pointer() relates to SRCU just as it does to other forms of RCU, but instead of rcu_dereference() you should -- cgit v1.2.3 From d33b01d793d91e0c9db5a7360bab35da0cb8a453 Mon Sep 17 00:00:00 2001 From: Akira Yokosawa Date: Wed, 23 Jul 2025 17:59:10 +0900 Subject: rcu: docs: Requirements.rst: Abide by conventions of kernel documentation Here is a list of conventions applied here: - Don't mark up function names, to be taken care of by the automarkup extension. Just say func(). - Instead of ".. code-block:: none", just say "::". - Mark inline literals by a pair of ``xxxx``. Don't use rust doc's dialect of `yyyy`. - Instead of emphasizing headings by **strong emphasis**, use sub-level title adornments, in this case "^^^^^^^^^^" and make them proper sub-sections under "Hotplug CPU". Signed-off-by: Akira Yokosawa Cc: Joel Fernandes Signed-off-by: Neeraj Upadhyay (AMD) Signed-off-by: Paul E. McKenney --- .../RCU/Design/Requirements/Requirements.rst | 52 ++++++++++------------ 1 file changed, 24 insertions(+), 28 deletions(-) (limited to 'Documentation') diff --git a/Documentation/RCU/Design/Requirements/Requirements.rst b/Documentation/RCU/Design/Requirements/Requirements.rst index b0395540296b..f24b3c0b9b0d 100644 --- a/Documentation/RCU/Design/Requirements/Requirements.rst +++ b/Documentation/RCU/Design/Requirements/Requirements.rst @@ -1973,9 +1973,7 @@ code, and the FQS loop, all of which refer to or modify this bookkeeping. Note that grace period initialization (rcu_gp_init()) must carefully sequence CPU hotplug scanning with grace period state changes. For example, the following race could occur in rcu_gp_init() if rcu_seq_start() were to happen -after the CPU hotplug scanning. - -.. code-block:: none +after the CPU hotplug scanning:: CPU0 (rcu_gp_init) CPU1 CPU2 --------------------- ---- ---- @@ -2008,22 +2006,22 @@ after the CPU hotplug scanning. kfree(r1); r2 = *r0; // USE-AFTER-FREE! -By incrementing gp_seq first, CPU1's RCU read-side critical section +By incrementing ``gp_seq`` first, CPU1's RCU read-side critical section is guaranteed to not be missed by CPU2. -**Concurrent Quiescent State Reporting for Offline CPUs** +Concurrent Quiescent State Reporting for Offline CPUs +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ RCU must ensure that CPUs going offline report quiescent states to avoid blocking grace periods. This requires careful synchronization to handle race conditions -**Race condition causing Offline CPU to hang GP** - -A race between CPU offlining and new GP initialization (gp_init) may occur -because `rcu_report_qs_rnp()` in `rcutree_report_cpu_dead()` must temporarily -release the `rcu_node` lock to wake the RCU grace-period kthread: +Race condition causing Offline CPU to hang GP +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -.. code-block:: none +A race between CPU offlining and new GP initialization (gp_init()) may occur +because rcu_report_qs_rnp() in rcutree_report_cpu_dead() must temporarily +release the ``rcu_node`` lock to wake the RCU grace-period kthread:: CPU1 (going offline) CPU0 (GP kthread) -------------------- ----------------- @@ -2044,15 +2042,14 @@ release the `rcu_node` lock to wake the RCU grace-period kthread: // Reacquire lock (but too late) rnp->qsmaskinitnext &= ~mask // Finally clears bit -Without `ofl_lock`, the new grace period includes the offline CPU and waits +Without ``ofl_lock``, the new grace period includes the offline CPU and waits forever for its quiescent state causing a GP hang. -**A solution with ofl_lock** +A solution with ofl_lock +^^^^^^^^^^^^^^^^^^^^^^^^ -The `ofl_lock` (offline lock) prevents `rcu_gp_init()` from running during -the vulnerable window when `rcu_report_qs_rnp()` has released `rnp->lock`: - -.. code-block:: none +The ``ofl_lock`` (offline lock) prevents rcu_gp_init() from running during +the vulnerable window when rcu_report_qs_rnp() has released ``rnp->lock``:: CPU0 (rcu_gp_init) CPU1 (rcutree_report_cpu_dead) ------------------ ------------------------------ @@ -2065,21 +2062,20 @@ the vulnerable window when `rcu_report_qs_rnp()` has released `rnp->lock`: arch_spin_unlock(&ofl_lock) ---> // Now CPU1 can proceed } // But snapshot already taken -**Another race causing GP hangs in rcu_gpu_init(): Reporting QS for Now-offline CPUs** +Another race causing GP hangs in rcu_gpu_init(): Reporting QS for Now-offline CPUs +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ After the first loop takes an atomic snapshot of online CPUs, as shown above, -the second loop in `rcu_gp_init()` detects CPUs that went offline between -releasing `ofl_lock` and acquiring the per-node `rnp->lock`. This detection is -crucial because: +the second loop in rcu_gp_init() detects CPUs that went offline between +releasing ``ofl_lock`` and acquiring the per-node ``rnp->lock``. +This detection is crucial because: 1. The CPU might have gone offline after the snapshot but before the second loop 2. The offline CPU cannot report its own QS if it's already dead 3. Without this detection, the grace period would wait forever for CPUs that are now offline. -The second loop performs this detection safely: - -.. code-block:: none +The second loop performs this detection safely:: rcu_for_each_node_breadth_first(rnp) { raw_spin_lock_irqsave_rcu_node(rnp, flags); @@ -2093,10 +2089,10 @@ The second loop performs this detection safely: } This approach ensures atomicity: quiescent state reporting for offline CPUs -happens either in `rcu_gp_init()` (second loop) or in `rcutree_report_cpu_dead()`, -never both and never neither. The `rnp->lock` held throughout the sequence -prevents races - `rcutree_report_cpu_dead()` also acquires this lock when -clearing `qsmaskinitnext`, ensuring mutual exclusion. +happens either in rcu_gp_init() (second loop) or in rcutree_report_cpu_dead(), +never both and never neither. The ``rnp->lock`` held throughout the sequence +prevents races - rcutree_report_cpu_dead() also acquires this lock when +clearing ``qsmaskinitnext``, ensuring mutual exclusion. Scheduler and RCU ~~~~~~~~~~~~~~~~~ -- cgit v1.2.3 From 7c1f14f6e8e7f288350faec02b3fbc25971da289 Mon Sep 17 00:00:00 2001 From: David Disseldorp Date: Tue, 19 Aug 2025 13:05:49 +1000 Subject: docs: initramfs: file data alignment via name padding The existing cpio extraction logic reads (maximum PATH_MAX) name_len bytes from the archive into the collected name buffer and ensures that the trailing byte is a null-terminator. This allows the actual file name to be shorter than name_len, with the name string simply zero-terminated prior to the last byte. Initramfs generators, such as dracut-cpio[1], can take advantage of name zero-padding to align file data segments within the archive to filesystem block boundaries. Block boundary alignment may allow the copy_file_range syscall to reflink archive source and destination extents. Link: https://github.com/dracutdevs/dracut/commit/300e4b116c624bca1b9e7251708b1ae656fe9157 [1] Signed-off-by: David Disseldorp Reviewed-by: Nicolas Schier Link: https://lore.kernel.org/r/20250819032607.28727-7-ddiss@suse.de Signed-off-by: Nathan Chancellor --- Documentation/driver-api/early-userspace/buffer-format.rst | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/driver-api/early-userspace/buffer-format.rst b/Documentation/driver-api/early-userspace/buffer-format.rst index 726bfa2fe70d..4597a91100b7 100644 --- a/Documentation/driver-api/early-userspace/buffer-format.rst +++ b/Documentation/driver-api/early-userspace/buffer-format.rst @@ -86,6 +86,11 @@ c_mtime is ignored unless CONFIG_INITRAMFS_PRESERVE_MTIME=y is set. The c_filesize should be zero for any file which is not a regular file or symlink. +c_namesize may account for more than one trailing '\0', as long as the +value doesn't exceed PATH_MAX. This can be useful for ensuring that a +subsequent file data segment is aligned, e.g. to a filesystem block +boundary. + The c_chksum field contains a simple 32-bit unsigned sum of all the bytes in the data field. cpio(1) refers to this as "crc", which is clearly incorrect (a cyclic redundancy check is a different and -- cgit v1.2.3 From a6d4f25888b83b8300aef28d9ee22765c1cc9b34 Mon Sep 17 00:00:00 2001 From: Eric Dumazet Date: Tue, 19 Aug 2025 17:40:30 +0000 Subject: net: set net.core.rmem_max and net.core.wmem_max to 4 MB SO_RCVBUF and SO_SNDBUF have limited range today, unless distros or system admins change rmem_max and wmem_max. Even iproute2 uses 1 MB SO_RCVBUF which is capped by the kernel. Decouple [rw]mem_max and [rw]mem_default and increase [rw]mem_max to 4 MB. Before: $ sysctl net.core.rmem_default net.core.rmem_max net.core.wmem_default net.core.wmem_max net.core.rmem_default = 212992 net.core.rmem_max = 212992 net.core.wmem_default = 212992 net.core.wmem_max = 212992 After: $ sysctl net.core.rmem_default net.core.rmem_max net.core.wmem_default net.core.wmem_max net.core.rmem_default = 212992 net.core.rmem_max = 4194304 net.core.wmem_default = 212992 net.core.wmem_max = 4194304 Signed-off-by: Eric Dumazet Reviewed-by: Neal Cardwell Link: https://patch.msgid.link/20250819174030.1986278-1-edumazet@google.com Signed-off-by: Jakub Kicinski --- Documentation/admin-guide/sysctl/net.rst | 4 ++++ Documentation/networking/ip-sysctl.rst | 6 +++--- 2 files changed, 7 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/sysctl/net.rst b/Documentation/admin-guide/sysctl/net.rst index 7b0c4291c686..2ef50828aff1 100644 --- a/Documentation/admin-guide/sysctl/net.rst +++ b/Documentation/admin-guide/sysctl/net.rst @@ -222,6 +222,8 @@ rmem_max The maximum receive socket buffer size in bytes. +Default: 4194304 + rps_default_mask ---------------- @@ -247,6 +249,8 @@ wmem_max The maximum send socket buffer size in bytes. +Default: 4194304 + message_burst and message_cost ------------------------------ diff --git a/Documentation/networking/ip-sysctl.rst b/Documentation/networking/ip-sysctl.rst index 43badb338d22..9f5891c9b07b 100644 --- a/Documentation/networking/ip-sysctl.rst +++ b/Documentation/networking/ip-sysctl.rst @@ -209,7 +209,7 @@ neigh/default/unres_qlen_bytes - INTEGER Setting negative value is meaningless and will return error. - Default: SK_WMEM_MAX, (same as net.core.wmem_default). + Default: SK_WMEM_DEFAULT, (same as net.core.wmem_default). Exact value depends on architecture and kernel options, but should be enough to allow queuing 256 packets @@ -805,8 +805,8 @@ tcp_rmem - vector of 3 INTEGERs: min, default, max This value results in initial window of 65535. max: maximal size of receive buffer allowed for automatically - selected receiver buffers for TCP socket. This value does not override - net.core.rmem_max. Calling setsockopt() with SO_RCVBUF disables + selected receiver buffers for TCP socket. + Calling setsockopt() with SO_RCVBUF disables automatic tuning of that socket's receive buffer size, in which case this value is ignored. Default: between 131072 and 32MB, depending on RAM size. -- cgit v1.2.3 From 136d029662cdde77d3e4db5c07de655f35f0239f Mon Sep 17 00:00:00 2001 From: Rakuram Eswaran Date: Wed, 20 Aug 2025 21:56:13 +0530 Subject: Documentation/staging: Fix typo and incorrect citation in crc32.rst In Documentation/staging/crc32.rst, below errors have been corrected: 1. Line 37: from "to being" to "to bring" 2. Line 119: Incorrect citation date: It must be August 1988 instead of August 1998 Signed-off-by: Rakuram Eswaran Link: https://lore.kernel.org/r/20250820162615.6942-1-rakuram.e96@gmail.com Signed-off-by: Eric Biggers --- Documentation/staging/crc32.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/staging/crc32.rst b/Documentation/staging/crc32.rst index 7542220967cb..64f3dd430a6c 100644 --- a/Documentation/staging/crc32.rst +++ b/Documentation/staging/crc32.rst @@ -34,7 +34,7 @@ do it in the right order, matching the endianness. Just like with ordinary division, you proceed one digit (bit) at a time. Each step of the division you take one more digit (bit) of the dividend and append it to the current remainder. Then you figure out the -appropriate multiple of the divisor to subtract to being the remainder +appropriate multiple of the divisor to subtract to bring the remainder back into range. In binary, this is easy - it has to be either 0 or 1, and to make the XOR cancel, it's just a copy of bit 32 of the remainder. @@ -116,7 +116,7 @@ for any fractional bytes at the end. To reduce the number of conditional branches, software commonly uses the byte-at-a-time table method, popularized by Dilip V. Sarwate, "Computation of Cyclic Redundancy Checks via Table Look-Up", Comm. ACM -v.31 no.8 (August 1998) p. 1008-1013. +v.31 no.8 (August 1988) p. 1008-1013. Here, rather than just shifting one bit of the remainder to decide in the correct multiple to subtract, we can shift a byte at a time. -- cgit v1.2.3 From 411053cb6657a3cf8db50a2d004a112070ca14b2 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 19 Aug 2025 09:13:44 -0300 Subject: dt-bindings: w1: imx: Add an entry for the interrupts property There is an interrupt line connected to the one-wire block on the i.MX51 and i.MX53. Add an entry for the interrupt property to avoid the following dt-schema warning: 'interrupts' does not match any of the regexes: '^pinctrl-[0-9]+$' Signed-off-by: Fabio Estevam Acked-by: Conor Dooley Reviewed-by: Frank Li Link: https://lore.kernel.org/r/20250819121344.2765940-1-festevam@gmail.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/w1/fsl-imx-owire.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/w1/fsl-imx-owire.yaml b/Documentation/devicetree/bindings/w1/fsl-imx-owire.yaml index 55adea827c34..2c1bbc0eb05a 100644 --- a/Documentation/devicetree/bindings/w1/fsl-imx-owire.yaml +++ b/Documentation/devicetree/bindings/w1/fsl-imx-owire.yaml @@ -24,6 +24,9 @@ properties: reg: maxItems: 1 + interrupts: + maxItems: 1 + clocks: maxItems: 1 @@ -40,5 +43,6 @@ examples: owire@63fa4000 { compatible = "fsl,imx53-owire", "fsl,imx21-owire"; reg = <0x63fa4000 0x4000>; + interrupts = <88>; clocks = <&clks IMX5_CLK_OWIRE_GATE>; }; -- cgit v1.2.3 From 74403d260a4b5c12c15c1862c3df5b17b803549a Mon Sep 17 00:00:00 2001 From: Laurentiu Mihalcea Date: Mon, 14 Jul 2025 11:13:45 -0400 Subject: dt-bindings: arm: fsl: add i.MX8ULP EVK9 board Add DT compatible string for the i.MX8ULP EVK9 board. Signed-off-by: Laurentiu Mihalcea Acked-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 839f428c9f75..e21758546d13 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1383,6 +1383,7 @@ properties: - description: i.MX8ULP based Boards items: - enum: + - fsl,imx8ulp-9x9-evk # i.MX8ULP EVK9 Board - fsl,imx8ulp-evk # i.MX8ULP EVK Board - const: fsl,imx8ulp -- cgit v1.2.3 From 278033a225e13ec21900f0a92b8351658f5377f2 Mon Sep 17 00:00:00 2001 From: Lichen Liu Date: Fri, 15 Aug 2025 20:14:59 +0800 Subject: fs: Add 'initramfs_options' to set initramfs mount options MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When CONFIG_TMPFS is enabled, the initial root filesystem is a tmpfs. By default, a tmpfs mount is limited to using 50% of the available RAM for its content. This can be problematic in memory-constrained environments, particularly during a kdump capture. In a kdump scenario, the capture kernel boots with a limited amount of memory specified by the 'crashkernel' parameter. If the initramfs is large, it may fail to unpack into the tmpfs rootfs due to insufficient space. This is because to get X MB of usable space in tmpfs, 2*X MB of memory must be available for the mount. This leads to an OOM failure during the early boot process, preventing a successful crash dump. This patch introduces a new kernel command-line parameter, initramfs_options, which allows passing specific mount options directly to the rootfs when it is first mounted. This gives users control over the rootfs behavior. For example, a user can now specify initramfs_options=size=75% to allow the tmpfs to use up to 75% of the available memory. This can significantly reduce the memory pressure for kdump. Consider a practical example: To unpack a 48MB initramfs, the tmpfs needs 48MB of usable space. With the default 50% limit, this requires a memory pool of 96MB to be available for the tmpfs mount. The total memory requirement is therefore approximately: 16MB (vmlinuz) + 48MB (loaded initramfs) + 48MB (unpacked kernel) + 96MB (for tmpfs) + 12MB (runtime overhead) ≈ 220MB. By using initramfs_options=size=75%, the memory pool required for the 48MB tmpfs is reduced to 48MB / 0.75 = 64MB. This reduces the total memory requirement by 32MB (96MB - 64MB), allowing the kdump to succeed with a smaller crashkernel size, such as 192MB. An alternative approach of reusing the existing rootflags parameter was considered. However, a new, dedicated initramfs_options parameter was chosen to avoid altering the current behavior of rootflags (which applies to the final root filesystem) and to prevent any potential regressions. Also add documentation for the new kernel parameter "initramfs_options" This approach is inspired by prior discussions and patches on the topic. Ref: https://www.lightofdawn.org/blog/?viewDetailed=00128 Ref: https://landley.net/notes-2015.html#01-01-2015 Ref: https://lkml.org/lkml/2021/6/29/783 Ref: https://www.kernel.org/doc/html/latest/filesystems/ramfs-rootfs-initramfs.html#what-is-rootfs Signed-off-by: Lichen Liu Link: https://lore.kernel.org/20250815121459.3391223-1-lichliu@redhat.com Tested-by: Rob Landley Signed-off-by: Christian Brauner --- Documentation/admin-guide/kernel-parameters.txt | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 747a55abf494..10361d7b7489 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -6428,6 +6428,9 @@ rootflags= [KNL] Set root filesystem mount option string + initramfs_options= [KNL] + Specify mount options for for the initramfs mount. + rootfstype= [KNL] Set root filesystem type rootwait [KNL] Wait (indefinitely) for root device to show up. -- cgit v1.2.3 From 1898fc572118a65aa0d927dd5ff4b7e1a0140ddd Mon Sep 17 00:00:00 2001 From: Luo Jie Date: Mon, 18 Aug 2025 21:14:25 +0800 Subject: dt-bindings: net: Add PPE for Qualcomm IPQ9574 SoC The PPE (packet process engine) hardware block is available in Qualcomm IPQ chipsets that support PPE architecture, such as IPQ9574. The PPE in the IPQ9574 SoC includes six Ethernet ports (6 GMAC and 6 XGMAC), which are used to connect with external PHY devices by PCS. It includes an L2 switch function for bridging packets among the 6 Ethernet ports and the CPU port. The CPU port enables packet transfer between the Ethernet ports and the ARM cores in the SoC, using the Ethernet DMA. The PPE also includes packet processing offload capabilities for various networking functions such as route and bridge flows, VLANs, different tunnel protocols and VPN. The PPE switch is modeled according to the Ethernet switch schema, with additional properties defined for the switch node for interrupts, clocks, resets, interconnects and Ethernet DMA. The switch port node is extended with additional properties for clocks and resets. Reviewed-by: Rob Herring (Arm) Signed-off-by: Luo Jie Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-1-1d4ff641fce9@quicinc.com Signed-off-by: Paolo Abeni --- .../devicetree/bindings/net/qcom,ipq9574-ppe.yaml | 533 +++++++++++++++++++++ 1 file changed, 533 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml b/Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml new file mode 100644 index 000000000000..753f370b7605 --- /dev/null +++ b/Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml @@ -0,0 +1,533 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/qcom,ipq9574-ppe.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ packet process engine (PPE) + +maintainers: + - Luo Jie + - Lei Wei + - Suruchi Agarwal + - Pavithra R + +description: | + The Ethernet functionality in the PPE (Packet Process Engine) is comprised + of three components, the switch core, port wrapper and Ethernet DMA. + + The Switch core in the IPQ9574 PPE has maximum of 6 front panel ports and + two FIFO interfaces. One of the two FIFO interfaces is used for Ethernet + port to host CPU communication using Ethernet DMA. The other is used + communicating to the EIP engine which is used for IPsec offload. On the + IPQ9574, the PPE includes 6 GMAC/XGMACs that can be connected with external + Ethernet PHY. Switch core also includes BM (Buffer Management), QM (Queue + Management) and SCH (Scheduler) modules for supporting the packet processing. + + The port wrapper provides connections from the 6 GMAC/XGMACS to UNIPHY (PCS) + supporting various modes such as SGMII/QSGMII/PSGMII/USXGMII/10G-BASER. There + are 3 UNIPHY (PCS) instances supported on the IPQ9574. + + Ethernet DMA is used to transmit and receive packets between the six Ethernet + ports and ARM host CPU. + + The follow diagram shows the PPE hardware block along with its connectivity + to the external hardware blocks such clock hardware blocks (CMNPLL, GCC, + NSS clock controller) and Ethernet PCS/PHY blocks. For depicting the PHY + connectivity, one 4x1 Gbps PHY (QCA8075) and two 10 GBps PHYs are used as an + example. + + +---------+ + | 48 MHZ | + +----+----+ + |(clock) + v + +----+----+ + +------| CMN PLL | + | +----+----+ + | |(clock) + | v + | +----+----+ +----+----+ (clock) +----+----+ + | +---| NSSCC | | GCC |--------->| MDIO | + | | +----+----+ +----+----+ +----+----+ + | | |(clock & reset) |(clock) + | | v v + | | +----+---------------------+--+----------+----------+---------+ + | | | +-----+ |EDMA FIFO | | EIP FIFO| + | | | | SCH | +----------+ +---------+ + | | | +-----+ | | | + | | | +------+ +------+ +-------------------+ | + | | | | BM | | QM | IPQ9574-PPE | L2/L3 Process | | + | | | +------+ +------+ +-------------------+ | + | | | | | + | | | +-------+ +-------+ +-------+ +-------+ +-------+ +-------+ | + | | | | MAC0 | | MAC1 | | MAC2 | | MAC3 | | XGMAC4| |XGMAC5 | | + | | | +---+---+ +---+---+ +---+---+ +---+---+ +---+---+ +---+---+ | + | | | | | | | | | | + | | +-----+---------+---------+---------+---------+---------+-----+ + | | | | | | | | + | | +---+---------+---------+---------+---+ +---+---+ +---+---+ + +--+---->| PCS0 | | PCS1 | | PCS2 | + |(clock) +---+---------+---------+---------+---+ +---+---+ +---+---+ + | | | | | | | + | +---+---------+---------+---------+---+ +---+---+ +---+---+ + +------->| QCA8075 PHY | | PHY4 | | PHY5 | + (clock) +-------------------------------------+ +-------+ +-------+ + +properties: + compatible: + enum: + - qcom,ipq9574-ppe + + reg: + maxItems: 1 + + clocks: + items: + - description: PPE core clock + - description: PPE APB (Advanced Peripheral Bus) clock + - description: PPE IPE (Ingress Process Engine) clock + - description: PPE BM, QM and scheduler clock + + clock-names: + items: + - const: ppe + - const: apb + - const: ipe + - const: btq + + resets: + maxItems: 1 + description: PPE reset, which is necessary before configuring PPE hardware + + interrupts: + maxItems: 1 + description: PPE switch miscellaneous interrupt + + interconnects: + items: + - description: Bus interconnect path leading to PPE switch core function + - description: Bus interconnect path leading to PPE register access + - description: Bus interconnect path leading to QoS generation + - description: Bus interconnect path leading to timeout reference + - description: Bus interconnect path leading to NSS NOC from memory NOC + - description: Bus interconnect path leading to memory NOC from NSS NOC + - description: Bus interconnect path leading to enhanced memory NOC from NSS NOC + + interconnect-names: + items: + - const: ppe + - const: ppe_cfg + - const: qos_gen + - const: timeout_ref + - const: nssnoc_memnoc + - const: memnoc_nssnoc + - const: memnoc_nssnoc_1 + + ethernet-dma: + type: object + additionalProperties: false + description: + EDMA (Ethernet DMA) is used to transmit packets between PPE and ARM + host CPU. There are 32 TX descriptor rings, 32 TX completion rings, + 24 RX descriptor rings and 8 RX fill rings supported. + + properties: + clocks: + items: + - description: EDMA system clock + - description: EDMA APB (Advanced Peripheral Bus) clock + + clock-names: + items: + - const: sys + - const: apb + + resets: + maxItems: 1 + description: EDMA reset + + interrupts: + minItems: 65 + maxItems: 65 + + interrupt-names: + minItems: 65 + maxItems: 65 + items: + oneOf: + - pattern: '^txcmpl_([1-2]?[0-9]|3[01])$' + - pattern: '^rxfill_[0-7]$' + - pattern: '^rxdesc_(1?[0-9]|2[0-3])$' + - const: misc + description: + Interrupts "txcmpl_[0-31]" are the Ethernet DMA TX completion ring interrupts. + Interrupts "rxfill_[0-7]" are the Ethernet DMA RX fill ring interrupts. + Interrupts "rxdesc_[0-23]" are the Ethernet DMA RX Descriptor ring interrupts. + Interrupt "misc" is the Ethernet DMA miscellaneous error interrupt. + + required: + - clocks + - clock-names + - resets + - interrupts + - interrupt-names + + ethernet-ports: + patternProperties: + "^ethernet-port@[1-6]+$": + type: object + unevaluatedProperties: false + $ref: ethernet-switch-port.yaml# + + properties: + reg: + minimum: 1 + maximum: 6 + description: PPE Ethernet port ID + + clocks: + items: + - description: Port MAC clock + - description: Port RX clock + - description: Port TX clock + + clock-names: + items: + - const: mac + - const: rx + - const: tx + + resets: + items: + - description: Port MAC reset + - description: Port RX reset + - description: Port TX reset + + reset-names: + items: + - const: mac + - const: rx + - const: tx + + required: + - reg + - clocks + - clock-names + - resets + - reset-names + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - interconnects + - interconnect-names + - ethernet-dma + +allOf: + - $ref: ethernet-switch.yaml + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + ethernet-switch@3a000000 { + compatible = "qcom,ipq9574-ppe"; + reg = <0x3a000000 0xbef800>; + clocks = <&nsscc NSS_CC_PPE_SWITCH_CLK>, + <&nsscc NSS_CC_PPE_SWITCH_CFG_CLK>, + <&nsscc NSS_CC_PPE_SWITCH_IPE_CLK>, + <&nsscc NSS_CC_PPE_SWITCH_BTQ_CLK>; + clock-names = "ppe", + "apb", + "ipe", + "btq"; + resets = <&nsscc PPE_FULL_RESET>; + interrupts = ; + interconnects = <&nsscc MASTER_NSSNOC_PPE &nsscc SLAVE_NSSNOC_PPE>, + <&nsscc MASTER_NSSNOC_PPE_CFG &nsscc SLAVE_NSSNOC_PPE_CFG>, + <&gcc MASTER_NSSNOC_QOSGEN_REF &gcc SLAVE_NSSNOC_QOSGEN_REF>, + <&gcc MASTER_NSSNOC_TIMEOUT_REF &gcc SLAVE_NSSNOC_TIMEOUT_REF>, + <&gcc MASTER_MEM_NOC_NSSNOC &gcc SLAVE_MEM_NOC_NSSNOC>, + <&gcc MASTER_NSSNOC_MEMNOC &gcc SLAVE_NSSNOC_MEMNOC>, + <&gcc MASTER_NSSNOC_MEM_NOC_1 &gcc SLAVE_NSSNOC_MEM_NOC_1>; + interconnect-names = "ppe", + "ppe_cfg", + "qos_gen", + "timeout_ref", + "nssnoc_memnoc", + "memnoc_nssnoc", + "memnoc_nssnoc_1"; + + ethernet-dma { + clocks = <&nsscc NSS_CC_PPE_EDMA_CLK>, + <&nsscc NSS_CC_PPE_EDMA_CFG_CLK>; + clock-names = "sys", + "apb"; + resets = <&nsscc EDMA_HW_RESET>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "txcmpl_0", + "txcmpl_1", + "txcmpl_2", + "txcmpl_3", + "txcmpl_4", + "txcmpl_5", + "txcmpl_6", + "txcmpl_7", + "txcmpl_8", + "txcmpl_9", + "txcmpl_10", + "txcmpl_11", + "txcmpl_12", + "txcmpl_13", + "txcmpl_14", + "txcmpl_15", + "txcmpl_16", + "txcmpl_17", + "txcmpl_18", + "txcmpl_19", + "txcmpl_20", + "txcmpl_21", + "txcmpl_22", + "txcmpl_23", + "txcmpl_24", + "txcmpl_25", + "txcmpl_26", + "txcmpl_27", + "txcmpl_28", + "txcmpl_29", + "txcmpl_30", + "txcmpl_31", + "rxfill_0", + "rxfill_1", + "rxfill_2", + "rxfill_3", + "rxfill_4", + "rxfill_5", + "rxfill_6", + "rxfill_7", + "rxdesc_0", + "rxdesc_1", + "rxdesc_2", + "rxdesc_3", + "rxdesc_4", + "rxdesc_5", + "rxdesc_6", + "rxdesc_7", + "rxdesc_8", + "rxdesc_9", + "rxdesc_10", + "rxdesc_11", + "rxdesc_12", + "rxdesc_13", + "rxdesc_14", + "rxdesc_15", + "rxdesc_16", + "rxdesc_17", + "rxdesc_18", + "rxdesc_19", + "rxdesc_20", + "rxdesc_21", + "rxdesc_22", + "rxdesc_23", + "misc"; + }; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-port@1 { + reg = <1>; + phy-mode = "qsgmii"; + managed = "in-band-status"; + phy-handle = <&phy0>; + pcs-handle = <&pcs0_ch0>; + clocks = <&nsscc NSS_CC_PORT1_MAC_CLK>, + <&nsscc NSS_CC_PORT1_RX_CLK>, + <&nsscc NSS_CC_PORT1_TX_CLK>; + clock-names = "mac", + "rx", + "tx"; + resets = <&nsscc PORT1_MAC_ARES>, + <&nsscc PORT1_RX_ARES>, + <&nsscc PORT1_TX_ARES>; + reset-names = "mac", + "rx", + "tx"; + }; + + ethernet-port@2 { + reg = <2>; + phy-mode = "qsgmii"; + managed = "in-band-status"; + phy-handle = <&phy1>; + pcs-handle = <&pcs0_ch1>; + clocks = <&nsscc NSS_CC_PORT2_MAC_CLK>, + <&nsscc NSS_CC_PORT2_RX_CLK>, + <&nsscc NSS_CC_PORT2_TX_CLK>; + clock-names = "mac", + "rx", + "tx"; + resets = <&nsscc PORT2_MAC_ARES>, + <&nsscc PORT2_RX_ARES>, + <&nsscc PORT2_TX_ARES>; + reset-names = "mac", + "rx", + "tx"; + }; + + ethernet-port@3 { + reg = <3>; + phy-mode = "qsgmii"; + managed = "in-band-status"; + phy-handle = <&phy2>; + pcs-handle = <&pcs0_ch2>; + clocks = <&nsscc NSS_CC_PORT3_MAC_CLK>, + <&nsscc NSS_CC_PORT3_RX_CLK>, + <&nsscc NSS_CC_PORT3_TX_CLK>; + clock-names = "mac", + "rx", + "tx"; + resets = <&nsscc PORT3_MAC_ARES>, + <&nsscc PORT3_RX_ARES>, + <&nsscc PORT3_TX_ARES>; + reset-names = "mac", + "rx", + "tx"; + }; + + ethernet-port@4 { + reg = <4>; + phy-mode = "qsgmii"; + managed = "in-band-status"; + phy-handle = <&phy3>; + pcs-handle = <&pcs0_ch3>; + clocks = <&nsscc NSS_CC_PORT4_MAC_CLK>, + <&nsscc NSS_CC_PORT4_RX_CLK>, + <&nsscc NSS_CC_PORT4_TX_CLK>; + clock-names = "mac", + "rx", + "tx"; + resets = <&nsscc PORT4_MAC_ARES>, + <&nsscc PORT4_RX_ARES>, + <&nsscc PORT4_TX_ARES>; + reset-names = "mac", + "rx", + "tx"; + }; + + ethernet-port@5 { + reg = <5>; + phy-mode = "usxgmii"; + managed = "in-band-status"; + phy-handle = <&phy4>; + pcs-handle = <&pcs1_ch0>; + clocks = <&nsscc NSS_CC_PORT5_MAC_CLK>, + <&nsscc NSS_CC_PORT5_RX_CLK>, + <&nsscc NSS_CC_PORT5_TX_CLK>; + clock-names = "mac", + "rx", + "tx"; + resets = <&nsscc PORT5_MAC_ARES>, + <&nsscc PORT5_RX_ARES>, + <&nsscc PORT5_TX_ARES>; + reset-names = "mac", + "rx", + "tx"; + }; + + ethernet-port@6 { + reg = <6>; + phy-mode = "usxgmii"; + managed = "in-band-status"; + phy-handle = <&phy5>; + pcs-handle = <&pcs2_ch0>; + clocks = <&nsscc NSS_CC_PORT6_MAC_CLK>, + <&nsscc NSS_CC_PORT6_RX_CLK>, + <&nsscc NSS_CC_PORT6_TX_CLK>; + clock-names = "mac", + "rx", + "tx"; + resets = <&nsscc PORT6_MAC_ARES>, + <&nsscc PORT6_RX_ARES>, + <&nsscc PORT6_TX_ARES>; + reset-names = "mac", + "rx", + "tx"; + }; + }; + }; -- cgit v1.2.3 From 6b9f301985a35997338b0a0429859b49aff7f352 Mon Sep 17 00:00:00 2001 From: Lei Wei Date: Mon, 18 Aug 2025 21:14:26 +0800 Subject: docs: networking: Add PPE driver documentation for Qualcomm IPQ9574 SoC Add description and high-level diagram for PPE, driver overview and module enable/debug information. Signed-off-by: Lei Wei Signed-off-by: Luo Jie Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-2-1d4ff641fce9@quicinc.com Signed-off-by: Paolo Abeni --- .../networking/device_drivers/ethernet/index.rst | 1 + .../device_drivers/ethernet/qualcomm/ppe/ppe.rst | 194 +++++++++++++++++++++ 2 files changed, 195 insertions(+) create mode 100644 Documentation/networking/device_drivers/ethernet/qualcomm/ppe/ppe.rst (limited to 'Documentation') diff --git a/Documentation/networking/device_drivers/ethernet/index.rst b/Documentation/networking/device_drivers/ethernet/index.rst index 40ac552641a3..0b0a3eef6aae 100644 --- a/Documentation/networking/device_drivers/ethernet/index.rst +++ b/Documentation/networking/device_drivers/ethernet/index.rst @@ -50,6 +50,7 @@ Contents: neterion/s2io netronome/nfp pensando/ionic + qualcomm/ppe/ppe smsc/smc9 stmicro/stmmac ti/cpsw diff --git a/Documentation/networking/device_drivers/ethernet/qualcomm/ppe/ppe.rst b/Documentation/networking/device_drivers/ethernet/qualcomm/ppe/ppe.rst new file mode 100644 index 000000000000..4ab299a28969 --- /dev/null +++ b/Documentation/networking/device_drivers/ethernet/qualcomm/ppe/ppe.rst @@ -0,0 +1,194 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=============================================== +PPE Ethernet Driver for Qualcomm IPQ SoC Family +=============================================== + +Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + +Author: Lei Wei + + +Contents +======== + +- `PPE Overview`_ +- `PPE Driver Overview`_ +- `PPE Driver Supported SoCs`_ +- `Enabling the Driver`_ +- `Debugging`_ + + +PPE Overview +============ + +IPQ (Qualcomm Internet Processor) SoC (System-on-Chip) series is Qualcomm's series of +networking SoC for Wi-Fi access points. The PPE (Packet Process Engine) is the Ethernet +packet process engine in the IPQ SoC. + +Below is a simplified hardware diagram of IPQ9574 SoC which includes the PPE engine and +other blocks which are in the SoC but outside the PPE engine. These blocks work together +to enable the Ethernet for the IPQ SoC:: + + +------+ +------+ +------+ +------+ +------+ +------+ start +-------+ + |netdev| |netdev| |netdev| |netdev| |netdev| |netdev|<------|PHYLINK| + +------+ +------+ +------+ +------+ +------+ +------+ stop +-+-+-+-+ + | | | ^ + +-------+ +-------------------------+--------+----------------------+ | | | + | GCC | | | EDMA | | | | | + +---+---+ | PPE +---+----+ | | | | + | clk | | | | | | + +-------->| +-----------------------+------+-----+---------------+ | | | | + | | Switch Core |Port0 | |Port7(EIP FIFO)| | | | | + | | +---+--+ +------+--------+ | | | | + | | | | | | | | | + +-------+ | | +------+---------------+----+ | | | | | + |CMN PLL| | | +---+ +---+ +----+ | +--------+ | | | | | | + +---+---+ | | |BM | |QM | |SCH | | | L2/L3 | ....... | | | | | | + | | | | +---+ +---+ +----+ | +--------+ | | | | | | + | | | | +------+--------------------+ | | | | | + | | | | | | | | | | + | v | | +-----+-+-----+-+-----+-+-+---+--+-----+-+-----+ | | | | | + | +------+ | | |Port1| |Port2| |Port3| |Port4| |Port5| |Port6| | | | | | + | |NSSCC | | | +-----+ +-----+ +-----+ +-----+ +-----+ +-----+ | | mac| | | + | +-+-+--+ | | |MAC0 | |MAC1 | |MAC2 | |MAC3 | |MAC4 | |MAC5 | | |<---+ | | + | ^ | |clk | | +-----+-+-----+-+-----+-+-----+--+-----+-+-----+ | | ops | | + | | | +------>| +----|------|-------|-------|---------|--------|-----+ | | | + | | | +---------------------------------------------------------+ | | + | | | | | | | | | | | + | | | MII clk | QSGMII USXGMII USXGMII | | + | | +--------------->| | | | | | | | + | | +-------------------------+ +---------+ +---------+ | | + | |125/312.5MHz clk| (PCS0) | | (PCS1) | | (PCS2) | pcs ops | | + | +----------------+ UNIPHY0 | | UNIPHY1 | | UNIPHY2 |<--------+ | + +----------------->| | | | | | | + | 31.25MHz ref clk +-------------------------+ +---------+ +---------+ | + | | | | | | | | + | +-----------------------------------------------------+ | + |25/50MHz ref clk| +-------------------------+ +------+ +------+ | link | + +--------------->| | QUAD PHY | | PHY4 | | PHY5 | |---------+ + | +-------------------------+ +------+ +------+ | change + | | + | MDIO bus | + +-----------------------------------------------------+ + +The CMN (Common) PLL, NSSCC (Networking Sub System Clock Controller) and GCC (Global +Clock Controller) blocks are in the SoC and act as clock providers. + +The UNIPHY block is in the SoC and provides the PCS (Physical Coding Sublayer) and +XPCS (10-Gigabit Physical Coding Sublayer) functions to support different interface +modes between the PPE MAC and the external PHY. + +This documentation focuses on the descriptions of PPE engine and the PPE driver. + +The Ethernet functionality in the PPE (Packet Process Engine) is comprised of three +components: the switch core, port wrapper and Ethernet DMA. + +The Switch core in the IPQ9574 PPE has maximum of 6 front panel ports and two FIFO +interfaces. One of the two FIFO interfaces is used for Ethernet port to host CPU +communication using Ethernet DMA. The other one is used to communicate to the EIP +engine which is used for IPsec offload. On the IPQ9574, the PPE includes 6 GMAC/XGMACs +that can be connected with external Ethernet PHY. Switch core also includes BM (Buffer +Management), QM (Queue Management) and SCH (Scheduler) modules for supporting the +packet processing. + +The port wrapper provides connections from the 6 GMAC/XGMACS to UNIPHY (PCS) supporting +various modes such as SGMII/QSGMII/PSGMII/USXGMII/10G-BASER. There are 3 UNIPHY (PCS) +instances supported on the IPQ9574. + +Ethernet DMA is used to transmit and receive packets between the Ethernet subsystem +and ARM host CPU. + +The following lists the main blocks in the PPE engine which will be driven by this +PPE driver: + +- BM + BM is the hardware buffer manager for the PPE switch ports. +- QM + Queue Manager for managing the egress hardware queues of the PPE switch ports. +- SCH + The scheduler which manages the hardware traffic scheduling for the PPE switch ports. +- L2 + The L2 block performs the packet bridging in the switch core. The bridge domain is + represented by the VSI (Virtual Switch Instance) domain in PPE. FDB learning can be + enabled based on the VSI domain and bridge forwarding occurs within the VSI domain. +- MAC + The PPE in the IPQ9574 supports up to six MACs (MAC0 to MAC5) which are corresponding + to six switch ports (port1 to port6). The MAC block is connected with external PHY + through the UNIPHY PCS block. Each MAC block includes the GMAC and XGMAC blocks and + the switch port can select to use GMAC or XMAC through a MUX selection according to + the external PHY's capability. +- EDMA (Ethernet DMA) + The Ethernet DMA is used to transmit and receive Ethernet packets between the PPE + ports and the ARM cores. + +The received packet on a PPE MAC port can be forwarded to another PPE MAC port. It can +be also forwarded to internal switch port0 so that the packet can be delivered to the +ARM cores using the Ethernet DMA (EDMA) engine. The Ethernet DMA driver will deliver the +packet to the corresponding 'netdevice' interface. + +The software instantiations of the PPE MAC (netdevice), PCS and external PHYs interact +with the Linux PHYLINK framework to manage the connectivity between the PPE ports and +the connected PHYs, and the port link states. This is also illustrated in above diagram. + + +PPE Driver Overview +=================== +PPE driver is Ethernet driver for the Qualcomm IPQ SoC. It is a single platform driver +which includes the PPE part and Ethernet DMA part. The PPE part initializes and drives the +various blocks in PPE switch core such as BM/QM/L2 blocks and the PPE MACs. The EDMA part +drives the Ethernet DMA for packet transfer between PPE ports and ARM cores, and enables +the netdevice driver for the PPE ports. + +The PPE driver files in drivers/net/ethernet/qualcomm/ppe/ are listed as below: + +- Makefile +- ppe.c +- ppe.h +- ppe_config.c +- ppe_config.h +- ppe_debugfs.c +- ppe_debugfs.h +- ppe_regs.h + +The ppe.c file contains the main PPE platform driver and undertakes the initialization of +PPE switch core blocks such as QM, BM and L2. The configuration APIs for these hardware +blocks are provided in the ppe_config.c file. + +The ppe.h defines the PPE device data structure which will be used by PPE driver functions. + +The ppe_debugfs.c enables the PPE statistics counters such as PPE port Rx and Tx counters, +CPU code counters and queue counters. + + +PPE Driver Supported SoCs +========================= + +The PPE driver supports the following IPQ SoC: + +- IPQ9574 + + +Enabling the Driver +=================== + +The driver is located in the menu structure at:: + + -> Device Drivers + -> Network device support (NETDEVICES [=y]) + -> Ethernet driver support + -> Qualcomm devices + -> Qualcomm Technologies, Inc. PPE Ethernet support + +If the driver is built as a module, the module will be called qcom-ppe. + +The PPE driver functionally depends on the CMN PLL and NSSCC clock controller drivers. +Please make sure the dependent modules are installed before installing the PPE driver +module. + + +Debugging +========= + +The PPE hardware counters can be accessed using debugfs interface from the +``/sys/kernel/debug/ppe/`` directory. -- cgit v1.2.3 From ee97f1fe67c0dff62549c6d8e8a7784431e65d46 Mon Sep 17 00:00:00 2001 From: Andrea della Porta Date: Tue, 12 Aug 2025 10:46:39 +0200 Subject: dt-bindings: pinctrl: rp1: Describe groups for RP1 pin controller The DT binding for RP1 pin controller currently lacks the group definitions. Add groups enumeration to the schema. Signed-off-by: Andrea della Porta Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/20250812084639.13442-1-andrea.porta@suse.com Signed-off-by: Linus Walleij --- .../bindings/pinctrl/raspberrypi,rp1-gpio.yaml | 35 +++++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/raspberrypi,rp1-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/raspberrypi,rp1-gpio.yaml index eec9a9b58542..af6fbbd4feea 100644 --- a/Documentation/devicetree/bindings/pinctrl/raspberrypi,rp1-gpio.yaml +++ b/Documentation/devicetree/bindings/pinctrl/raspberrypi,rp1-gpio.yaml @@ -72,10 +72,36 @@ $defs: pins: description: List of gpio pins affected by the properties specified in this - subnode. + subnode (either this or "groups" must be specified). items: pattern: '^gpio([0-9]|[1-4][0-9]|5[0-3])$' + groups: + description: + List of groups affected by the properties specified in this + subnode (either this or "pins" must be specified). + items: + anyOf: + - pattern: '^gpio([0-9]|[1-4][0-9]|5[0-3])$' + - enum: [ uart0, uart0_ctrl, uart1, uart1_ctrl, uart2, uart2_ctrl, + uart3, uart3_ctrl, uart4, uart4_ctrl, uart5_0, + uart5_0_ctrl, uart5_1, uart5_1_ctrl, uart5_2, + uart5_2_ctrl, uart5_3, + sd0, sd1, + i2s0, i2s0_dual, i2s0_quad, i2s1, i2s1_dual, i2s1_quad, + i2s2_0, i2s2_0_dual, i2s2_1, i2s2_1_dual, + i2c4_0, i2c4_1, i2c4_2, i2c4_3, i2c6_0, i2c6_1, i2c5_0, + i2c5_1, i2c5_2, i2c5_3, i2c0_0, i2c0_1, i2c1_0, i2c1_1, + i2c2_0, i2c2_1, i2c3_0, i2c3_1, i2c3_2, + dpi_16bit, dpi_16bit_cpadhi, dpi_16bit_pad666, + dpi_18bit, dpi_18bit_cpadhi, dpi_24bit, + spi0, spi0_quad, spi1, spi2, spi3, spi4, spi5, spi6_0, + spi6_1, spi7_0, spi7_1, spi8_0, spi8_1, + aaud_0, aaud_1, aaud_2, aaud_3, aaud_4, + vbus0_0, vbus0_1, vbus1, vbus2, vbus3, + mic_0, mic_1, mic_2, mic_3, + ir ] + function: enum: [ alt0, alt1, alt2, alt3, alt4, gpio, alt6, alt7, alt8, none, aaud, dcd0, dpi, dsi0_te_ext, dsi1_te_ext, dsr0, dtr0, gpclk0, @@ -103,6 +129,13 @@ $defs: drive-strength: enum: [ 2, 4, 8, 12 ] + required: + - function + + oneOf: + - required: [ groups ] + - required: [ pins ] + additionalProperties: false allOf: -- cgit v1.2.3 From d78e48ebe04e9566f8ecbf51471e80da3adbceeb Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 21 Aug 2025 10:31:01 +0200 Subject: ASoC: dt-bindings: Minor whitespace cleanup in example The DTS code coding style expects exactly one space around '=' character. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250821083100.46340-2-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/sound/fsl,easrc.yaml | 2 +- Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/fsl,easrc.yaml b/Documentation/devicetree/bindings/sound/fsl,easrc.yaml index 8f1108e7e14e..d5727f8bfb0b 100644 --- a/Documentation/devicetree/bindings/sound/fsl,easrc.yaml +++ b/Documentation/devicetree/bindings/sound/fsl,easrc.yaml @@ -104,6 +104,6 @@ examples: "ctx2_rx", "ctx2_tx", "ctx3_rx", "ctx3_tx"; firmware-name = "imx/easrc/easrc-imx8mn.bin"; - fsl,asrc-rate = <8000>; + fsl,asrc-rate = <8000>; fsl,asrc-format = <2>; }; diff --git a/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml b/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml index 85799f83e65f..c9152bac7421 100644 --- a/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml +++ b/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml @@ -176,7 +176,7 @@ examples: <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>; dma-names = "rxa", "rxb", "rxc", "txa", "txb", "txc"; - fsl,asrc-rate = <48000>; + fsl,asrc-rate = <48000>; fsl,asrc-width = <16>; port { -- cgit v1.2.3 From a4d5f63d4384533101e0308fb2e9ac16bacc446c Mon Sep 17 00:00:00 2001 From: Nikunj Kela Date: Wed, 30 Jul 2025 14:30:00 -0700 Subject: dt-bindings: firmware: arm,scmi: Allow multiple instances Enable multiple SCMI instances by appending an instance-number suffix to the 'scmi' node name. The SCMI spec assumes a single SCMI platform, but in practice its responsibilities may be split across several SCMI platform/server instances. However, only one instance can serve as the system-wide (true) SCMI platform. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Cristian Marussi Signed-off-by: Nikunj Kela Signed-off-by: Deepti Jaggi Message-Id: <20250730-8255-scmi-v6-1-a7d8ba19aded@quicinc.com> Signed-off-by: Sudeep Holla --- Documentation/devicetree/bindings/firmware/arm,scmi.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml index abbd62f1fed0..be817fd9cc34 100644 --- a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml +++ b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml @@ -27,7 +27,7 @@ anyOf: properties: $nodename: - const: scmi + pattern: '^scmi(-[0-9]+)?$' compatible: oneOf: -- cgit v1.2.3 From 73c94172e278197fbed9f6a7b7550edc5bc1fbad Mon Sep 17 00:00:00 2001 From: Carlos Llamas Date: Thu, 21 Aug 2025 13:55:21 +0000 Subject: netlink: specs: binder: replace underscores with dashes in names The usage of underscores is no longer allowed for the 'name' format in the yaml spec. Instead, dashes should be used. This fixes the build issue reported by Thorsten that showed up on linux-next. Note this change has no impact on C code. Cc: Jakub Kicinski Reported-by: Thorsten Leemhuis Closes: https://lore.kernel.org/all/e21744a4-0155-40ec-b8c1-d81b14107c9f@leemhuis.info/ Fixes: 63740349eba7 ("binder: introduce transaction reports via netlink") Signed-off-by: Carlos Llamas Reviewed-by: Jakub Kicinski Link: https://lore.kernel.org/r/20250821135522.2878772-1-cmllamas@google.com Signed-off-by: Greg Kroah-Hartman --- Documentation/netlink/specs/binder.yaml | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/binder.yaml b/Documentation/netlink/specs/binder.yaml index 140b77a6afee..0f0575ad1265 100644 --- a/Documentation/netlink/specs/binder.yaml +++ b/Documentation/netlink/specs/binder.yaml @@ -26,27 +26,27 @@ attribute-sets: type: string doc: The binder context where the transaction occurred. - - name: from_pid + name: from-pid type: u32 doc: The PID of the sender process. - - name: from_tid + name: from-tid type: u32 doc: The TID of the sender thread. - - name: to_pid + name: to-pid type: u32 doc: | The PID of the recipient process. This attribute may not be present if the target could not be determined. - - name: to_tid + name: to-tid type: u32 doc: | The TID of the recipient thread. This attribute may not be present if the target could not be determined. - - name: is_reply + name: is-reply type: flag doc: When present, indicates the failed transaction is a reply. - @@ -58,7 +58,7 @@ attribute-sets: type: u32 doc: The application-defined code from the transaction. - - name: data_size + name: data-size type: u32 doc: The transaction payload size in bytes. @@ -78,14 +78,14 @@ operations: attributes: - error - context - - from_pid - - from_tid - - to_pid - - to_tid - - is_reply + - from-pid + - from-tid + - to-pid + - to-tid + - is-reply - flags - code - - data_size + - data-size mcast-groups: list: -- cgit v1.2.3 From 3f13bcc886fc034113cb75cb32b8d9db1216b846 Mon Sep 17 00:00:00 2001 From: Lizhi Hou Date: Wed, 20 Aug 2025 16:38:17 -0700 Subject: Documentation: accel: amdxdna: Update compiler information The compiler information is outdated. Update it to the latest. Reviewed-by: Maciej Falkowski Reviewed-by: Alex Deucher Signed-off-by: Lizhi Hou Link: https://lore.kernel.org/r/20250820233817.4050006-1-lizhi.hou@amd.com --- Documentation/accel/amdxdna/amdnpu.rst | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/accel/amdxdna/amdnpu.rst b/Documentation/accel/amdxdna/amdnpu.rst index fbe0a7585345..42e54904f9a8 100644 --- a/Documentation/accel/amdxdna/amdnpu.rst +++ b/Documentation/accel/amdxdna/amdnpu.rst @@ -223,13 +223,13 @@ Userspace components Compiler -------- -Peano is an LLVM based open-source compiler for AMD XDNA Array compute tile -available at: +Peano is an LLVM based open-source single core compiler for AMD XDNA Array +compute tile. Peano is available at: https://github.com/Xilinx/llvm-aie -The open-source IREE compiler supports graph compilation of ML models for AMD -NPU and uses Peano underneath. It is available at: -https://github.com/nod-ai/iree-amd-aie +IRON is an open-source array compiler for AMD XDNA Array based NPU which uses +Peano underneath. IRON is available at: +https://github.com/Xilinx/mlir-aie Usermode Driver (UMD) --------------------- -- cgit v1.2.3 From 168a4742aff1da4166ce12e294b2094126cac2b9 Mon Sep 17 00:00:00 2001 From: Albin Babu Varghese Date: Wed, 20 Aug 2025 15:47:15 -0400 Subject: Documentation: conf.py: remove repeated word in comment Remove a repeated "are" from a comment in conf.py Signed-off-by: Albin Babu Varghese Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250820194714.130513-2-albinbabuvarghese20@gmail.com --- Documentation/conf.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/conf.py b/Documentation/conf.py index f9828f3862f9..856c04a2abb7 100644 --- a/Documentation/conf.py +++ b/Documentation/conf.py @@ -234,7 +234,7 @@ author = "The kernel development community" # |version| and |release|, also used in various other places throughout the # built documents. # -# In a normal build, version and release are are set to KERNELVERSION and +# In a normal build, version and release are set to KERNELVERSION and # KERNELRELEASE, respectively, from the Makefile via Sphinx command line # arguments. # -- cgit v1.2.3 From af4ed17fa0c4789b8d0f035a4c21abfa63b7e902 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Wed, 20 Aug 2025 12:04:16 +0700 Subject: Documentation: driver-api: usb: Limit toctree depth toctree index in USB driver api docs currently spoils the entire docs headings due to lack of :maxdepth: option. Add the option to limit toctree depth to 1, mirroring usb subsystem docs in Documentation/usb/index.rst. Signed-off-by: Bagas Sanjaya Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250820050416.25219-1-bagasdotme@gmail.com --- Documentation/driver-api/usb/index.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/driver-api/usb/index.rst b/Documentation/driver-api/usb/index.rst index cfa8797ea614..fcb24d0500d9 100644 --- a/Documentation/driver-api/usb/index.rst +++ b/Documentation/driver-api/usb/index.rst @@ -3,6 +3,7 @@ Linux USB API ============= .. toctree:: + :maxdepth: 1 usb gadget -- cgit v1.2.3 From e56878b4770ba237cf487c881a59a779016f93de Mon Sep 17 00:00:00 2001 From: Bartlomiej Kubik Date: Tue, 19 Aug 2025 13:35:51 +0200 Subject: docs: kernel-parameters: typo fix and add missing SPDX-License tag Fix documentation issues by removing a duplicated word and adding the missing SPDX-License identifier. Signed-off-by: Bartlomiej Kubik Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250819113551.34356-1-kubik.bartlomiej@gmail.com --- Documentation/admin-guide/kernel-parameters.rst | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.rst b/Documentation/admin-guide/kernel-parameters.rst index 39d0e7ff0965..7bf8cc7df6b5 100644 --- a/Documentation/admin-guide/kernel-parameters.rst +++ b/Documentation/admin-guide/kernel-parameters.rst @@ -1,3 +1,5 @@ +.. SPDX-License-Identifier: GPL-2.0 + .. _kernelparameters: The kernel's command-line parameters @@ -213,7 +215,7 @@ need or coordination with . There are also arch-specific kernel-parameters not documented here. Note that ALL kernel parameters listed below are CASE SENSITIVE, and that -a trailing = on the name of any parameter states that that parameter will +a trailing = on the name of any parameter states that the parameter will be entered as an environment variable, whereas its absence indicates that it will appear as a kernel argument readable via /proc/cmdline by programs running once the system is up. -- cgit v1.2.3 From 915fb5caad7e569329e376dd7dd9a22afbd27636 Mon Sep 17 00:00:00 2001 From: Mehdi Ben Hadj Khelifa Date: Tue, 19 Aug 2025 09:49:00 +0100 Subject: docs: Corrected typo in trace/events -Changed 'Dyamically' to 'Dynamically' in trace/events.rst under sections 7.1 and 7.3 Signed-off-by: Mehdi Ben Hadj Khelifa Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250819085040.974388-1-mehdi.benhadjkhelifa@gmail.com --- Documentation/trace/events.rst | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/trace/events.rst b/Documentation/trace/events.rst index 2d88a2acacc0..18d112963dec 100644 --- a/Documentation/trace/events.rst +++ b/Documentation/trace/events.rst @@ -629,8 +629,8 @@ following: - tracing synthetic events from in-kernel code - the low-level "dynevent_cmd" API -7.1 Dyamically creating synthetic event definitions ---------------------------------------------------- +7.1 Dynamically creating synthetic event definitions +---------------------------------------------------- There are a couple ways to create a new synthetic event from a kernel module or other kernel code. @@ -944,8 +944,8 @@ Note that synth_event_trace_end() must be called at the end regardless of whether any of the add calls failed (say due to a bad field name being passed in). -7.3 Dyamically creating kprobe and kretprobe event definitions --------------------------------------------------------------- +7.3 Dynamically creating kprobe and kretprobe event definitions +--------------------------------------------------------------- To create a kprobe or kretprobe trace event from kernel code, the kprobe_event_gen_cmd_start() or kretprobe_event_gen_cmd_start() -- cgit v1.2.3 From 4cc7dce79725689d8dd229e13c857aeb97b1c7cf Mon Sep 17 00:00:00 2001 From: Randy Dunlap Date: Tue, 19 Aug 2025 00:54:56 -0700 Subject: docs: sysctl: add a few more top-level /proc/sys entries Add a few missing directories under /proc/sys. Fix punctuation and doubled words. Signed-off-by: Randy Dunlap Cc: Rik van Riel Cc: Jonathan Corbet Cc: linux-doc@vger.kernel.org Reviewed-by: Rik van Riel Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250819075456.113623-1-rdunlap@infradead.org --- Documentation/admin-guide/sysctl/index.rst | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/sysctl/index.rst b/Documentation/admin-guide/sysctl/index.rst index 03346f98c7b9..4dd2c9b5d752 100644 --- a/Documentation/admin-guide/sysctl/index.rst +++ b/Documentation/admin-guide/sysctl/index.rst @@ -66,25 +66,31 @@ This documentation is about: =============== =============================================================== abi/ execution domains & personalities -debug/ -dev/ device specific information (eg dev/cdrom/info) +<$ARCH> tuning controls for various CPU architecture (e.g. csky, s390) +crypto/ +debug/ +dev/ device specific information (e.g. dev/cdrom/info) fs/ specific filesystems filehandle, inode, dentry and quota tuning binfmt_misc kernel/ global kernel info / tuning miscellaneous stuff + some architecture-specific controls + security (LSM) stuff net/ networking stuff, for documentation look in: proc/ sunrpc/ SUN Remote Procedure Call (NFS) +user/ Per user namespace limits vm/ memory management tuning buffer and cache management -user/ Per user per user namespace limits +xen/ =============== =============================================================== -These are the subdirs I have on my system. There might be more -or other subdirs in another setup. If you see another dir, I'd -really like to hear about it :-) +These are the subdirs I have on my system or have been discovered by +searching through the source code. There might be more or other subdirs +in another setup. If you see another dir, I'd really like to hear about +it :-) .. toctree:: :maxdepth: 1 -- cgit v1.2.3 From 41ecad8b233bf480a1f39b76462dcb2c2d3cdfed Mon Sep 17 00:00:00 2001 From: Raphael Pinsonneault-Thibeault Date: Mon, 18 Aug 2025 14:19:34 -0400 Subject: docs: fix trailing whitespace error and remove repeated words in propagate_umount.txt in Documentation/filesystems/propagate_umount.txt: line 289: remove whitespace on blank line line 315: remove duplicate "that" line 364: remove duplicate "in" Signed-off-by: Raphael Pinsonneault-Thibeault Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250818181934.55491-2-rpthibeault@gmail.com --- Documentation/filesystems/propagate_umount.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/propagate_umount.txt b/Documentation/filesystems/propagate_umount.txt index c90349e5b889..9a7eb96df300 100644 --- a/Documentation/filesystems/propagate_umount.txt +++ b/Documentation/filesystems/propagate_umount.txt @@ -286,7 +286,7 @@ Trim_one(m) strip the "seen by Trim_ancestors" mark from m remove m from the Candidates list return - + remove_this = false found = false for each n in children(m) @@ -312,7 +312,7 @@ Trim_ancestors(m) } Terminating condition in the loop in Trim_ancestors() is correct, -since that that loop will never run into p belonging to U - p is always +since that loop will never run into p belonging to U - p is always an ancestor of argument of Trim_one() and since U is closed, the argument of Trim_one() would also have to belong to U. But Trim_one() is never called for elements of U. In other words, p belongs to S if and only @@ -361,7 +361,7 @@ such removals. Proof: suppose S was non-shifting, x is a locked element of S, parent of x is not in S and S - {x} is not non-shifting. Then there is an element m in S - {x} and a subtree mounted strictly inside m, such that m contains -an element not in in S - {x}. Since S is non-shifting, everything in +an element not in S - {x}. Since S is non-shifting, everything in that subtree must belong to S. But that means that this subtree must contain x somewhere *and* that parent of x either belongs that subtree or is equal to m. Either way it must belong to S. Contradiction. -- cgit v1.2.3 From 9256019241c9afdd7b27d4b97e9568f5721d97e3 Mon Sep 17 00:00:00 2001 From: Sebastian Andrzej Siewior Date: Fri, 15 Aug 2025 11:38:55 +0200 Subject: Documentation: seqlock: Add a SPDX license identifier Add a SPDX identifier. The majority of the document has been written by Ahmed S. Darwish. Cc: Ahmed S. Darwish Acked-by: Ahmed S. Darwish Signed-off-by: Sebastian Andrzej Siewior Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250815093858.930751-2-bigeasy@linutronix.de --- Documentation/locking/seqlock.rst | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/locking/seqlock.rst b/Documentation/locking/seqlock.rst index ec6411d02ac8..3fb7ea3ab22a 100644 --- a/Documentation/locking/seqlock.rst +++ b/Documentation/locking/seqlock.rst @@ -1,3 +1,5 @@ +.. SPDX-License-Identifier: GPL-2.0 + ====================================== Sequence counters and sequential locks ====================================== -- cgit v1.2.3 From f41c808c43883d3d7b46e7742a93127acb81d60b Mon Sep 17 00:00:00 2001 From: Sebastian Andrzej Siewior Date: Fri, 15 Aug 2025 11:38:56 +0200 Subject: Documentation: locking: Add local_lock_nested_bh() to locktypes local_lock_nested_bh() is used within networking where applicable. Document why it is used and how it behaves. Signed-off-by: Sebastian Andrzej Siewior Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250815093858.930751-3-bigeasy@linutronix.de --- Documentation/locking/locktypes.rst | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'Documentation') diff --git a/Documentation/locking/locktypes.rst b/Documentation/locking/locktypes.rst index 80c914f6eae7..37b6a5670c2f 100644 --- a/Documentation/locking/locktypes.rst +++ b/Documentation/locking/locktypes.rst @@ -204,6 +204,27 @@ per-CPU data structures on a non PREEMPT_RT kernel. local_lock is not suitable to protect against preemption or interrupts on a PREEMPT_RT kernel due to the PREEMPT_RT specific spinlock_t semantics. +CPU local scope and bottom-half +------------------------------- + +Per-CPU variables that are accessed only in softirq context should not rely on +the assumption that this context is implicitly protected due to being +non-preemptible. In a PREEMPT_RT kernel, softirq context is preemptible, and +synchronizing every bottom-half-disabled section via implicit context results +in an implicit per-CPU "big kernel lock." + +A local_lock_t together with local_lock_nested_bh() and +local_unlock_nested_bh() for locking operations help to identify the locking +scope. + +When lockdep is enabled, these functions verify that data structure access +occurs within softirq context. +Unlike local_lock(), local_unlock_nested_bh() does not disable preemption and +does not add overhead when used without lockdep. + +On a PREEMPT_RT kernel, local_lock_t behaves as a real lock and +local_unlock_nested_bh() serializes access to the data structure, which allows +removal of serialization via local_bh_disable(). raw_spinlock_t and spinlock_t ============================= -- cgit v1.2.3 From f51fe3b7e48ca81a9cee15c0146e4fb7d3000d3a Mon Sep 17 00:00:00 2001 From: Sebastian Andrzej Siewior Date: Fri, 15 Aug 2025 11:38:57 +0200 Subject: Documentation: Add real-time to core-api The documents explain the design concepts behind PREEMPT_RT and highlight key differences necessary to achieve it. It also include a list of requirements that must be fulfilled to support PREEMPT_RT on a given architecture. Signed-off-by: Sebastian Andrzej Siewior [jc: tweaked "how they differ" section head] Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250815093858.930751-4-bigeasy@linutronix.de --- Documentation/core-api/index.rst | 1 + .../core-api/real-time/architecture-porting.rst | 109 ++++++++++ Documentation/core-api/real-time/differences.rst | 242 +++++++++++++++++++++ Documentation/core-api/real-time/index.rst | 16 ++ Documentation/core-api/real-time/theory.rst | 116 ++++++++++ 5 files changed, 484 insertions(+) create mode 100644 Documentation/core-api/real-time/architecture-porting.rst create mode 100644 Documentation/core-api/real-time/differences.rst create mode 100644 Documentation/core-api/real-time/index.rst create mode 100644 Documentation/core-api/real-time/theory.rst (limited to 'Documentation') diff --git a/Documentation/core-api/index.rst b/Documentation/core-api/index.rst index a03a99c2cac5..6cbdcbfa79c3 100644 --- a/Documentation/core-api/index.rst +++ b/Documentation/core-api/index.rst @@ -24,6 +24,7 @@ it. printk-index symbol-namespaces asm-annotations + real-time/index Data structures and low-level utilities ======================================= diff --git a/Documentation/core-api/real-time/architecture-porting.rst b/Documentation/core-api/real-time/architecture-porting.rst new file mode 100644 index 000000000000..d822fac29922 --- /dev/null +++ b/Documentation/core-api/real-time/architecture-porting.rst @@ -0,0 +1,109 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================================= +Porting an architecture to support PREEMPT_RT +============================================= + +:Author: Sebastian Andrzej Siewior + +This list outlines the architecture specific requirements that must be +implemented in order to enable PREEMPT_RT. Once all required features are +implemented, ARCH_SUPPORTS_RT can be selected in architecture’s Kconfig to make +PREEMPT_RT selectable. +Many prerequisites (genirq support for example) are enforced by the common code +and are omitted here. + +The optional features are not strictly required but it is worth to consider +them. + +Requirements +------------ + +Forced threaded interrupts + CONFIG_IRQ_FORCED_THREADING must be selected. Any interrupts that must + remain in hard-IRQ context must be marked with IRQF_NO_THREAD. This + requirement applies for instance to clocksource event interrupts, + perf interrupts and cascading interrupt-controller handlers. + +PREEMPTION support + Kernel preemption must be supported and requires that + CONFIG_ARCH_NO_PREEMPT remain unselected. Scheduling requests, such as those + issued from an interrupt or other exception handler, must be processed + immediately. + +POSIX CPU timers and KVM + POSIX CPU timers must expire from thread context rather than directly within + the timer interrupt. This behavior is enabled by setting the configuration + option CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK. + When KVM is enabled, CONFIG_KVM_XFER_TO_GUEST_WORK must also be set to ensure + that any pending work, such as POSIX timer expiration, is handled before + transitioning into guest mode. + +Hard-IRQ and Soft-IRQ stacks + Soft interrupts are handled in the thread context in which they are raised. If + a soft interrupt is triggered from hard-IRQ context, its execution is deferred + to the ksoftirqd thread. Preemption is never disabled during soft interrupt + handling, which makes soft interrupts preemptible. + If an architecture provides a custom __do_softirq() implementation that uses a + separate stack, it must select CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK. The + functionality should only be enabled when CONFIG_SOFTIRQ_ON_OWN_STACK is set. + +FPU and SIMD access in kernel mode + FPU and SIMD registers are typically not used in kernel mode and are therefore + not saved during kernel preemption. As a result, any kernel code that uses + these registers must be enclosed within a kernel_fpu_begin() and + kernel_fpu_end() section. + The kernel_fpu_begin() function usually invokes local_bh_disable() to prevent + interruptions from softirqs and to disable regular preemption. This allows the + protected code to run safely in both thread and softirq contexts. + On PREEMPT_RT kernels, however, kernel_fpu_begin() must not call + local_bh_disable(). Instead, it should use preempt_disable(), since softirqs + are always handled in thread context under PREEMPT_RT. In this case, disabling + preemption alone is sufficient. + The crypto subsystem operates on memory pages and requires users to "walk and + map" these pages while processing a request. This operation must occur outside + the kernel_fpu_begin()/ kernel_fpu_end() section because it requires preemption + to be enabled. These preemption points are generally sufficient to avoid + excessive scheduling latency. + +Exception handlers + Exception handlers, such as the page fault handler, typically enable interrupts + early, before invoking any generic code to process the exception. This is + necessary because handling a page fault may involve operations that can sleep. + Enabling interrupts is especially important on PREEMPT_RT, where certain + locks, such as spinlock_t, become sleepable. For example, handling an + invalid opcode may result in sending a SIGILL signal to the user task. A + debug excpetion will send a SIGTRAP signal. + In both cases, if the exception occurred in user space, it is safe to enable + interrupts early. Sending a signal requires both interrupts and kernel + preemption to be enabled. + +Optional features +----------------- + +Timer and clocksource + A high-resolution clocksource and clockevents device are recommended. The + clockevents device should support the CLOCK_EVT_FEAT_ONESHOT feature for + optimal timer behavior. In most cases, microsecond-level accuracy is + sufficient + +Lazy preemption + This mechanism allows an in-kernel scheduling request for non-real-time tasks + to be delayed until the task is about to return to user space. It helps avoid + preempting a task that holds a sleeping lock at the time of the scheduling + request. + With CONFIG_GENERIC_IRQ_ENTRY enabled, supporting this feature requires + defining a bit for TIF_NEED_RESCHED_LAZY, preferably near TIF_NEED_RESCHED. + +Serial console with NBCON + With PREEMPT_RT enabled, all console output is handled by a dedicated thread + rather than directly from the context in which printk() is invoked. This design + allows printk() to be safely used in atomic contexts. + However, this also means that if the kernel crashes and cannot switch to the + printing thread, no output will be visible preventing the system from printing + its final messages. + There are exceptions for immediate output, such as during panic() handling. To + support this, the console driver must implement new-style lock handling. This + involves setting the CON_NBCON flag in console::flags and providing + implementations for the write_atomic, write_thread, device_lock, and + device_unlock callbacks. diff --git a/Documentation/core-api/real-time/differences.rst b/Documentation/core-api/real-time/differences.rst new file mode 100644 index 000000000000..83ec9aa1c61a --- /dev/null +++ b/Documentation/core-api/real-time/differences.rst @@ -0,0 +1,242 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=========================== +How realtime kernels differ +=========================== + +:Author: Sebastian Andrzej Siewior + +Preface +======= + +With forced-threaded interrupts and sleeping spin locks, code paths that +previously caused long scheduling latencies have been made preemptible and +moved into process context. This allows the scheduler to manage them more +effectively and respond to higher-priority tasks with reduced latency. + +The following chapters provide an overview of key differences between a +PREEMPT_RT kernel and a standard, non-PREEMPT_RT kernel. + +Locking +======= + +Spinning locks such as spinlock_t are used to provide synchronization for data +structures accessed from both interrupt context and process context. For this +reason, locking functions are also available with the _irq() or _irqsave() +suffixes, which disable interrupts before acquiring the lock. This ensures that +the lock can be safely acquired in process context when interrupts are enabled. + +However, on a PREEMPT_RT system, interrupts are forced-threaded and no longer +run in hard IRQ context. As a result, there is no need to disable interrupts as +part of the locking procedure when using spinlock_t. + +For low-level core components such as interrupt handling, the scheduler, or the +timer subsystem the kernel uses raw_spinlock_t. This lock type preserves +traditional semantics: it disables preemption and, when used with _irq() or +_irqsave(), also disables interrupts. This ensures proper synchronization in +critical sections that must remain non-preemptible or with interrupts disabled. + +Execution context +================= + +Interrupt handling in a PREEMPT_RT system is invoked in process context through +the use of threaded interrupts. Other parts of the kernel also shift their +execution into threaded context by different mechanisms. The goal is to keep +execution paths preemptible, allowing the scheduler to interrupt them when a +higher-priority task needs to run. + +Below is an overview of the kernel subsystems involved in this transition to +threaded, preemptible execution. + +Interrupt handling +------------------ + +All interrupts are forced-threaded in a PREEMPT_RT system. The exceptions are +interrupts that are requested with the IRQF_NO_THREAD, IRQF_PERCPU, or +IRQF_ONESHOT flags. + +The IRQF_ONESHOT flag is used together with threaded interrupts, meaning those +registered using request_threaded_irq() and providing only a threaded handler. +Its purpose is to keep the interrupt line masked until the threaded handler has +completed. + +If a primary handler is also provided in this case, it is essential that the +handler does not acquire any sleeping locks, as it will not be threaded. The +handler should be minimal and must avoid introducing delays, such as +busy-waiting on hardware registers. + + +Soft interrupts, bottom half handling +------------------------------------- + +Soft interrupts are raised by the interrupt handler and are executed after the +handler returns. Since they run in thread context, they can be preempted by +other threads. Do not assume that softirq context runs with preemption +disabled. This means you must not rely on mechanisms like local_bh_disable() in +process context to protect per-CPU variables. Because softirq handlers are +preemptible under PREEMPT_RT, this approach does not provide reliable +synchronization. + +If this kind of protection is required for performance reasons, consider using +local_lock_nested_bh(). On non-PREEMPT_RT kernels, this allows lockdep to +verify that bottom halves are disabled. On PREEMPT_RT systems, it adds the +necessary locking to ensure proper protection. + +Using local_lock_nested_bh() also makes the locking scope explicit and easier +for readers and maintainers to understand. + + +per-CPU variables +----------------- + +Protecting access to per-CPU variables solely by using preempt_disable() should +be avoided, especially if the critical section has unbounded runtime or may +call APIs that can sleep. + +If using a spinlock_t is considered too costly for performance reasons, +consider using local_lock_t. On non-PREEMPT_RT configurations, this introduces +no runtime overhead when lockdep is disabled. With lockdep enabled, it verifies +that the lock is only acquired in process context and never from softirq or +hard IRQ context. + +On a PREEMPT_RT kernel, local_lock_t is implemented using a per-CPU spinlock_t, +which provides safe local protection for per-CPU data while keeping the system +preemptible. + +Because spinlock_t on PREEMPT_RT does not disable preemption, it cannot be used +to protect per-CPU data by relying on implicit preemption disabling. If this +inherited preemption disabling is essential and if local_lock_t cannot be used +due to performance constraints, brevity of the code, or abstraction boundaries +within an API then preempt_disable_nested() may be a suitable alternative. On +non-PREEMPT_RT kernels, it verifies with lockdep that preemption is already +disabled. On PREEMPT_RT, it explicitly disables preemption. + +Timers +------ + +By default, an hrtimer is executed in hard interrupt context. The exception is +timers initialized with the HRTIMER_MODE_SOFT flag, which are executed in +softirq context. + +On a PREEMPT_RT kernel, this behavior is reversed: hrtimers are executed in +softirq context by default, typically within the ktimersd thread. This thread +runs at the lowest real-time priority, ensuring it executes before any +SCHED_OTHER tasks but does not interfere with higher-priority real-time +threads. To explicitly request execution in hard interrupt context on +PREEMPT_RT, the timer must be marked with the HRTIMER_MODE_HARD flag. + +Memory allocation +----------------- + +The memory allocation APIs, such as kmalloc() and alloc_pages(), require a +gfp_t flag to indicate the allocation context. On non-PREEMPT_RT kernels, it is +necessary to use GFP_ATOMIC when allocating memory from interrupt context or +from sections where preemption is disabled. This is because the allocator must +not sleep in these contexts waiting for memory to become available. + +However, this approach does not work on PREEMPT_RT kernels. The memory +allocator in PREEMPT_RT uses sleeping locks internally, which cannot be +acquired when preemption is disabled. Fortunately, this is generally not a +problem, because PREEMPT_RT moves most contexts that would traditionally run +with preemption or interrupts disabled into threaded context, where sleeping is +allowed. + +What remains problematic is code that explicitly disables preemption or +interrupts. In such cases, memory allocation must be performed outside the +critical section. + +This restriction also applies to memory deallocation routines such as kfree() +and free_pages(), which may also involve internal locking and must not be +called from non-preemptible contexts. + +IRQ work +-------- + +The irq_work API provides a mechanism to schedule a callback in interrupt +context. It is designed for use in contexts where traditional scheduling is not +possible, such as from within NMI handlers or from inside the scheduler, where +using a workqueue would be unsafe. + +On non-PREEMPT_RT systems, all irq_work items are executed immediately in +interrupt context. Items marked with IRQ_WORK_LAZY are deferred until the next +timer tick but are still executed in interrupt context. + +On PREEMPT_RT systems, the execution model changes. Because irq_work callbacks +may acquire sleeping locks or have unbounded execution time, they are handled +in thread context by a per-CPU irq_work kernel thread. This thread runs at the +lowest real-time priority, ensuring it executes before any SCHED_OTHER tasks +but does not interfere with higher-priority real-time threads. + +The exception are work items marked with IRQ_WORK_HARD_IRQ, which are still +executed in hard interrupt context. Lazy items (IRQ_WORK_LAZY) continue to be +deferred until the next timer tick and are also executed by the irq_work/ +thread. + +RCU callbacks +------------- + +RCU callbacks are invoked by default in softirq context. Their execution is +important because, depending on the use case, they either free memory or ensure +progress in state transitions. Running these callbacks as part of the softirq +chain can lead to undesired situations, such as contention for CPU resources +with other SCHED_OTHER tasks when executed within ksoftirqd. + +To avoid running callbacks in softirq context, the RCU subsystem provides a +mechanism to execute them in process context instead. This behavior can be +enabled by setting the boot command-line parameter rcutree.use_softirq=0. This +setting is enforced in kernels configured with PREEMPT_RT. + +Spin until ready +================ + +The "spin until ready" pattern involves repeatedly checking (spinning on) the +state of a data structure until it becomes available. This pattern assumes that +preemption, soft interrupts, or interrupts are disabled. If the data structure +is marked busy, it is presumed to be in use by another CPU, and spinning should +eventually succeed as that CPU makes progress. + +Some examples are hrtimer_cancel() or timer_delete_sync(). These functions +cancel timers that execute with interrupts or soft interrupts disabled. If a +thread attempts to cancel a timer and finds it active, spinning until the +callback completes is safe because the callback can only run on another CPU and +will eventually finish. + +On PREEMPT_RT kernels, however, timer callbacks run in thread context. This +introduces a challenge: a higher-priority thread attempting to cancel the timer +may preempt the timer callback thread. Since the scheduler cannot migrate the +callback thread to another CPU due to affinity constraints, spinning can result +in livelock even on multiprocessor systems. + +To avoid this, both the canceling and callback sides must use a handshake +mechanism that supports priority inheritance. This allows the canceling thread +to suspend until the callback completes, ensuring forward progress without +risking livelock. + +In order to solve the problem at the API level, the sequence locks were extended +to allow a proper handover between the the spinning reader and the maybe +blocked writer. + +Sequence locks +-------------- + +Sequence counters and sequential locks are documented in +Documentation/locking/seqlock.rst. + +The interface has been extended to ensure proper preemption states for the +writer and spinning reader contexts. This is achieved by embedding the writer +serialization lock directly into the sequence counter type, resulting in +composite types such as seqcount_spinlock_t or seqcount_mutex_t. + +These composite types allow readers to detect an ongoing write and actively +boost the writer’s priority to help it complete its update instead of spinning +and waiting for its completion. + +If the plain seqcount_t is used, extra care must be taken to synchronize the +reader with the writer during updates. The writer must ensure its update is +serialized and non-preemptible relative to the reader. This cannot be achieved +using a regular spinlock_t because spinlock_t on PREEMPT_RT does not disable +preemption. In such cases, using seqcount_spinlock_t is the preferred solution. + +However, if there is no spinning involved i.e., if the reader only needs to +detect whether a write has started and not serialize against it then using +seqcount_t is reasonable. diff --git a/Documentation/core-api/real-time/index.rst b/Documentation/core-api/real-time/index.rst new file mode 100644 index 000000000000..7e14c4ea3d59 --- /dev/null +++ b/Documentation/core-api/real-time/index.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: GPL-2.0 + +===================== +Real-time preemption +===================== + +This documentation is intended for Linux kernel developers and contributors +interested in the inner workings of PREEMPT_RT. It explains key concepts and +the required changes compared to a non-PREEMPT_RT configuration. + +.. toctree:: + :maxdepth: 2 + + theory + differences + architecture-porting diff --git a/Documentation/core-api/real-time/theory.rst b/Documentation/core-api/real-time/theory.rst new file mode 100644 index 000000000000..43d0120737f8 --- /dev/null +++ b/Documentation/core-api/real-time/theory.rst @@ -0,0 +1,116 @@ +.. SPDX-License-Identifier: GPL-2.0 + +===================== +Theory of operation +===================== + +:Author: Sebastian Andrzej Siewior + +Preface +======= + +PREEMPT_RT transforms the Linux kernel into a real-time kernel. It achieves +this by replacing locking primitives, such as spinlock_t, with a preemptible +and priority-inheritance aware implementation known as rtmutex, and by enforcing +the use of threaded interrupts. As a result, the kernel becomes fully +preemptible, with the exception of a few critical code paths, including entry +code, the scheduler, and low-level interrupt handling routines. + +This transformation places the majority of kernel execution contexts under the +control of the scheduler and significantly increasing the number of preemption +points. Consequently, it reduces the latency between a high-priority task +becoming runnable and its actual execution on the CPU. + +Scheduling +========== + +The core principles of Linux scheduling and the associated user-space API are +documented in the man page sched(7) +`sched(7) `_. +By default, the Linux kernel uses the SCHED_OTHER scheduling policy. Under +this policy, a task is preempted when the scheduler determines that it has +consumed a fair share of CPU time relative to other runnable tasks. However, +the policy does not guarantee immediate preemption when a new SCHED_OTHER task +becomes runnable. The currently running task may continue executing. + +This behavior differs from that of real-time scheduling policies such as +SCHED_FIFO. When a task with a real-time policy becomes runnable, the +scheduler immediately selects it for execution if it has a higher priority than +the currently running task. The task continues to run until it voluntarily +yields the CPU, typically by blocking on an event. + +Sleeping spin locks +=================== + +The various lock types and their behavior under real-time configurations are +described in detail in Documentation/locking/locktypes.rst. +In a non-PREEMPT_RT configuration, a spinlock_t is acquired by first disabling +preemption and then actively spinning until the lock becomes available. Once +the lock is released, preemption is enabled. From a real-time perspective, +this approach is undesirable because disabling preemption prevents the +scheduler from switching to a higher-priority task, potentially increasing +latency. + +To address this, PREEMPT_RT replaces spinning locks with sleeping spin locks +that do not disable preemption. On PREEMPT_RT, spinlock_t is implemented using +rtmutex. Instead of spinning, a task attempting to acquire a contended lock +disables CPU migration, donates its priority to the lock owner (priority +inheritance), and voluntarily schedules out while waiting for the lock to +become available. + +Disabling CPU migration provides the same effect as disabling preemption, while +still allowing preemption and ensuring that the task continues to run on the +same CPU while holding a sleeping lock. + +Priority inheritance +==================== + +Lock types such as spinlock_t and mutex_t in a PREEMPT_RT enabled kernel are +implemented on top of rtmutex, which provides support for priority inheritance +(PI). When a task blocks on such a lock, the PI mechanism temporarily +propagates the blocked task’s scheduling parameters to the lock owner. + +For example, if a SCHED_FIFO task A blocks on a lock currently held by a +SCHED_OTHER task B, task A’s scheduling policy and priority are temporarily +inherited by task B. After this inheritance, task A is put to sleep while +waiting for the lock, and task B effectively becomes the highest-priority task +in the system. This allows B to continue executing, make progress, and +eventually release the lock. + +Once B releases the lock, it reverts to its original scheduling parameters, and +task A can resume execution. + +Threaded interrupts +=================== + +Interrupt handlers are another source of code that executes with preemption +disabled and outside the control of the scheduler. To bring interrupt handling +under scheduler control, PREEMPT_RT enforces threaded interrupt handlers. + +With forced threading, interrupt handling is split into two stages. The first +stage, the primary handler, is executed in IRQ context with interrupts disabled. +Its sole responsibility is to wake the associated threaded handler. The second +stage, the threaded handler, is the function passed to request_irq() as the +interrupt handler. It runs in process context, scheduled by the kernel. + +From waking the interrupt thread until threaded handling is completed, the +interrupt source is masked in the interrupt controller. This ensures that the +device interrupt remains pending but does not retrigger the CPU, allowing the +system to exit IRQ context and handle the interrupt in a scheduled thread. + +By default, the threaded handler executes with the SCHED_FIFO scheduling policy +and a priority of 50 (MAX_RT_PRIO / 2), which is midway between the minimum and +maximum real-time priorities. + +If the threaded interrupt handler raises any soft interrupts during its +execution, those soft interrupt routines are invoked after the threaded handler +completes, within the same thread. Preemption remains enabled during the +execution of the soft interrupt handler. + +Summary +======= + +By using sleeping locks and forced-threaded interrupts, PREEMPT_RT +significantly reduces sections of code where interrupts or preemption is +disabled, allowing the scheduler to preempt the current execution context and +switch to a higher-priority task. -- cgit v1.2.3 From 30c33b62eb875e9840e151f8ba2f7d2558d7e3ba Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 21 Aug 2025 10:16:37 +0200 Subject: docs: Makefile: Fix LaTeX paper size settings According with: https://www.sphinx-doc.org/en/master/latex.html The variable that handles paper size changed during version 1.5, as pointed at: https://www.sphinx-doc.org/en/master/changes/1.5.html Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/c50db42ead36010fd42ce1e6a2b9da766c11927b.1755763127.git.mchehab+huawei@kernel.org --- Documentation/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/Makefile b/Documentation/Makefile index 820f07e0afe6..2ed334971acd 100644 --- a/Documentation/Makefile +++ b/Documentation/Makefile @@ -60,8 +60,8 @@ ifeq ($(HAVE_LATEXMK),1) endif #HAVE_LATEXMK # Internal variables. -PAPEROPT_a4 = -D latex_paper_size=a4 -PAPEROPT_letter = -D latex_paper_size=letter +PAPEROPT_a4 = -D latex_elements.papersize=a4paper +PAPEROPT_letter = -D latex_elements.papersize=letterpaper ALLSPHINXOPTS = -D kerneldoc_srctree=$(srctree) -D kerneldoc_bin=$(KERNELDOC) ALLSPHINXOPTS += $(PAPEROPT_$(PAPER)) $(SPHINXOPTS) ifneq ($(wildcard $(srctree)/.config),) -- cgit v1.2.3 From f62ed7688cfe1a09b61776216380b56221a17c5c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 21 Aug 2025 10:16:38 +0200 Subject: docs: conf.py: better handle latex documents The original logic assumed that app.srcdir is identical to the current working dir. This is the case for a normal build, but, when SPHINXDIRS="some dir" is used, this is not the case anymore. Adjust the logic to fill the LaTeX documents considering app.srcdir, in a way that it will work properly on all cases. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/de23b35a770210950c609deaa32b98cb3673a53a.1755763127.git.mchehab+huawei@kernel.org --- Documentation/conf.py | 54 +++++++++++++++++++++++++-------------------------- 1 file changed, 26 insertions(+), 28 deletions(-) (limited to 'Documentation') diff --git a/Documentation/conf.py b/Documentation/conf.py index 856c04a2abb7..217c3c778e1e 100644 --- a/Documentation/conf.py +++ b/Documentation/conf.py @@ -51,11 +51,13 @@ else: dyn_exclude_patterns.append("devicetree/bindings/**.yaml") dyn_exclude_patterns.append("core-api/kho/bindings/**.yaml") -# Properly handle include/exclude patterns -# ---------------------------------------- +# Properly handle directory patterns and LaTeX docs +# ------------------------------------------------- -def update_patterns(app, config): +def config_init(app, config): """ + Initialize path-dependent variabled + On Sphinx, all directories are relative to what it is passed as SOURCEDIR parameter for sphinx-build. Due to that, all patterns that have directory names on it need to be dynamically set, after @@ -86,6 +88,25 @@ def update_patterns(app, config): config.exclude_patterns.append(rel_path) + # LaTeX and PDF output require a list of documents with are dependent + # of the app.srcdir. Add them here + + for fn in os.listdir(app.srcdir): + doc = os.path.join(fn, "index") + if not os.path.exists(os.path.join(app.srcdir, doc + ".rst")): + continue + + has = False + for l in latex_documents: + if l[0] == doc: + has = True + break + + if not has: + latex_documents.append((doc, fn + ".tex", + "Linux %s Documentation" % fn.capitalize(), + "The kernel development community", + "manual")) # helper # ------ @@ -456,32 +477,9 @@ latex_elements["preamble"] += """ \\input{kerneldoc-preamble.sty} """ -# Grouping the document tree into LaTeX files. List of tuples -# (source start file, target name, title, -# author, documentclass [howto, manual, or own class]). -# Sorted in alphabetical order +# This will be filled up by config-inited event latex_documents = [] -# Add all other index files from Documentation/ subdirectories -for fn in os.listdir("."): - doc = os.path.join(fn, "index") - if os.path.exists(doc + ".rst"): - has = False - for l in latex_documents: - if l[0] == doc: - has = True - break - if not has: - latex_documents.append( - ( - doc, - fn + ".tex", - "Linux %s Documentation" % fn.capitalize(), - "The kernel development community", - "manual", - ) - ) - # The name of an image file (relative to this directory) to place at the top of # the title page. # latex_logo = None @@ -577,4 +575,4 @@ loadConfig(globals()) def setup(app): """Patterns need to be updated at init time on older Sphinx versions""" - app.connect('config-inited', update_patterns) + app.connect('config-inited', config_init) -- cgit v1.2.3 From 280fa75c2cf51793313400d5e3737d5c3131dd5b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 21 Aug 2025 10:16:39 +0200 Subject: docs: conf.py: fix doc name with SPHINXDIRS When SPHINXDIRS is used, the current logic produces a wrong list of files, as it will not pick the SPHINXDIRS directory, picking instead their children. Add a rule to detect it and create the PDF doc with the right name. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/183f630643eacf414cfa8d892f03dd1b1055c21e.1755763127.git.mchehab+huawei@kernel.org --- Documentation/conf.py | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'Documentation') diff --git a/Documentation/conf.py b/Documentation/conf.py index 217c3c778e1e..69290cadc2db 100644 --- a/Documentation/conf.py +++ b/Documentation/conf.py @@ -91,6 +91,19 @@ def config_init(app, config): # LaTeX and PDF output require a list of documents with are dependent # of the app.srcdir. Add them here + # When SPHINXDIRS is used, we just need to get index.rst, if it exists + if not os.path.samefile(doctree, app.srcdir): + doc = "index" + doc_name = os.path.basename(app.srcdir) + if os.path.exists(os.path.join(app.srcdir, doc + ".rst")): + latex_documents.append((doc, doc_name + ".tex", + "Linux %s Documentation" % doc_name.capitalize(), + "The kernel development community", + "manual")) + return + + # When building all docs, or when a main index.rst doesn't exist, seek + # for it on subdirectories for fn in os.listdir(app.srcdir): doc = os.path.join(fn, "index") if not os.path.exists(os.path.join(app.srcdir, doc + ".rst")): -- cgit v1.2.3 From 9fd4e4ce7e937e4a750a5dc49bd285641e977c5e Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 21 Aug 2025 10:16:40 +0200 Subject: docs: conf.py: rename some vars at latex_documents logic Currently, the logic uses fn and doc vars, but they don't properly describe what such vars do. Make them clearer: - fname: points to the file name to search (index.rst); - doc: contains the name of the LaTeX or PDF doc to be produced. With that, the checks for SPHINXDIRS and for subdirs will be more coherent. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/b030d9bc53550905adbe9367b2a3915d7331b4c5.1755763127.git.mchehab+huawei@kernel.org --- Documentation/conf.py | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/conf.py b/Documentation/conf.py index 69290cadc2db..4db4883901f4 100644 --- a/Documentation/conf.py +++ b/Documentation/conf.py @@ -93,31 +93,31 @@ def config_init(app, config): # When SPHINXDIRS is used, we just need to get index.rst, if it exists if not os.path.samefile(doctree, app.srcdir): - doc = "index" - doc_name = os.path.basename(app.srcdir) - if os.path.exists(os.path.join(app.srcdir, doc + ".rst")): - latex_documents.append((doc, doc_name + ".tex", - "Linux %s Documentation" % doc_name.capitalize(), + doc = os.path.basename(app.srcdir) + fname = "index" + if os.path.exists(os.path.join(app.srcdir, fname + ".rst")): + latex_documents.append((fname, doc + ".tex", + "Linux %s Documentation" % doc.capitalize(), "The kernel development community", "manual")) return # When building all docs, or when a main index.rst doesn't exist, seek # for it on subdirectories - for fn in os.listdir(app.srcdir): - doc = os.path.join(fn, "index") - if not os.path.exists(os.path.join(app.srcdir, doc + ".rst")): + for doc in os.listdir(app.srcdir): + fname = os.path.join(doc, "index") + if not os.path.exists(os.path.join(app.srcdir, fname + ".rst")): continue has = False for l in latex_documents: - if l[0] == doc: + if l[0] == fname: has = True break if not has: - latex_documents.append((doc, fn + ".tex", - "Linux %s Documentation" % fn.capitalize(), + latex_documents.append((fname, doc + ".tex", + "Linux %s Documentation" % doc.capitalize(), "The kernel development community", "manual")) -- cgit v1.2.3 From e7880da7ed881c160a60784b6e011ad8b16aeb33 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 21 Aug 2025 10:16:41 +0200 Subject: docs: conf.py: use dedent and r-strings for LaTeX macros Instead of adding extra weird indentation at the tex file, use dedent(). While here, also use r-strings, to make easier to make its content identical to the .tex output. While here, also merge "preamble" that was added on two separate parts of the code (in the past, there were some version-specific checks). No functional changes, just cosmetic ones. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/0d245fbd872ab3ec21bd8fe78b01340ba77ce365.1755763127.git.mchehab+huawei@kernel.org --- Documentation/conf.py | 26 ++++++++++++-------------- 1 file changed, 12 insertions(+), 14 deletions(-) (limited to 'Documentation') diff --git a/Documentation/conf.py b/Documentation/conf.py index 4db4883901f4..e00ec8f59f25 100644 --- a/Documentation/conf.py +++ b/Documentation/conf.py @@ -9,6 +9,8 @@ import os import shutil import sys +from textwrap import dedent + import sphinx # If extensions (or modules to document with autodoc) are in another directory, @@ -462,11 +464,11 @@ latex_elements = { "inputenc": "", "utf8extra": "", # Set document margins - "sphinxsetup": """ + "sphinxsetup": dedent(r""" hmargin=0.5in, vmargin=1in, parsedliteralwraps=true, verbatimhintsturnover=false, - """, + """), # # Some of our authors are fond of deep nesting; tell latex to # cope. @@ -475,20 +477,16 @@ latex_elements = { # For CJK One-half spacing, need to be in front of hyperref "extrapackages": r"\usepackage{setspace}", # Additional stuff for the LaTeX preamble. - "preamble": """ + "preamble": dedent(r""" % Use some font with UTF-8 support with XeLaTeX - \\usepackage{fontspec} - \\setsansfont{DejaVu Sans} - \\setromanfont{DejaVu Serif} - \\setmonofont{DejaVu Sans Mono} - """, -} - -# Load kerneldoc specific LaTeX settings -latex_elements["preamble"] += """ + \usepackage{fontspec} + \setsansfont{DejaVu Sans} + \setromanfont{DejaVu Serif} + \setmonofont{DejaVu Sans Mono} % Load kerneldoc specific LaTeX settings - \\input{kerneldoc-preamble.sty} -""" + \input{kerneldoc-preamble.sty} + """) +} # This will be filled up by config-inited event latex_documents = [] -- cgit v1.2.3 From d3265de62fb7e9f30c6ad1195d0bf12edcf3d20f Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 21 Aug 2025 10:16:42 +0200 Subject: docs: conf.py: fix some troubles for LaTeX output While PDF docs work fine on RPM-based distros, it causes conflicts on Debian & friends. There are multiple root causes here: - the latex_elements still resambles the one from Sphinx 1.x times, where font configurations were stored under "preamble". It doesn't follow the current recommended way from Sphinx documentation: https://www.sphinx-doc.org/en/master/latex.html - instead of setting the main font, from where other fonts are derivated, it sets romanfont; - "fontenc" is not set. This allows the *.tex output file to contain an UTF-8 incompatible fontset: \usepackage[T1]{fontenc} Address such issues to help preventing incompatible usage of both T1 font and UTF-8 ones that comes from DejaVu font family. On some distros, this even generate a LaTeX font warning about corrupted NFSS tables like this (I got it when running it in interactive mode): Package: fontenc 2021/04/29 v2.0v Standard LaTeX package LaTeX Font Info: Trying to load font information for T1+lmr on input line 11 6. LaTeX Font Info: No file T1lmr.fd. on input line 116. LaTeX Font Warning: Font shape `T1/lmr/m/n' undefined (Font) using `T1/lmr/m/n' instead on input line 116. ! Corrupted NFSS tables. wrong@fontshape ...message {Corrupted NFSS tables} error@fontshape else let f... l.116 ...\familydefault\seriesdefault\shapedefault Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/8104ce56a5ea3509fbb56a8163b779d38a6aaa9c.1755763127.git.mchehab+huawei@kernel.org --- Documentation/conf.py | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/conf.py b/Documentation/conf.py index e00ec8f59f25..020ecfa05a07 100644 --- a/Documentation/conf.py +++ b/Documentation/conf.py @@ -461,6 +461,7 @@ latex_elements = { # Latex figure (float) alignment # 'figure_align': 'htbp', # Don't mangle with UTF-8 chars + "fontenc": "", "inputenc": "", "utf8extra": "", # Set document margins @@ -476,13 +477,14 @@ latex_elements = { "maxlistdepth": "10", # For CJK One-half spacing, need to be in front of hyperref "extrapackages": r"\usepackage{setspace}", - # Additional stuff for the LaTeX preamble. - "preamble": dedent(r""" - % Use some font with UTF-8 support with XeLaTeX + "fontpkg": dedent(r""" \usepackage{fontspec} + \setmainfont{DejaVu Serif} \setsansfont{DejaVu Sans} - \setromanfont{DejaVu Serif} \setmonofont{DejaVu Sans Mono} + \newfontfamily\headingfont{DejaVu Serif} + """), + "preamble": dedent(r""" % Load kerneldoc specific LaTeX settings \input{kerneldoc-preamble.sty} """) -- cgit v1.2.3 From d242e2569f10e03dea1d13d54b45d8bb5bbeb614 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 21 Aug 2025 10:16:43 +0200 Subject: docs: conf.py: extra cleanups and fixes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Makes it more adehent with modern Sphinx LaTeX build setup as defined at: https://www.sphinx-doc.org/en/master/latex.html There, it suggests: 1) to add: 'printindex' “printindex” call, the last thing in the file. Override if you want to generate the index differently, append some content after the index, or change the font. As LaTeX uses two-column mode for the index it is often advisable to set this key to r'\footnotesize\raggedright\printindex'. This indeed solved a corner case on a distro where the index was not properly generated. 2) to add at the main example: \PassOptionsToPackage{svgnames}{xcolor} 3) I got a corner case on one of the distros was using xindy to produce indexes. This ended causing the build logic to incorretly try to use T1 fontenc, which is not UTF-8 compatible. This patch adds: \PassOptionsToPackage{xindy}{language=english,codepage=utf8,noautomatic} to cover such case. It should be noticed that, as the config doesn't have \usepackage{xindy}, this will be used only if latexmk ends using xindy. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/08d16c2ad817910eb5606842f776d3f77d83282f.1755763127.git.mchehab+huawei@kernel.org --- Documentation/conf.py | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/conf.py b/Documentation/conf.py index 020ecfa05a07..8fcecdb927b1 100644 --- a/Documentation/conf.py +++ b/Documentation/conf.py @@ -456,8 +456,15 @@ htmlhelp_basename = "TheLinuxKerneldoc" latex_elements = { # The paper size ('letterpaper' or 'a4paper'). "papersize": "a4paper", + "passoptionstopackages": dedent(r""" + \PassOptionsToPackage{svgnames}{xcolor} + % Avoid encoding troubles when creating indexes + \PassOptionsToPackage{xindy}{language=english,codepage=utf8,noautomatic} + """), # The font size ('10pt', '11pt' or '12pt'). "pointsize": "11pt", + # Needed to generate a .ind file + "printindex": r"\footnotesize\raggedright\printindex", # Latex figure (float) alignment # 'figure_align': 'htbp', # Don't mangle with UTF-8 chars -- cgit v1.2.3 From fb43a9e696e1ecba8781b5ea601db07802f50a9f Mon Sep 17 00:00:00 2001 From: Frank Li Date: Mon, 18 Aug 2025 14:38:13 -0400 Subject: dt-bindings: input: convert lpc32xx-key.txt to yaml format Convert lpc32xx-key.txt to yaml format. Additional changes: - set maximum of key-row(column) to 4. - add ref to matrix-keymap.yaml. Reviewed-by: Vladimir Zapolskiy Signed-off-by: Frank Li Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250818183814.3603308-1-Frank.Li@nxp.com Signed-off-by: Dmitry Torokhov --- .../devicetree/bindings/input/lpc32xx-key.txt | 34 ------------ .../devicetree/bindings/input/nxp,lpc3220-key.yaml | 61 ++++++++++++++++++++++ 2 files changed, 61 insertions(+), 34 deletions(-) delete mode 100644 Documentation/devicetree/bindings/input/lpc32xx-key.txt create mode 100644 Documentation/devicetree/bindings/input/nxp,lpc3220-key.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/lpc32xx-key.txt b/Documentation/devicetree/bindings/input/lpc32xx-key.txt deleted file mode 100644 index 2b075a080d30..000000000000 --- a/Documentation/devicetree/bindings/input/lpc32xx-key.txt +++ /dev/null @@ -1,34 +0,0 @@ -NXP LPC32xx Key Scan Interface - -This binding is based on the matrix-keymap binding with the following -changes: - -Required Properties: -- compatible: Should be "nxp,lpc3220-key" -- reg: Physical base address of the controller and length of memory mapped - region. -- interrupts: The interrupt number to the cpu. -- clocks: phandle to clock controller plus clock-specifier pair -- nxp,debounce-delay-ms: Debounce delay in ms -- nxp,scan-delay-ms: Repeated scan period in ms -- linux,keymap: the key-code to be reported when the key is pressed - and released, see also - Documentation/devicetree/bindings/input/matrix-keymap.txt - -Note: keypad,num-rows and keypad,num-columns are required, and must be equal -since LPC32xx only supports square matrices - -Example: - - key@40050000 { - compatible = "nxp,lpc3220-key"; - reg = <0x40050000 0x1000>; - clocks = <&clk LPC32XX_CLK_KEY>; - interrupt-parent = <&sic1>; - interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; - keypad,num-rows = <1>; - keypad,num-columns = <1>; - nxp,debounce-delay-ms = <3>; - nxp,scan-delay-ms = <34>; - linux,keymap = <0x00000002>; - }; diff --git a/Documentation/devicetree/bindings/input/nxp,lpc3220-key.yaml b/Documentation/devicetree/bindings/input/nxp,lpc3220-key.yaml new file mode 100644 index 000000000000..9e0d977bdf5c --- /dev/null +++ b/Documentation/devicetree/bindings/input/nxp,lpc3220-key.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/nxp,lpc3220-key.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP LPC32xx Key Scan Interface + +maintainers: + - Frank Li + +properties: + compatible: + const: nxp,lpc3220-key + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + nxp,debounce-delay-ms: + description: Debounce delay in ms + + nxp,scan-delay-ms: + description: Repeated scan period in ms + +required: + - compatible + - reg + - interrupts + - clocks + - nxp,debounce-delay-ms + - nxp,scan-delay-ms + - linux,keymap + +allOf: + - $ref: matrix-keymap.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + + key@40050000 { + compatible = "nxp,lpc3220-key"; + reg = <0x40050000 0x1000>; + clocks = <&clk LPC32XX_CLK_KEY>; + interrupt-parent = <&sic1>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; + keypad,num-rows = <1>; + keypad,num-columns = <1>; + nxp,debounce-delay-ms = <3>; + nxp,scan-delay-ms = <34>; + linux,keymap = <0x00000002>; + }; -- cgit v1.2.3 From 255ca339320d6295d678398b54973dddc792e2d2 Mon Sep 17 00:00:00 2001 From: Matthias Schiffer Date: Fri, 25 Jul 2025 08:24:50 +0200 Subject: dt-bindings: arm: fsl: add TQMLS1012AL TQMLS1012AL is a SOM using NXP LS1012A CPU. MBLS1012AL is a carrier reference design. [1] https://www.tq-group.com/en/products/tq-embedded/qoriq-layerscape/tqmls1012al Signed-off-by: Matthias Schiffer Signed-off-by: Alexander Stein Acked-by: Conor Dooley Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index e21758546d13..02431ab80aa6 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1539,6 +1539,12 @@ properties: - fsl,ls1012a-qds - const: fsl,ls1012a + - description: TQ Systems TQMLS12AL SoM on MBLS1012AL board + items: + - const: tq,ls1012a-tqmls1012al-mbls1012al + - const: tq,ls1012a-tqmls1012al + - const: fsl,ls1012a + - description: LS1021A based Boards items: - enum: -- cgit v1.2.3 From 6351806e5cd3290de6914327a7359e6f4a9e9a5f Mon Sep 17 00:00:00 2001 From: Pengfei Li Date: Wed, 6 Aug 2025 19:41:09 +0800 Subject: dt-bindings: arm: fsl: add i.MX91 11x11 evk board Add the board imx91-11x11-evk in the binding document. Signed-off-by: Pengfei Li Signed-off-by: Joy Zou Acked-by: Conor Dooley Reviewed-by: Frank Li Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 02431ab80aa6..ebafa6ecbcb6 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1387,6 +1387,12 @@ properties: - fsl,imx8ulp-evk # i.MX8ULP EVK Board - const: fsl,imx8ulp + - description: i.MX91 based Boards + items: + - enum: + - fsl,imx91-11x11-evk # i.MX91 11x11 EVK Board + - const: fsl,imx91 + - description: i.MX93 based Boards items: - enum: -- cgit v1.2.3 From 5a22df198bd3f515dfd9ff064a81f41567427dfc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= Date: Thu, 21 Aug 2025 13:20:35 +0200 Subject: dt-bindings: mmc: sdhci-pxa: add state_uhs pinctrl MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On the pxav3 controller, increasing the drive strength of the data pins might be required to maintain stability on fast bus clocks (above 100 MHz). Add a state_uhs pinctrl to allow this. Reviewed-by: Rob Herring (Arm) Signed-off-by: Duje Mihanović Link: https://lore.kernel.org/r/20250821-pxav3-uhs-v4-1-bb588314f3c3@dujemihanovic.xyz Signed-off-by: Ulf Hansson --- .../devicetree/bindings/mmc/sdhci-pxa.yaml | 29 +++++++++++++++++++--- 1 file changed, 26 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml index e7c06032048a..fba1cc50fdf0 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml @@ -44,12 +44,27 @@ allOf: items: - const: default - const: state_cmd_gpio - pinctrl-0: - description: - Should contain default pinctrl. + pinctrl-1: description: Should switch CMD pin to GPIO mode as a high output. + - if: + properties: + compatible: + contains: + const: mrvl,pxav3-mmc + then: + properties: + pinctrl-names: + description: + Optional for increasing stability of the controller at fast bus clocks. + items: + - const: default + - const: state_uhs + + pinctrl-1: + description: + Should switch the drive strength of the data pins to high. properties: compatible: @@ -82,6 +97,14 @@ properties: - const: io - const: core + pinctrl-names: true + + pinctrl-0: + description: + Should contain default pinctrl. + + pinctrl-1: true + mrvl,clk-delay-cycles: description: Specify a number of cycles to delay for tuning. $ref: /schemas/types.yaml#/definitions/uint32 -- cgit v1.2.3 From 8495e00fe654962bdd83dd6ca8f32918c50f3454 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 19 Aug 2025 07:45:59 +0700 Subject: Documentation: RCU: Wrap kvm-remote.sh rerun snippet in literal code block Unlike other kvm*.sh snippets in RCU torture test documentation, kvm-remote.sh rerun snippet isn't formatted as literal code block, causing it to be definition list instead in htmldocs output. Wrap it like the rest. Fixes: 0c208a793022 ("doc: Update torture.rst") Signed-off-by: Bagas Sanjaya Signed-off-by: Paul E. McKenney Reviewed-by: Randy Dunlap --- Documentation/RCU/torture.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/RCU/torture.rst b/Documentation/RCU/torture.rst index 4b1f99c4181f..cc57d01ed700 100644 --- a/Documentation/RCU/torture.rst +++ b/Documentation/RCU/torture.rst @@ -364,7 +364,7 @@ systems must come first. The kvm.sh ``--dryrun scenarios`` argument is useful for working out how many scenarios may be run in one batch across a group of systems. -You can also re-run a previous remote run in a manner similar to kvm.sh: +You can also re-run a previous remote run in a manner similar to kvm.sh:: kvm-remote.sh "system0 system1 system2 system3 system4 system5" \ tools/testing/selftests/rcutorture/res/2022.11.03-11.26.28-remote \ -- cgit v1.2.3 From 326b16baed677edcc706ee44791716a610a8edf0 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 19 Aug 2025 08:26:19 +0700 Subject: Documentation: RCU: Reduce toctree depth toctree index for RCU currently has maximum depth of 3. Since no docs currently use more than 3 section heading levels, this effectively spills the entire docs hierarchy. Tidy up by reducing toctree depth to 2 (only showing docs title and second-level sections). Signed-off-by: Bagas Sanjaya Signed-off-by: Paul E. McKenney --- Documentation/RCU/index.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/RCU/index.rst b/Documentation/RCU/index.rst index 84a79903f6a8..e1be5b3c2c67 100644 --- a/Documentation/RCU/index.rst +++ b/Documentation/RCU/index.rst @@ -7,7 +7,7 @@ RCU concepts ============ .. toctree:: - :maxdepth: 3 + :maxdepth: 2 checklist lockdep -- cgit v1.2.3 From 9832258da7f1bc2051c536a2068e880d49570de2 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 19 Aug 2025 08:26:20 +0700 Subject: Documentation: RCU: Retitle toctree index toctree index title ("RCU concepts") is rather a misnomer: RCU concepts is already described in rcu.rst, whereas the toctree suggests that the docs themes about handbook on RCU subsystem instead. Edit the title to reflect the fact. Signed-off-by: Bagas Sanjaya Signed-off-by: Paul E. McKenney --- Documentation/RCU/index.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/RCU/index.rst b/Documentation/RCU/index.rst index e1be5b3c2c67..ef26c78507d3 100644 --- a/Documentation/RCU/index.rst +++ b/Documentation/RCU/index.rst @@ -1,9 +1,9 @@ .. SPDX-License-Identifier: GPL-2.0 -.. _rcu_concepts: +.. _rcu_handbook: ============ -RCU concepts +RCU Handbook ============ .. toctree:: -- cgit v1.2.3 From 14b0a12a70414f7a3119e9d661a8bcab42492b8e Mon Sep 17 00:00:00 2001 From: "Paul E. McKenney" Date: Tue, 19 Aug 2025 08:38:06 -0700 Subject: doc: Fix typo in RCU's torture.rst documentation s/you// Reported-by: Randy Dunlap Signed-off-by: Paul E. McKenney --- Documentation/RCU/torture.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/RCU/torture.rst b/Documentation/RCU/torture.rst index cc57d01ed700..1ad5cc793811 100644 --- a/Documentation/RCU/torture.rst +++ b/Documentation/RCU/torture.rst @@ -344,7 +344,7 @@ painstaking and error-prone. And this is why the kvm-remote.sh script exists. -If you the following command works:: +If the following command works:: ssh system0 date -- cgit v1.2.3 From de117fe3f50f962d927b17b8de6632ee197b70ae Mon Sep 17 00:00:00 2001 From: Nikil Paul S Date: Tue, 19 Aug 2025 18:05:46 +0000 Subject: docs: rcu: Replace multiple dead OLS links in RTFP.txt This patch updates several dead OLS links in RTFP.txt, replacing them with working copies hosted on kernel.org. Originally posted as part of a 2-patch series, this is now being sent as a standalone v4 patch to avoid confusion. Signed-off-by: Nikil Paul S Signed-off-by: Paul E. McKenney --- Documentation/RCU/RTFP.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/RCU/RTFP.txt b/Documentation/RCU/RTFP.txt index db8f16b392aa..8d4e8de4c460 100644 --- a/Documentation/RCU/RTFP.txt +++ b/Documentation/RCU/RTFP.txt @@ -641,7 +641,7 @@ Orran Krieger and Rusty Russell and Dipankar Sarma and Maneesh Soni" ,Month="July" ,Year="2001" ,note="Available: -\url{http://www.linuxsymposium.org/2001/abstracts/readcopy.php} +\url{https://kernel.org/doc/ols/2001/read-copy.pdf} \url{http://www.rdrop.com/users/paulmck/RCU/rclock_OLS.2001.05.01c.pdf} [Viewed June 23, 2004]" ,annotation={ @@ -1480,7 +1480,7 @@ Suparna Bhattacharya" ,Year="2006" ,pages="v2 123-138" ,note="Available: -\url{http://www.linuxsymposium.org/2006/view_abstract.php?content_key=184} +\url{https://kernel.org/doc/ols/2006/ols2006v2-pages-131-146.pdf} \url{http://www.rdrop.com/users/paulmck/RCU/OLSrtRCU.2006.08.11a.pdf} [Viewed January 1, 2007]" ,annotation={ @@ -1511,7 +1511,7 @@ Canis Rufus and Zoicon5 and Anome and Hal Eisen" ,Year="2006" ,pages="v2 249-254" ,note="Available: -\url{http://www.linuxsymposium.org/2006/view_abstract.php?content_key=184} +\url{https://kernel.org/doc/ols/2006/ols2006v2-pages-249-262.pdf} [Viewed January 11, 2009]" ,annotation={ Uses RCU-protected radix tree for a lockless page cache. -- cgit v1.2.3 From afa3701c0e45ecb9e4d160048ca4e353c7489948 Mon Sep 17 00:00:00 2001 From: Tiffany Yang Date: Thu, 21 Aug 2025 18:37:52 -0700 Subject: cgroup: cgroup.stat.local time accounting MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There isn't yet a clear way to identify a set of "lost" time that everyone (or at least a wider group of users) cares about. However, users can perform some delay accounting by iterating over components of interest. This patch allows cgroup v2 freezing time to be one of those components. Track the cumulative time that each v2 cgroup spends freezing and expose it to userland via a new local stat file in cgroupfs. Thank you to Michal, who provided the ASCII art in the updated documentation. To access this value: $ mkdir /sys/fs/cgroup/test $ cat /sys/fs/cgroup/test/cgroup.stat.local freeze_time_total 0 Ensure consistent freeze time reads with freeze_seq, a per-cgroup sequence counter. Writes are serialized using the css_set_lock. Signed-off-by: Tiffany Yang Cc: Tejun Heo Cc: Michal Koutný Signed-off-by: Tejun Heo --- Documentation/admin-guide/cgroup-v2.rst | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/cgroup-v2.rst b/Documentation/admin-guide/cgroup-v2.rst index d9d3cc7df348..9a3a909ee40b 100644 --- a/Documentation/admin-guide/cgroup-v2.rst +++ b/Documentation/admin-guide/cgroup-v2.rst @@ -1001,6 +1001,24 @@ All cgroup core files are prefixed with "cgroup." Total number of dying cgroup subsystems (e.g. memory cgroup) at and beneath the current cgroup. + cgroup.stat.local + A read-only flat-keyed file which exists in non-root cgroups. + The following entry is defined: + + frozen_usec + Cumulative time that this cgroup has spent between freezing and + thawing, regardless of whether by self or ancestor groups. + NB: (not) reaching "frozen" state is not accounted here. + + Using the following ASCII representation of a cgroup's freezer + state, :: + + 1 _____ + frozen 0 __/ \__ + ab cd + + the duration being measured is the span between a and c. + cgroup.freeze A read-write single value file which exists on non-root cgroups. Allowed values are "0" and "1". The default is "0". -- cgit v1.2.3 From 480a76c64f4f6a7f8d4aa2ac86cd2178687716b9 Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Fri, 22 Aug 2025 14:39:49 +0800 Subject: dt-bindings: display: simple-bridge: Add ra620 compatible RA620 is a DP to HDMI bridge converter from RADXA, which first found be used on ROCK 5 ITX. This chip can be used without involving software. Signed-off-by: Andy Yan Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250822063959.692098-6-andyshrk@163.com Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml b/Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml index 43cf4df9811a..421f99ca42d9 100644 --- a/Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml +++ b/Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml @@ -28,6 +28,7 @@ properties: - enum: - adi,adv7123 - dumb-vga-dac + - radxa,ra620 - ti,opa362 - ti,ths8134 - ti,ths8135 -- cgit v1.2.3 From 8e484ff181b177ea2e86e537fd7a5c8f9d7532ad Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Mon, 7 Jul 2025 18:48:57 +0200 Subject: dt-bindings: vendor-prefixes: Add prefix for Shenzhen Bestar Electronic Add the prefix for Bestar, named in full both on Panelook.com and their display datasheets as Shenzhen Bestar Electronic Technology Co., Ltd. which produces at least DSI displays and maybe more. Acked-by: "Rob Herring (Arm)" Signed-off-by: Heiko Stuebner Link: https://lore.kernel.org/r/20250707164906.1445288-5-heiko@sntech.de --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 77160cd47f54..abc43c43813a 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -221,6 +221,8 @@ patternProperties: description: BeagleBoard.org Foundation "^belling,.*": description: Shanghai Belling Co., Ltd. + "^bestar,.*": + description: Shenzhen Bestar Electronic Technology Co., Ltd. "^bhf,.*": description: Beckhoff Automation GmbH & Co. KG "^bigtreetech,.*": -- cgit v1.2.3 From 157ba8c6742931a617a34555c27dd10b36385cf3 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Mon, 7 Jul 2025 18:48:58 +0200 Subject: dt-bindings: display: ili9881c: Add Bestar BSD1218-A101KL68 LCD panel Document the compatible value for Bestar BSD1218-A101KL68 LCD panels that are based around the ili9881c controller. Acked-by: "Rob Herring (Arm)" Signed-off-by: Heiko Stuebner Link: https://lore.kernel.org/r/20250707164906.1445288-6-heiko@sntech.de --- Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml b/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml index a51af61d4846..434cc6af9c95 100644 --- a/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml +++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml @@ -18,6 +18,7 @@ properties: - enum: - ampire,am8001280g - bananapi,lhr050h41 + - bestar,bsd1218-a101kl68 - feixin,k101-im2byl02 - raspberrypi,dsi-7inch - startek,kd050hdfia020 -- cgit v1.2.3 From f05530bdaf42aa0e6bb4cde76ba6a081cf473d44 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Mon, 7 Jul 2025 18:49:01 +0200 Subject: dt-bindings: display: rockchip: Add rk3576 to RK3588 DW DSI2 controller schema The rk3576 controller is based on the same newer Synopsis IP as the one found in the rk3588. Its external setting bits in the GRF are different though, so it needs its own distinct compatible. Acked-by: "Rob Herring (Arm)" Signed-off-by: Heiko Stuebner Link: https://lore.kernel.org/r/20250707164906.1445288-9-heiko@sntech.de --- .../devicetree/bindings/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml index 53384e47b507..75cd1c13fa52 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml @@ -12,6 +12,7 @@ maintainers: properties: compatible: enum: + - rockchip,rk3576-mipi-dsi2 - rockchip,rk3588-mipi-dsi2 reg: -- cgit v1.2.3 From 0e3f3d7c7ae3dec5ff52325915e3efcbce652a82 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Mon, 7 Jul 2025 18:49:00 +0200 Subject: dt-bindings: soc: rockchip: add rk3576 mipi dcphy syscon RK3576 CSI and DSI support requires the GRF for its DC-PHY. The "general register files" provide additional setting-bits outside the regular ip-block reg-space. Acked-by: "Rob Herring (Arm)" Signed-off-by: Heiko Stuebner Link: https://lore.kernel.org/r/20250707164906.1445288-8-heiko@sntech.de --- Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml index 1ab0b092e2a5..6a94c271a6b1 100644 --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml @@ -31,6 +31,7 @@ properties: - rockchip,rk3568-usb2phy-grf - rockchip,rk3576-bigcore-grf - rockchip,rk3576-cci-grf + - rockchip,rk3576-dcphy-grf - rockchip,rk3576-gpu-grf - rockchip,rk3576-hdptxphy-grf - rockchip,rk3576-litcore-grf -- cgit v1.2.3 From 32299eb03414cbb475ce3068b64db6d306df5b88 Mon Sep 17 00:00:00 2001 From: Nick Chan Date: Thu, 21 Aug 2025 23:56:38 +0800 Subject: dt-bindings: mailbox: apple,mailbox: Add ASC mailboxes on Apple A11 and T2 Add bindings for ASC mailboxes as found on Apple A11 and T2 SoCs. These mailboxes are used for coprocessors including Secure Enclave Processor (SEP), the NVMe coprocessor and the system management controller. Acked-by: Rob Herring (Arm) Signed-off-by: Nick Chan Link: https://lore.kernel.org/r/20250821-t8015-nvme-v3-1-14a4178adf68@gmail.com Signed-off-by: Sven Peter --- Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml b/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml index 474c1a0f99f3..bdf58f03b848 100644 --- a/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml @@ -33,6 +33,13 @@ properties: - apple,t6000-asc-mailbox - const: apple,asc-mailbox-v4 + - description: + An older ASC mailbox interface found on T2 and A11 that is also + used for the NVMe coprocessor and the system management + controller. + items: + - const: apple,t8015-asc-mailbox + - description: M3 mailboxes are an older variant with a slightly different MMIO interface still found on the M1. It is used for the Thunderbolt -- cgit v1.2.3 From 36ee9770a8b24c71805760cb160c25ef91192823 Mon Sep 17 00:00:00 2001 From: William Breathitt Gray Date: Sun, 15 Jun 2025 23:27:47 +0900 Subject: counter: Alphabetize component_id sysfs attributes Documentation list Prefer alphabetical order for the component_id sysfs attributes list in the Counter ABI Documentation file. This should make it easier for users to locate a component_id attribute in the list and its respective Documentation entry. Suggested-by: David Lechner Link: https://lore.kernel.org/r/20250615-alphabetize-component_id-doc-v1-1-4c5943b41198@kernel.org Signed-off-by: William Breathitt Gray --- Documentation/ABI/testing/sysfs-bus-counter | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-bus-counter b/Documentation/ABI/testing/sysfs-bus-counter index 3e8259e56d38..3e7eddd8aff3 100644 --- a/Documentation/ABI/testing/sysfs-bus-counter +++ b/Documentation/ABI/testing/sysfs-bus-counter @@ -309,26 +309,26 @@ Description: What: /sys/bus/counter/devices/counterX/cascade_counts_enable_component_id What: /sys/bus/counter/devices/counterX/external_input_phase_clock_select_component_id -What: /sys/bus/counter/devices/counterX/countY/compare_component_id What: /sys/bus/counter/devices/counterX/countY/capture_component_id What: /sys/bus/counter/devices/counterX/countY/ceiling_component_id -What: /sys/bus/counter/devices/counterX/countY/floor_component_id +What: /sys/bus/counter/devices/counterX/countY/compare_component_id What: /sys/bus/counter/devices/counterX/countY/count_mode_component_id What: /sys/bus/counter/devices/counterX/countY/direction_component_id What: /sys/bus/counter/devices/counterX/countY/enable_component_id What: /sys/bus/counter/devices/counterX/countY/error_noise_component_id +What: /sys/bus/counter/devices/counterX/countY/floor_component_id +What: /sys/bus/counter/devices/counterX/countY/num_overflows_component_id What: /sys/bus/counter/devices/counterX/countY/prescaler_component_id What: /sys/bus/counter/devices/counterX/countY/preset_component_id What: /sys/bus/counter/devices/counterX/countY/preset_enable_component_id What: /sys/bus/counter/devices/counterX/countY/signalZ_action_component_id -What: /sys/bus/counter/devices/counterX/countY/num_overflows_component_id What: /sys/bus/counter/devices/counterX/signalY/cable_fault_component_id What: /sys/bus/counter/devices/counterX/signalY/cable_fault_enable_component_id What: /sys/bus/counter/devices/counterX/signalY/filter_clock_prescaler_component_id +What: /sys/bus/counter/devices/counterX/signalY/frequency_component_id What: /sys/bus/counter/devices/counterX/signalY/index_polarity_component_id What: /sys/bus/counter/devices/counterX/signalY/polarity_component_id What: /sys/bus/counter/devices/counterX/signalY/synchronous_mode_component_id -What: /sys/bus/counter/devices/counterX/signalY/frequency_component_id KernelVersion: 5.16 Contact: linux-iio@vger.kernel.org Description: -- cgit v1.2.3 From 7d11b8c260ea68ce8f420ad467b04b21ea34b011 Mon Sep 17 00:00:00 2001 From: Chukun Pan Date: Mon, 18 Aug 2025 18:00:06 +0800 Subject: dt-bindings: vendor-prefixes: Add HINLINK Add vendor prefix for HINLINK, which is an SBC manufacturer. Link: https://www.hinlink.cn/ Signed-off-by: Chukun Pan Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250818100009.170202-2-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 77160cd47f54..1305da271a68 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -646,6 +646,8 @@ patternProperties: description: HiDeep Inc. "^himax,.*": description: Himax Technologies, Inc. + "^hinlink,.*": + description: Shenzhen HINLINK Technology Co., Ltd. "^hirschmann,.*": description: Hirschmann Automation and Control GmbH "^hisi,.*": -- cgit v1.2.3 From 4bef07b79ab1ef7d963eaa2c37948030e418d538 Mon Sep 17 00:00:00 2001 From: Chukun Pan Date: Mon, 18 Aug 2025 18:00:07 +0800 Subject: dt-bindings: arm: rockchip: Add HINLINK H66K / H68K The HINLINK H66K/H68K are 2.5GbE SBC based on the RK3568 SoC. Add devicetree binding documentation for them. Signed-off-by: Chukun Pan Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250818100009.170202-3-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 28db6bd6aa5b..870c318fc8d4 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -683,6 +683,13 @@ properties: - const: hardkernel,odroid-m2 - const: rockchip,rk3588s + - description: HINLINK H66K / H68K + items: + - enum: + - hinlink,h66k + - hinlink,h68k + - const: rockchip,rk3568 + - description: Hugsun X99 TV Box items: - const: hugsun,x99 -- cgit v1.2.3 From 3f33d1530c2c9576b57ecd220bfa7e527184a80b Mon Sep 17 00:00:00 2001 From: Salih Erim Date: Wed, 20 Aug 2025 11:05:19 +0100 Subject: MAINTAINERS: Update xilinx-ams driver maintainers Anand left AMD/Xilinx some time ago. Salih and Connall are new maintainers of xilinx-ams driver. Signed-off-by: Salih Erim Acked-by: Rob Herring (Arm) Acked-by: Michal Simek Acked-by: O'Griofa, Conall Link: https://patch.msgid.link/20250820100519.2272509-1-salih.erim@amd.com Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml b/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml index a403392fb263..3ae1a0bab38f 100644 --- a/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml +++ b/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml @@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Xilinx Zynq Ultrascale AMS controller maintainers: - - Anand Ashok Dumbre + - Salih Erim + - Conall O'Griofa description: | The AMS (Analog Monitoring System) includes an ADC as well as on-chip sensors -- cgit v1.2.3 From d6d389646a35daae9fc1f21fe9221dcb7b3cc41f Mon Sep 17 00:00:00 2001 From: Ben Collins Date: Fri, 22 Aug 2025 09:23:50 -0400 Subject: dt-bindings: iio: mcp9600: Set default 3 for thermocouple-type As is already documented in this file, Type-K is the default, so make that explicit in the dt-bindings. Signed-off-by: Ben Collins Reviewed-by: Krzysztof Kozlowski Reviewed-by: David Lechner Link: https://patch.msgid.link/20250822-upstream-changes-v8-1-40bb1739e3e2@watter.com Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/temperature/microchip,mcp9600.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/temperature/microchip,mcp9600.yaml b/Documentation/devicetree/bindings/iio/temperature/microchip,mcp9600.yaml index d2cafa38a544..57b387a1accc 100644 --- a/Documentation/devicetree/bindings/iio/temperature/microchip,mcp9600.yaml +++ b/Documentation/devicetree/bindings/iio/temperature/microchip,mcp9600.yaml @@ -37,6 +37,7 @@ properties: thermocouple-type: $ref: /schemas/types.yaml#/definitions/uint32 + default: 3 description: Type of thermocouple (THERMOCOUPLE_TYPE_K if omitted). Use defines in dt-bindings/iio/temperature/thermocouple.h. -- cgit v1.2.3 From 894751730a0d1674e43167b187e6605371667c8b Mon Sep 17 00:00:00 2001 From: Mohammad Rafi Shaik Date: Thu, 21 Aug 2025 10:19:07 +0530 Subject: dt-bindings: pinctrl: qcom,sc7280-lpass-lpi-pinctrl: Document the clock property Document the clock property in sc7280 LPASS LPI pinctrl node. Clock settings required for Audioreach solution. The existing SC7280 platform only supports non-ADSP audio solutions. To enable audio functionality on ADSP with the AudioReach solution. additional core and audio hardware clocks must be configured. Without these clocks, the ADSP will crash. Signed-off-by: Mohammad Rafi Shaik Co-developed-by: Prasad Kumpatla Signed-off-by: Prasad Kumpatla Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/20250821044914.710044-3-quic_pkumpatl@quicinc.com Signed-off-by: Linus Walleij --- .../bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml index 08801cc4e476..bc7b8dda8837 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml @@ -20,6 +20,16 @@ properties: reg: maxItems: 2 + clocks: + items: + - description: LPASS Core voting clock + - description: LPASS Audio voting clock + + clock-names: + items: + - const: core + - const: audio + patternProperties: "-state$": oneOf: @@ -70,10 +80,16 @@ unevaluatedProperties: false examples: - | + #include lpass_tlmm: pinctrl@33c0000 { compatible = "qcom,sc7280-lpass-lpi-pinctrl"; reg = <0x33c0000 0x20000>, <0x3550000 0x10000>; + + clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "audio"; + gpio-controller; #gpio-cells = <2>; gpio-ranges = <&lpass_tlmm 0 0 15>; -- cgit v1.2.3 From f6a52403fd2c1b581d4f78d79def57b803f29635 Mon Sep 17 00:00:00 2001 From: Ben Collins Date: Fri, 22 Aug 2025 09:23:51 -0400 Subject: dt-bindings: iio: mcp9600: Add microchip,mcp9601 and add constraints Add microchip,mcp9601 compatible in addition to the original microchip,mcp9600 to designate support between these two chips. The current dt-binding has open-circuit and short-circuit as interrupt names, but these are only supported in mcp9601. The OC and SC detection requires that mcp9601 VSENSE be wired up, which not only enables the OC SC interrupts, but also the OC and SC status register bits. Add a microchip,vsense boolean to show the chip is wired for this support. Add constraints so this feature only applies if the mcp9601 compatible is selected. Signed-off-by: Ben Collins Reviewed-by: Krzysztof Kozlowski Reviewed-by: David Lechner Link: https://patch.msgid.link/20250822-upstream-changes-v8-2-40bb1739e3e2@watter.com Signed-off-by: Jonathan Cameron --- .../iio/temperature/microchip,mcp9600.yaml | 55 ++++++++++++++++++++-- 1 file changed, 52 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/temperature/microchip,mcp9600.yaml b/Documentation/devicetree/bindings/iio/temperature/microchip,mcp9600.yaml index 57b387a1accc..effe3bee495d 100644 --- a/Documentation/devicetree/bindings/iio/temperature/microchip,mcp9600.yaml +++ b/Documentation/devicetree/bindings/iio/temperature/microchip,mcp9600.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/iio/temperature/microchip,mcp9600.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Microchip MCP9600 thermocouple EMF converter +title: Microchip MCP9600 and similar thermocouple EMF converters maintainers: - Andrew Hepp @@ -14,7 +14,11 @@ description: properties: compatible: - const: microchip,mcp9600 + oneOf: + - const: microchip,mcp9600 + - items: + - const: microchip,mcp9601 + - const: microchip,mcp9600 reg: maxItems: 1 @@ -43,8 +47,37 @@ properties: Use defines in dt-bindings/iio/temperature/thermocouple.h. Supported types are B, E, J, K, N, R, S, T. + microchip,vsense: + type: boolean + description: + This flag indicates that the chip has been wired with VSENSE to + enable open and short circuit detect. + vdd-supply: true +allOf: + - if: + properties: + compatible: + not: + contains: + const: microchip,mcp9601 + then: + properties: + interrupts: + minItems: 1 + maxItems: 4 + interrupt-names: + minItems: 1 + maxItems: 4 + items: + enum: + - alert1 + - alert2 + - alert3 + - alert4 + microchip,vsense: false + required: - compatible - reg @@ -64,8 +97,24 @@ examples: reg = <0x60>; interrupt-parent = <&gpio>; interrupts = <25 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "open-circuit"; + interrupt-names = "alert1"; thermocouple-type = ; vdd-supply = <&vdd>; }; }; + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + temperature-sensor@62 { + compatible = "microchip,mcp9601", "microchip,mcp9600"; + reg = <0x62>; + interrupt-parent = <&gpio>; + interrupts = <22 IRQ_TYPE_EDGE_RISING>, <23 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "open-circuit", "short-circuit"; + vdd-supply = <&vdd>; + microchip,vsense; + }; + }; -- cgit v1.2.3 From a4ee7e220c1a83e18ac32e5a3a70461e1accd652 Mon Sep 17 00:00:00 2001 From: Xing Guo Date: Tue, 19 Aug 2025 14:56:34 +0800 Subject: docs: iio: Fix unexpected indentation for adxl345. Resolved the following building error: Documentation/iio/adxl345.rst:161: ERROR: Unexpected indentation. [docutils] Fixes: fdcb9cb9178a ("docs: iio: add documentation for adxl345 driver") Reported-by: Stephen Rothwell Closes: https://lore.kernel.org/linux-next/20250818124124.5b978e64@canb.auug.org.au Signed-off-by: Xing Guo Link: https://patch.msgid.link/20250819065634.1154322-1-higuoxing@gmail.com Signed-off-by: Jonathan Cameron --- Documentation/iio/adxl345.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/iio/adxl345.rst b/Documentation/iio/adxl345.rst index 4bd038cb4a37..afdb35f8b72e 100644 --- a/Documentation/iio/adxl345.rst +++ b/Documentation/iio/adxl345.rst @@ -157,6 +157,7 @@ sensor terms, free-fall is defined using an inactivity period ranging from 0.000 to 1.000 seconds. The driver behaves as follows: + * If the configured inactivity period is 1 second or more, the driver uses the sensor's inactivity register. This allows the event to be linked with activity detection, use auto-sleep, and be either AC- or DC-coupled. -- cgit v1.2.3 From 21feb435be9b19a0be8b2c44a9efb7a5296c9a66 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Mon, 18 Aug 2025 16:00:13 -0400 Subject: dt-bindings: iio: adc: max1238: Add #io-channel-cells property Add #io-channel-cells property with a constant value of 1 because it is multi-channel ADC. Fix below CHECK_DTBS warnings: arch/arm/boot/dts/nxp/ls/ls1021a-iot.dtb: adc@35 (maxim,max1239): '#io-channel-cells' does not match any of the regexes: '^pinctrl-[0-9]+$' from schema $id: http://devicetree.org/schemas/iio/adc/maxim,max1238.yaml# Signed-off-by: Frank Li Acked-by: Conor Dooley Link: https://patch.msgid.link/20250818200014.3700738-1-Frank.Li@nxp.com Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml index 60d7b34e3286..ae3c89393f1a 100644 --- a/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml @@ -53,6 +53,9 @@ properties: reg: maxItems: 1 + "#io-channel-cells": + const: 1 + vcc-supply: true vref-supply: description: Optional external reference. If not supplied, internal -- cgit v1.2.3 From 5c2bf13c9ae951d63c97b367f4e7989d4913dcf3 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 21 Aug 2025 10:31:51 +0200 Subject: dt-bindings: iio: adi,ltc2664: Minor whitespace cleanup in example The DTS code coding style expects exactly one space around '=' character. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250821083150.46554-2-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/dac/adi,ltc2664.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ltc2664.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ltc2664.yaml index 1aece3392b77..4688eccfeb89 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ltc2664.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ltc2664.yaml @@ -174,7 +174,7 @@ examples: channel@1 { reg = <1>; - output-range-microvolt= <0 10000000>; + output-range-microvolt = <0 10000000>; }; }; }; -- cgit v1.2.3 From 1d57628ff95b32d5cfa8d8f50e07690c161e9cf0 Mon Sep 17 00:00:00 2001 From: Dongsheng Yang Date: Tue, 12 Aug 2025 08:24:52 +0000 Subject: dm-pcache: add persistent cache target in device-mapper MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch introduces dm-pcache, a new DM target that places a DAX- capable persistent-memory device in front of any slower block device and uses it as a high-throughput, low-latency cache. Design highlights ----------------- - DAX data path – data is copied directly between DRAM and the pmem mapping, bypassing the block layer’s overhead. - Segmented, crash-consistent layout - all layout metadata are dual-replicated CRC-protected. - atomic kset flushes; key replay on mount guarantees cache integrity even after power loss. - Striped multi-tree index - Multi‑tree indexing for high parallelism. - overlap-resolution logic ensures non-intersecting cached extents. - Background services - write-back worker flushes dirty keys in order, preserving backing-device crash consistency. This is important for checkpoint in cloud storage. - garbage collector reclaims clean segments when utilisation exceeds a tunable threshold. - Data integrity – optional CRC32 on cached payload; metadata always protected. Comparison with existing block-level caches --------------------------------------------------------------------------------------------------------------------------------- | Feature | pcache (this patch) | bcache | dm-writecache | |----------------------------------|---------------------------------|------------------------------|---------------------------| | pmem access method | DAX | bio (block I/O) | DAX | | Write latency (4 K rand-write) | ~5 µs | ~20 µs | ~5 µs | | Concurrency | multi subtree index | global index tree | single tree + wc_lock | | IOPS (4K randwrite, 32 numjobs) | 2.1 M | 352 K | 283 K | | Read-cache support | YES | YES | NO | | Deployment | no re-format of backend | backend devices must be | no re-format of backend | | | | reformatted | | | Write-back ordering | log-structured; | no ordering guarantee | no ordering guarantee | | | preserves app-IO-order | | | | Data integrity checks | metadata + data CRC(optional) | metadata CRC only | none | --------------------------------------------------------------------------------------------------------------------------------- Signed-off-by: Dongsheng Yang Signed-off-by: Mikulas Patocka --- .../admin-guide/device-mapper/dm-pcache.rst | 202 +++++++++++++++++++++ Documentation/admin-guide/device-mapper/index.rst | 1 + 2 files changed, 203 insertions(+) create mode 100644 Documentation/admin-guide/device-mapper/dm-pcache.rst (limited to 'Documentation') diff --git a/Documentation/admin-guide/device-mapper/dm-pcache.rst b/Documentation/admin-guide/device-mapper/dm-pcache.rst new file mode 100644 index 000000000000..09d327ef4b14 --- /dev/null +++ b/Documentation/admin-guide/device-mapper/dm-pcache.rst @@ -0,0 +1,202 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================================= +dm-pcache — Persistent Cache +================================= + +*Author: Dongsheng Yang * + +This document describes *dm-pcache*, a Device-Mapper target that lets a +byte-addressable *DAX* (persistent-memory, “pmem”) region act as a +high-performance, crash-persistent cache in front of a slower block +device. The code lives in `drivers/md/dm-pcache/`. + +Quick feature summary +===================== + +* *Write-back* caching (only mode currently supported). +* *16 MiB segments* allocated on the pmem device. +* *Data CRC32* verification (optional, per cache). +* Crash-safe: every metadata structure is duplicated (`PCACHE_META_INDEX_MAX + == 2`) and protected with CRC+sequence numbers. +* *Multi-tree indexing* (indexing trees sharded by logical address) for high PMem parallelism +* Pure *DAX path* I/O – no extra BIO round-trips +* *Log-structured write-back* that preserves backend crash-consistency + + +Constructor +=========== + +:: + + pcache [ ] + +========================= ==================================================== +``cache_dev`` Any DAX-capable block device (``/dev/pmem0``…). + All metadata *and* cached blocks are stored here. + +``backing_dev`` The slow block device to be cached. + +``cache_mode`` Optional, Only ``writeback`` is accepted at the + moment. + +``data_crc`` Optional, default to ``false`` + + * ``true`` – store CRC32 for every cached entry + and verify on reads + * ``false`` – skip CRC (faster) +========================= ==================================================== + +Example +------- + +.. code-block:: shell + + dmsetup create pcache_sdb --table \ + "0 $(blockdev --getsz /dev/sdb) pcache /dev/pmem0 /dev/sdb 4 cache_mode writeback data_crc true" + +The first time a pmem device is used, dm-pcache formats it automatically +(super-block, cache_info, etc.). + + +Status line +=========== + +``dmsetup status `` (``STATUSTYPE_INFO``) prints: + +:: + + \ + \ + : \ + : \ + : + +Field meanings +-------------- + +=============================== ============================================= +``sb_flags`` Super-block flags (e.g. endian marker). + +``seg_total`` Number of physical *pmem* segments. + +``cache_segs`` Number of segments used for cache. + +``segs_used`` Segments currently allocated (bitmap weight). + +``gc_percent`` Current GC high-water mark (0-90). + +``cache_flags`` Bit 0 – DATA_CRC enabled + Bit 1 – INIT_DONE (cache initialised) + Bits 2-5 – cache mode (0 == WB). + +``key_head`` Where new key-sets are being written. + +``dirty_tail`` First dirty key-set that still needs + write-back to the backing device. + +``key_tail`` First key-set that may be reclaimed by GC. +=============================== ============================================= + + +Messages +======== + +*Change GC trigger* + +:: + + dmsetup message 0 gc_percent <0-90> + + +Theory of operation +=================== + +Sub-devices +----------- + +==================== ========================================================= +backing_dev Any block device (SSD/HDD/loop/LVM, etc.). +cache_dev DAX device; must expose direct-access memory. +==================== ========================================================= + +Segments and key-sets +--------------------- + +* The pmem space is divided into *16 MiB segments*. +* Each write allocates space from a per-CPU *data_head* inside a segment. +* A *cache-key* records a logical range on the origin and where it lives + inside pmem (segment + offset + generation). +* 128 keys form a *key-set* (kset); ksets are written sequentially in pmem + and are themselves crash-safe (CRC). +* The pair *(key_tail, dirty_tail)* delimit clean/dirty and live/dead ksets. + +Write-back +---------- + +Dirty keys are queued into a tree; a background worker copies data +back to the backing_dev and advances *dirty_tail*. A FLUSH/FUA bio from the +upper layers forces an immediate metadata commit. + +Garbage collection +------------------ + +GC starts when ``segs_used >= seg_total * gc_percent / 100``. It walks +from *key_tail*, frees segments whose every key has been invalidated, and +advances *key_tail*. + +CRC verification +---------------- + +If ``data_crc is enabled`` dm-pcache computes a CRC32 over every cached data +range when it is inserted and stores it in the on-media key. Reads +validate the CRC before copying to the caller. + + +Failure handling +================ + +* *pmem media errors* – all metadata copies are read with + ``copy_mc_to_kernel``; an uncorrectable error logs and aborts initialisation. +* *Cache full* – if no free segment can be found, writes return ``-EBUSY``; + dm-pcache retries internally (request deferral). +* *System crash* – on attach, the driver replays ksets from *key_tail* to + rebuild the in-core trees; every segment’s generation guards against + use-after-free keys. + + +Limitations & TODO +================== + +* Only *write-back* mode; other modes planned. +* Only FIFO cache invalidate; other (LRU, ARC...) planned. +* Table reload is not supported currently. +* Discard planned. + + +Example workflow +================ + +.. code-block:: shell + + # 1. Create devices + dmsetup create pcache_sdb --table \ + "0 $(blockdev --getsz /dev/sdb) pcache /dev/pmem0 /dev/sdb 4 cache_mode writeback data_crc true" + + # 2. Put a filesystem on top + mkfs.ext4 /dev/mapper/pcache_sdb + mount /dev/mapper/pcache_sdb /mnt + + # 3. Tune GC threshold to 80 % + dmsetup message pcache_sdb 0 gc_percent 80 + + # 4. Observe status + watch -n1 'dmsetup status pcache_sdb' + + # 5. Shutdown + umount /mnt + dmsetup remove pcache_sdb + + +``dm-pcache`` is under active development; feedback, bug reports and patches +are very welcome! diff --git a/Documentation/admin-guide/device-mapper/index.rst b/Documentation/admin-guide/device-mapper/index.rst index cc5aec861576..f1c1f4b824ba 100644 --- a/Documentation/admin-guide/device-mapper/index.rst +++ b/Documentation/admin-guide/device-mapper/index.rst @@ -18,6 +18,7 @@ Device Mapper dm-integrity dm-io dm-log + dm-pcache dm-queue-length dm-raid dm-service-time -- cgit v1.2.3 From c95c1ea8f50963abd85d0321b161e3dd14cdabb0 Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Fri, 8 Nov 2024 14:36:03 +0200 Subject: media: Documentation: Add a hyphen to list-based Add a hyphen to list-based for uniform spelling in camera-sensor.rst. Signed-off-by: Sakari Ailus Reviewed-by: Jacopo Mondi Reviewed-by: Tomi Valkeinen Signed-off-by: Hans Verkuil --- Documentation/userspace-api/media/drivers/camera-sensor.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/userspace-api/media/drivers/camera-sensor.rst b/Documentation/userspace-api/media/drivers/camera-sensor.rst index 919a50e8b9d9..3f1e62bc90b8 100644 --- a/Documentation/userspace-api/media/drivers/camera-sensor.rst +++ b/Documentation/userspace-api/media/drivers/camera-sensor.rst @@ -26,10 +26,10 @@ of cropping and scaling operations from the device's pixel array's size. An example of such a driver is the CCS driver. -Register list based drivers +Register list-based drivers ~~~~~~~~~~~~~~~~~~~~~~~~~~~ -Register list based drivers generally, instead of able to configure the device +Register list-based drivers generally, instead of able to configure the device they control based on user requests, are limited to a number of preset configurations that combine a number of different parameters that on hardware level are independent. How a driver picks such configuration is based on the @@ -67,7 +67,7 @@ is pixels and the unit of the ``V4L2_CID_VBLANK`` is lines. The pixel rate in the sensor's **pixel array** is specified by ``V4L2_CID_PIXEL_RATE`` in the same sub-device. The unit of that control is pixels per second. -Register list based drivers need to implement read-only sub-device nodes for the +Register list-based drivers need to implement read-only sub-device nodes for the purpose. Devices that are not register list based need these to configure the device's internal processing pipeline. -- cgit v1.2.3 From a7067c7302f67f62e5bf41f948bde06d85c47625 Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Thu, 10 Oct 2024 12:07:17 +0300 Subject: media: Documentation: Reword split of sensor driver to two classes The sensor drivers do not configure the output size of the sensors but the entire internal pipeline. Reflect this in the documentation. Signed-off-by: Sakari Ailus Reviewed-by: Laurent Pinchart Reviewed-by: Jacopo Mondi Reviewed-by: Tomi Valkeinen Signed-off-by: Hans Verkuil --- Documentation/userspace-api/media/drivers/camera-sensor.rst | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/userspace-api/media/drivers/camera-sensor.rst b/Documentation/userspace-api/media/drivers/camera-sensor.rst index 3f1e62bc90b8..75fd9166383f 100644 --- a/Documentation/userspace-api/media/drivers/camera-sensor.rst +++ b/Documentation/userspace-api/media/drivers/camera-sensor.rst @@ -10,11 +10,13 @@ used to control the camera sensor drivers. You may also find :ref:`media_writing_camera_sensor_drivers` useful. -Frame size ----------- +Sensor internal pipeline configuration +-------------------------------------- -There are two distinct ways to configure the frame size produced by camera -sensors. +Camera sensors have an internal processing pipeline including cropping and +binning functionality. The sensor drivers belong to two distinct classes, freely +configurable and register list-based drivers, depending on how the driver +configures this functionality. Freely configurable camera sensor drivers ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -- cgit v1.2.3 From 4eacb83c193c1e544e9e9f8516c888584e3088f8 Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Fri, 6 Sep 2024 09:24:31 +0300 Subject: media: Documentation: Move streams documentation one level up While streams can be found within pads, they do deserve their own documentation section on the same level than pads. Move them one level up. Signed-off-by: Sakari Ailus Reviewed-by: Jacopo Mondi Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- Documentation/userspace-api/media/v4l/dev-subdev.rst | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/userspace-api/media/v4l/dev-subdev.rst b/Documentation/userspace-api/media/v4l/dev-subdev.rst index 161b43f1ce66..225a45fef994 100644 --- a/Documentation/userspace-api/media/v4l/dev-subdev.rst +++ b/Documentation/userspace-api/media/v4l/dev-subdev.rst @@ -509,7 +509,7 @@ source pads. .. _subdev-routing: Streams, multiplexed media pads and internal routing ----------------------------------------------------- +==================================================== Simple V4L2 sub-devices do not support multiple, unrelated video streams, and only a single stream can pass through a media link and a media pad. @@ -534,7 +534,7 @@ does not support streams, then only stream 0 of source end may be captured. There may be additional limitations specific to the sink device. Understanding streams -^^^^^^^^^^^^^^^^^^^^^ +--------------------- A stream is a stream of content (e.g. pixel data or metadata) flowing through the media pipeline from a source (e.g. a sensor) towards the final sink (e.g. a @@ -554,7 +554,7 @@ sub-device and a (pad, stream) pair. For sub-devices that do not support multiplexed streams the 'stream' field is always 0. Interaction between routes, streams, formats and selections -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +----------------------------------------------------------- The addition of streams to the V4L2 sub-device interface moves the sub-device formats and selections from pads to (pad, stream) pairs. Besides the @@ -573,7 +573,7 @@ are independent of similar configurations on other streams. This is subject to change in the future. Device types and routing setup -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +------------------------------ Different kinds of sub-devices have differing behaviour for route activation, depending on the hardware. In all cases, however, only routes that have the @@ -596,7 +596,7 @@ called on the sub-device. Such newly created routes have the device's default configuration for format and selection rectangles. Configuring streams -^^^^^^^^^^^^^^^^^^^ +------------------- The configuration of the streams is done individually for each sub-device and the validity of the streams between sub-devices is validated when the pipeline @@ -619,7 +619,7 @@ There are three steps in configuring the streams: :ref:`VIDIOC_SUBDEV_S_ROUTING ` ioctl. Multiplexed streams setup example -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +--------------------------------- A simple example of a multiplexed stream setup might be as follows: -- cgit v1.2.3 From 8cf320f3f4bf1adf90c785776a1f68fda765ee81 Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Wed, 22 Jan 2025 11:24:13 +0200 Subject: media: uapi: Documentation: Improve column width hints for examples Use less arbitrary widths for the columns in metadata layout examples. Signed-off-by: Sakari Ailus Reviewed-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- Documentation/userspace-api/media/v4l/metafmt-generic.rst | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/userspace-api/media/v4l/metafmt-generic.rst b/Documentation/userspace-api/media/v4l/metafmt-generic.rst index 78ab56b21682..39d529c910a8 100644 --- a/Documentation/userspace-api/media/v4l/metafmt-generic.rst +++ b/Documentation/userspace-api/media/v4l/metafmt-generic.rst @@ -71,7 +71,7 @@ This format is little endian. **Byte Order Of V4L2_META_FMT_GENERIC_CSI2_10.** Each cell is one byte. "M" denotes a byte of metadata and "x" a byte of padding. -.. tabularcolumns:: |p{2.4cm}|p{1.2cm}|p{1.2cm}|p{1.2cm}|p{1.2cm}|p{.8cm}| +.. tabularcolumns:: |p{2.4cm}|p{1.2cm}|p{1.2cm}|p{1.2cm}|p{1.2cm}|p{1.8cm}| .. flat-table:: Sample 4x2 Metadata Frame :header-rows: 0 @@ -115,7 +115,7 @@ This format is little endian. **Byte Order Of V4L2_META_FMT_GENERIC_CSI2_12.** Each cell is one byte. "M" denotes a byte of metadata and "x" a byte of padding. -.. tabularcolumns:: |p{2.4cm}|p{1.2cm}|p{1.2cm}|p{1.2cm}|p{1.2cm}|p{.8cm}|p{.8cm}| +.. tabularcolumns:: |p{2.4cm}|p{1.2cm}|p{1.2cm}|p{1.8cm}|p{1.2cm}|p{1.2cm}|p{1.8cm}| .. flat-table:: Sample 4x2 Metadata Frame :header-rows: 0 @@ -156,7 +156,7 @@ This format is little endian. **Byte Order Of V4L2_META_FMT_GENERIC_CSI2_14.** Each cell is one byte. "M" denotes a byte of metadata and "x" a byte of padding. -.. tabularcolumns:: |p{2.4cm}|p{1.2cm}|p{1.2cm}|p{1.2cm}|p{1.2cm}|p{.8cm}|p{.8cm}|p{.8cm}| +.. tabularcolumns:: |p{2.4cm}|p{1.2cm}|p{1.2cm}|p{1.2cm}|p{1.2cm}|p{1.8cm}|p{1.8cm}|p{1.8cm}| .. flat-table:: Sample 4x2 Metadata Frame :header-rows: 0 @@ -252,7 +252,7 @@ This format is little endian. **Byte Order Of V4L2_META_FMT_GENERIC_CSI2_20.** Each cell is one byte. "M" denotes a byte of metadata and "x" a byte of padding. -.. tabularcolumns:: |p{2.4cm}|p{1.2cm}|p{.8cm}|p{1.2cm}|p{.8cm}|p{.8cm}|p{1.2cm}|p{.8cm}|p{1.2cm}|p{.8cm}|p{.8cm}| +.. tabularcolumns:: |p{2.4cm}|p{1.2cm}|p{1.2cm}|p{1.2cm}|p{1.2cm}|p{1.8cm}|p{1.2cm}|p{1.2cm}|p{1.2cm}|p{1.2cm}|p{1.8cm} .. flat-table:: Sample 4x2 Metadata Frame :header-rows: 0 -- cgit v1.2.3 From 1e736f1489563470b58ede3fae5274a624280cf1 Mon Sep 17 00:00:00 2001 From: Alex Mastro Date: Mon, 4 Aug 2025 12:44:31 -0700 Subject: vfio/pci: print vfio-device syspath to fdinfo Print the PCI device syspath to a vfio device's fdinfo. This enables tools to query which device is associated with a given vfio device fd. This results in output like below: $ cat /proc/"$SOME_PID"/fdinfo/"$VFIO_FD" | grep vfio vfio-device-syspath: /sys/devices/pci0000:e0/0000:e0:01.1/0000:e1:00.0/0000:e2:05.0/0000:e8:00.0 Signed-off-by: Alex Mastro Reviewed-by: Amit Machhiwal Tested-by: Amit Machhiwal Link: https://lore.kernel.org/r/20250804-show-fdinfo-v4-1-96b14c5691b3@fb.com Signed-off-by: Alex Williamson --- Documentation/filesystems/proc.rst | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/proc.rst b/Documentation/filesystems/proc.rst index 2971551b7235..ed8d23b677ca 100644 --- a/Documentation/filesystems/proc.rst +++ b/Documentation/filesystems/proc.rst @@ -2166,6 +2166,20 @@ DMA Buffer files where 'size' is the size of the DMA buffer in bytes. 'count' is the file count of the DMA buffer file. 'exp_name' is the name of the DMA buffer exporter. +VFIO Device files +~~~~~~~~~~~~~~~~ + +:: + + pos: 0 + flags: 02000002 + mnt_id: 17 + ino: 5122 + vfio-device-syspath: /sys/devices/pci0000:e0/0000:e0:01.1/0000:e1:00.0/0000:e2:05.0/0000:e8:00.0 + +where 'vfio-device-syspath' is the sysfs path corresponding to the VFIO device +file. + 3.9 /proc//map_files - Information about memory mapped files --------------------------------------------------------------------- This directory contains symbolic links which represent memory mapped files -- cgit v1.2.3 From 545908a9fb9c01e1bd7afe040f5623f561d50ea0 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 22 Aug 2025 17:46:26 +0200 Subject: dt-bindings: gpio-mmio: Support hogs We use hogs on some MMIO GPIO controllers so make sure the bindings support this using a pattern property. Reviewed-by: Rob Herring (Arm) Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20250822-ixp4xx-eb-mmio-gpio-v2-1-bd2edd4a9c74@linaro.org Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/gpio/gpio-mmio.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml b/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml index 87e986386f32..ca32317dff85 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml @@ -89,6 +89,12 @@ properties: description: If this property is present, the controller cannot drive the GPIO lines. +patternProperties: + "^.+-hog(-[0-9]+)?$": + type: object + required: + - gpio-hog + required: - compatible - reg -- cgit v1.2.3 From 1f3c076063f03999c351c0725adf744ef5660733 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 22 Aug 2025 17:46:27 +0200 Subject: dt-bindings: gpio-mmio: Add MMIO for IXP4xx expansion bus This expansion is a simple MMIO-mapped GPIO device but the bus has a number of additional properties that we need to bring in using a reference to the bus child node schema. Reviewed-by: Rob Herring (Arm) Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20250822-ixp4xx-eb-mmio-gpio-v2-2-bd2edd4a9c74@linaro.org Signed-off-by: Bartosz Golaszewski --- .../devicetree/bindings/gpio/gpio-mmio.yaml | 30 +++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml b/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml index ca32317dff85..b4d55bf6a285 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml @@ -22,6 +22,7 @@ properties: - brcm,bcm6345-gpio - ni,169445-nand-gpio - wd,mbl-gpio # Western Digital MyBook Live memory-mapped GPIO controller + - intel,ixp4xx-expansion-bus-mmio-gpio big-endian: true @@ -89,6 +90,14 @@ properties: description: If this property is present, the controller cannot drive the GPIO lines. +if: + properties: + compatible: + contains: + const: intel,ixp4xx-expansion-bus-mmio-gpio +then: + $ref: /schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml# + patternProperties: "^.+-hog(-[0-9]+)?$": type: object @@ -102,7 +111,7 @@ required: - '#gpio-cells' - gpio-controller -additionalProperties: false +unevaluatedProperties: false examples: - | @@ -132,3 +141,22 @@ examples: gpio-controller; #gpio-cells = <2>; }; + + bus@c4000000 { + compatible = "intel,ixp42x-expansion-bus-controller", "syscon"; + reg = <0xc4000000 0x30>; + native-endian; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0x0 0x50000000 0x01000000>; + dma-ranges = <0 0x0 0x50000000 0x01000000>; + gpio@1,0 { + compatible = "intel,ixp4xx-expansion-bus-mmio-gpio"; + gpio-controller; + #gpio-cells = <2>; + big-endian; + reg = <1 0x00000000 0x2>; + reg-names = "dat"; + intel,ixp4xx-eb-write-enable = <1>; + }; + }; -- cgit v1.2.3 From bc2741b032f8bbf2e46085ba9c674c094f396253 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 21 Aug 2025 10:30:39 +0200 Subject: dt-bindings: net: litex,liteeth: Correct example indentation DTS example in the bindings should be indented with 2- or 4-spaces, so correct a mixture of different styles to keep consistent 4-spaces. Signed-off-by: Krzysztof Kozlowski Acked-by: Gabriel Somlo Link: https://patch.msgid.link/20250821083038.46274-3-krzysztof.kozlowski@linaro.org Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/litex,liteeth.yaml | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/litex,liteeth.yaml b/Documentation/devicetree/bindings/net/litex,liteeth.yaml index ebf4e360f8dd..bbb71556ec9e 100644 --- a/Documentation/devicetree/bindings/net/litex,liteeth.yaml +++ b/Documentation/devicetree/bindings/net/litex,liteeth.yaml @@ -86,12 +86,12 @@ examples: phy-handle = <ð_phy>; mdio { - #address-cells = <1>; - #size-cells = <0>; + #address-cells = <1>; + #size-cells = <0>; - eth_phy: ethernet-phy@0 { - reg = <0>; - }; + eth_phy: ethernet-phy@0 { + reg = <0>; + }; }; }; ... -- cgit v1.2.3 From 7f052126ff38f497cc8721f0b0e99aa201cd5a7f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 21 Aug 2025 10:30:40 +0200 Subject: dt-bindings: net: Drop vim style annotation Bindings files should not carry markings of editor setup, so drop vim style annotation. No functional impact. Signed-off-by: Krzysztof Kozlowski Acked-by: Gabriel Somlo Link: https://patch.msgid.link/20250821083038.46274-4-krzysztof.kozlowski@linaro.org Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/litex,liteeth.yaml | 2 -- Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml | 1 - 2 files changed, 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/litex,liteeth.yaml b/Documentation/devicetree/bindings/net/litex,liteeth.yaml index bbb71556ec9e..200b198b0d9b 100644 --- a/Documentation/devicetree/bindings/net/litex,liteeth.yaml +++ b/Documentation/devicetree/bindings/net/litex,liteeth.yaml @@ -95,5 +95,3 @@ examples: }; }; ... - -# vim: set ts=2 sw=2 sts=2 tw=80 et cc=80 ft=yaml : diff --git a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml index a73fc5036905..082982c59a55 100644 --- a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml +++ b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml @@ -245,4 +245,3 @@ examples: }; ... -# vim: set ts=2 sw=2 sts=2 tw=80 et cc=80 ft=yaml : -- cgit v1.2.3 From 66edbb1e32eede16b261a90014451d67119fc875 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Wed, 20 Aug 2025 12:49:45 -0400 Subject: dt-bindings: gpio: Move fsl,mxs-pinctrl.txt into gpio-mxs.yaml Move mxs-pinctrl part into gpio-mxs.yaml and add pinctrl examples to fix below CHECK_DTB warning: arch/arm/boot/dts/nxp/mxs/imx28-xea.dtb: pinctrl@80018000 (fsl,imx28-pinctrl): 'auart0-2pins@0', 'auart0@0', ... 'usb1@1' do not match any of the regexes: 'gpio@[0-9]+$', 'pinctrl-[0-9]+' Signed-off-by: Frank Li Reviewed-by: Linus Walleij Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250820164946.3782702-1-Frank.Li@nxp.com Signed-off-by: Bartosz Golaszewski --- .../devicetree/bindings/gpio/gpio-mxs.yaml | 80 ++++++++++++- .../bindings/pinctrl/fsl,mxs-pinctrl.txt | 127 --------------------- 2 files changed, 75 insertions(+), 132 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml b/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml index b58e08c8ecd8..aaf97124803f 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml @@ -18,9 +18,13 @@ description: | properties: compatible: - enum: - - fsl,imx23-pinctrl - - fsl,imx28-pinctrl + items: + - enum: + - fsl,imx23-pinctrl + - fsl,imx28-pinctrl + # Over 10 years old devices, driver use simple-bus to probe child gpio + # Devices. Keep it as it to be compatible existed dts files. + - const: simple-bus '#address-cells': const: 1 @@ -31,7 +35,65 @@ properties: maxItems: 1 patternProperties: - "gpio@[0-9]+$": + "^(?!gpio@)[^@]+@[0-9]+$": + type: object + properties: + fsl,pinmux-ids: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + An integer array. Each integer in the array specify a pin + with given mux function, with bank, pin and mux packed as below. + + [15..12] : bank number + [11..4] : pin number + [3..0] : mux selection + + This integer with mux selection packed is used as an entity by both group + and config nodes to identify a pin. The mux selection in the integer takes + effects only on group node, and will get ignored by driver with config node, + since config node is only meant to set up pin configurations. + + Valid values for these integers are listed below. + + reg: + items: + - description: | + pin group index. NOTE: it is supposed wrong use reg property + here. But it is over 10 years devices. Just keep it as it. + + fsl,drive-strength: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + description: | + 0: MXS_DRIVE_4mA + 1: MXS_DRIVE_8mA + 2: MXS_DRIVE_12mA + 3: MXS_DRIVE_16mA + + fsl,voltage: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + 0: MXS_VOLTAGE_LOW - 1.8 V + 1: MXS_VOLTAGE_HIGH - 3.3 V + + fsl,pull-up: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + 0: MXS_PULL_DISABLE - Disable the internal pull-up + 1: MXS_PULL_ENABLE - Enable the internal pull-up + + Note that when enabling the pull-up, the internal pad keeper gets disabled. + Also, some pins doesn't have a pull up, in that case, setting the fsl,pull-up + will only disable the internal pad keeper. + + required: + - fsl,pinmux-ids + + additionalProperties: false + + "^gpio@[0-9]+$": type: object properties: compatible: @@ -80,7 +142,7 @@ examples: pinctrl@80018000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx28-pinctrl"; + compatible = "fsl,imx28-pinctrl", "simple-bus"; reg = <0x80018000 0x2000>; gpio@0 { @@ -132,4 +194,12 @@ examples: interrupt-controller; #interrupt-cells = <2>; }; + + lcdif-apx4@5 { + reg = <5>; + fsl,pinmux-ids = <0x1181 0x1191>; + fsl,drive-strength = <0>; + fsl,voltage = <0>; + fsl,pull-up = <0>; + }; }; diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt deleted file mode 100644 index 1e70a8aff260..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt +++ /dev/null @@ -1,127 +0,0 @@ -* Freescale MXS Pin Controller - -The pins controlled by mxs pin controller are organized in banks, each bank -has 32 pins. Each pin has 4 multiplexing functions, and generally, the 4th -function is GPIO. The configuration on the pins includes drive strength, -voltage and pull-up. - -Required properties: -- compatible: "fsl,imx23-pinctrl" or "fsl,imx28-pinctrl" -- reg: Should contain the register physical address and length for the - pin controller. - -Please refer to pinctrl-bindings.txt in this directory for details of the -common pinctrl bindings used by client devices. - -The node of mxs pin controller acts as a container for an arbitrary number of -subnodes. Each of these subnodes represents some desired configuration for -a group of pins, and only affects those parameters that are explicitly listed. -In other words, a subnode that describes a drive strength parameter implies no -information about pull-up. For this reason, even seemingly boolean values are -actually tristates in this binding: unspecified, off, or on. Unspecified is -represented as an absent property, and off/on are represented as integer -values 0 and 1. - -Those subnodes under mxs pin controller node will fall into two categories. -One is to set up a group of pins for a function, both mux selection and pin -configurations, and it's called group node in the binding document. The other -one is to adjust the pin configuration for some particular pins that need a -different configuration than what is defined in group node. The binding -document calls this type of node config node. - -On mxs, there is no hardware pin group. The pin group in this binding only -means a group of pins put together for particular peripheral to work in -particular function, like SSP0 functioning as mmc0-8bit. That said, the -group node should include all the pins needed for one function rather than -having these pins defined in several group nodes. It also means each of -"pinctrl-*" phandle in client device node should only have one group node -pointed in there, while the phandle can have multiple config node referenced -there to adjust configurations for some pins in the group. - -Required subnode-properties: -- fsl,pinmux-ids: An integer array. Each integer in the array specify a pin - with given mux function, with bank, pin and mux packed as below. - - [15..12] : bank number - [11..4] : pin number - [3..0] : mux selection - - This integer with mux selection packed is used as an entity by both group - and config nodes to identify a pin. The mux selection in the integer takes - effects only on group node, and will get ignored by driver with config node, - since config node is only meant to set up pin configurations. - - Valid values for these integers are listed below. - -- reg: Should be the index of the group nodes for same function. This property - is required only for group nodes, and should not be present in any config - nodes. - -Optional subnode-properties: -- fsl,drive-strength: Integer. - 0: MXS_DRIVE_4mA - 1: MXS_DRIVE_8mA - 2: MXS_DRIVE_12mA - 3: MXS_DRIVE_16mA -- fsl,voltage: Integer. - 0: MXS_VOLTAGE_LOW - 1.8 V - 1: MXS_VOLTAGE_HIGH - 3.3 V -- fsl,pull-up: Integer. - 0: MXS_PULL_DISABLE - Disable the internal pull-up - 1: MXS_PULL_ENABLE - Enable the internal pull-up - -Note that when enabling the pull-up, the internal pad keeper gets disabled. -Also, some pins doesn't have a pull up, in that case, setting the fsl,pull-up -will only disable the internal pad keeper. - -Examples: - -pinctrl@80018000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx28-pinctrl"; - reg = <0x80018000 2000>; - - mmc0_8bit_pins_a: mmc0-8bit@0 { - reg = <0>; - fsl,pinmux-ids = < - MX28_PAD_SSP0_DATA0__SSP0_D0 - MX28_PAD_SSP0_DATA1__SSP0_D1 - MX28_PAD_SSP0_DATA2__SSP0_D2 - MX28_PAD_SSP0_DATA3__SSP0_D3 - MX28_PAD_SSP0_DATA4__SSP0_D4 - MX28_PAD_SSP0_DATA5__SSP0_D5 - MX28_PAD_SSP0_DATA6__SSP0_D6 - MX28_PAD_SSP0_DATA7__SSP0_D7 - MX28_PAD_SSP0_CMD__SSP0_CMD - MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT - MX28_PAD_SSP0_SCK__SSP0_SCK - >; - fsl,drive-strength = ; - fsl,voltage = ; - fsl,pull-up = ; - }; - - mmc_cd_cfg: mmc-cd-cfg { - fsl,pinmux-ids = ; - fsl,pull-up = ; - }; - - mmc_sck_cfg: mmc-sck-cfg { - fsl,pinmux-ids = ; - fsl,drive-strength = ; - fsl,pull-up = ; - }; -}; - -In this example, group node mmc0-8bit defines a group of pins for mxs SSP0 -to function as a 8-bit mmc device, with 8mA, 3.3V and pull-up configurations -applied on all these pins. And config nodes mmc-cd-cfg and mmc-sck-cfg are -adjusting the configuration for pins card-detection and clock from what group -node mmc0-8bit defines. Only the configuration properties to be adjusted need -to be listed in the config nodes. - -Valid values for i.MX28/i.MX23 pinmux-id are defined in -arch/arm/boot/dts/imx28-pinfunc.h and arch/arm/boot/dts/imx23-pinfunc.h. -The definitions for the padconfig properties can be found in -arch/arm/boot/dts/mxs-pinfunc.h. -- cgit v1.2.3 From 8003235b10e54c1be57374c6224751b39750f16c Mon Sep 17 00:00:00 2001 From: Dmitry Torokhov Date: Sun, 17 Aug 2025 14:30:20 -0700 Subject: Documentation: gpio: add documentation about using software nodes Introduce documentation regarding use of software nodes to describe GPIOs on legacy boards that have not been converted to device tree. Reviewed-by: Randy Dunlap Tested-by: Randy Dunlap Signed-off-by: Dmitry Torokhov Reviewed-by: Linus Walleij Link: https://lore.kernel.org/r/tnaaz2qlk5jpbonfle7uy7pb54qx6ixwuczfbkwtxxwpj7hwas@y7a2rwko3k6c Signed-off-by: Bartosz Golaszewski --- Documentation/driver-api/gpio/board.rst | 65 ++++++ Documentation/driver-api/gpio/index.rst | 1 + Documentation/driver-api/gpio/legacy-boards.rst | 298 ++++++++++++++++++++++++ 3 files changed, 364 insertions(+) create mode 100644 Documentation/driver-api/gpio/legacy-boards.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/gpio/board.rst b/Documentation/driver-api/gpio/board.rst index 4fd1cbd8296e..069b54d8591b 100644 --- a/Documentation/driver-api/gpio/board.rst +++ b/Documentation/driver-api/gpio/board.rst @@ -94,6 +94,71 @@ with the help of _DSD (Device Specific Data), introduced in ACPI 5.1:: For more information about the ACPI GPIO bindings see Documentation/firmware-guide/acpi/gpio-properties.rst. +Software Nodes +-------------- + +Software nodes allow board-specific code to construct an in-memory, +device-tree-like structure using struct software_node and struct +property_entry. This structure can then be associated with a platform device, +allowing drivers to use the standard device properties API to query +configuration, just as they would on an ACPI or device tree system. + +Software-node-backed GPIOs are described using the ``PROPERTY_ENTRY_GPIO()`` +macro, which ties a software node representing the GPIO controller with +consumer device. It allows consumers to use regular gpiolib APIs, such as +gpiod_get(), gpiod_get_optional(). + +The software node representing a GPIO controller need not be attached to the +GPIO controller device. The only requirement is that the node must be +registered and its name must match the GPIO controller's label. + +For example, here is how to describe a single GPIO-connected LED. This is an +alternative to using platform_data on legacy systems. + +.. code-block:: c + + #include + #include + #include + + /* + * 1. Define a node for the GPIO controller. Its .name must match the + * controller's label. + */ + static const struct software_node gpio_controller_node = { + .name = "gpio-foo", + }; + + /* 2. Define the properties for the LED device. */ + static const struct property_entry led_device_props[] = { + PROPERTY_ENTRY_STRING("label", "myboard:green:status"), + PROPERTY_ENTRY_STRING("linux,default-trigger", "heartbeat"), + PROPERTY_ENTRY_GPIO("gpios", &gpio_controller_node, 42, GPIO_ACTIVE_HIGH), + { } + }; + + /* 3. Define the software node for the LED device. */ + static const struct software_node led_device_swnode = { + .name = "status-led", + .properties = led_device_props, + }; + + /* + * 4. Register the software nodes and the platform device. + */ + const struct software_node *swnodes[] = { + &gpio_controller_node, + &led_device_swnode, + NULL + }; + software_node_register_node_group(swnodes); + + // Then register a platform_device for "leds-gpio" and associate + // it with &led_device_swnode via .fwnode. + +For a complete guide on converting board files to use software nodes, see +Documentation/driver-api/gpio/legacy-boards.rst. + Platform Data ------------- Finally, GPIOs can be bound to devices and functions using platform data. Board diff --git a/Documentation/driver-api/gpio/index.rst b/Documentation/driver-api/gpio/index.rst index 43f6a3afe10b..87929840e85a 100644 --- a/Documentation/driver-api/gpio/index.rst +++ b/Documentation/driver-api/gpio/index.rst @@ -12,6 +12,7 @@ Contents: driver consumer board + legacy-boards drivers-on-gpio bt8xxgpio diff --git a/Documentation/driver-api/gpio/legacy-boards.rst b/Documentation/driver-api/gpio/legacy-boards.rst new file mode 100644 index 000000000000..46e3a26dba77 --- /dev/null +++ b/Documentation/driver-api/gpio/legacy-boards.rst @@ -0,0 +1,298 @@ +Supporting Legacy Boards +======================== + +Many drivers in the kernel, such as ``leds-gpio`` and ``gpio-keys``, are +migrating away from using board-specific ``platform_data`` to a unified device +properties interface. This interface allows drivers to be simpler and more +generic, as they can query properties in a standardized way. + +On modern systems, these properties are provided via device tree. However, some +older platforms have not been converted to device tree and instead rely on +board files to describe their hardware configuration. To bridge this gap and +allow these legacy boards to work with modern, generic drivers, the kernel +provides a mechanism called **software nodes**. + +This document provides a guide on how to convert a legacy board file from using +``platform_data`` and ``gpiod_lookup_table`` to the modern software node +approach for describing GPIO-connected devices. + +The Core Idea: Software Nodes +----------------------------- + +Software nodes allow board-specific code to construct an in-memory, +device-tree-like structure using struct software_node and struct +property_entry. This structure can then be associated with a platform device, +allowing drivers to use the standard device properties API (e.g., +device_property_read_u32(), device_property_read_string()) to query +configuration, just as they would on an ACPI or device tree system. + +The gpiolib code has support for handling software nodes, so that if GPIO is +described properly, as detailed in the section below, then regular gpiolib APIs, +such as gpiod_get(), gpiod_get_optional(), and others will work. + +Requirements for GPIO Properties +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +When using software nodes to describe GPIO connections, the following +requirements must be met for the GPIO core to correctly resolve the reference: + +1. **The GPIO controller's software node "name" must match the controller's + "label".** The gpiolib core uses this name to find the corresponding + struct gpio_chip at runtime. + This software node has to be registered, but need not be attached to the + device representing the GPIO controller that is providing the GPIO in + question. It may be left as a "free floating" node. + +2. **The GPIO property must be a reference.** The ``PROPERTY_ENTRY_GPIO()`` + macro handles this as it is an alias for ``PROPERTY_ENTRY_REF()``. + +3. **The reference must have exactly two arguments:** + + - The first argument is the GPIO offset within the controller. + - The second argument is the flags for the GPIO line (e.g., + GPIO_ACTIVE_HIGH, GPIO_ACTIVE_LOW). + +The ``PROPERTY_ENTRY_GPIO()`` macro is the preferred way of defining GPIO +properties in software nodes. + +Conversion Example +------------------ + +Let's walk through an example of converting a board file that defines a GPIO- +connected LED and a button. + +Before: Using Platform Data +~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +A typical legacy board file might look like this: + +.. code-block:: c + + #include + #include + #include + #include + + #define MYBOARD_GPIO_CONTROLLER "gpio-foo" + + /* LED setup */ + static const struct gpio_led myboard_leds[] = { + { + .name = "myboard:green:status", + .default_trigger = "heartbeat", + }, + }; + + static const struct gpio_led_platform_data myboard_leds_pdata = { + .num_leds = ARRAY_SIZE(myboard_leds), + .leds = myboard_leds, + }; + + static struct gpiod_lookup_table myboard_leds_gpios = { + .dev_id = "leds-gpio", + .table = { + GPIO_LOOKUP_IDX(MYBOARD_GPIO_CONTROLLER, 42, NULL, 0, GPIO_ACTIVE_HIGH), + { }, + }, + }; + + /* Button setup */ + static struct gpio_keys_button myboard_buttons[] = { + { + .code = KEY_WPS_BUTTON, + .desc = "WPS Button", + .active_low = 1, + }, + }; + + static const struct gpio_keys_platform_data myboard_buttons_pdata = { + .buttons = myboard_buttons, + .nbuttons = ARRAY_SIZE(myboard_buttons), + }; + + static struct gpiod_lookup_table myboard_buttons_gpios = { + .dev_id = "gpio-keys", + .table = { + GPIO_LOOKUP_IDX(MYBOARD_GPIO_CONTROLLER, 15, NULL, 0, GPIO_ACTIVE_LOW), + { }, + }, + }; + + /* Device registration */ + static int __init myboard_init(void) + { + gpiod_add_lookup_table(&myboard_leds_gpios); + gpiod_add_lookup_table(&myboard_buttons_gpios); + + platform_device_register_data(NULL, "leds-gpio", -1, + &myboard_leds_pdata, sizeof(myboard_leds_pdata)); + platform_device_register_data(NULL, "gpio-keys", -1, + &myboard_buttons_pdata, sizeof(myboard_buttons_pdata)); + + return 0; + } + +After: Using Software Nodes +~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Here is how the same configuration can be expressed using software nodes. + +Step 1: Define the GPIO Controller Node +*************************************** + +First, define a software node that represents the GPIO controller that the +LEDs and buttons are connected to. The ``name`` of this node must match the +name of the driver for the GPIO controller (e.g., "gpio-foo"). + +.. code-block:: c + + #include + #include + + #define MYBOARD_GPIO_CONTROLLER "gpio-foo" + + static const struct software_node myboard_gpio_controller_node = { + .name = MYBOARD_GPIO_CONTROLLER, + }; + +Step 2: Define Consumer Device Nodes and Properties +*************************************************** + +Next, define the software nodes for the consumer devices (the LEDs and buttons). +This involves creating a parent node for each device type and child nodes for +each individual LED or button. + +.. code-block:: c + + /* LED setup */ + static const struct software_node myboard_leds_node = { + .name = "myboard-leds", + }; + + static const struct property_entry myboard_status_led_props[] = { + PROPERTY_ENTRY_STRING("label", "myboard:green:status"), + PROPERTY_ENTRY_STRING("linux,default-trigger", "heartbeat"), + PROPERTY_ENTRY_GPIO("gpios", &myboard_gpio_controller_node, 42, GPIO_ACTIVE_HIGH), + { } + }; + + static const struct software_node myboard_status_led_swnode = { + .name = "status-led", + .parent = &myboard_leds_node, + .properties = myboard_status_led_props, + }; + + /* Button setup */ + static const struct software_node myboard_keys_node = { + .name = "myboard-keys", + }; + + static const struct property_entry myboard_wps_button_props[] = { + PROPERTY_ENTRY_STRING("label", "WPS Button"), + PROPERTY_ENTRY_U32("linux,code", KEY_WPS_BUTTON), + PROPERTY_ENTRY_GPIO("gpios", &myboard_gpio_controller_node, 15, GPIO_ACTIVE_LOW), + { } + }; + + static const struct software_node myboard_wps_button_swnode = { + .name = "wps-button", + .parent = &myboard_keys_node, + .properties = myboard_wps_button_props, + }; + + + +Step 3: Group and Register the Nodes +************************************ + +For maintainability, it is often beneficial to group all software nodes into a +single array and register them with one call. + +.. code-block:: c + + static const struct software_node * const myboard_swnodes[] = { + &myboard_gpio_controller_node, + &myboard_leds_node, + &myboard_status_led_swnode, + &myboard_keys_node, + &myboard_wps_button_swnode, + NULL + }; + + static int __init myboard_init(void) + { + int error; + + error = software_node_register_node_group(myboard_swnodes); + if (error) { + pr_err("Failed to register software nodes: %d\n", error); + return error; + } + + // ... platform device registration follows + } + +.. note:: + When splitting registration of nodes by devices that they represent, it is + essential that the software node representing the GPIO controller itself + is registered first, before any of the nodes that reference it. + +Step 4: Register Platform Devices with Software Nodes +***************************************************** + +Finally, register the platform devices and associate them with their respective +software nodes using the ``fwnode`` field in struct platform_device_info. + +.. code-block:: c + + static struct platform_device *leds_pdev; + static struct platform_device *keys_pdev; + + static int __init myboard_init(void) + { + struct platform_device_info pdev_info; + int error; + + error = software_node_register_node_group(myboard_swnodes); + if (error) + return error; + + memset(&pdev_info, 0, sizeof(pdev_info)); + pdev_info.name = "leds-gpio"; + pdev_info.id = PLATFORM_DEVID_NONE; + pdev_info.fwnode = software_node_fwnode(&myboard_leds_node); + leds_pdev = platform_device_register_full(&pdev_info); + if (IS_ERR(leds_pdev)) { + error = PTR_ERR(leds_pdev); + goto err_unregister_nodes; + } + + memset(&pdev_info, 0, sizeof(pdev_info)); + pdev_info.name = "gpio-keys"; + pdev_info.id = PLATFORM_DEVID_NONE; + pdev_info.fwnode = software_node_fwnode(&myboard_keys_node); + keys_pdev = platform_device_register_full(&pdev_info); + if (IS_ERR(keys_pdev)) { + error = PTR_ERR(keys_pdev); + platform_device_unregister(leds_pdev); + goto err_unregister_nodes; + } + + return 0; + + err_unregister_nodes: + software_node_unregister_node_group(myboard_swnodes); + return error; + } + + static void __exit myboard_exit(void) + { + platform_device_unregister(keys_pdev); + platform_device_unregister(leds_pdev); + software_node_unregister_node_group(myboard_swnodes); + } + +With these changes, the generic ``leds-gpio`` and ``gpio-keys`` drivers will +be able to probe successfully and get their configuration from the properties +defined in the software nodes, removing the need for board-specific platform +data. -- cgit v1.2.3 From 604642fc148b5d98fbe5f55e4c2688f9ee0b5868 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 21 Aug 2025 10:32:14 +0200 Subject: dt-bindings: gpio: Minor whitespace cleanup in example The DTS code coding style expects exactly one space around '=' character. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) Acked-by: Yixun Lan Link: https://lore.kernel.org/r/20250821083213.46642-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/gpio/maxim,max31910.yaml | 6 +++--- Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpio/maxim,max31910.yaml b/Documentation/devicetree/bindings/gpio/maxim,max31910.yaml index 82a190a715f9..4d200f9dffd5 100644 --- a/Documentation/devicetree/bindings/gpio/maxim,max31910.yaml +++ b/Documentation/devicetree/bindings/gpio/maxim,max31910.yaml @@ -95,9 +95,9 @@ examples: #gpio-cells = <2>; maxim,modesel-gpios = <&gpio2 23>; - maxim,fault-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>; - maxim,db0-gpios = <&gpio2 25>; - maxim,db1-gpios = <&gpio2 26>; + maxim,fault-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>; + maxim,db0-gpios = <&gpio2 25>; + maxim,db1-gpios = <&gpio2 26>; spi-max-frequency = <25000000>; }; diff --git a/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml b/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml index ec0232e72c71..83e0b2d14c9f 100644 --- a/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml @@ -80,7 +80,7 @@ examples: gpio@d4019000 { compatible = "spacemit,k1-gpio"; reg = <0xd4019000 0x800>; - clocks =<&ccu 9>, <&ccu 61>; + clocks = <&ccu 9>, <&ccu 61>; clock-names = "core", "bus"; gpio-controller; #gpio-cells = <3>; -- cgit v1.2.3 From 38fc73b8c7d692a099ddda37b700eeb330a03ff1 Mon Sep 17 00:00:00 2001 From: Riana Tauro Date: Tue, 26 Aug 2025 12:04:08 +0530 Subject: drm/xe: Add documentation for Xe Device Wedging Add documentation for Xe Device Wedging so that file can be referenced in following patches. Signed-off-by: Riana Tauro Reviewed-by: Rodrigo Vivi Link: https://lore.kernel.org/r/20250826063419.3022216-2-riana.tauro@intel.com Signed-off-by: Rodrigo Vivi --- Documentation/gpu/xe/index.rst | 1 + Documentation/gpu/xe/xe_device.rst | 10 ++++++++++ 2 files changed, 11 insertions(+) create mode 100644 Documentation/gpu/xe/xe_device.rst (limited to 'Documentation') diff --git a/Documentation/gpu/xe/index.rst b/Documentation/gpu/xe/index.rst index 42ba6c263cd0..88b22fad880e 100644 --- a/Documentation/gpu/xe/index.rst +++ b/Documentation/gpu/xe/index.rst @@ -25,5 +25,6 @@ DG2, etc is provided to prototype the driver. xe_tile xe_debugging xe_devcoredump + xe_device xe-drm-usage-stats.rst xe_configfs diff --git a/Documentation/gpu/xe/xe_device.rst b/Documentation/gpu/xe/xe_device.rst new file mode 100644 index 000000000000..39a937b97cd3 --- /dev/null +++ b/Documentation/gpu/xe/xe_device.rst @@ -0,0 +1,10 @@ +.. SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +.. _xe-device-wedging: + +================== +Xe Device Wedging +================== + +.. kernel-doc:: drivers/gpu/drm/xe/xe_device.c + :doc: Xe Device Wedging -- cgit v1.2.3 From 9c857a9d84e01332d031b55c4e38a66daecbae73 Mon Sep 17 00:00:00 2001 From: Riana Tauro Date: Tue, 26 Aug 2025 12:04:09 +0530 Subject: drm: Add a vendor-specific recovery method to drm device wedged uevent MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Address the need for a recovery method (firmware flash on Firmware errors) introduced in the later patches of Xe KMD. Whenever XE KMD detects a firmware error, a firmware flash is required to recover the device to normal operation. The initial proposal to use 'firmware-flash' as a recovery method was not applicable to other drivers and could cause multiple recovery methods specific to vendors to be added. To address this a more generic 'vendor-specific' method is introduced, guiding users to refer to vendor specific documentation and system logs for detailed vendor specific recovery procedure. Add a recovery method 'WEDGED=vendor-specific' for such errors. Vendors must provide additional recovery documentation if this method is used. It is the responsibility of the consumer to refer to the correct vendor specific documentation and usecase before attempting a recovery. For example: If driver is XE KMD, the consumer must refer to the documentation of 'Device Wedging' under 'Documentation/gpu/xe/'. v2: fix documentation (Raag) v3: add more details to commit message (Sima, Rodrigo, Raag) add an example script to the documentation (Raag) v4: use consistent naming (Raag) v5: fix commit message v6: add more documentation Cc: André Almeida Cc: Christian König Cc: David Airlie Cc: Simona Vetter Cc: Maxime Ripard Signed-off-by: Riana Tauro Reviewed-by: Rodrigo Vivi Acked-by: Maxime Ripard Link: https://lore.kernel.org/r/20250826063419.3022216-3-riana.tauro@intel.com Signed-off-by: Rodrigo Vivi --- Documentation/gpu/drm-uapi.rst | 47 +++++++++++++++++++++++++++++++++++------- 1 file changed, 40 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/gpu/drm-uapi.rst b/Documentation/gpu/drm-uapi.rst index 843facf01b2d..d98428a592f1 100644 --- a/Documentation/gpu/drm-uapi.rst +++ b/Documentation/gpu/drm-uapi.rst @@ -418,13 +418,12 @@ needed. Recovery -------- -Current implementation defines three recovery methods, out of which, drivers +Current implementation defines four recovery methods, out of which, drivers can use any one, multiple or none. Method(s) of choice will be sent in the uevent environment as ``WEDGED=[,..,]`` in order of less to -more side-effects. If driver is unsure about recovery or method is unknown -(like soft/hard system reboot, firmware flashing, physical device replacement -or any other procedure which can't be attempted on the fly), ``WEDGED=unknown`` -will be sent instead. +more side-effects. See the section `Vendor Specific Recovery`_ +for ``WEDGED=vendor-specific``. If driver is unsure about recovery or +method is unknown, ``WEDGED=unknown`` will be sent instead. Userspace consumers can parse this event and attempt recovery as per the following expectations. @@ -435,6 +434,7 @@ following expectations. none optional telemetry collection rebind unbind + bind driver bus-reset unbind + bus reset/re-enumeration + bind + vendor-specific vendor specific recovery method unknown consumer policy =============== ======================================== @@ -446,6 +446,35 @@ telemetry information (devcoredump, syslog). This is useful because the first hang is usually the most critical one which can result in consequential hangs or complete wedging. + +Vendor Specific Recovery +------------------------ + +When ``WEDGED=vendor-specific`` is sent, it indicates that the device requires +a recovery procedure specific to the hardware vendor and is not one of the +standardized approaches. + +``WEDGED=vendor-specific`` may be used to indicate different cases within a +single vendor driver, each requiring a distinct recovery procedure. +In such scenarios, the vendor driver must provide comprehensive documentation +that describes each case, include additional hints to identify specific case and +outline the corresponding recovery procedure. The documentation includes: + +Case - A list of all cases that sends the ``WEDGED=vendor-specific`` recovery method. + +Hints - Additional Information to assist the userspace consumer in identifying and +differentiating between different cases. This can be exposed through sysfs, debugfs, +traces, dmesg etc. + +Recovery Procedure - Clear instructions and guidance for recovering each case. +This may include userspace scripts, tools needed for the recovery procedure. + +It is the responsibility of the admin/userspace consumer to identify the case and +verify additional identification hints before attempting a recovery procedure. + +Example: If the device uses the Xe driver, then userspace consumer should refer to +:ref:`Xe Device Wedging ` for the detailed documentation. + Task information ---------------- @@ -472,8 +501,12 @@ erroring out, all device memory should be unmapped and file descriptors should be closed to prevent leaks or undefined behaviour. The idea here is to clear the device of all user context beforehand and set the stage for a clean recovery. -Example -------- +For ``WEDGED=vendor-specific`` recovery method, it is the responsibility of the +consumer to check the driver documentation and the usecase before attempting +a recovery. + +Example - rebind +---------------- Udev rule:: -- cgit v1.2.3 From f646c9f9371b28b8f93e619fe003415f6aaeb416 Mon Sep 17 00:00:00 2001 From: Riana Tauro Date: Tue, 26 Aug 2025 12:04:14 +0530 Subject: drm/xe/doc: Document device wedged and runtime survivability Add documentation for vendor specific device wedged recovery method and runtime survivability. v2: fix documentation (Raag) v3: add userspace tool for firmware update (Raag) v4: use consistent documentation (Raag) v5: add more documentation Signed-off-by: Riana Tauro Reviewed-by: Rodrigo Vivi Reviewed-by: Raag Jadav Link: https://lore.kernel.org/r/20250826063419.3022216-8-riana.tauro@intel.com Signed-off-by: Rodrigo Vivi --- Documentation/gpu/xe/xe_pcode.rst | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/gpu/xe/xe_pcode.rst b/Documentation/gpu/xe/xe_pcode.rst index 5937ef3599b0..2a43601123cb 100644 --- a/Documentation/gpu/xe/xe_pcode.rst +++ b/Documentation/gpu/xe/xe_pcode.rst @@ -13,9 +13,11 @@ Internal API .. kernel-doc:: drivers/gpu/drm/xe/xe_pcode.c :internal: +.. _xe-survivability-mode: + ================== -Boot Survivability +Survivability Mode ================== .. kernel-doc:: drivers/gpu/drm/xe/xe_survivability_mode.c - :doc: Xe Boot Survivability + :doc: Survivability Mode -- cgit v1.2.3 From da0e2197645c8e01bb6080c7a2b86d9a56cc64a9 Mon Sep 17 00:00:00 2001 From: Shahar Shitrit Date: Sun, 24 Aug 2025 11:43:53 +0300 Subject: devlink: Make health reporter burst period configurable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Enable configuration of the burst period — a time window starting from the first error recovery, during which the reporter allows recovery attempts for each reported error. This feature is helpful when a single underlying issue causes multiple errors, as it delays the start of the grace period to allow sufficient time for recovering all related errors. For example, if multiple TX queues time out simultaneously, a sufficient burst period could allow all affected TX queues to be recovered within that window. Without this period, only the first TX queue that reports a timeout will undergo recovery, while the remaining TX queues will be blocked once the grace period begins. Configuration example: $ devlink health set pci/0000:00:09.0 reporter tx burst_period 500 Configuration example with ynl: ./tools/net/ynl/pyynl/cli.py \ --spec Documentation/netlink/specs/devlink.yaml \ --do health-reporter-set --json '{ "bus-name": "auxiliary", "dev-name": "mlx5_core.eth.0", "port-index": 65535, "health-reporter-name": "tx", "health-reporter-burst-period": 500 }' Signed-off-by: Shahar Shitrit Reviewed-by: Jiri Pirko Reviewed-by: Dragos Tatulea Reviewed-by: Carolina Jubran Signed-off-by: Mark Bloch Link: https://patch.msgid.link/20250824084354.533182-5-mbloch@nvidia.com Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/devlink.yaml | 7 +++++++ Documentation/networking/devlink/devlink-health.rst | 2 +- 2 files changed, 8 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/devlink.yaml b/Documentation/netlink/specs/devlink.yaml index bb87111d5e16..3db59c965869 100644 --- a/Documentation/netlink/specs/devlink.yaml +++ b/Documentation/netlink/specs/devlink.yaml @@ -853,6 +853,10 @@ attribute-sets: type: nest multi-attr: true nested-attributes: dl-rate-tc-bws + - + name: health-reporter-burst-period + type: u64 + doc: Time (in msec) for recoveries before starting the grace period. - name: dl-dev-stats subset-of: devlink @@ -1216,6 +1220,8 @@ attribute-sets: name: health-reporter-dump-ts-ns - name: health-reporter-auto-dump + - + name: health-reporter-burst-period - name: dl-attr-stats @@ -1961,6 +1967,7 @@ operations: - health-reporter-graceful-period - health-reporter-auto-recover - health-reporter-auto-dump + - health-reporter-burst-period - name: health-reporter-recover diff --git a/Documentation/networking/devlink/devlink-health.rst b/Documentation/networking/devlink/devlink-health.rst index e0b8cfed610a..4d10536377ab 100644 --- a/Documentation/networking/devlink/devlink-health.rst +++ b/Documentation/networking/devlink/devlink-health.rst @@ -50,7 +50,7 @@ Once an error is reported, devlink health will perform the following actions: * Auto recovery attempt is being done. Depends on: - Auto-recovery configuration - - Grace period vs. time passed since last recover + - Grace period (and burst period) vs. time passed since last recover Devlink formatted message ========================= -- cgit v1.2.3 From 93cf798e761036ea357cae1e1c477f2afaa4b5f1 Mon Sep 17 00:00:00 2001 From: Marie Zhussupova Date: Tue, 26 Aug 2025 17:13:37 +0800 Subject: Documentation: kunit: Document new parameterized test features This patch updates the KUnit docs to show how to use the new parameterized test context to share resources between parameter runs. It documents and show examples of different ways the test user can pass parameter arrays to a parameterized test. Finally, it specifies the parameterized testing terminology. Link: https://lore.kernel.org/r/20250826091341.1427123-8-davidgow@google.com Reviewed-by: Rae Moar Reviewed-by: David Gow Signed-off-by: Marie Zhussupova Signed-off-by: David Gow Signed-off-by: Shuah Khan --- Documentation/dev-tools/kunit/usage.rst | 342 +++++++++++++++++++++++++++++++- 1 file changed, 337 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/dev-tools/kunit/usage.rst b/Documentation/dev-tools/kunit/usage.rst index 066ecda1dd98..ebd06f5ea455 100644 --- a/Documentation/dev-tools/kunit/usage.rst +++ b/Documentation/dev-tools/kunit/usage.rst @@ -542,11 +542,31 @@ There is more boilerplate code involved, but it can: Parameterized Testing ~~~~~~~~~~~~~~~~~~~~~ -The table-driven testing pattern is common enough that KUnit has special -support for it. +To run a test case against multiple inputs, KUnit provides a parameterized +testing framework. This feature formalizes and extends the concept of +table-driven tests discussed previously. -By reusing the same ``cases`` array from above, we can write the test as a -"parameterized test" with the following. +A KUnit test is determined to be parameterized if a parameter generator function +is provided when registering the test case. A test user can either write their +own generator function or use one that is provided by KUnit. The generator +function is stored in ``kunit_case->generate_params`` and can be set using the +macros described in the section below. + +To establish the terminology, a "parameterized test" is a test which is run +multiple times (once per "parameter" or "parameter run"). Each parameter run has +both its own independent ``struct kunit`` (the "parameter run context") and +access to a shared parent ``struct kunit`` (the "parameterized test context"). + +Passing Parameters to a Test +^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +There are three ways to provide the parameters to a test: + +Array Parameter Macros: + + KUnit provides special support for the common table-driven testing pattern. + By applying either ``KUNIT_ARRAY_PARAM`` or ``KUNIT_ARRAY_PARAM_DESC`` to the + ``cases`` array from the previous section, we can create a parameterized test + as shown below: .. code-block:: c @@ -555,7 +575,7 @@ By reusing the same ``cases`` array from above, we can write the test as a const char *str; const char *sha1; }; - const struct sha1_test_case cases[] = { + static const struct sha1_test_case cases[] = { { .str = "hello world", .sha1 = "2aae6c35c94fcfb415dbe95f408b9ce91ee846ed", @@ -590,6 +610,318 @@ By reusing the same ``cases`` array from above, we can write the test as a {} }; +Custom Parameter Generator Function: + + The generator function is responsible for generating parameters one-by-one + and has the following signature: + ``const void* (*)(struct kunit *test, const void *prev, char *desc)``. + You can pass the generator function to the ``KUNIT_CASE_PARAM`` + or ``KUNIT_CASE_PARAM_WITH_INIT`` macros. + + The function receives the previously generated parameter as the ``prev`` argument + (which is ``NULL`` on the first call) and can also access the parameterized + test context passed as the ``test`` argument. KUnit calls this function + repeatedly until it returns ``NULL``, which signifies that a parameterized + test ended. + + Below is an example of how it works: + +.. code-block:: c + + #define MAX_TEST_BUFFER_SIZE 8 + + // Example generator function. It produces a sequence of buffer sizes that + // are powers of two, starting at 1 (e.g., 1, 2, 4, 8). + static const void *buffer_size_gen_params(struct kunit *test, const void *prev, char *desc) + { + long prev_buffer_size = (long)prev; + long next_buffer_size = 1; // Start with an initial size of 1. + + // Stop generating parameters if the limit is reached or exceeded. + if (prev_buffer_size >= MAX_TEST_BUFFER_SIZE) + return NULL; + + // For subsequent calls, calculate the next size by doubling the previous one. + if (prev) + next_buffer_size = prev_buffer_size << 1; + + return (void *)next_buffer_size; + } + + // Simple test to validate that kunit_kzalloc provides zeroed memory. + static void buffer_zero_test(struct kunit *test) + { + long buffer_size = (long)test->param_value; + // Use kunit_kzalloc to allocate a zero-initialized buffer. This makes the + // memory "parameter run managed," meaning it's automatically cleaned up at + // the end of each parameter run. + int *buf = kunit_kzalloc(test, buffer_size * sizeof(int), GFP_KERNEL); + + // Ensure the allocation was successful. + KUNIT_ASSERT_NOT_NULL(test, buf); + + // Loop through the buffer and confirm every element is zero. + for (int i = 0; i < buffer_size; i++) + KUNIT_EXPECT_EQ(test, buf[i], 0); + } + + static struct kunit_case buffer_test_cases[] = { + KUNIT_CASE_PARAM(buffer_zero_test, buffer_size_gen_params), + {} + }; + +Runtime Parameter Array Registration in the Init Function: + + For scenarios where you might need to initialize a parameterized test, you + can directly register a parameter array to the parameterized test context. + + To do this, you must pass the parameterized test context, the array itself, + the array size, and a ``get_description()`` function to the + ``kunit_register_params_array()`` macro. This macro populates + ``struct kunit_params`` within the parameterized test context, effectively + storing a parameter array object. The ``get_description()`` function will + be used for populating parameter descriptions and has the following signature: + ``void (*)(struct kunit *test, const void *param, char *desc)``. Note that it + also has access to the parameterized test context. + + .. important:: + When using this way to register a parameter array, you will need to + manually pass ``kunit_array_gen_params()`` as the generator function to + ``KUNIT_CASE_PARAM_WITH_INIT``. ``kunit_array_gen_params()`` is a KUnit + helper that will use the registered array to generate the parameters. + + If needed, instead of passing the KUnit helper, you can also pass your + own custom generator function that utilizes the parameter array. To + access the parameter array from within the parameter generator + function use ``test->params_array.params``. + + The ``kunit_register_params_array()`` macro should be called within a + ``param_init()`` function that initializes the parameterized test and has + the following signature ``int (*)(struct kunit *test)``. For a detailed + explanation of this mechanism please refer to the "Adding Shared Resources" + section that is after this one. This method supports registering both + dynamically built and static parameter arrays. + + The code snippet below shows the ``example_param_init_dynamic_arr`` test that + utilizes ``make_fibonacci_params()`` to create a dynamic array, which is then + registered using ``kunit_register_params_array()``. To see the full code + please refer to lib/kunit/kunit-example-test.c. + +.. code-block:: c + + /* + * Example of a parameterized test param_init() function that registers a dynamic + * array of parameters. + */ + static int example_param_init_dynamic_arr(struct kunit *test) + { + size_t seq_size; + int *fibonacci_params; + + kunit_info(test, "initializing parameterized test\n"); + + seq_size = 6; + fibonacci_params = make_fibonacci_params(test, seq_size); + if (!fibonacci_params) + return -ENOMEM; + /* + * Passes the dynamic parameter array information to the parameterized test + * context struct kunit. The array and its metadata will be stored in + * test->parent->params_array. The array itself will be located in + * params_data.params. + */ + kunit_register_params_array(test, fibonacci_params, seq_size, + example_param_dynamic_arr_get_desc); + return 0; + } + + static struct kunit_case example_test_cases[] = { + /* + * Note how we pass kunit_array_gen_params() to use the array we + * registered in example_param_init_dynamic_arr() to generate + * parameters. + */ + KUNIT_CASE_PARAM_WITH_INIT(example_params_test_with_init_dynamic_arr, + kunit_array_gen_params, + example_param_init_dynamic_arr, + example_param_exit_dynamic_arr), + {} + }; + +Adding Shared Resources +^^^^^^^^^^^^^^^^^^^^^^^ +All parameter runs in this framework hold a reference to the parameterized test +context, which can be accessed using the parent ``struct kunit`` pointer. The +parameterized test context is not used to execute any test logic itself; instead, +it serves as a container for shared resources. + +It's possible to add resources to share between parameter runs within a +parameterized test by using ``KUNIT_CASE_PARAM_WITH_INIT``, to which you pass +custom ``param_init()`` and ``param_exit()`` functions. These functions run once +before and once after the parameterized test, respectively. + +The ``param_init()`` function, with the signature ``int (*)(struct kunit *test)``, +can be used for adding resources to the ``resources`` or ``priv`` fields of +the parameterized test context, registering the parameter array, and any other +initialization logic. + +The ``param_exit()`` function, with the signature ``void (*)(struct kunit *test)``, +can be used to release any resources that were not parameterized test managed (i.e. +not automatically cleaned up after the parameterized test ends) and for any other +exit logic. + +Both ``param_init()`` and ``param_exit()`` are passed the parameterized test +context behind the scenes. However, the test case function receives the parameter +run context. Therefore, to manage and access shared resources from within a test +case function, you must use ``test->parent``. + +For instance, finding a shared resource allocated by the Resource API requires +passing ``test->parent`` to ``kunit_find_resource()``. This principle extends to +all other APIs that might be used in the test case function, including +``kunit_kzalloc()``, ``kunit_kmalloc_array()``, and others (see +Documentation/dev-tools/kunit/api/test.rst and the +Documentation/dev-tools/kunit/api/resource.rst). + +.. note:: + The ``suite->init()`` function, which executes before each parameter run, + receives the parameter run context. Therefore, any resources set up in + ``suite->init()`` are cleaned up after each parameter run. + +The code below shows how you can add the shared resources. Note that this code +utilizes the Resource API, which you can read more about here: +Documentation/dev-tools/kunit/api/resource.rst. To see the full version of this +code please refer to lib/kunit/kunit-example-test.c. + +.. code-block:: c + + static int example_resource_init(struct kunit_resource *res, void *context) + { + ... /* Code that allocates memory and stores context in res->data. */ + } + + /* This function deallocates memory for the kunit_resource->data field. */ + static void example_resource_free(struct kunit_resource *res) + { + kfree(res->data); + } + + /* This match function locates a test resource based on defined criteria. */ + static bool example_resource_alloc_match(struct kunit *test, struct kunit_resource *res, + void *match_data) + { + return res->data && res->free == example_resource_free; + } + + /* Function to initialize the parameterized test. */ + static int example_param_init(struct kunit *test) + { + int ctx = 3; /* Data to be stored. */ + void *data = kunit_alloc_resource(test, example_resource_init, + example_resource_free, + GFP_KERNEL, &ctx); + if (!data) + return -ENOMEM; + kunit_register_params_array(test, example_params_array, + ARRAY_SIZE(example_params_array)); + return 0; + } + + /* Example test that uses shared resources in test->resources. */ + static void example_params_test_with_init(struct kunit *test) + { + int threshold; + const struct example_param *param = test->param_value; + /* Here we pass test->parent to access the parameterized test context. */ + struct kunit_resource *res = kunit_find_resource(test->parent, + example_resource_alloc_match, + NULL); + + threshold = *((int *)res->data); + KUNIT_ASSERT_LE(test, param->value, threshold); + kunit_put_resource(res); + } + + static struct kunit_case example_test_cases[] = { + KUNIT_CASE_PARAM_WITH_INIT(example_params_test_with_init, kunit_array_gen_params, + example_param_init, NULL), + {} + }; + +As an alternative to using the KUnit Resource API for sharing resources, you can +place them in ``test->parent->priv``. This serves as a more lightweight method +for resource storage, best for scenarios where complex resource management is +not required. + +As stated previously ``param_init()`` and ``param_exit()`` get the parameterized +test context. So, you can directly use ``test->priv`` within ``param_init/exit`` +to manage shared resources. However, from within the test case function, you must +navigate up to the parent ``struct kunit`` i.e. the parameterized test context. +Therefore, you need to use ``test->parent->priv`` to access those same +resources. + +The resources placed in ``test->parent->priv`` will need to be allocated in +memory to persist across the parameter runs. If memory is allocated using the +KUnit memory allocation APIs (described more in the "Allocating Memory" section +below), you won't need to worry about deallocation. The APIs will make the memory +parameterized test 'managed', ensuring that it will automatically get cleaned up +after the parameterized test concludes. + +The code below demonstrates example usage of the ``priv`` field for shared +resources: + +.. code-block:: c + + static const struct example_param { + int value; + } example_params_array[] = { + { .value = 3, }, + { .value = 2, }, + { .value = 1, }, + { .value = 0, }, + }; + + /* Initialize the parameterized test context. */ + static int example_param_init_priv(struct kunit *test) + { + int ctx = 3; /* Data to be stored. */ + int arr_size = ARRAY_SIZE(example_params_array); + + /* + * Allocate memory using kunit_kzalloc(). Since the `param_init` + * function receives the parameterized test context, this memory + * allocation will be scoped to the lifetime of the parameterized test. + */ + test->priv = kunit_kzalloc(test, sizeof(int), GFP_KERNEL); + + /* Assign the context value to test->priv.*/ + *((int *)test->priv) = ctx; + + /* Register the parameter array. */ + kunit_register_params_array(test, example_params_array, arr_size, NULL); + return 0; + } + + static void example_params_test_with_init_priv(struct kunit *test) + { + int threshold; + const struct example_param *param = test->param_value; + + /* By design, test->parent will not be NULL. */ + KUNIT_ASSERT_NOT_NULL(test, test->parent); + + /* Here we use test->parent->priv to access the shared resource. */ + threshold = *(int *)test->parent->priv; + + KUNIT_ASSERT_LE(test, param->value, threshold); + } + + static struct kunit_case example_tests[] = { + KUNIT_CASE_PARAM_WITH_INIT(example_params_test_with_init_priv, + kunit_array_gen_params, + example_param_init_priv, NULL), + {} + }; + Allocating Memory ----------------- -- cgit v1.2.3 From 3d3a04fad25a6621828518a2abe536142d2c1a7d Mon Sep 17 00:00:00 2001 From: Fuad Tabba Date: Tue, 29 Jul 2025 15:54:52 -0700 Subject: KVM: Allow and advertise support for host mmap() on guest_memfd files Now that all the x86 and arm64 plumbing for mmap() on guest_memfd is in place, allow userspace to set GUEST_MEMFD_FLAG_MMAP and advertise support via a new capability, KVM_CAP_GUEST_MEMFD_MMAP. The availability of this capability is determined per architecture, and its enablement for a specific guest_memfd instance is controlled by the GUEST_MEMFD_FLAG_MMAP flag at creation time. Update the KVM API documentation to detail the KVM_CAP_GUEST_MEMFD_MMAP capability, the associated GUEST_MEMFD_FLAG_MMAP, and provide essential information regarding support for mmap in guest_memfd. Reviewed-by: David Hildenbrand Reviewed-by: Gavin Shan Reviewed-by: Shivank Garg Reviewed-by: Xiaoyao Li Signed-off-by: Fuad Tabba Signed-off-by: Sean Christopherson Message-ID: <20250729225455.670324-22-seanjc@google.com> Signed-off-by: Paolo Bonzini --- Documentation/virt/kvm/api.rst | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index 6aa40ee05a4a..c17a87a0a5ac 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -6414,6 +6414,15 @@ most one mapping per page, i.e. binding multiple memory regions to a single guest_memfd range is not allowed (any number of memory regions can be bound to a single guest_memfd file, but the bound ranges must not overlap). +When the capability KVM_CAP_GUEST_MEMFD_MMAP is supported, the 'flags' field +supports GUEST_MEMFD_FLAG_MMAP. Setting this flag on guest_memfd creation +enables mmap() and faulting of guest_memfd memory to host userspace. + +When the KVM MMU performs a PFN lookup to service a guest fault and the backing +guest_memfd has the GUEST_MEMFD_FLAG_MMAP set, then the fault will always be +consumed from guest_memfd, regardless of whether it is a shared or a private +fault. + See KVM_SET_USER_MEMORY_REGION2 for additional details. 4.143 KVM_PRE_FAULT_MEMORY -- cgit v1.2.3 From e49a6828aba42bfbd4702e0a06aaae6a67f27285 Mon Sep 17 00:00:00 2001 From: Chen Linxuan Date: Tue, 10 Jun 2025 10:11:25 +0800 Subject: doc: fuse: Add max_background and congestion_threshold As I preparing patches adding selftests for fusectl, I notice that documentation of max_background and congestion_threshold is missing. This patch add some descriptions about these two files. Cc: Amir Goldstein Signed-off-by: Chen Linxuan Signed-off-by: Miklos Szeredi --- Documentation/filesystems/fuse.rst | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/fuse.rst b/Documentation/filesystems/fuse.rst index 1e31e87aee68..c589316c8bb3 100644 --- a/Documentation/filesystems/fuse.rst +++ b/Documentation/filesystems/fuse.rst @@ -129,6 +129,20 @@ For each connection the following files exist within this directory: connection. This means that all waiting requests will be aborted an error returned for all aborted and new requests. + max_background + The maximum number of background requests that can be outstanding + at a time. When the number of background requests reaches this limit, + further requests will be blocked until some are completed, potentially + causing I/O operations to stall. + + congestion_threshold + The threshold of background requests at which the kernel considers + the filesystem to be congested. When the number of background requests + exceeds this value, the kernel will skip asynchronous readahead + operations, reducing read-ahead optimizations but preserving essential + I/O, as well as suspending non-synchronous writeback operations + (WB_SYNC_NONE), delaying page cache flushing to the filesystem. + Only the owner of the mount may read or write these files. Interrupting filesystem operations -- cgit v1.2.3 From 6be0ddb20200c0e45c1e7db4b817fccd04d53f2d Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Thu, 12 Jun 2025 10:22:39 +0700 Subject: Documentation: fuse: Consolidate FUSE docs into its own subdirectory All four FUSE docs are currently in upper-level Documentation/filesystems/ directory, but these are distinct as a group of its own. Move them into Documentation/filesystems/fuse/ subdirectory. Signed-off-by: Bagas Sanjaya Acked-by: Jeff Layton Signed-off-by: Miklos Szeredi --- Documentation/filesystems/fuse-io-uring.rst | 99 ----- Documentation/filesystems/fuse-io.rst | 45 --- Documentation/filesystems/fuse-passthrough.rst | 133 ------- Documentation/filesystems/fuse.rst | 440 --------------------- Documentation/filesystems/fuse/fuse-io-uring.rst | 99 +++++ Documentation/filesystems/fuse/fuse-io.rst | 45 +++ .../filesystems/fuse/fuse-passthrough.rst | 133 +++++++ Documentation/filesystems/fuse/fuse.rst | 440 +++++++++++++++++++++ Documentation/filesystems/fuse/index.rst | 14 + Documentation/filesystems/index.rst | 5 +- 10 files changed, 732 insertions(+), 721 deletions(-) delete mode 100644 Documentation/filesystems/fuse-io-uring.rst delete mode 100644 Documentation/filesystems/fuse-io.rst delete mode 100644 Documentation/filesystems/fuse-passthrough.rst delete mode 100644 Documentation/filesystems/fuse.rst create mode 100644 Documentation/filesystems/fuse/fuse-io-uring.rst create mode 100644 Documentation/filesystems/fuse/fuse-io.rst create mode 100644 Documentation/filesystems/fuse/fuse-passthrough.rst create mode 100644 Documentation/filesystems/fuse/fuse.rst create mode 100644 Documentation/filesystems/fuse/index.rst (limited to 'Documentation') diff --git a/Documentation/filesystems/fuse-io-uring.rst b/Documentation/filesystems/fuse-io-uring.rst deleted file mode 100644 index d73dd0dbd238..000000000000 --- a/Documentation/filesystems/fuse-io-uring.rst +++ /dev/null @@ -1,99 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -======================================= -FUSE-over-io-uring design documentation -======================================= - -This documentation covers basic details how the fuse -kernel/userspace communication through io-uring is configured -and works. For generic details about FUSE see fuse.rst. - -This document also covers the current interface, which is -still in development and might change. - -Limitations -=========== -As of now not all requests types are supported through io-uring, userspace -is required to also handle requests through /dev/fuse after io-uring setup -is complete. Specifically notifications (initiated from the daemon side) -and interrupts. - -Fuse io-uring configuration -=========================== - -Fuse kernel requests are queued through the classical /dev/fuse -read/write interface - until io-uring setup is complete. - -In order to set up fuse-over-io-uring fuse-server (user-space) -needs to submit SQEs (opcode = IORING_OP_URING_CMD) to the /dev/fuse -connection file descriptor. Initial submit is with the sub command -FUSE_URING_REQ_REGISTER, which will just register entries to be -available in the kernel. - -Once at least one entry per queue is submitted, kernel starts -to enqueue to ring queues. -Note, every CPU core has its own fuse-io-uring queue. -Userspace handles the CQE/fuse-request and submits the result as -subcommand FUSE_URING_REQ_COMMIT_AND_FETCH - kernel completes -the requests and also marks the entry available again. If there are -pending requests waiting the request will be immediately submitted -to the daemon again. - -Initial SQE ------------:: - - | | FUSE filesystem daemon - | | - | | >io_uring_submit() - | | IORING_OP_URING_CMD / - | | FUSE_URING_CMD_REGISTER - | | [wait cqe] - | | >io_uring_wait_cqe() or - | | >io_uring_submit_and_wait() - | | - | >fuse_uring_cmd() | - | >fuse_uring_register() | - - -Sending requests with CQEs ---------------------------:: - - | | FUSE filesystem daemon - | | [waiting for CQEs] - | "rm /mnt/fuse/file" | - | | - | >sys_unlink() | - | >fuse_unlink() | - | [allocate request] | - | >fuse_send_one() | - | ... | - | >fuse_uring_queue_fuse_req | - | [queue request on fg queue] | - | >fuse_uring_add_req_to_ring_ent() | - | ... | - | >fuse_uring_copy_to_ring() | - | >io_uring_cmd_done() | - | >request_wait_answer() | - | [sleep on req->waitq] | - | | [receives and handles CQE] - | | [submit result and fetch next] - | | >io_uring_submit() - | | IORING_OP_URING_CMD/ - | | FUSE_URING_CMD_COMMIT_AND_FETCH - | >fuse_uring_cmd() | - | >fuse_uring_commit_fetch() | - | >fuse_uring_commit() | - | >fuse_uring_copy_from_ring() | - | [ copy the result to the fuse req] | - | >fuse_uring_req_end() | - | >fuse_request_end() | - | [wake up req->waitq] | - | >fuse_uring_next_fuse_req | - | [wait or handle next req] | - | | - | [req->waitq woken up] | - | s_stack_depth`` and ``fc->max_stack_depth``). -For example, during the ``FUSE_INIT`` handshake, the FUSE daemon can negotiate -the ``max_stack_depth`` it supports. When a backing file is registered via -``FUSE_DEV_IOC_BACKING_OPEN``, the kernel checks if the backing file's -filesystem stack depth is within the allowed limit. - -The ``CAP_SYS_ADMIN`` requirement provides an additional layer of security, -ensuring that only privileged users can create these potentially complex -stacking arrangements. - -General Security Posture ------------------------- - -As a general principle for new kernel features that allow userspace to instruct -the kernel to perform direct operations on its behalf based on user-provided -file descriptors, starting with a higher privilege requirement (like -``CAP_SYS_ADMIN``) is a conservative and common security practice. This allows -the feature to be used and tested while further security implications are -evaluated and addressed. diff --git a/Documentation/filesystems/fuse.rst b/Documentation/filesystems/fuse.rst deleted file mode 100644 index c589316c8bb3..000000000000 --- a/Documentation/filesystems/fuse.rst +++ /dev/null @@ -1,440 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -==== -FUSE -==== - -Definitions -=========== - -Userspace filesystem: - A filesystem in which data and metadata are provided by an ordinary - userspace process. The filesystem can be accessed normally through - the kernel interface. - -Filesystem daemon: - The process(es) providing the data and metadata of the filesystem. - -Non-privileged mount (or user mount): - A userspace filesystem mounted by a non-privileged (non-root) user. - The filesystem daemon is running with the privileges of the mounting - user. NOTE: this is not the same as mounts allowed with the "user" - option in /etc/fstab, which is not discussed here. - -Filesystem connection: - A connection between the filesystem daemon and the kernel. The - connection exists until either the daemon dies, or the filesystem is - umounted. Note that detaching (or lazy umounting) the filesystem - does *not* break the connection, in this case it will exist until - the last reference to the filesystem is released. - -Mount owner: - The user who does the mounting. - -User: - The user who is performing filesystem operations. - -What is FUSE? -============= - -FUSE is a userspace filesystem framework. It consists of a kernel -module (fuse.ko), a userspace library (libfuse.*) and a mount utility -(fusermount). - -One of the most important features of FUSE is allowing secure, -non-privileged mounts. This opens up new possibilities for the use of -filesystems. A good example is sshfs: a secure network filesystem -using the sftp protocol. - -The userspace library and utilities are available from the -`FUSE homepage: `_ - -Filesystem type -=============== - -The filesystem type given to mount(2) can be one of the following: - - fuse - This is the usual way to mount a FUSE filesystem. The first - argument of the mount system call may contain an arbitrary string, - which is not interpreted by the kernel. - - fuseblk - The filesystem is block device based. The first argument of the - mount system call is interpreted as the name of the device. - -Mount options -============= - -fd=N - The file descriptor to use for communication between the userspace - filesystem and the kernel. The file descriptor must have been - obtained by opening the FUSE device ('/dev/fuse'). - -rootmode=M - The file mode of the filesystem's root in octal representation. - -user_id=N - The numeric user id of the mount owner. - -group_id=N - The numeric group id of the mount owner. - -default_permissions - By default FUSE doesn't check file access permissions, the - filesystem is free to implement its access policy or leave it to - the underlying file access mechanism (e.g. in case of network - filesystems). This option enables permission checking, restricting - access based on file mode. It is usually useful together with the - 'allow_other' mount option. - -allow_other - This option overrides the security measure restricting file access - to the user mounting the filesystem. This option is by default only - allowed to root, but this restriction can be removed with a - (userspace) configuration option. - -max_read=N - With this option the maximum size of read operations can be set. - The default is infinite. Note that the size of read requests is - limited anyway to 32 pages (which is 128kbyte on i386). - -blksize=N - Set the block size for the filesystem. The default is 512. This - option is only valid for 'fuseblk' type mounts. - -Control filesystem -================== - -There's a control filesystem for FUSE, which can be mounted by:: - - mount -t fusectl none /sys/fs/fuse/connections - -Mounting it under the '/sys/fs/fuse/connections' directory makes it -backwards compatible with earlier versions. - -Under the fuse control filesystem each connection has a directory -named by a unique number. - -For each connection the following files exist within this directory: - - waiting - The number of requests which are waiting to be transferred to - userspace or being processed by the filesystem daemon. If there is - no filesystem activity and 'waiting' is non-zero, then the - filesystem is hung or deadlocked. - - abort - Writing anything into this file will abort the filesystem - connection. This means that all waiting requests will be aborted an - error returned for all aborted and new requests. - - max_background - The maximum number of background requests that can be outstanding - at a time. When the number of background requests reaches this limit, - further requests will be blocked until some are completed, potentially - causing I/O operations to stall. - - congestion_threshold - The threshold of background requests at which the kernel considers - the filesystem to be congested. When the number of background requests - exceeds this value, the kernel will skip asynchronous readahead - operations, reducing read-ahead optimizations but preserving essential - I/O, as well as suspending non-synchronous writeback operations - (WB_SYNC_NONE), delaying page cache flushing to the filesystem. - -Only the owner of the mount may read or write these files. - -Interrupting filesystem operations -################################## - -If a process issuing a FUSE filesystem request is interrupted, the -following will happen: - - - If the request is not yet sent to userspace AND the signal is - fatal (SIGKILL or unhandled fatal signal), then the request is - dequeued and returns immediately. - - - If the request is not yet sent to userspace AND the signal is not - fatal, then an interrupted flag is set for the request. When - the request has been successfully transferred to userspace and - this flag is set, an INTERRUPT request is queued. - - - If the request is already sent to userspace, then an INTERRUPT - request is queued. - -INTERRUPT requests take precedence over other requests, so the -userspace filesystem will receive queued INTERRUPTs before any others. - -The userspace filesystem may ignore the INTERRUPT requests entirely, -or may honor them by sending a reply to the *original* request, with -the error set to EINTR. - -It is also possible that there's a race between processing the -original request and its INTERRUPT request. There are two possibilities: - - 1. The INTERRUPT request is processed before the original request is - processed - - 2. The INTERRUPT request is processed after the original request has - been answered - -If the filesystem cannot find the original request, it should wait for -some timeout and/or a number of new requests to arrive, after which it -should reply to the INTERRUPT request with an EAGAIN error. In case -1) the INTERRUPT request will be requeued. In case 2) the INTERRUPT -reply will be ignored. - -Aborting a filesystem connection -================================ - -It is possible to get into certain situations where the filesystem is -not responding. Reasons for this may be: - - a) Broken userspace filesystem implementation - - b) Network connection down - - c) Accidental deadlock - - d) Malicious deadlock - -(For more on c) and d) see later sections) - -In either of these cases it may be useful to abort the connection to -the filesystem. There are several ways to do this: - - - Kill the filesystem daemon. Works in case of a) and b) - - - Kill the filesystem daemon and all users of the filesystem. Works - in all cases except some malicious deadlocks - - - Use forced umount (umount -f). Works in all cases but only if - filesystem is still attached (it hasn't been lazy unmounted) - - - Abort filesystem through the FUSE control filesystem. Most - powerful method, always works. - -How do non-privileged mounts work? -================================== - -Since the mount() system call is a privileged operation, a helper -program (fusermount) is needed, which is installed setuid root. - -The implication of providing non-privileged mounts is that the mount -owner must not be able to use this capability to compromise the -system. Obvious requirements arising from this are: - - A) mount owner should not be able to get elevated privileges with the - help of the mounted filesystem - - B) mount owner should not get illegitimate access to information from - other users' and the super user's processes - - C) mount owner should not be able to induce undesired behavior in - other users' or the super user's processes - -How are requirements fulfilled? -=============================== - - A) The mount owner could gain elevated privileges by either: - - 1. creating a filesystem containing a device file, then opening this device - - 2. creating a filesystem containing a suid or sgid application, then executing this application - - The solution is not to allow opening device files and ignore - setuid and setgid bits when executing programs. To ensure this - fusermount always adds "nosuid" and "nodev" to the mount options - for non-privileged mounts. - - B) If another user is accessing files or directories in the - filesystem, the filesystem daemon serving requests can record the - exact sequence and timing of operations performed. This - information is otherwise inaccessible to the mount owner, so this - counts as an information leak. - - The solution to this problem will be presented in point 2) of C). - - C) There are several ways in which the mount owner can induce - undesired behavior in other users' processes, such as: - - 1) mounting a filesystem over a file or directory which the mount - owner could otherwise not be able to modify (or could only - make limited modifications). - - This is solved in fusermount, by checking the access - permissions on the mountpoint and only allowing the mount if - the mount owner can do unlimited modification (has write - access to the mountpoint, and mountpoint is not a "sticky" - directory) - - 2) Even if 1) is solved the mount owner can change the behavior - of other users' processes. - - i) It can slow down or indefinitely delay the execution of a - filesystem operation creating a DoS against the user or the - whole system. For example a suid application locking a - system file, and then accessing a file on the mount owner's - filesystem could be stopped, and thus causing the system - file to be locked forever. - - ii) It can present files or directories of unlimited length, or - directory structures of unlimited depth, possibly causing a - system process to eat up diskspace, memory or other - resources, again causing *DoS*. - - The solution to this as well as B) is not to allow processes - to access the filesystem, which could otherwise not be - monitored or manipulated by the mount owner. Since if the - mount owner can ptrace a process, it can do all of the above - without using a FUSE mount, the same criteria as used in - ptrace can be used to check if a process is allowed to access - the filesystem or not. - - Note that the *ptrace* check is not strictly necessary to - prevent C/2/i, it is enough to check if mount owner has enough - privilege to send signal to the process accessing the - filesystem, since *SIGSTOP* can be used to get a similar effect. - -I think these limitations are unacceptable? -=========================================== - -If a sysadmin trusts the users enough, or can ensure through other -measures, that system processes will never enter non-privileged -mounts, it can relax the last limitation in several ways: - - - With the 'user_allow_other' config option. If this config option is - set, the mounting user can add the 'allow_other' mount option which - disables the check for other users' processes. - - User namespaces have an unintuitive interaction with 'allow_other': - an unprivileged user - normally restricted from mounting with - 'allow_other' - could do so in a user namespace where they're - privileged. If any process could access such an 'allow_other' mount - this would give the mounting user the ability to manipulate - processes in user namespaces where they're unprivileged. For this - reason 'allow_other' restricts access to users in the same userns - or a descendant. - - - With the 'allow_sys_admin_access' module option. If this option is - set, super user's processes have unrestricted access to mounts - irrespective of allow_other setting or user namespace of the - mounting user. - -Note that both of these relaxations expose the system to potential -information leak or *DoS* as described in points B and C/2/i-ii in the -preceding section. - -Kernel - userspace interface -============================ - -The following diagram shows how a filesystem operation (in this -example unlink) is performed in FUSE. :: - - - | "rm /mnt/fuse/file" | FUSE filesystem daemon - | | - | | >sys_read() - | | >fuse_dev_read() - | | >request_wait() - | | [sleep on fc->waitq] - | | - | >sys_unlink() | - | >fuse_unlink() | - | [get request from | - | fc->unused_list] | - | >request_send() | - | [queue req on fc->pending] | - | [wake up fc->waitq] | [woken up] - | >request_wait_answer() | - | [sleep on req->waitq] | - | | pending] - | | [copy req to read buffer] - | | [add req to fc->processing] - | | sys_write() - | | >fuse_dev_write() - | | [look up req in fc->processing] - | | [remove from fc->processing] - | | [copy write buffer to req] - | [woken up] | [wake up req->waitq] - | | unused_list] | - | sys_unlink("/mnt/fuse/file") | - | [acquire inode semaphore | - | for "file"] | - | >fuse_unlink() | - | [sleep on req->waitq] | - | | sys_unlink("/mnt/fuse/file") - | | [acquire inode semaphore - | | for "file"] - | | *DEADLOCK* - -The solution for this is to allow the filesystem to be aborted. - -**Scenario 2 - Tricky deadlock** - - -This one needs a carefully crafted filesystem. It's a variation on -the above, only the call back to the filesystem is not explicit, -but is caused by a pagefault. :: - - | Kamikaze filesystem thread 1 | Kamikaze filesystem thread 2 - | | - | [fd = open("/mnt/fuse/file")] | [request served normally] - | [mmap fd to 'addr'] | - | [close fd] | [FLUSH triggers 'magic' flag] - | [read a byte from addr] | - | >do_page_fault() | - | [find or create page] | - | [lock page] | - | >fuse_readpage() | - | [queue READ request] | - | [sleep on req->waitq] | - | | [read request to buffer] - | | [create reply header before addr] - | | >sys_write(addr - headerlength) - | | >fuse_dev_write() - | | [look up req in fc->processing] - | | [remove from fc->processing] - | | [copy write buffer to req] - | | >do_page_fault() - | | [find or create page] - | | [lock page] - | | * DEADLOCK * - -The solution is basically the same as above. - -An additional problem is that while the write buffer is being copied -to the request, the request must not be interrupted/aborted. This is -because the destination address of the copy may not be valid after the -request has returned. - -This is solved with doing the copy atomically, and allowing abort -while the page(s) belonging to the write buffer are faulted with -get_user_pages(). The 'req->locked' flag indicates when the copy is -taking place, and abort is delayed until this flag is unset. diff --git a/Documentation/filesystems/fuse/fuse-io-uring.rst b/Documentation/filesystems/fuse/fuse-io-uring.rst new file mode 100644 index 000000000000..d73dd0dbd238 --- /dev/null +++ b/Documentation/filesystems/fuse/fuse-io-uring.rst @@ -0,0 +1,99 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======================================= +FUSE-over-io-uring design documentation +======================================= + +This documentation covers basic details how the fuse +kernel/userspace communication through io-uring is configured +and works. For generic details about FUSE see fuse.rst. + +This document also covers the current interface, which is +still in development and might change. + +Limitations +=========== +As of now not all requests types are supported through io-uring, userspace +is required to also handle requests through /dev/fuse after io-uring setup +is complete. Specifically notifications (initiated from the daemon side) +and interrupts. + +Fuse io-uring configuration +=========================== + +Fuse kernel requests are queued through the classical /dev/fuse +read/write interface - until io-uring setup is complete. + +In order to set up fuse-over-io-uring fuse-server (user-space) +needs to submit SQEs (opcode = IORING_OP_URING_CMD) to the /dev/fuse +connection file descriptor. Initial submit is with the sub command +FUSE_URING_REQ_REGISTER, which will just register entries to be +available in the kernel. + +Once at least one entry per queue is submitted, kernel starts +to enqueue to ring queues. +Note, every CPU core has its own fuse-io-uring queue. +Userspace handles the CQE/fuse-request and submits the result as +subcommand FUSE_URING_REQ_COMMIT_AND_FETCH - kernel completes +the requests and also marks the entry available again. If there are +pending requests waiting the request will be immediately submitted +to the daemon again. + +Initial SQE +-----------:: + + | | FUSE filesystem daemon + | | + | | >io_uring_submit() + | | IORING_OP_URING_CMD / + | | FUSE_URING_CMD_REGISTER + | | [wait cqe] + | | >io_uring_wait_cqe() or + | | >io_uring_submit_and_wait() + | | + | >fuse_uring_cmd() | + | >fuse_uring_register() | + + +Sending requests with CQEs +--------------------------:: + + | | FUSE filesystem daemon + | | [waiting for CQEs] + | "rm /mnt/fuse/file" | + | | + | >sys_unlink() | + | >fuse_unlink() | + | [allocate request] | + | >fuse_send_one() | + | ... | + | >fuse_uring_queue_fuse_req | + | [queue request on fg queue] | + | >fuse_uring_add_req_to_ring_ent() | + | ... | + | >fuse_uring_copy_to_ring() | + | >io_uring_cmd_done() | + | >request_wait_answer() | + | [sleep on req->waitq] | + | | [receives and handles CQE] + | | [submit result and fetch next] + | | >io_uring_submit() + | | IORING_OP_URING_CMD/ + | | FUSE_URING_CMD_COMMIT_AND_FETCH + | >fuse_uring_cmd() | + | >fuse_uring_commit_fetch() | + | >fuse_uring_commit() | + | >fuse_uring_copy_from_ring() | + | [ copy the result to the fuse req] | + | >fuse_uring_req_end() | + | >fuse_request_end() | + | [wake up req->waitq] | + | >fuse_uring_next_fuse_req | + | [wait or handle next req] | + | | + | [req->waitq woken up] | + | s_stack_depth`` and ``fc->max_stack_depth``). +For example, during the ``FUSE_INIT`` handshake, the FUSE daemon can negotiate +the ``max_stack_depth`` it supports. When a backing file is registered via +``FUSE_DEV_IOC_BACKING_OPEN``, the kernel checks if the backing file's +filesystem stack depth is within the allowed limit. + +The ``CAP_SYS_ADMIN`` requirement provides an additional layer of security, +ensuring that only privileged users can create these potentially complex +stacking arrangements. + +General Security Posture +------------------------ + +As a general principle for new kernel features that allow userspace to instruct +the kernel to perform direct operations on its behalf based on user-provided +file descriptors, starting with a higher privilege requirement (like +``CAP_SYS_ADMIN``) is a conservative and common security practice. This allows +the feature to be used and tested while further security implications are +evaluated and addressed. diff --git a/Documentation/filesystems/fuse/fuse.rst b/Documentation/filesystems/fuse/fuse.rst new file mode 100644 index 000000000000..0fbd5a03fdc9 --- /dev/null +++ b/Documentation/filesystems/fuse/fuse.rst @@ -0,0 +1,440 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============= +FUSE Overview +============= + +Definitions +=========== + +Userspace filesystem: + A filesystem in which data and metadata are provided by an ordinary + userspace process. The filesystem can be accessed normally through + the kernel interface. + +Filesystem daemon: + The process(es) providing the data and metadata of the filesystem. + +Non-privileged mount (or user mount): + A userspace filesystem mounted by a non-privileged (non-root) user. + The filesystem daemon is running with the privileges of the mounting + user. NOTE: this is not the same as mounts allowed with the "user" + option in /etc/fstab, which is not discussed here. + +Filesystem connection: + A connection between the filesystem daemon and the kernel. The + connection exists until either the daemon dies, or the filesystem is + umounted. Note that detaching (or lazy umounting) the filesystem + does *not* break the connection, in this case it will exist until + the last reference to the filesystem is released. + +Mount owner: + The user who does the mounting. + +User: + The user who is performing filesystem operations. + +What is FUSE? +============= + +FUSE is a userspace filesystem framework. It consists of a kernel +module (fuse.ko), a userspace library (libfuse.*) and a mount utility +(fusermount). + +One of the most important features of FUSE is allowing secure, +non-privileged mounts. This opens up new possibilities for the use of +filesystems. A good example is sshfs: a secure network filesystem +using the sftp protocol. + +The userspace library and utilities are available from the +`FUSE homepage: `_ + +Filesystem type +=============== + +The filesystem type given to mount(2) can be one of the following: + + fuse + This is the usual way to mount a FUSE filesystem. The first + argument of the mount system call may contain an arbitrary string, + which is not interpreted by the kernel. + + fuseblk + The filesystem is block device based. The first argument of the + mount system call is interpreted as the name of the device. + +Mount options +============= + +fd=N + The file descriptor to use for communication between the userspace + filesystem and the kernel. The file descriptor must have been + obtained by opening the FUSE device ('/dev/fuse'). + +rootmode=M + The file mode of the filesystem's root in octal representation. + +user_id=N + The numeric user id of the mount owner. + +group_id=N + The numeric group id of the mount owner. + +default_permissions + By default FUSE doesn't check file access permissions, the + filesystem is free to implement its access policy or leave it to + the underlying file access mechanism (e.g. in case of network + filesystems). This option enables permission checking, restricting + access based on file mode. It is usually useful together with the + 'allow_other' mount option. + +allow_other + This option overrides the security measure restricting file access + to the user mounting the filesystem. This option is by default only + allowed to root, but this restriction can be removed with a + (userspace) configuration option. + +max_read=N + With this option the maximum size of read operations can be set. + The default is infinite. Note that the size of read requests is + limited anyway to 32 pages (which is 128kbyte on i386). + +blksize=N + Set the block size for the filesystem. The default is 512. This + option is only valid for 'fuseblk' type mounts. + +Control filesystem +================== + +There's a control filesystem for FUSE, which can be mounted by:: + + mount -t fusectl none /sys/fs/fuse/connections + +Mounting it under the '/sys/fs/fuse/connections' directory makes it +backwards compatible with earlier versions. + +Under the fuse control filesystem each connection has a directory +named by a unique number. + +For each connection the following files exist within this directory: + + waiting + The number of requests which are waiting to be transferred to + userspace or being processed by the filesystem daemon. If there is + no filesystem activity and 'waiting' is non-zero, then the + filesystem is hung or deadlocked. + + abort + Writing anything into this file will abort the filesystem + connection. This means that all waiting requests will be aborted an + error returned for all aborted and new requests. + + max_background + The maximum number of background requests that can be outstanding + at a time. When the number of background requests reaches this limit, + further requests will be blocked until some are completed, potentially + causing I/O operations to stall. + + congestion_threshold + The threshold of background requests at which the kernel considers + the filesystem to be congested. When the number of background requests + exceeds this value, the kernel will skip asynchronous readahead + operations, reducing read-ahead optimizations but preserving essential + I/O, as well as suspending non-synchronous writeback operations + (WB_SYNC_NONE), delaying page cache flushing to the filesystem. + +Only the owner of the mount may read or write these files. + +Interrupting filesystem operations +################################## + +If a process issuing a FUSE filesystem request is interrupted, the +following will happen: + + - If the request is not yet sent to userspace AND the signal is + fatal (SIGKILL or unhandled fatal signal), then the request is + dequeued and returns immediately. + + - If the request is not yet sent to userspace AND the signal is not + fatal, then an interrupted flag is set for the request. When + the request has been successfully transferred to userspace and + this flag is set, an INTERRUPT request is queued. + + - If the request is already sent to userspace, then an INTERRUPT + request is queued. + +INTERRUPT requests take precedence over other requests, so the +userspace filesystem will receive queued INTERRUPTs before any others. + +The userspace filesystem may ignore the INTERRUPT requests entirely, +or may honor them by sending a reply to the *original* request, with +the error set to EINTR. + +It is also possible that there's a race between processing the +original request and its INTERRUPT request. There are two possibilities: + + 1. The INTERRUPT request is processed before the original request is + processed + + 2. The INTERRUPT request is processed after the original request has + been answered + +If the filesystem cannot find the original request, it should wait for +some timeout and/or a number of new requests to arrive, after which it +should reply to the INTERRUPT request with an EAGAIN error. In case +1) the INTERRUPT request will be requeued. In case 2) the INTERRUPT +reply will be ignored. + +Aborting a filesystem connection +================================ + +It is possible to get into certain situations where the filesystem is +not responding. Reasons for this may be: + + a) Broken userspace filesystem implementation + + b) Network connection down + + c) Accidental deadlock + + d) Malicious deadlock + +(For more on c) and d) see later sections) + +In either of these cases it may be useful to abort the connection to +the filesystem. There are several ways to do this: + + - Kill the filesystem daemon. Works in case of a) and b) + + - Kill the filesystem daemon and all users of the filesystem. Works + in all cases except some malicious deadlocks + + - Use forced umount (umount -f). Works in all cases but only if + filesystem is still attached (it hasn't been lazy unmounted) + + - Abort filesystem through the FUSE control filesystem. Most + powerful method, always works. + +How do non-privileged mounts work? +================================== + +Since the mount() system call is a privileged operation, a helper +program (fusermount) is needed, which is installed setuid root. + +The implication of providing non-privileged mounts is that the mount +owner must not be able to use this capability to compromise the +system. Obvious requirements arising from this are: + + A) mount owner should not be able to get elevated privileges with the + help of the mounted filesystem + + B) mount owner should not get illegitimate access to information from + other users' and the super user's processes + + C) mount owner should not be able to induce undesired behavior in + other users' or the super user's processes + +How are requirements fulfilled? +=============================== + + A) The mount owner could gain elevated privileges by either: + + 1. creating a filesystem containing a device file, then opening this device + + 2. creating a filesystem containing a suid or sgid application, then executing this application + + The solution is not to allow opening device files and ignore + setuid and setgid bits when executing programs. To ensure this + fusermount always adds "nosuid" and "nodev" to the mount options + for non-privileged mounts. + + B) If another user is accessing files or directories in the + filesystem, the filesystem daemon serving requests can record the + exact sequence and timing of operations performed. This + information is otherwise inaccessible to the mount owner, so this + counts as an information leak. + + The solution to this problem will be presented in point 2) of C). + + C) There are several ways in which the mount owner can induce + undesired behavior in other users' processes, such as: + + 1) mounting a filesystem over a file or directory which the mount + owner could otherwise not be able to modify (or could only + make limited modifications). + + This is solved in fusermount, by checking the access + permissions on the mountpoint and only allowing the mount if + the mount owner can do unlimited modification (has write + access to the mountpoint, and mountpoint is not a "sticky" + directory) + + 2) Even if 1) is solved the mount owner can change the behavior + of other users' processes. + + i) It can slow down or indefinitely delay the execution of a + filesystem operation creating a DoS against the user or the + whole system. For example a suid application locking a + system file, and then accessing a file on the mount owner's + filesystem could be stopped, and thus causing the system + file to be locked forever. + + ii) It can present files or directories of unlimited length, or + directory structures of unlimited depth, possibly causing a + system process to eat up diskspace, memory or other + resources, again causing *DoS*. + + The solution to this as well as B) is not to allow processes + to access the filesystem, which could otherwise not be + monitored or manipulated by the mount owner. Since if the + mount owner can ptrace a process, it can do all of the above + without using a FUSE mount, the same criteria as used in + ptrace can be used to check if a process is allowed to access + the filesystem or not. + + Note that the *ptrace* check is not strictly necessary to + prevent C/2/i, it is enough to check if mount owner has enough + privilege to send signal to the process accessing the + filesystem, since *SIGSTOP* can be used to get a similar effect. + +I think these limitations are unacceptable? +=========================================== + +If a sysadmin trusts the users enough, or can ensure through other +measures, that system processes will never enter non-privileged +mounts, it can relax the last limitation in several ways: + + - With the 'user_allow_other' config option. If this config option is + set, the mounting user can add the 'allow_other' mount option which + disables the check for other users' processes. + + User namespaces have an unintuitive interaction with 'allow_other': + an unprivileged user - normally restricted from mounting with + 'allow_other' - could do so in a user namespace where they're + privileged. If any process could access such an 'allow_other' mount + this would give the mounting user the ability to manipulate + processes in user namespaces where they're unprivileged. For this + reason 'allow_other' restricts access to users in the same userns + or a descendant. + + - With the 'allow_sys_admin_access' module option. If this option is + set, super user's processes have unrestricted access to mounts + irrespective of allow_other setting or user namespace of the + mounting user. + +Note that both of these relaxations expose the system to potential +information leak or *DoS* as described in points B and C/2/i-ii in the +preceding section. + +Kernel - userspace interface +============================ + +The following diagram shows how a filesystem operation (in this +example unlink) is performed in FUSE. :: + + + | "rm /mnt/fuse/file" | FUSE filesystem daemon + | | + | | >sys_read() + | | >fuse_dev_read() + | | >request_wait() + | | [sleep on fc->waitq] + | | + | >sys_unlink() | + | >fuse_unlink() | + | [get request from | + | fc->unused_list] | + | >request_send() | + | [queue req on fc->pending] | + | [wake up fc->waitq] | [woken up] + | >request_wait_answer() | + | [sleep on req->waitq] | + | | pending] + | | [copy req to read buffer] + | | [add req to fc->processing] + | | sys_write() + | | >fuse_dev_write() + | | [look up req in fc->processing] + | | [remove from fc->processing] + | | [copy write buffer to req] + | [woken up] | [wake up req->waitq] + | | unused_list] | + | sys_unlink("/mnt/fuse/file") | + | [acquire inode semaphore | + | for "file"] | + | >fuse_unlink() | + | [sleep on req->waitq] | + | | sys_unlink("/mnt/fuse/file") + | | [acquire inode semaphore + | | for "file"] + | | *DEADLOCK* + +The solution for this is to allow the filesystem to be aborted. + +**Scenario 2 - Tricky deadlock** + + +This one needs a carefully crafted filesystem. It's a variation on +the above, only the call back to the filesystem is not explicit, +but is caused by a pagefault. :: + + | Kamikaze filesystem thread 1 | Kamikaze filesystem thread 2 + | | + | [fd = open("/mnt/fuse/file")] | [request served normally] + | [mmap fd to 'addr'] | + | [close fd] | [FLUSH triggers 'magic' flag] + | [read a byte from addr] | + | >do_page_fault() | + | [find or create page] | + | [lock page] | + | >fuse_readpage() | + | [queue READ request] | + | [sleep on req->waitq] | + | | [read request to buffer] + | | [create reply header before addr] + | | >sys_write(addr - headerlength) + | | >fuse_dev_write() + | | [look up req in fc->processing] + | | [remove from fc->processing] + | | [copy write buffer to req] + | | >do_page_fault() + | | [find or create page] + | | [lock page] + | | * DEADLOCK * + +The solution is basically the same as above. + +An additional problem is that while the write buffer is being copied +to the request, the request must not be interrupted/aborted. This is +because the destination address of the copy may not be valid after the +request has returned. + +This is solved with doing the copy atomically, and allowing abort +while the page(s) belonging to the write buffer are faulted with +get_user_pages(). The 'req->locked' flag indicates when the copy is +taking place, and abort is delayed until this flag is unset. diff --git a/Documentation/filesystems/fuse/index.rst b/Documentation/filesystems/fuse/index.rst new file mode 100644 index 000000000000..393a845214da --- /dev/null +++ b/Documentation/filesystems/fuse/index.rst @@ -0,0 +1,14 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================================================== +FUSE (Filesystem in Userspace) Technical Documentation +====================================================== + +.. toctree:: + :maxdepth: 2 + :numbered: + + fuse + fuse-io + fuse-io-uring + fuse-passthrough diff --git a/Documentation/filesystems/index.rst b/Documentation/filesystems/index.rst index 11a599387266..84c5a0d11b6d 100644 --- a/Documentation/filesystems/index.rst +++ b/Documentation/filesystems/index.rst @@ -96,10 +96,7 @@ Documentation for filesystem implementations. hfs hfsplus hpfs - fuse - fuse-io - fuse-io-uring - fuse-passthrough + fuse/index inotify isofs nilfs2 -- cgit v1.2.3 From 4edc575c5582550d0905f39c5e27f1f1f925fffa Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 18 Aug 2025 16:21:39 +0200 Subject: dt-bindings: PCI: Correct example indentation DTS example in the bindings should be indented with 2- or 4-spaces, so correct a mixture of different styles to keep consistent 4-spaces. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250818142138.129327-2-krzysztof.kozlowski@linaro.org --- .../bindings/pci/amd,versal2-mdb-host.yaml | 2 +- .../devicetree/bindings/pci/qcom,pcie-sa8255p.yaml | 80 +++++++++++----------- 2 files changed, 41 insertions(+), 41 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml index 43dc2585c237..80b28c4212df 100644 --- a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml +++ b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml @@ -116,6 +116,6 @@ examples: #address-cells = <0>; #interrupt-cells = <1>; interrupt-controller; - }; + }; }; }; diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8255p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8255p.yaml index ef705a02fcd9..bdddd4f499d1 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8255p.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8255p.yaml @@ -77,46 +77,46 @@ examples: #size-cells = <2>; pci@1c00000 { - compatible = "qcom,pcie-sa8255p"; - reg = <0x4 0x00000000 0 0x10000000>; - device_type = "pci"; - #address-cells = <3>; - #size-cells = <2>; - ranges = <0x02000000 0x0 0x40100000 0x0 0x40100000 0x0 0x1ff00000>, - <0x43000000 0x4 0x10100000 0x4 0x10100000 0x0 0x40000000>; - bus-range = <0x00 0xff>; - dma-coherent; - linux,pci-domain = <0>; - power-domains = <&scmi5_pd 0>; - iommu-map = <0x0 &pcie_smmu 0x0000 0x1>, - <0x100 &pcie_smmu 0x0001 0x1>; - interrupt-parent = <&intc>; - interrupts = , - , - , - , - , - , - , - ; - interrupt-names = "msi0", "msi1", "msi2", "msi3", - "msi4", "msi5", "msi6", "msi7"; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 2 &intc GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 3 &intc GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 4 &intc GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; - - pcie@0 { - device_type = "pci"; - reg = <0x0 0x0 0x0 0x0 0x0>; - bus-range = <0x01 0xff>; - - #address-cells = <3>; - #size-cells = <2>; - ranges; + compatible = "qcom,pcie-sa8255p"; + reg = <0x4 0x00000000 0 0x10000000>; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x02000000 0x0 0x40100000 0x0 0x40100000 0x0 0x1ff00000>, + <0x43000000 0x4 0x10100000 0x4 0x10100000 0x0 0x40000000>; + bus-range = <0x00 0xff>; + dma-coherent; + linux,pci-domain = <0>; + power-domains = <&scmi5_pd 0>; + iommu-map = <0x0 &pcie_smmu 0x0000 0x1>, + <0x100 &pcie_smmu 0x0001 0x1>; + interrupt-parent = <&intc>; + interrupts = , + , + , + , + , + , + , + ; + interrupt-names = "msi0", "msi1", "msi2", "msi3", + "msi4", "msi5", "msi6", "msi7"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; }; }; }; -- cgit v1.2.3 From f315e030a202012a551eb648fa10cd90bd925b20 Mon Sep 17 00:00:00 2001 From: Raphael Gallais-Pou Date: Tue, 26 Aug 2025 13:54:27 +0200 Subject: dt-bindings: panel: lvds: Append ampire,amp19201200b5tzqw-t03 in panel-lvds List Ampire AMP19201200B5TZQW-T03 in the LVDS panel enumeration. Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250826-drm-misc-next-v1-1-980d0a0592b9@foss.st.com Signed-off-by: Raphael Gallais-Pou --- Documentation/devicetree/bindings/display/panel/panel-lvds.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml index fcb5834f799a..f8f95e772778 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml @@ -41,6 +41,8 @@ properties: - enum: # Admatec 9904379 10.1" 1024x600 LVDS panel - admatec,9904379 + # Ampire AMP19201200B5TZQW-T03 10.1" WUXGA (1920x1200) color TFT LCD panel + - ampire,amp19201200b5tzqw-t03 - auo,b101ew05 # AUO G084SN05 V9 8.4" 800x600 LVDS panel - auo,g084sn05 -- cgit v1.2.3 From 272dad3f84004079328e8f36b2292e7297460ffd Mon Sep 17 00:00:00 2001 From: Christian Bruel Date: Wed, 20 Aug 2025 09:54:01 +0200 Subject: Documentation: pinctrl: Describe PM helper functions for standard states. Clarify documentation for predefined standard state names 'default', 'init', 'sleep', 'idle' and their associated PM API. Signed-off-by: Christian Bruel Signed-off-by: Manivannan Sadhasivam Reviewed-by: Linus Walleij Link: https://patch.msgid.link/20250820075411.1178729-2-christian.bruel@foss.st.com --- Documentation/driver-api/pin-control.rst | 57 ++++++++++++++++++++++++++++++-- 1 file changed, 55 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/pin-control.rst b/Documentation/driver-api/pin-control.rst index 27ea1236307e..204cc3e162e2 100644 --- a/Documentation/driver-api/pin-control.rst +++ b/Documentation/driver-api/pin-control.rst @@ -1162,8 +1162,55 @@ pinmux core. Pin control requests from drivers ================================= -When a device driver is about to probe the device core will automatically -attempt to issue ``pinctrl_get_select_default()`` on these devices. +When a device driver is about to probe, the device core attaches the +standard states if they are defined in the device tree by calling +``pinctrl_bind_pins()`` on these devices. +Possible standard state names are: "default", "init", "sleep" and "idle". + +- if ``default`` is defined in the device tree, it is selected before + device probe. + +- if ``init`` and ``default`` are defined in the device tree, the "init" + state is selected before the driver probe and the "default" state is + selected after the driver probe. + +- the ``sleep`` and ``idle`` states are for power management and can only + be selected with the PM API bellow. + +PM interfaces +================= +PM runtime suspend/resume might need to execute the same init sequence as +during probe. Since the predefined states are already attached to the +device, the driver can activate these states explicitly with the +following helper functions: + +- ``pinctrl_pm_select_default_state()`` +- ``pinctrl_pm_select_init_state()`` +- ``pinctrl_pm_select_sleep_state()`` +- ``pinctrl_pm_select_idle_state()`` + +For example, if resuming the device depend on certain pinmux states + +.. code-block:: c + + foo_suspend() + { + /* suspend device */ + ... + + pinctrl_pm_select_sleep_state(dev); + } + + foo_resume() + { + pinctrl_pm_select_init_state(dev); + + /* resuming device */ + ... + + pinctrl_pm_select_default_state(dev); + } + This way driver writers do not need to add any of the boilerplate code of the type found below. However when doing fine-grained state selection and not using the "default" state, you may have to do some device driver @@ -1185,6 +1232,12 @@ operation and going to sleep, moving from the ``PINCTRL_STATE_DEFAULT`` to ``PINCTRL_STATE_SLEEP`` at runtime, re-biasing or even re-muxing pins to save current in sleep mode. +Another case is when the pinctrl needs to switch to a certain mode during +probe and then revert to the default state at the end of probe. For example +a PINMUX may need to be configured as a GPIO during probe. In this case, use +``PINCTRL_STATE_INIT`` to switch state before probe, then move to +``PINCTRL_STATE_DEFAULT`` at the end of probe for normal operation. + A driver may request a certain control state to be activated, usually just the default state like this: -- cgit v1.2.3 From 5ffa3d2f43a487f60e9f6f692aa8e22251446755 Mon Sep 17 00:00:00 2001 From: Christian Bruel Date: Wed, 20 Aug 2025 09:54:03 +0200 Subject: dt-bindings: PCI: Add STM32MP25 PCIe Root Complex bindings Document the bindings for STM32MP25 PCIe Controller configured in root complex mode with one root port. Supports 4 INTx and MSI interrupts from the ARM GICv2m controller. STM32 PCIe may be in a power domain which is the case for the STM32MP25 based boards. Supports WAKE# from wake-gpios Signed-off-by: Christian Bruel Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring (Arm) Acked-by: Manivannan Sadhasivam Link: https://patch.msgid.link/20250820075411.1178729-4-christian.bruel@foss.st.com --- .../bindings/pci/st,stm32-pcie-common.yaml | 33 ++++++ .../bindings/pci/st,stm32-pcie-host.yaml | 112 +++++++++++++++++++++ 2 files changed, 145 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/st,stm32-pcie-common.yaml create mode 100644 Documentation/devicetree/bindings/pci/st,stm32-pcie-host.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/st,stm32-pcie-common.yaml b/Documentation/devicetree/bindings/pci/st,stm32-pcie-common.yaml new file mode 100644 index 000000000000..5adbff259204 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/st,stm32-pcie-common.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/st,stm32-pcie-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STM32MP25 PCIe RC/EP controller + +maintainers: + - Christian Bruel + +description: + STM32MP25 PCIe RC/EP common properties + +properties: + clocks: + maxItems: 1 + description: PCIe system clock + + resets: + maxItems: 1 + + power-domains: + maxItems: 1 + + access-controllers: + maxItems: 1 + +required: + - clocks + - resets + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/pci/st,stm32-pcie-host.yaml b/Documentation/devicetree/bindings/pci/st,stm32-pcie-host.yaml new file mode 100644 index 000000000000..443bfe2cdc98 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/st,stm32-pcie-host.yaml @@ -0,0 +1,112 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/st,stm32-pcie-host.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32MP25 PCIe Root Complex + +maintainers: + - Christian Bruel + +description: + PCIe root complex controller based on the Synopsys DesignWare PCIe core. + +allOf: + - $ref: /schemas/pci/snps,dw-pcie.yaml# + - $ref: /schemas/pci/st,stm32-pcie-common.yaml# + +properties: + compatible: + const: st,stm32mp25-pcie-rc + + reg: + items: + - description: Data Bus Interface (DBI) registers. + - description: PCIe configuration registers. + + reg-names: + items: + - const: dbi + - const: config + + msi-parent: + maxItems: 1 + +patternProperties: + '^pcie@[0-2],0$': + type: object + $ref: /schemas/pci/pci-pci-bridge.yaml# + + properties: + reg: + maxItems: 1 + + phys: + maxItems: 1 + + reset-gpios: + description: GPIO controlled connection to PERST# signal + maxItems: 1 + + wake-gpios: + description: GPIO used as WAKE# input signal + maxItems: 1 + + required: + - phys + - ranges + + unevaluatedProperties: false + +required: + - interrupt-map + - interrupt-map-mask + - ranges + - dma-ranges + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + pcie@48400000 { + compatible = "st,stm32mp25-pcie-rc"; + device_type = "pci"; + reg = <0x48400000 0x400000>, + <0x10000000 0x10000>; + reg-names = "dbi", "config"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc 0 0 GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc 0 0 GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc 0 0 GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x01000000 0x0 0x00000000 0x10010000 0x0 0x10000>, + <0x02000000 0x0 0x10020000 0x10020000 0x0 0x7fe0000>, + <0x42000000 0x0 0x18000000 0x18000000 0x0 0x8000000>; + dma-ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x80000000>; + clocks = <&rcc CK_BUS_PCIE>; + resets = <&rcc PCIE_R>; + msi-parent = <&v2m0>; + access-controllers = <&rifsc 68>; + power-domains = <&CLUSTER_PD>; + + pcie@0,0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + phys = <&combophy PHY_TYPE_PCIE>; + wake-gpios = <&gpioh 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + }; -- cgit v1.2.3 From 6dd0ca9f2dfaab1bd15895bab16e5496632e53b6 Mon Sep 17 00:00:00 2001 From: Krishna Chaitanya Chundru Date: Tue, 26 Aug 2025 16:32:53 +0530 Subject: dt-bindings: PCI: qcom,pcie-sm8550: Add SM8750 compatible PCIe controller present in SM8750 SoC is backwards compatible with the controller present in SM8550 SoC. Hence, add the compatible with SM8550 fallback. Signed-off-by: Krishna Chaitanya Chundru [mani: reworded description] Signed-off-by: Manivannan Sadhasivam Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250826-pakala-v3-1-721627bd5bb0@oss.qualcomm.com --- Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml index dbce671ba011..38b561e23c1f 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml @@ -22,6 +22,7 @@ properties: - enum: - qcom,sar2130p-pcie - qcom,pcie-sm8650 + - qcom,pcie-sm8750 - const: qcom,pcie-sm8550 reg: -- cgit v1.2.3 From c986f7586b8d3381ab0ce764136c3b951c618381 Mon Sep 17 00:00:00 2001 From: Jens Axboe Date: Thu, 7 Aug 2025 14:25:50 -0600 Subject: io_uring/zcrx: add support for IORING_SETUP_CQE_MIXED zcrx currently requires the ring to be set up with fixed 32b CQEs, allow it to use IORING_SETUP_CQE_MIXED as well. Signed-off-by: Jens Axboe --- Documentation/networking/iou-zcrx.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/networking/iou-zcrx.rst b/Documentation/networking/iou-zcrx.rst index 0127319b30bb..54a72e172bdc 100644 --- a/Documentation/networking/iou-zcrx.rst +++ b/Documentation/networking/iou-zcrx.rst @@ -75,7 +75,7 @@ Create an io_uring instance with the following required setup flags:: IORING_SETUP_SINGLE_ISSUER IORING_SETUP_DEFER_TASKRUN - IORING_SETUP_CQE32 + IORING_SETUP_CQE32 or IORING_SETUP_CQE_MIXED Create memory area ------------------ -- cgit v1.2.3 From 01479d140686430ce51d01dc4ad4548323bd1232 Mon Sep 17 00:00:00 2001 From: Kathara Sasikumar Date: Tue, 19 Aug 2025 21:19:58 +0000 Subject: Documentation/gpu/amdgpu: Fix duplicate word in driver-core.rst Remove duplicate word 'and' in driver-core.rst. Signed-off-by: Kathara Sasikumar Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/driver-core.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/driver-core.rst b/Documentation/gpu/amdgpu/driver-core.rst index 81256318e93c..bd4be32f2725 100644 --- a/Documentation/gpu/amdgpu/driver-core.rst +++ b/Documentation/gpu/amdgpu/driver-core.rst @@ -65,7 +65,7 @@ SDMA (System DMA) GC (Graphics and Compute) This is the graphics and compute engine, i.e., the block that - encompasses the 3D pipeline and and shader blocks. This is by far the + encompasses the 3D pipeline and shader blocks. This is by far the largest block on the GPU. The 3D pipeline has tons of sub-blocks. In addition to that, it also contains the CP microcontrollers (ME, PFP, CE, MEC) and the RLC microcontroller. It's exposed to userspace for user mode -- cgit v1.2.3 From cbf3a5d67a5bcae620b5315e4891f8c3e939bc79 Mon Sep 17 00:00:00 2001 From: Rakuram Eswaran Date: Thu, 21 Aug 2025 08:29:55 +0530 Subject: docs: gpu: amdgpu: Fix spelling in amdgpu documentation Fixed following typos reported by Codespell 1. propogated ==> propagated aperatures ==> apertures In Documentation/gpu/amdgpu/debugfs.rst 2. parition ==> partition In Documentation/gpu/amdgpu/process-isolation.rst 3. conections ==> connections In Documentation/gpu/amdgpu/display/programming-model-dcn.rst In addition to above, Fixed wrong bit-partition naming in gpu/amdgpu/process-isolation.rst from "fourth" partition to "third" partition. Reviewed-by: Randy Dunlap Suggested-by: Randy Dunlap Suggested-by: Alexander Deucher Signed-off-by: Rakuram Eswaran Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/debugfs.rst | 4 ++-- Documentation/gpu/amdgpu/display/programming-model-dcn.rst | 2 +- Documentation/gpu/amdgpu/process-isolation.rst | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/debugfs.rst b/Documentation/gpu/amdgpu/debugfs.rst index 5150d0a95658..151d8bfc79e2 100644 --- a/Documentation/gpu/amdgpu/debugfs.rst +++ b/Documentation/gpu/amdgpu/debugfs.rst @@ -94,7 +94,7 @@ amdgpu_error_ ------------------- Provides an interface to set an error code on the dma fences associated with -ring . The error code specified is propogated to all fences associated +ring . The error code specified is propagated to all fences associated with the ring. Use this to inject a fence error into a ring. amdgpu_pm_info @@ -165,7 +165,7 @@ GTT memory. amdgpu_regs_* ------------- -Provides direct access to various register aperatures on the GPU. Used +Provides direct access to various register apertures on the GPU. Used by tools like UMR to access GPU registers. amdgpu_regs2 diff --git a/Documentation/gpu/amdgpu/display/programming-model-dcn.rst b/Documentation/gpu/amdgpu/display/programming-model-dcn.rst index c1b48d49fb0b..bc7de97a746f 100644 --- a/Documentation/gpu/amdgpu/display/programming-model-dcn.rst +++ b/Documentation/gpu/amdgpu/display/programming-model-dcn.rst @@ -100,7 +100,7 @@ represents the connected display. For historical reasons, we used the name `dc_link`, which gives the wrong impression that this abstraction only deals with physical connections that the developer can easily manipulate. However, this also covers - conections like eDP or cases where the output is connected to other devices. + connections like eDP or cases where the output is connected to other devices. There are two structs that are not represented in the diagram since they were elaborated in the DCN overview page (check the DCN block diagram :ref:`Display diff --git a/Documentation/gpu/amdgpu/process-isolation.rst b/Documentation/gpu/amdgpu/process-isolation.rst index 6b6d70e357a7..25b06ffefc33 100644 --- a/Documentation/gpu/amdgpu/process-isolation.rst +++ b/Documentation/gpu/amdgpu/process-isolation.rst @@ -26,7 +26,7 @@ Example of enabling enforce isolation on a GPU with multiple partitions: $ cat /sys/class/drm/card0/device/enforce_isolation 1 0 1 0 -The output indicates that enforce isolation is enabled on zeroth and second parition and disabled on first and fourth parition. +The output indicates that enforce isolation is enabled on zeroth and second partition and disabled on first and third partition. For devices with a single partition or those that do not support partitions, there will be only one element: -- cgit v1.2.3 From 4bc6bf7b8830cc403a3cea7f4ef8794831126f54 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Wed, 20 Aug 2025 11:34:27 +0700 Subject: Documentation: f2fs: Separate errors mode subtable errors=%s subtable is shown in htmldocs output as long-running paragraph instead due to missing separator from its previous paragraph. Add it. Fixes: b62e71be2110 ("f2fs: support errors=remount-ro|continue|panic mountoption") Signed-off-by: Bagas Sanjaya Reviewed-by: Chao Yu Signed-off-by: Jaegeuk Kim --- Documentation/filesystems/f2fs.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/f2fs.rst b/Documentation/filesystems/f2fs.rst index e06cbb823bb7..acae1ce0f069 100644 --- a/Documentation/filesystems/f2fs.rst +++ b/Documentation/filesystems/f2fs.rst @@ -360,6 +360,7 @@ errors=%s Specify f2fs behavior on critical errors. This supports modes: panic immediately, continue without doing anything, and remount the partition in read-only mode. By default it uses "continue" mode. + ====================== =============== =============== ======== mode continue remount-ro panic ====================== =============== =============== ======== -- cgit v1.2.3 From f23044152af2614c6fddfa9d975ac1f293b58729 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Wed, 20 Aug 2025 11:34:28 +0700 Subject: Documentation: f2fs: Format compression level subtable Format compression_algorithm subtable as reST table as it does the semantic job rather than normal paragraph. Signed-off-by: Bagas Sanjaya Reviewed-by: Chao Yu Signed-off-by: Jaegeuk Kim --- Documentation/filesystems/f2fs.rst | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/f2fs.rst b/Documentation/filesystems/f2fs.rst index acae1ce0f069..41fa95b779e9 100644 --- a/Documentation/filesystems/f2fs.rst +++ b/Documentation/filesystems/f2fs.rst @@ -294,9 +294,13 @@ compress_algorithm=%s Control compress algorithm, currently f2fs supports "lzo" "lz4", "zstd" and "lzo-rle" algorithm. compress_algorithm=%s:%d Control compress algorithm and its compress level, now, only "lz4" and "zstd" support compress level config. + + ========= =========== algorithm level range + ========= =========== lz4 3 - 16 zstd 1 - 22 + ========= =========== compress_log_size=%u Support configuring compress cluster size. The size will be 4KB * (1 << %u). The default and minimum sizes are 16KB. compress_extension=%s Support adding specified extension, so that f2fs can enable -- cgit v1.2.3 From f9c97e496293e50f9131196c26f94d29b2d6451d Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Wed, 20 Aug 2025 11:34:29 +0700 Subject: Documentation: f2fs: Span write hint table section rows Write hint policy table has two rows which act as section rows: buffered io and direct io, yet these rows are written as normal rows instead. Column-span them. Signed-off-by: Bagas Sanjaya Reviewed-by: Chao Yu Signed-off-by: Jaegeuk Kim --- Documentation/filesystems/f2fs.rst | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/f2fs.rst b/Documentation/filesystems/f2fs.rst index 41fa95b779e9..2e1ee10e8c60 100644 --- a/Documentation/filesystems/f2fs.rst +++ b/Documentation/filesystems/f2fs.rst @@ -822,11 +822,13 @@ ioctl(COLD) COLD_DATA WRITE_LIFE_EXTREME extension list " " -- buffered io +------------------------------------------------------------------ N/A COLD_DATA WRITE_LIFE_EXTREME N/A HOT_DATA WRITE_LIFE_SHORT N/A WARM_DATA WRITE_LIFE_NOT_SET -- direct io +------------------------------------------------------------------ WRITE_LIFE_EXTREME COLD_DATA WRITE_LIFE_EXTREME WRITE_LIFE_SHORT HOT_DATA WRITE_LIFE_SHORT WRITE_LIFE_NOT_SET WARM_DATA WRITE_LIFE_NOT_SET -- cgit v1.2.3 From f4f36fffd8722d801d2bdacefe98d62d33f85537 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Wed, 20 Aug 2025 11:34:30 +0700 Subject: Documentation: f2fs: Wrap snippets in literal code blocks Compression mode code and device aliasing shell snippets are shown in htmldocs output as long-running paragraph instead. Wrap them. Fixes: 602a16d58e9a ("f2fs: add compress_mode mount option") Fixes: 128d333f0dff ("f2fs: introduce device aliasing file") Signed-off-by: Bagas Sanjaya Reviewed-by: Chao Yu Signed-off-by: Jaegeuk Kim --- Documentation/filesystems/f2fs.rst | 64 +++++++++++++++++++------------------- 1 file changed, 32 insertions(+), 32 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/f2fs.rst b/Documentation/filesystems/f2fs.rst index 2e1ee10e8c60..673ca35b6639 100644 --- a/Documentation/filesystems/f2fs.rst +++ b/Documentation/filesystems/f2fs.rst @@ -953,15 +953,15 @@ target file and the timing. The user can do manual compression/decompression on compression enabled files using F2FS_IOC_DECOMPRESS_FILE and F2FS_IOC_COMPRESS_FILE ioctls like the below. -To decompress a file, +To decompress a file:: -fd = open(filename, O_WRONLY, 0); -ret = ioctl(fd, F2FS_IOC_DECOMPRESS_FILE); + fd = open(filename, O_WRONLY, 0); + ret = ioctl(fd, F2FS_IOC_DECOMPRESS_FILE); -To compress a file, +To compress a file:: -fd = open(filename, O_WRONLY, 0); -ret = ioctl(fd, F2FS_IOC_COMPRESS_FILE); + fd = open(filename, O_WRONLY, 0); + ret = ioctl(fd, F2FS_IOC_COMPRESS_FILE); NVMe Zoned Namespace devices ---------------------------- @@ -991,32 +991,32 @@ reserved and used by another filesystem or for different purposes. Once that external usage is complete, the device aliasing file can be deleted, releasing the reserved space back to F2FS for its own use. - - -# ls /dev/vd* -/dev/vdb (32GB) /dev/vdc (32GB) -# mkfs.ext4 /dev/vdc -# mkfs.f2fs -c /dev/vdc@vdc.file /dev/vdb -# mount /dev/vdb /mnt/f2fs -# ls -l /mnt/f2fs -vdc.file -# df -h -/dev/vdb 64G 33G 32G 52% /mnt/f2fs - -# mount -o loop /dev/vdc /mnt/ext4 -# df -h -/dev/vdb 64G 33G 32G 52% /mnt/f2fs -/dev/loop7 32G 24K 30G 1% /mnt/ext4 -# umount /mnt/ext4 - -# f2fs_io getflags /mnt/f2fs/vdc.file -get a flag on /mnt/f2fs/vdc.file ret=0, flags=nocow(pinned),immutable -# f2fs_io setflags noimmutable /mnt/f2fs/vdc.file -get a flag on noimmutable ret=0, flags=800010 -set a flag on /mnt/f2fs/vdc.file ret=0, flags=noimmutable -# rm /mnt/f2fs/vdc.file -# df -h -/dev/vdb 64G 753M 64G 2% /mnt/f2fs +.. code-block:: + + # ls /dev/vd* + /dev/vdb (32GB) /dev/vdc (32GB) + # mkfs.ext4 /dev/vdc + # mkfs.f2fs -c /dev/vdc@vdc.file /dev/vdb + # mount /dev/vdb /mnt/f2fs + # ls -l /mnt/f2fs + vdc.file + # df -h + /dev/vdb 64G 33G 32G 52% /mnt/f2fs + + # mount -o loop /dev/vdc /mnt/ext4 + # df -h + /dev/vdb 64G 33G 32G 52% /mnt/f2fs + /dev/loop7 32G 24K 30G 1% /mnt/ext4 + # umount /mnt/ext4 + + # f2fs_io getflags /mnt/f2fs/vdc.file + get a flag on /mnt/f2fs/vdc.file ret=0, flags=nocow(pinned),immutable + # f2fs_io setflags noimmutable /mnt/f2fs/vdc.file + get a flag on noimmutable ret=0, flags=800010 + set a flag on /mnt/f2fs/vdc.file ret=0, flags=noimmutable + # rm /mnt/f2fs/vdc.file + # df -h + /dev/vdb 64G 753M 64G 2% /mnt/f2fs So, the key idea is, user can do any file operations on /dev/vdc, and reclaim the space after the use, while the space is counted as /data. -- cgit v1.2.3 From e7822326887897922fda6ba2f8540290cd373ee3 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Wed, 20 Aug 2025 11:34:31 +0700 Subject: Documentation: f2fs: Indent compression_mode option list Indent description text so that compression_mode numbered list gets rendered as such in htmldocs output. Signed-off-by: Bagas Sanjaya Reviewed-by: Chao Yu Signed-off-by: Jaegeuk Kim --- Documentation/filesystems/f2fs.rst | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/f2fs.rst b/Documentation/filesystems/f2fs.rst index 673ca35b6639..83479d2147c3 100644 --- a/Documentation/filesystems/f2fs.rst +++ b/Documentation/filesystems/f2fs.rst @@ -944,14 +944,16 @@ compression enabled files (refer to "Compression implementation" section for how enable compression on a regular inode). 1) compress_mode=fs -This is the default option. f2fs does automatic compression in the writeback of the -compression enabled files. + + This is the default option. f2fs does automatic compression in the writeback of the + compression enabled files. 2) compress_mode=user -This disables the automatic compression and gives the user discretion of choosing the -target file and the timing. The user can do manual compression/decompression on the -compression enabled files using F2FS_IOC_DECOMPRESS_FILE and F2FS_IOC_COMPRESS_FILE -ioctls like the below. + + This disables the automatic compression and gives the user discretion of choosing the + target file and the timing. The user can do manual compression/decompression on the + compression enabled files using F2FS_IOC_DECOMPRESS_FILE and F2FS_IOC_COMPRESS_FILE + ioctls like the below. To decompress a file:: -- cgit v1.2.3 From 62242ac510614761c1af644d056c2aedf639f479 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Wed, 20 Aug 2025 11:34:32 +0700 Subject: Documentation: f2fs: Reword title "What is F2FS" is rather a mistitle for the whole f2fs docs, as it implies the overview section (before "Background and design issues" section) and the docs covers beyond that: from mount options to filesystem implementation details. Retitle and add explicit overview section. Signed-off-by: Bagas Sanjaya Reviewed-by: Chao Yu Signed-off-by: Jaegeuk Kim --- Documentation/filesystems/f2fs.rst | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/f2fs.rst b/Documentation/filesystems/f2fs.rst index 83479d2147c3..a8d02fe5be83 100644 --- a/Documentation/filesystems/f2fs.rst +++ b/Documentation/filesystems/f2fs.rst @@ -1,8 +1,11 @@ .. SPDX-License-Identifier: GPL-2.0 -========================================== -WHAT IS Flash-Friendly File System (F2FS)? -========================================== +================================= +Flash-Friendly File System (F2FS) +================================= + +Overview +======== NAND flash memory-based storage devices, such as SSD, eMMC, and SD cards, have been equipped on a variety systems ranging from mobile to server systems. Since -- cgit v1.2.3 From 40fb9751ccc6e2ad450a2b938d7c8583a34d4a56 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 26 Aug 2025 11:17:36 -0300 Subject: dt-bindings: nfc: ti,trf7970a: Restrict the ti,rx-gain-reduction-db values Instead of stating the supported values for the ti,rx-gain-reduction-db property in free text format, add an enum entry that can help validating the devicetree files. Signed-off-by: Fabio Estevam Acked-by: Conor Dooley Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250826141736.712827-1-festevam@gmail.com Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml b/Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml index 783a85b84893..7e96a625f0cf 100644 --- a/Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml +++ b/Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml @@ -58,7 +58,8 @@ properties: ti,rx-gain-reduction-db: description: | Specify an RX gain reduction to reduce antenna sensitivity with 5dB per - increment, with a maximum of 15dB. Supported values: [0, 5, 10, 15]. + increment, with a maximum of 15dB. + enum: [ 0, 5, 10, 15] required: - compatible -- cgit v1.2.3 From 1e50201d3911507744adf5dafd6e25dbffee3692 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 21 Aug 2025 10:32:40 +0200 Subject: dt-bindings: ata: highbank: Minor whitespace cleanup in example The DTS code coding style expects exactly one space around '=' character. Signed-off-by: Krzysztof Kozlowski Acked-by: Andre Przywara Signed-off-by: Damien Le Moal --- Documentation/devicetree/bindings/ata/sata_highbank.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ata/sata_highbank.yaml b/Documentation/devicetree/bindings/ata/sata_highbank.yaml index f23f26a8f21c..48bdca0f5577 100644 --- a/Documentation/devicetree/bindings/ata/sata_highbank.yaml +++ b/Documentation/devicetree/bindings/ata/sata_highbank.yaml @@ -85,7 +85,7 @@ examples: dma-coherent; calxeda,port-phys = <&combophy5 0>, <&combophy0 0>, <&combophy0 1>, <&combophy0 2>, <&combophy0 3>; - calxeda,sgpio-gpio =<&gpioh 5 1>, <&gpioh 6 1>, <&gpioh 7 1>; + calxeda,sgpio-gpio = <&gpioh 5 1>, <&gpioh 6 1>, <&gpioh 7 1>; calxeda,led-order = <4 0 1 2 3>; calxeda,tx-atten = <0xff 22 0xff 0xff 23>; calxeda,pre-clocks = <10>; -- cgit v1.2.3 From 692173de3032b22792d21070238a986163fc29ec Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 23 Aug 2025 16:50:21 -0300 Subject: dt-bindings: ata: imx: Document 'target-supply' The 'target-supply' property is used by some i.MX devicetree files. Document it to fix the following dt-schema warning: 'target-supply' does not match any of the regexes: '^pinctrl-[0-9]+$' Signed-off-by: Fabio Estevam Acked-by: Conor Dooley Signed-off-by: Damien Le Moal --- Documentation/devicetree/bindings/ata/imx-sata.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ata/imx-sata.yaml b/Documentation/devicetree/bindings/ata/imx-sata.yaml index f4eb3550a096..31c43374763a 100644 --- a/Documentation/devicetree/bindings/ata/imx-sata.yaml +++ b/Documentation/devicetree/bindings/ata/imx-sata.yaml @@ -80,6 +80,9 @@ properties: power-domains: maxItems: 1 + target-supply: + description: Power regulator for the SATA target device. + required: - compatible - reg -- cgit v1.2.3 From d939047d31ff25a49a39667417c2a996caa826f5 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Wed, 27 Aug 2025 16:44:01 -0400 Subject: dt-bindings: Remove outdated cpufreq-dt.txt The information present in this file is outdated and doesn't serve any purpose with the current design of the driver. Remove the outdated file. Signed-off-by: Frank Li [ Viresh: Rewrite commit log ] Signed-off-by: Viresh Kumar --- .../devicetree/bindings/cpufreq/cpufreq-dt.txt | 61 ---------------------- 1 file changed, 61 deletions(-) delete mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-dt.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-dt.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-dt.txt deleted file mode 100644 index 1d7e49167666..000000000000 --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-dt.txt +++ /dev/null @@ -1,61 +0,0 @@ -Generic cpufreq driver - -It is a generic DT based cpufreq driver for frequency management. It supports -both uniprocessor (UP) and symmetric multiprocessor (SMP) systems which share -clock and voltage across all CPUs. - -Both required and optional properties listed below must be defined -under node /cpus/cpu@0. - -Required properties: -- None - -Optional properties: -- operating-points: Refer to Documentation/devicetree/bindings/opp/opp-v1.yaml for - details. OPPs *must* be supplied either via DT, i.e. this property, or - populated at runtime. -- clock-latency: Specify the possible maximum transition latency for clock, - in unit of nanoseconds. -- voltage-tolerance: Specify the CPU voltage tolerance in percentage. -- #cooling-cells: - Please refer to - Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml. - -Examples: - -cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - compatible = "arm,cortex-a9"; - reg = <0>; - next-level-cache = <&L2>; - operating-points = < - /* kHz uV */ - 792000 1100000 - 396000 950000 - 198000 850000 - >; - clock-latency = <61036>; /* two CLK32 periods */ - #cooling-cells = <2>; - }; - - cpu@1 { - compatible = "arm,cortex-a9"; - reg = <1>; - next-level-cache = <&L2>; - }; - - cpu@2 { - compatible = "arm,cortex-a9"; - reg = <2>; - next-level-cache = <&L2>; - }; - - cpu@3 { - compatible = "arm,cortex-a9"; - reg = <3>; - next-level-cache = <&L2>; - }; -}; -- cgit v1.2.3 From 7cb4d28e1195da9ebcdd5c2296af2fe3baad5421 Mon Sep 17 00:00:00 2001 From: Piotr Kubik Date: Tue, 26 Aug 2025 14:41:44 +0000 Subject: dt-bindings: net: pse-pd: Add bindings for Si3474 PSE controller Add the Si3474 I2C Power Sourcing Equipment controller device tree bindings documentation. Signed-off-by: Piotr Kubik Reviewed-by: Krzysztof Kozlowski Reviewed-by: Kory Maincent Link: https://patch.msgid.link/71a67c6f-6fce-49c7-96ec-554602dbd4f1@adtran.com Signed-off-by: Paolo Abeni --- .../bindings/net/pse-pd/skyworks,si3474.yaml | 144 +++++++++++++++++++++ 1 file changed, 144 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/pse-pd/skyworks,si3474.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/pse-pd/skyworks,si3474.yaml b/Documentation/devicetree/bindings/net/pse-pd/skyworks,si3474.yaml new file mode 100644 index 000000000000..edd36a43a387 --- /dev/null +++ b/Documentation/devicetree/bindings/net/pse-pd/skyworks,si3474.yaml @@ -0,0 +1,144 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/pse-pd/skyworks,si3474.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Skyworks Si3474 Power Sourcing Equipment controller + +maintainers: + - Piotr Kubik + +allOf: + - $ref: pse-controller.yaml# + +properties: + compatible: + enum: + - skyworks,si3474 + + reg: + maxItems: 2 + + reg-names: + items: + - const: main + - const: secondary + + channels: + description: The Si3474 is a single-chip PoE PSE controller managing + 8 physical power delivery channels. Internally, it's structured + into two logical "Quads". + Quad 0 Manages physical channels ('ports' in datasheet) 0, 1, 2, 3 + Quad 1 Manages physical channels ('ports' in datasheet) 4, 5, 6, 7. + + type: object + additionalProperties: false + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + patternProperties: + '^channel@[0-7]$': + type: object + additionalProperties: false + + properties: + reg: + maxItems: 1 + + required: + - reg + + required: + - "#address-cells" + - "#size-cells" + +required: + - compatible + - reg + - pse-pis + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-pse@26 { + compatible = "skyworks,si3474"; + reg-names = "main", "secondary"; + reg = <0x26>, <0x27>; + + channels { + #address-cells = <1>; + #size-cells = <0>; + phys0_0: channel@0 { + reg = <0>; + }; + phys0_1: channel@1 { + reg = <1>; + }; + phys0_2: channel@2 { + reg = <2>; + }; + phys0_3: channel@3 { + reg = <3>; + }; + phys0_4: channel@4 { + reg = <4>; + }; + phys0_5: channel@5 { + reg = <5>; + }; + phys0_6: channel@6 { + reg = <6>; + }; + phys0_7: channel@7 { + reg = <7>; + }; + }; + pse-pis { + #address-cells = <1>; + #size-cells = <0>; + pse_pi0: pse-pi@0 { + reg = <0>; + #pse-cells = <0>; + pairset-names = "alternative-a", "alternative-b"; + pairsets = <&phys0_0>, <&phys0_1>; + polarity-supported = "MDI-X", "S"; + vpwr-supply = <®_pse>; + }; + pse_pi1: pse-pi@1 { + reg = <1>; + #pse-cells = <0>; + pairset-names = "alternative-a", "alternative-b"; + pairsets = <&phys0_2>, <&phys0_3>; + polarity-supported = "MDI-X", "S"; + vpwr-supply = <®_pse>; + }; + pse_pi2: pse-pi@2 { + reg = <2>; + #pse-cells = <0>; + pairset-names = "alternative-a", "alternative-b"; + pairsets = <&phys0_4>, <&phys0_5>; + polarity-supported = "MDI-X", "S"; + vpwr-supply = <®_pse>; + }; + pse_pi3: pse-pi@3 { + reg = <3>; + #pse-cells = <0>; + pairset-names = "alternative-a", "alternative-b"; + pairsets = <&phys0_6>, <&phys0_7>; + polarity-supported = "MDI-X", "S"; + vpwr-supply = <®_pse>; + }; + }; + }; + }; -- cgit v1.2.3 From 2b036b13c8c2cadf7a27036f911ec99742504fce Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Fri, 22 Aug 2025 14:39:45 +0800 Subject: dt-bindings: display: rockchip: Add schema for RK3588 DPTX Controller The Rockchip RK3588 SoC integrates the Synopsys DesignWare DPTX controller. And this DPTX controller need share a USBDP PHY with the USB 3.0 OTG controller during operation. Signed-off-by: Andy Yan Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250822063959.692098-2-andyshrk@163.com Signed-off-by: Dmitry Baryshkov --- .../bindings/display/rockchip/rockchip,dw-dp.yaml | 150 +++++++++++++++++++++ 1 file changed, 150 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml new file mode 100644 index 000000000000..a8a008717997 --- /dev/null +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml @@ -0,0 +1,150 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-dp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip DW DisplayPort Transmitter + +maintainers: + - Andy Yan + +description: | + The Rockchip RK3588 SoC integrates the Synopsys DesignWare DPTX controller + which is compliant with the DisplayPort Specification Version 1.4 with the + following features: + + * DisplayPort 1.4a + * Main Link: 1/2/4 lanes + * Main Link Support 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps + * AUX channel 1Mbps + * Single Stream Transport(SST) + * Multistream Transport (MST) + * Type-C support (alternate mode) + * HDCP 2.2, HDCP 1.3 + * Supports up to 8/10 bits per color component + * Supports RBG, YCbCr4:4:4, YCbCr4:2:2, YCbCr4:2:0 + * Pixel clock up to 594MHz + * I2S, SPDIF audio interface + +allOf: + - $ref: /schemas/sound/dai-common.yaml# + +properties: + compatible: + enum: + - rockchip,rk3588-dp + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Peripheral/APB bus clock + - description: DisplayPort AUX clock + - description: HDCP clock + - description: I2S interface clock + - description: SPDIF interfce clock + + clock-names: + items: + - const: apb + - const: aux + - const: hdcp + - const: i2s + - const: spdif + + phys: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Video port for RGB/YUV input. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Video port for DP output. + + required: + - port@0 + - port@1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + "#sound-dai-cells": + const: 0 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - phys + - ports + - resets + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + dp@fde50000 { + compatible = "rockchip,rk3588-dp"; + reg = <0x0 0xfde50000 0x0 0x4000>; + interrupts = ; + clocks = <&cru PCLK_DP0>, <&cru CLK_AUX16M_0>, + <&cru CLK_DP0>, <&cru MCLK_I2S4_8CH_TX>, + <&cru MCLK_SPDIF2_DP0>; + clock-names = "apb", "aux", "hdcp", "i2s", "spdif"; + assigned-clocks = <&cru CLK_AUX16M_0>; + assigned-clock-rates = <16000000>; + resets = <&cru SRST_DP0>; + phys = <&usbdp_phy0 PHY_TYPE_DP>; + power-domains = <&power RK3588_PD_VO0>; + #sound-dai-cells = <0>; + + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dp0_in_vp2: endpoint { + remote-endpoint = <&vp2_out_dp0>; + }; + }; + + port@1 { + reg = <1>; + + dp0_out_con0: endpoint { + remote-endpoint = <&dp_con0_in>; + }; + }; + }; + }; + }; -- cgit v1.2.3 From 806d4fec0b80be6964b69947aad928a322fe77e4 Mon Sep 17 00:00:00 2001 From: Raphael Gallais-Pou Date: Fri, 22 Aug 2025 16:34:10 +0200 Subject: dt-bindings: display: st: add two new compatibles to LTDC device The new STMicroelectronics SoC features a display controller similar to the one used in previous SoCs. Because there is additional registers, and different mandatory clocks it is incompatible with existing IPs. On STM32MP251, the device only needs two clocks while on STM32MP255 it needs four. Add the new names to the list of compatible string and handle each quirks accordingly. Acked-by: Philippe Cornu Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-1-9c825e28f733@foss.st.com Signed-off-by: Raphael Gallais-Pou --- .../devicetree/bindings/display/st,stm32-ltdc.yaml | 52 +++++++++++++++++++++- 1 file changed, 50 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml b/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml index d6ea4d62a2cf..1233345a1630 100644 --- a/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml +++ b/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml @@ -12,7 +12,10 @@ maintainers: properties: compatible: - const: st,stm32-ltdc + enum: + - st,stm32-ltdc + - st,stm32mp251-ltdc + - st,stm32mp255-ltdc reg: maxItems: 1 @@ -24,11 +27,16 @@ properties: minItems: 1 clocks: - maxItems: 1 + minItems: 1 + maxItems: 4 clock-names: items: - const: lcd + - const: bus + - const: ref + - const: lvds + minItems: 1 resets: maxItems: 1 @@ -51,6 +59,46 @@ required: - resets - port +allOf: + - if: + properties: + compatible: + contains: + enum: + - st,stm32-ltdc + then: + properties: + clocks: + maxItems: 1 + clock-names: + maxItems: 1 + - if: + properties: + compatible: + contains: + enum: + - st,stm32mp251-ltdc + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + minItems: 2 + maxItems: 2 + - if: + properties: + compatible: + contains: + enum: + - st,stm32mp255-ltdc + then: + properties: + clocks: + minItems: 4 + clock-names: + minItems: 4 + additionalProperties: false examples: -- cgit v1.2.3 From 81d678332c404384e5e83300376d9be375f6d928 Mon Sep 17 00:00:00 2001 From: Raphael Gallais-Pou Date: Fri, 22 Aug 2025 16:34:11 +0200 Subject: dt-bindings: display: st,stm32-ltdc: add access-controllers property access-controllers is an optional property that allows a peripheral to refer to one or more domain access controller(s). This property is added when the peripheral is under the STM32 firewall controller. It allows an accurate representation of the hardware, where the peripheral is connected to a firewall bus. The firewall can then check the peripheral accesses before allowing its device to probe. Acked-by: Rob Herring (Arm) Acked-by: Yannick Fertre Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-2-9c825e28f733@foss.st.com Signed-off-by: Raphael Gallais-Pou --- Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml b/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml index 1233345a1630..77058a5ccf68 100644 --- a/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml +++ b/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml @@ -41,6 +41,9 @@ properties: resets: maxItems: 1 + access-controllers: + maxItems: 1 + port: $ref: /schemas/graph.yaml#/properties/port description: | -- cgit v1.2.3 From 6b96ffeb81be8e43da7c4ddd0802739e22459519 Mon Sep 17 00:00:00 2001 From: Raphael Gallais-Pou Date: Fri, 22 Aug 2025 16:34:12 +0200 Subject: dt-bindings: display: st: add new compatible to LVDS device Update the compatible to accept both "st,stm32mp255-lvds" and st,stm32mp25-lvds" respectively. Default will fall back to "st,stm32mp25-lvds". Acked-by: Krzysztof Kozlowski Acked-by: Yannick Fertre Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-3-9c825e28f733@foss.st.com Signed-off-by: Raphael Gallais-Pou --- Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml b/Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml index 6736f93256b5..74e61d95370c 100644 --- a/Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml +++ b/Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml @@ -31,7 +31,12 @@ description: | properties: compatible: - const: st,stm32mp25-lvds + oneOf: + - items: + - enum: + - st,stm32mp255-lvds + - const: st,stm32mp25-lvds + - const: st,stm32mp25-lvds "#clock-cells": const: 0 -- cgit v1.2.3 From 922e28eec67390686d944d03a12068df1197b393 Mon Sep 17 00:00:00 2001 From: Raphael Gallais-Pou Date: Fri, 22 Aug 2025 16:34:13 +0200 Subject: dt-bindings: display: st,stm32mp25-lvds: add access-controllers property access-controllers is an optional property that allows a peripheral to refer to one or more domain access controller(s). This property is added when the peripheral is under the STM32 firewall controller. It allows an accurate representation of the hardware, where the peripheral is connected to a firewall bus. The firewall can then check the peripheral accesses before allowing its device to probe. Acked-by: Rob Herring (Arm) Acked-by: Yannick Fertre Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-4-9c825e28f733@foss.st.com Signed-off-by: Raphael Gallais-Pou --- Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml b/Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml index 74e61d95370c..05a73bbc246a 100644 --- a/Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml +++ b/Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml @@ -59,6 +59,9 @@ properties: resets: maxItems: 1 + access-controllers: + maxItems: 1 + ports: $ref: /schemas/graph.yaml#/properties/ports -- cgit v1.2.3 From 08f6613e274f6cfe4d7d09ac5050d632dbba9342 Mon Sep 17 00:00:00 2001 From: Raphael Gallais-Pou Date: Fri, 22 Aug 2025 16:34:14 +0200 Subject: dt-bindings: display: st,stm32mp25-lvds: add power-domains property STM32 LVDS peripheral may be in a power domain. Allow an optional single 'power-domains' entry for STM32 LVDS devices. Acked-by: Rob Herring (Arm) Acked-by: Yannick Fertre Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-5-9c825e28f733@foss.st.com Signed-off-by: Raphael Gallais-Pou --- Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml b/Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml index 05a73bbc246a..14e042156179 100644 --- a/Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml +++ b/Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml @@ -62,6 +62,9 @@ properties: access-controllers: maxItems: 1 + power-domains: + maxItems: 1 + ports: $ref: /schemas/graph.yaml#/properties/ports -- cgit v1.2.3 From 1b9482f8dfce82af44e261c78777a37f32efe889 Mon Sep 17 00:00:00 2001 From: Raphael Gallais-Pou Date: Fri, 22 Aug 2025 16:34:15 +0200 Subject: dt-bindings: arm: stm32: add required #clock-cells property On STM32MP25 SoC, the syscfg peripheral provides a clock to the display subsystem through a multiplexer. Since it only provides a single clock, the cell value is 0. Doing so allows the clock consumers to reach the peripheral and gate the clock accordingly. Reviewed-by: Rob Herring (Arm) Reviewed-by: Yannick Fertre Acked-by: Christophe Roullier Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-6-9c825e28f733@foss.st.com Signed-off-by: Raphael Gallais-Pou --- .../bindings/arm/stm32/st,stm32-syscon.yaml | 31 +++++++++++++++------- 1 file changed, 21 insertions(+), 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml index ed97652c8492..95d2319afe23 100644 --- a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml @@ -36,20 +36,31 @@ properties: clocks: maxItems: 1 + "#clock-cells": + const: 0 + required: - compatible - reg -if: - properties: - compatible: - contains: - enum: - - st,stm32mp157-syscfg - - st,stm32f4-gcan -then: - required: - - clocks +allOf: + - if: + properties: + compatible: + contains: + enum: + - st,stm32mp157-syscfg + - st,stm32f4-gcan + then: + required: + - clocks + - if: + properties: + compatible: + const: st,stm32mp25-syscfg + then: + required: + - "#clock-cells" additionalProperties: false -- cgit v1.2.3 From 57a48a2619c5f99d48748f9c34db510efe5ee7c9 Mon Sep 17 00:00:00 2001 From: Jan Kiszka Date: Mon, 28 Jul 2025 10:36:56 +0800 Subject: dt-bindings: PCI: ti,am65: Extend for use with PVU The Peripheral Virtualization Unit (PVU) on the AM65 SoC is capable of restricting DMA from PCIe devices to specific regions of host memory. Add the optional property "memory-regions" to point to such regions of memory when PVU is used. Since the PVU deals with system physical addresses, utilizing the PVU with PCIe devices also requires setting up the VMAP registers to map the Requester ID of the PCIe device to the CBA Virtual ID, which in turn is mapped to the system physical address. Hence, describe the VMAP registers which are optional unless the PVU shall be used for PCIe. Signed-off-by: Jan Kiszka Signed-off-by: Li Hua Qian [mani: Expanded PVU in description] Signed-off-by: Manivannan Sadhasivam Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250728023701.116963-3-huaqian.li@siemens.com --- .../devicetree/bindings/pci/ti,am65-pci-host.yaml | 28 +++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml index 0a9d10532cc8..98f6c7f1b1a6 100644 --- a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml @@ -20,14 +20,18 @@ properties: - ti,keystone-pcie reg: - maxItems: 4 + minItems: 4 + maxItems: 6 reg-names: + minItems: 4 items: - const: app - const: dbics - const: config - const: atu + - const: vmap_lp + - const: vmap_hp interrupts: maxItems: 1 @@ -69,6 +73,15 @@ properties: items: pattern: '^pcie-phy[0-1]$' + memory-region: + maxItems: 1 + description: | + phandle to a restricted DMA pool to be used for all devices behind + this controller. The regions should be defined according to + reserved-memory/shared-dma-pool.yaml. + Note that enforcement via the PVU will only be available to + ti,am654-pcie-rc devices. + required: - compatible - reg @@ -89,6 +102,13 @@ then: - power-domains - msi-map - num-viewport +else: + properties: + reg: + maxItems: 4 + + reg-names: + maxItems: 4 unevaluatedProperties: false @@ -104,8 +124,10 @@ examples: reg = <0x5500000 0x1000>, <0x5501000 0x1000>, <0x10000000 0x2000>, - <0x5506000 0x1000>; - reg-names = "app", "dbics", "config", "atu"; + <0x5506000 0x1000>, + <0x2900000 0x1000>, + <0x2908000 0x1000>; + reg-names = "app", "dbics", "config", "atu", "vmap_lp", "vmap_hp"; power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>; #address-cells = <3>; #size-cells = <2>; -- cgit v1.2.3 From 4fab69dd1fa52e28bb692afcb159fa8807d6d03f Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Wed, 27 Aug 2025 19:03:44 +0100 Subject: dt-bindings: cache: ax45mp: add 2048 as a supported cache-sets value The QiLai implementation of this cache controller uses a cache-sets of 2048, and mandates it in an if/else block - but the definition of the property only permits 1024. Add 2048 as an option, and deny its use outside of the QiLai. Fixes: 51b081cdb9237 ("dt-bindings: cache: add QiLai compatible to ax45mp") Reviewed-by: Ben Zong-You Xie Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml index 4de5bb2e5f24..b135ffa4ab6b 100644 --- a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml +++ b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml @@ -47,7 +47,7 @@ properties: const: 2 cache-sets: - const: 1024 + enum: [1024, 2048] cache-size: enum: [131072, 262144, 524288, 1048576, 2097152] @@ -81,6 +81,10 @@ allOf: const: 2048 cache-size: const: 2097152 + else: + properties: + cache-sets: + const: 1024 examples: - | -- cgit v1.2.3 From 86d39a046b59583675a8c9701acc86c02768a433 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sat, 28 Jun 2025 06:02:35 +0300 Subject: dt-bindings: display/msm/gpu: account for 7xx GPUs in clocks conditions Handle two cases for Adreno 7xx: - Adreno 702 follows A610 and A619 example and has clocks in the GPU node. - Newer 7xx GPUs use a different pattern for the compatibles and did not match currently. Signed-off-by: Dmitry Baryshkov Acked-by: Konrad Dybcio Acked-by: Rob Herring (Arm) Patchwork: https://patchwork.freedesktop.org/patch/661351/ Link: https://lore.kernel.org/r/20250628-rework-msm-gpu-schema-v1-1-89f818c51b6a@oss.qualcomm.com --- Documentation/devicetree/bindings/display/msm/gpu.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index 6ddc72fd85b0..97254f909260 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -187,6 +187,7 @@ allOf: enum: - qcom,adreno-610.0 - qcom,adreno-619.1 + - qcom,adreno-07000200 then: properties: clocks: @@ -222,7 +223,9 @@ allOf: properties: compatible: contains: - pattern: '^qcom,adreno-[67][0-9][0-9]\.[0-9]+$' + oneOf: + - pattern: '^qcom,adreno-[67][0-9][0-9]\.[0-9]+$' + - pattern: '^qcom,adreno-[0-9a-f]{8}$' then: # Starting with A6xx, the clocks are usually defined in the GMU node properties: -- cgit v1.2.3 From cef3a60b30d1697ac796cf22f41531c916329db1 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sat, 28 Jun 2025 06:02:36 +0300 Subject: dt-bindings: display/msm/gpu: describe alwayson clock Adreno A506 and A510 have one extra clock, alwayson. Describe it in the schema. Signed-off-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Patchwork: https://patchwork.freedesktop.org/patch/661352/ Link: https://lore.kernel.org/r/20250628-rework-msm-gpu-schema-v1-2-89f818c51b6a@oss.qualcomm.com --- Documentation/devicetree/bindings/display/msm/gpu.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index 97254f909260..af43527188ce 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -173,6 +173,8 @@ allOf: description: GPU RBBM Timer for Adreno 5xx series - const: rbcpr description: GPU RB Core Power Reduction clock + - const: alwayson + description: GPU AON clock minItems: 2 maxItems: 7 -- cgit v1.2.3 From f3b649d7a513f71a31c451bd0825657211366d7f Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sat, 28 Jun 2025 06:02:37 +0300 Subject: dt-bindings: display/msm/gpu: describe clocks for each Adreno GPU type Rather than having a single list with all possible clocks for A3xx-A5xx define individual Adreno GPU types and corresponding clock lists. Signed-off-by: Dmitry Baryshkov Reviewed-by: Rob Herring (Arm) Patchwork: https://patchwork.freedesktop.org/patch/661348/ Link: https://lore.kernel.org/r/20250628-rework-msm-gpu-schema-v1-3-89f818c51b6a@oss.qualcomm.com --- .../devicetree/bindings/display/msm/gpu.yaml | 220 ++++++++++++++++++--- 1 file changed, 194 insertions(+), 26 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index af43527188ce..7ef80f9fac8b 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -146,41 +146,209 @@ allOf: properties: compatible: contains: - pattern: '^qcom,adreno-[3-5][0-9][0-9]\.[0-9]+$' + oneOf: + - pattern: '^qcom,adreno-305\.[0-9]+$' + - pattern: '^qcom,adreno-330\.[0-9]+$' + then: + properties: + clocks: + minItems: 3 + maxItems: 3 + clock-names: + items: + - const: core + description: GPU Core clock + - const: iface + description: GPU Interface clock + - const: mem_iface + description: GPU Memory Interface clock + - if: + properties: + compatible: + contains: + pattern: '^qcom,adreno-306\.[0-9]+$' then: properties: clocks: - minItems: 2 - maxItems: 7 + minItems: 5 + maxItems: 6 + clock-names: + oneOf: + - items: + - const: core + description: GPU Core clock + - const: iface + description: GPU Interface clock + - const: mem_iface + description: GPU Memory Interface clock + - const: alt_mem_iface + description: GPU Alternative Memory Interface clock + - const: gfx3d + description: GPU 3D engine clock + - items: + - const: core + description: GPU Core clock + - const: iface + description: GPU Interface clock + - const: mem + description: GPU Memory clock + - const: mem_iface + description: GPU Memory Interface clock + - const: alt_mem_iface + description: GPU Alternative Memory Interface clock + - const: gfx3d + description: GPU 3D engine clock + - if: + properties: + compatible: + contains: + pattern: '^qcom,adreno-320\.[0-9]+$' + then: + properties: + clocks: + minItems: 4 + maxItems: 4 clock-names: items: - anyOf: - - const: core - description: GPU Core clock - - const: iface - description: GPU Interface clock - - const: mem - description: GPU Memory clock - - const: mem_iface - description: GPU Memory Interface clock - - const: alt_mem_iface - description: GPU Alternative Memory Interface clock - - const: gfx3d - description: GPU 3D engine clock - - const: rbbmtimer - description: GPU RBBM Timer for Adreno 5xx series - - const: rbcpr - description: GPU RB Core Power Reduction clock - - const: alwayson - description: GPU AON clock - minItems: 2 + - const: core + description: GPU Core clock + - const: iface + description: GPU Interface clock + - const: mem + description: GPU Memory clock + - const: mem_iface + description: GPU Memory Interface clock + + - if: + properties: + compatible: + contains: + pattern: '^qcom,adreno-405\.[0-9]+$' + then: + properties: + clocks: + minItems: 7 maxItems: 7 + clock-names: + items: + - const: core + description: GPU Core clock + - const: iface + description: GPU Interface clock + - const: mem + description: GPU Memory clock + - const: mem_iface + description: GPU Memory Interface clock + - const: alt_mem_iface + description: GPU Alternative Memory Interface clock + - const: gfx3d + description: GPU 3D engine clock + - const: rbbmtimer + description: GPU RBBM Timer for Adreno 5xx series - required: - - clocks - - clock-names + - if: + properties: + compatible: + contains: + pattern: '^qcom,adreno-506\.[0-9]+$' + then: + properties: + clocks: + minItems: 6 + maxItems: 6 + clock-names: + items: + - const: core + description: GPU Core clock + - const: iface + description: GPU Interface clock + - const: mem_iface + description: GPU Memory Interface clock + - const: alt_mem_iface + description: GPU Alternative Memory Interface clock + - const: rbbmtimer + description: GPU RBBM Timer for Adreno 5xx series + - const: alwayson + description: GPU AON clock + + - if: + properties: + compatible: + contains: + oneOf: + - pattern: '^qcom,adreno-508\.[0-9]+$' + - pattern: '^qcom,adreno-509\.[0-9]+$' + - pattern: '^qcom,adreno-512\.[0-9]+$' + - pattern: '^qcom,adreno-540\.[0-9]+$' + then: + properties: + clocks: + minItems: 6 + maxItems: 6 + clock-names: + items: + - const: iface + description: GPU Interface clock + - const: rbbmtimer + description: GPU RBBM Timer for Adreno 5xx series + - const: mem + description: GPU Memory clock + - const: mem_iface + description: GPU Memory Interface clock + - const: rbcpr + description: GPU RB Core Power Reduction clock + - const: core + description: GPU Core clock + + - if: + properties: + compatible: + contains: + pattern: '^qcom,adreno-510\.[0-9]+$' + then: + properties: + clocks: + minItems: 6 + maxItems: 6 + clock-names: + items: + - const: core + description: GPU Core clock + - const: iface + description: GPU Interface clock + - const: mem + description: GPU Memory clock + - const: mem_iface + description: GPU Memory Interface clock + - const: rbbmtimer + description: GPU RBBM Timer for Adreno 5xx series + - const: alwayson + description: GPU AON clock + + - if: + properties: + compatible: + contains: + pattern: '^qcom,adreno-530\.[0-9]+$' + then: + properties: + clocks: + minItems: 5 + maxItems: 5 + clock-names: + items: + - const: core + description: GPU Core clock + - const: iface + description: GPU Interface clock + - const: rbbmtimer + description: GPU RBBM Timer for Adreno 5xx series + - const: mem + description: GPU Memory clock + - const: mem_iface + description: GPU Memory Interface clock - if: properties: -- cgit v1.2.3 From 505441083afb9dde61d6b82bfa9d7cc6ad331e77 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 4 Jul 2025 19:31:53 +0300 Subject: dt-bindings: display/msm: dsi-controller-main: add SC8180X Describe the SC8180X-specific compatible for the DSI controller persent on the SoC. While the current DT for SC8180X doesn't use this compatible, all other platforms were updated to have one. This change makes SC8180X follow the lead. Signed-off-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Patchwork: https://patchwork.freedesktop.org/patch/662495/ Link: https://lore.kernel.org/r/20250704-mdss-schema-v1-1-e978e4e73e14@oss.qualcomm.com --- Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml index d4bb65c660af..4400d4cce072 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -27,6 +27,7 @@ properties: - qcom,sar2130p-dsi-ctrl - qcom,sc7180-dsi-ctrl - qcom,sc7280-dsi-ctrl + - qcom,sc8180x-dsi-ctrl - qcom,sdm660-dsi-ctrl - qcom,sdm670-dsi-ctrl - qcom,sdm845-dsi-ctrl @@ -332,6 +333,7 @@ allOf: - qcom,sar2130p-dsi-ctrl - qcom,sc7180-dsi-ctrl - qcom,sc7280-dsi-ctrl + - qcom,sc8180x-dsi-ctrl - qcom,sdm845-dsi-ctrl - qcom,sm6115-dsi-ctrl - qcom,sm6125-dsi-ctrl -- cgit v1.2.3 From 275af16d7294e7f8a36370f274d3aa9dd01ad76a Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 4 Jul 2025 19:31:54 +0300 Subject: dt-bindings: display/msm: describe DPU on SC8180X Describe the Display Processing Unit (DPU) as present on the SC8180X platform. Reported-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Rob Herring (Arm) Patchwork: https://patchwork.freedesktop.org/patch/662502/ Link: https://lore.kernel.org/r/20250704-mdss-schema-v1-2-e978e4e73e14@oss.qualcomm.com --- .../bindings/display/msm/qcom,sc8180x-dpu.yaml | 103 +++++++++++++++++++++ 1 file changed, 103 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc8180x-dpu.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc8180x-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc8180x-dpu.yaml new file mode 100644 index 000000000000..a411126708b8 --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc8180x-dpu.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/qcom,sc8180x-dpu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SC8180X Display DPU + +maintainers: + - Dmitry Baryshkov + +$ref: /schemas/display/msm/dpu-common.yaml# + +properties: + compatible: + const: qcom,sc8180x-dpu + + reg: + items: + - description: Address offset and size for mdp register set + - description: Address offset and size for vbif register set + + reg-names: + items: + - const: mdp + - const: vbif + + clocks: + items: + - description: Display AHB clock + - description: Display HF AXI clock + - description: Display core clock + - description: Display vsync clock + - description: Display rotator clock + - description: Display LUT clock + + clock-names: + items: + - const: iface + - const: bus + - const: core + - const: vsync + - const: rot + - const: lut + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + display-controller@ae01000 { + compatible = "qcom,sc8180x-dpu"; + reg = <0x0ae01000 0x8f000>, + <0x0aeb0000 0x2008>; + reg-names = "mdp", "vbif"; + + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&gcc GCC_DISP_HF_AXI_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>, + <&dispcc DISP_CC_MDSS_VSYNC_CLK>, + <&dispcc DISP_CC_MDSS_ROT_CLK>, + <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>; + clock-names = "iface", + "bus", + "core", + "vsync", + "rot", + "lut"; + + assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + assigned-clock-rates = <19200000>; + + operating-points-v2 = <&mdp_opp_table>; + power-domains = <&rpmhpd SC8180X_MMCX>; + + interrupt-parent = <&mdss>; + interrupts = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + + port@1 { + reg = <1>; + endpoint { + remote-endpoint = <&dsi1_in>; + }; + }; + }; + }; +... -- cgit v1.2.3 From fd5c9b3c99da614a71119fce1848e66650a6633f Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 4 Jul 2025 19:31:55 +0300 Subject: dt-bindings: display/msm: describe MDSS on SC8180X Describe the Mobile Display SubSystem (MDSS) unit as present on the SC8180X platform. Reported-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Rob Herring (Arm) Patchwork: https://patchwork.freedesktop.org/patch/662498/ Link: https://lore.kernel.org/r/20250704-mdss-schema-v1-3-e978e4e73e14@oss.qualcomm.com --- .../bindings/display/msm/qcom,sc8180x-mdss.yaml | 359 +++++++++++++++++++++ 1 file changed, 359 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc8180x-mdss.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc8180x-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc8180x-mdss.yaml new file mode 100644 index 000000000000..00e82bdbbcc7 --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc8180x-mdss.yaml @@ -0,0 +1,359 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/qcom,sc8180x-mdss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SC8180X Display MDSS + +maintainers: + - Dmitry Baryshkov + +description: + Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates + sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree + bindings of MDSS are mentioned for SC8180X target. + +$ref: /schemas/display/msm/mdss-common.yaml# + +properties: + compatible: + items: + - const: qcom,sc8180x-mdss + + clocks: + items: + - description: Display AHB clock from gcc + - description: Display hf axi clock + - description: Display sf axi clock + - description: Display core clock + + clock-names: + items: + - const: iface + - const: bus + - const: nrt_bus + - const: core + + iommus: + maxItems: 1 + + interconnects: + maxItems: 3 + + interconnect-names: + maxItems: 3 + +patternProperties: + "^display-controller@[0-9a-f]+$": + type: object + additionalProperties: true + + properties: + compatible: + const: qcom,sc8180x-dpu + + "^displayport-controller@[0-9a-f]+$": + type: object + additionalProperties: true + + properties: + compatible: + enum: + - qcom,sc8180x-dp + - qcom,sc8180x-edp + + "^dsi@[0-9a-f]+$": + type: object + additionalProperties: true + + properties: + compatible: + contains: + const: qcom,sc8180x-dsi-ctrl + + "^phy@[0-9a-f]+$": + type: object + additionalProperties: true + + properties: + compatible: + const: qcom,dsi-phy-7nm + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #include + + display-subsystem@ae00000 { + compatible = "qcom,sc8180x-mdss"; + reg = <0x0ae00000 0x1000>; + reg-names = "mdss"; + + interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>, + <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>, + <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_DISPLAY_CFG>; + interconnect-names = "mdp0-mem", + "mdp1-mem", + "cpu-cfg"; + + power-domains = <&dispcc MDSS_GDSC>; + + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&gcc GCC_DISP_HF_AXI_CLK>, + <&gcc GCC_DISP_SF_AXI_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>; + clock-names = "iface", "bus", "nrt_bus", "core"; + + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + + iommus = <&apps_smmu 0x800 0x420>; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + display-controller@ae01000 { + compatible = "qcom,sc8180x-dpu"; + reg = <0x0ae01000 0x8f000>, + <0x0aeb0000 0x2008>; + reg-names = "mdp", "vbif"; + + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&gcc GCC_DISP_HF_AXI_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>, + <&dispcc DISP_CC_MDSS_VSYNC_CLK>, + <&dispcc DISP_CC_MDSS_ROT_CLK>, + <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>; + clock-names = "iface", + "bus", + "core", + "vsync", + "rot", + "lut"; + + assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + assigned-clock-rates = <19200000>; + + operating-points-v2 = <&mdp_opp_table>; + power-domains = <&rpmhpd SC8180X_MMCX>; + + interrupt-parent = <&mdss>; + interrupts = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dpu_intf1_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + + port@1 { + reg = <1>; + dpu_intf2_out: endpoint { + remote-endpoint = <&dsi1_in>; + }; + }; + }; + + mdp_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-171428571 { + opp-hz = /bits/ 64 <171428571>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-345000000 { + opp-hz = /bits/ 64 <345000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-460000000 { + opp-hz = /bits/ 64 <460000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + + dsi@ae94000 { + compatible = "qcom,sc8180x-dsi-ctrl", + "qcom,mdss-dsi-ctrl"; + reg = <0x0ae94000 0x400>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <4>; + + clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, + <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, + <&dispcc DISP_CC_MDSS_PCLK0_CLK>, + <&dispcc DISP_CC_MDSS_ESC0_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&gcc GCC_DISP_HF_AXI_CLK>; + clock-names = "byte", + "byte_intf", + "pixel", + "core", + "iface", + "bus"; + + assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, + <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; + assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>; + + operating-points-v2 = <&dsi_opp_table>; + power-domains = <&rpmhpd SC8180X_MMCX>; + + phys = <&dsi0_phy>; + phy-names = "dsi"; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi0_in: endpoint { + remote-endpoint = <&dpu_intf1_out>; + }; + }; + + port@1 { + reg = <1>; + dsi0_out: endpoint { + }; + }; + }; + + dsi_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-187500000 { + opp-hz = /bits/ 64 <187500000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-358000000 { + opp-hz = /bits/ 64 <358000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + }; + }; + + dsi0_phy: phy@ae94400 { + compatible = "qcom,dsi-phy-7nm"; + reg = <0x0ae94400 0x200>, + <0x0ae94600 0x280>, + <0x0ae94900 0x260>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "ref"; + vdds-supply = <&vreg_dsi_phy>; + }; + + dsi@ae96000 { + compatible = "qcom,sc8180x-dsi-ctrl", + "qcom,mdss-dsi-ctrl"; + reg = <0x0ae96000 0x400>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <5>; + + clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, + <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, + <&dispcc DISP_CC_MDSS_PCLK1_CLK>, + <&dispcc DISP_CC_MDSS_ESC1_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&gcc GCC_DISP_HF_AXI_CLK>; + clock-names = "byte", + "byte_intf", + "pixel", + "core", + "iface", + "bus"; + + assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, + <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>; + assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>; + + operating-points-v2 = <&dsi_opp_table>; + power-domains = <&rpmhpd SC8180X_MMCX>; + + phys = <&dsi1_phy>; + phy-names = "dsi"; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi1_in: endpoint { + remote-endpoint = <&dpu_intf2_out>; + }; + }; + + port@1 { + reg = <1>; + dsi1_out: endpoint { + }; + }; + }; + }; + + dsi1_phy: phy@ae96400 { + compatible = "qcom,dsi-phy-7nm"; + reg = <0x0ae96400 0x200>, + <0x0ae96600 0x280>, + <0x0ae96900 0x260>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "ref"; + vdds-supply = <&vreg_dsi_phy>; + }; + }; +... -- cgit v1.2.3 From 20c0989283564d662dcc4c77252a60b1812b32ca Mon Sep 17 00:00:00 2001 From: Nathan Chancellor Date: Thu, 21 Aug 2025 14:15:38 -0700 Subject: kbuild: Bump minimum version of LLVM for building the kernel to 15.0.0 s390 and x86 have required LLVM 15 since 30d17fac6aae ("scripts/min-tool-version.sh: raise minimum clang version to 15.0.0 for s390") 7861640aac52 ("x86/build: Raise the minimum LLVM version to 15.0.0") respectively but most other architectures allow LLVM 13.0.1 or newer. In accordance with the recent minimum supported version of GCC bump that happened in 118c40b7b503 ("kbuild: require gcc-8 and binutils-2.30") do the same for LLVM to 15.0.0. Of the supported releases of Arch Linux, Debian, Fedora, and OpenSUSE surveyed in evaluating this bump, this only leaves behind Debian Bookworm (14.0.6) and Ubuntu Jammy (14.0.0). Debian Trixie has 19.1.7 and Ubuntu Noble has 18.1.3 (so there are viable upgrade paths) or users can use apt.llvm.org, which provides even newer packages for those distributions. Reviewed-by: Kees Cook Acked-by: Arnd Bergmann Acked-by: Nicolas Schier Link: https://lore.kernel.org/r/20250821-bump-min-llvm-ver-15-v2-1-635f3294e5f0@kernel.org Signed-off-by: Nathan Chancellor --- Documentation/process/changes.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/process/changes.rst b/Documentation/process/changes.rst index bccfa19b45df..b38622b0d525 100644 --- a/Documentation/process/changes.rst +++ b/Documentation/process/changes.rst @@ -30,7 +30,7 @@ you probably needn't concern yourself with pcmciautils. Program Minimal version Command to check the version ====================== =============== ======================================== GNU C 8.1 gcc --version -Clang/LLVM (optional) 13.0.1 clang --version +Clang/LLVM (optional) 15.0.0 clang --version Rust (optional) 1.78.0 rustc --version bindgen (optional) 0.65.1 bindgen --version GNU make 4.0 make --version -- cgit v1.2.3 From 2b0bff8c69d73cc33fc74c1e197f58ff9c7fd8c2 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 18 Jul 2025 13:24:06 +0200 Subject: dt-bindings: soc: xilinx: Add support for K24, KR260 and KD240 CCs The commit 7a4c31ee877a ("arm64: zynqmp: Add support for Xilinx Kria SOM board") has added support for k26 and kv260 and the commit dbcd27526e6a ("dt-bindings: soc: xilinx: Add support for KV260 CC") has added support for KV260 and this is follow up patch for adding description for k24 SOM, KR260 (robotics platform) and KD240 (driver platform). The bootflow is the same that's why for more information please take a look at above commits. The KD240 kit is based on smaller k24 SOM with only 2GB of memory. Reviewed-by: Rob Herring (Arm) Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/8ff66d0dc4e0de6f239c25d43a2a96b4224305e8.1752837842.git.michal.simek@amd.com --- .../devicetree/bindings/soc/xilinx/xilinx.yaml | 81 ++++++++++++++++++++++ 1 file changed, 81 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml b/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml index fb5c39c79d28..c9f99e0df2b3 100644 --- a/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml +++ b/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml @@ -116,6 +116,36 @@ properties: - const: xlnx,zynqmp-zcu111 - const: xlnx,zynqmp + - description: Xilinx Kria SOMs K24 + minItems: 3 + items: + enum: + - xlnx,zynqmp-sm-k24-rev1 + - xlnx,zynqmp-sm-k24-revB + - xlnx,zynqmp-sm-k24-revA + - xlnx,zynqmp-sm-k24 + - xlnx,zynqmp + allOf: + - contains: + const: xlnx,zynqmp + - contains: + const: xlnx,zynqmp-sm-k24 + + - description: Xilinx Kria SOMs K24 (starter) + minItems: 3 + items: + enum: + - xlnx,zynqmp-smk-k24-rev1 + - xlnx,zynqmp-smk-k24-revB + - xlnx,zynqmp-smk-k24-revA + - xlnx,zynqmp-smk-k24 + - xlnx,zynqmp + allOf: + - contains: + const: xlnx,zynqmp + - contains: + const: xlnx,zynqmp-smk-k24 + - description: Xilinx Kria SOMs minItems: 3 items: @@ -148,6 +178,57 @@ properties: - contains: const: xlnx,zynqmp-smk-k26 + - description: Xilinx Kria SOM KD240 revA/B/1 + minItems: 3 + items: + enum: + - xlnx,zynqmp-sk-kd240-rev1 + - xlnx,zynqmp-sk-kd240-revB + - xlnx,zynqmp-sk-kd240-revA + - xlnx,zynqmp-sk-kd240 + - xlnx,zynqmp + allOf: + - contains: + const: xlnx,zynqmp-sk-kd240-revA + - contains: + const: xlnx,zynqmp-sk-kd240 + - contains: + const: xlnx,zynqmp + + - description: Xilinx Kria SOM KR260 revA/Y/Z + minItems: 3 + items: + enum: + - xlnx,zynqmp-sk-kr260-revA + - xlnx,zynqmp-sk-kr260-revY + - xlnx,zynqmp-sk-kr260-revZ + - xlnx,zynqmp-sk-kr260 + - xlnx,zynqmp + allOf: + - contains: + const: xlnx,zynqmp-sk-kr260-revA + - contains: + const: xlnx,zynqmp-sk-kr260 + - contains: + const: xlnx,zynqmp + + - description: Xilinx Kria SOM KR260 rev2/1/B + minItems: 3 + items: + enum: + - xlnx,zynqmp-sk-kr260-rev2 + - xlnx,zynqmp-sk-kr260-rev1 + - xlnx,zynqmp-sk-kr260-revB + - xlnx,zynqmp-sk-kr260 + - xlnx,zynqmp + allOf: + - contains: + const: xlnx,zynqmp-sk-kr260-revB + - contains: + const: xlnx,zynqmp-sk-kr260 + - contains: + const: xlnx,zynqmp + - description: Xilinx Kria SOM KV260 revA/Y/Z minItems: 3 items: -- cgit v1.2.3 From f522da9ab56c96db8703b2ea0f09be7cdc3bffeb Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Fri, 29 Aug 2025 14:55:22 +0700 Subject: ASoC: doc: Internally link to Writing an ALSA Driver docs ASoC codec and platform driver docs contain reference to writing ALSA driver docs, as an external link. Use :doc: directive for the job instead. Signed-off-by: Bagas Sanjaya Message-ID: <20250829075524.45635-13-bagasdotme@gmail.com> Signed-off-by: Mark Brown --- Documentation/sound/soc/codec.rst | 4 ++-- Documentation/sound/soc/platform.rst | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sound/soc/codec.rst b/Documentation/sound/soc/codec.rst index af973c4cac93..b9d87a4f929b 100644 --- a/Documentation/sound/soc/codec.rst +++ b/Documentation/sound/soc/codec.rst @@ -131,8 +131,8 @@ The codec driver also supports the following ALSA PCM operations:- int (*prepare)(struct snd_pcm_substream *); }; -Please refer to the ALSA driver PCM documentation for details. -https://www.kernel.org/doc/html/latest/sound/kernel-api/writing-an-alsa-driver.html +Please refer to the :doc:`ALSA driver PCM documentation +<../kernel-api/writing-an-alsa-driver>` for details. DAPM description diff --git a/Documentation/sound/soc/platform.rst b/Documentation/sound/soc/platform.rst index 7036630eaf01..bd21d0a4dd9b 100644 --- a/Documentation/sound/soc/platform.rst +++ b/Documentation/sound/soc/platform.rst @@ -45,8 +45,8 @@ snd_soc_component_driver:- ... }; -Please refer to the ALSA driver documentation for details of audio DMA. -https://www.kernel.org/doc/html/latest/sound/kernel-api/writing-an-alsa-driver.html +Please refer to the :doc:`ALSA driver documentation +<../kernel-api/writing-an-alsa-driver>` for details of audio DMA. An example DMA driver is soc/pxa/pxa2xx-pcm.c -- cgit v1.2.3 From 2dc344f89f7312df5f684492a813d024d34cdf20 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Hanne-Lotta=20M=C3=A4enp=C3=A4=C3=A4?= Date: Tue, 8 Jul 2025 18:52:06 +0300 Subject: media: Documentation: Improve grammar in DVB API MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix typos and punctuation and improve grammar in documentation. Signed-off-by: Hanne-Lotta Mäenpää Signed-off-by: Hans Verkuil --- .../media/dvb/fe-diseqc-send-burst.rst | 2 +- .../userspace-api/media/dvb/fe-set-tone.rst | 2 +- .../userspace-api/media/dvb/fe-set-voltage.rst | 2 +- .../media/dvb/fe_property_parameters.rst | 23 +++++++++++----------- .../dvb/frontend-property-terrestrial-systems.rst | 2 +- Documentation/userspace-api/media/dvb/intro.rst | 4 ++-- .../userspace-api/media/dvb/legacy_dvb_audio.rst | 4 ++-- 7 files changed, 19 insertions(+), 20 deletions(-) (limited to 'Documentation') diff --git a/Documentation/userspace-api/media/dvb/fe-diseqc-send-burst.rst b/Documentation/userspace-api/media/dvb/fe-diseqc-send-burst.rst index 8fb73ee29951..6ac1e5cd50ce 100644 --- a/Documentation/userspace-api/media/dvb/fe-diseqc-send-burst.rst +++ b/Documentation/userspace-api/media/dvb/fe-diseqc-send-burst.rst @@ -26,7 +26,7 @@ Arguments File descriptor returned by :c:func:`open()`. ``tone`` - An integer enumered value described at :c:type:`fe_sec_mini_cmd`. + An integer enumerated value described at :c:type:`fe_sec_mini_cmd`. Description =========== diff --git a/Documentation/userspace-api/media/dvb/fe-set-tone.rst b/Documentation/userspace-api/media/dvb/fe-set-tone.rst index 9f44bf946183..41cd7111a243 100644 --- a/Documentation/userspace-api/media/dvb/fe-set-tone.rst +++ b/Documentation/userspace-api/media/dvb/fe-set-tone.rst @@ -26,7 +26,7 @@ Arguments File descriptor returned by :c:func:`open()`. ``tone`` - an integer enumered value described at :c:type:`fe_sec_tone_mode` + An integer enumerated value described at :c:type:`fe_sec_tone_mode` Description =========== diff --git a/Documentation/userspace-api/media/dvb/fe-set-voltage.rst b/Documentation/userspace-api/media/dvb/fe-set-voltage.rst index c66771830be1..4d09ca5876f0 100644 --- a/Documentation/userspace-api/media/dvb/fe-set-voltage.rst +++ b/Documentation/userspace-api/media/dvb/fe-set-voltage.rst @@ -26,7 +26,7 @@ Arguments File descriptor returned by :c:func:`open()`. ``voltage`` - an integer enumered value described at :c:type:`fe_sec_voltage` + An integer enumerated value described at :c:type:`fe_sec_voltage` Description =========== diff --git a/Documentation/userspace-api/media/dvb/fe_property_parameters.rst b/Documentation/userspace-api/media/dvb/fe_property_parameters.rst index 1717a0565fe8..ce962d4a02c0 100644 --- a/Documentation/userspace-api/media/dvb/fe_property_parameters.rst +++ b/Documentation/userspace-api/media/dvb/fe_property_parameters.rst @@ -72,11 +72,11 @@ DTV_MODULATION ============== Specifies the frontend modulation type for delivery systems that -supports more multiple modulations. +support multiple modulations. The modulation can be one of the types defined by enum :c:type:`fe_modulation`. -Most of the digital TV standards offers more than one possible +Most of the digital TV standards offer more than one possible modulation type. The table below presents a summary of the types of modulation types @@ -143,9 +143,8 @@ ISDB-T 5MHz, 6MHz, 7MHz and 8MHz, although most places (DTV_ISDBT_SB_SEGMENT_IDX, DTV_ISDBT_SB_SEGMENT_COUNT). #. On Satellite and Cable delivery systems, the bandwidth depends on - the symbol rate. So, the Kernel will silently ignore any setting - :ref:`DTV-BANDWIDTH-HZ`. I will however fill it back with a - bandwidth estimation. + the symbol rate. The kernel will silently ignore any :ref:`DTV-BANDWIDTH-HZ` + setting and overwrites it with bandwidth estimation. Such bandwidth estimation takes into account the symbol rate set with :ref:`DTV-SYMBOL-RATE`, and the rolloff factor, with is fixed for @@ -200,7 +199,7 @@ DTV_VOLTAGE Used on satellite delivery systems. The voltage is usually used with non-DiSEqC capable LNBs to switch the -polarzation (horizontal/vertical). When using DiSEqC epuipment this +polarization (horizontal/vertical). When using DiSEqC equipment this voltage has to be switched consistently to the DiSEqC commands as described in the DiSEqC spec. @@ -280,7 +279,7 @@ DTV_ISDBT_PARTIAL_RECEPTION Used only on ISDB. -If ``DTV_ISDBT_SOUND_BROADCASTING`` is '0' this bit-field represents +If ``DTV_ISDBT_SOUND_BROADCASTING`` is '0' this bit field represents whether the channel is in partial reception mode or not. If '1' ``DTV_ISDBT_LAYERA_*`` values are assigned to the center segment @@ -331,8 +330,8 @@ broadcaster has several possibilities to put those channels in the air: Assuming a normal 13-segment ISDB-T spectrum he can align the 8 segments from position 1-8 to 5-13 or anything in between. -The underlying layer of segments are subchannels: each segment is -consisting of several subchannels with a predefined IDs. A sub-channel +The underlying layer of segments are sub-channels: each segment is +consisting of several sub-channels with a predefined IDs. A sub-channel is used to help the demodulator to synchronize on the channel. An ISDB-T channel is always centered over all sub-channels. As for the @@ -728,7 +727,7 @@ DTV_ATSCMH_RS_FRAME_ENSEMBLE Used only on ATSC-MH. -Reed Solomon(RS) frame ensemble. +Reed Solomon (RS) frame ensemble. The acceptable values are defined by :c:type:`atscmh_rs_frame_ensemble`. @@ -954,14 +953,14 @@ DTV_ENUM_DELSYS A Multi standard frontend needs to advertise the delivery systems provided. Applications need to enumerate the provided delivery systems, -before using any other operation with the frontend. Prior to it's +before using any other operation with the frontend. Prior to its introduction, FE_GET_INFO was used to determine a frontend type. A frontend which provides more than a single delivery system, FE_GET_INFO doesn't help much. Applications which intends to use a multistandard frontend must enumerate the delivery systems associated with it, rather than trying to use FE_GET_INFO. In the case of a legacy frontend, the result is just the same as with FE_GET_INFO, but -in a more structured format +in a more structured format. The acceptable values are defined by :c:type:`fe_delivery_system`. diff --git a/Documentation/userspace-api/media/dvb/frontend-property-terrestrial-systems.rst b/Documentation/userspace-api/media/dvb/frontend-property-terrestrial-systems.rst index 8cd461ceeea7..8aad9ea817f2 100644 --- a/Documentation/userspace-api/media/dvb/frontend-property-terrestrial-systems.rst +++ b/Documentation/userspace-api/media/dvb/frontend-property-terrestrial-systems.rst @@ -52,7 +52,7 @@ DVB-T2 delivery system ====================== DVB-T2 support is currently in the early stages of development, so -expect that this section maygrow and become more detailed with time. +expect that this section may grow and become more detailed with time. The following parameters are valid for DVB-T2: diff --git a/Documentation/userspace-api/media/dvb/intro.rst b/Documentation/userspace-api/media/dvb/intro.rst index 6784ae79657c..854c2073e69a 100644 --- a/Documentation/userspace-api/media/dvb/intro.rst +++ b/Documentation/userspace-api/media/dvb/intro.rst @@ -1,6 +1,6 @@ .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later -.. _dvb_introdution: +.. _dvb_introduction: ************ Introduction @@ -125,7 +125,7 @@ demux, CA and IP-over-DVB networking. The video and audio devices control the MPEG2 decoder hardware, the frontend device the tuner and the Digital TV demodulator. The demux device gives you control over the PES and section filters of the hardware. If the hardware does not support -filtering these filters can be implemented in software. Finally, the CA +filtering, these filters can be implemented in software. Finally, the CA device controls all the conditional access capabilities of the hardware. It can depend on the individual security requirements of the platform, if and how many of the CA functions are made available to the diff --git a/Documentation/userspace-api/media/dvb/legacy_dvb_audio.rst b/Documentation/userspace-api/media/dvb/legacy_dvb_audio.rst index b46fe2becd02..81b762ef17c4 100644 --- a/Documentation/userspace-api/media/dvb/legacy_dvb_audio.rst +++ b/Documentation/userspace-api/media/dvb/legacy_dvb_audio.rst @@ -195,7 +195,7 @@ Description ~~~~~~~~~~~ The audio channel selected via `AUDIO_CHANNEL_SELECT`_ is determined by -this values. +this value. ----- @@ -413,7 +413,7 @@ Constants - ``AUDIO_CAP_MP3`` - The hardware accepts MPEG-1 Audio Layer III. - Commomly known as .mp3. + Commonly known as .mp3. - .. -- cgit v1.2.3 From 400915493f53b10085648b387cdbb4da5612ebfc Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 22 Aug 2025 19:56:14 +0200 Subject: dt-bindings: Add Actiontec vendor prefix Actiontec is a US manufacturer of telecom equipment. Acked-by: Conor Dooley Signed-off-by: Linus Walleij Link: https://lore.kernel.org/20250822-ixp4xx-mi424wr-dts-v2-1-cc804884474d@linaro.org --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 77160cd47f54..a0abe9e39291 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -48,6 +48,8 @@ patternProperties: description: Acme Systems srl "^actions,.*": description: Actions Semiconductor Co., Ltd. + "^actiontec,.*": + description: Actiontec Electronics, Inc "^active-semi,.*": description: Active-Semi International Inc "^ad,.*": -- cgit v1.2.3 From 873c5c0a2baf11d7101df3fc7485a0183c8c6c29 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 22 Aug 2025 19:56:15 +0200 Subject: dt-bindings: arm: ixp4xx: List actiontec devices Add two IXP4xx device families from OpenWrts backlog: Actiontec MI424WR revision A/C and revision D, both of these are IXP4xx devices. Revisions E and later use different chipsets. Acked-by: Conor Dooley Signed-off-by: Linus Walleij Link: https://lore.kernel.org/20250822-ixp4xx-mi424wr-dts-v2-2-cc804884474d@linaro.org --- Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml b/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml index d60792b1d995..b7b430896596 100644 --- a/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml +++ b/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml @@ -16,6 +16,8 @@ properties: oneOf: - items: - enum: + - actiontec,mi424wr-ac + - actiontec,mi424wr-d - adieng,coyote - arcom,vulcan - dlink,dsm-g600-a -- cgit v1.2.3 From 093458c58f830d0a713fab0de037df5f0ce24fef Mon Sep 17 00:00:00 2001 From: Alex Williamson Date: Thu, 28 Aug 2025 14:36:24 -0600 Subject: docs: proc.rst: Fix VFIO Device title formatting Title underline is one character too short. Cc: Alex Mastro Cc: Jonathan Corbet Reported-by: Stephen Rothwell Closes: https://lore.kernel.org/all/20250828123035.2f0c74e7@canb.auug.org.au Fixes: 1e736f148956 ("vfio/pci: print vfio-device syspath to fdinfo") Reviewed-by: Bagas Sanjaya Link: https://lore.kernel.org/r/20250828203629.283418-1-alex.williamson@redhat.com Signed-off-by: Alex Williamson --- Documentation/filesystems/proc.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/proc.rst b/Documentation/filesystems/proc.rst index ed8d23b677ca..ff09f668cdeb 100644 --- a/Documentation/filesystems/proc.rst +++ b/Documentation/filesystems/proc.rst @@ -2167,7 +2167,7 @@ where 'size' is the size of the DMA buffer in bytes. 'count' is the file count o the DMA buffer file. 'exp_name' is the name of the DMA buffer exporter. VFIO Device files -~~~~~~~~~~~~~~~~ +~~~~~~~~~~~~~~~~~ :: -- cgit v1.2.3 From 1ea149fb5b068c1b7490451d967216ff554628af Mon Sep 17 00:00:00 2001 From: Aleksander Jan Bajkowski Date: Mon, 11 Aug 2025 11:20:36 +0200 Subject: dt-bindings: mips: cpu: Add MIPS 34Kc Core Document MIPS 34Kc device tree bindings. It is used in the Realtek RTL930x SoC. Signed-off-by: Aleksander Jan Bajkowski Acked-by: Conor Dooley Signed-off-by: Thomas Bogendoerfer --- Documentation/devicetree/bindings/mips/cpus.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mips/cpus.yaml b/Documentation/devicetree/bindings/mips/cpus.yaml index 471373ad0cfb..d3677f53f142 100644 --- a/Documentation/devicetree/bindings/mips/cpus.yaml +++ b/Documentation/devicetree/bindings/mips/cpus.yaml @@ -33,6 +33,7 @@ properties: - mips,mips1004Kc - mips,mips24KEc - mips,mips24Kc + - mips,mips34Kc - mips,mips4KEc - mips,mips4Kc - mips,mips74Kc -- cgit v1.2.3 From cfbb794c62291cd8249def0d10cae922b717b53e Mon Sep 17 00:00:00 2001 From: Keguang Zhang Date: Wed, 16 Jul 2025 19:25:10 +0800 Subject: dt-bindings: mips: loongson: Add LS1B-DEMO and CQ-T300B Document two Loongson-1 boards: - loongson,ls1b-demo: a board based on Loongson-1B - loongson,cq-t300b: a board based on Loongson-1C Acked-by: Krzysztof Kozlowski Signed-off-by: Keguang Zhang Signed-off-by: Thomas Bogendoerfer --- Documentation/devicetree/bindings/mips/loongson/devices.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mips/loongson/devices.yaml b/Documentation/devicetree/bindings/mips/loongson/devices.yaml index 099e40e1482d..ca66bc49c2d6 100644 --- a/Documentation/devicetree/bindings/mips/loongson/devices.yaml +++ b/Documentation/devicetree/bindings/mips/loongson/devices.yaml @@ -40,6 +40,7 @@ properties: - description: LS1B based boards items: - enum: + - loongson,ls1b-demo - loongson,lsgz-1b-dev - const: loongson,ls1b @@ -47,6 +48,7 @@ properties: items: - enum: - loongmasses,smartloong-1c + - loongson,cq-t300b - const: loongson,ls1c additionalProperties: true -- cgit v1.2.3 From b639c20e748cbe2962fd0c0cef22c0d354842fd5 Mon Sep 17 00:00:00 2001 From: Liao Yuanhong Date: Thu, 28 Aug 2025 16:11:30 +0800 Subject: f2fs: Use allocate_section_policy to control write priority in multi-devices setups Introduces two new sys nodes: allocate_section_hint and allocate_section_policy. The allocate_section_hint identifies the boundary between devices, measured in sections; it defaults to the end of the device for single storage setups, and the end of the first device for multiple storage setups. The allocate_section_policy determines the write strategy, with a default value of 0 for normal sequential write strategy. A value of 1 prioritizes writes before the allocate_section_hint, while a value of 2 prioritizes writes after it. This strategy addresses the issue where, despite F2FS supporting multiple devices, SOC vendors lack multi-devices support (currently only supporting zoned devices). As a workaround, multiple storage devices are mapped to a single dm device. Both this workaround and the F2FS multi-devices solution may require prioritizing writing to certain devices, such as a device with better performance or when switching is needed due to performance degradation near a device's end. For scenarios with more than two devices, sort them at mount time to utilize this feature. When using this feature with a single storage device, it has almost no impact. However, for configurations where multiple storage devices are mapped to the same dm device using F2FS, utilizing this feature can provide some optimization benefits. Therefore, I believe it should not be limited to just multi-devices usage. Signed-off-by: Liao Yuanhong Reviewed-by: Chao Yu Signed-off-by: Jaegeuk Kim --- Documentation/ABI/testing/sysfs-fs-f2fs | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs index ee3acc8c2cb8..b590809869ca 100644 --- a/Documentation/ABI/testing/sysfs-fs-f2fs +++ b/Documentation/ABI/testing/sysfs-fs-f2fs @@ -911,3 +911,25 @@ Description: Used to adjust the BG_GC priority when pending IO, with a default v bggc_io_aware = 1 skip background GC if there is pending read IO bggc_io_aware = 2 don't aware IO for background GC ================== ====================================================== + +What: /sys/fs/f2fs//allocate_section_hint +Date: August 2025 +Contact: "Liao Yuanhong" +Description: Indicates the hint section between the first device and others in multi-devices + setup. It defaults to the end of the first device in sections. For a single storage + device, it defaults to the total number of sections. It can be manually set to match + scenarios where multi-devices are mapped to the same dm device. + +What: /sys/fs/f2fs//allocate_section_policy +Date: August 2025 +Contact: "Liao Yuanhong" +Description: Controls write priority in multi-devices setups. A value of 0 means normal writing. + A value of 1 prioritizes writing to devices before the allocate_section_hint. A value of 2 + prioritizes writing to devices after the allocate_section_hint. The default is 0. + + =========================== ========================================================== + value description + allocate_section_policy = 0 Normal writing + allocate_section_policy = 1 Prioritize writing to section before allocate_section_hint + allocate_section_policy = 2 Prioritize writing to section after allocate_section_hint + =========================== ========================================================== -- cgit v1.2.3 From 2dddb2792b2ea6571ff44e46a6f7f11400073c9a Mon Sep 17 00:00:00 2001 From: Alex Tran Date: Wed, 27 Aug 2025 00:45:25 -0700 Subject: docs: driver-api pinctrl cleanup Replace FIXME comments in the pinctrl documentation example with proper cleanup code: - Add devm_pinctrl_put() calls in error paths (pinctrl_lookup_state, pinctrl_select_state) after successful devm_pinctrl_get() - Set foo->p to NULL when devm_pinctrl_get() fails - Add ret variable for cleaner error handling - provides proper example of pinctrl resource management on failure Signed-off-by: Alex Tran Reviewed-by: Linus Walleij Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250827074525.685863-1-alex.t.tran@gmail.com --- Documentation/driver-api/pin-control.rst | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/pin-control.rst b/Documentation/driver-api/pin-control.rst index 27ea1236307e..281533c33914 100644 --- a/Documentation/driver-api/pin-control.rst +++ b/Documentation/driver-api/pin-control.rst @@ -1202,22 +1202,24 @@ default state like this: { /* Allocate a state holder named "foo" etc */ struct foo_state *foo = ...; + int ret; foo->p = devm_pinctrl_get(&device); if (IS_ERR(foo->p)) { - /* FIXME: clean up "foo" here */ - return PTR_ERR(foo->p); + ret = PTR_ERR(foo->p); + foo->p = NULL; + return ret; } foo->s = pinctrl_lookup_state(foo->p, PINCTRL_STATE_DEFAULT); if (IS_ERR(foo->s)) { - /* FIXME: clean up "foo" here */ + devm_pinctrl_put(foo->p); return PTR_ERR(foo->s); } ret = pinctrl_select_state(foo->p, foo->s); if (ret < 0) { - /* FIXME: clean up "foo" here */ + devm_pinctrl_put(foo->p); return ret; } } -- cgit v1.2.3 From 61578493ca7f9d4acd804544f3f5651f5124b12f Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 26 Aug 2025 09:47:56 +0700 Subject: Documentation: ocfs2: Properly reindent filecheck operations list Some of texts in filecheck operations list are indented out of the list. In particular, the third operation is shown not as the third list item but rather as a separate paragraph. Reindent the list so that gets properly rendered as such. Signed-off-by: Bagas Sanjaya Acked-by: Joseph Qi Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250826024756.16073-1-bagasdotme@gmail.com --- Documentation/filesystems/ocfs2-online-filecheck.rst | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/ocfs2-online-filecheck.rst b/Documentation/filesystems/ocfs2-online-filecheck.rst index 2257bb53edc1..9e8449416e0b 100644 --- a/Documentation/filesystems/ocfs2-online-filecheck.rst +++ b/Documentation/filesystems/ocfs2-online-filecheck.rst @@ -58,33 +58,33 @@ inode, fixing inode and setting the size of result record history. # echo "" > /sys/fs/ocfs2//filecheck/check # cat /sys/fs/ocfs2//filecheck/check -The output is like this:: + The output is like this:: INO DONE ERROR 39502 1 GENERATION - lists the inode numbers. - indicates whether the operation has been finished. - says what kind of errors was found. For the detailed error numbers, - please refer to the file linux/fs/ocfs2/filecheck.h. + lists the inode numbers. + indicates whether the operation has been finished. + says what kind of errors was found. For the detailed error numbers, + please refer to the file linux/fs/ocfs2/filecheck.h. 2. If you determine to fix this inode, do:: # echo "" > /sys/fs/ocfs2//filecheck/fix # cat /sys/fs/ocfs2//filecheck/fix -The output is like this::: + The output is like this:: INO DONE ERROR 39502 1 SUCCESS -This time, the column indicates whether this fix is successful or not. + This time, the column indicates whether this fix is successful or not. 3. The record cache is used to store the history of check/fix results. It's -default size is 10, and can be adjust between the range of 10 ~ 100. You can -adjust the size like this:: + default size is 10, and can be adjust between the range of 10 ~ 100. You can + adjust the size like this:: - # echo "" > /sys/fs/ocfs2//filecheck/set + # echo "" > /sys/fs/ocfs2//filecheck/set Fixing stuff ============ -- cgit v1.2.3 From b5698da669401ed3f51add92f80457703f0937e3 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:13 +0200 Subject: docs: parse-headers.pl: improve its debug output format Change the --debug logic to help comparing its results with a new python script. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/1064011717951eac257889a3032303c9d4440711.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/parse-headers.pl | 31 +++++++++++++++++++++++-------- 1 file changed, 23 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/parse-headers.pl b/Documentation/sphinx/parse-headers.pl index 7b1458544e2e..560685926cdb 100755 --- a/Documentation/sphinx/parse-headers.pl +++ b/Documentation/sphinx/parse-headers.pl @@ -31,8 +31,6 @@ my %enums; my %enum_symbols; my %structs; -require Data::Dumper if ($debug); - # # read the file and get identifiers # @@ -197,6 +195,9 @@ if ($file_exceptions) { } else { $reftype = $def_reftype{$type}; } + if (!$reftype) { + print STDERR "Warning: can't find ref type for $type"; + } $new = "$reftype:`$old <$new>`"; if ($type eq "ioctl") { @@ -229,12 +230,26 @@ if ($file_exceptions) { } if ($debug) { - print Data::Dumper->Dump([\%ioctls], [qw(*ioctls)]) if (%ioctls); - print Data::Dumper->Dump([\%typedefs], [qw(*typedefs)]) if (%typedefs); - print Data::Dumper->Dump([\%enums], [qw(*enums)]) if (%enums); - print Data::Dumper->Dump([\%structs], [qw(*structs)]) if (%structs); - print Data::Dumper->Dump([\%defines], [qw(*defines)]) if (%defines); - print Data::Dumper->Dump([\%enum_symbols], [qw(*enum_symbols)]) if (%enum_symbols); + my @all_hashes = ( + {ioctl => \%ioctls}, + {typedef => \%typedefs}, + {enum => \%enums}, + {struct => \%structs}, + {define => \%defines}, + {symbol => \%enum_symbols} + ); + + foreach my $hash (@all_hashes) { + while (my ($name, $hash_ref) = each %$hash) { + next unless %$hash_ref; # Skip empty hashes + + print "$name:\n"; + for my $key (sort keys %$hash_ref) { + print " $key -> $hash_ref->{$key}\n"; + } + print "\n"; + } + } } # -- cgit v1.2.3 From 8a5a85be4df1ab0642d4a3610691dbaed443d4d0 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:14 +0200 Subject: docs: parse-headers.py: convert parse-headers.pl When the Kernel started to use Sphinx, we had to come up with a solution to parse media headers. On that time, we didn't have much experience with Sphinx extensions. So, we came up with our own script-based solution that were basically implementing a set of rules we used to have at the Makefile. Convert it to Python, keeping it bug-compatible with the original script. While here, try to better document it. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/ae5cfa8dff37e280cc9493fc95a51cd0cc0ba127.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/parse-headers.py | 429 ++++++++++++++++++++++++++++++++++ 1 file changed, 429 insertions(+) create mode 100755 Documentation/sphinx/parse-headers.py (limited to 'Documentation') diff --git a/Documentation/sphinx/parse-headers.py b/Documentation/sphinx/parse-headers.py new file mode 100755 index 000000000000..b39284d21090 --- /dev/null +++ b/Documentation/sphinx/parse-headers.py @@ -0,0 +1,429 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: GPL-2.0 +# Copyright (c) 2016 by Mauro Carvalho Chehab . +# pylint: disable=C0103,R0902,R0912,R0914,R0915 + +""" +Convert a C header or source file (C_FILE), into a ReStructured Text +included via ..parsed-literal block with cross-references for the +documentation files that describe the API. It accepts an optional +EXCEPTIONS_FILE with describes what elements will be either ignored or +be pointed to a non-default reference. + +The output is written at the (OUT_FILE). + +It is capable of identifying defines, functions, structs, typedefs, +enums and enum symbols and create cross-references for all of them. +It is also capable of distinguish #define used for specifying a Linux +ioctl. + +The EXCEPTIONS_FILE contains a set of rules like: + + ignore ioctl VIDIOC_ENUM_FMT + replace ioctl VIDIOC_DQBUF vidioc_qbuf + replace define V4L2_EVENT_MD_FL_HAVE_FRAME_SEQ :c:type:`v4l2_event_motion_det` +""" + +import argparse +import os +import re +import sys + + +class ParseHeader: + """ + Creates an enriched version of a Kernel header file with cross-links + to each C data structure type. + + It is meant to allow having a more comprehensive documentation, where + uAPI headers will create cross-reference links to the code. + + It is capable of identifying defines, functions, structs, typedefs, + enums and enum symbols and create cross-references for all of them. + It is also capable of distinguish #define used for specifying a Linux + ioctl. + + By default, it create rules for all symbols and defines, but it also + allows parsing an exception file. Such file contains a set of rules + using the syntax below: + + 1. Ignore rules: + + ignore ` + + Removes the symbol from reference generation. + + 2. Replace rules: + + replace + + Replaces how old_symbol with a new reference. The new_reference can be: + - A simple symbol name; + - A full Sphinx reference. + + On both cases, can be: + - ioctl: for defines that end with _IO*, e.g. ioctl definitions + - define: for other defines + - symbol: for symbols defined within enums; + - typedef: for typedefs; + - enum: for the name of a non-anonymous enum; + - struct: for structs. + + Examples: + + ignore define __LINUX_MEDIA_H + ignore ioctl VIDIOC_ENUM_FMT + replace ioctl VIDIOC_DQBUF vidioc_qbuf + replace define V4L2_EVENT_MD_FL_HAVE_FRAME_SEQ :c:type:`v4l2_event_motion_det` + """ + + # Parser regexes with multiple ways to capture enums and structs + RE_ENUMS = [ + re.compile(r"^\s*enum\s+([\w_]+)\s*\{"), + re.compile(r"^\s*enum\s+([\w_]+)\s*$"), + re.compile(r"^\s*typedef\s*enum\s+([\w_]+)\s*\{"), + re.compile(r"^\s*typedef\s*enum\s+([\w_]+)\s*$"), + ] + RE_STRUCTS = [ + re.compile(r"^\s*struct\s+([_\w][\w\d_]+)\s*\{"), + re.compile(r"^\s*struct\s+([_\w][\w\d_]+)$"), + re.compile(r"^\s*typedef\s*struct\s+([_\w][\w\d_]+)\s*\{"), + re.compile(r"^\s*typedef\s*struct\s+([_\w][\w\d_]+)$"), + ] + + # FIXME: the original code was written a long time before Sphinx C + # domain to have multiple namespaces. To avoid to much turn at the + # existing hyperlinks, the code kept using "c:type" instead of the + # right types. To change that, we need to change the types not only + # here, but also at the uAPI media documentation. + DEF_SYMBOL_TYPES = { + "ioctl": { + "prefix": "\\ ", + "suffix": "\\ ", + "ref_type": ":ref", + }, + "define": { + "prefix": "\\ ", + "suffix": "\\ ", + "ref_type": ":ref", + }, + # We're calling each definition inside an enum as "symbol" + "symbol": { + "prefix": "\\ ", + "suffix": "\\ ", + "ref_type": ":ref", + }, + "typedef": { + "prefix": "\\ ", + "suffix": "\\ ", + "ref_type": ":c:type", + }, + # This is the name of the enum itself + "enum": { + "prefix": "", + "suffix": "\\ ", + "ref_type": ":c:type", + }, + "struct": { + "prefix": "", + "suffix": "\\ ", + "ref_type": ":c:type", + }, + } + + def __init__(self, debug: bool = False): + """Initialize internal vars""" + self.debug = debug + self.data = "" + + self.symbols = {} + + for symbol_type in self.DEF_SYMBOL_TYPES: + self.symbols[symbol_type] = {} + + def store_type(self, symbol_type: str, symbol: str, + ref_name: str = None, replace_underscores: bool = True): + """ + Stores a new symbol at self.symbols under symbol_type. + + By default, underscores are replaced by "-" + """ + defs = self.DEF_SYMBOL_TYPES[symbol_type] + + prefix = defs.get("prefix", "") + suffix = defs.get("suffix", "") + ref_type = defs.get("ref_type") + + # Determine ref_link based on symbol type + if ref_type: + if symbol_type == "enum": + ref_link = f"{ref_type}:`{symbol}`" + else: + if not ref_name: + ref_name = symbol.lower() + + if replace_underscores: + ref_name = ref_name.replace("_", "-") + + ref_link = f"{ref_type}:`{symbol} <{ref_name}>`" + else: + ref_link = symbol + + self.symbols[symbol_type][symbol] = f"{prefix}{ref_link}{suffix}" + + def store_line(self, line): + """Stores a line at self.data, properly indented""" + line = " " + line.expandtabs() + self.data += line.rstrip(" ") + + def parse_file(self, file_in: str): + """Reads a C source file and get identifiers""" + self.data = "" + is_enum = False + is_comment = False + multiline = "" + + with open(file_in, "r", + encoding="utf-8", errors="backslashreplace") as f: + for line_no, line in enumerate(f): + self.store_line(line) + line = line.strip("\n") + + # Handle continuation lines + if line.endswith(r"\\"): + multiline += line[-1] + continue + + if multiline: + line = multiline + line + multiline = "" + + # Handle comments. They can be multilined + if not is_comment: + if re.search(r"/\*.*", line): + is_comment = True + else: + # Strip C99-style comments + line = re.sub(r"(//.*)", "", line) + + if is_comment: + if re.search(r".*\*/", line): + is_comment = False + else: + multiline = line + continue + + # At this point, line variable may be a multilined statement, + # if lines end with \ or if they have multi-line comments + # With that, it can safely remove the entire comments, + # and there's no need to use re.DOTALL for the logic below + + line = re.sub(r"(/\*.*\*/)", "", line) + if not line.strip(): + continue + + # It can be useful for debug purposes to print the file after + # having comments stripped and multi-lines grouped. + if self.debug > 1: + print(f"line {line_no + 1}: {line}") + + # Now the fun begins: parse each type and store it. + + # We opted for a two parsing logic here due to: + # 1. it makes easier to debug issues not-parsed symbols; + # 2. we want symbol replacement at the entire content, not + # just when the symbol is detected. + + if is_enum: + match = re.match(r"^\s*([_\w][\w\d_]+)\s*[\,=]?", line) + if match: + self.store_type("symbol", match.group(1)) + if "}" in line: + is_enum = False + continue + + match = re.match(r"^\s*#\s*define\s+([\w_]+)\s+_IO", line) + if match: + self.store_type("ioctl", match.group(1), + replace_underscores=False) + continue + + match = re.match(r"^\s*#\s*define\s+([\w_]+)(\s+|$)", line) + if match: + self.store_type("define", match.group(1)) + continue + + match = re.match(r"^\s*typedef\s+([_\w][\w\d_]+)\s+(.*)\s+([_\w][\w\d_]+);", + line) + if match: + name = match.group(2).strip() + symbol = match.group(3) + self.store_type("typedef", symbol, ref_name=name, + replace_underscores=False) + continue + + for re_enum in self.RE_ENUMS: + match = re_enum.match(line) + if match: + self.store_type("enum", match.group(1)) + is_enum = True + break + + for re_struct in self.RE_STRUCTS: + match = re_struct.match(line) + if match: + self.store_type("struct", match.group(1), + replace_underscores=False) + break + + def process_exceptions(self, fname: str): + """ + Process exceptions file with rules to ignore or replace references. + """ + if not fname: + return + + name = os.path.basename(fname) + + with open(fname, "r", encoding="utf-8", errors="backslashreplace") as f: + for ln, line in enumerate(f): + ln += 1 + line = line.strip() + if not line or line.startswith("#"): + continue + + # Handle ignore rules + match = re.match(r"^ignore\s+(\w+)\s+(\S+)", line) + if match: + c_type = match.group(1) + symbol = match.group(2) + + if c_type not in self.DEF_SYMBOL_TYPES: + sys.exit(f"{name}:{ln}: {c_type} is invalid") + + d = self.symbols[c_type] + if symbol in d: + del d[symbol] + + continue + + # Handle replace rules + match = re.match(r"^replace\s+(\S+)\s+(\S+)\s+(\S+)", line) + if not match: + sys.exit(f"{name}:{ln}: invalid line: {line}") + + c_type, old, new = match.groups() + + if c_type not in self.DEF_SYMBOL_TYPES: + sys.exit(f"{name}:{ln}: {c_type} is invalid") + + reftype = None + + # Parse reference type when the type is specified + + match = re.match(r"^\:c\:(data|func|macro|type)\:\`(.+)\`", new) + if match: + reftype = f":c:{match.group(1)}" + new = match.group(2) + else: + match = re.search(r"(\:ref)\:\`(.+)\`", new) + if match: + reftype = match.group(1) + new = match.group(2) + + # If the replacement rule doesn't have a type, get default + if not reftype: + reftype = self.DEF_SYMBOL_TYPES[c_type].get("ref_type") + if not reftype: + reftype = self.DEF_SYMBOL_TYPES[c_type].get("real_type") + + new_ref = f"{reftype}:`{old} <{new}>`" + + # Change self.symbols to use the replacement rule + if old in self.symbols[c_type]: + self.symbols[c_type][old] = new_ref + else: + print(f"{name}:{ln}: Warning: can't find {old} {c_type}") + + def debug_print(self): + """ + Print debug information containing the replacement rules per symbol. + To make easier to check, group them per type. + """ + if not self.debug: + return + + for c_type, refs in self.symbols.items(): + if not refs: # Skip empty dictionaries + continue + + print(f"{c_type}:") + + for symbol, ref in sorted(refs.items()): + print(f" {symbol} -> {ref}") + + print() + + def write_output(self, file_in: str, file_out: str): + """Write the formatted output to a file.""" + + # Avoid extra blank lines + text = re.sub(r"\s+$", "", self.data) + "\n" + text = re.sub(r"\n\s+\n", "\n\n", text) + + # Escape Sphinx special characters + text = re.sub(r"([\_\`\*\<\>\&\\\\:\/\|\%\$\#\{\}\~\^])", r"\\\1", text) + + # Source uAPI files may have special notes. Use bold font for them + text = re.sub(r"DEPRECATED", "**DEPRECATED**", text) + + # Delimiters to catch the entire symbol after escaped + start_delim = r"([ \n\t\(=\*\@])" + end_delim = r"(\s|,|\\=|\\:|\;|\)|\}|\{)" + + # Process all reference types + for ref_dict in self.symbols.values(): + for symbol, replacement in ref_dict.items(): + symbol = re.escape(re.sub(r"([\_\`\*\<\>\&\\\\:\/])", r"\\\1", symbol)) + text = re.sub(fr'{start_delim}{symbol}{end_delim}', + fr'\1{replacement}\2', text) + + # Remove "\ " where not needed: before spaces and at the end of lines + text = re.sub(r"\\ ([\n ])", r"\1", text) + + title = os.path.basename(file_in) + + with open(file_out, "w", encoding="utf-8", errors="backslashreplace") as f: + f.write(".. -*- coding: utf-8; mode: rst -*-\n\n") + f.write(f"{title}\n") + f.write("=" * len(title)) + f.write("\n\n.. parsed-literal::\n\n") + f.write(text) + + +def main(): + """Main function""" + parser = argparse.ArgumentParser(description=__doc__, + formatter_class=argparse.RawDescriptionHelpFormatter) + + parser.add_argument("-d", "--debug", action="count", default=0, + help="Increase debug level. Can be used multiple times") + parser.add_argument("file_in", help="Input C file") + parser.add_argument("file_out", help="Output RST file") + parser.add_argument("file_exceptions", nargs="?", + help="Exceptions file (optional)") + + args = parser.parse_args() + + parser = ParseHeader(debug=args.debug) + parser.parse_file(args.file_in) + + if args.file_exceptions: + parser.process_exceptions(args.file_exceptions) + + parser.debug_print() + parser.write_output(args.file_in, args.file_out) + + +if __name__ == "__main__": + main() -- cgit v1.2.3 From a2d58c917c3e0d0cd161e343261717dbe96ffe22 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:15 +0200 Subject: docs: parse-headers.py: improve --help logic When printing --help, we'd like the name of the files from __doc__ to match the displayed positional arguments at both usage and argument description lines. Use a custom formatter class to convert ``foo`` into ANSI SGR code to bold the argument, if is TTY, and adjust the help text to match the argument names. Here on Plasma, that makes it display it colored, wich is really cool. Yet, I opted for SGR, as the best is to follow the terminal color schema for bold. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/2c1e61d1fb1b2a2838b443beee89c1528831997f.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/parse-headers.py | 67 ++++++++++++++++++++++++++++++----- 1 file changed, 58 insertions(+), 9 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/parse-headers.py b/Documentation/sphinx/parse-headers.py index b39284d21090..650f9c9a68d1 100755 --- a/Documentation/sphinx/parse-headers.py +++ b/Documentation/sphinx/parse-headers.py @@ -4,20 +4,20 @@ # pylint: disable=C0103,R0902,R0912,R0914,R0915 """ -Convert a C header or source file (C_FILE), into a ReStructured Text +Convert a C header or source file ``FILE_IN``, into a ReStructured Text included via ..parsed-literal block with cross-references for the documentation files that describe the API. It accepts an optional -EXCEPTIONS_FILE with describes what elements will be either ignored or -be pointed to a non-default reference. +``FILE_RULES`` file to describes what elements will be either ignored or +be pointed to a non-default reference type/name. -The output is written at the (OUT_FILE). +The output is written at ``FILE_OUT``. It is capable of identifying defines, functions, structs, typedefs, enums and enum symbols and create cross-references for all of them. It is also capable of distinguish #define used for specifying a Linux ioctl. -The EXCEPTIONS_FILE contains a set of rules like: +The optional ``FILE_RULES`` contains a set of rules like: ignore ioctl VIDIOC_ENUM_FMT replace ioctl VIDIOC_DQBUF vidioc_qbuf @@ -400,17 +400,66 @@ class ParseHeader: f.write("\n\n.. parsed-literal::\n\n") f.write(text) +class EnrichFormatter(argparse.HelpFormatter): + """ + Better format the output, making easier to identify the positional args + and how they're used at the __doc__ description. + """ + def __init__(self, *args, **kwargs): + """Initialize class and check if is TTY""" + super().__init__(*args, **kwargs) + self._tty = sys.stdout.isatty() + + def enrich_text(self, text): + """Handle ReST markups (currently, only ``foo``)""" + if self._tty and text: + # Replace ``text`` with ANSI bold + return re.sub(r'\`\`(.+?)\`\`', + lambda m: f'\033[1m{m.group(1)}\033[0m', text) + return text + + def _fill_text(self, text, width, indent): + """Enrich descriptions with markups on it""" + enriched = self.enrich_text(text) + return "\n".join(indent + line for line in enriched.splitlines()) + + def _format_usage(self, usage, actions, groups, prefix): + """Enrich positional arguments at usage: line""" + + prog = self._prog + parts = [] + + for action in actions: + if action.option_strings: + opt = action.option_strings[0] + if action.nargs != 0: + opt += f" {action.dest.upper()}" + parts.append(f"[{opt}]") + else: + # Positional argument + parts.append(self.enrich_text(f"``{action.dest.upper()}``")) + + usage_text = f"{prefix or 'usage: '} {prog} {' '.join(parts)}\n" + return usage_text + + def _format_action_invocation(self, action): + """Enrich argument names""" + if not action.option_strings: + return self.enrich_text(f"``{action.dest.upper()}``") + else: + return ", ".join(action.option_strings) + def main(): """Main function""" parser = argparse.ArgumentParser(description=__doc__, - formatter_class=argparse.RawDescriptionHelpFormatter) + formatter_class=EnrichFormatter) parser.add_argument("-d", "--debug", action="count", default=0, help="Increase debug level. Can be used multiple times") parser.add_argument("file_in", help="Input C file") parser.add_argument("file_out", help="Output RST file") - parser.add_argument("file_exceptions", nargs="?", + parser.add_argument("file_rules", nargs="?", help="Exceptions file (optional)") args = parser.parse_args() @@ -418,8 +467,8 @@ def main(): parser = ParseHeader(debug=args.debug) parser.parse_file(args.file_in) - if args.file_exceptions: - parser.process_exceptions(args.file_exceptions) + if args.file_rules: + parser.process_exceptions(args.file_rules) parser.debug_print() parser.write_output(args.file_in, args.file_out) -- cgit v1.2.3 From 285b8d3db2bae79c01d604701c3faddb456aca93 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:16 +0200 Subject: docs: parse-headers.py: better handle @var arguments The kernel-doc markups inside headers may contain @var markups. With the current rule, this would be converted into: \* @:c:type:`DMX_BUFFER_FLAG_DISCONTINUITY_INDICATOR `\: Fix it adding a non-printed space if needed. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/8d06bb713d6ec8de65179dd93defe479715409b6.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/parse-headers.py | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/parse-headers.py b/Documentation/sphinx/parse-headers.py index 650f9c9a68d1..f4ab9c49d2f5 100755 --- a/Documentation/sphinx/parse-headers.py +++ b/Documentation/sphinx/parse-headers.py @@ -120,12 +120,12 @@ class ParseHeader: }, # This is the name of the enum itself "enum": { - "prefix": "", + "prefix": "\\ ", "suffix": "\\ ", "ref_type": ":c:type", }, "struct": { - "prefix": "", + "prefix": "\\ ", "suffix": "\\ ", "ref_type": ":c:type", }, @@ -390,6 +390,8 @@ class ParseHeader: # Remove "\ " where not needed: before spaces and at the end of lines text = re.sub(r"\\ ([\n ])", r"\1", text) + text = re.sub(r" \\ ", " ", text) + title = os.path.basename(file_in) -- cgit v1.2.3 From 37497a4dc5ecd40f861fad3a436978394d1e97fa Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:17 +0200 Subject: docs: parse-headers.py: simplify the rules for hashes Normal :ref domain accept either hashes or underscores, but c-domain ones don't. Fix it and remove unneeded places where we opt to disable underscore transformation. Ideally, we should have a rule about the default, or change the way media docs have their references. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/0c011090272f7a1068545409222f970ddb1ed431.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/parse-headers.py | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/parse-headers.py b/Documentation/sphinx/parse-headers.py index f4ab9c49d2f5..344090ef259c 100755 --- a/Documentation/sphinx/parse-headers.py +++ b/Documentation/sphinx/parse-headers.py @@ -162,7 +162,8 @@ class ParseHeader: if not ref_name: ref_name = symbol.lower() - if replace_underscores: + # c-type references don't support hash + if ref_type == ":ref" and replace_underscores: ref_name = ref_name.replace("_", "-") ref_link = f"{ref_type}:`{symbol} <{ref_name}>`" @@ -258,8 +259,7 @@ class ParseHeader: if match: name = match.group(2).strip() symbol = match.group(3) - self.store_type("typedef", symbol, ref_name=name, - replace_underscores=False) + self.store_type("typedef", symbol, ref_name=name) continue for re_enum in self.RE_ENUMS: @@ -272,8 +272,7 @@ class ParseHeader: for re_struct in self.RE_STRUCTS: match = re_struct.match(line) if match: - self.store_type("struct", match.group(1), - replace_underscores=False) + self.store_type("struct", match.group(1)) break def process_exceptions(self, fname: str): -- cgit v1.2.3 From cde494660f561909ad44a27037c7155454159136 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:18 +0200 Subject: tools: docs: parse-headers.py: move it from sphinx dir As suggested by Jon, we should start having a tools/docs directory, instead of placing everything under scripts. In the specific case of parse-headers.py, the previous location is where we're placing Sphinx extensions, which is not the right place for execs. Move it to tools/docs/parse-headers.py. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/0f5ac2d704cffe9834e589b39549d2393e1237ef.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/parse-headers.py | 479 ---------------------------------- 1 file changed, 479 deletions(-) delete mode 100755 Documentation/sphinx/parse-headers.py (limited to 'Documentation') diff --git a/Documentation/sphinx/parse-headers.py b/Documentation/sphinx/parse-headers.py deleted file mode 100755 index 344090ef259c..000000000000 --- a/Documentation/sphinx/parse-headers.py +++ /dev/null @@ -1,479 +0,0 @@ -#!/usr/bin/env python3 -# SPDX-License-Identifier: GPL-2.0 -# Copyright (c) 2016 by Mauro Carvalho Chehab . -# pylint: disable=C0103,R0902,R0912,R0914,R0915 - -""" -Convert a C header or source file ``FILE_IN``, into a ReStructured Text -included via ..parsed-literal block with cross-references for the -documentation files that describe the API. It accepts an optional -``FILE_RULES`` file to describes what elements will be either ignored or -be pointed to a non-default reference type/name. - -The output is written at ``FILE_OUT``. - -It is capable of identifying defines, functions, structs, typedefs, -enums and enum symbols and create cross-references for all of them. -It is also capable of distinguish #define used for specifying a Linux -ioctl. - -The optional ``FILE_RULES`` contains a set of rules like: - - ignore ioctl VIDIOC_ENUM_FMT - replace ioctl VIDIOC_DQBUF vidioc_qbuf - replace define V4L2_EVENT_MD_FL_HAVE_FRAME_SEQ :c:type:`v4l2_event_motion_det` -""" - -import argparse -import os -import re -import sys - - -class ParseHeader: - """ - Creates an enriched version of a Kernel header file with cross-links - to each C data structure type. - - It is meant to allow having a more comprehensive documentation, where - uAPI headers will create cross-reference links to the code. - - It is capable of identifying defines, functions, structs, typedefs, - enums and enum symbols and create cross-references for all of them. - It is also capable of distinguish #define used for specifying a Linux - ioctl. - - By default, it create rules for all symbols and defines, but it also - allows parsing an exception file. Such file contains a set of rules - using the syntax below: - - 1. Ignore rules: - - ignore ` - - Removes the symbol from reference generation. - - 2. Replace rules: - - replace - - Replaces how old_symbol with a new reference. The new_reference can be: - - A simple symbol name; - - A full Sphinx reference. - - On both cases, can be: - - ioctl: for defines that end with _IO*, e.g. ioctl definitions - - define: for other defines - - symbol: for symbols defined within enums; - - typedef: for typedefs; - - enum: for the name of a non-anonymous enum; - - struct: for structs. - - Examples: - - ignore define __LINUX_MEDIA_H - ignore ioctl VIDIOC_ENUM_FMT - replace ioctl VIDIOC_DQBUF vidioc_qbuf - replace define V4L2_EVENT_MD_FL_HAVE_FRAME_SEQ :c:type:`v4l2_event_motion_det` - """ - - # Parser regexes with multiple ways to capture enums and structs - RE_ENUMS = [ - re.compile(r"^\s*enum\s+([\w_]+)\s*\{"), - re.compile(r"^\s*enum\s+([\w_]+)\s*$"), - re.compile(r"^\s*typedef\s*enum\s+([\w_]+)\s*\{"), - re.compile(r"^\s*typedef\s*enum\s+([\w_]+)\s*$"), - ] - RE_STRUCTS = [ - re.compile(r"^\s*struct\s+([_\w][\w\d_]+)\s*\{"), - re.compile(r"^\s*struct\s+([_\w][\w\d_]+)$"), - re.compile(r"^\s*typedef\s*struct\s+([_\w][\w\d_]+)\s*\{"), - re.compile(r"^\s*typedef\s*struct\s+([_\w][\w\d_]+)$"), - ] - - # FIXME: the original code was written a long time before Sphinx C - # domain to have multiple namespaces. To avoid to much turn at the - # existing hyperlinks, the code kept using "c:type" instead of the - # right types. To change that, we need to change the types not only - # here, but also at the uAPI media documentation. - DEF_SYMBOL_TYPES = { - "ioctl": { - "prefix": "\\ ", - "suffix": "\\ ", - "ref_type": ":ref", - }, - "define": { - "prefix": "\\ ", - "suffix": "\\ ", - "ref_type": ":ref", - }, - # We're calling each definition inside an enum as "symbol" - "symbol": { - "prefix": "\\ ", - "suffix": "\\ ", - "ref_type": ":ref", - }, - "typedef": { - "prefix": "\\ ", - "suffix": "\\ ", - "ref_type": ":c:type", - }, - # This is the name of the enum itself - "enum": { - "prefix": "\\ ", - "suffix": "\\ ", - "ref_type": ":c:type", - }, - "struct": { - "prefix": "\\ ", - "suffix": "\\ ", - "ref_type": ":c:type", - }, - } - - def __init__(self, debug: bool = False): - """Initialize internal vars""" - self.debug = debug - self.data = "" - - self.symbols = {} - - for symbol_type in self.DEF_SYMBOL_TYPES: - self.symbols[symbol_type] = {} - - def store_type(self, symbol_type: str, symbol: str, - ref_name: str = None, replace_underscores: bool = True): - """ - Stores a new symbol at self.symbols under symbol_type. - - By default, underscores are replaced by "-" - """ - defs = self.DEF_SYMBOL_TYPES[symbol_type] - - prefix = defs.get("prefix", "") - suffix = defs.get("suffix", "") - ref_type = defs.get("ref_type") - - # Determine ref_link based on symbol type - if ref_type: - if symbol_type == "enum": - ref_link = f"{ref_type}:`{symbol}`" - else: - if not ref_name: - ref_name = symbol.lower() - - # c-type references don't support hash - if ref_type == ":ref" and replace_underscores: - ref_name = ref_name.replace("_", "-") - - ref_link = f"{ref_type}:`{symbol} <{ref_name}>`" - else: - ref_link = symbol - - self.symbols[symbol_type][symbol] = f"{prefix}{ref_link}{suffix}" - - def store_line(self, line): - """Stores a line at self.data, properly indented""" - line = " " + line.expandtabs() - self.data += line.rstrip(" ") - - def parse_file(self, file_in: str): - """Reads a C source file and get identifiers""" - self.data = "" - is_enum = False - is_comment = False - multiline = "" - - with open(file_in, "r", - encoding="utf-8", errors="backslashreplace") as f: - for line_no, line in enumerate(f): - self.store_line(line) - line = line.strip("\n") - - # Handle continuation lines - if line.endswith(r"\\"): - multiline += line[-1] - continue - - if multiline: - line = multiline + line - multiline = "" - - # Handle comments. They can be multilined - if not is_comment: - if re.search(r"/\*.*", line): - is_comment = True - else: - # Strip C99-style comments - line = re.sub(r"(//.*)", "", line) - - if is_comment: - if re.search(r".*\*/", line): - is_comment = False - else: - multiline = line - continue - - # At this point, line variable may be a multilined statement, - # if lines end with \ or if they have multi-line comments - # With that, it can safely remove the entire comments, - # and there's no need to use re.DOTALL for the logic below - - line = re.sub(r"(/\*.*\*/)", "", line) - if not line.strip(): - continue - - # It can be useful for debug purposes to print the file after - # having comments stripped and multi-lines grouped. - if self.debug > 1: - print(f"line {line_no + 1}: {line}") - - # Now the fun begins: parse each type and store it. - - # We opted for a two parsing logic here due to: - # 1. it makes easier to debug issues not-parsed symbols; - # 2. we want symbol replacement at the entire content, not - # just when the symbol is detected. - - if is_enum: - match = re.match(r"^\s*([_\w][\w\d_]+)\s*[\,=]?", line) - if match: - self.store_type("symbol", match.group(1)) - if "}" in line: - is_enum = False - continue - - match = re.match(r"^\s*#\s*define\s+([\w_]+)\s+_IO", line) - if match: - self.store_type("ioctl", match.group(1), - replace_underscores=False) - continue - - match = re.match(r"^\s*#\s*define\s+([\w_]+)(\s+|$)", line) - if match: - self.store_type("define", match.group(1)) - continue - - match = re.match(r"^\s*typedef\s+([_\w][\w\d_]+)\s+(.*)\s+([_\w][\w\d_]+);", - line) - if match: - name = match.group(2).strip() - symbol = match.group(3) - self.store_type("typedef", symbol, ref_name=name) - continue - - for re_enum in self.RE_ENUMS: - match = re_enum.match(line) - if match: - self.store_type("enum", match.group(1)) - is_enum = True - break - - for re_struct in self.RE_STRUCTS: - match = re_struct.match(line) - if match: - self.store_type("struct", match.group(1)) - break - - def process_exceptions(self, fname: str): - """ - Process exceptions file with rules to ignore or replace references. - """ - if not fname: - return - - name = os.path.basename(fname) - - with open(fname, "r", encoding="utf-8", errors="backslashreplace") as f: - for ln, line in enumerate(f): - ln += 1 - line = line.strip() - if not line or line.startswith("#"): - continue - - # Handle ignore rules - match = re.match(r"^ignore\s+(\w+)\s+(\S+)", line) - if match: - c_type = match.group(1) - symbol = match.group(2) - - if c_type not in self.DEF_SYMBOL_TYPES: - sys.exit(f"{name}:{ln}: {c_type} is invalid") - - d = self.symbols[c_type] - if symbol in d: - del d[symbol] - - continue - - # Handle replace rules - match = re.match(r"^replace\s+(\S+)\s+(\S+)\s+(\S+)", line) - if not match: - sys.exit(f"{name}:{ln}: invalid line: {line}") - - c_type, old, new = match.groups() - - if c_type not in self.DEF_SYMBOL_TYPES: - sys.exit(f"{name}:{ln}: {c_type} is invalid") - - reftype = None - - # Parse reference type when the type is specified - - match = re.match(r"^\:c\:(data|func|macro|type)\:\`(.+)\`", new) - if match: - reftype = f":c:{match.group(1)}" - new = match.group(2) - else: - match = re.search(r"(\:ref)\:\`(.+)\`", new) - if match: - reftype = match.group(1) - new = match.group(2) - - # If the replacement rule doesn't have a type, get default - if not reftype: - reftype = self.DEF_SYMBOL_TYPES[c_type].get("ref_type") - if not reftype: - reftype = self.DEF_SYMBOL_TYPES[c_type].get("real_type") - - new_ref = f"{reftype}:`{old} <{new}>`" - - # Change self.symbols to use the replacement rule - if old in self.symbols[c_type]: - self.symbols[c_type][old] = new_ref - else: - print(f"{name}:{ln}: Warning: can't find {old} {c_type}") - - def debug_print(self): - """ - Print debug information containing the replacement rules per symbol. - To make easier to check, group them per type. - """ - if not self.debug: - return - - for c_type, refs in self.symbols.items(): - if not refs: # Skip empty dictionaries - continue - - print(f"{c_type}:") - - for symbol, ref in sorted(refs.items()): - print(f" {symbol} -> {ref}") - - print() - - def write_output(self, file_in: str, file_out: str): - """Write the formatted output to a file.""" - - # Avoid extra blank lines - text = re.sub(r"\s+$", "", self.data) + "\n" - text = re.sub(r"\n\s+\n", "\n\n", text) - - # Escape Sphinx special characters - text = re.sub(r"([\_\`\*\<\>\&\\\\:\/\|\%\$\#\{\}\~\^])", r"\\\1", text) - - # Source uAPI files may have special notes. Use bold font for them - text = re.sub(r"DEPRECATED", "**DEPRECATED**", text) - - # Delimiters to catch the entire symbol after escaped - start_delim = r"([ \n\t\(=\*\@])" - end_delim = r"(\s|,|\\=|\\:|\;|\)|\}|\{)" - - # Process all reference types - for ref_dict in self.symbols.values(): - for symbol, replacement in ref_dict.items(): - symbol = re.escape(re.sub(r"([\_\`\*\<\>\&\\\\:\/])", r"\\\1", symbol)) - text = re.sub(fr'{start_delim}{symbol}{end_delim}', - fr'\1{replacement}\2', text) - - # Remove "\ " where not needed: before spaces and at the end of lines - text = re.sub(r"\\ ([\n ])", r"\1", text) - text = re.sub(r" \\ ", " ", text) - - - title = os.path.basename(file_in) - - with open(file_out, "w", encoding="utf-8", errors="backslashreplace") as f: - f.write(".. -*- coding: utf-8; mode: rst -*-\n\n") - f.write(f"{title}\n") - f.write("=" * len(title)) - f.write("\n\n.. parsed-literal::\n\n") - f.write(text) - -class EnrichFormatter(argparse.HelpFormatter): - """ - Better format the output, making easier to identify the positional args - and how they're used at the __doc__ description. - """ - def __init__(self, *args, **kwargs): - """Initialize class and check if is TTY""" - super().__init__(*args, **kwargs) - self._tty = sys.stdout.isatty() - - def enrich_text(self, text): - """Handle ReST markups (currently, only ``foo``)""" - if self._tty and text: - # Replace ``text`` with ANSI bold - return re.sub(r'\`\`(.+?)\`\`', - lambda m: f'\033[1m{m.group(1)}\033[0m', text) - return text - - def _fill_text(self, text, width, indent): - """Enrich descriptions with markups on it""" - enriched = self.enrich_text(text) - return "\n".join(indent + line for line in enriched.splitlines()) - - def _format_usage(self, usage, actions, groups, prefix): - """Enrich positional arguments at usage: line""" - - prog = self._prog - parts = [] - - for action in actions: - if action.option_strings: - opt = action.option_strings[0] - if action.nargs != 0: - opt += f" {action.dest.upper()}" - parts.append(f"[{opt}]") - else: - # Positional argument - parts.append(self.enrich_text(f"``{action.dest.upper()}``")) - - usage_text = f"{prefix or 'usage: '} {prog} {' '.join(parts)}\n" - return usage_text - - def _format_action_invocation(self, action): - """Enrich argument names""" - if not action.option_strings: - return self.enrich_text(f"``{action.dest.upper()}``") - else: - return ", ".join(action.option_strings) - - -def main(): - """Main function""" - parser = argparse.ArgumentParser(description=__doc__, - formatter_class=EnrichFormatter) - - parser.add_argument("-d", "--debug", action="count", default=0, - help="Increase debug level. Can be used multiple times") - parser.add_argument("file_in", help="Input C file") - parser.add_argument("file_out", help="Output RST file") - parser.add_argument("file_rules", nargs="?", - help="Exceptions file (optional)") - - args = parser.parse_args() - - parser = ParseHeader(debug=args.debug) - parser.parse_file(args.file_in) - - if args.file_rules: - parser.process_exceptions(args.file_rules) - - parser.debug_print() - parser.write_output(args.file_in, args.file_out) - - -if __name__ == "__main__": - main() -- cgit v1.2.3 From 319d2a7ebe8ecf3377099a84d49f9b0043242c23 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:21 +0200 Subject: docs: uapi: media: Makefile: use parse-headers.py Now that we have a new parser, use it. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/7025759744f74058eee55c35e8cd8cb5a2953fca.1755872208.git.mchehab+huawei@kernel.org --- Documentation/userspace-api/media/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/userspace-api/media/Makefile b/Documentation/userspace-api/media/Makefile index 3d8aaf5c253b..accc734d045a 100644 --- a/Documentation/userspace-api/media/Makefile +++ b/Documentation/userspace-api/media/Makefile @@ -3,7 +3,7 @@ # Rules to convert a .h file to inline RST documentation SRC_DIR=$(srctree)/Documentation/userspace-api/media -PARSER = $(srctree)/Documentation/sphinx/parse-headers.pl +PARSER = $(srctree)/tools/docs/parse-headers.py UAPI = $(srctree)/include/uapi/linux KAPI = $(srctree)/include/linux -- cgit v1.2.3 From bb979965008793635a630ecdc7a3869c2fccd283 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:22 +0200 Subject: docs: kernel_include.py: Update its coding style With the help of tools like black, pylint, autopep8 and flake, improve the code style in preparation for further changes. No functional changes. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/f64c3af47fdfd632bb5f8eb88e3c7d94b0b84a66.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kernel_include.py | 100 ++++++++++++++++----------------- 1 file changed, 47 insertions(+), 53 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py index 1e566e87ebcd..1212786ac516 100755 --- a/Documentation/sphinx/kernel_include.py +++ b/Documentation/sphinx/kernel_include.py @@ -1,7 +1,6 @@ #!/usr/bin/env python3 -# -*- coding: utf-8; mode: python -*- # SPDX-License-Identifier: GPL-2.0 -# pylint: disable=R0903, C0330, R0914, R0912, E0401 +# pylint: disable=R0903, R0912, R0914, R0915, C0209,W0707 """ kernel-include @@ -40,41 +39,38 @@ from docutils.parsers.rst import directives from docutils.parsers.rst.directives.body import CodeBlock, NumberLines from docutils.parsers.rst.directives.misc import Include -__version__ = '1.0' +__version__ = "1.0" + # ============================================================================== def setup(app): -# ============================================================================== - + """Setup Sphinx exension""" app.add_directive("kernel-include", KernelInclude) - return dict( - version = __version__, - parallel_read_safe = True, - parallel_write_safe = True - ) + return { + "version": __version__, + "parallel_read_safe": True, + "parallel_write_safe": True, + } + # ============================================================================== class KernelInclude(Include): -# ============================================================================== - """KernelInclude (``kernel-include``) directive""" def run(self): env = self.state.document.settings.env - path = os.path.realpath( - os.path.expandvars(self.arguments[0])) + path = os.path.realpath(os.path.expandvars(self.arguments[0])) # to get a bit security back, prohibit /etc: if path.startswith(os.sep + "etc"): - raise self.severe( - 'Problems with "%s" directive, prohibited path: %s' - % (self.name, path)) + raise self.severe('Problems with "%s" directive, prohibited path: %s' % + (self.name, path)) self.arguments[0] = path env.note_dependency(os.path.abspath(path)) - #return super(KernelInclude, self).run() # won't work, see HINTs in _run() + # return super(KernelInclude, self).run() # won't work, see HINTs in _run() return self._run() def _run(self): @@ -87,41 +83,39 @@ class KernelInclude(Include): if not self.state.document.settings.file_insertion_enabled: raise self.warning('"%s" directive disabled.' % self.name) - source = self.state_machine.input_lines.source( - self.lineno - self.state_machine.input_offset - 1) + source = self.state_machine.input_lines.source(self.lineno - + self.state_machine.input_offset - 1) source_dir = os.path.dirname(os.path.abspath(source)) path = directives.path(self.arguments[0]) - if path.startswith('<') and path.endswith('>'): + if path.startswith("<") and path.endswith(">"): path = os.path.join(self.standard_include_path, path[1:-1]) path = os.path.normpath(os.path.join(source_dir, path)) # HINT: this is the only line I had to change / commented out: - #path = utils.relative_path(None, path) + # path = utils.relative_path(None, path) - encoding = self.options.get( - 'encoding', self.state.document.settings.input_encoding) - e_handler=self.state.document.settings.input_encoding_error_handler - tab_width = self.options.get( - 'tab-width', self.state.document.settings.tab_width) + encoding = self.options.get("encoding", + self.state.document.settings.input_encoding) + e_handler = self.state.document.settings.input_encoding_error_handler + tab_width = self.options.get("tab-width", + self.state.document.settings.tab_width) try: self.state.document.settings.record_dependencies.add(path) - include_file = io.FileInput(source_path=path, - encoding=encoding, + include_file = io.FileInput(source_path=path, encoding=encoding, error_handler=e_handler) - except UnicodeEncodeError as error: + except UnicodeEncodeError: raise self.severe('Problems with "%s" directive path:\n' 'Cannot encode input file path "%s" ' - '(wrong locale?).' % - (self.name, SafeString(path))) + "(wrong locale?)." % (self.name, SafeString(path))) except IOError as error: - raise self.severe('Problems with "%s" directive path:\n%s.' % - (self.name, ErrorString(error))) - startline = self.options.get('start-line', None) - endline = self.options.get('end-line', None) + raise self.severe('Problems with "%s" directive path:\n%s.' + % (self.name, ErrorString(error))) + startline = self.options.get("start-line", None) + endline = self.options.get("end-line", None) try: if startline or (endline is not None): lines = include_file.readlines() - rawtext = ''.join(lines[startline:endline]) + rawtext = "".join(lines[startline:endline]) else: rawtext = include_file.read() except UnicodeError as error: @@ -129,43 +123,43 @@ class KernelInclude(Include): (self.name, ErrorString(error))) # start-after/end-before: no restrictions on newlines in match-text, # and no restrictions on matching inside lines vs. line boundaries - after_text = self.options.get('start-after', None) + after_text = self.options.get("start-after", None) if after_text: # skip content in rawtext before *and incl.* a matching text after_index = rawtext.find(after_text) if after_index < 0: raise self.severe('Problem with "start-after" option of "%s" ' - 'directive:\nText not found.' % self.name) - rawtext = rawtext[after_index + len(after_text):] - before_text = self.options.get('end-before', None) + "directive:\nText not found." % self.name) + rawtext = rawtext[after_index + len(after_text) :] + before_text = self.options.get("end-before", None) if before_text: # skip content in rawtext after *and incl.* a matching text before_index = rawtext.find(before_text) if before_index < 0: raise self.severe('Problem with "end-before" option of "%s" ' - 'directive:\nText not found.' % self.name) + "directive:\nText not found." % self.name) rawtext = rawtext[:before_index] include_lines = statemachine.string2lines(rawtext, tab_width, convert_whitespace=True) - if 'literal' in self.options: + if "literal" in self.options: # Convert tabs to spaces, if `tab_width` is positive. if tab_width >= 0: text = rawtext.expandtabs(tab_width) else: text = rawtext literal_block = nodes.literal_block(rawtext, source=path, - classes=self.options.get('class', [])) + classes=self.options.get("class", []) + ) literal_block.line = 1 self.add_name(literal_block) - if 'number-lines' in self.options: + if "number-lines" in self.options: try: - startline = int(self.options['number-lines'] or 1) + startline = int(self.options["number-lines"] or 1) except ValueError: - raise self.error(':number-lines: with non-integer ' - 'start value') + raise self.error(":number-lines: with non-integer start value") endline = startline + len(include_lines) - if text.endswith('\n'): + if text.endswith("\n"): text = text[:-1] tokens = NumberLines([([], text)], startline, endline) for classes, value in tokens: @@ -177,12 +171,12 @@ class KernelInclude(Include): else: literal_block += nodes.Text(text, text) return [literal_block] - if 'code' in self.options: - self.options['source'] = path + if "code" in self.options: + self.options["source"] = path codeblock = CodeBlock(self.name, - [self.options.pop('code')], # arguments + [self.options.pop("code")], # arguments self.options, - include_lines, # content + include_lines, # content self.lineno, self.content_offset, self.block_text, -- cgit v1.2.3 From 0cb6aee3584604ceecdbc3bcc00d017f9a827873 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:23 +0200 Subject: docs: kernel_include.py: allow cross-reference generation kernel_include extension was originally designed to be used by the media comprehensive uAPI documentation, where, instead of simpler kernel-doc markups, the uAPI documentation is enriched with a larger text, with images, complex tables, graphs, etc. There, we wanted to include the much simpler yet documented .h file. This extension is needed to include files from other parts of the Kernel tree outside Documentation, because the original Sphinx include tag doesn't allow going outside of the directory passed via sphinx-build command line. Yet, the cross-references themselves to the full documentation were using a perl script to create cross-references against the comprehensive documentation. As the perl script is now converted to Phython and there is a Python class producing an include-compatible output with cross references, add two optional arguments to kernel_include.py: 1. :generate-cross-refs: If present, instead of reading the file, it calls ParseDataStructs() class, which converts C data structures into cross-references to be linked to ReST files containing a more comprehensive documentation; Don't use it together with :start-line: and/or :end-line:, as filtering input file line range is currently not supported. 2. :exception-file: Used together with :generate-cross-refs:. Points to a file containing rules to ignore C data structs or to use a different reference name, optionally using a different reference type. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/efc39c8e54a2056ae2fdb94d5006fcb19e227198.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kernel_include.py | 94 ++++++++++++++++++++++++++-------- 1 file changed, 74 insertions(+), 20 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py index 1212786ac516..fc37e6fa9d96 100755 --- a/Documentation/sphinx/kernel_include.py +++ b/Documentation/sphinx/kernel_include.py @@ -25,6 +25,24 @@ Substrings of the form $name or ${name} are replaced by the value of environment variable name. Malformed variable names and references to non-existing variables are left unchanged. + + This extension overrides Sphinx include directory, adding two extra + arguments: + + 1. :generate-cross-refs: + + If present, instead of reading the file, it calls ParseDataStructs() + class, which converts C data structures into cross-references to + be linked to ReST files containing a more comprehensive documentation; + + Don't use it together with :start-line: and/or :end-line:, as + filtering input file line range is currently not supported. + + 2. :exception-file: + + Used together with :generate-cross-refs:. Points to a file containing + rules to ignore C data structs or to use a different reference name, + optionally using a different reference type. """ # ============================================================================== @@ -32,6 +50,7 @@ # ============================================================================== import os.path +import sys from docutils import io, nodes, statemachine from docutils.utils.error_reporting import SafeString, ErrorString @@ -39,6 +58,11 @@ from docutils.parsers.rst import directives from docutils.parsers.rst.directives.body import CodeBlock, NumberLines from docutils.parsers.rst.directives.misc import Include +srctree = os.path.abspath(os.environ["srctree"]) +sys.path.insert(0, os.path.join(srctree, "tools/docs/lib")) + +from parse_data_structs import ParseDataStructs + __version__ = "1.0" @@ -57,6 +81,14 @@ def setup(app): class KernelInclude(Include): """KernelInclude (``kernel-include``) directive""" + # Add extra options + option_spec = Include.option_spec.copy() + + option_spec.update({ + 'generate-cross-refs': directives.flag, + 'exception-file': directives.unchanged, + }) + def run(self): env = self.state.document.settings.env path = os.path.realpath(os.path.expandvars(self.arguments[0])) @@ -99,28 +131,49 @@ class KernelInclude(Include): e_handler = self.state.document.settings.input_encoding_error_handler tab_width = self.options.get("tab-width", self.state.document.settings.tab_width) - try: - self.state.document.settings.record_dependencies.add(path) - include_file = io.FileInput(source_path=path, encoding=encoding, - error_handler=e_handler) - except UnicodeEncodeError: - raise self.severe('Problems with "%s" directive path:\n' - 'Cannot encode input file path "%s" ' - "(wrong locale?)." % (self.name, SafeString(path))) - except IOError as error: - raise self.severe('Problems with "%s" directive path:\n%s.' - % (self.name, ErrorString(error))) startline = self.options.get("start-line", None) endline = self.options.get("end-line", None) - try: - if startline or (endline is not None): - lines = include_file.readlines() - rawtext = "".join(lines[startline:endline]) - else: - rawtext = include_file.read() - except UnicodeError as error: - raise self.severe('Problem with "%s" directive:\n%s' % - (self.name, ErrorString(error))) + + # Get optional arguments to related to cross-references generation + if 'generate-cross-refs' in self.options: + parser = ParseDataStructs() + parser.parse_file(path) + + exceptions_file = self.options.get('exception-file') + if exceptions_file: + exceptions_file = os.path.join(source_dir, exceptions_file) + parser.process_exceptions(exceptions_file) + + title = os.path.basename(path) + rawtext = parser.gen_output() + if startline or endline: + raise self.severe('generate-cross-refs can\'t be used together with "start-line" or "end-line"') + + if "code" not in self.options: + rawtext = ".. parsed-literal::\n\n" + rawtext + else: + try: + self.state.document.settings.record_dependencies.add(path) + include_file = io.FileInput(source_path=path, encoding=encoding, + error_handler=e_handler) + except UnicodeEncodeError: + raise self.severe('Problems with "%s" directive path:\n' + 'Cannot encode input file path "%s" ' + "(wrong locale?)." % (self.name, SafeString(path))) + except IOError as error: + raise self.severe('Problems with "%s" directive path:\n%s.' + % (self.name, ErrorString(error))) + + try: + if startline or (endline is not None): + lines = include_file.readlines() + rawtext = "".join(lines[startline:endline]) + else: + rawtext = include_file.read() + except UnicodeError as error: + raise self.severe('Problem with "%s" directive:\n%s' % + (self.name, ErrorString(error))) + # start-after/end-before: no restrictions on newlines in match-text, # and no restrictions on matching inside lines vs. line boundaries after_text = self.options.get("start-after", None) @@ -171,6 +224,7 @@ class KernelInclude(Include): else: literal_block += nodes.Text(text, text) return [literal_block] + if "code" in self.options: self.options["source"] = path codeblock = CodeBlock(self.name, -- cgit v1.2.3 From 39f5f2fa8c959eb897416e928d12f6aec1e7d5e4 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:24 +0200 Subject: docs: kernel_include.py: generate warnings for broken refs In the past, Sphinx used to warn about broken references. That's basically the rationale for adding media uAPI files: to get warnings about missed symbols. This is not true anymore. So, we need to explicitly check them after doctree-resolved event. While here, move setup() to the end, to make it closer to what we do on other extensions. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/73be9a198746421687e2eee916ccf8bf67980b7d.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kernel_include.py | 108 +++++++++++++++++++++++++++------ 1 file changed, 89 insertions(+), 19 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py index fc37e6fa9d96..0a3e5377dd1e 100755 --- a/Documentation/sphinx/kernel_include.py +++ b/Documentation/sphinx/kernel_include.py @@ -26,7 +26,7 @@ environment variable name. Malformed variable names and references to non-existing variables are left unchanged. - This extension overrides Sphinx include directory, adding two extra + This extension overrides Sphinx include directory, adding some extra arguments: 1. :generate-cross-refs: @@ -35,14 +35,20 @@ class, which converts C data structures into cross-references to be linked to ReST files containing a more comprehensive documentation; - Don't use it together with :start-line: and/or :end-line:, as - filtering input file line range is currently not supported. - 2. :exception-file: - Used together with :generate-cross-refs:. Points to a file containing - rules to ignore C data structs or to use a different reference name, - optionally using a different reference type. + Used together with :generate-cross-refs + + Points to a file containing rules to ignore C data structs or to + use a different reference name, optionally using a different + reference type. + + 3. :warn-broken: + + Used together with :generate-cross-refs: + + Detect if the auto-generated cross references doesn't exist. + """ # ============================================================================== @@ -50,6 +56,7 @@ # ============================================================================== import os.path +import re import sys from docutils import io, nodes, statemachine @@ -58,23 +65,18 @@ from docutils.parsers.rst import directives from docutils.parsers.rst.directives.body import CodeBlock, NumberLines from docutils.parsers.rst.directives.misc import Include +from sphinx.util import logging + srctree = os.path.abspath(os.environ["srctree"]) sys.path.insert(0, os.path.join(srctree, "tools/docs/lib")) from parse_data_structs import ParseDataStructs __version__ = "1.0" +logger = logging.getLogger(__name__) - -# ============================================================================== -def setup(app): - """Setup Sphinx exension""" - app.add_directive("kernel-include", KernelInclude) - return { - "version": __version__, - "parallel_read_safe": True, - "parallel_write_safe": True, - } +RE_DOMAIN_REF = re.compile(r'\\ :(ref|c:type|c:func):`([^<`]+)(?:<([^>]+)>)?`\\') +RE_SIMPLE_REF = re.compile(r'`([^`]+)`') # ============================================================================== @@ -86,6 +88,7 @@ class KernelInclude(Include): option_spec.update({ 'generate-cross-refs': directives.flag, + 'warn-broken': directives.flag, 'exception-file': directives.unchanged, }) @@ -103,9 +106,9 @@ class KernelInclude(Include): env.note_dependency(os.path.abspath(path)) # return super(KernelInclude, self).run() # won't work, see HINTs in _run() - return self._run() + return self._run(env) - def _run(self): + def _run(self, env): """Include a file as part of the content of this reST file.""" # HINT: I had to copy&paste the whole Include.run method. I'am not happy @@ -151,6 +154,10 @@ class KernelInclude(Include): if "code" not in self.options: rawtext = ".. parsed-literal::\n\n" + rawtext + + # Store references on a symbol dict to be used at check time + if 'warn-broken' in self.options: + env._xref_files.add(path) else: try: self.state.document.settings.record_dependencies.add(path) @@ -239,3 +246,66 @@ class KernelInclude(Include): return codeblock.run() self.state_machine.insert_input(include_lines, path) return [] + +# ============================================================================== + +reported = set() + +def check_missing_refs(app, env, node, contnode): + """Check broken refs for the files it creates xrefs""" + if not node.source: + return None + + try: + xref_files = env._xref_files + except AttributeError: + logger.critical("FATAL: _xref_files not initialized!") + raise + + # Only show missing references for kernel-include reference-parsed files + if node.source not in xref_files: + return None + + target = node.get('reftarget', '') + domain = node.get('refdomain', 'std') + reftype = node.get('reftype', '') + + msg = f"can't link to: {domain}:{reftype}:: {target}" + + # Don't duplicate warnings + data = (node.source, msg) + if data in reported: + return None + reported.add(data) + + logger.warning(msg, location=node, type='ref', subtype='missing') + + return None + +def merge_xref_info(app, env, docnames, other): + """ + As each process modify env._xref_files, we need to merge them back. + """ + if not hasattr(other, "_xref_files"): + return + env._xref_files.update(getattr(other, "_xref_files", set())) + +def init_xref_docs(app, env, docnames): + """Initialize a list of files that we're generating cross references¨""" + app.env._xref_files = set() + +# ============================================================================== + +def setup(app): + """Setup Sphinx exension""" + + app.connect("env-before-read-docs", init_xref_docs) + app.connect("env-merge-info", merge_xref_info) + app.add_directive("kernel-include", KernelInclude) + app.connect("missing-reference", check_missing_refs) + + return { + "version": __version__, + "parallel_read_safe": True, + "parallel_write_safe": True, + } -- cgit v1.2.3 From 012e00dda347e72a6079c6d21f0c8f97333cc477 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:25 +0200 Subject: docs: kernel_include.py: move rawtext logic to separate functions The run function is too complex. merge run() and _run() into a single function and move the read logic to separate functions. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/04776a94c85b6c931c198a149f08b299c9f571a3.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kernel_include.py | 82 ++++++++++++++++++---------------- 1 file changed, 43 insertions(+), 39 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py index 0a3e5377dd1e..ef86ee9e79d6 100755 --- a/Documentation/sphinx/kernel_include.py +++ b/Documentation/sphinx/kernel_include.py @@ -92,7 +92,47 @@ class KernelInclude(Include): 'exception-file': directives.unchanged, }) + def read_rawtext(self, path, encoding): + """Read and process file content with error handling""" + try: + self.state.document.settings.record_dependencies.add(path) + include_file = io.FileInput(source_path=path, + encoding=encoding, + error_handler=self.state.document.settings.input_encoding_error_handler) + except UnicodeEncodeError: + raise self.severe('Problems with directive path:\n' + 'Cannot encode input file path "%s" ' + '(wrong locale?).' % SafeString(path)) + except IOError as error: + raise self.severe('Problems with directive path:\n%s.' % ErrorString(error)) + + try: + return include_file.read() + except UnicodeError as error: + raise self.severe('Problem with directive:\n%s' % ErrorString(error)) + + def read_rawtext_with_xrefs(self, env, path): + parser = ParseDataStructs() + parser.parse_file(path) + + if 'exception-file' in self.options: + source_dir = os.path.dirname(os.path.abspath( + self.state_machine.input_lines.source( + self.lineno - self.state_machine.input_offset - 1))) + exceptions_file = os.path.join(source_dir, self.options['exception-file']) + parser.process_exceptions(exceptions_file) + + if self.options.get("start-line") or self.options.get("end-line"): + raise self.severe('generate-cross-refs can\'t be used with "start-line" or "end-line"') + + # Store references on a symbol dict to be used at check time + if 'warn-broken' in self.options: + env._xref_files.add(path) + + return parser.gen_output() + def run(self): + """Include a file as part of the content of this reST file.""" env = self.state.document.settings.env path = os.path.realpath(os.path.expandvars(self.arguments[0])) @@ -105,12 +145,6 @@ class KernelInclude(Include): env.note_dependency(os.path.abspath(path)) - # return super(KernelInclude, self).run() # won't work, see HINTs in _run() - return self._run(env) - - def _run(self, env): - """Include a file as part of the content of this reST file.""" - # HINT: I had to copy&paste the whole Include.run method. I'am not happy # with this, but due to security reasons, the Include.run method does # not allow absolute or relative pathnames pointing to locations *above* @@ -139,47 +173,17 @@ class KernelInclude(Include): # Get optional arguments to related to cross-references generation if 'generate-cross-refs' in self.options: - parser = ParseDataStructs() - parser.parse_file(path) - - exceptions_file = self.options.get('exception-file') - if exceptions_file: - exceptions_file = os.path.join(source_dir, exceptions_file) - parser.process_exceptions(exceptions_file) + rawtext = self.read_rawtext_with_xrefs(env, path) title = os.path.basename(path) - rawtext = parser.gen_output() + if startline or endline: raise self.severe('generate-cross-refs can\'t be used together with "start-line" or "end-line"') if "code" not in self.options: rawtext = ".. parsed-literal::\n\n" + rawtext - - # Store references on a symbol dict to be used at check time - if 'warn-broken' in self.options: - env._xref_files.add(path) else: - try: - self.state.document.settings.record_dependencies.add(path) - include_file = io.FileInput(source_path=path, encoding=encoding, - error_handler=e_handler) - except UnicodeEncodeError: - raise self.severe('Problems with "%s" directive path:\n' - 'Cannot encode input file path "%s" ' - "(wrong locale?)." % (self.name, SafeString(path))) - except IOError as error: - raise self.severe('Problems with "%s" directive path:\n%s.' - % (self.name, ErrorString(error))) - - try: - if startline or (endline is not None): - lines = include_file.readlines() - rawtext = "".join(lines[startline:endline]) - else: - rawtext = include_file.read() - except UnicodeError as error: - raise self.severe('Problem with "%s" directive:\n%s' % - (self.name, ErrorString(error))) + rawtext = self.read_rawtext(path, encoding) # start-after/end-before: no restrictions on newlines in match-text, # and no restrictions on matching inside lines vs. line boundaries -- cgit v1.2.3 From 3f7f3d494119170dc6636228e8425048effa2931 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:26 +0200 Subject: docs: kernel_include.py: move range logic to a separate function Cleanup run() function by moving the range logic to a separate function. Here, I ended checking the current Sphinx implementation, as it has some extra logic for the range check. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/12fa2204a9e7e309ae4b8694a37ebad9327ca634.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kernel_include.py | 51 ++++++++++++++++++++++------------ 1 file changed, 33 insertions(+), 18 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py index ef86ee9e79d6..c5f4f34e22cb 100755 --- a/Documentation/sphinx/kernel_include.py +++ b/Documentation/sphinx/kernel_include.py @@ -131,6 +131,38 @@ class KernelInclude(Include): return parser.gen_output() + def apply_range(self, rawtext): + # Get to-be-included content + startline = self.options.get('start-line', None) + endline = self.options.get('end-line', None) + try: + if startline or (endline is not None): + lines = rawtext.splitlines() + rawtext = '\n'.join(lines[startline:endline]) + except UnicodeError as error: + raise self.severe(f'Problem with "{self.name}" directive:\n' + + io.error_string(error)) + # start-after/end-before: no restrictions on newlines in match-text, + # and no restrictions on matching inside lines vs. line boundaries + after_text = self.options.get("start-after", None) + if after_text: + # skip content in rawtext before *and incl.* a matching text + after_index = rawtext.find(after_text) + if after_index < 0: + raise self.severe('Problem with "start-after" option of "%s" ' + "directive:\nText not found." % self.name) + rawtext = rawtext[after_index + len(after_text) :] + before_text = self.options.get("end-before", None) + if before_text: + # skip content in rawtext after *and incl.* a matching text + before_index = rawtext.find(before_text) + if before_index < 0: + raise self.severe('Problem with "end-before" option of "%s" ' + "directive:\nText not found." % self.name) + rawtext = rawtext[:before_index] + + return rawtext + def run(self): """Include a file as part of the content of this reST file.""" env = self.state.document.settings.env @@ -185,24 +217,7 @@ class KernelInclude(Include): else: rawtext = self.read_rawtext(path, encoding) - # start-after/end-before: no restrictions on newlines in match-text, - # and no restrictions on matching inside lines vs. line boundaries - after_text = self.options.get("start-after", None) - if after_text: - # skip content in rawtext before *and incl.* a matching text - after_index = rawtext.find(after_text) - if after_index < 0: - raise self.severe('Problem with "start-after" option of "%s" ' - "directive:\nText not found." % self.name) - rawtext = rawtext[after_index + len(after_text) :] - before_text = self.options.get("end-before", None) - if before_text: - # skip content in rawtext after *and incl.* a matching text - before_index = rawtext.find(before_text) - if before_index < 0: - raise self.severe('Problem with "end-before" option of "%s" ' - "directive:\nText not found." % self.name) - rawtext = rawtext[:before_index] + rawtext = self.apply_range(rawtext) include_lines = statemachine.string2lines(rawtext, tab_width, convert_whitespace=True) -- cgit v1.2.3 From 67faed5d213d87f3b5bdfc78a12d1d9d3e7aac46 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:27 +0200 Subject: docs: kernel_include.py: remove range restriction for gen docs Originally, parse-readers were generating an output where the first two lines were setting a literal block. The script now gets only the actual parsed data without that, so it is now safe to allow start-line and end-line parameters to be handled. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/5dff693860a6a3faade15c24abdc380f09db468d.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kernel_include.py | 6 ------ 1 file changed, 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py index c5f4f34e22cb..4cdd1c77982e 100755 --- a/Documentation/sphinx/kernel_include.py +++ b/Documentation/sphinx/kernel_include.py @@ -122,9 +122,6 @@ class KernelInclude(Include): exceptions_file = os.path.join(source_dir, self.options['exception-file']) parser.process_exceptions(exceptions_file) - if self.options.get("start-line") or self.options.get("end-line"): - raise self.severe('generate-cross-refs can\'t be used with "start-line" or "end-line"') - # Store references on a symbol dict to be used at check time if 'warn-broken' in self.options: env._xref_files.add(path) @@ -209,9 +206,6 @@ class KernelInclude(Include): title = os.path.basename(path) - if startline or endline: - raise self.severe('generate-cross-refs can\'t be used together with "start-line" or "end-line"') - if "code" not in self.options: rawtext = ".. parsed-literal::\n\n" + rawtext else: -- cgit v1.2.3 From 9be2a5c3c8b7aad78341677002c428c996cc9570 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:28 +0200 Subject: docs: kernel_include.py: move code and literal functions Simplify run() even more by moving the code which handles with code and literal blocks to their own functions. No functional changes. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/78d08dfa3f08adabc30bf93b8a1cde4e19b7bd41.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kernel_include.py | 102 +++++++++++++++++++-------------- 1 file changed, 60 insertions(+), 42 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py index 4cdd1c77982e..0909eb3a07ea 100755 --- a/Documentation/sphinx/kernel_include.py +++ b/Documentation/sphinx/kernel_include.py @@ -160,6 +160,52 @@ class KernelInclude(Include): return rawtext + def literal(self, path, tab_width, rawtext): + """Output a literal block""" + + # Convert tabs to spaces, if `tab_width` is positive. + if tab_width >= 0: + text = rawtext.expandtabs(tab_width) + else: + text = rawtext + literal_block = nodes.literal_block(rawtext, source=path, + classes=self.options.get("class", [])) + literal_block.line = 1 + self.add_name(literal_block) + if "number-lines" in self.options: + try: + startline = int(self.options["number-lines"] or 1) + except ValueError: + raise self.error(":number-lines: with non-integer start value") + endline = startline + len(include_lines) + if text.endswith("\n"): + text = text[:-1] + tokens = NumberLines([([], text)], startline, endline) + for classes, value in tokens: + if classes: + literal_block += nodes.inline(value, value, + classes=classes) + else: + literal_block += nodes.Text(value, value) + else: + literal_block += nodes.Text(text, text) + return [literal_block] + + def code(self, path, include_lines): + """Output a code block""" + + self.options["source"] = path + codeblock = CodeBlock(self.name, + [self.options.pop("code")], # arguments + self.options, + include_lines, + self.lineno, + self.content_offset, + self.block_text, + self.state, + self.state_machine) + return codeblock.run() + def run(self): """Include a file as part of the content of this reST file.""" env = self.state.document.settings.env @@ -200,6 +246,13 @@ class KernelInclude(Include): startline = self.options.get("start-line", None) endline = self.options.get("end-line", None) + if "literal" in self.options: + ouptut_type = "literal" + elif "code" in self.options: + ouptut_type = "code" + else: + ouptut_type = "normal" + # Get optional arguments to related to cross-references generation if 'generate-cross-refs' in self.options: rawtext = self.read_rawtext_with_xrefs(env, path) @@ -213,50 +266,15 @@ class KernelInclude(Include): rawtext = self.apply_range(rawtext) + if ouptut_type == "literal": + return self.literal(path, tab_width, rawtext) + include_lines = statemachine.string2lines(rawtext, tab_width, convert_whitespace=True) - if "literal" in self.options: - # Convert tabs to spaces, if `tab_width` is positive. - if tab_width >= 0: - text = rawtext.expandtabs(tab_width) - else: - text = rawtext - literal_block = nodes.literal_block(rawtext, source=path, - classes=self.options.get("class", []) - ) - literal_block.line = 1 - self.add_name(literal_block) - if "number-lines" in self.options: - try: - startline = int(self.options["number-lines"] or 1) - except ValueError: - raise self.error(":number-lines: with non-integer start value") - endline = startline + len(include_lines) - if text.endswith("\n"): - text = text[:-1] - tokens = NumberLines([([], text)], startline, endline) - for classes, value in tokens: - if classes: - literal_block += nodes.inline(value, value, - classes=classes) - else: - literal_block += nodes.Text(value, value) - else: - literal_block += nodes.Text(text, text) - return [literal_block] - - if "code" in self.options: - self.options["source"] = path - codeblock = CodeBlock(self.name, - [self.options.pop("code")], # arguments - self.options, - include_lines, # content - self.lineno, - self.content_offset, - self.block_text, - self.state, - self.state_machine) - return codeblock.run() + + if ouptut_type == "code": + return self.code(path, include_lines) + self.state_machine.insert_input(include_lines, path) return [] -- cgit v1.2.3 From e4d91787deffffa64abd397315d4f7e4a3cf02f3 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:29 +0200 Subject: docs: kernel_include.py: add support to generate a TOC table When generate-cross-refs is used, instead of just implementing the default of generating a literal block, we can also generate a ReST file as a TOC. The advantage is that, by being a ReST file, missing references will point to the place inside the header file that has the broken link. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/c0d32cd1ef94017e05984b0a38bd2516f7db21e2.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kernel_include.py | 36 +++++++++++++++++++++------------- 1 file changed, 22 insertions(+), 14 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py index 0909eb3a07ea..79682408105e 100755 --- a/Documentation/sphinx/kernel_include.py +++ b/Documentation/sphinx/kernel_include.py @@ -89,6 +89,7 @@ class KernelInclude(Include): option_spec.update({ 'generate-cross-refs': directives.flag, 'warn-broken': directives.flag, + 'toc': directives.flag, 'exception-file': directives.unchanged, }) @@ -111,7 +112,7 @@ class KernelInclude(Include): except UnicodeError as error: raise self.severe('Problem with directive:\n%s' % ErrorString(error)) - def read_rawtext_with_xrefs(self, env, path): + def read_rawtext_with_xrefs(self, env, path, output_type): parser = ParseDataStructs() parser.parse_file(path) @@ -126,7 +127,10 @@ class KernelInclude(Include): if 'warn-broken' in self.options: env._xref_files.add(path) - return parser.gen_output() + if output_type == "toc": + return parser.gen_toc() + + return ".. parsed-literal::\n\n" + parser.gen_output() def apply_range(self, rawtext): # Get to-be-included content @@ -243,39 +247,43 @@ class KernelInclude(Include): e_handler = self.state.document.settings.input_encoding_error_handler tab_width = self.options.get("tab-width", self.state.document.settings.tab_width) - startline = self.options.get("start-line", None) - endline = self.options.get("end-line", None) if "literal" in self.options: - ouptut_type = "literal" + output_type = "literal" elif "code" in self.options: - ouptut_type = "code" + output_type = "code" else: - ouptut_type = "normal" + output_type = "rst" # Get optional arguments to related to cross-references generation - if 'generate-cross-refs' in self.options: - rawtext = self.read_rawtext_with_xrefs(env, path) + if "generate-cross-refs" in self.options: + if "toc" in self.options: + output_type = "toc" - title = os.path.basename(path) + rawtext = self.read_rawtext_with_xrefs(env, path, output_type) + + # When :generate-cross-refs: is used, the input is always a C + # file, so it has to be handled as a parsed-literal + if output_type == "rst": + output_type = "literal" - if "code" not in self.options: - rawtext = ".. parsed-literal::\n\n" + rawtext + title = os.path.basename(path) else: rawtext = self.read_rawtext(path, encoding) rawtext = self.apply_range(rawtext) - if ouptut_type == "literal": + if output_type == "literal": return self.literal(path, tab_width, rawtext) include_lines = statemachine.string2lines(rawtext, tab_width, convert_whitespace=True) - if ouptut_type == "code": + if output_type == "code": return self.code(path, include_lines) self.state_machine.insert_input(include_lines, path) + return [] # ============================================================================== -- cgit v1.2.3 From 4ad9cabc34d1b45ef77fa9c70e446658f6f5934b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:30 +0200 Subject: docs: kernel_include.py: append line numbers to better report errors It is best to point to the original line of code that generated an error than to point to the beginning of a directive. Add support for it. It should be noticed that this won't work for literal or code blocks, as Sphinx will ignore it, pointing to the beginning of the directive. Yet, when the output is known to be in ReST format, like on TOC, this makes the error a lot more easier to be handled. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/a0953af8b71e64aaf2e0ba4593ad39e19587d50a.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kernel_include.py | 81 ++++++++++++++++++---------------- 1 file changed, 44 insertions(+), 37 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py index 79682408105e..90ed8428f776 100755 --- a/Documentation/sphinx/kernel_include.py +++ b/Documentation/sphinx/kernel_include.py @@ -60,6 +60,7 @@ import re import sys from docutils import io, nodes, statemachine +from docutils.statemachine import ViewList from docutils.utils.error_reporting import SafeString, ErrorString from docutils.parsers.rst import directives from docutils.parsers.rst.directives.body import CodeBlock, NumberLines @@ -112,7 +113,14 @@ class KernelInclude(Include): except UnicodeError as error: raise self.severe('Problem with directive:\n%s' % ErrorString(error)) - def read_rawtext_with_xrefs(self, env, path, output_type): + def xref_text(self, env, path, tab_width): + """ + Read and add contents from a C file parsed to have cross references. + + There are two types of supported output here: + - A C source code with cross-references; + - a TOC table containing cross references. + """ parser = ParseDataStructs() parser.parse_file(path) @@ -127,10 +135,33 @@ class KernelInclude(Include): if 'warn-broken' in self.options: env._xref_files.add(path) - if output_type == "toc": - return parser.gen_toc() + if "toc" in self.options: + rawtext = parser.gen_toc() + else: + rawtext = ".. parsed-literal::\n\n" + parser.gen_output() + self.apply_range(rawtext) + + title = os.path.basename(path) + + include_lines = statemachine.string2lines(rawtext, tab_width, + convert_whitespace=True) - return ".. parsed-literal::\n\n" + parser.gen_output() + # Append line numbers data + + startline = self.options.get('start-line', None) + + result = ViewList() + if startline and startline > 0: + offset = startline - 1 + else: + offset = 0 + + for ln, line in enumerate(include_lines, start=offset): + result.append(line, path, ln) + + self.state_machine.insert_input(result, path) + + return [] def apply_range(self, rawtext): # Get to-be-included content @@ -195,9 +226,12 @@ class KernelInclude(Include): literal_block += nodes.Text(text, text) return [literal_block] - def code(self, path, include_lines): + def code(self, path, tab_width): """Output a code block""" + include_lines = statemachine.string2lines(rawtext, tab_width, + convert_whitespace=True) + self.options["source"] = path codeblock = CodeBlock(self.name, [self.options.pop("code")], # arguments @@ -244,47 +278,20 @@ class KernelInclude(Include): encoding = self.options.get("encoding", self.state.document.settings.input_encoding) - e_handler = self.state.document.settings.input_encoding_error_handler tab_width = self.options.get("tab-width", self.state.document.settings.tab_width) - if "literal" in self.options: - output_type = "literal" - elif "code" in self.options: - output_type = "code" - else: - output_type = "rst" - # Get optional arguments to related to cross-references generation if "generate-cross-refs" in self.options: - if "toc" in self.options: - output_type = "toc" - - rawtext = self.read_rawtext_with_xrefs(env, path, output_type) - - # When :generate-cross-refs: is used, the input is always a C - # file, so it has to be handled as a parsed-literal - if output_type == "rst": - output_type = "literal" - - title = os.path.basename(path) - else: - rawtext = self.read_rawtext(path, encoding) + return self.xref_text(env, path, tab_width) + rawtext = self.read_rawtext(path, encoding) rawtext = self.apply_range(rawtext) - if output_type == "literal": - return self.literal(path, tab_width, rawtext) - - include_lines = statemachine.string2lines(rawtext, tab_width, - convert_whitespace=True) + if "code" in self.options: + return self.code(path, tab_width, rawtext) - if output_type == "code": - return self.code(path, include_lines) - - self.state_machine.insert_input(include_lines, path) - - return [] + return self.literal(path, tab_width, rawtext) # ============================================================================== -- cgit v1.2.3 From 01dba1680cb4047d4f6e057276f805f93b7eea00 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:31 +0200 Subject: docs: kernel_include.py: move apply_range() and add a docstring While not required, better to have caller functions at the end. As apply_range() is now called by xref_text(), move it to be before the latter. No functional changes. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/a6ce0fd7c03a01338753fd81ed0c4631f78311d6.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kernel_include.py | 68 ++++++++++++++++++---------------- 1 file changed, 36 insertions(+), 32 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py index 90ed8428f776..fd4887f80577 100755 --- a/Documentation/sphinx/kernel_include.py +++ b/Documentation/sphinx/kernel_include.py @@ -113,6 +113,42 @@ class KernelInclude(Include): except UnicodeError as error: raise self.severe('Problem with directive:\n%s' % ErrorString(error)) + def apply_range(self, rawtext): + """ + Handles start-line, end-line, start-after and end-before parameters + """ + + # Get to-be-included content + startline = self.options.get('start-line', None) + endline = self.options.get('end-line', None) + try: + if startline or (endline is not None): + lines = rawtext.splitlines() + rawtext = '\n'.join(lines[startline:endline]) + except UnicodeError as error: + raise self.severe(f'Problem with "{self.name}" directive:\n' + + io.error_string(error)) + # start-after/end-before: no restrictions on newlines in match-text, + # and no restrictions on matching inside lines vs. line boundaries + after_text = self.options.get("start-after", None) + if after_text: + # skip content in rawtext before *and incl.* a matching text + after_index = rawtext.find(after_text) + if after_index < 0: + raise self.severe('Problem with "start-after" option of "%s" ' + "directive:\nText not found." % self.name) + rawtext = rawtext[after_index + len(after_text) :] + before_text = self.options.get("end-before", None) + if before_text: + # skip content in rawtext after *and incl.* a matching text + before_index = rawtext.find(before_text) + if before_index < 0: + raise self.severe('Problem with "end-before" option of "%s" ' + "directive:\nText not found." % self.name) + rawtext = rawtext[:before_index] + + return rawtext + def xref_text(self, env, path, tab_width): """ Read and add contents from a C file parsed to have cross references. @@ -163,38 +199,6 @@ class KernelInclude(Include): return [] - def apply_range(self, rawtext): - # Get to-be-included content - startline = self.options.get('start-line', None) - endline = self.options.get('end-line', None) - try: - if startline or (endline is not None): - lines = rawtext.splitlines() - rawtext = '\n'.join(lines[startline:endline]) - except UnicodeError as error: - raise self.severe(f'Problem with "{self.name}" directive:\n' - + io.error_string(error)) - # start-after/end-before: no restrictions on newlines in match-text, - # and no restrictions on matching inside lines vs. line boundaries - after_text = self.options.get("start-after", None) - if after_text: - # skip content in rawtext before *and incl.* a matching text - after_index = rawtext.find(after_text) - if after_index < 0: - raise self.severe('Problem with "start-after" option of "%s" ' - "directive:\nText not found." % self.name) - rawtext = rawtext[after_index + len(after_text) :] - before_text = self.options.get("end-before", None) - if before_text: - # skip content in rawtext after *and incl.* a matching text - before_index = rawtext.find(before_text) - if before_index < 0: - raise self.severe('Problem with "end-before" option of "%s" ' - "directive:\nText not found." % self.name) - rawtext = rawtext[:before_index] - - return rawtext - def literal(self, path, tab_width, rawtext): """Output a literal block""" -- cgit v1.2.3 From 4aa578f9c087d58d841e3dfbde1bf57483d9e696 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:32 +0200 Subject: docs: kernel_include.py: remove line numbers from parsed-literal When parsed-literal directive is added to rawtext, while cross references will be properly displayed, Sphinx will ignore line numbers. So, it is not worth adding them. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/b484fe5fcbf6e5217f112f205fbf54f0bbc3dcca.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kernel_include.py | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py index fd4887f80577..3a1753486319 100755 --- a/Documentation/sphinx/kernel_include.py +++ b/Documentation/sphinx/kernel_include.py @@ -171,13 +171,24 @@ class KernelInclude(Include): if 'warn-broken' in self.options: env._xref_files.add(path) - if "toc" in self.options: - rawtext = parser.gen_toc() - else: + if "toc" not in self.options: + rawtext = ".. parsed-literal::\n\n" + parser.gen_output() self.apply_range(rawtext) - title = os.path.basename(path) + include_lines = statemachine.string2lines(rawtext, tab_width, + convert_whitespace=True) + + # Sphinx always blame the ".. ", so placing + # line numbers here won't make any difference + + self.state_machine.insert_input(include_lines, path) + return [] + + # TOC output is a ReST file, not a literal. So, we can add line + # numbers + + rawtext = parser.gen_toc() include_lines = statemachine.string2lines(rawtext, tab_width, convert_whitespace=True) -- cgit v1.2.3 From 428c1d35118fb755e12a0e5d2745632d4cf3a76e Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:33 +0200 Subject: docs: kernel_include.py: remove Include class inheritance While the original code came from the Sphinx Include class, such class is monolithic: it has only one function that does everything, and 3 variables that are used: - required_arguments - optional_arguments - option_spec So, basically those are the only members that remain from the original class, but hey! Those are the same vars that every other Sphinx directive extension has to define! In summary, keeping inheritance here doesn't make much sense. Worse than that, kernel-include doesn't support the current set of options that the original Include class has, but it also has its own set of options. So, let's fill in the argument vars with what it does support, dropping the rest. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/a9f2eebf11c6b0c3a2e3bf42e71392cdfd2835d1.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kernel_include.py | 40 +++++++++++++++++++++++++++------- 1 file changed, 32 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py index 3a1753486319..e6f734476ab3 100755 --- a/Documentation/sphinx/kernel_include.py +++ b/Documentation/sphinx/kernel_include.py @@ -62,9 +62,8 @@ import sys from docutils import io, nodes, statemachine from docutils.statemachine import ViewList from docutils.utils.error_reporting import SafeString, ErrorString -from docutils.parsers.rst import directives +from docutils.parsers.rst import Directive, directives from docutils.parsers.rst.directives.body import CodeBlock, NumberLines -from docutils.parsers.rst.directives.misc import Include from sphinx.util import logging @@ -81,18 +80,43 @@ RE_SIMPLE_REF = re.compile(r'`([^`]+)`') # ============================================================================== -class KernelInclude(Include): - """KernelInclude (``kernel-include``) directive""" +class KernelInclude(Directive): + """ + KernelInclude (``kernel-include``) directive + + Most of the stuff here came from Include directive defined at: + docutils/parsers/rst/directives/misc.py - # Add extra options - option_spec = Include.option_spec.copy() + Yet, overriding the class don't has any benefits: the original class + only have run() and argument list. Not all of them are implemented, + when checked against latest Sphinx version, as with time more arguments + were added. - option_spec.update({ + So, keep its own list of supported arguments + """ + + required_arguments = 1 + optional_arguments = 0 + final_argument_whitespace = True + option_spec = { + 'literal': directives.flag, + 'code': directives.unchanged, + 'encoding': directives.encoding, + 'tab-width': int, + 'start-line': int, + 'end-line': int, + 'start-after': directives.unchanged_required, + 'end-before': directives.unchanged_required, + # ignored except for 'literal' or 'code': + 'number-lines': directives.unchanged, # integer or None + 'class': directives.class_option, + + # Arguments that aren't from Sphinx Include directive 'generate-cross-refs': directives.flag, 'warn-broken': directives.flag, 'toc': directives.flag, 'exception-file': directives.unchanged, - }) + } def read_rawtext(self, path, encoding): """Read and process file content with error handling""" -- cgit v1.2.3 From a49adfab496f7720fcd588d454b36bfb7922051e Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:34 +0200 Subject: docs: kernel_include.py: document all supported parameters As we're actually a fork of Sphinx Include, update its docstring to contain the documentation for the actual implemented parameters. Let's use :param: for parameters, as defined at: https://sphinx-rtd-tutorial.readthedocs.io/en/latest/docstrings.html Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/f193160889a2dc296b4df2cc7ebc9934d717ccef.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kernel_include.py | 88 ++++++++++++++++++++++------------ 1 file changed, 58 insertions(+), 30 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py index e6f734476ab3..23566ab74866 100755 --- a/Documentation/sphinx/kernel_include.py +++ b/Documentation/sphinx/kernel_include.py @@ -2,53 +2,81 @@ # SPDX-License-Identifier: GPL-2.0 # pylint: disable=R0903, R0912, R0914, R0915, C0209,W0707 + """ - kernel-include - ~~~~~~~~~~~~~~ +Implementation of the ``kernel-include`` reST-directive. + +:copyright: Copyright (C) 2016 Markus Heiser +:license: GPL Version 2, June 1991 see linux/COPYING for details. + +The ``kernel-include`` reST-directive is a replacement for the ``include`` +directive. The ``kernel-include`` directive expand environment variables in +the path name and allows to include files from arbitrary locations. + +.. hint:: + + Including files from arbitrary locations (e.g. from ``/etc``) is a + security risk for builders. This is why the ``include`` directive from + docutils *prohibit* pathnames pointing to locations *above* the filesystem + tree where the reST document with the include directive is placed. + +Substrings of the form $name or ${name} are replaced by the value of +environment variable name. Malformed variable names and references to +non-existing variables are left unchanged. + +**Supported Sphinx Include Options**: - Implementation of the ``kernel-include`` reST-directive. +:param literal: + If present, the included file is inserted as a literal block. - :copyright: Copyright (C) 2016 Markus Heiser - :license: GPL Version 2, June 1991 see linux/COPYING for details. +:param code: + Specify the language for syntax highlighting (e.g., 'c', 'python'). - The ``kernel-include`` reST-directive is a replacement for the ``include`` - directive. The ``kernel-include`` directive expand environment variables in - the path name and allows to include files from arbitrary locations. +:param encoding: + Specify the encoding of the included file (default: 'utf-8'). - .. hint:: +:param tab-width: + Specify the number of spaces that a tab represents. - Including files from arbitrary locations (e.g. from ``/etc``) is a - security risk for builders. This is why the ``include`` directive from - docutils *prohibit* pathnames pointing to locations *above* the filesystem - tree where the reST document with the include directive is placed. +:param start-line: + Line number at which to start including the file (1-based). - Substrings of the form $name or ${name} are replaced by the value of - environment variable name. Malformed variable names and references to - non-existing variables are left unchanged. +:param end-line: + Line number at which to stop including the file (inclusive). - This extension overrides Sphinx include directory, adding some extra - arguments: +:param start-after: + Include lines after the first line matching this text. - 1. :generate-cross-refs: +:param end-before: + Include lines before the first line matching this text. - If present, instead of reading the file, it calls ParseDataStructs() - class, which converts C data structures into cross-references to - be linked to ReST files containing a more comprehensive documentation; +:param number-lines: + Number the included lines (integer specifies start number). + Only effective with 'literal' or 'code' options. - 2. :exception-file: +:param class: + Specify HTML class attribute for the included content. - Used together with :generate-cross-refs +**Kernel-specific Extensions**: - Points to a file containing rules to ignore C data structs or to - use a different reference name, optionally using a different - reference type. +:param generate-cross-refs: + If present, instead of directly including the file, it calls + ParseDataStructs() to convert C data structures into cross-references + that link to comprehensive documentation in other ReST files. - 3. :warn-broken: +:param exception-file: + (Used with generate-cross-refs) - Used together with :generate-cross-refs: + Path to a file containing rules for handling special cases: + - Ignore specific C data structures + - Use alternative reference names + - Specify different reference types - Detect if the auto-generated cross references doesn't exist. +:param warn-broken: + (Used with generate-cross-refs) + Enables warnings when auto-generated cross-references don't point to + existing documentation targets. """ # ============================================================================== -- cgit v1.2.3 From 8a298579cdfcfdbcb70bb7af5e30769387494f37 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:35 +0200 Subject: scripts: sphinx-build-wrapper: get rid of uapi/media Makefile Now that kernel-include directive supports parsing data structs directly, we can finally get rid of the horrible hack we added to support parsing media uAPI symbols. As a side effect, Documentation/output doesn't have anymore media auto-generated .rst files on it. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/5dbb257a4b283697271c9c7b8f4713857e8191c8.1755872208.git.mchehab+huawei@kernel.org --- Documentation/Makefile | 3 +- Documentation/userspace-api/media/Makefile | 64 --- .../userspace-api/media/ca.h.rst.exceptions | 25 - .../userspace-api/media/cec.h.rst.exceptions | 577 ------------------- .../userspace-api/media/cec/cec-header.rst | 5 +- .../userspace-api/media/cec/cec.h.rst.exceptions | 577 +++++++++++++++++++ .../userspace-api/media/dmx.h.rst.exceptions | 66 --- .../userspace-api/media/dvb/ca.h.rst.exceptions | 25 + .../userspace-api/media/dvb/dmx.h.rst.exceptions | 66 +++ .../media/dvb/frontend.h.rst.exceptions | 246 +++++++++ Documentation/userspace-api/media/dvb/headers.rst | 17 +- .../userspace-api/media/dvb/net.h.rst.exceptions | 13 + .../userspace-api/media/frontend.h.rst.exceptions | 246 --------- .../userspace-api/media/lirc.h.rst.exceptions | 87 --- .../userspace-api/media/media.h.rst.exceptions | 32 -- .../userspace-api/media/mediactl/media-header.rst | 5 +- .../media/mediactl/media.h.rst.exceptions | 32 ++ .../userspace-api/media/net.h.rst.exceptions | 13 - .../userspace-api/media/rc/lirc-header.rst | 4 +- .../userspace-api/media/rc/lirc.h.rst.exceptions | 87 +++ Documentation/userspace-api/media/v4l/videodev.rst | 4 +- .../media/v4l/videodev2.h.rst.exceptions | 610 +++++++++++++++++++++ .../userspace-api/media/videodev2.h.rst.exceptions | 610 --------------------- 23 files changed, 1682 insertions(+), 1732 deletions(-) delete mode 100644 Documentation/userspace-api/media/Makefile delete mode 100644 Documentation/userspace-api/media/ca.h.rst.exceptions delete mode 100644 Documentation/userspace-api/media/cec.h.rst.exceptions create mode 100644 Documentation/userspace-api/media/cec/cec.h.rst.exceptions delete mode 100644 Documentation/userspace-api/media/dmx.h.rst.exceptions create mode 100644 Documentation/userspace-api/media/dvb/ca.h.rst.exceptions create mode 100644 Documentation/userspace-api/media/dvb/dmx.h.rst.exceptions create mode 100644 Documentation/userspace-api/media/dvb/frontend.h.rst.exceptions create mode 100644 Documentation/userspace-api/media/dvb/net.h.rst.exceptions delete mode 100644 Documentation/userspace-api/media/frontend.h.rst.exceptions delete mode 100644 Documentation/userspace-api/media/lirc.h.rst.exceptions delete mode 100644 Documentation/userspace-api/media/media.h.rst.exceptions create mode 100644 Documentation/userspace-api/media/mediactl/media.h.rst.exceptions delete mode 100644 Documentation/userspace-api/media/net.h.rst.exceptions create mode 100644 Documentation/userspace-api/media/rc/lirc.h.rst.exceptions create mode 100644 Documentation/userspace-api/media/v4l/videodev2.h.rst.exceptions delete mode 100644 Documentation/userspace-api/media/videodev2.h.rst.exceptions (limited to 'Documentation') diff --git a/Documentation/Makefile b/Documentation/Makefile index 2ed334971acd..5c20c68be89a 100644 --- a/Documentation/Makefile +++ b/Documentation/Makefile @@ -87,7 +87,7 @@ loop_cmd = $(echo-cmd) $(cmd_$(1)) || exit; PYTHONPYCACHEPREFIX ?= $(abspath $(BUILDDIR)/__pycache__) quiet_cmd_sphinx = SPHINX $@ --> file://$(abspath $(BUILDDIR)/$3/$4) - cmd_sphinx = $(MAKE) BUILDDIR=$(abspath $(BUILDDIR)) $(build)=Documentation/userspace-api/media $2 && \ + cmd_sphinx = \ PYTHONPYCACHEPREFIX="$(PYTHONPYCACHEPREFIX)" \ BUILDDIR=$(abspath $(BUILDDIR)) SPHINX_CONF=$(abspath $(src)/$5/$(SPHINX_CONF)) \ $(PYTHON3) $(srctree)/scripts/jobserver-exec \ @@ -171,7 +171,6 @@ refcheckdocs: cleandocs: $(Q)rm -rf $(BUILDDIR) - $(Q)$(MAKE) BUILDDIR=$(abspath $(BUILDDIR)) $(build)=Documentation/userspace-api/media clean dochelp: @echo ' Linux kernel internal documentation in different formats from ReST:' diff --git a/Documentation/userspace-api/media/Makefile b/Documentation/userspace-api/media/Makefile deleted file mode 100644 index accc734d045a..000000000000 --- a/Documentation/userspace-api/media/Makefile +++ /dev/null @@ -1,64 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 - -# Rules to convert a .h file to inline RST documentation - -SRC_DIR=$(srctree)/Documentation/userspace-api/media -PARSER = $(srctree)/tools/docs/parse-headers.py -UAPI = $(srctree)/include/uapi/linux -KAPI = $(srctree)/include/linux - -FILES = ca.h.rst dmx.h.rst frontend.h.rst net.h.rst \ - videodev2.h.rst media.h.rst cec.h.rst lirc.h.rst - -TARGETS := $(addprefix $(BUILDDIR)/, $(FILES)) - -gen_rst = \ - echo ${PARSER} $< $@ $(SRC_DIR)/$(notdir $@).exceptions; \ - ${PARSER} $< $@ $(SRC_DIR)/$(notdir $@).exceptions - -quiet_gen_rst = echo ' PARSE $(patsubst $(srctree)/%,%,$<)'; \ - ${PARSER} $< $@ $(SRC_DIR)/$(notdir $@).exceptions - -silent_gen_rst = ${gen_rst} - -$(BUILDDIR)/ca.h.rst: ${UAPI}/dvb/ca.h ${PARSER} $(SRC_DIR)/ca.h.rst.exceptions - @$($(quiet)gen_rst) - -$(BUILDDIR)/dmx.h.rst: ${UAPI}/dvb/dmx.h ${PARSER} $(SRC_DIR)/dmx.h.rst.exceptions - @$($(quiet)gen_rst) - -$(BUILDDIR)/frontend.h.rst: ${UAPI}/dvb/frontend.h ${PARSER} $(SRC_DIR)/frontend.h.rst.exceptions - @$($(quiet)gen_rst) - -$(BUILDDIR)/net.h.rst: ${UAPI}/dvb/net.h ${PARSER} $(SRC_DIR)/net.h.rst.exceptions - @$($(quiet)gen_rst) - -$(BUILDDIR)/videodev2.h.rst: ${UAPI}/videodev2.h ${PARSER} $(SRC_DIR)/videodev2.h.rst.exceptions - @$($(quiet)gen_rst) - -$(BUILDDIR)/media.h.rst: ${UAPI}/media.h ${PARSER} $(SRC_DIR)/media.h.rst.exceptions - @$($(quiet)gen_rst) - -$(BUILDDIR)/cec.h.rst: ${UAPI}/cec.h ${PARSER} $(SRC_DIR)/cec.h.rst.exceptions - @$($(quiet)gen_rst) - -$(BUILDDIR)/lirc.h.rst: ${UAPI}/lirc.h ${PARSER} $(SRC_DIR)/lirc.h.rst.exceptions - @$($(quiet)gen_rst) - -# Media build rules - -.PHONY: all html texinfo epub xml latex - -all: $(IMGDOT) $(BUILDDIR) ${TARGETS} -html: all -texinfo: all -epub: all -xml: all -latex: $(IMGPDF) all -linkcheck: - -clean: - -rm -f $(DOTTGT) $(IMGTGT) ${TARGETS} 2>/dev/null - -$(BUILDDIR): - $(Q)mkdir -p $@ diff --git a/Documentation/userspace-api/media/ca.h.rst.exceptions b/Documentation/userspace-api/media/ca.h.rst.exceptions deleted file mode 100644 index f6828238eb48..000000000000 --- a/Documentation/userspace-api/media/ca.h.rst.exceptions +++ /dev/null @@ -1,25 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 - -# Ignore header name -ignore define _DVBCA_H_ - -# struct ca_slot_info defines -replace define CA_CI :c:type:`ca_slot_info` -replace define CA_CI_LINK :c:type:`ca_slot_info` -replace define CA_CI_PHYS :c:type:`ca_slot_info` -replace define CA_DESCR :c:type:`ca_slot_info` -replace define CA_SC :c:type:`ca_slot_info` -replace define CA_CI_MODULE_PRESENT :c:type:`ca_slot_info` -replace define CA_CI_MODULE_READY :c:type:`ca_slot_info` - -# struct ca_descr_info defines -replace define CA_ECD :c:type:`ca_descr_info` -replace define CA_NDS :c:type:`ca_descr_info` -replace define CA_DSS :c:type:`ca_descr_info` - -# some typedefs should point to struct/enums -replace typedef ca_slot_info_t :c:type:`ca_slot_info` -replace typedef ca_descr_info_t :c:type:`ca_descr_info` -replace typedef ca_caps_t :c:type:`ca_caps` -replace typedef ca_msg_t :c:type:`ca_msg` -replace typedef ca_descr_t :c:type:`ca_descr` diff --git a/Documentation/userspace-api/media/cec.h.rst.exceptions b/Documentation/userspace-api/media/cec.h.rst.exceptions deleted file mode 100644 index 15fa1752d4ef..000000000000 --- a/Documentation/userspace-api/media/cec.h.rst.exceptions +++ /dev/null @@ -1,577 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 - -# Ignore header name -ignore define _CEC_UAPI_H - -# define macros to ignore - -ignore define CEC_MAX_MSG_SIZE -ignore define CEC_MAX_LOG_ADDRS - -ignore define CEC_LOG_ADDR_MASK_TV -ignore define CEC_LOG_ADDR_MASK_RECORD -ignore define CEC_LOG_ADDR_MASK_TUNER -ignore define CEC_LOG_ADDR_MASK_PLAYBACK -ignore define CEC_LOG_ADDR_MASK_AUDIOSYSTEM -ignore define CEC_LOG_ADDR_MASK_BACKUP -ignore define CEC_LOG_ADDR_MASK_SPECIFIC -ignore define CEC_LOG_ADDR_MASK_UNREGISTERED - -# Shouldn't them be documented? -ignore define CEC_LOG_ADDR_INVALID -ignore define CEC_PHYS_ADDR_INVALID - -ignore define CEC_VENDOR_ID_NONE - -ignore define CEC_MODE_INITIATOR_MSK -ignore define CEC_MODE_FOLLOWER_MSK - -# Part of CEC 2.0 spec - shouldn't be documented too? -ignore define CEC_LOG_ADDR_TV -ignore define CEC_LOG_ADDR_RECORD_1 -ignore define CEC_LOG_ADDR_RECORD_2 -ignore define CEC_LOG_ADDR_TUNER_1 -ignore define CEC_LOG_ADDR_PLAYBACK_1 -ignore define CEC_LOG_ADDR_AUDIOSYSTEM -ignore define CEC_LOG_ADDR_TUNER_2 -ignore define CEC_LOG_ADDR_TUNER_3 -ignore define CEC_LOG_ADDR_PLAYBACK_2 -ignore define CEC_LOG_ADDR_RECORD_3 -ignore define CEC_LOG_ADDR_TUNER_4 -ignore define CEC_LOG_ADDR_PLAYBACK_3 -ignore define CEC_LOG_ADDR_BACKUP_1 -ignore define CEC_LOG_ADDR_BACKUP_2 -ignore define CEC_LOG_ADDR_SPECIFIC -ignore define CEC_LOG_ADDR_UNREGISTERED -ignore define CEC_LOG_ADDR_BROADCAST - -# IMHO, those should also be documented - -ignore define CEC_MSG_ACTIVE_SOURCE -ignore define CEC_MSG_IMAGE_VIEW_ON -ignore define CEC_MSG_TEXT_VIEW_ON - -ignore define CEC_MSG_INACTIVE_SOURCE -ignore define CEC_MSG_REQUEST_ACTIVE_SOURCE -ignore define CEC_MSG_ROUTING_CHANGE -ignore define CEC_MSG_ROUTING_INFORMATION -ignore define CEC_MSG_SET_STREAM_PATH - -ignore define CEC_MSG_STANDBY - -ignore define CEC_MSG_RECORD_OFF -ignore define CEC_MSG_RECORD_ON - -ignore define CEC_OP_RECORD_SRC_OWN -ignore define CEC_OP_RECORD_SRC_DIGITAL -ignore define CEC_OP_RECORD_SRC_ANALOG -ignore define CEC_OP_RECORD_SRC_EXT_PLUG -ignore define CEC_OP_RECORD_SRC_EXT_PHYS_ADDR - -ignore define CEC_OP_SERVICE_ID_METHOD_BY_DIG_ID -ignore define CEC_OP_SERVICE_ID_METHOD_BY_CHANNEL - -ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ARIB_GEN -ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ATSC_GEN -ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_DVB_GEN -ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ARIB_BS -ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ARIB_CS -ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ARIB_T -ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ATSC_CABLE -ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ATSC_SAT -ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ATSC_T -ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_DVB_C -ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_DVB_S -ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_DVB_S2 -ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_DVB_T - -ignore define CEC_OP_ANA_BCAST_TYPE_CABLE -ignore define CEC_OP_ANA_BCAST_TYPE_SATELLITE -ignore define CEC_OP_ANA_BCAST_TYPE_TERRESTRIAL - -ignore define CEC_OP_BCAST_SYSTEM_PAL_BG -ignore define CEC_OP_BCAST_SYSTEM_SECAM_LQ -ignore define CEC_OP_BCAST_SYSTEM_PAL_M -ignore define CEC_OP_BCAST_SYSTEM_NTSC_M -ignore define CEC_OP_BCAST_SYSTEM_PAL_I -ignore define CEC_OP_BCAST_SYSTEM_SECAM_DK -ignore define CEC_OP_BCAST_SYSTEM_SECAM_BG -ignore define CEC_OP_BCAST_SYSTEM_SECAM_L -ignore define CEC_OP_BCAST_SYSTEM_PAL_DK -ignore define CEC_OP_BCAST_SYSTEM_OTHER - -ignore define CEC_OP_CHANNEL_NUMBER_FMT_1_PART -ignore define CEC_OP_CHANNEL_NUMBER_FMT_2_PART - -ignore define CEC_MSG_RECORD_STATUS - -ignore define CEC_OP_RECORD_STATUS_CUR_SRC -ignore define CEC_OP_RECORD_STATUS_DIG_SERVICE -ignore define CEC_OP_RECORD_STATUS_ANA_SERVICE -ignore define CEC_OP_RECORD_STATUS_EXT_INPUT -ignore define CEC_OP_RECORD_STATUS_NO_DIG_SERVICE -ignore define CEC_OP_RECORD_STATUS_NO_ANA_SERVICE -ignore define CEC_OP_RECORD_STATUS_NO_SERVICE -ignore define CEC_OP_RECORD_STATUS_INVALID_EXT_PLUG -ignore define CEC_OP_RECORD_STATUS_INVALID_EXT_PHYS_ADDR -ignore define CEC_OP_RECORD_STATUS_UNSUP_CA -ignore define CEC_OP_RECORD_STATUS_NO_CA_ENTITLEMENTS -ignore define CEC_OP_RECORD_STATUS_CANT_COPY_SRC -ignore define CEC_OP_RECORD_STATUS_NO_MORE_COPIES -ignore define CEC_OP_RECORD_STATUS_NO_MEDIA -ignore define CEC_OP_RECORD_STATUS_PLAYING -ignore define CEC_OP_RECORD_STATUS_ALREADY_RECORDING -ignore define CEC_OP_RECORD_STATUS_MEDIA_PROT -ignore define CEC_OP_RECORD_STATUS_NO_SIGNAL -ignore define CEC_OP_RECORD_STATUS_MEDIA_PROBLEM -ignore define CEC_OP_RECORD_STATUS_NO_SPACE -ignore define CEC_OP_RECORD_STATUS_PARENTAL_LOCK -ignore define CEC_OP_RECORD_STATUS_TERMINATED_OK -ignore define CEC_OP_RECORD_STATUS_ALREADY_TERM -ignore define CEC_OP_RECORD_STATUS_OTHER - -ignore define CEC_MSG_RECORD_TV_SCREEN - -ignore define CEC_MSG_CLEAR_ANALOGUE_TIMER - -ignore define CEC_OP_REC_SEQ_SUNDAY -ignore define CEC_OP_REC_SEQ_MONDAY -ignore define CEC_OP_REC_SEQ_TUESDAY -ignore define CEC_OP_REC_SEQ_WEDNESDAY -ignore define CEC_OP_REC_SEQ_THURSDAY -ignore define CEC_OP_REC_SEQ_FRIDAY -ignore define CEC_OP_REC_SEQ_SATURDAY -ignore define CEC_OP_REC_SEQ_ONCE_ONLY - -ignore define CEC_MSG_CLEAR_DIGITAL_TIMER - -ignore define CEC_MSG_CLEAR_EXT_TIMER - -ignore define CEC_OP_EXT_SRC_PLUG -ignore define CEC_OP_EXT_SRC_PHYS_ADDR - -ignore define CEC_MSG_SET_ANALOGUE_TIMER -ignore define CEC_MSG_SET_DIGITAL_TIMER -ignore define CEC_MSG_SET_EXT_TIMER - -ignore define CEC_MSG_SET_TIMER_PROGRAM_TITLE -ignore define CEC_MSG_TIMER_CLEARED_STATUS - -ignore define CEC_OP_TIMER_CLR_STAT_RECORDING -ignore define CEC_OP_TIMER_CLR_STAT_NO_MATCHING -ignore define CEC_OP_TIMER_CLR_STAT_NO_INFO -ignore define CEC_OP_TIMER_CLR_STAT_CLEARED - -ignore define CEC_MSG_TIMER_STATUS - -ignore define CEC_OP_TIMER_OVERLAP_WARNING_NO_OVERLAP -ignore define CEC_OP_TIMER_OVERLAP_WARNING_OVERLAP - -ignore define CEC_OP_MEDIA_INFO_UNPROT_MEDIA -ignore define CEC_OP_MEDIA_INFO_PROT_MEDIA -ignore define CEC_OP_MEDIA_INFO_NO_MEDIA - -ignore define CEC_OP_PROG_IND_NOT_PROGRAMMED -ignore define CEC_OP_PROG_IND_PROGRAMMED - -ignore define CEC_OP_PROG_INFO_ENOUGH_SPACE -ignore define CEC_OP_PROG_INFO_NOT_ENOUGH_SPACE -ignore define CEC_OP_PROG_INFO_MIGHT_NOT_BE_ENOUGH_SPACE -ignore define CEC_OP_PROG_INFO_NONE_AVAILABLE - -ignore define CEC_OP_PROG_ERROR_NO_FREE_TIMER -ignore define CEC_OP_PROG_ERROR_DATE_OUT_OF_RANGE -ignore define CEC_OP_PROG_ERROR_REC_SEQ_ERROR -ignore define CEC_OP_PROG_ERROR_INV_EXT_PLUG -ignore define CEC_OP_PROG_ERROR_INV_EXT_PHYS_ADDR -ignore define CEC_OP_PROG_ERROR_CA_UNSUPP -ignore define CEC_OP_PROG_ERROR_INSUF_CA_ENTITLEMENTS -ignore define CEC_OP_PROG_ERROR_RESOLUTION_UNSUPP -ignore define CEC_OP_PROG_ERROR_PARENTAL_LOCK -ignore define CEC_OP_PROG_ERROR_CLOCK_FAILURE -ignore define CEC_OP_PROG_ERROR_DUPLICATE - -ignore define CEC_MSG_CEC_VERSION - -ignore define CEC_OP_CEC_VERSION_1_3A -ignore define CEC_OP_CEC_VERSION_1_4 -ignore define CEC_OP_CEC_VERSION_2_0 - -ignore define CEC_MSG_GET_CEC_VERSION -ignore define CEC_MSG_GIVE_PHYSICAL_ADDR -ignore define CEC_MSG_GET_MENU_LANGUAGE -ignore define CEC_MSG_REPORT_PHYSICAL_ADDR - -ignore define CEC_OP_PRIM_DEVTYPE_TV -ignore define CEC_OP_PRIM_DEVTYPE_RECORD -ignore define CEC_OP_PRIM_DEVTYPE_TUNER -ignore define CEC_OP_PRIM_DEVTYPE_PLAYBACK -ignore define CEC_OP_PRIM_DEVTYPE_AUDIOSYSTEM -ignore define CEC_OP_PRIM_DEVTYPE_SWITCH -ignore define CEC_OP_PRIM_DEVTYPE_PROCESSOR - -ignore define CEC_MSG_SET_MENU_LANGUAGE -ignore define CEC_MSG_REPORT_FEATURES - -ignore define CEC_OP_ALL_DEVTYPE_TV -ignore define CEC_OP_ALL_DEVTYPE_RECORD -ignore define CEC_OP_ALL_DEVTYPE_TUNER -ignore define CEC_OP_ALL_DEVTYPE_PLAYBACK -ignore define CEC_OP_ALL_DEVTYPE_AUDIOSYSTEM -ignore define CEC_OP_ALL_DEVTYPE_SWITCH - -ignore define CEC_OP_FEAT_EXT - -ignore define CEC_OP_FEAT_RC_TV_PROFILE_NONE -ignore define CEC_OP_FEAT_RC_TV_PROFILE_1 -ignore define CEC_OP_FEAT_RC_TV_PROFILE_2 -ignore define CEC_OP_FEAT_RC_TV_PROFILE_3 -ignore define CEC_OP_FEAT_RC_TV_PROFILE_4 -ignore define CEC_OP_FEAT_RC_SRC_HAS_DEV_ROOT_MENU -ignore define CEC_OP_FEAT_RC_SRC_HAS_DEV_SETUP_MENU -ignore define CEC_OP_FEAT_RC_SRC_HAS_CONTENTS_MENU -ignore define CEC_OP_FEAT_RC_SRC_HAS_MEDIA_TOP_MENU -ignore define CEC_OP_FEAT_RC_SRC_HAS_MEDIA_CONTEXT_MENU - -ignore define CEC_OP_FEAT_DEV_HAS_RECORD_TV_SCREEN -ignore define CEC_OP_FEAT_DEV_HAS_SET_OSD_STRING -ignore define CEC_OP_FEAT_DEV_HAS_DECK_CONTROL -ignore define CEC_OP_FEAT_DEV_HAS_SET_AUDIO_RATE -ignore define CEC_OP_FEAT_DEV_SINK_HAS_ARC_TX -ignore define CEC_OP_FEAT_DEV_SOURCE_HAS_ARC_RX -ignore define CEC_OP_FEAT_DEV_HAS_SET_AUDIO_VOLUME_LEVEL - -ignore define CEC_MSG_GIVE_FEATURES - -ignore define CEC_MSG_DECK_CONTROL - -ignore define CEC_OP_DECK_CTL_MODE_SKIP_FWD -ignore define CEC_OP_DECK_CTL_MODE_SKIP_REV -ignore define CEC_OP_DECK_CTL_MODE_STOP -ignore define CEC_OP_DECK_CTL_MODE_EJECT - -ignore define CEC_MSG_DECK_STATUS - -ignore define CEC_OP_DECK_INFO_PLAY -ignore define CEC_OP_DECK_INFO_RECORD -ignore define CEC_OP_DECK_INFO_PLAY_REV -ignore define CEC_OP_DECK_INFO_STILL -ignore define CEC_OP_DECK_INFO_SLOW -ignore define CEC_OP_DECK_INFO_SLOW_REV -ignore define CEC_OP_DECK_INFO_FAST_FWD -ignore define CEC_OP_DECK_INFO_FAST_REV -ignore define CEC_OP_DECK_INFO_NO_MEDIA -ignore define CEC_OP_DECK_INFO_STOP -ignore define CEC_OP_DECK_INFO_SKIP_FWD -ignore define CEC_OP_DECK_INFO_SKIP_REV -ignore define CEC_OP_DECK_INFO_INDEX_SEARCH_FWD -ignore define CEC_OP_DECK_INFO_INDEX_SEARCH_REV -ignore define CEC_OP_DECK_INFO_OTHER - -ignore define CEC_MSG_GIVE_DECK_STATUS - -ignore define CEC_OP_STATUS_REQ_ON -ignore define CEC_OP_STATUS_REQ_OFF -ignore define CEC_OP_STATUS_REQ_ONCE - -ignore define CEC_MSG_PLAY - -ignore define CEC_OP_PLAY_MODE_PLAY_FWD -ignore define CEC_OP_PLAY_MODE_PLAY_REV -ignore define CEC_OP_PLAY_MODE_PLAY_STILL -ignore define CEC_OP_PLAY_MODE_PLAY_FAST_FWD_MIN -ignore define CEC_OP_PLAY_MODE_PLAY_FAST_FWD_MED -ignore define CEC_OP_PLAY_MODE_PLAY_FAST_FWD_MAX -ignore define CEC_OP_PLAY_MODE_PLAY_FAST_REV_MIN -ignore define CEC_OP_PLAY_MODE_PLAY_FAST_REV_MED -ignore define CEC_OP_PLAY_MODE_PLAY_FAST_REV_MAX -ignore define CEC_OP_PLAY_MODE_PLAY_SLOW_FWD_MIN -ignore define CEC_OP_PLAY_MODE_PLAY_SLOW_FWD_MED -ignore define CEC_OP_PLAY_MODE_PLAY_SLOW_FWD_MAX -ignore define CEC_OP_PLAY_MODE_PLAY_SLOW_REV_MIN -ignore define CEC_OP_PLAY_MODE_PLAY_SLOW_REV_MED -ignore define CEC_OP_PLAY_MODE_PLAY_SLOW_REV_MAX - -ignore define CEC_MSG_GIVE_TUNER_DEVICE_STATUS -ignore define CEC_MSG_SELECT_ANALOGUE_SERVICE -ignore define CEC_MSG_SELECT_DIGITAL_SERVICE -ignore define CEC_MSG_TUNER_DEVICE_STATUS - -ignore define CEC_OP_REC_FLAG_USED -ignore define CEC_OP_REC_FLAG_NOT_USED - -ignore define CEC_OP_TUNER_DISPLAY_INFO_DIGITAL -ignore define CEC_OP_TUNER_DISPLAY_INFO_NONE -ignore define CEC_OP_TUNER_DISPLAY_INFO_ANALOGUE - -ignore define CEC_MSG_TUNER_STEP_DECREMENT -ignore define CEC_MSG_TUNER_STEP_INCREMENT - -ignore define CEC_MSG_DEVICE_VENDOR_ID -ignore define CEC_MSG_GIVE_DEVICE_VENDOR_ID -ignore define CEC_MSG_VENDOR_COMMAND -ignore define CEC_MSG_VENDOR_COMMAND_WITH_ID -ignore define CEC_MSG_VENDOR_REMOTE_BUTTON_DOWN -ignore define CEC_MSG_VENDOR_REMOTE_BUTTON_UP - -ignore define CEC_MSG_SET_OSD_STRING - -ignore define CEC_OP_DISP_CTL_DEFAULT -ignore define CEC_OP_DISP_CTL_UNTIL_CLEARED -ignore define CEC_OP_DISP_CTL_CLEAR - -ignore define CEC_MSG_GIVE_OSD_NAME -ignore define CEC_MSG_SET_OSD_NAME - -ignore define CEC_MSG_MENU_REQUEST - -ignore define CEC_OP_MENU_REQUEST_ACTIVATE -ignore define CEC_OP_MENU_REQUEST_DEACTIVATE -ignore define CEC_OP_MENU_REQUEST_QUERY - -ignore define CEC_MSG_MENU_STATUS - -ignore define CEC_OP_MENU_STATE_ACTIVATED -ignore define CEC_OP_MENU_STATE_DEACTIVATED - -ignore define CEC_MSG_USER_CONTROL_PRESSED - -ignore define CEC_OP_UI_CMD_SELECT -ignore define CEC_OP_UI_CMD_UP -ignore define CEC_OP_UI_CMD_DOWN -ignore define CEC_OP_UI_CMD_LEFT -ignore define CEC_OP_UI_CMD_RIGHT -ignore define CEC_OP_UI_CMD_RIGHT_UP -ignore define CEC_OP_UI_CMD_RIGHT_DOWN -ignore define CEC_OP_UI_CMD_LEFT_UP -ignore define CEC_OP_UI_CMD_LEFT_DOWN -ignore define CEC_OP_UI_CMD_DEVICE_ROOT_MENU -ignore define CEC_OP_UI_CMD_DEVICE_SETUP_MENU -ignore define CEC_OP_UI_CMD_CONTENTS_MENU -ignore define CEC_OP_UI_CMD_FAVORITE_MENU -ignore define CEC_OP_UI_CMD_BACK -ignore define CEC_OP_UI_CMD_MEDIA_TOP_MENU -ignore define CEC_OP_UI_CMD_MEDIA_CONTEXT_SENSITIVE_MENU -ignore define CEC_OP_UI_CMD_NUMBER_ENTRY_MODE -ignore define CEC_OP_UI_CMD_NUMBER_11 -ignore define CEC_OP_UI_CMD_NUMBER_12 -ignore define CEC_OP_UI_CMD_NUMBER_0_OR_NUMBER_10 -ignore define CEC_OP_UI_CMD_NUMBER_1 -ignore define CEC_OP_UI_CMD_NUMBER_2 -ignore define CEC_OP_UI_CMD_NUMBER_3 -ignore define CEC_OP_UI_CMD_NUMBER_4 -ignore define CEC_OP_UI_CMD_NUMBER_5 -ignore define CEC_OP_UI_CMD_NUMBER_6 -ignore define CEC_OP_UI_CMD_NUMBER_7 -ignore define CEC_OP_UI_CMD_NUMBER_8 -ignore define CEC_OP_UI_CMD_NUMBER_9 -ignore define CEC_OP_UI_CMD_DOT -ignore define CEC_OP_UI_CMD_ENTER -ignore define CEC_OP_UI_CMD_CLEAR -ignore define CEC_OP_UI_CMD_NEXT_FAVORITE -ignore define CEC_OP_UI_CMD_CHANNEL_UP -ignore define CEC_OP_UI_CMD_CHANNEL_DOWN -ignore define CEC_OP_UI_CMD_PREVIOUS_CHANNEL -ignore define CEC_OP_UI_CMD_SOUND_SELECT -ignore define CEC_OP_UI_CMD_INPUT_SELECT -ignore define CEC_OP_UI_CMD_DISPLAY_INFORMATION -ignore define CEC_OP_UI_CMD_HELP -ignore define CEC_OP_UI_CMD_PAGE_UP -ignore define CEC_OP_UI_CMD_PAGE_DOWN -ignore define CEC_OP_UI_CMD_POWER -ignore define CEC_OP_UI_CMD_VOLUME_UP -ignore define CEC_OP_UI_CMD_VOLUME_DOWN -ignore define CEC_OP_UI_CMD_MUTE -ignore define CEC_OP_UI_CMD_PLAY -ignore define CEC_OP_UI_CMD_STOP -ignore define CEC_OP_UI_CMD_PAUSE -ignore define CEC_OP_UI_CMD_RECORD -ignore define CEC_OP_UI_CMD_REWIND -ignore define CEC_OP_UI_CMD_FAST_FORWARD -ignore define CEC_OP_UI_CMD_EJECT -ignore define CEC_OP_UI_CMD_SKIP_FORWARD -ignore define CEC_OP_UI_CMD_SKIP_BACKWARD -ignore define CEC_OP_UI_CMD_STOP_RECORD -ignore define CEC_OP_UI_CMD_PAUSE_RECORD -ignore define CEC_OP_UI_CMD_ANGLE -ignore define CEC_OP_UI_CMD_SUB_PICTURE -ignore define CEC_OP_UI_CMD_VIDEO_ON_DEMAND -ignore define CEC_OP_UI_CMD_ELECTRONIC_PROGRAM_GUIDE -ignore define CEC_OP_UI_CMD_TIMER_PROGRAMMING -ignore define CEC_OP_UI_CMD_INITIAL_CONFIGURATION -ignore define CEC_OP_UI_CMD_SELECT_BROADCAST_TYPE -ignore define CEC_OP_UI_CMD_SELECT_SOUND_PRESENTATION -ignore define CEC_OP_UI_CMD_AUDIO_DESCRIPTION -ignore define CEC_OP_UI_CMD_INTERNET -ignore define CEC_OP_UI_CMD_3D_MODE -ignore define CEC_OP_UI_CMD_PLAY_FUNCTION -ignore define CEC_OP_UI_CMD_PAUSE_PLAY_FUNCTION -ignore define CEC_OP_UI_CMD_RECORD_FUNCTION -ignore define CEC_OP_UI_CMD_PAUSE_RECORD_FUNCTION -ignore define CEC_OP_UI_CMD_STOP_FUNCTION -ignore define CEC_OP_UI_CMD_MUTE_FUNCTION -ignore define CEC_OP_UI_CMD_RESTORE_VOLUME_FUNCTION -ignore define CEC_OP_UI_CMD_TUNE_FUNCTION -ignore define CEC_OP_UI_CMD_SELECT_MEDIA_FUNCTION -ignore define CEC_OP_UI_CMD_SELECT_AV_INPUT_FUNCTION -ignore define CEC_OP_UI_CMD_SELECT_AUDIO_INPUT_FUNCTION -ignore define CEC_OP_UI_CMD_POWER_TOGGLE_FUNCTION -ignore define CEC_OP_UI_CMD_POWER_OFF_FUNCTION -ignore define CEC_OP_UI_CMD_POWER_ON_FUNCTION -ignore define CEC_OP_UI_CMD_F1_BLUE -ignore define CEC_OP_UI_CMD_F2_RED -ignore define CEC_OP_UI_CMD_F3_GREEN -ignore define CEC_OP_UI_CMD_F4_YELLOW -ignore define CEC_OP_UI_CMD_F5 -ignore define CEC_OP_UI_CMD_DATA - -ignore define CEC_OP_UI_BCAST_TYPE_TOGGLE_ALL -ignore define CEC_OP_UI_BCAST_TYPE_TOGGLE_DIG_ANA -ignore define CEC_OP_UI_BCAST_TYPE_ANALOGUE -ignore define CEC_OP_UI_BCAST_TYPE_ANALOGUE_T -ignore define CEC_OP_UI_BCAST_TYPE_ANALOGUE_CABLE -ignore define CEC_OP_UI_BCAST_TYPE_ANALOGUE_SAT -ignore define CEC_OP_UI_BCAST_TYPE_DIGITAL -ignore define CEC_OP_UI_BCAST_TYPE_DIGITAL_T -ignore define CEC_OP_UI_BCAST_TYPE_DIGITAL_CABLE -ignore define CEC_OP_UI_BCAST_TYPE_DIGITAL_SAT -ignore define CEC_OP_UI_BCAST_TYPE_DIGITAL_COM_SAT -ignore define CEC_OP_UI_BCAST_TYPE_DIGITAL_COM_SAT2 -ignore define CEC_OP_UI_BCAST_TYPE_IP - -ignore define CEC_OP_UI_SND_PRES_CTL_DUAL_MONO -ignore define CEC_OP_UI_SND_PRES_CTL_KARAOKE -ignore define CEC_OP_UI_SND_PRES_CTL_DOWNMIX -ignore define CEC_OP_UI_SND_PRES_CTL_REVERB -ignore define CEC_OP_UI_SND_PRES_CTL_EQUALIZER -ignore define CEC_OP_UI_SND_PRES_CTL_BASS_UP -ignore define CEC_OP_UI_SND_PRES_CTL_BASS_NEUTRAL -ignore define CEC_OP_UI_SND_PRES_CTL_BASS_DOWN -ignore define CEC_OP_UI_SND_PRES_CTL_TREBLE_UP -ignore define CEC_OP_UI_SND_PRES_CTL_TREBLE_NEUTRAL -ignore define CEC_OP_UI_SND_PRES_CTL_TREBLE_DOWN - -ignore define CEC_MSG_USER_CONTROL_RELEASED - -ignore define CEC_MSG_GIVE_DEVICE_POWER_STATUS -ignore define CEC_MSG_REPORT_POWER_STATUS - -ignore define CEC_OP_POWER_STATUS_ON -ignore define CEC_OP_POWER_STATUS_STANDBY -ignore define CEC_OP_POWER_STATUS_TO_ON -ignore define CEC_OP_POWER_STATUS_TO_STANDBY - -ignore define CEC_MSG_FEATURE_ABORT - -ignore define CEC_OP_ABORT_UNRECOGNIZED_OP -ignore define CEC_OP_ABORT_INCORRECT_MODE -ignore define CEC_OP_ABORT_NO_SOURCE -ignore define CEC_OP_ABORT_INVALID_OP -ignore define CEC_OP_ABORT_REFUSED -ignore define CEC_OP_ABORT_UNDETERMINED - -ignore define CEC_MSG_ABORT - -ignore define CEC_MSG_GIVE_AUDIO_STATUS -ignore define CEC_MSG_GIVE_SYSTEM_AUDIO_MODE_STATUS -ignore define CEC_MSG_REPORT_AUDIO_STATUS - -ignore define CEC_OP_AUD_MUTE_STATUS_OFF -ignore define CEC_OP_AUD_MUTE_STATUS_ON - -ignore define CEC_MSG_REPORT_SHORT_AUDIO_DESCRIPTOR -ignore define CEC_MSG_REQUEST_SHORT_AUDIO_DESCRIPTOR -ignore define CEC_MSG_SET_SYSTEM_AUDIO_MODE - -ignore define CEC_OP_SYS_AUD_STATUS_OFF -ignore define CEC_OP_SYS_AUD_STATUS_ON - -ignore define CEC_MSG_SYSTEM_AUDIO_MODE_REQUEST -ignore define CEC_MSG_SYSTEM_AUDIO_MODE_STATUS -ignore define CEC_MSG_SET_AUDIO_VOLUME_LEVEL - -ignore define CEC_OP_AUD_FMT_ID_CEA861 -ignore define CEC_OP_AUD_FMT_ID_CEA861_CXT - -ignore define CEC_MSG_SET_AUDIO_RATE - -ignore define CEC_OP_AUD_RATE_OFF -ignore define CEC_OP_AUD_RATE_WIDE_STD -ignore define CEC_OP_AUD_RATE_WIDE_FAST -ignore define CEC_OP_AUD_RATE_WIDE_SLOW -ignore define CEC_OP_AUD_RATE_NARROW_STD -ignore define CEC_OP_AUD_RATE_NARROW_FAST -ignore define CEC_OP_AUD_RATE_NARROW_SLOW - -ignore define CEC_MSG_INITIATE_ARC -ignore define CEC_MSG_REPORT_ARC_INITIATED -ignore define CEC_MSG_REPORT_ARC_TERMINATED -ignore define CEC_MSG_REQUEST_ARC_INITIATION -ignore define CEC_MSG_REQUEST_ARC_TERMINATION -ignore define CEC_MSG_TERMINATE_ARC - -ignore define CEC_MSG_REQUEST_CURRENT_LATENCY -ignore define CEC_MSG_REPORT_CURRENT_LATENCY - -ignore define CEC_OP_LOW_LATENCY_MODE_OFF -ignore define CEC_OP_LOW_LATENCY_MODE_ON - -ignore define CEC_OP_AUD_OUT_COMPENSATED_NA -ignore define CEC_OP_AUD_OUT_COMPENSATED_DELAY -ignore define CEC_OP_AUD_OUT_COMPENSATED_NO_DELAY -ignore define CEC_OP_AUD_OUT_COMPENSATED_PARTIAL_DELAY - -ignore define CEC_MSG_CDC_MESSAGE - -ignore define CEC_MSG_CDC_HEC_INQUIRE_STATE -ignore define CEC_MSG_CDC_HEC_REPORT_STATE - -ignore define CEC_OP_HEC_FUNC_STATE_NOT_SUPPORTED -ignore define CEC_OP_HEC_FUNC_STATE_INACTIVE -ignore define CEC_OP_HEC_FUNC_STATE_ACTIVE -ignore define CEC_OP_HEC_FUNC_STATE_ACTIVATION_FIELD - -ignore define CEC_OP_HOST_FUNC_STATE_NOT_SUPPORTED -ignore define CEC_OP_HOST_FUNC_STATE_INACTIVE -ignore define CEC_OP_HOST_FUNC_STATE_ACTIVE - -ignore define CEC_OP_ENC_FUNC_STATE_EXT_CON_NOT_SUPPORTED -ignore define CEC_OP_ENC_FUNC_STATE_EXT_CON_INACTIVE -ignore define CEC_OP_ENC_FUNC_STATE_EXT_CON_ACTIVE - -ignore define CEC_OP_CDC_ERROR_CODE_NONE -ignore define CEC_OP_CDC_ERROR_CODE_CAP_UNSUPPORTED -ignore define CEC_OP_CDC_ERROR_CODE_WRONG_STATE -ignore define CEC_OP_CDC_ERROR_CODE_OTHER - -ignore define CEC_OP_HEC_SUPPORT_NO -ignore define CEC_OP_HEC_SUPPORT_YES - -ignore define CEC_OP_HEC_ACTIVATION_ON -ignore define CEC_OP_HEC_ACTIVATION_OFF - -ignore define CEC_MSG_CDC_HEC_SET_STATE_ADJACENT -ignore define CEC_MSG_CDC_HEC_SET_STATE - -ignore define CEC_OP_HEC_SET_STATE_DEACTIVATE -ignore define CEC_OP_HEC_SET_STATE_ACTIVATE - -ignore define CEC_MSG_CDC_HEC_REQUEST_DEACTIVATION -ignore define CEC_MSG_CDC_HEC_NOTIFY_ALIVE -ignore define CEC_MSG_CDC_HEC_DISCOVER - -ignore define CEC_MSG_CDC_HPD_SET_STATE - -ignore define CEC_OP_HPD_STATE_CP_EDID_DISABLE -ignore define CEC_OP_HPD_STATE_CP_EDID_ENABLE -ignore define CEC_OP_HPD_STATE_CP_EDID_DISABLE_ENABLE -ignore define CEC_OP_HPD_STATE_EDID_DISABLE -ignore define CEC_OP_HPD_STATE_EDID_ENABLE -ignore define CEC_OP_HPD_STATE_EDID_DISABLE_ENABLE -ignore define CEC_MSG_CDC_HPD_REPORT_STATE - -ignore define CEC_OP_HPD_ERROR_NONE -ignore define CEC_OP_HPD_ERROR_INITIATOR_NOT_CAPABLE -ignore define CEC_OP_HPD_ERROR_INITIATOR_WRONG_STATE -ignore define CEC_OP_HPD_ERROR_OTHER -ignore define CEC_OP_HPD_ERROR_NONE_NO_VIDEO diff --git a/Documentation/userspace-api/media/cec/cec-header.rst b/Documentation/userspace-api/media/cec/cec-header.rst index d70736ac2b1d..f67003bb8740 100644 --- a/Documentation/userspace-api/media/cec/cec-header.rst +++ b/Documentation/userspace-api/media/cec/cec-header.rst @@ -6,5 +6,6 @@ CEC Header File *************** -.. kernel-include:: $BUILDDIR/cec.h.rst - +.. kernel-include:: include/uapi/linux/cec.h + :generate-cross-refs: + :exception-file: cec.h.rst.exceptions diff --git a/Documentation/userspace-api/media/cec/cec.h.rst.exceptions b/Documentation/userspace-api/media/cec/cec.h.rst.exceptions new file mode 100644 index 000000000000..15fa1752d4ef --- /dev/null +++ b/Documentation/userspace-api/media/cec/cec.h.rst.exceptions @@ -0,0 +1,577 @@ +# SPDX-License-Identifier: GPL-2.0 + +# Ignore header name +ignore define _CEC_UAPI_H + +# define macros to ignore + +ignore define CEC_MAX_MSG_SIZE +ignore define CEC_MAX_LOG_ADDRS + +ignore define CEC_LOG_ADDR_MASK_TV +ignore define CEC_LOG_ADDR_MASK_RECORD +ignore define CEC_LOG_ADDR_MASK_TUNER +ignore define CEC_LOG_ADDR_MASK_PLAYBACK +ignore define CEC_LOG_ADDR_MASK_AUDIOSYSTEM +ignore define CEC_LOG_ADDR_MASK_BACKUP +ignore define CEC_LOG_ADDR_MASK_SPECIFIC +ignore define CEC_LOG_ADDR_MASK_UNREGISTERED + +# Shouldn't them be documented? +ignore define CEC_LOG_ADDR_INVALID +ignore define CEC_PHYS_ADDR_INVALID + +ignore define CEC_VENDOR_ID_NONE + +ignore define CEC_MODE_INITIATOR_MSK +ignore define CEC_MODE_FOLLOWER_MSK + +# Part of CEC 2.0 spec - shouldn't be documented too? +ignore define CEC_LOG_ADDR_TV +ignore define CEC_LOG_ADDR_RECORD_1 +ignore define CEC_LOG_ADDR_RECORD_2 +ignore define CEC_LOG_ADDR_TUNER_1 +ignore define CEC_LOG_ADDR_PLAYBACK_1 +ignore define CEC_LOG_ADDR_AUDIOSYSTEM +ignore define CEC_LOG_ADDR_TUNER_2 +ignore define CEC_LOG_ADDR_TUNER_3 +ignore define CEC_LOG_ADDR_PLAYBACK_2 +ignore define CEC_LOG_ADDR_RECORD_3 +ignore define CEC_LOG_ADDR_TUNER_4 +ignore define CEC_LOG_ADDR_PLAYBACK_3 +ignore define CEC_LOG_ADDR_BACKUP_1 +ignore define CEC_LOG_ADDR_BACKUP_2 +ignore define CEC_LOG_ADDR_SPECIFIC +ignore define CEC_LOG_ADDR_UNREGISTERED +ignore define CEC_LOG_ADDR_BROADCAST + +# IMHO, those should also be documented + +ignore define CEC_MSG_ACTIVE_SOURCE +ignore define CEC_MSG_IMAGE_VIEW_ON +ignore define CEC_MSG_TEXT_VIEW_ON + +ignore define CEC_MSG_INACTIVE_SOURCE +ignore define CEC_MSG_REQUEST_ACTIVE_SOURCE +ignore define CEC_MSG_ROUTING_CHANGE +ignore define CEC_MSG_ROUTING_INFORMATION +ignore define CEC_MSG_SET_STREAM_PATH + +ignore define CEC_MSG_STANDBY + +ignore define CEC_MSG_RECORD_OFF +ignore define CEC_MSG_RECORD_ON + +ignore define CEC_OP_RECORD_SRC_OWN +ignore define CEC_OP_RECORD_SRC_DIGITAL +ignore define CEC_OP_RECORD_SRC_ANALOG +ignore define CEC_OP_RECORD_SRC_EXT_PLUG +ignore define CEC_OP_RECORD_SRC_EXT_PHYS_ADDR + +ignore define CEC_OP_SERVICE_ID_METHOD_BY_DIG_ID +ignore define CEC_OP_SERVICE_ID_METHOD_BY_CHANNEL + +ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ARIB_GEN +ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ATSC_GEN +ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_DVB_GEN +ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ARIB_BS +ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ARIB_CS +ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ARIB_T +ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ATSC_CABLE +ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ATSC_SAT +ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_ATSC_T +ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_DVB_C +ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_DVB_S +ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_DVB_S2 +ignore define CEC_OP_DIG_SERVICE_BCAST_SYSTEM_DVB_T + +ignore define CEC_OP_ANA_BCAST_TYPE_CABLE +ignore define CEC_OP_ANA_BCAST_TYPE_SATELLITE +ignore define CEC_OP_ANA_BCAST_TYPE_TERRESTRIAL + +ignore define CEC_OP_BCAST_SYSTEM_PAL_BG +ignore define CEC_OP_BCAST_SYSTEM_SECAM_LQ +ignore define CEC_OP_BCAST_SYSTEM_PAL_M +ignore define CEC_OP_BCAST_SYSTEM_NTSC_M +ignore define CEC_OP_BCAST_SYSTEM_PAL_I +ignore define CEC_OP_BCAST_SYSTEM_SECAM_DK +ignore define CEC_OP_BCAST_SYSTEM_SECAM_BG +ignore define CEC_OP_BCAST_SYSTEM_SECAM_L +ignore define CEC_OP_BCAST_SYSTEM_PAL_DK +ignore define CEC_OP_BCAST_SYSTEM_OTHER + +ignore define CEC_OP_CHANNEL_NUMBER_FMT_1_PART +ignore define CEC_OP_CHANNEL_NUMBER_FMT_2_PART + +ignore define CEC_MSG_RECORD_STATUS + +ignore define CEC_OP_RECORD_STATUS_CUR_SRC +ignore define CEC_OP_RECORD_STATUS_DIG_SERVICE +ignore define CEC_OP_RECORD_STATUS_ANA_SERVICE +ignore define CEC_OP_RECORD_STATUS_EXT_INPUT +ignore define CEC_OP_RECORD_STATUS_NO_DIG_SERVICE +ignore define CEC_OP_RECORD_STATUS_NO_ANA_SERVICE +ignore define CEC_OP_RECORD_STATUS_NO_SERVICE +ignore define CEC_OP_RECORD_STATUS_INVALID_EXT_PLUG +ignore define CEC_OP_RECORD_STATUS_INVALID_EXT_PHYS_ADDR +ignore define CEC_OP_RECORD_STATUS_UNSUP_CA +ignore define CEC_OP_RECORD_STATUS_NO_CA_ENTITLEMENTS +ignore define CEC_OP_RECORD_STATUS_CANT_COPY_SRC +ignore define CEC_OP_RECORD_STATUS_NO_MORE_COPIES +ignore define CEC_OP_RECORD_STATUS_NO_MEDIA +ignore define CEC_OP_RECORD_STATUS_PLAYING +ignore define CEC_OP_RECORD_STATUS_ALREADY_RECORDING +ignore define CEC_OP_RECORD_STATUS_MEDIA_PROT +ignore define CEC_OP_RECORD_STATUS_NO_SIGNAL +ignore define CEC_OP_RECORD_STATUS_MEDIA_PROBLEM +ignore define CEC_OP_RECORD_STATUS_NO_SPACE +ignore define CEC_OP_RECORD_STATUS_PARENTAL_LOCK +ignore define CEC_OP_RECORD_STATUS_TERMINATED_OK +ignore define CEC_OP_RECORD_STATUS_ALREADY_TERM +ignore define CEC_OP_RECORD_STATUS_OTHER + +ignore define CEC_MSG_RECORD_TV_SCREEN + +ignore define CEC_MSG_CLEAR_ANALOGUE_TIMER + +ignore define CEC_OP_REC_SEQ_SUNDAY +ignore define CEC_OP_REC_SEQ_MONDAY +ignore define CEC_OP_REC_SEQ_TUESDAY +ignore define CEC_OP_REC_SEQ_WEDNESDAY +ignore define CEC_OP_REC_SEQ_THURSDAY +ignore define CEC_OP_REC_SEQ_FRIDAY +ignore define CEC_OP_REC_SEQ_SATURDAY +ignore define CEC_OP_REC_SEQ_ONCE_ONLY + +ignore define CEC_MSG_CLEAR_DIGITAL_TIMER + +ignore define CEC_MSG_CLEAR_EXT_TIMER + +ignore define CEC_OP_EXT_SRC_PLUG +ignore define CEC_OP_EXT_SRC_PHYS_ADDR + +ignore define CEC_MSG_SET_ANALOGUE_TIMER +ignore define CEC_MSG_SET_DIGITAL_TIMER +ignore define CEC_MSG_SET_EXT_TIMER + +ignore define CEC_MSG_SET_TIMER_PROGRAM_TITLE +ignore define CEC_MSG_TIMER_CLEARED_STATUS + +ignore define CEC_OP_TIMER_CLR_STAT_RECORDING +ignore define CEC_OP_TIMER_CLR_STAT_NO_MATCHING +ignore define CEC_OP_TIMER_CLR_STAT_NO_INFO +ignore define CEC_OP_TIMER_CLR_STAT_CLEARED + +ignore define CEC_MSG_TIMER_STATUS + +ignore define CEC_OP_TIMER_OVERLAP_WARNING_NO_OVERLAP +ignore define CEC_OP_TIMER_OVERLAP_WARNING_OVERLAP + +ignore define CEC_OP_MEDIA_INFO_UNPROT_MEDIA +ignore define CEC_OP_MEDIA_INFO_PROT_MEDIA +ignore define CEC_OP_MEDIA_INFO_NO_MEDIA + +ignore define CEC_OP_PROG_IND_NOT_PROGRAMMED +ignore define CEC_OP_PROG_IND_PROGRAMMED + +ignore define CEC_OP_PROG_INFO_ENOUGH_SPACE +ignore define CEC_OP_PROG_INFO_NOT_ENOUGH_SPACE +ignore define CEC_OP_PROG_INFO_MIGHT_NOT_BE_ENOUGH_SPACE +ignore define CEC_OP_PROG_INFO_NONE_AVAILABLE + +ignore define CEC_OP_PROG_ERROR_NO_FREE_TIMER +ignore define CEC_OP_PROG_ERROR_DATE_OUT_OF_RANGE +ignore define CEC_OP_PROG_ERROR_REC_SEQ_ERROR +ignore define CEC_OP_PROG_ERROR_INV_EXT_PLUG +ignore define CEC_OP_PROG_ERROR_INV_EXT_PHYS_ADDR +ignore define CEC_OP_PROG_ERROR_CA_UNSUPP +ignore define CEC_OP_PROG_ERROR_INSUF_CA_ENTITLEMENTS +ignore define CEC_OP_PROG_ERROR_RESOLUTION_UNSUPP +ignore define CEC_OP_PROG_ERROR_PARENTAL_LOCK +ignore define CEC_OP_PROG_ERROR_CLOCK_FAILURE +ignore define CEC_OP_PROG_ERROR_DUPLICATE + +ignore define CEC_MSG_CEC_VERSION + +ignore define CEC_OP_CEC_VERSION_1_3A +ignore define CEC_OP_CEC_VERSION_1_4 +ignore define CEC_OP_CEC_VERSION_2_0 + +ignore define CEC_MSG_GET_CEC_VERSION +ignore define CEC_MSG_GIVE_PHYSICAL_ADDR +ignore define CEC_MSG_GET_MENU_LANGUAGE +ignore define CEC_MSG_REPORT_PHYSICAL_ADDR + +ignore define CEC_OP_PRIM_DEVTYPE_TV +ignore define CEC_OP_PRIM_DEVTYPE_RECORD +ignore define CEC_OP_PRIM_DEVTYPE_TUNER +ignore define CEC_OP_PRIM_DEVTYPE_PLAYBACK +ignore define CEC_OP_PRIM_DEVTYPE_AUDIOSYSTEM +ignore define CEC_OP_PRIM_DEVTYPE_SWITCH +ignore define CEC_OP_PRIM_DEVTYPE_PROCESSOR + +ignore define CEC_MSG_SET_MENU_LANGUAGE +ignore define CEC_MSG_REPORT_FEATURES + +ignore define CEC_OP_ALL_DEVTYPE_TV +ignore define CEC_OP_ALL_DEVTYPE_RECORD +ignore define CEC_OP_ALL_DEVTYPE_TUNER +ignore define CEC_OP_ALL_DEVTYPE_PLAYBACK +ignore define CEC_OP_ALL_DEVTYPE_AUDIOSYSTEM +ignore define CEC_OP_ALL_DEVTYPE_SWITCH + +ignore define CEC_OP_FEAT_EXT + +ignore define CEC_OP_FEAT_RC_TV_PROFILE_NONE +ignore define CEC_OP_FEAT_RC_TV_PROFILE_1 +ignore define CEC_OP_FEAT_RC_TV_PROFILE_2 +ignore define CEC_OP_FEAT_RC_TV_PROFILE_3 +ignore define CEC_OP_FEAT_RC_TV_PROFILE_4 +ignore define CEC_OP_FEAT_RC_SRC_HAS_DEV_ROOT_MENU +ignore define CEC_OP_FEAT_RC_SRC_HAS_DEV_SETUP_MENU +ignore define CEC_OP_FEAT_RC_SRC_HAS_CONTENTS_MENU +ignore define CEC_OP_FEAT_RC_SRC_HAS_MEDIA_TOP_MENU +ignore define CEC_OP_FEAT_RC_SRC_HAS_MEDIA_CONTEXT_MENU + +ignore define CEC_OP_FEAT_DEV_HAS_RECORD_TV_SCREEN +ignore define CEC_OP_FEAT_DEV_HAS_SET_OSD_STRING +ignore define CEC_OP_FEAT_DEV_HAS_DECK_CONTROL +ignore define CEC_OP_FEAT_DEV_HAS_SET_AUDIO_RATE +ignore define CEC_OP_FEAT_DEV_SINK_HAS_ARC_TX +ignore define CEC_OP_FEAT_DEV_SOURCE_HAS_ARC_RX +ignore define CEC_OP_FEAT_DEV_HAS_SET_AUDIO_VOLUME_LEVEL + +ignore define CEC_MSG_GIVE_FEATURES + +ignore define CEC_MSG_DECK_CONTROL + +ignore define CEC_OP_DECK_CTL_MODE_SKIP_FWD +ignore define CEC_OP_DECK_CTL_MODE_SKIP_REV +ignore define CEC_OP_DECK_CTL_MODE_STOP +ignore define CEC_OP_DECK_CTL_MODE_EJECT + +ignore define CEC_MSG_DECK_STATUS + +ignore define CEC_OP_DECK_INFO_PLAY +ignore define CEC_OP_DECK_INFO_RECORD +ignore define CEC_OP_DECK_INFO_PLAY_REV +ignore define CEC_OP_DECK_INFO_STILL +ignore define CEC_OP_DECK_INFO_SLOW +ignore define CEC_OP_DECK_INFO_SLOW_REV +ignore define CEC_OP_DECK_INFO_FAST_FWD +ignore define CEC_OP_DECK_INFO_FAST_REV +ignore define CEC_OP_DECK_INFO_NO_MEDIA +ignore define CEC_OP_DECK_INFO_STOP +ignore define CEC_OP_DECK_INFO_SKIP_FWD +ignore define CEC_OP_DECK_INFO_SKIP_REV +ignore define CEC_OP_DECK_INFO_INDEX_SEARCH_FWD +ignore define CEC_OP_DECK_INFO_INDEX_SEARCH_REV +ignore define CEC_OP_DECK_INFO_OTHER + +ignore define CEC_MSG_GIVE_DECK_STATUS + +ignore define CEC_OP_STATUS_REQ_ON +ignore define CEC_OP_STATUS_REQ_OFF +ignore define CEC_OP_STATUS_REQ_ONCE + +ignore define CEC_MSG_PLAY + +ignore define CEC_OP_PLAY_MODE_PLAY_FWD +ignore define CEC_OP_PLAY_MODE_PLAY_REV +ignore define CEC_OP_PLAY_MODE_PLAY_STILL +ignore define CEC_OP_PLAY_MODE_PLAY_FAST_FWD_MIN +ignore define CEC_OP_PLAY_MODE_PLAY_FAST_FWD_MED +ignore define CEC_OP_PLAY_MODE_PLAY_FAST_FWD_MAX +ignore define CEC_OP_PLAY_MODE_PLAY_FAST_REV_MIN +ignore define CEC_OP_PLAY_MODE_PLAY_FAST_REV_MED +ignore define CEC_OP_PLAY_MODE_PLAY_FAST_REV_MAX +ignore define CEC_OP_PLAY_MODE_PLAY_SLOW_FWD_MIN +ignore define CEC_OP_PLAY_MODE_PLAY_SLOW_FWD_MED +ignore define CEC_OP_PLAY_MODE_PLAY_SLOW_FWD_MAX +ignore define CEC_OP_PLAY_MODE_PLAY_SLOW_REV_MIN +ignore define CEC_OP_PLAY_MODE_PLAY_SLOW_REV_MED +ignore define CEC_OP_PLAY_MODE_PLAY_SLOW_REV_MAX + +ignore define CEC_MSG_GIVE_TUNER_DEVICE_STATUS +ignore define CEC_MSG_SELECT_ANALOGUE_SERVICE +ignore define CEC_MSG_SELECT_DIGITAL_SERVICE +ignore define CEC_MSG_TUNER_DEVICE_STATUS + +ignore define CEC_OP_REC_FLAG_USED +ignore define CEC_OP_REC_FLAG_NOT_USED + +ignore define CEC_OP_TUNER_DISPLAY_INFO_DIGITAL +ignore define CEC_OP_TUNER_DISPLAY_INFO_NONE +ignore define CEC_OP_TUNER_DISPLAY_INFO_ANALOGUE + +ignore define CEC_MSG_TUNER_STEP_DECREMENT +ignore define CEC_MSG_TUNER_STEP_INCREMENT + +ignore define CEC_MSG_DEVICE_VENDOR_ID +ignore define CEC_MSG_GIVE_DEVICE_VENDOR_ID +ignore define CEC_MSG_VENDOR_COMMAND +ignore define CEC_MSG_VENDOR_COMMAND_WITH_ID +ignore define CEC_MSG_VENDOR_REMOTE_BUTTON_DOWN +ignore define CEC_MSG_VENDOR_REMOTE_BUTTON_UP + +ignore define CEC_MSG_SET_OSD_STRING + +ignore define CEC_OP_DISP_CTL_DEFAULT +ignore define CEC_OP_DISP_CTL_UNTIL_CLEARED +ignore define CEC_OP_DISP_CTL_CLEAR + +ignore define CEC_MSG_GIVE_OSD_NAME +ignore define CEC_MSG_SET_OSD_NAME + +ignore define CEC_MSG_MENU_REQUEST + +ignore define CEC_OP_MENU_REQUEST_ACTIVATE +ignore define CEC_OP_MENU_REQUEST_DEACTIVATE +ignore define CEC_OP_MENU_REQUEST_QUERY + +ignore define CEC_MSG_MENU_STATUS + +ignore define CEC_OP_MENU_STATE_ACTIVATED +ignore define CEC_OP_MENU_STATE_DEACTIVATED + +ignore define CEC_MSG_USER_CONTROL_PRESSED + +ignore define CEC_OP_UI_CMD_SELECT +ignore define CEC_OP_UI_CMD_UP +ignore define CEC_OP_UI_CMD_DOWN +ignore define CEC_OP_UI_CMD_LEFT +ignore define CEC_OP_UI_CMD_RIGHT +ignore define CEC_OP_UI_CMD_RIGHT_UP +ignore define CEC_OP_UI_CMD_RIGHT_DOWN +ignore define CEC_OP_UI_CMD_LEFT_UP +ignore define CEC_OP_UI_CMD_LEFT_DOWN +ignore define CEC_OP_UI_CMD_DEVICE_ROOT_MENU +ignore define CEC_OP_UI_CMD_DEVICE_SETUP_MENU +ignore define CEC_OP_UI_CMD_CONTENTS_MENU +ignore define CEC_OP_UI_CMD_FAVORITE_MENU +ignore define CEC_OP_UI_CMD_BACK +ignore define CEC_OP_UI_CMD_MEDIA_TOP_MENU +ignore define CEC_OP_UI_CMD_MEDIA_CONTEXT_SENSITIVE_MENU +ignore define CEC_OP_UI_CMD_NUMBER_ENTRY_MODE +ignore define CEC_OP_UI_CMD_NUMBER_11 +ignore define CEC_OP_UI_CMD_NUMBER_12 +ignore define CEC_OP_UI_CMD_NUMBER_0_OR_NUMBER_10 +ignore define CEC_OP_UI_CMD_NUMBER_1 +ignore define CEC_OP_UI_CMD_NUMBER_2 +ignore define CEC_OP_UI_CMD_NUMBER_3 +ignore define CEC_OP_UI_CMD_NUMBER_4 +ignore define CEC_OP_UI_CMD_NUMBER_5 +ignore define CEC_OP_UI_CMD_NUMBER_6 +ignore define CEC_OP_UI_CMD_NUMBER_7 +ignore define CEC_OP_UI_CMD_NUMBER_8 +ignore define CEC_OP_UI_CMD_NUMBER_9 +ignore define CEC_OP_UI_CMD_DOT +ignore define CEC_OP_UI_CMD_ENTER +ignore define CEC_OP_UI_CMD_CLEAR +ignore define CEC_OP_UI_CMD_NEXT_FAVORITE +ignore define CEC_OP_UI_CMD_CHANNEL_UP +ignore define CEC_OP_UI_CMD_CHANNEL_DOWN +ignore define CEC_OP_UI_CMD_PREVIOUS_CHANNEL +ignore define CEC_OP_UI_CMD_SOUND_SELECT +ignore define CEC_OP_UI_CMD_INPUT_SELECT +ignore define CEC_OP_UI_CMD_DISPLAY_INFORMATION +ignore define CEC_OP_UI_CMD_HELP +ignore define CEC_OP_UI_CMD_PAGE_UP +ignore define CEC_OP_UI_CMD_PAGE_DOWN +ignore define CEC_OP_UI_CMD_POWER +ignore define CEC_OP_UI_CMD_VOLUME_UP +ignore define CEC_OP_UI_CMD_VOLUME_DOWN +ignore define CEC_OP_UI_CMD_MUTE +ignore define CEC_OP_UI_CMD_PLAY +ignore define CEC_OP_UI_CMD_STOP +ignore define CEC_OP_UI_CMD_PAUSE +ignore define CEC_OP_UI_CMD_RECORD +ignore define CEC_OP_UI_CMD_REWIND +ignore define CEC_OP_UI_CMD_FAST_FORWARD +ignore define CEC_OP_UI_CMD_EJECT +ignore define CEC_OP_UI_CMD_SKIP_FORWARD +ignore define CEC_OP_UI_CMD_SKIP_BACKWARD +ignore define CEC_OP_UI_CMD_STOP_RECORD +ignore define CEC_OP_UI_CMD_PAUSE_RECORD +ignore define CEC_OP_UI_CMD_ANGLE +ignore define CEC_OP_UI_CMD_SUB_PICTURE +ignore define CEC_OP_UI_CMD_VIDEO_ON_DEMAND +ignore define CEC_OP_UI_CMD_ELECTRONIC_PROGRAM_GUIDE +ignore define CEC_OP_UI_CMD_TIMER_PROGRAMMING +ignore define CEC_OP_UI_CMD_INITIAL_CONFIGURATION +ignore define CEC_OP_UI_CMD_SELECT_BROADCAST_TYPE +ignore define CEC_OP_UI_CMD_SELECT_SOUND_PRESENTATION +ignore define CEC_OP_UI_CMD_AUDIO_DESCRIPTION +ignore define CEC_OP_UI_CMD_INTERNET +ignore define CEC_OP_UI_CMD_3D_MODE +ignore define CEC_OP_UI_CMD_PLAY_FUNCTION +ignore define CEC_OP_UI_CMD_PAUSE_PLAY_FUNCTION +ignore define CEC_OP_UI_CMD_RECORD_FUNCTION +ignore define CEC_OP_UI_CMD_PAUSE_RECORD_FUNCTION +ignore define CEC_OP_UI_CMD_STOP_FUNCTION +ignore define CEC_OP_UI_CMD_MUTE_FUNCTION +ignore define CEC_OP_UI_CMD_RESTORE_VOLUME_FUNCTION +ignore define CEC_OP_UI_CMD_TUNE_FUNCTION +ignore define CEC_OP_UI_CMD_SELECT_MEDIA_FUNCTION +ignore define CEC_OP_UI_CMD_SELECT_AV_INPUT_FUNCTION +ignore define CEC_OP_UI_CMD_SELECT_AUDIO_INPUT_FUNCTION +ignore define CEC_OP_UI_CMD_POWER_TOGGLE_FUNCTION +ignore define CEC_OP_UI_CMD_POWER_OFF_FUNCTION +ignore define CEC_OP_UI_CMD_POWER_ON_FUNCTION +ignore define CEC_OP_UI_CMD_F1_BLUE +ignore define CEC_OP_UI_CMD_F2_RED +ignore define CEC_OP_UI_CMD_F3_GREEN +ignore define CEC_OP_UI_CMD_F4_YELLOW +ignore define CEC_OP_UI_CMD_F5 +ignore define CEC_OP_UI_CMD_DATA + +ignore define CEC_OP_UI_BCAST_TYPE_TOGGLE_ALL +ignore define CEC_OP_UI_BCAST_TYPE_TOGGLE_DIG_ANA +ignore define CEC_OP_UI_BCAST_TYPE_ANALOGUE +ignore define CEC_OP_UI_BCAST_TYPE_ANALOGUE_T +ignore define CEC_OP_UI_BCAST_TYPE_ANALOGUE_CABLE +ignore define CEC_OP_UI_BCAST_TYPE_ANALOGUE_SAT +ignore define CEC_OP_UI_BCAST_TYPE_DIGITAL +ignore define CEC_OP_UI_BCAST_TYPE_DIGITAL_T +ignore define CEC_OP_UI_BCAST_TYPE_DIGITAL_CABLE +ignore define CEC_OP_UI_BCAST_TYPE_DIGITAL_SAT +ignore define CEC_OP_UI_BCAST_TYPE_DIGITAL_COM_SAT +ignore define CEC_OP_UI_BCAST_TYPE_DIGITAL_COM_SAT2 +ignore define CEC_OP_UI_BCAST_TYPE_IP + +ignore define CEC_OP_UI_SND_PRES_CTL_DUAL_MONO +ignore define CEC_OP_UI_SND_PRES_CTL_KARAOKE +ignore define CEC_OP_UI_SND_PRES_CTL_DOWNMIX +ignore define CEC_OP_UI_SND_PRES_CTL_REVERB +ignore define CEC_OP_UI_SND_PRES_CTL_EQUALIZER +ignore define CEC_OP_UI_SND_PRES_CTL_BASS_UP +ignore define CEC_OP_UI_SND_PRES_CTL_BASS_NEUTRAL +ignore define CEC_OP_UI_SND_PRES_CTL_BASS_DOWN +ignore define CEC_OP_UI_SND_PRES_CTL_TREBLE_UP +ignore define CEC_OP_UI_SND_PRES_CTL_TREBLE_NEUTRAL +ignore define CEC_OP_UI_SND_PRES_CTL_TREBLE_DOWN + +ignore define CEC_MSG_USER_CONTROL_RELEASED + +ignore define CEC_MSG_GIVE_DEVICE_POWER_STATUS +ignore define CEC_MSG_REPORT_POWER_STATUS + +ignore define CEC_OP_POWER_STATUS_ON +ignore define CEC_OP_POWER_STATUS_STANDBY +ignore define CEC_OP_POWER_STATUS_TO_ON +ignore define CEC_OP_POWER_STATUS_TO_STANDBY + +ignore define CEC_MSG_FEATURE_ABORT + +ignore define CEC_OP_ABORT_UNRECOGNIZED_OP +ignore define CEC_OP_ABORT_INCORRECT_MODE +ignore define CEC_OP_ABORT_NO_SOURCE +ignore define CEC_OP_ABORT_INVALID_OP +ignore define CEC_OP_ABORT_REFUSED +ignore define CEC_OP_ABORT_UNDETERMINED + +ignore define CEC_MSG_ABORT + +ignore define CEC_MSG_GIVE_AUDIO_STATUS +ignore define CEC_MSG_GIVE_SYSTEM_AUDIO_MODE_STATUS +ignore define CEC_MSG_REPORT_AUDIO_STATUS + +ignore define CEC_OP_AUD_MUTE_STATUS_OFF +ignore define CEC_OP_AUD_MUTE_STATUS_ON + +ignore define CEC_MSG_REPORT_SHORT_AUDIO_DESCRIPTOR +ignore define CEC_MSG_REQUEST_SHORT_AUDIO_DESCRIPTOR +ignore define CEC_MSG_SET_SYSTEM_AUDIO_MODE + +ignore define CEC_OP_SYS_AUD_STATUS_OFF +ignore define CEC_OP_SYS_AUD_STATUS_ON + +ignore define CEC_MSG_SYSTEM_AUDIO_MODE_REQUEST +ignore define CEC_MSG_SYSTEM_AUDIO_MODE_STATUS +ignore define CEC_MSG_SET_AUDIO_VOLUME_LEVEL + +ignore define CEC_OP_AUD_FMT_ID_CEA861 +ignore define CEC_OP_AUD_FMT_ID_CEA861_CXT + +ignore define CEC_MSG_SET_AUDIO_RATE + +ignore define CEC_OP_AUD_RATE_OFF +ignore define CEC_OP_AUD_RATE_WIDE_STD +ignore define CEC_OP_AUD_RATE_WIDE_FAST +ignore define CEC_OP_AUD_RATE_WIDE_SLOW +ignore define CEC_OP_AUD_RATE_NARROW_STD +ignore define CEC_OP_AUD_RATE_NARROW_FAST +ignore define CEC_OP_AUD_RATE_NARROW_SLOW + +ignore define CEC_MSG_INITIATE_ARC +ignore define CEC_MSG_REPORT_ARC_INITIATED +ignore define CEC_MSG_REPORT_ARC_TERMINATED +ignore define CEC_MSG_REQUEST_ARC_INITIATION +ignore define CEC_MSG_REQUEST_ARC_TERMINATION +ignore define CEC_MSG_TERMINATE_ARC + +ignore define CEC_MSG_REQUEST_CURRENT_LATENCY +ignore define CEC_MSG_REPORT_CURRENT_LATENCY + +ignore define CEC_OP_LOW_LATENCY_MODE_OFF +ignore define CEC_OP_LOW_LATENCY_MODE_ON + +ignore define CEC_OP_AUD_OUT_COMPENSATED_NA +ignore define CEC_OP_AUD_OUT_COMPENSATED_DELAY +ignore define CEC_OP_AUD_OUT_COMPENSATED_NO_DELAY +ignore define CEC_OP_AUD_OUT_COMPENSATED_PARTIAL_DELAY + +ignore define CEC_MSG_CDC_MESSAGE + +ignore define CEC_MSG_CDC_HEC_INQUIRE_STATE +ignore define CEC_MSG_CDC_HEC_REPORT_STATE + +ignore define CEC_OP_HEC_FUNC_STATE_NOT_SUPPORTED +ignore define CEC_OP_HEC_FUNC_STATE_INACTIVE +ignore define CEC_OP_HEC_FUNC_STATE_ACTIVE +ignore define CEC_OP_HEC_FUNC_STATE_ACTIVATION_FIELD + +ignore define CEC_OP_HOST_FUNC_STATE_NOT_SUPPORTED +ignore define CEC_OP_HOST_FUNC_STATE_INACTIVE +ignore define CEC_OP_HOST_FUNC_STATE_ACTIVE + +ignore define CEC_OP_ENC_FUNC_STATE_EXT_CON_NOT_SUPPORTED +ignore define CEC_OP_ENC_FUNC_STATE_EXT_CON_INACTIVE +ignore define CEC_OP_ENC_FUNC_STATE_EXT_CON_ACTIVE + +ignore define CEC_OP_CDC_ERROR_CODE_NONE +ignore define CEC_OP_CDC_ERROR_CODE_CAP_UNSUPPORTED +ignore define CEC_OP_CDC_ERROR_CODE_WRONG_STATE +ignore define CEC_OP_CDC_ERROR_CODE_OTHER + +ignore define CEC_OP_HEC_SUPPORT_NO +ignore define CEC_OP_HEC_SUPPORT_YES + +ignore define CEC_OP_HEC_ACTIVATION_ON +ignore define CEC_OP_HEC_ACTIVATION_OFF + +ignore define CEC_MSG_CDC_HEC_SET_STATE_ADJACENT +ignore define CEC_MSG_CDC_HEC_SET_STATE + +ignore define CEC_OP_HEC_SET_STATE_DEACTIVATE +ignore define CEC_OP_HEC_SET_STATE_ACTIVATE + +ignore define CEC_MSG_CDC_HEC_REQUEST_DEACTIVATION +ignore define CEC_MSG_CDC_HEC_NOTIFY_ALIVE +ignore define CEC_MSG_CDC_HEC_DISCOVER + +ignore define CEC_MSG_CDC_HPD_SET_STATE + +ignore define CEC_OP_HPD_STATE_CP_EDID_DISABLE +ignore define CEC_OP_HPD_STATE_CP_EDID_ENABLE +ignore define CEC_OP_HPD_STATE_CP_EDID_DISABLE_ENABLE +ignore define CEC_OP_HPD_STATE_EDID_DISABLE +ignore define CEC_OP_HPD_STATE_EDID_ENABLE +ignore define CEC_OP_HPD_STATE_EDID_DISABLE_ENABLE +ignore define CEC_MSG_CDC_HPD_REPORT_STATE + +ignore define CEC_OP_HPD_ERROR_NONE +ignore define CEC_OP_HPD_ERROR_INITIATOR_NOT_CAPABLE +ignore define CEC_OP_HPD_ERROR_INITIATOR_WRONG_STATE +ignore define CEC_OP_HPD_ERROR_OTHER +ignore define CEC_OP_HPD_ERROR_NONE_NO_VIDEO diff --git a/Documentation/userspace-api/media/dmx.h.rst.exceptions b/Documentation/userspace-api/media/dmx.h.rst.exceptions deleted file mode 100644 index afc14d384b83..000000000000 --- a/Documentation/userspace-api/media/dmx.h.rst.exceptions +++ /dev/null @@ -1,66 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 - -# Ignore header name -ignore define _UAPI_DVBDMX_H_ - -# Ignore limit constants -ignore define DMX_FILTER_SIZE - -# dmx_pes_type_t enum symbols -replace enum dmx_ts_pes :c:type:`dmx_pes_type` -replace symbol DMX_PES_AUDIO0 :c:type:`dmx_pes_type` -replace symbol DMX_PES_VIDEO0 :c:type:`dmx_pes_type` -replace symbol DMX_PES_TELETEXT0 :c:type:`dmx_pes_type` -replace symbol DMX_PES_SUBTITLE0 :c:type:`dmx_pes_type` -replace symbol DMX_PES_PCR0 :c:type:`dmx_pes_type` -replace symbol DMX_PES_AUDIO1 :c:type:`dmx_pes_type` -replace symbol DMX_PES_VIDEO1 :c:type:`dmx_pes_type` -replace symbol DMX_PES_TELETEXT1 :c:type:`dmx_pes_type` -replace symbol DMX_PES_SUBTITLE1 :c:type:`dmx_pes_type` -replace symbol DMX_PES_PCR1 :c:type:`dmx_pes_type` -replace symbol DMX_PES_AUDIO2 :c:type:`dmx_pes_type` -replace symbol DMX_PES_VIDEO2 :c:type:`dmx_pes_type` -replace symbol DMX_PES_TELETEXT2 :c:type:`dmx_pes_type` -replace symbol DMX_PES_SUBTITLE2 :c:type:`dmx_pes_type` -replace symbol DMX_PES_PCR2 :c:type:`dmx_pes_type` -replace symbol DMX_PES_AUDIO3 :c:type:`dmx_pes_type` -replace symbol DMX_PES_VIDEO3 :c:type:`dmx_pes_type` -replace symbol DMX_PES_TELETEXT3 :c:type:`dmx_pes_type` -replace symbol DMX_PES_SUBTITLE3 :c:type:`dmx_pes_type` -replace symbol DMX_PES_PCR3 :c:type:`dmx_pes_type` -replace symbol DMX_PES_OTHER :c:type:`dmx_pes_type` - -# Ignore obsolete symbols -ignore define DMX_PES_AUDIO -ignore define DMX_PES_VIDEO -ignore define DMX_PES_TELETEXT -ignore define DMX_PES_SUBTITLE -ignore define DMX_PES_PCR - -# dmx_input_t symbols -replace enum dmx_input :c:type:`dmx_input` -replace symbol DMX_IN_FRONTEND :c:type:`dmx_input` -replace symbol DMX_IN_DVR :c:type:`dmx_input` - -# Flags for struct dmx_sct_filter_params -replace define DMX_CHECK_CRC :c:type:`dmx_sct_filter_params` -replace define DMX_ONESHOT :c:type:`dmx_sct_filter_params` -replace define DMX_IMMEDIATE_START :c:type:`dmx_sct_filter_params` - -# some typedefs should point to struct/enums -replace typedef dmx_filter_t :c:type:`dmx_filter` -replace typedef dmx_pes_type_t :c:type:`dmx_pes_type` -replace typedef dmx_input_t :c:type:`dmx_input` - -replace symbol DMX_BUFFER_FLAG_HAD_CRC32_DISCARD :c:type:`dmx_buffer_flags` -replace symbol DMX_BUFFER_FLAG_TEI :c:type:`dmx_buffer_flags` -replace symbol DMX_BUFFER_PKT_COUNTER_MISMATCH :c:type:`dmx_buffer_flags` -replace symbol DMX_BUFFER_FLAG_DISCONTINUITY_DETECTED :c:type:`dmx_buffer_flags` -replace symbol DMX_BUFFER_FLAG_DISCONTINUITY_INDICATOR :c:type:`dmx_buffer_flags` - -replace symbol DMX_OUT_DECODER :c:type:`dmx_output` -replace symbol DMX_OUT_TAP :c:type:`dmx_output` -replace symbol DMX_OUT_TS_TAP :c:type:`dmx_output` -replace symbol DMX_OUT_TSDEMUX_TAP :c:type:`dmx_output` - -replace ioctl DMX_DQBUF dmx_qbuf diff --git a/Documentation/userspace-api/media/dvb/ca.h.rst.exceptions b/Documentation/userspace-api/media/dvb/ca.h.rst.exceptions new file mode 100644 index 000000000000..f6828238eb48 --- /dev/null +++ b/Documentation/userspace-api/media/dvb/ca.h.rst.exceptions @@ -0,0 +1,25 @@ +# SPDX-License-Identifier: GPL-2.0 + +# Ignore header name +ignore define _DVBCA_H_ + +# struct ca_slot_info defines +replace define CA_CI :c:type:`ca_slot_info` +replace define CA_CI_LINK :c:type:`ca_slot_info` +replace define CA_CI_PHYS :c:type:`ca_slot_info` +replace define CA_DESCR :c:type:`ca_slot_info` +replace define CA_SC :c:type:`ca_slot_info` +replace define CA_CI_MODULE_PRESENT :c:type:`ca_slot_info` +replace define CA_CI_MODULE_READY :c:type:`ca_slot_info` + +# struct ca_descr_info defines +replace define CA_ECD :c:type:`ca_descr_info` +replace define CA_NDS :c:type:`ca_descr_info` +replace define CA_DSS :c:type:`ca_descr_info` + +# some typedefs should point to struct/enums +replace typedef ca_slot_info_t :c:type:`ca_slot_info` +replace typedef ca_descr_info_t :c:type:`ca_descr_info` +replace typedef ca_caps_t :c:type:`ca_caps` +replace typedef ca_msg_t :c:type:`ca_msg` +replace typedef ca_descr_t :c:type:`ca_descr` diff --git a/Documentation/userspace-api/media/dvb/dmx.h.rst.exceptions b/Documentation/userspace-api/media/dvb/dmx.h.rst.exceptions new file mode 100644 index 000000000000..afc14d384b83 --- /dev/null +++ b/Documentation/userspace-api/media/dvb/dmx.h.rst.exceptions @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: GPL-2.0 + +# Ignore header name +ignore define _UAPI_DVBDMX_H_ + +# Ignore limit constants +ignore define DMX_FILTER_SIZE + +# dmx_pes_type_t enum symbols +replace enum dmx_ts_pes :c:type:`dmx_pes_type` +replace symbol DMX_PES_AUDIO0 :c:type:`dmx_pes_type` +replace symbol DMX_PES_VIDEO0 :c:type:`dmx_pes_type` +replace symbol DMX_PES_TELETEXT0 :c:type:`dmx_pes_type` +replace symbol DMX_PES_SUBTITLE0 :c:type:`dmx_pes_type` +replace symbol DMX_PES_PCR0 :c:type:`dmx_pes_type` +replace symbol DMX_PES_AUDIO1 :c:type:`dmx_pes_type` +replace symbol DMX_PES_VIDEO1 :c:type:`dmx_pes_type` +replace symbol DMX_PES_TELETEXT1 :c:type:`dmx_pes_type` +replace symbol DMX_PES_SUBTITLE1 :c:type:`dmx_pes_type` +replace symbol DMX_PES_PCR1 :c:type:`dmx_pes_type` +replace symbol DMX_PES_AUDIO2 :c:type:`dmx_pes_type` +replace symbol DMX_PES_VIDEO2 :c:type:`dmx_pes_type` +replace symbol DMX_PES_TELETEXT2 :c:type:`dmx_pes_type` +replace symbol DMX_PES_SUBTITLE2 :c:type:`dmx_pes_type` +replace symbol DMX_PES_PCR2 :c:type:`dmx_pes_type` +replace symbol DMX_PES_AUDIO3 :c:type:`dmx_pes_type` +replace symbol DMX_PES_VIDEO3 :c:type:`dmx_pes_type` +replace symbol DMX_PES_TELETEXT3 :c:type:`dmx_pes_type` +replace symbol DMX_PES_SUBTITLE3 :c:type:`dmx_pes_type` +replace symbol DMX_PES_PCR3 :c:type:`dmx_pes_type` +replace symbol DMX_PES_OTHER :c:type:`dmx_pes_type` + +# Ignore obsolete symbols +ignore define DMX_PES_AUDIO +ignore define DMX_PES_VIDEO +ignore define DMX_PES_TELETEXT +ignore define DMX_PES_SUBTITLE +ignore define DMX_PES_PCR + +# dmx_input_t symbols +replace enum dmx_input :c:type:`dmx_input` +replace symbol DMX_IN_FRONTEND :c:type:`dmx_input` +replace symbol DMX_IN_DVR :c:type:`dmx_input` + +# Flags for struct dmx_sct_filter_params +replace define DMX_CHECK_CRC :c:type:`dmx_sct_filter_params` +replace define DMX_ONESHOT :c:type:`dmx_sct_filter_params` +replace define DMX_IMMEDIATE_START :c:type:`dmx_sct_filter_params` + +# some typedefs should point to struct/enums +replace typedef dmx_filter_t :c:type:`dmx_filter` +replace typedef dmx_pes_type_t :c:type:`dmx_pes_type` +replace typedef dmx_input_t :c:type:`dmx_input` + +replace symbol DMX_BUFFER_FLAG_HAD_CRC32_DISCARD :c:type:`dmx_buffer_flags` +replace symbol DMX_BUFFER_FLAG_TEI :c:type:`dmx_buffer_flags` +replace symbol DMX_BUFFER_PKT_COUNTER_MISMATCH :c:type:`dmx_buffer_flags` +replace symbol DMX_BUFFER_FLAG_DISCONTINUITY_DETECTED :c:type:`dmx_buffer_flags` +replace symbol DMX_BUFFER_FLAG_DISCONTINUITY_INDICATOR :c:type:`dmx_buffer_flags` + +replace symbol DMX_OUT_DECODER :c:type:`dmx_output` +replace symbol DMX_OUT_TAP :c:type:`dmx_output` +replace symbol DMX_OUT_TS_TAP :c:type:`dmx_output` +replace symbol DMX_OUT_TSDEMUX_TAP :c:type:`dmx_output` + +replace ioctl DMX_DQBUF dmx_qbuf diff --git a/Documentation/userspace-api/media/dvb/frontend.h.rst.exceptions b/Documentation/userspace-api/media/dvb/frontend.h.rst.exceptions new file mode 100644 index 000000000000..dcaf5740de7e --- /dev/null +++ b/Documentation/userspace-api/media/dvb/frontend.h.rst.exceptions @@ -0,0 +1,246 @@ +# SPDX-License-Identifier: GPL-2.0 + +# Ignore header name +ignore define _DVBFRONTEND_H_ + +# Group layer A-C symbols together +replace define DTV_ISDBT_LAYERA_FEC dtv-isdbt-layer-fec +replace define DTV_ISDBT_LAYERB_FEC dtv-isdbt-layer-fec +replace define DTV_ISDBT_LAYERC_FEC dtv-isdbt-layer-fec +replace define DTV_ISDBT_LAYERA_MODULATION dtv-isdbt-layer-modulation +replace define DTV_ISDBT_LAYERB_MODULATION dtv-isdbt-layer-modulation +replace define DTV_ISDBT_LAYERC_MODULATION dtv-isdbt-layer-modulation +replace define DTV_ISDBT_LAYERA_SEGMENT_COUNT dtv-isdbt-layer-segment-count +replace define DTV_ISDBT_LAYERB_SEGMENT_COUNT dtv-isdbt-layer-segment-count +replace define DTV_ISDBT_LAYERC_SEGMENT_COUNT dtv-isdbt-layer-segment-count +replace define DTV_ISDBT_LAYERA_TIME_INTERLEAVING dtv-isdbt-layer-time-interleaving +replace define DTV_ISDBT_LAYERB_TIME_INTERLEAVING dtv-isdbt-layer-time-interleaving +replace define DTV_ISDBT_LAYERC_TIME_INTERLEAVING dtv-isdbt-layer-time-interleaving + +# Ignore legacy defines +ignore define DTV_ISDBS_TS_ID_LEGACY +ignore define SYS_DVBC_ANNEX_AC +ignore define SYS_DMBTH + +# Ignore limits +ignore define DTV_MAX_COMMAND +ignore define MAX_DTV_STATS +ignore define DTV_IOCTL_MAX_MSGS + +# the same reference is used for both get and set ioctls +replace ioctl FE_SET_PROPERTY :c:type:`FE_GET_PROPERTY` + +# Typedefs that use the enum reference +replace typedef fe_sec_voltage_t :c:type:`fe_sec_voltage` + +# Replaces for flag constants +replace define FE_TUNE_MODE_ONESHOT :c:func:`FE_SET_FRONTEND_TUNE_MODE` +replace define LNA_AUTO dtv-lna +replace define NO_STREAM_ID_FILTER dtv-stream-id + +# Those enums are defined at the frontend.h header, and not externally + +ignore symbol FE_IS_STUPID +ignore symbol FE_CAN_INVERSION_AUTO +ignore symbol FE_CAN_FEC_1_2 +ignore symbol FE_CAN_FEC_2_3 +ignore symbol FE_CAN_FEC_3_4 +ignore symbol FE_CAN_FEC_4_5 +ignore symbol FE_CAN_FEC_5_6 +ignore symbol FE_CAN_FEC_6_7 +ignore symbol FE_CAN_FEC_7_8 +ignore symbol FE_CAN_FEC_8_9 +ignore symbol FE_CAN_FEC_AUTO +ignore symbol FE_CAN_QPSK +ignore symbol FE_CAN_QAM_16 +ignore symbol FE_CAN_QAM_32 +ignore symbol FE_CAN_QAM_64 +ignore symbol FE_CAN_QAM_128 +ignore symbol FE_CAN_QAM_256 +ignore symbol FE_CAN_QAM_AUTO +ignore symbol FE_CAN_TRANSMISSION_MODE_AUTO +ignore symbol FE_CAN_BANDWIDTH_AUTO +ignore symbol FE_CAN_GUARD_INTERVAL_AUTO +ignore symbol FE_CAN_HIERARCHY_AUTO +ignore symbol FE_CAN_8VSB +ignore symbol FE_CAN_16VSB +ignore symbol FE_HAS_EXTENDED_CAPS +ignore symbol FE_CAN_MULTISTREAM +ignore symbol FE_CAN_TURBO_FEC +ignore symbol FE_CAN_2G_MODULATION +ignore symbol FE_NEEDS_BENDING +ignore symbol FE_CAN_RECOVER +ignore symbol FE_CAN_MUTE_TS + +ignore symbol QPSK +ignore symbol QAM_16 +ignore symbol QAM_32 +ignore symbol QAM_64 +ignore symbol QAM_128 +ignore symbol QAM_256 +ignore symbol QAM_AUTO +ignore symbol VSB_8 +ignore symbol VSB_16 +ignore symbol PSK_8 +ignore symbol APSK_16 +ignore symbol APSK_32 +ignore symbol DQPSK +ignore symbol QAM_4_NR +ignore symbol QAM_1024 +ignore symbol QAM_4096 +ignore symbol APSK_8_L +ignore symbol APSK_16_L +ignore symbol APSK_32_L +ignore symbol APSK_64 +ignore symbol APSK_64_L + +ignore symbol SEC_VOLTAGE_13 +ignore symbol SEC_VOLTAGE_18 +ignore symbol SEC_VOLTAGE_OFF + +ignore symbol SEC_TONE_ON +ignore symbol SEC_TONE_OFF + +ignore symbol SEC_MINI_A +ignore symbol SEC_MINI_B + +ignore symbol FE_NONE +ignore symbol FE_HAS_SIGNAL +ignore symbol FE_HAS_CARRIER +ignore symbol FE_HAS_VITERBI +ignore symbol FE_HAS_SYNC +ignore symbol FE_HAS_LOCK +ignore symbol FE_REINIT +ignore symbol FE_TIMEDOUT + +ignore symbol FEC_NONE +ignore symbol FEC_1_2 +ignore symbol FEC_2_3 +ignore symbol FEC_3_4 +ignore symbol FEC_4_5 +ignore symbol FEC_5_6 +ignore symbol FEC_6_7 +ignore symbol FEC_7_8 +ignore symbol FEC_8_9 +ignore symbol FEC_AUTO +ignore symbol FEC_3_5 +ignore symbol FEC_9_10 +ignore symbol FEC_2_5 +ignore symbol FEC_1_3 +ignore symbol FEC_1_4 +ignore symbol FEC_5_9 +ignore symbol FEC_7_9 +ignore symbol FEC_8_15 +ignore symbol FEC_11_15 +ignore symbol FEC_13_18 +ignore symbol FEC_9_20 +ignore symbol FEC_11_20 +ignore symbol FEC_23_36 +ignore symbol FEC_25_36 +ignore symbol FEC_13_45 +ignore symbol FEC_26_45 +ignore symbol FEC_28_45 +ignore symbol FEC_32_45 +ignore symbol FEC_77_90 +ignore symbol FEC_11_45 +ignore symbol FEC_4_15 +ignore symbol FEC_14_45 +ignore symbol FEC_7_15 + +ignore symbol TRANSMISSION_MODE_AUTO +ignore symbol TRANSMISSION_MODE_1K +ignore symbol TRANSMISSION_MODE_2K +ignore symbol TRANSMISSION_MODE_8K +ignore symbol TRANSMISSION_MODE_4K +ignore symbol TRANSMISSION_MODE_16K +ignore symbol TRANSMISSION_MODE_32K +ignore symbol TRANSMISSION_MODE_C1 +ignore symbol TRANSMISSION_MODE_C3780 +ignore symbol TRANSMISSION_MODE_2K +ignore symbol TRANSMISSION_MODE_8K + +ignore symbol GUARD_INTERVAL_AUTO +ignore symbol GUARD_INTERVAL_1_128 +ignore symbol GUARD_INTERVAL_1_32 +ignore symbol GUARD_INTERVAL_1_16 +ignore symbol GUARD_INTERVAL_1_8 +ignore symbol GUARD_INTERVAL_1_4 +ignore symbol GUARD_INTERVAL_19_128 +ignore symbol GUARD_INTERVAL_19_256 +ignore symbol GUARD_INTERVAL_PN420 +ignore symbol GUARD_INTERVAL_PN595 +ignore symbol GUARD_INTERVAL_PN945 +ignore symbol GUARD_INTERVAL_1_64 + +ignore symbol HIERARCHY_NONE +ignore symbol HIERARCHY_AUTO +ignore symbol HIERARCHY_1 +ignore symbol HIERARCHY_2 +ignore symbol HIERARCHY_4 + +ignore symbol INTERLEAVING_NONE +ignore symbol INTERLEAVING_AUTO +ignore symbol INTERLEAVING_240 +ignore symbol INTERLEAVING_720 + +ignore symbol PILOT_ON +ignore symbol PILOT_OFF +ignore symbol PILOT_AUTO + +ignore symbol ROLLOFF_35 +ignore symbol ROLLOFF_20 +ignore symbol ROLLOFF_25 +ignore symbol ROLLOFF_AUTO +ignore symbol ROLLOFF_15 +ignore symbol ROLLOFF_10 +ignore symbol ROLLOFF_5 + +ignore symbol INVERSION_ON +ignore symbol INVERSION_OFF +ignore symbol INVERSION_AUTO + +ignore symbol SYS_UNDEFINED +ignore symbol SYS_DVBC_ANNEX_A +ignore symbol SYS_DVBC_ANNEX_B +ignore symbol SYS_DVBC_ANNEX_C +ignore symbol SYS_ISDBC +ignore symbol SYS_DVBT +ignore symbol SYS_DVBT2 +ignore symbol SYS_ISDBT +ignore symbol SYS_ATSC +ignore symbol SYS_ATSCMH +ignore symbol SYS_DTMB +ignore symbol SYS_DVBS +ignore symbol SYS_DVBS2 +ignore symbol SYS_TURBO +ignore symbol SYS_ISDBS +ignore symbol SYS_DAB +ignore symbol SYS_DSS +ignore symbol SYS_CMMB +ignore symbol SYS_DVBH +ignore symbol SYS_DVBC2 + +ignore symbol ATSCMH_SCCC_BLK_SEP +ignore symbol ATSCMH_SCCC_BLK_COMB +ignore symbol ATSCMH_SCCC_BLK_RES + +ignore symbol ATSCMH_SCCC_CODE_HLF +ignore symbol ATSCMH_SCCC_CODE_QTR +ignore symbol ATSCMH_SCCC_CODE_RES + +ignore symbol ATSCMH_RSFRAME_ENS_PRI +ignore symbol ATSCMH_RSFRAME_ENS_SEC + +ignore symbol ATSCMH_RSFRAME_PRI_ONLY +ignore symbol ATSCMH_RSFRAME_PRI_SEC +ignore symbol ATSCMH_RSFRAME_RES + +ignore symbol ATSCMH_RSCODE_211_187 +ignore symbol ATSCMH_RSCODE_223_187 +ignore symbol ATSCMH_RSCODE_235_187 +ignore symbol ATSCMH_RSCODE_RES + +ignore symbol FE_SCALE_NOT_AVAILABLE +ignore symbol FE_SCALE_DECIBEL +ignore symbol FE_SCALE_RELATIVE +ignore symbol FE_SCALE_COUNTER diff --git a/Documentation/userspace-api/media/dvb/headers.rst b/Documentation/userspace-api/media/dvb/headers.rst index 88c3eb33a89e..c75f64cf21d5 100644 --- a/Documentation/userspace-api/media/dvb/headers.rst +++ b/Documentation/userspace-api/media/dvb/headers.rst @@ -7,10 +7,19 @@ Digital TV uAPI header files Digital TV uAPI headers *********************** -.. kernel-include:: $BUILDDIR/frontend.h.rst +.. kernel-include:: include/uapi/linux/dvb/frontend.h + :generate-cross-refs: + :exception-file: frontend.h.rst.exceptions -.. kernel-include:: $BUILDDIR/dmx.h.rst +.. kernel-include:: include/uapi/linux/dvb/dmx.h + :generate-cross-refs: + :exception-file: dmx.h.rst.exceptions -.. kernel-include:: $BUILDDIR/ca.h.rst +.. kernel-include:: include/uapi/linux/dvb/ca.h + :generate-cross-refs: + :exception-file: ca.h.rst.exceptions + +.. kernel-include:: include/uapi/linux/dvb/net.h + :generate-cross-refs: + :exception-file: net.h.rst.exceptions -.. kernel-include:: $BUILDDIR/net.h.rst diff --git a/Documentation/userspace-api/media/dvb/net.h.rst.exceptions b/Documentation/userspace-api/media/dvb/net.h.rst.exceptions new file mode 100644 index 000000000000..5159aa4bbbb9 --- /dev/null +++ b/Documentation/userspace-api/media/dvb/net.h.rst.exceptions @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-2.0 + +# Ignore header name +ignore define _DVBNET_H_ + +# Ignore old ioctls/structs +ignore ioctl __NET_ADD_IF_OLD +ignore ioctl __NET_GET_IF_OLD +ignore struct __dvb_net_if_old + +# Macros used at struct dvb_net_if +replace define DVB_NET_FEEDTYPE_MPE :c:type:`dvb_net_if` +replace define DVB_NET_FEEDTYPE_ULE :c:type:`dvb_net_if` diff --git a/Documentation/userspace-api/media/frontend.h.rst.exceptions b/Documentation/userspace-api/media/frontend.h.rst.exceptions deleted file mode 100644 index dcaf5740de7e..000000000000 --- a/Documentation/userspace-api/media/frontend.h.rst.exceptions +++ /dev/null @@ -1,246 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 - -# Ignore header name -ignore define _DVBFRONTEND_H_ - -# Group layer A-C symbols together -replace define DTV_ISDBT_LAYERA_FEC dtv-isdbt-layer-fec -replace define DTV_ISDBT_LAYERB_FEC dtv-isdbt-layer-fec -replace define DTV_ISDBT_LAYERC_FEC dtv-isdbt-layer-fec -replace define DTV_ISDBT_LAYERA_MODULATION dtv-isdbt-layer-modulation -replace define DTV_ISDBT_LAYERB_MODULATION dtv-isdbt-layer-modulation -replace define DTV_ISDBT_LAYERC_MODULATION dtv-isdbt-layer-modulation -replace define DTV_ISDBT_LAYERA_SEGMENT_COUNT dtv-isdbt-layer-segment-count -replace define DTV_ISDBT_LAYERB_SEGMENT_COUNT dtv-isdbt-layer-segment-count -replace define DTV_ISDBT_LAYERC_SEGMENT_COUNT dtv-isdbt-layer-segment-count -replace define DTV_ISDBT_LAYERA_TIME_INTERLEAVING dtv-isdbt-layer-time-interleaving -replace define DTV_ISDBT_LAYERB_TIME_INTERLEAVING dtv-isdbt-layer-time-interleaving -replace define DTV_ISDBT_LAYERC_TIME_INTERLEAVING dtv-isdbt-layer-time-interleaving - -# Ignore legacy defines -ignore define DTV_ISDBS_TS_ID_LEGACY -ignore define SYS_DVBC_ANNEX_AC -ignore define SYS_DMBTH - -# Ignore limits -ignore define DTV_MAX_COMMAND -ignore define MAX_DTV_STATS -ignore define DTV_IOCTL_MAX_MSGS - -# the same reference is used for both get and set ioctls -replace ioctl FE_SET_PROPERTY :c:type:`FE_GET_PROPERTY` - -# Typedefs that use the enum reference -replace typedef fe_sec_voltage_t :c:type:`fe_sec_voltage` - -# Replaces for flag constants -replace define FE_TUNE_MODE_ONESHOT :c:func:`FE_SET_FRONTEND_TUNE_MODE` -replace define LNA_AUTO dtv-lna -replace define NO_STREAM_ID_FILTER dtv-stream-id - -# Those enums are defined at the frontend.h header, and not externally - -ignore symbol FE_IS_STUPID -ignore symbol FE_CAN_INVERSION_AUTO -ignore symbol FE_CAN_FEC_1_2 -ignore symbol FE_CAN_FEC_2_3 -ignore symbol FE_CAN_FEC_3_4 -ignore symbol FE_CAN_FEC_4_5 -ignore symbol FE_CAN_FEC_5_6 -ignore symbol FE_CAN_FEC_6_7 -ignore symbol FE_CAN_FEC_7_8 -ignore symbol FE_CAN_FEC_8_9 -ignore symbol FE_CAN_FEC_AUTO -ignore symbol FE_CAN_QPSK -ignore symbol FE_CAN_QAM_16 -ignore symbol FE_CAN_QAM_32 -ignore symbol FE_CAN_QAM_64 -ignore symbol FE_CAN_QAM_128 -ignore symbol FE_CAN_QAM_256 -ignore symbol FE_CAN_QAM_AUTO -ignore symbol FE_CAN_TRANSMISSION_MODE_AUTO -ignore symbol FE_CAN_BANDWIDTH_AUTO -ignore symbol FE_CAN_GUARD_INTERVAL_AUTO -ignore symbol FE_CAN_HIERARCHY_AUTO -ignore symbol FE_CAN_8VSB -ignore symbol FE_CAN_16VSB -ignore symbol FE_HAS_EXTENDED_CAPS -ignore symbol FE_CAN_MULTISTREAM -ignore symbol FE_CAN_TURBO_FEC -ignore symbol FE_CAN_2G_MODULATION -ignore symbol FE_NEEDS_BENDING -ignore symbol FE_CAN_RECOVER -ignore symbol FE_CAN_MUTE_TS - -ignore symbol QPSK -ignore symbol QAM_16 -ignore symbol QAM_32 -ignore symbol QAM_64 -ignore symbol QAM_128 -ignore symbol QAM_256 -ignore symbol QAM_AUTO -ignore symbol VSB_8 -ignore symbol VSB_16 -ignore symbol PSK_8 -ignore symbol APSK_16 -ignore symbol APSK_32 -ignore symbol DQPSK -ignore symbol QAM_4_NR -ignore symbol QAM_1024 -ignore symbol QAM_4096 -ignore symbol APSK_8_L -ignore symbol APSK_16_L -ignore symbol APSK_32_L -ignore symbol APSK_64 -ignore symbol APSK_64_L - -ignore symbol SEC_VOLTAGE_13 -ignore symbol SEC_VOLTAGE_18 -ignore symbol SEC_VOLTAGE_OFF - -ignore symbol SEC_TONE_ON -ignore symbol SEC_TONE_OFF - -ignore symbol SEC_MINI_A -ignore symbol SEC_MINI_B - -ignore symbol FE_NONE -ignore symbol FE_HAS_SIGNAL -ignore symbol FE_HAS_CARRIER -ignore symbol FE_HAS_VITERBI -ignore symbol FE_HAS_SYNC -ignore symbol FE_HAS_LOCK -ignore symbol FE_REINIT -ignore symbol FE_TIMEDOUT - -ignore symbol FEC_NONE -ignore symbol FEC_1_2 -ignore symbol FEC_2_3 -ignore symbol FEC_3_4 -ignore symbol FEC_4_5 -ignore symbol FEC_5_6 -ignore symbol FEC_6_7 -ignore symbol FEC_7_8 -ignore symbol FEC_8_9 -ignore symbol FEC_AUTO -ignore symbol FEC_3_5 -ignore symbol FEC_9_10 -ignore symbol FEC_2_5 -ignore symbol FEC_1_3 -ignore symbol FEC_1_4 -ignore symbol FEC_5_9 -ignore symbol FEC_7_9 -ignore symbol FEC_8_15 -ignore symbol FEC_11_15 -ignore symbol FEC_13_18 -ignore symbol FEC_9_20 -ignore symbol FEC_11_20 -ignore symbol FEC_23_36 -ignore symbol FEC_25_36 -ignore symbol FEC_13_45 -ignore symbol FEC_26_45 -ignore symbol FEC_28_45 -ignore symbol FEC_32_45 -ignore symbol FEC_77_90 -ignore symbol FEC_11_45 -ignore symbol FEC_4_15 -ignore symbol FEC_14_45 -ignore symbol FEC_7_15 - -ignore symbol TRANSMISSION_MODE_AUTO -ignore symbol TRANSMISSION_MODE_1K -ignore symbol TRANSMISSION_MODE_2K -ignore symbol TRANSMISSION_MODE_8K -ignore symbol TRANSMISSION_MODE_4K -ignore symbol TRANSMISSION_MODE_16K -ignore symbol TRANSMISSION_MODE_32K -ignore symbol TRANSMISSION_MODE_C1 -ignore symbol TRANSMISSION_MODE_C3780 -ignore symbol TRANSMISSION_MODE_2K -ignore symbol TRANSMISSION_MODE_8K - -ignore symbol GUARD_INTERVAL_AUTO -ignore symbol GUARD_INTERVAL_1_128 -ignore symbol GUARD_INTERVAL_1_32 -ignore symbol GUARD_INTERVAL_1_16 -ignore symbol GUARD_INTERVAL_1_8 -ignore symbol GUARD_INTERVAL_1_4 -ignore symbol GUARD_INTERVAL_19_128 -ignore symbol GUARD_INTERVAL_19_256 -ignore symbol GUARD_INTERVAL_PN420 -ignore symbol GUARD_INTERVAL_PN595 -ignore symbol GUARD_INTERVAL_PN945 -ignore symbol GUARD_INTERVAL_1_64 - -ignore symbol HIERARCHY_NONE -ignore symbol HIERARCHY_AUTO -ignore symbol HIERARCHY_1 -ignore symbol HIERARCHY_2 -ignore symbol HIERARCHY_4 - -ignore symbol INTERLEAVING_NONE -ignore symbol INTERLEAVING_AUTO -ignore symbol INTERLEAVING_240 -ignore symbol INTERLEAVING_720 - -ignore symbol PILOT_ON -ignore symbol PILOT_OFF -ignore symbol PILOT_AUTO - -ignore symbol ROLLOFF_35 -ignore symbol ROLLOFF_20 -ignore symbol ROLLOFF_25 -ignore symbol ROLLOFF_AUTO -ignore symbol ROLLOFF_15 -ignore symbol ROLLOFF_10 -ignore symbol ROLLOFF_5 - -ignore symbol INVERSION_ON -ignore symbol INVERSION_OFF -ignore symbol INVERSION_AUTO - -ignore symbol SYS_UNDEFINED -ignore symbol SYS_DVBC_ANNEX_A -ignore symbol SYS_DVBC_ANNEX_B -ignore symbol SYS_DVBC_ANNEX_C -ignore symbol SYS_ISDBC -ignore symbol SYS_DVBT -ignore symbol SYS_DVBT2 -ignore symbol SYS_ISDBT -ignore symbol SYS_ATSC -ignore symbol SYS_ATSCMH -ignore symbol SYS_DTMB -ignore symbol SYS_DVBS -ignore symbol SYS_DVBS2 -ignore symbol SYS_TURBO -ignore symbol SYS_ISDBS -ignore symbol SYS_DAB -ignore symbol SYS_DSS -ignore symbol SYS_CMMB -ignore symbol SYS_DVBH -ignore symbol SYS_DVBC2 - -ignore symbol ATSCMH_SCCC_BLK_SEP -ignore symbol ATSCMH_SCCC_BLK_COMB -ignore symbol ATSCMH_SCCC_BLK_RES - -ignore symbol ATSCMH_SCCC_CODE_HLF -ignore symbol ATSCMH_SCCC_CODE_QTR -ignore symbol ATSCMH_SCCC_CODE_RES - -ignore symbol ATSCMH_RSFRAME_ENS_PRI -ignore symbol ATSCMH_RSFRAME_ENS_SEC - -ignore symbol ATSCMH_RSFRAME_PRI_ONLY -ignore symbol ATSCMH_RSFRAME_PRI_SEC -ignore symbol ATSCMH_RSFRAME_RES - -ignore symbol ATSCMH_RSCODE_211_187 -ignore symbol ATSCMH_RSCODE_223_187 -ignore symbol ATSCMH_RSCODE_235_187 -ignore symbol ATSCMH_RSCODE_RES - -ignore symbol FE_SCALE_NOT_AVAILABLE -ignore symbol FE_SCALE_DECIBEL -ignore symbol FE_SCALE_RELATIVE -ignore symbol FE_SCALE_COUNTER diff --git a/Documentation/userspace-api/media/lirc.h.rst.exceptions b/Documentation/userspace-api/media/lirc.h.rst.exceptions deleted file mode 100644 index 1aeb7d7afe13..000000000000 --- a/Documentation/userspace-api/media/lirc.h.rst.exceptions +++ /dev/null @@ -1,87 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 - -# Ignore header name -ignore define _LINUX_LIRC_H - -# Ignore helper macros - -ignore define lirc_t - -ignore define LIRC_SPACE -ignore define LIRC_PULSE -ignore define LIRC_FREQUENCY -ignore define LIRC_TIMEOUT -ignore define LIRC_OVERFLOW -ignore define LIRC_VALUE -ignore define LIRC_MODE2 -ignore define LIRC_IS_SPACE -ignore define LIRC_IS_PULSE -ignore define LIRC_IS_FREQUENCY -ignore define LIRC_IS_TIMEOUT -ignore define LIRC_IS_OVERFLOW - -ignore define LIRC_MODE2SEND -ignore define LIRC_SEND2MODE -ignore define LIRC_MODE2REC -ignore define LIRC_REC2MODE - -ignore define LIRC_CAN_SEND -ignore define LIRC_CAN_REC - -ignore define LIRC_CAN_SEND_MASK -ignore define LIRC_CAN_REC_MASK -ignore define LIRC_CAN_SET_REC_FILTER -ignore define LIRC_CAN_NOTIFY_DECODE - -# Obsolete ioctls - -ignore ioctl LIRC_GET_LENGTH -ignore ioctl LIRC_SET_REC_TIMEOUT_REPORTS - -# rc protocols - -ignore symbol RC_PROTO_UNKNOWN -ignore symbol RC_PROTO_OTHER -ignore symbol RC_PROTO_RC5 -ignore symbol RC_PROTO_RC5X_20 -ignore symbol RC_PROTO_RC5_SZ -ignore symbol RC_PROTO_JVC -ignore symbol RC_PROTO_SONY12 -ignore symbol RC_PROTO_SONY15 -ignore symbol RC_PROTO_SONY20 -ignore symbol RC_PROTO_NEC -ignore symbol RC_PROTO_NECX -ignore symbol RC_PROTO_NEC32 -ignore symbol RC_PROTO_SANYO -ignore symbol RC_PROTO_MCIR2_KBD -ignore symbol RC_PROTO_MCIR2_MSE -ignore symbol RC_PROTO_RC6_0 -ignore symbol RC_PROTO_RC6_6A_20 -ignore symbol RC_PROTO_RC6_6A_24 -ignore symbol RC_PROTO_RC6_6A_32 -ignore symbol RC_PROTO_RC6_MCE -ignore symbol RC_PROTO_SHARP -ignore symbol RC_PROTO_XMP -ignore symbol RC_PROTO_CEC -ignore symbol RC_PROTO_IMON -ignore symbol RC_PROTO_RCMM12 -ignore symbol RC_PROTO_RCMM24 -ignore symbol RC_PROTO_RCMM32 -ignore symbol RC_PROTO_XBOX_DVD -ignore symbol RC_PROTO_MAX - -# Undocumented macros - -ignore define PULSE_BIT -ignore define PULSE_MASK - -ignore define LIRC_MODE2_SPACE -ignore define LIRC_MODE2_PULSE -ignore define LIRC_MODE2_TIMEOUT -ignore define LIRC_MODE2_OVERFLOW - -ignore define LIRC_VALUE_MASK -ignore define LIRC_MODE2_MASK - -ignore define LIRC_MODE_RAW -ignore define LIRC_MODE_LIRCCODE diff --git a/Documentation/userspace-api/media/media.h.rst.exceptions b/Documentation/userspace-api/media/media.h.rst.exceptions deleted file mode 100644 index 9b4c26502d95..000000000000 --- a/Documentation/userspace-api/media/media.h.rst.exceptions +++ /dev/null @@ -1,32 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 - -# Ignore header name -ignore define __LINUX_MEDIA_H - -# Ignore macros -ignore define MEDIA_API_VERSION -ignore define MEDIA_ENT_F_BASE -ignore define MEDIA_ENT_F_OLD_BASE -ignore define MEDIA_ENT_F_OLD_SUBDEV_BASE -ignore define MEDIA_ENT_F_DTV_DECODER -ignore define MEDIA_INTF_T_DVB_BASE -ignore define MEDIA_INTF_T_V4L_BASE -ignore define MEDIA_INTF_T_ALSA_BASE -#ignore legacy entity type macros -ignore define MEDIA_ENT_TYPE_SHIFT -ignore define MEDIA_ENT_TYPE_MASK -ignore define MEDIA_ENT_SUBTYPE_MASK -ignore define MEDIA_ENT_T_DEVNODE_UNKNOWN -ignore define MEDIA_ENT_T_DEVNODE -ignore define MEDIA_ENT_T_DEVNODE_V4L -ignore define MEDIA_ENT_T_DEVNODE_FB -ignore define MEDIA_ENT_T_DEVNODE_ALSA -ignore define MEDIA_ENT_T_DEVNODE_DVB -ignore define MEDIA_ENT_T_UNKNOWN -ignore define MEDIA_ENT_T_V4L2_VIDEO -ignore define MEDIA_ENT_T_V4L2_SUBDEV -ignore define MEDIA_ENT_T_V4L2_SUBDEV_SENSOR -ignore define MEDIA_ENT_T_V4L2_SUBDEV_FLASH -ignore define MEDIA_ENT_T_V4L2_SUBDEV_LENS -ignore define MEDIA_ENT_T_V4L2_SUBDEV_DECODER -ignore define MEDIA_ENT_T_V4L2_SUBDEV_TUNER diff --git a/Documentation/userspace-api/media/mediactl/media-header.rst b/Documentation/userspace-api/media/mediactl/media-header.rst index c674271c93f5..d561d2845f3d 100644 --- a/Documentation/userspace-api/media/mediactl/media-header.rst +++ b/Documentation/userspace-api/media/mediactl/media-header.rst @@ -6,5 +6,6 @@ Media Controller Header File **************************** -.. kernel-include:: $BUILDDIR/media.h.rst - +.. kernel-include:: include/uapi/linux/media.h + :generate-cross-refs: + :exception-file: media.h.rst.exceptions diff --git a/Documentation/userspace-api/media/mediactl/media.h.rst.exceptions b/Documentation/userspace-api/media/mediactl/media.h.rst.exceptions new file mode 100644 index 000000000000..9b4c26502d95 --- /dev/null +++ b/Documentation/userspace-api/media/mediactl/media.h.rst.exceptions @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: GPL-2.0 + +# Ignore header name +ignore define __LINUX_MEDIA_H + +# Ignore macros +ignore define MEDIA_API_VERSION +ignore define MEDIA_ENT_F_BASE +ignore define MEDIA_ENT_F_OLD_BASE +ignore define MEDIA_ENT_F_OLD_SUBDEV_BASE +ignore define MEDIA_ENT_F_DTV_DECODER +ignore define MEDIA_INTF_T_DVB_BASE +ignore define MEDIA_INTF_T_V4L_BASE +ignore define MEDIA_INTF_T_ALSA_BASE +#ignore legacy entity type macros +ignore define MEDIA_ENT_TYPE_SHIFT +ignore define MEDIA_ENT_TYPE_MASK +ignore define MEDIA_ENT_SUBTYPE_MASK +ignore define MEDIA_ENT_T_DEVNODE_UNKNOWN +ignore define MEDIA_ENT_T_DEVNODE +ignore define MEDIA_ENT_T_DEVNODE_V4L +ignore define MEDIA_ENT_T_DEVNODE_FB +ignore define MEDIA_ENT_T_DEVNODE_ALSA +ignore define MEDIA_ENT_T_DEVNODE_DVB +ignore define MEDIA_ENT_T_UNKNOWN +ignore define MEDIA_ENT_T_V4L2_VIDEO +ignore define MEDIA_ENT_T_V4L2_SUBDEV +ignore define MEDIA_ENT_T_V4L2_SUBDEV_SENSOR +ignore define MEDIA_ENT_T_V4L2_SUBDEV_FLASH +ignore define MEDIA_ENT_T_V4L2_SUBDEV_LENS +ignore define MEDIA_ENT_T_V4L2_SUBDEV_DECODER +ignore define MEDIA_ENT_T_V4L2_SUBDEV_TUNER diff --git a/Documentation/userspace-api/media/net.h.rst.exceptions b/Documentation/userspace-api/media/net.h.rst.exceptions deleted file mode 100644 index 5159aa4bbbb9..000000000000 --- a/Documentation/userspace-api/media/net.h.rst.exceptions +++ /dev/null @@ -1,13 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 - -# Ignore header name -ignore define _DVBNET_H_ - -# Ignore old ioctls/structs -ignore ioctl __NET_ADD_IF_OLD -ignore ioctl __NET_GET_IF_OLD -ignore struct __dvb_net_if_old - -# Macros used at struct dvb_net_if -replace define DVB_NET_FEEDTYPE_MPE :c:type:`dvb_net_if` -replace define DVB_NET_FEEDTYPE_ULE :c:type:`dvb_net_if` diff --git a/Documentation/userspace-api/media/rc/lirc-header.rst b/Documentation/userspace-api/media/rc/lirc-header.rst index 54cb40b8a065..a53328327847 100644 --- a/Documentation/userspace-api/media/rc/lirc-header.rst +++ b/Documentation/userspace-api/media/rc/lirc-header.rst @@ -6,5 +6,7 @@ LIRC Header File **************** -.. kernel-include:: $BUILDDIR/lirc.h.rst +.. kernel-include:: include/uapi/linux/lirc.h + :generate-cross-refs: + :exception-file: lirc.h.rst.exceptions diff --git a/Documentation/userspace-api/media/rc/lirc.h.rst.exceptions b/Documentation/userspace-api/media/rc/lirc.h.rst.exceptions new file mode 100644 index 000000000000..1aeb7d7afe13 --- /dev/null +++ b/Documentation/userspace-api/media/rc/lirc.h.rst.exceptions @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: GPL-2.0 + +# Ignore header name +ignore define _LINUX_LIRC_H + +# Ignore helper macros + +ignore define lirc_t + +ignore define LIRC_SPACE +ignore define LIRC_PULSE +ignore define LIRC_FREQUENCY +ignore define LIRC_TIMEOUT +ignore define LIRC_OVERFLOW +ignore define LIRC_VALUE +ignore define LIRC_MODE2 +ignore define LIRC_IS_SPACE +ignore define LIRC_IS_PULSE +ignore define LIRC_IS_FREQUENCY +ignore define LIRC_IS_TIMEOUT +ignore define LIRC_IS_OVERFLOW + +ignore define LIRC_MODE2SEND +ignore define LIRC_SEND2MODE +ignore define LIRC_MODE2REC +ignore define LIRC_REC2MODE + +ignore define LIRC_CAN_SEND +ignore define LIRC_CAN_REC + +ignore define LIRC_CAN_SEND_MASK +ignore define LIRC_CAN_REC_MASK +ignore define LIRC_CAN_SET_REC_FILTER +ignore define LIRC_CAN_NOTIFY_DECODE + +# Obsolete ioctls + +ignore ioctl LIRC_GET_LENGTH +ignore ioctl LIRC_SET_REC_TIMEOUT_REPORTS + +# rc protocols + +ignore symbol RC_PROTO_UNKNOWN +ignore symbol RC_PROTO_OTHER +ignore symbol RC_PROTO_RC5 +ignore symbol RC_PROTO_RC5X_20 +ignore symbol RC_PROTO_RC5_SZ +ignore symbol RC_PROTO_JVC +ignore symbol RC_PROTO_SONY12 +ignore symbol RC_PROTO_SONY15 +ignore symbol RC_PROTO_SONY20 +ignore symbol RC_PROTO_NEC +ignore symbol RC_PROTO_NECX +ignore symbol RC_PROTO_NEC32 +ignore symbol RC_PROTO_SANYO +ignore symbol RC_PROTO_MCIR2_KBD +ignore symbol RC_PROTO_MCIR2_MSE +ignore symbol RC_PROTO_RC6_0 +ignore symbol RC_PROTO_RC6_6A_20 +ignore symbol RC_PROTO_RC6_6A_24 +ignore symbol RC_PROTO_RC6_6A_32 +ignore symbol RC_PROTO_RC6_MCE +ignore symbol RC_PROTO_SHARP +ignore symbol RC_PROTO_XMP +ignore symbol RC_PROTO_CEC +ignore symbol RC_PROTO_IMON +ignore symbol RC_PROTO_RCMM12 +ignore symbol RC_PROTO_RCMM24 +ignore symbol RC_PROTO_RCMM32 +ignore symbol RC_PROTO_XBOX_DVD +ignore symbol RC_PROTO_MAX + +# Undocumented macros + +ignore define PULSE_BIT +ignore define PULSE_MASK + +ignore define LIRC_MODE2_SPACE +ignore define LIRC_MODE2_PULSE +ignore define LIRC_MODE2_TIMEOUT +ignore define LIRC_MODE2_OVERFLOW + +ignore define LIRC_VALUE_MASK +ignore define LIRC_MODE2_MASK + +ignore define LIRC_MODE_RAW +ignore define LIRC_MODE_LIRCCODE diff --git a/Documentation/userspace-api/media/v4l/videodev.rst b/Documentation/userspace-api/media/v4l/videodev.rst index c866fec417eb..cde485bc9a5f 100644 --- a/Documentation/userspace-api/media/v4l/videodev.rst +++ b/Documentation/userspace-api/media/v4l/videodev.rst @@ -6,4 +6,6 @@ Video For Linux Two Header File ******************************* -.. kernel-include:: $BUILDDIR/videodev2.h.rst +.. kernel-include:: include/uapi/linux/videodev2.h + :generate-cross-refs: + :exception-file: videodev2.h.rst.exceptions diff --git a/Documentation/userspace-api/media/v4l/videodev2.h.rst.exceptions b/Documentation/userspace-api/media/v4l/videodev2.h.rst.exceptions new file mode 100644 index 000000000000..35d3456cc812 --- /dev/null +++ b/Documentation/userspace-api/media/v4l/videodev2.h.rst.exceptions @@ -0,0 +1,610 @@ +# SPDX-License-Identifier: GPL-2.0 + +# Ignore header name +ignore define _UAPI__LINUX_VIDEODEV2_H + +# +# The cross reference valitator for videodev2.h DocBook never cared +# about enum symbols or defines. Yet, they're all (or almost all?) +# handled inside V4L API sections. So, for now, it is safe to just +# ignore. This should be revisited, as validating it helps to avoid +# having something not documented at the uAPI. +# + +# Those symbols should not be used by uAPI - don't document them +ignore symbol V4L2_BUF_TYPE_PRIVATE +ignore symbol V4L2_TUNER_DIGITAL_TV +ignore symbol V4L2_COLORSPACE_BT878 + +# Documented enum v4l2_field +replace symbol V4L2_FIELD_ALTERNATE :c:type:`v4l2_field` +replace symbol V4L2_FIELD_ANY :c:type:`v4l2_field` +replace symbol V4L2_FIELD_BOTTOM :c:type:`v4l2_field` +replace symbol V4L2_FIELD_INTERLACED :c:type:`v4l2_field` +replace symbol V4L2_FIELD_INTERLACED_BT :c:type:`v4l2_field` +replace symbol V4L2_FIELD_INTERLACED_TB :c:type:`v4l2_field` +replace symbol V4L2_FIELD_NONE :c:type:`v4l2_field` +replace symbol V4L2_FIELD_SEQ_BT :c:type:`v4l2_field` +replace symbol V4L2_FIELD_SEQ_TB :c:type:`v4l2_field` +replace symbol V4L2_FIELD_TOP :c:type:`v4l2_field` + +# Documented enum v4l2_buf_type +replace symbol V4L2_BUF_TYPE_META_CAPTURE :c:type:`v4l2_buf_type` +replace symbol V4L2_BUF_TYPE_META_OUTPUT :c:type:`v4l2_buf_type` +replace symbol V4L2_BUF_TYPE_SDR_CAPTURE :c:type:`v4l2_buf_type` +replace symbol V4L2_BUF_TYPE_SDR_OUTPUT :c:type:`v4l2_buf_type` +replace symbol V4L2_BUF_TYPE_SLICED_VBI_CAPTURE :c:type:`v4l2_buf_type` +replace symbol V4L2_BUF_TYPE_SLICED_VBI_OUTPUT :c:type:`v4l2_buf_type` +replace symbol V4L2_BUF_TYPE_VBI_CAPTURE :c:type:`v4l2_buf_type` +replace symbol V4L2_BUF_TYPE_VBI_OUTPUT :c:type:`v4l2_buf_type` +replace symbol V4L2_BUF_TYPE_VIDEO_CAPTURE :c:type:`v4l2_buf_type` +replace symbol V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE :c:type:`v4l2_buf_type` +replace symbol V4L2_BUF_TYPE_VIDEO_OUTPUT :c:type:`v4l2_buf_type` +replace symbol V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE :c:type:`v4l2_buf_type` +replace symbol V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY :c:type:`v4l2_buf_type` +replace symbol V4L2_BUF_TYPE_VIDEO_OVERLAY :c:type:`v4l2_buf_type` + +# Documented enum v4l2_tuner_type +replace symbol V4L2_TUNER_ANALOG_TV :c:type:`v4l2_tuner_type` +replace symbol V4L2_TUNER_RADIO :c:type:`v4l2_tuner_type` +replace symbol V4L2_TUNER_RF :c:type:`v4l2_tuner_type` +replace symbol V4L2_TUNER_SDR :c:type:`v4l2_tuner_type` + +# Documented enum v4l2_memory +replace symbol V4L2_MEMORY_DMABUF :c:type:`v4l2_memory` +replace symbol V4L2_MEMORY_MMAP :c:type:`v4l2_memory` +replace symbol V4L2_MEMORY_OVERLAY :c:type:`v4l2_memory` +replace symbol V4L2_MEMORY_USERPTR :c:type:`v4l2_memory` + +# Documented enum v4l2_colorspace +replace symbol V4L2_COLORSPACE_470_SYSTEM_BG :c:type:`v4l2_colorspace` +replace symbol V4L2_COLORSPACE_470_SYSTEM_M :c:type:`v4l2_colorspace` +replace symbol V4L2_COLORSPACE_OPRGB :c:type:`v4l2_colorspace` +replace define V4L2_COLORSPACE_ADOBERGB :c:type:`v4l2_colorspace` +replace symbol V4L2_COLORSPACE_BT2020 :c:type:`v4l2_colorspace` +replace symbol V4L2_COLORSPACE_DCI_P3 :c:type:`v4l2_colorspace` +replace symbol V4L2_COLORSPACE_DEFAULT :c:type:`v4l2_colorspace` +replace symbol V4L2_COLORSPACE_JPEG :c:type:`v4l2_colorspace` +replace symbol V4L2_COLORSPACE_RAW :c:type:`v4l2_colorspace` +replace symbol V4L2_COLORSPACE_REC709 :c:type:`v4l2_colorspace` +replace symbol V4L2_COLORSPACE_SMPTE170M :c:type:`v4l2_colorspace` +replace symbol V4L2_COLORSPACE_SMPTE240M :c:type:`v4l2_colorspace` +replace symbol V4L2_COLORSPACE_SRGB :c:type:`v4l2_colorspace` +replace symbol V4L2_COLORSPACE_LAST :c:type:`v4l2_colorspace` + +# Documented enum v4l2_xfer_func +replace symbol V4L2_XFER_FUNC_709 :c:type:`v4l2_xfer_func` +replace symbol V4L2_XFER_FUNC_OPRGB :c:type:`v4l2_xfer_func` +replace define V4L2_XFER_FUNC_ADOBERGB :c:type:`v4l2_xfer_func` +replace symbol V4L2_XFER_FUNC_DCI_P3 :c:type:`v4l2_xfer_func` +replace symbol V4L2_XFER_FUNC_DEFAULT :c:type:`v4l2_xfer_func` +replace symbol V4L2_XFER_FUNC_NONE :c:type:`v4l2_xfer_func` +replace symbol V4L2_XFER_FUNC_SMPTE2084 :c:type:`v4l2_xfer_func` +replace symbol V4L2_XFER_FUNC_SMPTE240M :c:type:`v4l2_xfer_func` +replace symbol V4L2_XFER_FUNC_SRGB :c:type:`v4l2_xfer_func` +replace symbol V4L2_XFER_FUNC_LAST :c:type:`v4l2_xfer_func` + +# Documented enum v4l2_ycbcr_encoding +replace symbol V4L2_YCBCR_ENC_601 :c:type:`v4l2_ycbcr_encoding` +replace symbol V4L2_YCBCR_ENC_709 :c:type:`v4l2_ycbcr_encoding` +replace symbol V4L2_YCBCR_ENC_BT2020 :c:type:`v4l2_ycbcr_encoding` +replace symbol V4L2_YCBCR_ENC_BT2020_CONST_LUM :c:type:`v4l2_ycbcr_encoding` +replace symbol V4L2_YCBCR_ENC_DEFAULT :c:type:`v4l2_ycbcr_encoding` +replace symbol V4L2_YCBCR_ENC_SYCC :c:type:`v4l2_ycbcr_encoding` +replace symbol V4L2_YCBCR_ENC_XV601 :c:type:`v4l2_ycbcr_encoding` +replace symbol V4L2_YCBCR_ENC_XV709 :c:type:`v4l2_ycbcr_encoding` +replace symbol V4L2_YCBCR_ENC_SMPTE240M :c:type:`v4l2_ycbcr_encoding` +replace symbol V4L2_YCBCR_ENC_LAST :c:type:`v4l2_ycbcr_encoding` + +# Documented enum v4l2_hsv_encoding +replace symbol V4L2_HSV_ENC_180 :c:type:`v4l2_hsv_encoding` +replace symbol V4L2_HSV_ENC_256 :c:type:`v4l2_hsv_encoding` + +# Documented enum v4l2_quantization +replace symbol V4L2_QUANTIZATION_DEFAULT :c:type:`v4l2_quantization` +replace symbol V4L2_QUANTIZATION_FULL_RANGE :c:type:`v4l2_quantization` +replace symbol V4L2_QUANTIZATION_LIM_RANGE :c:type:`v4l2_quantization` + +# Documented enum v4l2_priority +replace symbol V4L2_PRIORITY_BACKGROUND :c:type:`v4l2_priority` +replace symbol V4L2_PRIORITY_DEFAULT :c:type:`v4l2_priority` +replace symbol V4L2_PRIORITY_INTERACTIVE :c:type:`v4l2_priority` +replace symbol V4L2_PRIORITY_RECORD :c:type:`v4l2_priority` +replace symbol V4L2_PRIORITY_UNSET :c:type:`v4l2_priority` + +# Documented enum v4l2_frmsizetypes +replace symbol V4L2_FRMSIZE_TYPE_CONTINUOUS :c:type:`v4l2_frmsizetypes` +replace symbol V4L2_FRMSIZE_TYPE_DISCRETE :c:type:`v4l2_frmsizetypes` +replace symbol V4L2_FRMSIZE_TYPE_STEPWISE :c:type:`v4l2_frmsizetypes` + +# Documented enum frmivaltypes +replace symbol V4L2_FRMIVAL_TYPE_CONTINUOUS :c:type:`v4l2_frmivaltypes` +replace symbol V4L2_FRMIVAL_TYPE_DISCRETE :c:type:`v4l2_frmivaltypes` +replace symbol V4L2_FRMIVAL_TYPE_STEPWISE :c:type:`v4l2_frmivaltypes` + +# Documented enum :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_COMPOUND_TYPES vidioc_queryctrl + +replace symbol V4L2_CTRL_TYPE_BITMASK :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_BOOLEAN :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_BUTTON :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_CTRL_CLASS :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_INTEGER :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_INTEGER64 :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_INTEGER_MENU :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_MENU :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_STRING :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_U16 :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_U32 :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_U8 :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_MPEG2_SEQUENCE :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_MPEG2_PICTURE :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_MPEG2_QUANTISATION :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_H264_SPS :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_H264_PPS :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_H264_SCALING_MATRIX :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_H264_PRED_WEIGHTS :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_H264_SLICE_PARAMS :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_H264_DECODE_PARAMS :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_HEVC_SPS :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_HEVC_PPS :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_AREA :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_RECT :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_FWHT_PARAMS :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_VP8_FRAME :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_VP9_FRAME :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_HDR10_CLL_INFO :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_HDR10_MASTERING_DISPLAY :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_HEVC_SPS :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_HEVC_PPS :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_AV1_SEQUENCE :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_AV1_TILE_GROUP_ENTRY :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_AV1_FRAME :c:type:`v4l2_ctrl_type` +replace symbol V4L2_CTRL_TYPE_AV1_FILM_GRAIN :c:type:`v4l2_ctrl_type` + +# V4L2 capability defines +replace define V4L2_CAP_VIDEO_CAPTURE device-capabilities +replace define V4L2_CAP_VIDEO_CAPTURE_MPLANE device-capabilities +replace define V4L2_CAP_VIDEO_OUTPUT device-capabilities +replace define V4L2_CAP_VIDEO_OUTPUT_MPLANE device-capabilities +replace define V4L2_CAP_VIDEO_M2M device-capabilities +replace define V4L2_CAP_VIDEO_M2M_MPLANE device-capabilities +replace define V4L2_CAP_VIDEO_OVERLAY device-capabilities +replace define V4L2_CAP_VBI_CAPTURE device-capabilities +replace define V4L2_CAP_VBI_OUTPUT device-capabilities +replace define V4L2_CAP_SLICED_VBI_CAPTURE device-capabilities +replace define V4L2_CAP_SLICED_VBI_OUTPUT device-capabilities +replace define V4L2_CAP_RDS_CAPTURE device-capabilities +replace define V4L2_CAP_VIDEO_OUTPUT_OVERLAY device-capabilities +replace define V4L2_CAP_HW_FREQ_SEEK device-capabilities +replace define V4L2_CAP_RDS_OUTPUT device-capabilities +replace define V4L2_CAP_TUNER device-capabilities +replace define V4L2_CAP_AUDIO device-capabilities +replace define V4L2_CAP_RADIO device-capabilities +replace define V4L2_CAP_MODULATOR device-capabilities +replace define V4L2_CAP_SDR_CAPTURE device-capabilities +replace define V4L2_CAP_EXT_PIX_FORMAT device-capabilities +replace define V4L2_CAP_SDR_OUTPUT device-capabilities +replace define V4L2_CAP_META_CAPTURE device-capabilities +replace define V4L2_CAP_READWRITE device-capabilities +replace define V4L2_CAP_ASYNCIO device-capabilities +replace define V4L2_CAP_STREAMING device-capabilities +replace define V4L2_CAP_META_OUTPUT device-capabilities +replace define V4L2_CAP_DEVICE_CAPS device-capabilities +replace define V4L2_CAP_TOUCH device-capabilities +replace define V4L2_CAP_IO_MC device-capabilities +replace define V4L2_CAP_EDID device-capabilities + +# V4L2 pix flags +replace define V4L2_PIX_FMT_PRIV_MAGIC :c:type:`v4l2_pix_format` +replace define V4L2_PIX_FMT_FLAG_PREMUL_ALPHA format-flags +replace define V4L2_PIX_FMT_HM12 :c:type:`v4l2_pix_format` +replace define V4L2_PIX_FMT_SUNXI_TILED_NV12 :c:type:`v4l2_pix_format` + +# V4L2 format flags +replace define V4L2_FMT_FLAG_COMPRESSED fmtdesc-flags +replace define V4L2_FMT_FLAG_EMULATED fmtdesc-flags +replace define V4L2_FMT_FLAG_CONTINUOUS_BYTESTREAM fmtdesc-flags +replace define V4L2_FMT_FLAG_DYN_RESOLUTION fmtdesc-flags +replace define V4L2_FMT_FLAG_ENC_CAP_FRAME_INTERVAL fmtdesc-flags +replace define V4L2_FMT_FLAG_CSC_COLORSPACE fmtdesc-flags +replace define V4L2_FMT_FLAG_CSC_XFER_FUNC fmtdesc-flags +replace define V4L2_FMT_FLAG_CSC_YCBCR_ENC fmtdesc-flags +replace define V4L2_FMT_FLAG_CSC_HSV_ENC fmtdesc-flags +replace define V4L2_FMT_FLAG_CSC_QUANTIZATION fmtdesc-flags +replace define V4L2_FMT_FLAG_META_LINE_BASED fmtdesc-flags +replace define V4L2_FMTDESC_FLAG_ENUM_ALL fmtdesc-flags + +# V4L2 timecode types +replace define V4L2_TC_TYPE_24FPS timecode-type +replace define V4L2_TC_TYPE_25FPS timecode-type +replace define V4L2_TC_TYPE_30FPS timecode-type +replace define V4L2_TC_TYPE_50FPS timecode-type +replace define V4L2_TC_TYPE_60FPS timecode-type + +# V4L2 timecode flags +replace define V4L2_TC_FLAG_DROPFRAME timecode-flags +replace define V4L2_TC_FLAG_COLORFRAME timecode-flags +replace define V4L2_TC_USERBITS_field timecode-flags +replace define V4L2_TC_USERBITS_USERDEFINED timecode-flags +replace define V4L2_TC_USERBITS_8BITCHARS timecode-flags + +# V4L2 JPEG markers +replace define V4L2_JPEG_MARKER_DHT jpeg-markers +replace define V4L2_JPEG_MARKER_DQT jpeg-markers +replace define V4L2_JPEG_MARKER_DRI jpeg-markers +replace define V4L2_JPEG_MARKER_COM jpeg-markers +replace define V4L2_JPEG_MARKER_APP jpeg-markers + +# V4L2 framebuffer caps and flags + +replace define V4L2_FBUF_CAP_EXTERNOVERLAY framebuffer-cap +replace define V4L2_FBUF_CAP_CHROMAKEY framebuffer-cap +replace define V4L2_FBUF_CAP_LIST_CLIPPING framebuffer-cap +replace define V4L2_FBUF_CAP_BITMAP_CLIPPING framebuffer-cap +replace define V4L2_FBUF_CAP_LOCAL_ALPHA framebuffer-cap +replace define V4L2_FBUF_CAP_GLOBAL_ALPHA framebuffer-cap +replace define V4L2_FBUF_CAP_LOCAL_INV_ALPHA framebuffer-cap +replace define V4L2_FBUF_CAP_SRC_CHROMAKEY framebuffer-cap + +replace define V4L2_FBUF_FLAG_PRIMARY framebuffer-flags +replace define V4L2_FBUF_FLAG_OVERLAY framebuffer-flags +replace define V4L2_FBUF_FLAG_CHROMAKEY framebuffer-flags +replace define V4L2_FBUF_FLAG_LOCAL_ALPHA framebuffer-flags +replace define V4L2_FBUF_FLAG_GLOBAL_ALPHA framebuffer-flags +replace define V4L2_FBUF_FLAG_LOCAL_INV_ALPHA framebuffer-flags +replace define V4L2_FBUF_FLAG_SRC_CHROMAKEY framebuffer-flags + +# Used on VIDIOC_G_PARM + +replace define V4L2_MODE_HIGHQUALITY parm-flags +replace define V4L2_CAP_TIMEPERFRAME :c:type:`v4l2_captureparm` + +# The V4L2_STD_foo are all defined at v4l2_std_id table + +replace define V4L2_STD_PAL_B v4l2-std-id +replace define V4L2_STD_PAL_B1 v4l2-std-id +replace define V4L2_STD_PAL_G v4l2-std-id +replace define V4L2_STD_PAL_H v4l2-std-id +replace define V4L2_STD_PAL_I v4l2-std-id +replace define V4L2_STD_PAL_D v4l2-std-id +replace define V4L2_STD_PAL_D1 v4l2-std-id +replace define V4L2_STD_PAL_K v4l2-std-id +replace define V4L2_STD_PAL_M v4l2-std-id +replace define V4L2_STD_PAL_N v4l2-std-id +replace define V4L2_STD_PAL_Nc v4l2-std-id +replace define V4L2_STD_PAL_60 v4l2-std-id +replace define V4L2_STD_NTSC_M v4l2-std-id +replace define V4L2_STD_NTSC_M_JP v4l2-std-id +replace define V4L2_STD_NTSC_443 v4l2-std-id +replace define V4L2_STD_NTSC_M_KR v4l2-std-id +replace define V4L2_STD_SECAM_B v4l2-std-id +replace define V4L2_STD_SECAM_D v4l2-std-id +replace define V4L2_STD_SECAM_G v4l2-std-id +replace define V4L2_STD_SECAM_H v4l2-std-id +replace define V4L2_STD_SECAM_K v4l2-std-id +replace define V4L2_STD_SECAM_K1 v4l2-std-id +replace define V4L2_STD_SECAM_L v4l2-std-id +replace define V4L2_STD_SECAM_LC v4l2-std-id +replace define V4L2_STD_ATSC_8_VSB v4l2-std-id +replace define V4L2_STD_ATSC_16_VSB v4l2-std-id +replace define V4L2_STD_NTSC v4l2-std-id +replace define V4L2_STD_SECAM_DK v4l2-std-id +replace define V4L2_STD_SECAM v4l2-std-id +replace define V4L2_STD_PAL_BG v4l2-std-id +replace define V4L2_STD_PAL_DK v4l2-std-id +replace define V4L2_STD_PAL v4l2-std-id +replace define V4L2_STD_B v4l2-std-id +replace define V4L2_STD_G v4l2-std-id +replace define V4L2_STD_H v4l2-std-id +replace define V4L2_STD_L v4l2-std-id +replace define V4L2_STD_GH v4l2-std-id +replace define V4L2_STD_DK v4l2-std-id +replace define V4L2_STD_BG v4l2-std-id +replace define V4L2_STD_MN v4l2-std-id +replace define V4L2_STD_MTS v4l2-std-id +replace define V4L2_STD_525_60 v4l2-std-id +replace define V4L2_STD_625_50 v4l2-std-id +replace define V4L2_STD_ATSC v4l2-std-id +replace define V4L2_STD_UNKNOWN v4l2-std-id +replace define V4L2_STD_ALL v4l2-std-id + +# V4L2 DT BT timings definitions + +replace define V4L2_DV_PROGRESSIVE :c:type:`v4l2_bt_timings` +replace define V4L2_DV_INTERLACED :c:type:`v4l2_bt_timings` + +replace define V4L2_DV_VSYNC_POS_POL :c:type:`v4l2_bt_timings` +replace define V4L2_DV_HSYNC_POS_POL :c:type:`v4l2_bt_timings` + +replace define V4L2_DV_BT_STD_CEA861 dv-bt-standards +replace define V4L2_DV_BT_STD_DMT dv-bt-standards +replace define V4L2_DV_BT_STD_CVT dv-bt-standards +replace define V4L2_DV_BT_STD_GTF dv-bt-standards +replace define V4L2_DV_BT_STD_SDI dv-bt-standards + +replace define V4L2_DV_FL_REDUCED_BLANKING dv-bt-standards +replace define V4L2_DV_FL_CAN_REDUCE_FPS dv-bt-standards +replace define V4L2_DV_FL_CAN_DETECT_REDUCED_FPS dv-bt-standards +replace define V4L2_DV_FL_REDUCED_FPS dv-bt-standards +replace define V4L2_DV_FL_HALF_LINE dv-bt-standards +replace define V4L2_DV_FL_IS_CE_VIDEO dv-bt-standards +replace define V4L2_DV_FL_FIRST_FIELD_EXTRA_LINE dv-bt-standards +replace define V4L2_DV_FL_HAS_PICTURE_ASPECT dv-bt-standards +replace define V4L2_DV_FL_HAS_CEA861_VIC dv-bt-standards +replace define V4L2_DV_FL_HAS_HDMI_VIC dv-bt-standards + +replace define V4L2_DV_BT_656_1120 dv-timing-types + +replace define V4L2_DV_BT_CAP_INTERLACED framebuffer-cap +replace define V4L2_DV_BT_CAP_PROGRESSIVE framebuffer-cap +replace define V4L2_DV_BT_CAP_REDUCED_BLANKING framebuffer-cap +replace define V4L2_DV_BT_CAP_CUSTOM framebuffer-cap + +# V4L2 input + +replace define V4L2_INPUT_TYPE_TUNER input-type +replace define V4L2_INPUT_TYPE_CAMERA input-type +replace define V4L2_INPUT_TYPE_TOUCH input-type + +replace define V4L2_IN_ST_NO_POWER input-status +replace define V4L2_IN_ST_NO_SIGNAL input-status +replace define V4L2_IN_ST_NO_COLOR input-status +replace define V4L2_IN_ST_HFLIP input-status +replace define V4L2_IN_ST_VFLIP input-status +replace define V4L2_IN_ST_NO_H_LOCK input-status +replace define V4L2_IN_ST_COLOR_KILL input-status +replace define V4L2_IN_ST_NO_SYNC input-status +replace define V4L2_IN_ST_NO_EQU input-status +replace define V4L2_IN_ST_NO_CARRIER input-status +replace define V4L2_IN_ST_MACROVISION input-status +replace define V4L2_IN_ST_NO_ACCESS input-status +replace define V4L2_IN_ST_VTR input-status +replace define V4L2_IN_ST_NO_V_LOCK input-status +replace define V4L2_IN_ST_NO_STD_LOCK input-status + +replace define V4L2_IN_CAP_DV_TIMINGS input-capabilities +replace define V4L2_IN_CAP_STD input-capabilities +replace define V4L2_IN_CAP_NATIVE_SIZE input-capabilities + +# V4L2 output + +replace define V4L2_OUTPUT_TYPE_MODULATOR output-type +replace define V4L2_OUTPUT_TYPE_ANALOG output-type +replace define V4L2_OUTPUT_TYPE_ANALOGVGAOVERLAY output-type + +replace define V4L2_OUT_CAP_DV_TIMINGS output-capabilities +replace define V4L2_OUT_CAP_STD output-capabilities +replace define V4L2_OUT_CAP_NATIVE_SIZE output-capabilities + +# V4L2 control flags + +replace define V4L2_CTRL_FLAG_DISABLED control-flags +replace define V4L2_CTRL_FLAG_GRABBED control-flags +replace define V4L2_CTRL_FLAG_READ_ONLY control-flags +replace define V4L2_CTRL_FLAG_UPDATE control-flags +replace define V4L2_CTRL_FLAG_INACTIVE control-flags +replace define V4L2_CTRL_FLAG_SLIDER control-flags +replace define V4L2_CTRL_FLAG_WRITE_ONLY control-flags +replace define V4L2_CTRL_FLAG_VOLATILE control-flags +replace define V4L2_CTRL_FLAG_HAS_PAYLOAD control-flags +replace define V4L2_CTRL_FLAG_EXECUTE_ON_WRITE control-flags +replace define V4L2_CTRL_FLAG_MODIFY_LAYOUT control-flags +replace define V4L2_CTRL_FLAG_DYNAMIC_ARRAY control-flags +replace define V4L2_CTRL_FLAG_HAS_WHICH_MIN_MAX control-flags + +replace define V4L2_CTRL_FLAG_NEXT_CTRL control +replace define V4L2_CTRL_FLAG_NEXT_COMPOUND control +replace define V4L2_CID_PRIVATE_BASE control + +# V4L2 tuner + +replace define V4L2_TUNER_CAP_LOW tuner-capability +replace define V4L2_TUNER_CAP_NORM tuner-capability +replace define V4L2_TUNER_CAP_HWSEEK_BOUNDED tuner-capability +replace define V4L2_TUNER_CAP_HWSEEK_WRAP tuner-capability +replace define V4L2_TUNER_CAP_STEREO tuner-capability +replace define V4L2_TUNER_CAP_LANG2 tuner-capability +replace define V4L2_TUNER_CAP_SAP tuner-capability +replace define V4L2_TUNER_CAP_LANG1 tuner-capability +replace define V4L2_TUNER_CAP_RDS tuner-capability +replace define V4L2_TUNER_CAP_RDS_BLOCK_IO tuner-capability +replace define V4L2_TUNER_CAP_RDS_CONTROLS tuner-capability +replace define V4L2_TUNER_CAP_FREQ_BANDS tuner-capability +replace define V4L2_TUNER_CAP_HWSEEK_PROG_LIM tuner-capability +replace define V4L2_TUNER_CAP_1HZ tuner-capability + +replace define V4L2_TUNER_SUB_MONO tuner-rxsubchans +replace define V4L2_TUNER_SUB_STEREO tuner-rxsubchans +replace define V4L2_TUNER_SUB_LANG2 tuner-rxsubchans +replace define V4L2_TUNER_SUB_SAP tuner-rxsubchans +replace define V4L2_TUNER_SUB_LANG1 tuner-rxsubchans +replace define V4L2_TUNER_SUB_RDS tuner-rxsubchans + +replace define V4L2_TUNER_MODE_MONO tuner-audmode +replace define V4L2_TUNER_MODE_STEREO tuner-audmode +replace define V4L2_TUNER_MODE_LANG2 tuner-audmode +replace define V4L2_TUNER_MODE_SAP tuner-audmode +replace define V4L2_TUNER_MODE_LANG1 tuner-audmode +replace define V4L2_TUNER_MODE_LANG1_LANG2 tuner-audmode + +replace define V4L2_BAND_MODULATION_VSB band-modulation +replace define V4L2_BAND_MODULATION_FM band-modulation +replace define V4L2_BAND_MODULATION_AM band-modulation + +replace define V4L2_RDS_BLOCK_MSK v4l2-rds-block +replace define V4L2_RDS_BLOCK_A v4l2-rds-block +replace define V4L2_RDS_BLOCK_B v4l2-rds-block +replace define V4L2_RDS_BLOCK_C v4l2-rds-block +replace define V4L2_RDS_BLOCK_D v4l2-rds-block +replace define V4L2_RDS_BLOCK_C_ALT v4l2-rds-block +replace define V4L2_RDS_BLOCK_INVALID v4l2-rds-block +replace define V4L2_RDS_BLOCK_CORRECTED v4l2-rds-block +replace define V4L2_RDS_BLOCK_ERROR v4l2-rds-block + +# V4L2 audio + +replace define V4L2_AUDCAP_STEREO audio-capability +replace define V4L2_AUDCAP_AVL audio-capability + +replace define V4L2_AUDMODE_AVL audio-mode + +# MPEG + +replace define V4L2_ENC_IDX_FRAME_I :c:type:`v4l2_enc_idx` +replace define V4L2_ENC_IDX_FRAME_P :c:type:`v4l2_enc_idx` +replace define V4L2_ENC_IDX_FRAME_B :c:type:`v4l2_enc_idx` +replace define V4L2_ENC_IDX_FRAME_MASK :c:type:`v4l2_enc_idx` +replace define V4L2_ENC_IDX_ENTRIES :c:type:`v4l2_enc_idx` + +replace define V4L2_ENC_CMD_START encoder-cmds +replace define V4L2_ENC_CMD_STOP encoder-cmds +replace define V4L2_ENC_CMD_PAUSE encoder-cmds +replace define V4L2_ENC_CMD_RESUME encoder-cmds + +replace define V4L2_ENC_CMD_STOP_AT_GOP_END encoder-flags + +replace define V4L2_DEC_CMD_START decoder-cmds +replace define V4L2_DEC_CMD_STOP decoder-cmds +replace define V4L2_DEC_CMD_PAUSE decoder-cmds +replace define V4L2_DEC_CMD_RESUME decoder-cmds +replace define V4L2_DEC_CMD_FLUSH decoder-cmds + +replace define V4L2_DEC_CMD_START_MUTE_AUDIO decoder-cmds +replace define V4L2_DEC_CMD_PAUSE_TO_BLACK decoder-cmds +replace define V4L2_DEC_CMD_STOP_TO_BLACK decoder-cmds +replace define V4L2_DEC_CMD_STOP_IMMEDIATELY decoder-cmds + +replace define V4L2_DEC_START_FMT_NONE decoder-cmds +replace define V4L2_DEC_START_FMT_GOP decoder-cmds + +# V4L2 VBI + +replace define V4L2_VBI_UNSYNC vbifmt-flags +replace define V4L2_VBI_INTERLACED vbifmt-flags + +replace define V4L2_VBI_ITU_525_F1_START :c:type:`v4l2_vbi_format` +replace define V4L2_VBI_ITU_525_F2_START :c:type:`v4l2_vbi_format` +replace define V4L2_VBI_ITU_625_F1_START :c:type:`v4l2_vbi_format` +replace define V4L2_VBI_ITU_625_F2_START :c:type:`v4l2_vbi_format` + + +replace define V4L2_SLICED_TELETEXT_B vbi-services +replace define V4L2_SLICED_VPS vbi-services +replace define V4L2_SLICED_CAPTION_525 vbi-services +replace define V4L2_SLICED_WSS_625 vbi-services +replace define V4L2_SLICED_VBI_525 vbi-services +replace define V4L2_SLICED_VBI_625 vbi-services + +replace define V4L2_MPEG_VBI_IVTV_TELETEXT_B ITV0-Line-Identifier-Constants +replace define V4L2_MPEG_VBI_IVTV_CAPTION_525 ITV0-Line-Identifier-Constants +replace define V4L2_MPEG_VBI_IVTV_WSS_625 ITV0-Line-Identifier-Constants +replace define V4L2_MPEG_VBI_IVTV_VPS ITV0-Line-Identifier-Constants + +replace define V4L2_MPEG_VBI_IVTV_MAGIC0 v4l2-mpeg-vbi-fmt-ivtv-magic +replace define V4L2_MPEG_VBI_IVTV_MAGIC1 v4l2-mpeg-vbi-fmt-ivtv-magic + +# V4L2 events + +replace define V4L2_EVENT_ALL event-type +replace define V4L2_EVENT_VSYNC event-type +replace define V4L2_EVENT_EOS event-type +replace define V4L2_EVENT_CTRL event-type +replace define V4L2_EVENT_FRAME_SYNC event-type +replace define V4L2_EVENT_SOURCE_CHANGE event-type +replace define V4L2_EVENT_MOTION_DET event-type +replace define V4L2_EVENT_PRIVATE_START event-type + +replace define V4L2_EVENT_CTRL_CH_VALUE ctrl-changes-flags +replace define V4L2_EVENT_CTRL_CH_FLAGS ctrl-changes-flags +replace define V4L2_EVENT_CTRL_CH_RANGE ctrl-changes-flags +replace define V4L2_EVENT_CTRL_CH_DIMENSIONS ctrl-changes-flags + +replace define V4L2_EVENT_SRC_CH_RESOLUTION src-changes-flags + +replace define V4L2_EVENT_MD_FL_HAVE_FRAME_SEQ :c:type:`v4l2_event_motion_det` + +replace define V4L2_EVENT_SUB_FL_SEND_INITIAL event-flags +replace define V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK event-flags + +# V4L2 debugging +replace define V4L2_CHIP_MATCH_BRIDGE vidioc_dbg_g_register +replace define V4L2_CHIP_MATCH_SUBDEV vidioc_dbg_g_register +replace define V4L2_CHIP_MATCH_HOST vidioc_dbg_g_register +replace define V4L2_CHIP_MATCH_I2C_DRIVER vidioc_dbg_g_register +replace define V4L2_CHIP_MATCH_I2C_ADDR vidioc_dbg_g_register +replace define V4L2_CHIP_MATCH_AC97 vidioc_dbg_g_register + +replace define V4L2_CHIP_FL_READABLE vidioc_dbg_g_register +replace define V4L2_CHIP_FL_WRITABLE vidioc_dbg_g_register + +# Ignore reserved ioctl and ancillary macros + +ignore define VIDEO_MAX_FRAME +ignore define VIDEO_MAX_PLANES +ignore define v4l2_fourcc +ignore define v4l2_fourcc_be +ignore define V4L2_FIELD_HAS_TOP +ignore define V4L2_FIELD_HAS_BOTTOM +ignore define V4L2_FIELD_HAS_BOTH +ignore define V4L2_FIELD_HAS_T_OR_B +ignore define V4L2_TYPE_IS_MULTIPLANAR +ignore define V4L2_TYPE_IS_OUTPUT +ignore define V4L2_TUNER_ADC +ignore define V4L2_MAP_COLORSPACE_DEFAULT +ignore define V4L2_MAP_XFER_FUNC_DEFAULT +ignore define V4L2_MAP_YCBCR_ENC_DEFAULT +ignore define V4L2_DV_BT_BLANKING_WIDTH +ignore define V4L2_DV_BT_FRAME_WIDTH +ignore define V4L2_DV_BT_BLANKING_HEIGHT +ignore define V4L2_DV_BT_FRAME_HEIGHT +ignore define V4L2_IN_CAP_CUSTOM_TIMINGS +ignore define V4L2_CTRL_ID_MASK +ignore define V4L2_CTRL_ID2CLASS +ignore define V4L2_CTRL_ID2WHICH +ignore define V4L2_CTRL_DRIVER_PRIV +ignore define V4L2_CTRL_MAX_DIMS +ignore define V4L2_CTRL_WHICH_CUR_VAL +ignore define V4L2_CTRL_WHICH_DEF_VAL +ignore define V4L2_CTRL_WHICH_MIN_VAL +ignore define V4L2_CTRL_WHICH_MAX_VAL +ignore define V4L2_CTRL_WHICH_REQUEST_VAL +ignore define V4L2_OUT_CAP_CUSTOM_TIMINGS +ignore define V4L2_CID_MAX_CTRLS + +ignore define BASE_VIDIOC_PRIVATE + +# Associate ioctls with their counterparts +replace ioctl VIDIOC_DBG_S_REGISTER vidioc_dbg_g_register +replace ioctl VIDIOC_DQBUF vidioc_qbuf +replace ioctl VIDIOC_S_AUDOUT vidioc_g_audout +replace ioctl VIDIOC_S_CROP vidioc_g_crop +replace ioctl VIDIOC_S_CTRL vidioc_g_ctrl +replace ioctl VIDIOC_S_DV_TIMINGS vidioc_g_dv_timings +replace ioctl VIDIOC_S_EDID vidioc_g_edid +replace ioctl VIDIOC_S_EXT_CTRLS vidioc_g_ext_ctrls +replace ioctl VIDIOC_S_FBUF vidioc_g_fbuf +replace ioctl VIDIOC_S_FMT vidioc_g_fmt +replace ioctl VIDIOC_S_FREQUENCY vidioc_g_frequency +replace ioctl VIDIOC_S_INPUT vidioc_g_input +replace ioctl VIDIOC_S_JPEGCOMP vidioc_g_jpegcomp +replace ioctl VIDIOC_S_MODULATOR vidioc_g_modulator +replace ioctl VIDIOC_S_OUTPUT vidioc_g_output +replace ioctl VIDIOC_S_PARM vidioc_g_parm +replace ioctl VIDIOC_S_PRIORITY vidioc_g_priority +replace ioctl VIDIOC_S_SELECTION vidioc_g_selection +replace ioctl VIDIOC_S_STD vidioc_g_std +replace ioctl VIDIOC_S_AUDIO vidioc_g_audio +replace ioctl VIDIOC_S_TUNER vidioc_g_tuner +replace ioctl VIDIOC_TRY_DECODER_CMD vidioc_decoder_cmd +replace ioctl VIDIOC_TRY_ENCODER_CMD vidioc_encoder_cmd +replace ioctl VIDIOC_TRY_EXT_CTRLS vidioc_g_ext_ctrls +replace ioctl VIDIOC_TRY_FMT vidioc_g_fmt +replace ioctl VIDIOC_STREAMOFF vidioc_streamon +replace ioctl VIDIOC_QUERY_EXT_CTRL vidioc_queryctrl +replace ioctl VIDIOC_QUERYMENU vidioc_queryctrl diff --git a/Documentation/userspace-api/media/videodev2.h.rst.exceptions b/Documentation/userspace-api/media/videodev2.h.rst.exceptions deleted file mode 100644 index 35d3456cc812..000000000000 --- a/Documentation/userspace-api/media/videodev2.h.rst.exceptions +++ /dev/null @@ -1,610 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 - -# Ignore header name -ignore define _UAPI__LINUX_VIDEODEV2_H - -# -# The cross reference valitator for videodev2.h DocBook never cared -# about enum symbols or defines. Yet, they're all (or almost all?) -# handled inside V4L API sections. So, for now, it is safe to just -# ignore. This should be revisited, as validating it helps to avoid -# having something not documented at the uAPI. -# - -# Those symbols should not be used by uAPI - don't document them -ignore symbol V4L2_BUF_TYPE_PRIVATE -ignore symbol V4L2_TUNER_DIGITAL_TV -ignore symbol V4L2_COLORSPACE_BT878 - -# Documented enum v4l2_field -replace symbol V4L2_FIELD_ALTERNATE :c:type:`v4l2_field` -replace symbol V4L2_FIELD_ANY :c:type:`v4l2_field` -replace symbol V4L2_FIELD_BOTTOM :c:type:`v4l2_field` -replace symbol V4L2_FIELD_INTERLACED :c:type:`v4l2_field` -replace symbol V4L2_FIELD_INTERLACED_BT :c:type:`v4l2_field` -replace symbol V4L2_FIELD_INTERLACED_TB :c:type:`v4l2_field` -replace symbol V4L2_FIELD_NONE :c:type:`v4l2_field` -replace symbol V4L2_FIELD_SEQ_BT :c:type:`v4l2_field` -replace symbol V4L2_FIELD_SEQ_TB :c:type:`v4l2_field` -replace symbol V4L2_FIELD_TOP :c:type:`v4l2_field` - -# Documented enum v4l2_buf_type -replace symbol V4L2_BUF_TYPE_META_CAPTURE :c:type:`v4l2_buf_type` -replace symbol V4L2_BUF_TYPE_META_OUTPUT :c:type:`v4l2_buf_type` -replace symbol V4L2_BUF_TYPE_SDR_CAPTURE :c:type:`v4l2_buf_type` -replace symbol V4L2_BUF_TYPE_SDR_OUTPUT :c:type:`v4l2_buf_type` -replace symbol V4L2_BUF_TYPE_SLICED_VBI_CAPTURE :c:type:`v4l2_buf_type` -replace symbol V4L2_BUF_TYPE_SLICED_VBI_OUTPUT :c:type:`v4l2_buf_type` -replace symbol V4L2_BUF_TYPE_VBI_CAPTURE :c:type:`v4l2_buf_type` -replace symbol V4L2_BUF_TYPE_VBI_OUTPUT :c:type:`v4l2_buf_type` -replace symbol V4L2_BUF_TYPE_VIDEO_CAPTURE :c:type:`v4l2_buf_type` -replace symbol V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE :c:type:`v4l2_buf_type` -replace symbol V4L2_BUF_TYPE_VIDEO_OUTPUT :c:type:`v4l2_buf_type` -replace symbol V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE :c:type:`v4l2_buf_type` -replace symbol V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY :c:type:`v4l2_buf_type` -replace symbol V4L2_BUF_TYPE_VIDEO_OVERLAY :c:type:`v4l2_buf_type` - -# Documented enum v4l2_tuner_type -replace symbol V4L2_TUNER_ANALOG_TV :c:type:`v4l2_tuner_type` -replace symbol V4L2_TUNER_RADIO :c:type:`v4l2_tuner_type` -replace symbol V4L2_TUNER_RF :c:type:`v4l2_tuner_type` -replace symbol V4L2_TUNER_SDR :c:type:`v4l2_tuner_type` - -# Documented enum v4l2_memory -replace symbol V4L2_MEMORY_DMABUF :c:type:`v4l2_memory` -replace symbol V4L2_MEMORY_MMAP :c:type:`v4l2_memory` -replace symbol V4L2_MEMORY_OVERLAY :c:type:`v4l2_memory` -replace symbol V4L2_MEMORY_USERPTR :c:type:`v4l2_memory` - -# Documented enum v4l2_colorspace -replace symbol V4L2_COLORSPACE_470_SYSTEM_BG :c:type:`v4l2_colorspace` -replace symbol V4L2_COLORSPACE_470_SYSTEM_M :c:type:`v4l2_colorspace` -replace symbol V4L2_COLORSPACE_OPRGB :c:type:`v4l2_colorspace` -replace define V4L2_COLORSPACE_ADOBERGB :c:type:`v4l2_colorspace` -replace symbol V4L2_COLORSPACE_BT2020 :c:type:`v4l2_colorspace` -replace symbol V4L2_COLORSPACE_DCI_P3 :c:type:`v4l2_colorspace` -replace symbol V4L2_COLORSPACE_DEFAULT :c:type:`v4l2_colorspace` -replace symbol V4L2_COLORSPACE_JPEG :c:type:`v4l2_colorspace` -replace symbol V4L2_COLORSPACE_RAW :c:type:`v4l2_colorspace` -replace symbol V4L2_COLORSPACE_REC709 :c:type:`v4l2_colorspace` -replace symbol V4L2_COLORSPACE_SMPTE170M :c:type:`v4l2_colorspace` -replace symbol V4L2_COLORSPACE_SMPTE240M :c:type:`v4l2_colorspace` -replace symbol V4L2_COLORSPACE_SRGB :c:type:`v4l2_colorspace` -replace symbol V4L2_COLORSPACE_LAST :c:type:`v4l2_colorspace` - -# Documented enum v4l2_xfer_func -replace symbol V4L2_XFER_FUNC_709 :c:type:`v4l2_xfer_func` -replace symbol V4L2_XFER_FUNC_OPRGB :c:type:`v4l2_xfer_func` -replace define V4L2_XFER_FUNC_ADOBERGB :c:type:`v4l2_xfer_func` -replace symbol V4L2_XFER_FUNC_DCI_P3 :c:type:`v4l2_xfer_func` -replace symbol V4L2_XFER_FUNC_DEFAULT :c:type:`v4l2_xfer_func` -replace symbol V4L2_XFER_FUNC_NONE :c:type:`v4l2_xfer_func` -replace symbol V4L2_XFER_FUNC_SMPTE2084 :c:type:`v4l2_xfer_func` -replace symbol V4L2_XFER_FUNC_SMPTE240M :c:type:`v4l2_xfer_func` -replace symbol V4L2_XFER_FUNC_SRGB :c:type:`v4l2_xfer_func` -replace symbol V4L2_XFER_FUNC_LAST :c:type:`v4l2_xfer_func` - -# Documented enum v4l2_ycbcr_encoding -replace symbol V4L2_YCBCR_ENC_601 :c:type:`v4l2_ycbcr_encoding` -replace symbol V4L2_YCBCR_ENC_709 :c:type:`v4l2_ycbcr_encoding` -replace symbol V4L2_YCBCR_ENC_BT2020 :c:type:`v4l2_ycbcr_encoding` -replace symbol V4L2_YCBCR_ENC_BT2020_CONST_LUM :c:type:`v4l2_ycbcr_encoding` -replace symbol V4L2_YCBCR_ENC_DEFAULT :c:type:`v4l2_ycbcr_encoding` -replace symbol V4L2_YCBCR_ENC_SYCC :c:type:`v4l2_ycbcr_encoding` -replace symbol V4L2_YCBCR_ENC_XV601 :c:type:`v4l2_ycbcr_encoding` -replace symbol V4L2_YCBCR_ENC_XV709 :c:type:`v4l2_ycbcr_encoding` -replace symbol V4L2_YCBCR_ENC_SMPTE240M :c:type:`v4l2_ycbcr_encoding` -replace symbol V4L2_YCBCR_ENC_LAST :c:type:`v4l2_ycbcr_encoding` - -# Documented enum v4l2_hsv_encoding -replace symbol V4L2_HSV_ENC_180 :c:type:`v4l2_hsv_encoding` -replace symbol V4L2_HSV_ENC_256 :c:type:`v4l2_hsv_encoding` - -# Documented enum v4l2_quantization -replace symbol V4L2_QUANTIZATION_DEFAULT :c:type:`v4l2_quantization` -replace symbol V4L2_QUANTIZATION_FULL_RANGE :c:type:`v4l2_quantization` -replace symbol V4L2_QUANTIZATION_LIM_RANGE :c:type:`v4l2_quantization` - -# Documented enum v4l2_priority -replace symbol V4L2_PRIORITY_BACKGROUND :c:type:`v4l2_priority` -replace symbol V4L2_PRIORITY_DEFAULT :c:type:`v4l2_priority` -replace symbol V4L2_PRIORITY_INTERACTIVE :c:type:`v4l2_priority` -replace symbol V4L2_PRIORITY_RECORD :c:type:`v4l2_priority` -replace symbol V4L2_PRIORITY_UNSET :c:type:`v4l2_priority` - -# Documented enum v4l2_frmsizetypes -replace symbol V4L2_FRMSIZE_TYPE_CONTINUOUS :c:type:`v4l2_frmsizetypes` -replace symbol V4L2_FRMSIZE_TYPE_DISCRETE :c:type:`v4l2_frmsizetypes` -replace symbol V4L2_FRMSIZE_TYPE_STEPWISE :c:type:`v4l2_frmsizetypes` - -# Documented enum frmivaltypes -replace symbol V4L2_FRMIVAL_TYPE_CONTINUOUS :c:type:`v4l2_frmivaltypes` -replace symbol V4L2_FRMIVAL_TYPE_DISCRETE :c:type:`v4l2_frmivaltypes` -replace symbol V4L2_FRMIVAL_TYPE_STEPWISE :c:type:`v4l2_frmivaltypes` - -# Documented enum :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_COMPOUND_TYPES vidioc_queryctrl - -replace symbol V4L2_CTRL_TYPE_BITMASK :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_BOOLEAN :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_BUTTON :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_CTRL_CLASS :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_INTEGER :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_INTEGER64 :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_INTEGER_MENU :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_MENU :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_STRING :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_U16 :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_U32 :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_U8 :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_MPEG2_SEQUENCE :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_MPEG2_PICTURE :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_MPEG2_QUANTISATION :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_H264_SPS :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_H264_PPS :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_H264_SCALING_MATRIX :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_H264_PRED_WEIGHTS :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_H264_SLICE_PARAMS :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_H264_DECODE_PARAMS :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_HEVC_SPS :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_HEVC_PPS :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_AREA :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_RECT :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_FWHT_PARAMS :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_VP8_FRAME :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_VP9_FRAME :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_HDR10_CLL_INFO :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_HDR10_MASTERING_DISPLAY :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_HEVC_SPS :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_HEVC_PPS :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_AV1_SEQUENCE :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_AV1_TILE_GROUP_ENTRY :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_AV1_FRAME :c:type:`v4l2_ctrl_type` -replace symbol V4L2_CTRL_TYPE_AV1_FILM_GRAIN :c:type:`v4l2_ctrl_type` - -# V4L2 capability defines -replace define V4L2_CAP_VIDEO_CAPTURE device-capabilities -replace define V4L2_CAP_VIDEO_CAPTURE_MPLANE device-capabilities -replace define V4L2_CAP_VIDEO_OUTPUT device-capabilities -replace define V4L2_CAP_VIDEO_OUTPUT_MPLANE device-capabilities -replace define V4L2_CAP_VIDEO_M2M device-capabilities -replace define V4L2_CAP_VIDEO_M2M_MPLANE device-capabilities -replace define V4L2_CAP_VIDEO_OVERLAY device-capabilities -replace define V4L2_CAP_VBI_CAPTURE device-capabilities -replace define V4L2_CAP_VBI_OUTPUT device-capabilities -replace define V4L2_CAP_SLICED_VBI_CAPTURE device-capabilities -replace define V4L2_CAP_SLICED_VBI_OUTPUT device-capabilities -replace define V4L2_CAP_RDS_CAPTURE device-capabilities -replace define V4L2_CAP_VIDEO_OUTPUT_OVERLAY device-capabilities -replace define V4L2_CAP_HW_FREQ_SEEK device-capabilities -replace define V4L2_CAP_RDS_OUTPUT device-capabilities -replace define V4L2_CAP_TUNER device-capabilities -replace define V4L2_CAP_AUDIO device-capabilities -replace define V4L2_CAP_RADIO device-capabilities -replace define V4L2_CAP_MODULATOR device-capabilities -replace define V4L2_CAP_SDR_CAPTURE device-capabilities -replace define V4L2_CAP_EXT_PIX_FORMAT device-capabilities -replace define V4L2_CAP_SDR_OUTPUT device-capabilities -replace define V4L2_CAP_META_CAPTURE device-capabilities -replace define V4L2_CAP_READWRITE device-capabilities -replace define V4L2_CAP_ASYNCIO device-capabilities -replace define V4L2_CAP_STREAMING device-capabilities -replace define V4L2_CAP_META_OUTPUT device-capabilities -replace define V4L2_CAP_DEVICE_CAPS device-capabilities -replace define V4L2_CAP_TOUCH device-capabilities -replace define V4L2_CAP_IO_MC device-capabilities -replace define V4L2_CAP_EDID device-capabilities - -# V4L2 pix flags -replace define V4L2_PIX_FMT_PRIV_MAGIC :c:type:`v4l2_pix_format` -replace define V4L2_PIX_FMT_FLAG_PREMUL_ALPHA format-flags -replace define V4L2_PIX_FMT_HM12 :c:type:`v4l2_pix_format` -replace define V4L2_PIX_FMT_SUNXI_TILED_NV12 :c:type:`v4l2_pix_format` - -# V4L2 format flags -replace define V4L2_FMT_FLAG_COMPRESSED fmtdesc-flags -replace define V4L2_FMT_FLAG_EMULATED fmtdesc-flags -replace define V4L2_FMT_FLAG_CONTINUOUS_BYTESTREAM fmtdesc-flags -replace define V4L2_FMT_FLAG_DYN_RESOLUTION fmtdesc-flags -replace define V4L2_FMT_FLAG_ENC_CAP_FRAME_INTERVAL fmtdesc-flags -replace define V4L2_FMT_FLAG_CSC_COLORSPACE fmtdesc-flags -replace define V4L2_FMT_FLAG_CSC_XFER_FUNC fmtdesc-flags -replace define V4L2_FMT_FLAG_CSC_YCBCR_ENC fmtdesc-flags -replace define V4L2_FMT_FLAG_CSC_HSV_ENC fmtdesc-flags -replace define V4L2_FMT_FLAG_CSC_QUANTIZATION fmtdesc-flags -replace define V4L2_FMT_FLAG_META_LINE_BASED fmtdesc-flags -replace define V4L2_FMTDESC_FLAG_ENUM_ALL fmtdesc-flags - -# V4L2 timecode types -replace define V4L2_TC_TYPE_24FPS timecode-type -replace define V4L2_TC_TYPE_25FPS timecode-type -replace define V4L2_TC_TYPE_30FPS timecode-type -replace define V4L2_TC_TYPE_50FPS timecode-type -replace define V4L2_TC_TYPE_60FPS timecode-type - -# V4L2 timecode flags -replace define V4L2_TC_FLAG_DROPFRAME timecode-flags -replace define V4L2_TC_FLAG_COLORFRAME timecode-flags -replace define V4L2_TC_USERBITS_field timecode-flags -replace define V4L2_TC_USERBITS_USERDEFINED timecode-flags -replace define V4L2_TC_USERBITS_8BITCHARS timecode-flags - -# V4L2 JPEG markers -replace define V4L2_JPEG_MARKER_DHT jpeg-markers -replace define V4L2_JPEG_MARKER_DQT jpeg-markers -replace define V4L2_JPEG_MARKER_DRI jpeg-markers -replace define V4L2_JPEG_MARKER_COM jpeg-markers -replace define V4L2_JPEG_MARKER_APP jpeg-markers - -# V4L2 framebuffer caps and flags - -replace define V4L2_FBUF_CAP_EXTERNOVERLAY framebuffer-cap -replace define V4L2_FBUF_CAP_CHROMAKEY framebuffer-cap -replace define V4L2_FBUF_CAP_LIST_CLIPPING framebuffer-cap -replace define V4L2_FBUF_CAP_BITMAP_CLIPPING framebuffer-cap -replace define V4L2_FBUF_CAP_LOCAL_ALPHA framebuffer-cap -replace define V4L2_FBUF_CAP_GLOBAL_ALPHA framebuffer-cap -replace define V4L2_FBUF_CAP_LOCAL_INV_ALPHA framebuffer-cap -replace define V4L2_FBUF_CAP_SRC_CHROMAKEY framebuffer-cap - -replace define V4L2_FBUF_FLAG_PRIMARY framebuffer-flags -replace define V4L2_FBUF_FLAG_OVERLAY framebuffer-flags -replace define V4L2_FBUF_FLAG_CHROMAKEY framebuffer-flags -replace define V4L2_FBUF_FLAG_LOCAL_ALPHA framebuffer-flags -replace define V4L2_FBUF_FLAG_GLOBAL_ALPHA framebuffer-flags -replace define V4L2_FBUF_FLAG_LOCAL_INV_ALPHA framebuffer-flags -replace define V4L2_FBUF_FLAG_SRC_CHROMAKEY framebuffer-flags - -# Used on VIDIOC_G_PARM - -replace define V4L2_MODE_HIGHQUALITY parm-flags -replace define V4L2_CAP_TIMEPERFRAME :c:type:`v4l2_captureparm` - -# The V4L2_STD_foo are all defined at v4l2_std_id table - -replace define V4L2_STD_PAL_B v4l2-std-id -replace define V4L2_STD_PAL_B1 v4l2-std-id -replace define V4L2_STD_PAL_G v4l2-std-id -replace define V4L2_STD_PAL_H v4l2-std-id -replace define V4L2_STD_PAL_I v4l2-std-id -replace define V4L2_STD_PAL_D v4l2-std-id -replace define V4L2_STD_PAL_D1 v4l2-std-id -replace define V4L2_STD_PAL_K v4l2-std-id -replace define V4L2_STD_PAL_M v4l2-std-id -replace define V4L2_STD_PAL_N v4l2-std-id -replace define V4L2_STD_PAL_Nc v4l2-std-id -replace define V4L2_STD_PAL_60 v4l2-std-id -replace define V4L2_STD_NTSC_M v4l2-std-id -replace define V4L2_STD_NTSC_M_JP v4l2-std-id -replace define V4L2_STD_NTSC_443 v4l2-std-id -replace define V4L2_STD_NTSC_M_KR v4l2-std-id -replace define V4L2_STD_SECAM_B v4l2-std-id -replace define V4L2_STD_SECAM_D v4l2-std-id -replace define V4L2_STD_SECAM_G v4l2-std-id -replace define V4L2_STD_SECAM_H v4l2-std-id -replace define V4L2_STD_SECAM_K v4l2-std-id -replace define V4L2_STD_SECAM_K1 v4l2-std-id -replace define V4L2_STD_SECAM_L v4l2-std-id -replace define V4L2_STD_SECAM_LC v4l2-std-id -replace define V4L2_STD_ATSC_8_VSB v4l2-std-id -replace define V4L2_STD_ATSC_16_VSB v4l2-std-id -replace define V4L2_STD_NTSC v4l2-std-id -replace define V4L2_STD_SECAM_DK v4l2-std-id -replace define V4L2_STD_SECAM v4l2-std-id -replace define V4L2_STD_PAL_BG v4l2-std-id -replace define V4L2_STD_PAL_DK v4l2-std-id -replace define V4L2_STD_PAL v4l2-std-id -replace define V4L2_STD_B v4l2-std-id -replace define V4L2_STD_G v4l2-std-id -replace define V4L2_STD_H v4l2-std-id -replace define V4L2_STD_L v4l2-std-id -replace define V4L2_STD_GH v4l2-std-id -replace define V4L2_STD_DK v4l2-std-id -replace define V4L2_STD_BG v4l2-std-id -replace define V4L2_STD_MN v4l2-std-id -replace define V4L2_STD_MTS v4l2-std-id -replace define V4L2_STD_525_60 v4l2-std-id -replace define V4L2_STD_625_50 v4l2-std-id -replace define V4L2_STD_ATSC v4l2-std-id -replace define V4L2_STD_UNKNOWN v4l2-std-id -replace define V4L2_STD_ALL v4l2-std-id - -# V4L2 DT BT timings definitions - -replace define V4L2_DV_PROGRESSIVE :c:type:`v4l2_bt_timings` -replace define V4L2_DV_INTERLACED :c:type:`v4l2_bt_timings` - -replace define V4L2_DV_VSYNC_POS_POL :c:type:`v4l2_bt_timings` -replace define V4L2_DV_HSYNC_POS_POL :c:type:`v4l2_bt_timings` - -replace define V4L2_DV_BT_STD_CEA861 dv-bt-standards -replace define V4L2_DV_BT_STD_DMT dv-bt-standards -replace define V4L2_DV_BT_STD_CVT dv-bt-standards -replace define V4L2_DV_BT_STD_GTF dv-bt-standards -replace define V4L2_DV_BT_STD_SDI dv-bt-standards - -replace define V4L2_DV_FL_REDUCED_BLANKING dv-bt-standards -replace define V4L2_DV_FL_CAN_REDUCE_FPS dv-bt-standards -replace define V4L2_DV_FL_CAN_DETECT_REDUCED_FPS dv-bt-standards -replace define V4L2_DV_FL_REDUCED_FPS dv-bt-standards -replace define V4L2_DV_FL_HALF_LINE dv-bt-standards -replace define V4L2_DV_FL_IS_CE_VIDEO dv-bt-standards -replace define V4L2_DV_FL_FIRST_FIELD_EXTRA_LINE dv-bt-standards -replace define V4L2_DV_FL_HAS_PICTURE_ASPECT dv-bt-standards -replace define V4L2_DV_FL_HAS_CEA861_VIC dv-bt-standards -replace define V4L2_DV_FL_HAS_HDMI_VIC dv-bt-standards - -replace define V4L2_DV_BT_656_1120 dv-timing-types - -replace define V4L2_DV_BT_CAP_INTERLACED framebuffer-cap -replace define V4L2_DV_BT_CAP_PROGRESSIVE framebuffer-cap -replace define V4L2_DV_BT_CAP_REDUCED_BLANKING framebuffer-cap -replace define V4L2_DV_BT_CAP_CUSTOM framebuffer-cap - -# V4L2 input - -replace define V4L2_INPUT_TYPE_TUNER input-type -replace define V4L2_INPUT_TYPE_CAMERA input-type -replace define V4L2_INPUT_TYPE_TOUCH input-type - -replace define V4L2_IN_ST_NO_POWER input-status -replace define V4L2_IN_ST_NO_SIGNAL input-status -replace define V4L2_IN_ST_NO_COLOR input-status -replace define V4L2_IN_ST_HFLIP input-status -replace define V4L2_IN_ST_VFLIP input-status -replace define V4L2_IN_ST_NO_H_LOCK input-status -replace define V4L2_IN_ST_COLOR_KILL input-status -replace define V4L2_IN_ST_NO_SYNC input-status -replace define V4L2_IN_ST_NO_EQU input-status -replace define V4L2_IN_ST_NO_CARRIER input-status -replace define V4L2_IN_ST_MACROVISION input-status -replace define V4L2_IN_ST_NO_ACCESS input-status -replace define V4L2_IN_ST_VTR input-status -replace define V4L2_IN_ST_NO_V_LOCK input-status -replace define V4L2_IN_ST_NO_STD_LOCK input-status - -replace define V4L2_IN_CAP_DV_TIMINGS input-capabilities -replace define V4L2_IN_CAP_STD input-capabilities -replace define V4L2_IN_CAP_NATIVE_SIZE input-capabilities - -# V4L2 output - -replace define V4L2_OUTPUT_TYPE_MODULATOR output-type -replace define V4L2_OUTPUT_TYPE_ANALOG output-type -replace define V4L2_OUTPUT_TYPE_ANALOGVGAOVERLAY output-type - -replace define V4L2_OUT_CAP_DV_TIMINGS output-capabilities -replace define V4L2_OUT_CAP_STD output-capabilities -replace define V4L2_OUT_CAP_NATIVE_SIZE output-capabilities - -# V4L2 control flags - -replace define V4L2_CTRL_FLAG_DISABLED control-flags -replace define V4L2_CTRL_FLAG_GRABBED control-flags -replace define V4L2_CTRL_FLAG_READ_ONLY control-flags -replace define V4L2_CTRL_FLAG_UPDATE control-flags -replace define V4L2_CTRL_FLAG_INACTIVE control-flags -replace define V4L2_CTRL_FLAG_SLIDER control-flags -replace define V4L2_CTRL_FLAG_WRITE_ONLY control-flags -replace define V4L2_CTRL_FLAG_VOLATILE control-flags -replace define V4L2_CTRL_FLAG_HAS_PAYLOAD control-flags -replace define V4L2_CTRL_FLAG_EXECUTE_ON_WRITE control-flags -replace define V4L2_CTRL_FLAG_MODIFY_LAYOUT control-flags -replace define V4L2_CTRL_FLAG_DYNAMIC_ARRAY control-flags -replace define V4L2_CTRL_FLAG_HAS_WHICH_MIN_MAX control-flags - -replace define V4L2_CTRL_FLAG_NEXT_CTRL control -replace define V4L2_CTRL_FLAG_NEXT_COMPOUND control -replace define V4L2_CID_PRIVATE_BASE control - -# V4L2 tuner - -replace define V4L2_TUNER_CAP_LOW tuner-capability -replace define V4L2_TUNER_CAP_NORM tuner-capability -replace define V4L2_TUNER_CAP_HWSEEK_BOUNDED tuner-capability -replace define V4L2_TUNER_CAP_HWSEEK_WRAP tuner-capability -replace define V4L2_TUNER_CAP_STEREO tuner-capability -replace define V4L2_TUNER_CAP_LANG2 tuner-capability -replace define V4L2_TUNER_CAP_SAP tuner-capability -replace define V4L2_TUNER_CAP_LANG1 tuner-capability -replace define V4L2_TUNER_CAP_RDS tuner-capability -replace define V4L2_TUNER_CAP_RDS_BLOCK_IO tuner-capability -replace define V4L2_TUNER_CAP_RDS_CONTROLS tuner-capability -replace define V4L2_TUNER_CAP_FREQ_BANDS tuner-capability -replace define V4L2_TUNER_CAP_HWSEEK_PROG_LIM tuner-capability -replace define V4L2_TUNER_CAP_1HZ tuner-capability - -replace define V4L2_TUNER_SUB_MONO tuner-rxsubchans -replace define V4L2_TUNER_SUB_STEREO tuner-rxsubchans -replace define V4L2_TUNER_SUB_LANG2 tuner-rxsubchans -replace define V4L2_TUNER_SUB_SAP tuner-rxsubchans -replace define V4L2_TUNER_SUB_LANG1 tuner-rxsubchans -replace define V4L2_TUNER_SUB_RDS tuner-rxsubchans - -replace define V4L2_TUNER_MODE_MONO tuner-audmode -replace define V4L2_TUNER_MODE_STEREO tuner-audmode -replace define V4L2_TUNER_MODE_LANG2 tuner-audmode -replace define V4L2_TUNER_MODE_SAP tuner-audmode -replace define V4L2_TUNER_MODE_LANG1 tuner-audmode -replace define V4L2_TUNER_MODE_LANG1_LANG2 tuner-audmode - -replace define V4L2_BAND_MODULATION_VSB band-modulation -replace define V4L2_BAND_MODULATION_FM band-modulation -replace define V4L2_BAND_MODULATION_AM band-modulation - -replace define V4L2_RDS_BLOCK_MSK v4l2-rds-block -replace define V4L2_RDS_BLOCK_A v4l2-rds-block -replace define V4L2_RDS_BLOCK_B v4l2-rds-block -replace define V4L2_RDS_BLOCK_C v4l2-rds-block -replace define V4L2_RDS_BLOCK_D v4l2-rds-block -replace define V4L2_RDS_BLOCK_C_ALT v4l2-rds-block -replace define V4L2_RDS_BLOCK_INVALID v4l2-rds-block -replace define V4L2_RDS_BLOCK_CORRECTED v4l2-rds-block -replace define V4L2_RDS_BLOCK_ERROR v4l2-rds-block - -# V4L2 audio - -replace define V4L2_AUDCAP_STEREO audio-capability -replace define V4L2_AUDCAP_AVL audio-capability - -replace define V4L2_AUDMODE_AVL audio-mode - -# MPEG - -replace define V4L2_ENC_IDX_FRAME_I :c:type:`v4l2_enc_idx` -replace define V4L2_ENC_IDX_FRAME_P :c:type:`v4l2_enc_idx` -replace define V4L2_ENC_IDX_FRAME_B :c:type:`v4l2_enc_idx` -replace define V4L2_ENC_IDX_FRAME_MASK :c:type:`v4l2_enc_idx` -replace define V4L2_ENC_IDX_ENTRIES :c:type:`v4l2_enc_idx` - -replace define V4L2_ENC_CMD_START encoder-cmds -replace define V4L2_ENC_CMD_STOP encoder-cmds -replace define V4L2_ENC_CMD_PAUSE encoder-cmds -replace define V4L2_ENC_CMD_RESUME encoder-cmds - -replace define V4L2_ENC_CMD_STOP_AT_GOP_END encoder-flags - -replace define V4L2_DEC_CMD_START decoder-cmds -replace define V4L2_DEC_CMD_STOP decoder-cmds -replace define V4L2_DEC_CMD_PAUSE decoder-cmds -replace define V4L2_DEC_CMD_RESUME decoder-cmds -replace define V4L2_DEC_CMD_FLUSH decoder-cmds - -replace define V4L2_DEC_CMD_START_MUTE_AUDIO decoder-cmds -replace define V4L2_DEC_CMD_PAUSE_TO_BLACK decoder-cmds -replace define V4L2_DEC_CMD_STOP_TO_BLACK decoder-cmds -replace define V4L2_DEC_CMD_STOP_IMMEDIATELY decoder-cmds - -replace define V4L2_DEC_START_FMT_NONE decoder-cmds -replace define V4L2_DEC_START_FMT_GOP decoder-cmds - -# V4L2 VBI - -replace define V4L2_VBI_UNSYNC vbifmt-flags -replace define V4L2_VBI_INTERLACED vbifmt-flags - -replace define V4L2_VBI_ITU_525_F1_START :c:type:`v4l2_vbi_format` -replace define V4L2_VBI_ITU_525_F2_START :c:type:`v4l2_vbi_format` -replace define V4L2_VBI_ITU_625_F1_START :c:type:`v4l2_vbi_format` -replace define V4L2_VBI_ITU_625_F2_START :c:type:`v4l2_vbi_format` - - -replace define V4L2_SLICED_TELETEXT_B vbi-services -replace define V4L2_SLICED_VPS vbi-services -replace define V4L2_SLICED_CAPTION_525 vbi-services -replace define V4L2_SLICED_WSS_625 vbi-services -replace define V4L2_SLICED_VBI_525 vbi-services -replace define V4L2_SLICED_VBI_625 vbi-services - -replace define V4L2_MPEG_VBI_IVTV_TELETEXT_B ITV0-Line-Identifier-Constants -replace define V4L2_MPEG_VBI_IVTV_CAPTION_525 ITV0-Line-Identifier-Constants -replace define V4L2_MPEG_VBI_IVTV_WSS_625 ITV0-Line-Identifier-Constants -replace define V4L2_MPEG_VBI_IVTV_VPS ITV0-Line-Identifier-Constants - -replace define V4L2_MPEG_VBI_IVTV_MAGIC0 v4l2-mpeg-vbi-fmt-ivtv-magic -replace define V4L2_MPEG_VBI_IVTV_MAGIC1 v4l2-mpeg-vbi-fmt-ivtv-magic - -# V4L2 events - -replace define V4L2_EVENT_ALL event-type -replace define V4L2_EVENT_VSYNC event-type -replace define V4L2_EVENT_EOS event-type -replace define V4L2_EVENT_CTRL event-type -replace define V4L2_EVENT_FRAME_SYNC event-type -replace define V4L2_EVENT_SOURCE_CHANGE event-type -replace define V4L2_EVENT_MOTION_DET event-type -replace define V4L2_EVENT_PRIVATE_START event-type - -replace define V4L2_EVENT_CTRL_CH_VALUE ctrl-changes-flags -replace define V4L2_EVENT_CTRL_CH_FLAGS ctrl-changes-flags -replace define V4L2_EVENT_CTRL_CH_RANGE ctrl-changes-flags -replace define V4L2_EVENT_CTRL_CH_DIMENSIONS ctrl-changes-flags - -replace define V4L2_EVENT_SRC_CH_RESOLUTION src-changes-flags - -replace define V4L2_EVENT_MD_FL_HAVE_FRAME_SEQ :c:type:`v4l2_event_motion_det` - -replace define V4L2_EVENT_SUB_FL_SEND_INITIAL event-flags -replace define V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK event-flags - -# V4L2 debugging -replace define V4L2_CHIP_MATCH_BRIDGE vidioc_dbg_g_register -replace define V4L2_CHIP_MATCH_SUBDEV vidioc_dbg_g_register -replace define V4L2_CHIP_MATCH_HOST vidioc_dbg_g_register -replace define V4L2_CHIP_MATCH_I2C_DRIVER vidioc_dbg_g_register -replace define V4L2_CHIP_MATCH_I2C_ADDR vidioc_dbg_g_register -replace define V4L2_CHIP_MATCH_AC97 vidioc_dbg_g_register - -replace define V4L2_CHIP_FL_READABLE vidioc_dbg_g_register -replace define V4L2_CHIP_FL_WRITABLE vidioc_dbg_g_register - -# Ignore reserved ioctl and ancillary macros - -ignore define VIDEO_MAX_FRAME -ignore define VIDEO_MAX_PLANES -ignore define v4l2_fourcc -ignore define v4l2_fourcc_be -ignore define V4L2_FIELD_HAS_TOP -ignore define V4L2_FIELD_HAS_BOTTOM -ignore define V4L2_FIELD_HAS_BOTH -ignore define V4L2_FIELD_HAS_T_OR_B -ignore define V4L2_TYPE_IS_MULTIPLANAR -ignore define V4L2_TYPE_IS_OUTPUT -ignore define V4L2_TUNER_ADC -ignore define V4L2_MAP_COLORSPACE_DEFAULT -ignore define V4L2_MAP_XFER_FUNC_DEFAULT -ignore define V4L2_MAP_YCBCR_ENC_DEFAULT -ignore define V4L2_DV_BT_BLANKING_WIDTH -ignore define V4L2_DV_BT_FRAME_WIDTH -ignore define V4L2_DV_BT_BLANKING_HEIGHT -ignore define V4L2_DV_BT_FRAME_HEIGHT -ignore define V4L2_IN_CAP_CUSTOM_TIMINGS -ignore define V4L2_CTRL_ID_MASK -ignore define V4L2_CTRL_ID2CLASS -ignore define V4L2_CTRL_ID2WHICH -ignore define V4L2_CTRL_DRIVER_PRIV -ignore define V4L2_CTRL_MAX_DIMS -ignore define V4L2_CTRL_WHICH_CUR_VAL -ignore define V4L2_CTRL_WHICH_DEF_VAL -ignore define V4L2_CTRL_WHICH_MIN_VAL -ignore define V4L2_CTRL_WHICH_MAX_VAL -ignore define V4L2_CTRL_WHICH_REQUEST_VAL -ignore define V4L2_OUT_CAP_CUSTOM_TIMINGS -ignore define V4L2_CID_MAX_CTRLS - -ignore define BASE_VIDIOC_PRIVATE - -# Associate ioctls with their counterparts -replace ioctl VIDIOC_DBG_S_REGISTER vidioc_dbg_g_register -replace ioctl VIDIOC_DQBUF vidioc_qbuf -replace ioctl VIDIOC_S_AUDOUT vidioc_g_audout -replace ioctl VIDIOC_S_CROP vidioc_g_crop -replace ioctl VIDIOC_S_CTRL vidioc_g_ctrl -replace ioctl VIDIOC_S_DV_TIMINGS vidioc_g_dv_timings -replace ioctl VIDIOC_S_EDID vidioc_g_edid -replace ioctl VIDIOC_S_EXT_CTRLS vidioc_g_ext_ctrls -replace ioctl VIDIOC_S_FBUF vidioc_g_fbuf -replace ioctl VIDIOC_S_FMT vidioc_g_fmt -replace ioctl VIDIOC_S_FREQUENCY vidioc_g_frequency -replace ioctl VIDIOC_S_INPUT vidioc_g_input -replace ioctl VIDIOC_S_JPEGCOMP vidioc_g_jpegcomp -replace ioctl VIDIOC_S_MODULATOR vidioc_g_modulator -replace ioctl VIDIOC_S_OUTPUT vidioc_g_output -replace ioctl VIDIOC_S_PARM vidioc_g_parm -replace ioctl VIDIOC_S_PRIORITY vidioc_g_priority -replace ioctl VIDIOC_S_SELECTION vidioc_g_selection -replace ioctl VIDIOC_S_STD vidioc_g_std -replace ioctl VIDIOC_S_AUDIO vidioc_g_audio -replace ioctl VIDIOC_S_TUNER vidioc_g_tuner -replace ioctl VIDIOC_TRY_DECODER_CMD vidioc_decoder_cmd -replace ioctl VIDIOC_TRY_ENCODER_CMD vidioc_encoder_cmd -replace ioctl VIDIOC_TRY_EXT_CTRLS vidioc_g_ext_ctrls -replace ioctl VIDIOC_TRY_FMT vidioc_g_fmt -replace ioctl VIDIOC_STREAMOFF vidioc_streamon -replace ioctl VIDIOC_QUERY_EXT_CTRL vidioc_queryctrl -replace ioctl VIDIOC_QUERYMENU vidioc_queryctrl -- cgit v1.2.3 From aebcc3009ed55564b74378945206642a372c3e27 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 22 Aug 2025 16:19:36 +0200 Subject: docs: sphinx: drop parse-headers.pl Now that we have a replacement in place, drop the old version. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/d3a5397df44e53b02fa62f782d1e7ce6e08ed04f.1755872208.git.mchehab+huawei@kernel.org --- Documentation/sphinx/parse-headers.pl | 419 ---------------------------------- 1 file changed, 419 deletions(-) delete mode 100755 Documentation/sphinx/parse-headers.pl (limited to 'Documentation') diff --git a/Documentation/sphinx/parse-headers.pl b/Documentation/sphinx/parse-headers.pl deleted file mode 100755 index 560685926cdb..000000000000 --- a/Documentation/sphinx/parse-headers.pl +++ /dev/null @@ -1,419 +0,0 @@ -#!/usr/bin/env perl -# SPDX-License-Identifier: GPL-2.0 -# Copyright (c) 2016 by Mauro Carvalho Chehab . - -use strict; -use Text::Tabs; -use Getopt::Long; -use Pod::Usage; - -my $debug; -my $help; -my $man; - -GetOptions( - "debug" => \$debug, - 'usage|?' => \$help, - 'help' => \$man -) or pod2usage(2); - -pod2usage(1) if $help; -pod2usage(-exitstatus => 0, -verbose => 2) if $man; -pod2usage(2) if (scalar @ARGV < 2 || scalar @ARGV > 3); - -my ($file_in, $file_out, $file_exceptions) = @ARGV; - -my $data; -my %ioctls; -my %defines; -my %typedefs; -my %enums; -my %enum_symbols; -my %structs; - -# -# read the file and get identifiers -# - -my $is_enum = 0; -my $is_comment = 0; -open IN, $file_in or die "Can't open $file_in"; -while () { - $data .= $_; - - my $ln = $_; - if (!$is_comment) { - $ln =~ s,/\*.*(\*/),,g; - - $is_comment = 1 if ($ln =~ s,/\*.*,,); - } else { - if ($ln =~ s,^(.*\*/),,) { - $is_comment = 0; - } else { - next; - } - } - - if ($is_enum && $ln =~ m/^\s*([_\w][\w\d_]+)\s*[\,=]?/) { - my $s = $1; - my $n = $1; - $n =~ tr/A-Z/a-z/; - $n =~ tr/_/-/; - - $enum_symbols{$s} = "\\ :ref:`$s <$n>`\\ "; - - $is_enum = 0 if ($is_enum && m/\}/); - next; - } - $is_enum = 0 if ($is_enum && m/\}/); - - if ($ln =~ m/^\s*#\s*define\s+([_\w][\w\d_]+)\s+_IO/) { - my $s = $1; - my $n = $1; - $n =~ tr/A-Z/a-z/; - - $ioctls{$s} = "\\ :ref:`$s <$n>`\\ "; - next; - } - - if ($ln =~ m/^\s*#\s*define\s+([_\w][\w\d_]+)\s+/) { - my $s = $1; - my $n = $1; - $n =~ tr/A-Z/a-z/; - $n =~ tr/_/-/; - - $defines{$s} = "\\ :ref:`$s <$n>`\\ "; - next; - } - - if ($ln =~ m/^\s*typedef\s+([_\w][\w\d_]+)\s+(.*)\s+([_\w][\w\d_]+);/) { - my $s = $2; - my $n = $3; - - $typedefs{$n} = "\\ :c:type:`$n <$s>`\\ "; - next; - } - if ($ln =~ m/^\s*enum\s+([_\w][\w\d_]+)\s+\{/ - || $ln =~ m/^\s*enum\s+([_\w][\w\d_]+)$/ - || $ln =~ m/^\s*typedef\s*enum\s+([_\w][\w\d_]+)\s+\{/ - || $ln =~ m/^\s*typedef\s*enum\s+([_\w][\w\d_]+)$/) { - my $s = $1; - - $enums{$s} = "enum :c:type:`$s`\\ "; - - $is_enum = $1; - next; - } - if ($ln =~ m/^\s*struct\s+([_\w][\w\d_]+)\s+\{/ - || $ln =~ m/^\s*struct\s+([[_\w][\w\d_]+)$/ - || $ln =~ m/^\s*typedef\s*struct\s+([_\w][\w\d_]+)\s+\{/ - || $ln =~ m/^\s*typedef\s*struct\s+([[_\w][\w\d_]+)$/ - ) { - my $s = $1; - - $structs{$s} = "struct $s\\ "; - next; - } -} -close IN; - -# -# Handle multi-line typedefs -# - -my @matches = ($data =~ m/typedef\s+struct\s+\S+?\s*\{[^\}]+\}\s*(\S+)\s*\;/g, - $data =~ m/typedef\s+enum\s+\S+?\s*\{[^\}]+\}\s*(\S+)\s*\;/g,); -foreach my $m (@matches) { - my $s = $m; - - $typedefs{$s} = "\\ :c:type:`$s`\\ "; - next; -} - -# -# Handle exceptions, if any -# - -my %def_reftype = ( - "ioctl" => ":ref", - "define" => ":ref", - "symbol" => ":ref", - "typedef" => ":c:type", - "enum" => ":c:type", - "struct" => ":c:type", -); - -if ($file_exceptions) { - open IN, $file_exceptions or die "Can't read $file_exceptions"; - while () { - next if (m/^\s*$/ || m/^\s*#/); - - # Parsers to ignore a symbol - - if (m/^ignore\s+ioctl\s+(\S+)/) { - delete $ioctls{$1} if (exists($ioctls{$1})); - next; - } - if (m/^ignore\s+define\s+(\S+)/) { - delete $defines{$1} if (exists($defines{$1})); - next; - } - if (m/^ignore\s+typedef\s+(\S+)/) { - delete $typedefs{$1} if (exists($typedefs{$1})); - next; - } - if (m/^ignore\s+enum\s+(\S+)/) { - delete $enums{$1} if (exists($enums{$1})); - next; - } - if (m/^ignore\s+struct\s+(\S+)/) { - delete $structs{$1} if (exists($structs{$1})); - next; - } - if (m/^ignore\s+symbol\s+(\S+)/) { - delete $enum_symbols{$1} if (exists($enum_symbols{$1})); - next; - } - - # Parsers to replace a symbol - my ($type, $old, $new, $reftype); - - if (m/^replace\s+(\S+)\s+(\S+)\s+(\S+)/) { - $type = $1; - $old = $2; - $new = $3; - } else { - die "Can't parse $file_exceptions: $_"; - } - - if ($new =~ m/^\:c\:(data|func|macro|type)\:\`(.+)\`/) { - $reftype = ":c:$1"; - $new = $2; - } elsif ($new =~ m/\:ref\:\`(.+)\`/) { - $reftype = ":ref"; - $new = $1; - } else { - $reftype = $def_reftype{$type}; - } - if (!$reftype) { - print STDERR "Warning: can't find ref type for $type"; - } - $new = "$reftype:`$old <$new>`"; - - if ($type eq "ioctl") { - $ioctls{$old} = $new if (exists($ioctls{$old})); - next; - } - if ($type eq "define") { - $defines{$old} = $new if (exists($defines{$old})); - next; - } - if ($type eq "symbol") { - $enum_symbols{$old} = $new if (exists($enum_symbols{$old})); - next; - } - if ($type eq "typedef") { - $typedefs{$old} = $new if (exists($typedefs{$old})); - next; - } - if ($type eq "enum") { - $enums{$old} = $new if (exists($enums{$old})); - next; - } - if ($type eq "struct") { - $structs{$old} = $new if (exists($structs{$old})); - next; - } - - die "Can't parse $file_exceptions: $_"; - } -} - -if ($debug) { - my @all_hashes = ( - {ioctl => \%ioctls}, - {typedef => \%typedefs}, - {enum => \%enums}, - {struct => \%structs}, - {define => \%defines}, - {symbol => \%enum_symbols} - ); - - foreach my $hash (@all_hashes) { - while (my ($name, $hash_ref) = each %$hash) { - next unless %$hash_ref; # Skip empty hashes - - print "$name:\n"; - for my $key (sort keys %$hash_ref) { - print " $key -> $hash_ref->{$key}\n"; - } - print "\n"; - } - } -} - -# -# Align block -# -$data = expand($data); -$data = " " . $data; -$data =~ s/\n/\n /g; -$data =~ s/\n\s+$/\n/g; -$data =~ s/\n\s+\n/\n\n/g; - -# -# Add escape codes for special characters -# -$data =~ s,([\_\`\*\<\>\&\\\\:\/\|\%\$\#\{\}\~\^]),\\$1,g; - -$data =~ s,DEPRECATED,**DEPRECATED**,g; - -# -# Add references -# - -my $start_delim = "[ \n\t\(\=\*\@]"; -my $end_delim = "(\\s|,|\\\\=|\\\\:|\\;|\\\)|\\}|\\{)"; - -foreach my $r (keys %ioctls) { - my $s = $ioctls{$r}; - - $r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g; - - print "$r -> $s\n" if ($debug); - - $data =~ s/($start_delim)($r)$end_delim/$1$s$3/g; -} - -foreach my $r (keys %defines) { - my $s = $defines{$r}; - - $r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g; - - print "$r -> $s\n" if ($debug); - - $data =~ s/($start_delim)($r)$end_delim/$1$s$3/g; -} - -foreach my $r (keys %enum_symbols) { - my $s = $enum_symbols{$r}; - - $r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g; - - print "$r -> $s\n" if ($debug); - - $data =~ s/($start_delim)($r)$end_delim/$1$s$3/g; -} - -foreach my $r (keys %enums) { - my $s = $enums{$r}; - - $r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g; - - print "$r -> $s\n" if ($debug); - - $data =~ s/enum\s+($r)$end_delim/$s$2/g; -} - -foreach my $r (keys %structs) { - my $s = $structs{$r}; - - $r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g; - - print "$r -> $s\n" if ($debug); - - $data =~ s/struct\s+($r)$end_delim/$s$2/g; -} - -foreach my $r (keys %typedefs) { - my $s = $typedefs{$r}; - - $r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g; - - print "$r -> $s\n" if ($debug); - $data =~ s/($start_delim)($r)$end_delim/$1$s$3/g; -} - -$data =~ s/\\ ([\n\s])/\1/g; - -# -# Generate output file -# - -my $title = $file_in; -$title =~ s,.*/,,; - -open OUT, "> $file_out" or die "Can't open $file_out"; -print OUT ".. -*- coding: utf-8; mode: rst -*-\n\n"; -print OUT "$title\n"; -print OUT "=" x length($title); -print OUT "\n\n.. parsed-literal::\n\n"; -print OUT $data; -close OUT; - -__END__ - -=head1 NAME - -parse_headers.pl - parse a C file, in order to identify functions, structs, -enums and defines and create cross-references to a Sphinx book. - -=head1 SYNOPSIS - -B [] [] - -Where can be: --debug, --help or --usage. - -=head1 OPTIONS - -=over 8 - -=item B<--debug> - -Put the script in verbose mode, useful for debugging. - -=item B<--usage> - -Prints a brief help message and exits. - -=item B<--help> - -Prints a more detailed help message and exits. - -=back - -=head1 DESCRIPTION - -Convert a C header or source file (C_FILE), into a ReStructured Text -included via ..parsed-literal block with cross-references for the -documentation files that describe the API. It accepts an optional -EXCEPTIONS_FILE with describes what elements will be either ignored or -be pointed to a non-default reference. - -The output is written at the (OUT_FILE). - -It is capable of identifying defines, functions, structs, typedefs, -enums and enum symbols and create cross-references for all of them. -It is also capable of distinguish #define used for specifying a Linux -ioctl. - -The EXCEPTIONS_FILE contain two rules to allow ignoring a symbol or -to replace the default references by a custom one. - -Please read Documentation/doc-guide/parse-headers.rst at the Kernel's -tree for more details. - -=head1 BUGS - -Report bugs to Mauro Carvalho Chehab - -=head1 COPYRIGHT - -Copyright (c) 2016 by Mauro Carvalho Chehab . - -License GPLv2: GNU GPL version 2 . - -This is free software: you are free to change and redistribute it. -There is NO WARRANTY, to the extent permitted by law. - -=cut -- cgit v1.2.3 From ba653158f40deccb3f79005bf1d5c6c37d45b247 Mon Sep 17 00:00:00 2001 From: Alperen Aksu Date: Thu, 21 Aug 2025 13:13:47 +0000 Subject: Documentation/filesystems/xfs: Fix typo error Fixed typo error in referring to the section's headline Fixed to correct spelling of "mapping" Signed-off-by: Alperen Aksu Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250821131404.25461-1-aksulperen@gmail.com --- Documentation/filesystems/xfs/xfs-online-fsck-design.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/xfs/xfs-online-fsck-design.rst b/Documentation/filesystems/xfs/xfs-online-fsck-design.rst index 9fe994353395..8cbcd3c26434 100644 --- a/Documentation/filesystems/xfs/xfs-online-fsck-design.rst +++ b/Documentation/filesystems/xfs/xfs-online-fsck-design.rst @@ -475,7 +475,7 @@ operation, which may cause application failure or an unplanned filesystem shutdown. Inspiration for the secondary metadata repair strategy was drawn from section -2.4 of Srinivasan above, and sections 2 ("NSF: Inded Build Without Side-File") +2.4 of Srinivasan above, and sections 2 ("NSF: Index Build Without Side-File") and 3.1.1 ("Duplicate Key Insert Problem") in C. Mohan, `"Algorithms for Creating Indexes for Very Large Tables Without Quiescing Updates" `_, 1992. @@ -4179,7 +4179,7 @@ When the exchange is initiated, the sequence of operations is as follows: This will be discussed in more detail in subsequent sections. If the filesystem goes down in the middle of an operation, log recovery will -find the most recent unfinished maping exchange log intent item and restart +find the most recent unfinished mapping exchange log intent item and restart from there. This is how atomic file mapping exchanges guarantees that an outside observer will either see the old broken structure or the new one, and never a mismash of -- cgit v1.2.3 From ddfaddc27724fddc07eaf2365ffdd23702f8d8e4 Mon Sep 17 00:00:00 2001 From: Vivek Alurkar Date: Wed, 20 Aug 2025 22:16:21 -0700 Subject: Fix typo in RAID arrays documentation Changed "write-throuth" to "write-through". Signed-off-by: Vivek Alurkar Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250821051622.8341-2-primalkenja@gmail.com --- Documentation/admin-guide/md.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/md.rst b/Documentation/admin-guide/md.rst index 4ff2cc291d18..04668272c0ee 100644 --- a/Documentation/admin-guide/md.rst +++ b/Documentation/admin-guide/md.rst @@ -758,7 +758,7 @@ These currently include: journal_mode (currently raid5 only) The cache mode for raid5. raid5 could include an extra disk for - caching. The mode can be "write-throuth" and "write-back". The + caching. The mode can be "write-through" or "write-back". The default is "write-through". ppl_write_hint -- cgit v1.2.3 From 2b31c1c7134a316a0c97da5d7bdbe15552101db3 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 15:33:34 -0500 Subject: dt-bindings: pinctrl: Convert brcm,bcm2835-gpio to DT schema Convert the Broadcom BCM2835 GPIO (and pinmux) controller binding to DT schema format. The structure of the child nodes wasn't well defined. The schema is based on the .dts users. The legacy binding is a single level of child nodes while the standard binding is 2 levels of child nodes. The "all banks" interrupt is treated as optional following actual users. Signed-off-by: Rob Herring (Arm) Reviewed-by: Linus Walleij Link: https://lore.kernel.org/20250812203337.731648-1-robh@kernel.org Signed-off-by: Linus Walleij --- .../bindings/pinctrl/brcm,bcm2835-gpio.txt | 99 ----------------- .../bindings/pinctrl/brcm,bcm2835-gpio.yaml | 120 +++++++++++++++++++++ 2 files changed, 120 insertions(+), 99 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt deleted file mode 100644 index 5682b2010e50..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt +++ /dev/null @@ -1,99 +0,0 @@ -Broadcom BCM2835 GPIO (and pinmux) controller - -The BCM2835 GPIO module is a combined GPIO controller, (GPIO) interrupt -controller, and pinmux/control device. - -Required properties: -- compatible: "brcm,bcm2835-gpio" -- compatible: should be one of: - "brcm,bcm2835-gpio" - BCM2835 compatible pinctrl - "brcm,bcm7211-gpio" - BCM7211 compatible pinctrl - "brcm,bcm2711-gpio" - BCM2711 compatible pinctrl - "brcm,bcm7211-gpio" - BCM7211 compatible pinctrl -- reg: Should contain the physical address of the GPIO module's registers. -- gpio-controller: Marks the device node as a GPIO controller. -- #gpio-cells : Should be two. The first cell is the pin number and the - second cell is used to specify optional parameters: - - bit 0 specifies polarity (0 for normal, 1 for inverted) -- interrupts : The interrupt outputs from the controller. One interrupt per - individual bank followed by the "all banks" interrupt. For BCM7211, an - additional set of per-bank interrupt line and an "all banks" wake-up - interrupt may be specified. -- interrupt-controller: Marks the device node as an interrupt controller. -- #interrupt-cells : Should be 2. - The first cell is the GPIO number. - The second cell is used to specify flags: - bits[3:0] trigger type and level flags: - 1 = low-to-high edge triggered. - 2 = high-to-low edge triggered. - 4 = active high level-sensitive. - 8 = active low level-sensitive. - Valid combinations are 1, 2, 3, 4, 8. - -Please refer to ../gpio/gpio.txt for a general description of GPIO bindings. - -Please refer to pinctrl-bindings.txt in this directory for details of the -common pinctrl bindings used by client devices, including the meaning of the -phrase "pin configuration node". - -Each pin configuration node lists the pin(s) to which it applies, and one or -more of the mux function to select on those pin(s), and pull-up/down -configuration. Each subnode only affects those parameters that are explicitly -listed. In other words, a subnode that lists only a mux function implies no -information about any pull configuration. Similarly, a subnode that lists only -a pul parameter implies no information about the mux function. - -The BCM2835 pin configuration and multiplexing supports the generic bindings. -For details on each properties, you can refer to ./pinctrl-bindings.txt. - -Required sub-node properties: - - pins - - function - -Optional sub-node properties: - - bias-disable - - bias-pull-up - - bias-pull-down - - output-high - - output-low - -Legacy pin configuration and multiplexing binding: -*** (Its use is deprecated, use generic multiplexing and configuration -bindings instead) - -Required subnode-properties: -- brcm,pins: An array of cells. Each cell contains the ID of a pin. Valid IDs - are the integer GPIO IDs; 0==GPIO0, 1==GPIO1, ... 53==GPIO53. - -Optional subnode-properties: -- brcm,function: Integer, containing the function to mux to the pin(s): - 0: GPIO in - 1: GPIO out - 2: alt5 - 3: alt4 - 4: alt0 - 5: alt1 - 6: alt2 - 7: alt3 -- brcm,pull: Integer, representing the pull-down/up to apply to the pin(s): - 0: none - 1: down - 2: up - -Each of brcm,function and brcm,pull may contain either a single value which -will be applied to all pins in brcm,pins, or 1 value for each entry in -brcm,pins. - -Example: - - gpio: gpio { - compatible = "brcm,bcm2835-gpio"; - reg = <0x2200000 0xb4>; - interrupts = <2 17>, <2 19>, <2 18>, <2 20>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.yaml new file mode 100644 index 000000000000..6514f347f6bc --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.yaml @@ -0,0 +1,120 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/brcm,bcm2835-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM2835 GPIO (and pinmux) controller + +maintainers: + - Florian Fainelli + +description: > + The BCM2835 GPIO module is a combined GPIO controller, (GPIO) interrupt + controller, and pinmux/control device. + +properties: + compatible: + enum: + - brcm,bcm2835-gpio + - brcm,bcm2711-gpio + - brcm,bcm7211-gpio + + reg: + maxItems: 1 + + '#gpio-cells': + const: 2 + + gpio-controller: true + gpio-ranges: true + gpio-line-names: true + + interrupts: + description: > + Interrupt outputs: one per bank, then the combined “all banks” line. + BCM7211 may specify up to four per-bank wake-up lines and one combined + wake-up interrupt. + minItems: 4 + maxItems: 10 + + '#interrupt-cells': + const: 2 + + interrupt-controller: true + +additionalProperties: + oneOf: + - type: object + additionalProperties: false + + patternProperties: + '^pins?-': + type: object + allOf: + - $ref: /schemas/pinctrl/pincfg-node.yaml# + - $ref: /schemas/pinctrl/pinmux-node.yaml# + additionalProperties: false + + properties: + pins: true + function: true + bias-disable: true + bias-pull-up: true + bias-pull-down: true + output-high: true + output-low: true + + required: + - pins + - function + + - type: object + additionalProperties: false + deprecated: true + + properties: + brcm,pins: + description: + GPIO pin numbers for legacy configuration. + $ref: /schemas/types.yaml#/definitions/uint32-array + + brcm,function: + description: + Legacy mux function for the pins (0=input, 1=output, 2–7=alt functions). + $ref: /schemas/types.yaml#/definitions/uint32-array + maximum: 7 + + brcm,pull: + description: > + Legacy pull setting for the pins (0=none, 1=pull-down, 2=pull-up). + $ref: /schemas/types.yaml#/definitions/uint32-array + maximum: 2 + + required: + - brcm,pins + +allOf: + - if: + properties: + compatible: + contains: + enum: + - brcm,bcm2835-gpio + - brcm,bcm2711-gpio + then: + properties: + interrupts: + maxItems: 5 + +examples: + - | + gpio@2200000 { + compatible = "brcm,bcm2835-gpio"; + reg = <0x2200000 0xb4>; + interrupts = <2 17>, <2 19>, <2 18>, <2 20>, <2 21>; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + }; -- cgit v1.2.3 From 7d1c5e52ec1549adc4394b6e2f38278fc671e522 Mon Sep 17 00:00:00 2001 From: Mallikarjun Thammanavar Date: Tue, 19 Aug 2025 12:46:04 +0000 Subject: docs: fix spelling and grammar in atomic_writes Fix minor spelling and grammatical issues in the ext4 atomic_writes documentation. Signed-off-by: Mallikarjun Thammanavar Reviewed-by: Randy Dunlap Reviewed-by: Darrick J. Wong Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250819124604.8995-1-mallikarjunst09@gmail.com --- Documentation/filesystems/ext4/atomic_writes.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/ext4/atomic_writes.rst b/Documentation/filesystems/ext4/atomic_writes.rst index aeb47ace738d..ae8995740aa8 100644 --- a/Documentation/filesystems/ext4/atomic_writes.rst +++ b/Documentation/filesystems/ext4/atomic_writes.rst @@ -14,7 +14,7 @@ I/O) on regular files with extents, provided the underlying storage device supports hardware atomic writes. This is supported in the following two ways: 1. **Single-fsblock Atomic Writes**: - EXT4's supports atomic write operations with a single filesystem block since + EXT4 supports atomic write operations with a single filesystem block since v6.13. In this the atomic write unit minimum and maximum sizes are both set to filesystem blocksize. e.g. doing atomic write of 16KB with 16KB filesystem blocksize on 64KB @@ -50,7 +50,7 @@ Multi-fsblock Implementation Details The bigalloc feature changes ext4 to allocate in units of multiple filesystem blocks, also known as clusters. With bigalloc each bit within block bitmap -represents cluster (power of 2 number of blocks) rather than individual +represents a cluster (power of 2 number of blocks) rather than individual filesystem blocks. EXT4 supports multi-fsblock atomic writes with bigalloc, subject to the following constraints. The minimum atomic write size is the larger of the fs @@ -189,7 +189,7 @@ The write must be aligned to the filesystem's block size and not exceed the filesystem's maximum atomic write unit size. See ``generic_atomic_write_valid()`` for more details. -``statx()`` system call with ``STATX_WRITE_ATOMIC`` flag can provides following +``statx()`` system call with ``STATX_WRITE_ATOMIC`` flag can provide following details: * ``stx_atomic_write_unit_min``: Minimum size of an atomic write request. -- cgit v1.2.3 From 8898cf86f043468d285a474d1614e5cf1a170b16 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 15:33:47 -0500 Subject: dt-bindings: pinctrl: Convert brcm,iproc-gpio to DT schema Convert the Broadcom iProc/Cygnus GPIO/Pinconf binding to DT schema format. The child node structure is based on the example as there's not any actual .dts files with child nodes. The binding wasn't clear that "reg" can be 1 or 2 entries. The number of "reg" entries doesn't appear to be based on compatible, so no per compatible constraints for it The "brcm,iproc-stingray-gpio" could possibly be dropped. There are no .dts files using it, but the driver uses it. Signed-off-by: Rob Herring (Arm) Reviewed-by: Linus Walleij Link: https://lore.kernel.org/20250812203348.733749-1-robh@kernel.org Signed-off-by: Linus Walleij --- .../bindings/pinctrl/brcm,iproc-gpio.txt | 123 --------------------- .../bindings/pinctrl/brcm,iproc-gpio.yaml | 111 +++++++++++++++++++ 2 files changed, 111 insertions(+), 123 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,iproc-gpio.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,iproc-gpio.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,iproc-gpio.txt b/Documentation/devicetree/bindings/pinctrl/brcm,iproc-gpio.txt deleted file mode 100644 index a73cbeb0f309..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/brcm,iproc-gpio.txt +++ /dev/null @@ -1,123 +0,0 @@ -Broadcom iProc GPIO/PINCONF Controller - -Required properties: - -- compatible: - "brcm,iproc-gpio" for the generic iProc based GPIO controller IP that - supports full-featured pinctrl and GPIO functions used in various iProc - based SoCs - - May contain an SoC-specific compatibility string to accommodate any - SoC-specific features - - "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or - "brcm,cygnus-crmu-gpio" for Cygnus SoCs - - "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support - disabled - - "brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general - pinctrl support completely disabled in this IP block. In Stingray, a - different IP block is used to handle pinctrl related functions - -- reg: - Define the base and range of the I/O address space that contains SoC -GPIO/PINCONF controller registers - -- ngpios: - Total number of in-use slots in GPIO controller - -- #gpio-cells: - Must be two. The first cell is the GPIO pin number (within the -controller's pin space) and the second cell is used for the following: - bit[0]: polarity (0 for active high and 1 for active low) - -- gpio-controller: - Specifies that the node is a GPIO controller - -Optional properties: - -- interrupts: - Interrupt ID - -- interrupt-controller: - Specifies that the node is an interrupt controller - -- gpio-ranges: - Specifies the mapping between gpio controller and pin-controllers pins. - This requires 4 fields in cells defined as - - 1. Phandle of pin-controller. - 2. GPIO base pin offset. - 3 Pin-control base pin offset. - 4. number of gpio pins which are linearly mapped from pin base. - -Supported generic PINCONF properties in child nodes: - -- pins: - The list of pins (within the controller's own pin space) that properties -in the node apply to. Pin names are "gpio-" - -- bias-disable: - Disable pin bias - -- bias-pull-up: - Enable internal pull up resistor - -- bias-pull-down: - Enable internal pull down resistor - -- drive-strength: - Valid drive strength values include 2, 4, 6, 8, 10, 12, 14, 16 (mA) - -Example: - gpio_ccm: gpio@1800a000 { - compatible = "brcm,cygnus-ccm-gpio"; - reg = <0x1800a000 0x50>, - <0x0301d164 0x20>; - ngpios = <24>; - #gpio-cells = <2>; - gpio-controller; - interrupts = ; - interrupt-controller; - - touch_pins: touch_pins { - pwr: pwr { - pins = "gpio-0"; - drive-strength = <16>; - }; - - event: event { - pins = "gpio-1"; - bias-pull-up; - }; - }; - }; - - gpio_asiu: gpio@180a5000 { - compatible = "brcm,cygnus-asiu-gpio"; - reg = <0x180a5000 0x668>; - ngpios = <146>; - #gpio-cells = <2>; - gpio-controller; - interrupts = ; - interrupt-controller; - gpio-ranges = <&pinctrl 0 42 1>, - <&pinctrl 1 44 3>; - }; - - /* - * Touchscreen that uses the CCM GPIO 0 and 1 - */ - tsc { - ... - ... - gpio-pwr = <&gpio_ccm 0 0>; - gpio-event = <&gpio_ccm 1 0>; - }; - - /* Bluetooth that uses the ASIU GPIO 5, with polarity inverted */ - bluetooth { - ... - ... - bcm,rfkill-bank-sel = <&gpio_asiu 5 1> - } diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,iproc-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,iproc-gpio.yaml new file mode 100644 index 000000000000..a0ed308b7fc8 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/brcm,iproc-gpio.yaml @@ -0,0 +1,111 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/brcm,iproc-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom iProc GPIO/PINCONF Controller + +maintainers: + - Ray Jui + - Scott Branden + +properties: + compatible: + oneOf: + - enum: + - brcm,cygnus-asiu-gpio + - brcm,cygnus-ccm-gpio + - brcm,cygnus-crmu-gpio + - brcm,iproc-gpio + - brcm,iproc-stingray-gpio + - items: + - enum: + - brcm,iproc-hr2-gpio + - brcm,iproc-nsp-gpio + - const: brcm,iproc-gpio + + reg: + minItems: 1 + items: + - description: GPIO Bank registers + - description: IO Ctrl registers + + "#gpio-cells": + const: 2 + + gpio-controller: true + + gpio-ranges: true + + ngpios: true + + "#interrupt-cells": + const: 2 + + interrupts: + maxItems: 1 + + interrupt-controller: true + +required: + - compatible + - reg + - "#gpio-cells" + - gpio-controller + - ngpios + +patternProperties: + '-pins$': + type: object + additionalProperties: + description: Pin configuration child nodes. + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + additionalProperties: false + + properties: + pins: + items: + pattern: '^gpio-' + + bias-disable: true + bias-pull-up: true + bias-pull-down: true + + drive-strength: + enum: [ 2, 4, 6, 8, 10, 12, 14, 16 ] + + required: + - pins + +additionalProperties: false + +examples: + - | + #include + + gpio@1800a000 { + compatible = "brcm,cygnus-ccm-gpio"; + reg = <0x1800a000 0x50>, + <0x0301d164 0x20>; + ngpios = <24>; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupts = ; + interrupt-controller; + + touch-pins { + pwr { + pins = "gpio-0"; + drive-strength = <16>; + }; + + event { + pins = "gpio-1"; + bias-pull-up; + }; + }; + }; -- cgit v1.2.3 From 69c6739d671df58b9f034b94ac8310f569e2b632 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 19 Aug 2025 13:12:49 +0700 Subject: Documentation: sharedsubtree: Format remaining of shell snippets as literal code blcoks Fix formatting inconsistency of shell snippets by wrapping the remaining of them in literal code blocks. Signed-off-by: Bagas Sanjaya Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250819061254.31220-2-bagasdotme@gmail.com --- Documentation/filesystems/sharedsubtree.rst | 68 ++++++++++++++++------------- 1 file changed, 37 insertions(+), 31 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/sharedsubtree.rst b/Documentation/filesystems/sharedsubtree.rst index 1cf56489ed48..06497c4455b4 100644 --- a/Documentation/filesystems/sharedsubtree.rst +++ b/Documentation/filesystems/sharedsubtree.rst @@ -90,37 +90,42 @@ replicas continue to be exactly same. Here is an example: - Let's say /mnt has a mount which is shared. - # mount --make-shared /mnt + Let's say /mnt has a mount which is shared:: - Let's bind mount /mnt to /tmp - # mount --bind /mnt /tmp + # mount --make-shared /mnt + + Let's bind mount /mnt to /tmp:: + + # mount --bind /mnt /tmp the new mount at /tmp becomes a shared mount and it is a replica of the mount at /mnt. - Now let's make the mount at /tmp; a slave of /mnt - # mount --make-slave /tmp + Now let's make the mount at /tmp; a slave of /mnt:: + + # mount --make-slave /tmp + + let's mount /dev/sd0 on /mnt/a:: - let's mount /dev/sd0 on /mnt/a - # mount /dev/sd0 /mnt/a + # mount /dev/sd0 /mnt/a - #ls /mnt/a - t1 t2 t3 + # ls /mnt/a + t1 t2 t3 - #ls /tmp/a - t1 t2 t3 + # ls /tmp/a + t1 t2 t3 Note the mount event has propagated to the mount at /tmp - However let's see what happens if we mount something on the mount at /tmp + However let's see what happens if we mount something on the mount at + /tmp:: - # mount /dev/sd1 /tmp/b + # mount /dev/sd1 /tmp/b - #ls /tmp/b - s1 s2 s3 + # ls /tmp/b + s1 s2 s3 - #ls /mnt/b + # ls /mnt/b Note how the mount event has not propagated to the mount at /mnt @@ -137,7 +142,7 @@ replicas continue to be exactly same. # mount --make-unbindable /mnt - Let's try to bind mount this mount somewhere else:: + Let's try to bind mount this mount somewhere else:: # mount --bind /mnt /tmp mount: wrong fs type, bad option, bad superblock on /mnt, @@ -471,9 +476,9 @@ replicas continue to be exactly same. 5d) Move semantics - Consider the following command + Consider the following command:: - mount --move A B/b + mount --move A B/b where 'A' is the source mount, 'B' is the destination mount and 'b' is the dentry in the destination mount. @@ -663,9 +668,9 @@ replicas continue to be exactly same. 'B' is the slave of 'A' and 'C' is a slave of 'B' A -> B -> C - at this point if we execute the following command + at this point if we execute the following command:: - mount --bind /bin /tmp/test + mount --bind /bin /tmp/test The mount is attempted on 'A' @@ -706,8 +711,8 @@ replicas continue to be exactly same. / \ tmp usr - And we want to replicate the tree at multiple - mountpoints under /root/tmp + And we want to replicate the tree at multiple + mountpoints under /root/tmp step 2: :: @@ -731,7 +736,7 @@ replicas continue to be exactly same. / m1 - it has two vfsmounts + it has two vfsmounts step 3: :: @@ -739,7 +744,7 @@ replicas continue to be exactly same. mkdir -p /tmp/m2 mount --rbind /root /tmp/m2 - the new tree now looks like this:: + the new tree now looks like this:: root / \ @@ -759,14 +764,15 @@ replicas continue to be exactly same. / \ m1 m2 - it has 6 vfsmounts + it has 6 vfsmounts step 4: - :: + :: + mkdir -p /tmp/m3 mount --rbind /root /tmp/m3 - I won't draw the tree..but it has 24 vfsmounts + I won't draw the tree..but it has 24 vfsmounts at step i the number of vfsmounts is V[i] = i*V[i-1]. @@ -785,8 +791,8 @@ replicas continue to be exactly same. / \ tmp usr - How do we set up the same tree at multiple locations under - /root/tmp + How do we set up the same tree at multiple locations under + /root/tmp step 2: :: -- cgit v1.2.3 From a8886b42d57b8280e0c064779d87030266d9c7ce Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 19 Aug 2025 13:12:50 +0700 Subject: Documentation: sharedsubtree: Use proper enumerator sequence for enumerated lists Sphinx does not recognize mixed-letter sequences (e.g. 2a) as enumerator for enumerated lists. As such, lists that use such sequences end up as definition lists instead. Use proper enumeration sequences for this purpose. Signed-off-by: Bagas Sanjaya Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250819061254.31220-3-bagasdotme@gmail.com --- Documentation/filesystems/sharedsubtree.rst | 40 ++++++++++++++--------------- 1 file changed, 20 insertions(+), 20 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/sharedsubtree.rst b/Documentation/filesystems/sharedsubtree.rst index 06497c4455b4..7ad5101b4c03 100644 --- a/Documentation/filesystems/sharedsubtree.rst +++ b/Documentation/filesystems/sharedsubtree.rst @@ -39,8 +39,8 @@ precise d. unbindable mount -2a) A shared mount can be replicated to as many mountpoints and all the -replicas continue to be exactly same. +a) A shared mount can be replicated to as many mountpoints and all the + replicas continue to be exactly same. Here is an example: @@ -83,8 +83,8 @@ replicas continue to be exactly same. contents will be visible under /tmp/a too. -2b) A slave mount is like a shared mount except that mount and umount events - only propagate towards it. +b) A slave mount is like a shared mount except that mount and umount events + only propagate towards it. All slave mounts have a master mount which is a shared. @@ -131,12 +131,12 @@ replicas continue to be exactly same. /mnt -2c) A private mount does not forward or receive propagation. +c) A private mount does not forward or receive propagation. This is the mount we are familiar with. Its the default type. -2d) A unbindable mount is a unbindable private mount +d) A unbindable mount is a unbindable private mount let's say we have a mount at /mnt and we make it unbindable:: @@ -185,7 +185,7 @@ replicas continue to be exactly same. namespaces. B) A process wants its mounts invisible to any other process, but - still be able to see the other system mounts. + still be able to see the other system mounts. Solution: @@ -250,7 +250,7 @@ replicas continue to be exactly same. Note: the word 'vfsmount' and the noun 'mount' have been used to mean the same thing, throughout this document. -5a) Mount states +a) Mount states A given mount can be in one of the following states @@ -360,7 +360,7 @@ replicas continue to be exactly same. the state of a mount depending on type of the destination mount. Its explained in section 5d. -5b) Bind semantics +b) Bind semantics Consider the following command:: @@ -437,7 +437,7 @@ replicas continue to be exactly same. 8. 'A' is a unbindable mount and 'B' is a non-shared mount. This is a invalid operation. A unbindable mount cannot be bind mounted. -5c) Rbind semantics +c) Rbind semantics rbind is same as bind. Bind replicates the specified mount. Rbind replicates all the mounts in the tree belonging to the specified mount. @@ -474,7 +474,7 @@ replicas continue to be exactly same. -5d) Move semantics +d) Move semantics Consider the following command:: @@ -551,7 +551,7 @@ replicas continue to be exactly same. 'A' is mounted on mount 'B' at dentry 'b'. Mount 'A' continues to be a unbindable mount. -5e) Mount semantics +e) Mount semantics Consider the following command:: @@ -564,7 +564,7 @@ replicas continue to be exactly same. that the source mount is always a private mount. -5f) Unmount semantics +f) Unmount semantics Consider the following command:: @@ -598,7 +598,7 @@ replicas continue to be exactly same. to be unmounted and 'C1' has some sub-mounts, the umount operation is failed entirely. -5g) Clone Namespace +g) Clone Namespace A cloned namespace contains all the mounts as that of the parent namespace. @@ -682,18 +682,18 @@ replicas continue to be exactly same. 7) FAQ ------ - Q1. Why is bind mount needed? How is it different from symbolic links? + 1. Why is bind mount needed? How is it different from symbolic links? symbolic links can get stale if the destination mount gets unmounted or moved. Bind mounts continue to exist even if the other mount is unmounted or moved. - Q2. Why can't the shared subtree be implemented using exportfs? + 2. Why can't the shared subtree be implemented using exportfs? exportfs is a heavyweight way of accomplishing part of what shared subtree can do. I cannot imagine a way to implement the semantics of slave mount using exportfs? - Q3 Why is unbindable mount needed? + 3. Why is unbindable mount needed? Let's say we want to replicate the mount tree at multiple locations within the same subtree. @@ -852,7 +852,7 @@ replicas continue to be exactly same. 8) Implementation ----------------- -8A) Datastructure +A) Datastructure 4 new fields are introduced to struct vfsmount: @@ -941,7 +941,7 @@ replicas continue to be exactly same. NOTE: The propagation tree is orthogonal to the mount tree. -8B Locking: +B) Locking: ->mnt_share, ->mnt_slave, ->mnt_slave_list, ->mnt_master are protected by namespace_sem (exclusive for modifications, shared for reading). @@ -953,7 +953,7 @@ replicas continue to be exactly same. The latter holds namespace_sem and the only references to vfsmount are in lists that can't be traversed without namespace_sem. -8C Algorithm: +C) Algorithm: The crux of the implementation resides in rbind/move operation. -- cgit v1.2.3 From 570924bf17de3e0c86c0502e8a20f6017e17bbb2 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 19 Aug 2025 13:12:51 +0700 Subject: Documentation: sharedsubtree: Don't repeat lists with explanation Don't repeat lists only mentioning the items when a corresponding list with item's explanations suffices. Signed-off-by: Bagas Sanjaya Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250819061254.31220-4-bagasdotme@gmail.com --- Documentation/filesystems/sharedsubtree.rst | 106 ++++++++++++---------------- 1 file changed, 44 insertions(+), 62 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/sharedsubtree.rst b/Documentation/filesystems/sharedsubtree.rst index 7ad5101b4c03..64858ff0471b 100644 --- a/Documentation/filesystems/sharedsubtree.rst +++ b/Documentation/filesystems/sharedsubtree.rst @@ -31,15 +31,10 @@ and versioned filesystem. ----------- Shared subtree provides four different flavors of mounts; struct vfsmount to be -precise +precise: - a. shared mount - b. slave mount - c. private mount - d. unbindable mount - -a) A shared mount can be replicated to as many mountpoints and all the +a) A **shared mount** can be replicated to as many mountpoints and all the replicas continue to be exactly same. Here is an example: @@ -83,7 +78,7 @@ a) A shared mount can be replicated to as many mountpoints and all the contents will be visible under /tmp/a too. -b) A slave mount is like a shared mount except that mount and umount events +b) A **slave mount** is like a shared mount except that mount and umount events only propagate towards it. All slave mounts have a master mount which is a shared. @@ -131,12 +126,13 @@ b) A slave mount is like a shared mount except that mount and umount events /mnt -c) A private mount does not forward or receive propagation. +c) A **private mount** does not forward or receive propagation. This is the mount we are familiar with. Its the default type. -d) A unbindable mount is a unbindable private mount +d) An **unbindable mount** is, as the name suggests, an unbindable private + mount. let's say we have a mount at /mnt and we make it unbindable:: @@ -252,24 +248,18 @@ d) A unbindable mount is a unbindable private mount a) Mount states - A given mount can be in one of the following states - - 1) shared - 2) slave - 3) shared and slave - 4) private - 5) unbindable - - A 'propagation event' is defined as event generated on a vfsmount + A **propagation event** is defined as event generated on a vfsmount that leads to mount or unmount actions in other vfsmounts. - A 'peer group' is defined as a group of vfsmounts that propagate + A **peer group** is defined as a group of vfsmounts that propagate events to each other. + A given mount can be in one of the following states: + (1) Shared mounts - A 'shared mount' is defined as a vfsmount that belongs to a - 'peer group'. + A **shared mount** is defined as a vfsmount that belongs to a + peer group. For example:: @@ -284,7 +274,7 @@ a) Mount states (2) Slave mounts - A 'slave mount' is defined as a vfsmount that receives + A **slave mount** is defined as a vfsmount that receives propagation events and does not forward propagation events. A slave mount as the name implies has a master mount from which @@ -299,7 +289,7 @@ a) Mount states (3) Shared and Slave - A vfsmount can be both shared as well as slave. This state + A vfsmount can be both **shared** as well as **slave**. This state indicates that the mount is a slave of some vfsmount, and has its own peer group too. This vfsmount receives propagation events from its master vfsmount, and also forwards propagation @@ -318,12 +308,12 @@ a) Mount states (4) Private mount - A 'private mount' is defined as vfsmount that does not + A **private mount** is defined as vfsmount that does not receive or forward any propagation events. (5) Unbindable mount - A 'unbindable mount' is defined as vfsmount that does not + A **unbindable mount** is defined as vfsmount that does not receive or forward any propagation events and cannot be bind mounted. @@ -854,31 +844,26 @@ g) Clone Namespace A) Datastructure - 4 new fields are introduced to struct vfsmount: - - * ->mnt_share - * ->mnt_slave_list - * ->mnt_slave - * ->mnt_master + Several new fields are introduced to struct vfsmount: ->mnt_share - links together all the mount to/from which this vfsmount + Links together all the mount to/from which this vfsmount send/receives propagation events. ->mnt_slave_list - links all the mounts to which this vfsmount propagates + Links all the mounts to which this vfsmount propagates to. ->mnt_slave - links together all the slaves that its master vfsmount + Links together all the slaves that its master vfsmount propagates to. ->mnt_master - points to the master vfsmount from which this vfsmount + Points to the master vfsmount from which this vfsmount receives propagation. ->mnt_flags - takes two more flags to indicate the propagation status of + Takes two more flags to indicate the propagation status of the vfsmount. MNT_SHARE indicates that the vfsmount is a shared vfsmount. MNT_UNCLONABLE indicates that the vfsmount cannot be replicated. @@ -960,39 +945,36 @@ C) Algorithm: The overall algorithm breaks the operation into 3 phases: (look at attach_recursive_mnt() and propagate_mnt()) - 1. prepare phase. - 2. commit phases. - 3. abort phases. + 1. Prepare phase. - Prepare phase: + For each mount in the source tree: - for each mount in the source tree: + a) Create the necessary number of mount trees to + be attached to each of the mounts that receive + propagation from the destination mount. + b) Do not attach any of the trees to its destination. + However note down its ->mnt_parent and ->mnt_mountpoint + c) Link all the new mounts to form a propagation tree that + is identical to the propagation tree of the destination + mount. - a) Create the necessary number of mount trees to - be attached to each of the mounts that receive - propagation from the destination mount. - b) Do not attach any of the trees to its destination. - However note down its ->mnt_parent and ->mnt_mountpoint - c) Link all the new mounts to form a propagation tree that - is identical to the propagation tree of the destination - mount. + If this phase is successful, there should be 'n' new + propagation trees; where 'n' is the number of mounts in the + source tree. Go to the commit phase - If this phase is successful, there should be 'n' new - propagation trees; where 'n' is the number of mounts in the - source tree. Go to the commit phase + Also there should be 'm' new mount trees, where 'm' is + the number of mounts to which the destination mount + propagates to. - Also there should be 'm' new mount trees, where 'm' is - the number of mounts to which the destination mount - propagates to. + If any memory allocations fail, go to the abort phase. - if any memory allocations fail, go to the abort phase. + 2. Commit phase. - Commit phase - attach each of the mount trees to their corresponding - destination mounts. + Attach each of the mount trees to their corresponding + destination mounts. - Abort phase - delete all the newly created trees. + 3. Abort phase. + Delete all the newly created trees. .. Note:: all the propagation related functionality resides in the file pnode.c -- cgit v1.2.3 From b293fd55a1b8925b9b0578dca88d93eaaa6942c5 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 19 Aug 2025 13:12:52 +0700 Subject: Documentation: sharedsubtree: Align text The docs make heavy use of lists. As it is currently written, these generate a lot of unnecessary hanging indents since these are not semantically meant to be definition lists by accident. Align text to trim these indents. Signed-off-by: Bagas Sanjaya Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250819061254.31220-5-bagasdotme@gmail.com --- Documentation/filesystems/sharedsubtree.rst | 1301 ++++++++++++++------------- 1 file changed, 651 insertions(+), 650 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/sharedsubtree.rst b/Documentation/filesystems/sharedsubtree.rst index 64858ff0471b..b09650e28534 100644 --- a/Documentation/filesystems/sharedsubtree.rst +++ b/Documentation/filesystems/sharedsubtree.rst @@ -37,947 +37,948 @@ precise: a) A **shared mount** can be replicated to as many mountpoints and all the replicas continue to be exactly same. - Here is an example: + Here is an example: - Let's say /mnt has a mount that is shared:: + Let's say /mnt has a mount that is shared:: - mount --make-shared /mnt + # mount --make-shared /mnt - Note: mount(8) command now supports the --make-shared flag, - so the sample 'smount' program is no longer needed and has been - removed. + Note: mount(8) command now supports the --make-shared flag, + so the sample 'smount' program is no longer needed and has been + removed. - :: + :: - # mount --bind /mnt /tmp + # mount --bind /mnt /tmp - The above command replicates the mount at /mnt to the mountpoint /tmp - and the contents of both the mounts remain identical. + The above command replicates the mount at /mnt to the mountpoint /tmp + and the contents of both the mounts remain identical. - :: + :: - #ls /mnt - a b c + #ls /mnt + a b c - #ls /tmp - a b c + #ls /tmp + a b c - Now let's say we mount a device at /tmp/a:: + Now let's say we mount a device at /tmp/a:: - # mount /dev/sd0 /tmp/a + # mount /dev/sd0 /tmp/a - #ls /tmp/a - t1 t2 t3 + # ls /tmp/a + t1 t2 t3 - #ls /mnt/a - t1 t2 t3 + # ls /mnt/a + t1 t2 t3 - Note that the mount has propagated to the mount at /mnt as well. + Note that the mount has propagated to the mount at /mnt as well. - And the same is true even when /dev/sd0 is mounted on /mnt/a. The - contents will be visible under /tmp/a too. + And the same is true even when /dev/sd0 is mounted on /mnt/a. The + contents will be visible under /tmp/a too. b) A **slave mount** is like a shared mount except that mount and umount events only propagate towards it. - All slave mounts have a master mount which is a shared. + All slave mounts have a master mount which is a shared. - Here is an example: + Here is an example: - Let's say /mnt has a mount which is shared:: + Let's say /mnt has a mount which is shared:: - # mount --make-shared /mnt + # mount --make-shared /mnt - Let's bind mount /mnt to /tmp:: + Let's bind mount /mnt to /tmp:: - # mount --bind /mnt /tmp + # mount --bind /mnt /tmp - the new mount at /tmp becomes a shared mount and it is a replica of - the mount at /mnt. + the new mount at /tmp becomes a shared mount and it is a replica of + the mount at /mnt. - Now let's make the mount at /tmp; a slave of /mnt:: + Now let's make the mount at /tmp; a slave of /mnt:: - # mount --make-slave /tmp + # mount --make-slave /tmp - let's mount /dev/sd0 on /mnt/a:: + let's mount /dev/sd0 on /mnt/a:: - # mount /dev/sd0 /mnt/a + # mount /dev/sd0 /mnt/a - # ls /mnt/a - t1 t2 t3 + # ls /mnt/a + t1 t2 t3 - # ls /tmp/a - t1 t2 t3 + # ls /tmp/a + t1 t2 t3 - Note the mount event has propagated to the mount at /tmp + Note the mount event has propagated to the mount at /tmp - However let's see what happens if we mount something on the mount at - /tmp:: + However let's see what happens if we mount something on the mount at + /tmp:: - # mount /dev/sd1 /tmp/b + # mount /dev/sd1 /tmp/b - # ls /tmp/b - s1 s2 s3 + # ls /tmp/b + s1 s2 s3 - # ls /mnt/b + # ls /mnt/b - Note how the mount event has not propagated to the mount at - /mnt + Note how the mount event has not propagated to the mount at + /mnt c) A **private mount** does not forward or receive propagation. - This is the mount we are familiar with. Its the default type. + This is the mount we are familiar with. Its the default type. d) An **unbindable mount** is, as the name suggests, an unbindable private mount. - let's say we have a mount at /mnt and we make it unbindable:: + let's say we have a mount at /mnt and we make it unbindable:: - # mount --make-unbindable /mnt + # mount --make-unbindable /mnt - Let's try to bind mount this mount somewhere else:: + Let's try to bind mount this mount somewhere else:: - # mount --bind /mnt /tmp - mount: wrong fs type, bad option, bad superblock on /mnt, - or too many mounted file systems + # mount --bind /mnt /tmp mount: wrong fs type, bad option, bad + superblock on /mnt, or too many mounted file systems - Binding a unbindable mount is a invalid operation. + Binding a unbindable mount is a invalid operation. 3) Setting mount states ----------------------- - The mount command (util-linux package) can be used to set mount - states:: +The mount command (util-linux package) can be used to set mount +states:: - mount --make-shared mountpoint - mount --make-slave mountpoint - mount --make-private mountpoint - mount --make-unbindable mountpoint + mount --make-shared mountpoint + mount --make-slave mountpoint + mount --make-private mountpoint + mount --make-unbindable mountpoint 4) Use cases ------------ - A) A process wants to clone its own namespace, but still wants to - access the CD that got mounted recently. +A) A process wants to clone its own namespace, but still wants to + access the CD that got mounted recently. - Solution: + Solution: - The system administrator can make the mount at /cdrom shared:: + The system administrator can make the mount at /cdrom shared:: - mount --bind /cdrom /cdrom - mount --make-shared /cdrom + mount --bind /cdrom /cdrom + mount --make-shared /cdrom - Now any process that clones off a new namespace will have a - mount at /cdrom which is a replica of the same mount in the - parent namespace. + Now any process that clones off a new namespace will have a + mount at /cdrom which is a replica of the same mount in the + parent namespace. - So when a CD is inserted and mounted at /cdrom that mount gets - propagated to the other mount at /cdrom in all the other clone - namespaces. + So when a CD is inserted and mounted at /cdrom that mount gets + propagated to the other mount at /cdrom in all the other clone + namespaces. - B) A process wants its mounts invisible to any other process, but - still be able to see the other system mounts. +B) A process wants its mounts invisible to any other process, but + still be able to see the other system mounts. - Solution: + Solution: - To begin with, the administrator can mark the entire mount tree - as shareable:: + To begin with, the administrator can mark the entire mount tree + as shareable:: - mount --make-rshared / + mount --make-rshared / - A new process can clone off a new namespace. And mark some part - of its namespace as slave:: + A new process can clone off a new namespace. And mark some part + of its namespace as slave:: - mount --make-rslave /myprivatetree + mount --make-rslave /myprivatetree - Hence forth any mounts within the /myprivatetree done by the - process will not show up in any other namespace. However mounts - done in the parent namespace under /myprivatetree still shows - up in the process's namespace. + Hence forth any mounts within the /myprivatetree done by the + process will not show up in any other namespace. However mounts + done in the parent namespace under /myprivatetree still shows + up in the process's namespace. - Apart from the above semantics this feature provides the - building blocks to solve the following problems: +Apart from the above semantics this feature provides the +building blocks to solve the following problems: - C) Per-user namespace +C) Per-user namespace - The above semantics allows a way to share mounts across - namespaces. But namespaces are associated with processes. If - namespaces are made first class objects with user API to - associate/disassociate a namespace with userid, then each user - could have his/her own namespace and tailor it to his/her - requirements. This needs to be supported in PAM. + The above semantics allows a way to share mounts across + namespaces. But namespaces are associated with processes. If + namespaces are made first class objects with user API to + associate/disassociate a namespace with userid, then each user + could have his/her own namespace and tailor it to his/her + requirements. This needs to be supported in PAM. - D) Versioned files +D) Versioned files - If the entire mount tree is visible at multiple locations, then - an underlying versioning file system can return different - versions of the file depending on the path used to access that - file. + If the entire mount tree is visible at multiple locations, then + an underlying versioning file system can return different + versions of the file depending on the path used to access that + file. - An example is:: + An example is:: - mount --make-shared / - mount --rbind / /view/v1 - mount --rbind / /view/v2 - mount --rbind / /view/v3 - mount --rbind / /view/v4 + mount --make-shared / + mount --rbind / /view/v1 + mount --rbind / /view/v2 + mount --rbind / /view/v3 + mount --rbind / /view/v4 - and if /usr has a versioning filesystem mounted, then that - mount appears at /view/v1/usr, /view/v2/usr, /view/v3/usr and - /view/v4/usr too + and if /usr has a versioning filesystem mounted, then that + mount appears at /view/v1/usr, /view/v2/usr, /view/v3/usr and + /view/v4/usr too - A user can request v3 version of the file /usr/fs/namespace.c - by accessing /view/v3/usr/fs/namespace.c . The underlying - versioning filesystem can then decipher that v3 version of the - filesystem is being requested and return the corresponding - inode. + A user can request v3 version of the file /usr/fs/namespace.c + by accessing /view/v3/usr/fs/namespace.c . The underlying + versioning filesystem can then decipher that v3 version of the + filesystem is being requested and return the corresponding + inode. 5) Detailed semantics --------------------- - The section below explains the detailed semantics of - bind, rbind, move, mount, umount and clone-namespace operations. +The section below explains the detailed semantics of +bind, rbind, move, mount, umount and clone-namespace operations. - Note: the word 'vfsmount' and the noun 'mount' have been used - to mean the same thing, throughout this document. +Note: the word 'vfsmount' and the noun 'mount' have been used +to mean the same thing, throughout this document. a) Mount states - A **propagation event** is defined as event generated on a vfsmount - that leads to mount or unmount actions in other vfsmounts. + A **propagation event** is defined as event generated on a vfsmount + that leads to mount or unmount actions in other vfsmounts. - A **peer group** is defined as a group of vfsmounts that propagate - events to each other. + A **peer group** is defined as a group of vfsmounts that propagate + events to each other. - A given mount can be in one of the following states: + A given mount can be in one of the following states: - (1) Shared mounts + (1) Shared mounts - A **shared mount** is defined as a vfsmount that belongs to a - peer group. + A **shared mount** is defined as a vfsmount that belongs to a + peer group. - For example:: + For example:: - mount --make-shared /mnt - mount --bind /mnt /tmp + mount --make-shared /mnt + mount --bind /mnt /tmp - The mount at /mnt and that at /tmp are both shared and belong - to the same peer group. Anything mounted or unmounted under - /mnt or /tmp reflect in all the other mounts of its peer - group. + The mount at /mnt and that at /tmp are both shared and belong + to the same peer group. Anything mounted or unmounted under + /mnt or /tmp reflect in all the other mounts of its peer + group. - (2) Slave mounts + (2) Slave mounts - A **slave mount** is defined as a vfsmount that receives - propagation events and does not forward propagation events. + A **slave mount** is defined as a vfsmount that receives + propagation events and does not forward propagation events. - A slave mount as the name implies has a master mount from which - mount/unmount events are received. Events do not propagate from - the slave mount to the master. Only a shared mount can be made - a slave by executing the following command:: + A slave mount as the name implies has a master mount from which + mount/unmount events are received. Events do not propagate from + the slave mount to the master. Only a shared mount can be made + a slave by executing the following command:: - mount --make-slave mount + mount --make-slave mount - A shared mount that is made as a slave is no more shared unless - modified to become shared. + A shared mount that is made as a slave is no more shared unless + modified to become shared. - (3) Shared and Slave + (3) Shared and Slave - A vfsmount can be both **shared** as well as **slave**. This state - indicates that the mount is a slave of some vfsmount, and - has its own peer group too. This vfsmount receives propagation - events from its master vfsmount, and also forwards propagation - events to its 'peer group' and to its slave vfsmounts. + A vfsmount can be both **shared** as well as **slave**. This state + indicates that the mount is a slave of some vfsmount, and + has its own peer group too. This vfsmount receives propagation + events from its master vfsmount, and also forwards propagation + events to its 'peer group' and to its slave vfsmounts. - Strictly speaking, the vfsmount is shared having its own - peer group, and this peer-group is a slave of some other - peer group. + Strictly speaking, the vfsmount is shared having its own + peer group, and this peer-group is a slave of some other + peer group. - Only a slave vfsmount can be made as 'shared and slave' by - either executing the following command:: + Only a slave vfsmount can be made as 'shared and slave' by + either executing the following command:: - mount --make-shared mount + mount --make-shared mount - or by moving the slave vfsmount under a shared vfsmount. + or by moving the slave vfsmount under a shared vfsmount. - (4) Private mount + (4) Private mount - A **private mount** is defined as vfsmount that does not - receive or forward any propagation events. + A **private mount** is defined as vfsmount that does not + receive or forward any propagation events. - (5) Unbindable mount + (5) Unbindable mount - A **unbindable mount** is defined as vfsmount that does not - receive or forward any propagation events and cannot - be bind mounted. + A **unbindable mount** is defined as vfsmount that does not + receive or forward any propagation events and cannot + be bind mounted. - State diagram: + State diagram: - The state diagram below explains the state transition of a mount, - in response to various commands:: + The state diagram below explains the state transition of a mount, + in response to various commands:: - ----------------------------------------------------------------------- - | |make-shared | make-slave | make-private |make-unbindab| - --------------|------------|--------------|--------------|-------------| - |shared |shared |*slave/private| private | unbindable | - | | | | | | - |-------------|------------|--------------|--------------|-------------| - |slave |shared | **slave | private | unbindable | - | |and slave | | | | - |-------------|------------|--------------|--------------|-------------| - |shared |shared | slave | private | unbindable | - |and slave |and slave | | | | - |-------------|------------|--------------|--------------|-------------| - |private |shared | **private | private | unbindable | - |-------------|------------|--------------|--------------|-------------| - |unbindable |shared |**unbindable | private | unbindable | - ------------------------------------------------------------------------ + ----------------------------------------------------------------------- + | |make-shared | make-slave | make-private |make-unbindab| + --------------|------------|--------------|--------------|-------------| + |shared |shared |*slave/private| private | unbindable | + | | | | | | + |-------------|------------|--------------|--------------|-------------| + |slave |shared | **slave | private | unbindable | + | |and slave | | | | + |-------------|------------|--------------|--------------|-------------| + |shared |shared | slave | private | unbindable | + |and slave |and slave | | | | + |-------------|------------|--------------|--------------|-------------| + |private |shared | **private | private | unbindable | + |-------------|------------|--------------|--------------|-------------| + |unbindable |shared |**unbindable | private | unbindable | + ------------------------------------------------------------------------ - * if the shared mount is the only mount in its peer group, making it - slave, makes it private automatically. Note that there is no master to - which it can be slaved to. + * if the shared mount is the only mount in its peer group, making it + slave, makes it private automatically. Note that there is no master to + which it can be slaved to. - ** slaving a non-shared mount has no effect on the mount. + ** slaving a non-shared mount has no effect on the mount. - Apart from the commands listed below, the 'move' operation also changes - the state of a mount depending on type of the destination mount. Its - explained in section 5d. + Apart from the commands listed below, the 'move' operation also changes + the state of a mount depending on type of the destination mount. Its + explained in section 5d. b) Bind semantics - Consider the following command:: - - mount --bind A/a B/b - - where 'A' is the source mount, 'a' is the dentry in the mount 'A', 'B' - is the destination mount and 'b' is the dentry in the destination mount. - - The outcome depends on the type of mount of 'A' and 'B'. The table - below contains quick reference:: - - -------------------------------------------------------------------------- - | BIND MOUNT OPERATION | - |************************************************************************| - |source(A)->| shared | private | slave | unbindable | - | dest(B) | | | | | - | | | | | | | - | v | | | | | - |************************************************************************| - | shared | shared | shared | shared & slave | invalid | - | | | | | | - |non-shared| shared | private | slave | invalid | - ************************************************************************** - - Details: - - 1. 'A' is a shared mount and 'B' is a shared mount. A new mount 'C' - which is clone of 'A', is created. Its root dentry is 'a' . 'C' is - mounted on mount 'B' at dentry 'b'. Also new mount 'C1', 'C2', 'C3' ... - are created and mounted at the dentry 'b' on all mounts where 'B' - propagates to. A new propagation tree containing 'C1',..,'Cn' is - created. This propagation tree is identical to the propagation tree of - 'B'. And finally the peer-group of 'C' is merged with the peer group - of 'A'. - - 2. 'A' is a private mount and 'B' is a shared mount. A new mount 'C' - which is clone of 'A', is created. Its root dentry is 'a'. 'C' is - mounted on mount 'B' at dentry 'b'. Also new mount 'C1', 'C2', 'C3' ... - are created and mounted at the dentry 'b' on all mounts where 'B' - propagates to. A new propagation tree is set containing all new mounts - 'C', 'C1', .., 'Cn' with exactly the same configuration as the - propagation tree for 'B'. - - 3. 'A' is a slave mount of mount 'Z' and 'B' is a shared mount. A new - mount 'C' which is clone of 'A', is created. Its root dentry is 'a' . - 'C' is mounted on mount 'B' at dentry 'b'. Also new mounts 'C1', 'C2', - 'C3' ... are created and mounted at the dentry 'b' on all mounts where - 'B' propagates to. A new propagation tree containing the new mounts - 'C','C1',.. 'Cn' is created. This propagation tree is identical to the - propagation tree for 'B'. And finally the mount 'C' and its peer group - is made the slave of mount 'Z'. In other words, mount 'C' is in the - state 'slave and shared'. - - 4. 'A' is a unbindable mount and 'B' is a shared mount. This is a - invalid operation. - - 5. 'A' is a private mount and 'B' is a non-shared(private or slave or - unbindable) mount. A new mount 'C' which is clone of 'A', is created. - Its root dentry is 'a'. 'C' is mounted on mount 'B' at dentry 'b'. - - 6. 'A' is a shared mount and 'B' is a non-shared mount. A new mount 'C' - which is a clone of 'A' is created. Its root dentry is 'a'. 'C' is - mounted on mount 'B' at dentry 'b'. 'C' is made a member of the - peer-group of 'A'. - - 7. 'A' is a slave mount of mount 'Z' and 'B' is a non-shared mount. A - new mount 'C' which is a clone of 'A' is created. Its root dentry is - 'a'. 'C' is mounted on mount 'B' at dentry 'b'. Also 'C' is set as a - slave mount of 'Z'. In other words 'A' and 'C' are both slave mounts of - 'Z'. All mount/unmount events on 'Z' propagates to 'A' and 'C'. But - mount/unmount on 'A' do not propagate anywhere else. Similarly - mount/unmount on 'C' do not propagate anywhere else. - - 8. 'A' is a unbindable mount and 'B' is a non-shared mount. This is a - invalid operation. A unbindable mount cannot be bind mounted. + Consider the following command:: + + mount --bind A/a B/b + + where 'A' is the source mount, 'a' is the dentry in the mount 'A', 'B' + is the destination mount and 'b' is the dentry in the destination mount. + + The outcome depends on the type of mount of 'A' and 'B'. The table + below contains quick reference:: + + -------------------------------------------------------------------------- + | BIND MOUNT OPERATION | + |************************************************************************| + |source(A)->| shared | private | slave | unbindable | + | dest(B) | | | | | + | | | | | | | + | v | | | | | + |************************************************************************| + | shared | shared | shared | shared & slave | invalid | + | | | | | | + |non-shared| shared | private | slave | invalid | + ************************************************************************** + + Details: + + 1. 'A' is a shared mount and 'B' is a shared mount. A new mount 'C' + which is clone of 'A', is created. Its root dentry is 'a' . 'C' is + mounted on mount 'B' at dentry 'b'. Also new mount 'C1', 'C2', 'C3' ... + are created and mounted at the dentry 'b' on all mounts where 'B' + propagates to. A new propagation tree containing 'C1',..,'Cn' is + created. This propagation tree is identical to the propagation tree of + 'B'. And finally the peer-group of 'C' is merged with the peer group + of 'A'. + + 2. 'A' is a private mount and 'B' is a shared mount. A new mount 'C' + which is clone of 'A', is created. Its root dentry is 'a'. 'C' is + mounted on mount 'B' at dentry 'b'. Also new mount 'C1', 'C2', 'C3' ... + are created and mounted at the dentry 'b' on all mounts where 'B' + propagates to. A new propagation tree is set containing all new mounts + 'C', 'C1', .., 'Cn' with exactly the same configuration as the + propagation tree for 'B'. + + 3. 'A' is a slave mount of mount 'Z' and 'B' is a shared mount. A new + mount 'C' which is clone of 'A', is created. Its root dentry is 'a' . + 'C' is mounted on mount 'B' at dentry 'b'. Also new mounts 'C1', 'C2', + 'C3' ... are created and mounted at the dentry 'b' on all mounts where + 'B' propagates to. A new propagation tree containing the new mounts + 'C','C1',.. 'Cn' is created. This propagation tree is identical to the + propagation tree for 'B'. And finally the mount 'C' and its peer group + is made the slave of mount 'Z'. In other words, mount 'C' is in the + state 'slave and shared'. + + 4. 'A' is a unbindable mount and 'B' is a shared mount. This is a + invalid operation. + + 5. 'A' is a private mount and 'B' is a non-shared(private or slave or + unbindable) mount. A new mount 'C' which is clone of 'A', is created. + Its root dentry is 'a'. 'C' is mounted on mount 'B' at dentry 'b'. + + 6. 'A' is a shared mount and 'B' is a non-shared mount. A new mount 'C' + which is a clone of 'A' is created. Its root dentry is 'a'. 'C' is + mounted on mount 'B' at dentry 'b'. 'C' is made a member of the + peer-group of 'A'. + + 7. 'A' is a slave mount of mount 'Z' and 'B' is a non-shared mount. A + new mount 'C' which is a clone of 'A' is created. Its root dentry is + 'a'. 'C' is mounted on mount 'B' at dentry 'b'. Also 'C' is set as a + slave mount of 'Z'. In other words 'A' and 'C' are both slave mounts of + 'Z'. All mount/unmount events on 'Z' propagates to 'A' and 'C'. But + mount/unmount on 'A' do not propagate anywhere else. Similarly + mount/unmount on 'C' do not propagate anywhere else. + + 8. 'A' is a unbindable mount and 'B' is a non-shared mount. This is a + invalid operation. A unbindable mount cannot be bind mounted. c) Rbind semantics - rbind is same as bind. Bind replicates the specified mount. Rbind - replicates all the mounts in the tree belonging to the specified mount. - Rbind mount is bind mount applied to all the mounts in the tree. + rbind is same as bind. Bind replicates the specified mount. Rbind + replicates all the mounts in the tree belonging to the specified mount. + Rbind mount is bind mount applied to all the mounts in the tree. - If the source tree that is rbind has some unbindable mounts, - then the subtree under the unbindable mount is pruned in the new - location. + If the source tree that is rbind has some unbindable mounts, + then the subtree under the unbindable mount is pruned in the new + location. - eg: + eg: - let's say we have the following mount tree:: + let's say we have the following mount tree:: - A - / \ - B C - / \ / \ - D E F G + A + / \ + B C + / \ / \ + D E F G - Let's say all the mount except the mount C in the tree are - of a type other than unbindable. + Let's say all the mount except the mount C in the tree are + of a type other than unbindable. - If this tree is rbound to say Z + If this tree is rbound to say Z - We will have the following tree at the new location:: + We will have the following tree at the new location:: - Z - | - A' - / - B' Note how the tree under C is pruned - / \ in the new location. - D' E' + Z + | + A' + / + B' Note how the tree under C is pruned + / \ in the new location. + D' E' d) Move semantics - Consider the following command:: - - mount --move A B/b - - where 'A' is the source mount, 'B' is the destination mount and 'b' is - the dentry in the destination mount. - - The outcome depends on the type of the mount of 'A' and 'B'. The table - below is a quick reference:: - - --------------------------------------------------------------------------- - | MOVE MOUNT OPERATION | - |************************************************************************** - | source(A)->| shared | private | slave | unbindable | - | dest(B) | | | | | - | | | | | | | - | v | | | | | - |************************************************************************** - | shared | shared | shared |shared and slave| invalid | - | | | | | | - |non-shared| shared | private | slave | unbindable | - *************************************************************************** - - .. Note:: moving a mount residing under a shared mount is invalid. - - Details follow: - - 1. 'A' is a shared mount and 'B' is a shared mount. The mount 'A' is - mounted on mount 'B' at dentry 'b'. Also new mounts 'A1', 'A2'...'An' - are created and mounted at dentry 'b' on all mounts that receive - propagation from mount 'B'. A new propagation tree is created in the - exact same configuration as that of 'B'. This new propagation tree - contains all the new mounts 'A1', 'A2'... 'An'. And this new - propagation tree is appended to the already existing propagation tree - of 'A'. - - 2. 'A' is a private mount and 'B' is a shared mount. The mount 'A' is - mounted on mount 'B' at dentry 'b'. Also new mount 'A1', 'A2'... 'An' - are created and mounted at dentry 'b' on all mounts that receive - propagation from mount 'B'. The mount 'A' becomes a shared mount and a - propagation tree is created which is identical to that of - 'B'. This new propagation tree contains all the new mounts 'A1', - 'A2'... 'An'. - - 3. 'A' is a slave mount of mount 'Z' and 'B' is a shared mount. The - mount 'A' is mounted on mount 'B' at dentry 'b'. Also new mounts 'A1', - 'A2'... 'An' are created and mounted at dentry 'b' on all mounts that - receive propagation from mount 'B'. A new propagation tree is created - in the exact same configuration as that of 'B'. This new propagation - tree contains all the new mounts 'A1', 'A2'... 'An'. And this new - propagation tree is appended to the already existing propagation tree of - 'A'. Mount 'A' continues to be the slave mount of 'Z' but it also - becomes 'shared'. - - 4. 'A' is a unbindable mount and 'B' is a shared mount. The operation - is invalid. Because mounting anything on the shared mount 'B' can - create new mounts that get mounted on the mounts that receive - propagation from 'B'. And since the mount 'A' is unbindable, cloning - it to mount at other mountpoints is not possible. - - 5. 'A' is a private mount and 'B' is a non-shared(private or slave or - unbindable) mount. The mount 'A' is mounted on mount 'B' at dentry 'b'. - - 6. 'A' is a shared mount and 'B' is a non-shared mount. The mount 'A' - is mounted on mount 'B' at dentry 'b'. Mount 'A' continues to be a - shared mount. - - 7. 'A' is a slave mount of mount 'Z' and 'B' is a non-shared mount. - The mount 'A' is mounted on mount 'B' at dentry 'b'. Mount 'A' - continues to be a slave mount of mount 'Z'. - - 8. 'A' is a unbindable mount and 'B' is a non-shared mount. The mount - 'A' is mounted on mount 'B' at dentry 'b'. Mount 'A' continues to be a - unbindable mount. + Consider the following command:: + + mount --move A B/b + + where 'A' is the source mount, 'B' is the destination mount and 'b' is + the dentry in the destination mount. + + The outcome depends on the type of the mount of 'A' and 'B'. The table + below is a quick reference:: + + --------------------------------------------------------------------------- + | MOVE MOUNT OPERATION | + |************************************************************************** + | source(A)->| shared | private | slave | unbindable | + | dest(B) | | | | | + | | | | | | | + | v | | | | | + |************************************************************************** + | shared | shared | shared |shared and slave| invalid | + | | | | | | + |non-shared| shared | private | slave | unbindable | + *************************************************************************** + + .. Note:: moving a mount residing under a shared mount is invalid. + + Details follow: + + 1. 'A' is a shared mount and 'B' is a shared mount. The mount 'A' is + mounted on mount 'B' at dentry 'b'. Also new mounts 'A1', 'A2'...'An' + are created and mounted at dentry 'b' on all mounts that receive + propagation from mount 'B'. A new propagation tree is created in the + exact same configuration as that of 'B'. This new propagation tree + contains all the new mounts 'A1', 'A2'... 'An'. And this new + propagation tree is appended to the already existing propagation tree + of 'A'. + + 2. 'A' is a private mount and 'B' is a shared mount. The mount 'A' is + mounted on mount 'B' at dentry 'b'. Also new mount 'A1', 'A2'... 'An' + are created and mounted at dentry 'b' on all mounts that receive + propagation from mount 'B'. The mount 'A' becomes a shared mount and a + propagation tree is created which is identical to that of + 'B'. This new propagation tree contains all the new mounts 'A1', + 'A2'... 'An'. + + 3. 'A' is a slave mount of mount 'Z' and 'B' is a shared mount. The + mount 'A' is mounted on mount 'B' at dentry 'b'. Also new mounts 'A1', + 'A2'... 'An' are created and mounted at dentry 'b' on all mounts that + receive propagation from mount 'B'. A new propagation tree is created + in the exact same configuration as that of 'B'. This new propagation + tree contains all the new mounts 'A1', 'A2'... 'An'. And this new + propagation tree is appended to the already existing propagation tree of + 'A'. Mount 'A' continues to be the slave mount of 'Z' but it also + becomes 'shared'. + + 4. 'A' is a unbindable mount and 'B' is a shared mount. The operation + is invalid. Because mounting anything on the shared mount 'B' can + create new mounts that get mounted on the mounts that receive + propagation from 'B'. And since the mount 'A' is unbindable, cloning + it to mount at other mountpoints is not possible. + + 5. 'A' is a private mount and 'B' is a non-shared(private or slave or + unbindable) mount. The mount 'A' is mounted on mount 'B' at dentry 'b'. + + 6. 'A' is a shared mount and 'B' is a non-shared mount. The mount 'A' + is mounted on mount 'B' at dentry 'b'. Mount 'A' continues to be a + shared mount. + + 7. 'A' is a slave mount of mount 'Z' and 'B' is a non-shared mount. + The mount 'A' is mounted on mount 'B' at dentry 'b'. Mount 'A' + continues to be a slave mount of mount 'Z'. + + 8. 'A' is a unbindable mount and 'B' is a non-shared mount. The mount + 'A' is mounted on mount 'B' at dentry 'b'. Mount 'A' continues to be a + unbindable mount. e) Mount semantics - Consider the following command:: + Consider the following command:: - mount device B/b + mount device B/b - 'B' is the destination mount and 'b' is the dentry in the destination - mount. + 'B' is the destination mount and 'b' is the dentry in the destination + mount. - The above operation is the same as bind operation with the exception - that the source mount is always a private mount. + The above operation is the same as bind operation with the exception + that the source mount is always a private mount. f) Unmount semantics - Consider the following command:: + Consider the following command:: - umount A + umount A - where 'A' is a mount mounted on mount 'B' at dentry 'b'. + where 'A' is a mount mounted on mount 'B' at dentry 'b'. - If mount 'B' is shared, then all most-recently-mounted mounts at dentry - 'b' on mounts that receive propagation from mount 'B' and does not have - sub-mounts within them are unmounted. + If mount 'B' is shared, then all most-recently-mounted mounts at dentry + 'b' on mounts that receive propagation from mount 'B' and does not have + sub-mounts within them are unmounted. - Example: Let's say 'B1', 'B2', 'B3' are shared mounts that propagate to - each other. + Example: Let's say 'B1', 'B2', 'B3' are shared mounts that propagate to + each other. - let's say 'A1', 'A2', 'A3' are first mounted at dentry 'b' on mount - 'B1', 'B2' and 'B3' respectively. + let's say 'A1', 'A2', 'A3' are first mounted at dentry 'b' on mount + 'B1', 'B2' and 'B3' respectively. - let's say 'C1', 'C2', 'C3' are next mounted at the same dentry 'b' on - mount 'B1', 'B2' and 'B3' respectively. + let's say 'C1', 'C2', 'C3' are next mounted at the same dentry 'b' on + mount 'B1', 'B2' and 'B3' respectively. - if 'C1' is unmounted, all the mounts that are most-recently-mounted on - 'B1' and on the mounts that 'B1' propagates-to are unmounted. + if 'C1' is unmounted, all the mounts that are most-recently-mounted on + 'B1' and on the mounts that 'B1' propagates-to are unmounted. - 'B1' propagates to 'B2' and 'B3'. And the most recently mounted mount - on 'B2' at dentry 'b' is 'C2', and that of mount 'B3' is 'C3'. + 'B1' propagates to 'B2' and 'B3'. And the most recently mounted mount + on 'B2' at dentry 'b' is 'C2', and that of mount 'B3' is 'C3'. - So all 'C1', 'C2' and 'C3' should be unmounted. + So all 'C1', 'C2' and 'C3' should be unmounted. - If any of 'C2' or 'C3' has some child mounts, then that mount is not - unmounted, but all other mounts are unmounted. However if 'C1' is told - to be unmounted and 'C1' has some sub-mounts, the umount operation is - failed entirely. + If any of 'C2' or 'C3' has some child mounts, then that mount is not + unmounted, but all other mounts are unmounted. However if 'C1' is told + to be unmounted and 'C1' has some sub-mounts, the umount operation is + failed entirely. g) Clone Namespace - A cloned namespace contains all the mounts as that of the parent - namespace. + A cloned namespace contains all the mounts as that of the parent + namespace. - Let's say 'A' and 'B' are the corresponding mounts in the parent and the - child namespace. + Let's say 'A' and 'B' are the corresponding mounts in the parent and the + child namespace. - If 'A' is shared, then 'B' is also shared and 'A' and 'B' propagate to - each other. + If 'A' is shared, then 'B' is also shared and 'A' and 'B' propagate to + each other. - If 'A' is a slave mount of 'Z', then 'B' is also the slave mount of - 'Z'. + If 'A' is a slave mount of 'Z', then 'B' is also the slave mount of + 'Z'. - If 'A' is a private mount, then 'B' is a private mount too. + If 'A' is a private mount, then 'B' is a private mount too. - If 'A' is unbindable mount, then 'B' is a unbindable mount too. + If 'A' is unbindable mount, then 'B' is a unbindable mount too. 6) Quiz ------- - A. What is the result of the following command sequence? +A. What is the result of the following command sequence? - :: + :: - mount --bind /mnt /mnt - mount --make-shared /mnt - mount --bind /mnt /tmp - mount --move /tmp /mnt/1 + mount --bind /mnt /mnt + mount --make-shared /mnt + mount --bind /mnt /tmp + mount --move /tmp /mnt/1 - what should be the contents of /mnt /mnt/1 /mnt/1/1 should be? - Should they all be identical? or should /mnt and /mnt/1 be - identical only? + what should be the contents of /mnt /mnt/1 /mnt/1/1 should be? + Should they all be identical? or should /mnt and /mnt/1 be + identical only? - B. What is the result of the following command sequence? +B. What is the result of the following command sequence? - :: + :: - mount --make-rshared / - mkdir -p /v/1 - mount --rbind / /v/1 + mount --make-rshared / + mkdir -p /v/1 + mount --rbind / /v/1 - what should be the content of /v/1/v/1 be? + what should be the content of /v/1/v/1 be? - C. What is the result of the following command sequence? +C. What is the result of the following command sequence? - :: + :: - mount --bind /mnt /mnt - mount --make-shared /mnt - mkdir -p /mnt/1/2/3 /mnt/1/test - mount --bind /mnt/1 /tmp - mount --make-slave /mnt - mount --make-shared /mnt - mount --bind /mnt/1/2 /tmp1 - mount --make-slave /mnt + mount --bind /mnt /mnt + mount --make-shared /mnt + mkdir -p /mnt/1/2/3 /mnt/1/test + mount --bind /mnt/1 /tmp + mount --make-slave /mnt + mount --make-shared /mnt + mount --bind /mnt/1/2 /tmp1 + mount --make-slave /mnt - At this point we have the first mount at /tmp and - its root dentry is 1. Let's call this mount 'A' - And then we have a second mount at /tmp1 with root - dentry 2. Let's call this mount 'B' - Next we have a third mount at /mnt with root dentry - mnt. Let's call this mount 'C' + At this point we have the first mount at /tmp and + its root dentry is 1. Let's call this mount 'A' + And then we have a second mount at /tmp1 with root + dentry 2. Let's call this mount 'B' + Next we have a third mount at /mnt with root dentry + mnt. Let's call this mount 'C' - 'B' is the slave of 'A' and 'C' is a slave of 'B' - A -> B -> C + 'B' is the slave of 'A' and 'C' is a slave of 'B' + A -> B -> C - at this point if we execute the following command:: + at this point if we execute the following command:: - mount --bind /bin /tmp/test + mount --bind /bin /tmp/test - The mount is attempted on 'A' + The mount is attempted on 'A' - will the mount propagate to 'B' and 'C' ? + will the mount propagate to 'B' and 'C' ? - what would be the contents of - /mnt/1/test be? + what would be the contents of + /mnt/1/test be? 7) FAQ ------ - 1. Why is bind mount needed? How is it different from symbolic links? - symbolic links can get stale if the destination mount gets - unmounted or moved. Bind mounts continue to exist even if the - other mount is unmounted or moved. +1. Why is bind mount needed? How is it different from symbolic links? + + symbolic links can get stale if the destination mount gets + unmounted or moved. Bind mounts continue to exist even if the + other mount is unmounted or moved. - 2. Why can't the shared subtree be implemented using exportfs? +2. Why can't the shared subtree be implemented using exportfs? - exportfs is a heavyweight way of accomplishing part of what - shared subtree can do. I cannot imagine a way to implement the - semantics of slave mount using exportfs? + exportfs is a heavyweight way of accomplishing part of what + shared subtree can do. I cannot imagine a way to implement the + semantics of slave mount using exportfs? - 3. Why is unbindable mount needed? +3. Why is unbindable mount needed? - Let's say we want to replicate the mount tree at multiple - locations within the same subtree. + Let's say we want to replicate the mount tree at multiple + locations within the same subtree. - if one rbind mounts a tree within the same subtree 'n' times - the number of mounts created is an exponential function of 'n'. - Having unbindable mount can help prune the unneeded bind - mounts. Here is an example. + if one rbind mounts a tree within the same subtree 'n' times + the number of mounts created is an exponential function of 'n'. + Having unbindable mount can help prune the unneeded bind + mounts. Here is an example. - step 1: - let's say the root tree has just two directories with - one vfsmount:: + step 1: + let's say the root tree has just two directories with + one vfsmount:: - root - / \ - tmp usr + root + / \ + tmp usr - And we want to replicate the tree at multiple - mountpoints under /root/tmp + And we want to replicate the tree at multiple + mountpoints under /root/tmp - step 2: - :: + step 2: + :: - mount --make-shared /root + mount --make-shared /root - mkdir -p /tmp/m1 + mkdir -p /tmp/m1 - mount --rbind /root /tmp/m1 + mount --rbind /root /tmp/m1 - the new tree now looks like this:: + the new tree now looks like this:: - root - / \ - tmp usr - / - m1 - / \ - tmp usr - / - m1 + root + / \ + tmp usr + / + m1 + / \ + tmp usr + / + m1 - it has two vfsmounts + it has two vfsmounts - step 3: - :: + step 3: + :: - mkdir -p /tmp/m2 - mount --rbind /root /tmp/m2 + mkdir -p /tmp/m2 + mount --rbind /root /tmp/m2 - the new tree now looks like this:: + the new tree now looks like this:: - root - / \ - tmp usr - / \ - m1 m2 - / \ / \ - tmp usr tmp usr - / \ / - m1 m2 m1 - / \ / \ - tmp usr tmp usr - / / \ - m1 m1 m2 - / \ - tmp usr - / \ - m1 m2 + root + / \ + tmp usr + / \ + m1 m2 + / \ / \ + tmp usr tmp usr + / \ / + m1 m2 m1 + / \ / \ + tmp usr tmp usr + / / \ + m1 m1 m2 + / \ + tmp usr + / \ + m1 m2 - it has 6 vfsmounts + it has 6 vfsmounts - step 4: - :: + step 4: + :: - mkdir -p /tmp/m3 - mount --rbind /root /tmp/m3 + mkdir -p /tmp/m3 + mount --rbind /root /tmp/m3 - I won't draw the tree..but it has 24 vfsmounts + I won't draw the tree..but it has 24 vfsmounts - at step i the number of vfsmounts is V[i] = i*V[i-1]. - This is an exponential function. And this tree has way more - mounts than what we really needed in the first place. + at step i the number of vfsmounts is V[i] = i*V[i-1]. + This is an exponential function. And this tree has way more + mounts than what we really needed in the first place. - One could use a series of umount at each step to prune - out the unneeded mounts. But there is a better solution. - Unclonable mounts come in handy here. + One could use a series of umount at each step to prune + out the unneeded mounts. But there is a better solution. + Unclonable mounts come in handy here. - step 1: - let's say the root tree has just two directories with - one vfsmount:: + step 1: + let's say the root tree has just two directories with + one vfsmount:: - root - / \ - tmp usr + root + / \ + tmp usr - How do we set up the same tree at multiple locations under - /root/tmp + How do we set up the same tree at multiple locations under + /root/tmp - step 2: - :: + step 2: + :: - mount --bind /root/tmp /root/tmp + mount --bind /root/tmp /root/tmp - mount --make-rshared /root - mount --make-unbindable /root/tmp + mount --make-rshared /root + mount --make-unbindable /root/tmp - mkdir -p /tmp/m1 + mkdir -p /tmp/m1 - mount --rbind /root /tmp/m1 + mount --rbind /root /tmp/m1 - the new tree now looks like this:: + the new tree now looks like this:: - root - / \ - tmp usr - / - m1 - / \ - tmp usr + root + / \ + tmp usr + / + m1 + / \ + tmp usr - step 3: - :: + step 3: + :: - mkdir -p /tmp/m2 - mount --rbind /root /tmp/m2 + mkdir -p /tmp/m2 + mount --rbind /root /tmp/m2 - the new tree now looks like this:: + the new tree now looks like this:: - root - / \ - tmp usr - / \ - m1 m2 - / \ / \ - tmp usr tmp usr + root + / \ + tmp usr + / \ + m1 m2 + / \ / \ + tmp usr tmp usr - step 4: - :: + step 4: + :: - mkdir -p /tmp/m3 - mount --rbind /root /tmp/m3 + mkdir -p /tmp/m3 + mount --rbind /root /tmp/m3 - the new tree now looks like this:: + the new tree now looks like this:: - root - / \ - tmp usr - / \ \ - m1 m2 m3 - / \ / \ / \ - tmp usr tmp usr tmp usr + root + / \ + tmp usr + / \ \ + m1 m2 m3 + / \ / \ / \ + tmp usr tmp usr tmp usr 8) Implementation ----------------- A) Datastructure - Several new fields are introduced to struct vfsmount: + Several new fields are introduced to struct vfsmount: - ->mnt_share - Links together all the mount to/from which this vfsmount - send/receives propagation events. + ->mnt_share + Links together all the mount to/from which this vfsmount + send/receives propagation events. - ->mnt_slave_list - Links all the mounts to which this vfsmount propagates - to. + ->mnt_slave_list + Links all the mounts to which this vfsmount propagates + to. - ->mnt_slave - Links together all the slaves that its master vfsmount - propagates to. + ->mnt_slave + Links together all the slaves that its master vfsmount + propagates to. - ->mnt_master - Points to the master vfsmount from which this vfsmount - receives propagation. + ->mnt_master + Points to the master vfsmount from which this vfsmount + receives propagation. - ->mnt_flags - Takes two more flags to indicate the propagation status of - the vfsmount. MNT_SHARE indicates that the vfsmount is a shared - vfsmount. MNT_UNCLONABLE indicates that the vfsmount cannot be - replicated. + ->mnt_flags + Takes two more flags to indicate the propagation status of + the vfsmount. MNT_SHARE indicates that the vfsmount is a shared + vfsmount. MNT_UNCLONABLE indicates that the vfsmount cannot be + replicated. - All the shared vfsmounts in a peer group form a cyclic list through - ->mnt_share. + All the shared vfsmounts in a peer group form a cyclic list through + ->mnt_share. - All vfsmounts with the same ->mnt_master form on a cyclic list anchored - in ->mnt_master->mnt_slave_list and going through ->mnt_slave. + All vfsmounts with the same ->mnt_master form on a cyclic list anchored + in ->mnt_master->mnt_slave_list and going through ->mnt_slave. - ->mnt_master can point to arbitrary (and possibly different) members - of master peer group. To find all immediate slaves of a peer group - you need to go through _all_ ->mnt_slave_list of its members. - Conceptually it's just a single set - distribution among the - individual lists does not affect propagation or the way propagation - tree is modified by operations. + ->mnt_master can point to arbitrary (and possibly different) members + of master peer group. To find all immediate slaves of a peer group + you need to go through _all_ ->mnt_slave_list of its members. + Conceptually it's just a single set - distribution among the + individual lists does not affect propagation or the way propagation + tree is modified by operations. - All vfsmounts in a peer group have the same ->mnt_master. If it is - non-NULL, they form a contiguous (ordered) segment of slave list. + All vfsmounts in a peer group have the same ->mnt_master. If it is + non-NULL, they form a contiguous (ordered) segment of slave list. - A example propagation tree looks as shown in the figure below. - [ NOTE: Though it looks like a forest, if we consider all the shared - mounts as a conceptual entity called 'pnode', it becomes a tree]:: + A example propagation tree looks as shown in the figure below. + [ NOTE: Though it looks like a forest, if we consider all the shared + mounts as a conceptual entity called 'pnode', it becomes a tree]:: - A <--> B <--> C <---> D - /|\ /| |\ - / F G J K H I - / - E<-->K - /|\ - M L N + A <--> B <--> C <---> D + /|\ /| |\ + / F G J K H I + / + E<-->K + /|\ + M L N - In the above figure A,B,C and D all are shared and propagate to each - other. 'A' has got 3 slave mounts 'E' 'F' and 'G' 'C' has got 2 slave - mounts 'J' and 'K' and 'D' has got two slave mounts 'H' and 'I'. - 'E' is also shared with 'K' and they propagate to each other. And - 'K' has 3 slaves 'M', 'L' and 'N' + In the above figure A,B,C and D all are shared and propagate to each + other. 'A' has got 3 slave mounts 'E' 'F' and 'G' 'C' has got 2 slave + mounts 'J' and 'K' and 'D' has got two slave mounts 'H' and 'I'. + 'E' is also shared with 'K' and they propagate to each other. And + 'K' has 3 slaves 'M', 'L' and 'N' - A's ->mnt_share links with the ->mnt_share of 'B' 'C' and 'D' + A's ->mnt_share links with the ->mnt_share of 'B' 'C' and 'D' - A's ->mnt_slave_list links with ->mnt_slave of 'E', 'K', 'F' and 'G' + A's ->mnt_slave_list links with ->mnt_slave of 'E', 'K', 'F' and 'G' - E's ->mnt_share links with ->mnt_share of K + E's ->mnt_share links with ->mnt_share of K - 'E', 'K', 'F', 'G' have their ->mnt_master point to struct vfsmount of 'A' + 'E', 'K', 'F', 'G' have their ->mnt_master point to struct vfsmount of 'A' - 'M', 'L', 'N' have their ->mnt_master point to struct vfsmount of 'K' + 'M', 'L', 'N' have their ->mnt_master point to struct vfsmount of 'K' - K's ->mnt_slave_list links with ->mnt_slave of 'M', 'L' and 'N' + K's ->mnt_slave_list links with ->mnt_slave of 'M', 'L' and 'N' - C's ->mnt_slave_list links with ->mnt_slave of 'J' and 'K' + C's ->mnt_slave_list links with ->mnt_slave of 'J' and 'K' - J and K's ->mnt_master points to struct vfsmount of C + J and K's ->mnt_master points to struct vfsmount of C - and finally D's ->mnt_slave_list links with ->mnt_slave of 'H' and 'I' + and finally D's ->mnt_slave_list links with ->mnt_slave of 'H' and 'I' - 'H' and 'I' have their ->mnt_master pointing to struct vfsmount of 'D'. + 'H' and 'I' have their ->mnt_master pointing to struct vfsmount of 'D'. - NOTE: The propagation tree is orthogonal to the mount tree. + NOTE: The propagation tree is orthogonal to the mount tree. B) Locking: - ->mnt_share, ->mnt_slave, ->mnt_slave_list, ->mnt_master are protected - by namespace_sem (exclusive for modifications, shared for reading). + ->mnt_share, ->mnt_slave, ->mnt_slave_list, ->mnt_master are protected + by namespace_sem (exclusive for modifications, shared for reading). - Normally we have ->mnt_flags modifications serialized by vfsmount_lock. - There are two exceptions: do_add_mount() and clone_mnt(). - The former modifies a vfsmount that has not been visible in any shared - data structures yet. - The latter holds namespace_sem and the only references to vfsmount - are in lists that can't be traversed without namespace_sem. + Normally we have ->mnt_flags modifications serialized by vfsmount_lock. + There are two exceptions: do_add_mount() and clone_mnt(). + The former modifies a vfsmount that has not been visible in any shared + data structures yet. + The latter holds namespace_sem and the only references to vfsmount + are in lists that can't be traversed without namespace_sem. C) Algorithm: - The crux of the implementation resides in rbind/move operation. + The crux of the implementation resides in rbind/move operation. + + The overall algorithm breaks the operation into 3 phases: (look at + attach_recursive_mnt() and propagate_mnt()) - The overall algorithm breaks the operation into 3 phases: (look at - attach_recursive_mnt() and propagate_mnt()) + 1. Prepare phase. - 1. Prepare phase. + For each mount in the source tree: - For each mount in the source tree: + a) Create the necessary number of mount trees to + be attached to each of the mounts that receive + propagation from the destination mount. + b) Do not attach any of the trees to its destination. + However note down its ->mnt_parent and ->mnt_mountpoint + c) Link all the new mounts to form a propagation tree that + is identical to the propagation tree of the destination + mount. - a) Create the necessary number of mount trees to - be attached to each of the mounts that receive - propagation from the destination mount. - b) Do not attach any of the trees to its destination. - However note down its ->mnt_parent and ->mnt_mountpoint - c) Link all the new mounts to form a propagation tree that - is identical to the propagation tree of the destination - mount. + If this phase is successful, there should be 'n' new + propagation trees; where 'n' is the number of mounts in the + source tree. Go to the commit phase - If this phase is successful, there should be 'n' new - propagation trees; where 'n' is the number of mounts in the - source tree. Go to the commit phase + Also there should be 'm' new mount trees, where 'm' is + the number of mounts to which the destination mount + propagates to. - Also there should be 'm' new mount trees, where 'm' is - the number of mounts to which the destination mount - propagates to. + If any memory allocations fail, go to the abort phase. - If any memory allocations fail, go to the abort phase. + 2. Commit phase. - 2. Commit phase. + Attach each of the mount trees to their corresponding + destination mounts. - Attach each of the mount trees to their corresponding - destination mounts. + 3. Abort phase. - 3. Abort phase. - Delete all the newly created trees. + Delete all the newly created trees. - .. Note:: - all the propagation related functionality resides in the file pnode.c + .. Note:: + all the propagation related functionality resides in the file pnode.c ------------------------------------------------------------------------ -- cgit v1.2.3 From ec1a37468f15b5fa69ecd01f49a0d818ed559943 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 19 Aug 2025 13:12:53 +0700 Subject: Documentation: sharedsubtree: Convert notes to note directive While a few of the notes are already in reST syntax, others are left intact (inconsistent). Convert them to reST syntax too. Signed-off-by: Bagas Sanjaya Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250819061254.31220-6-bagasdotme@gmail.com --- Documentation/filesystems/sharedsubtree.rst | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/sharedsubtree.rst b/Documentation/filesystems/sharedsubtree.rst index b09650e28534..8b7dc9159083 100644 --- a/Documentation/filesystems/sharedsubtree.rst +++ b/Documentation/filesystems/sharedsubtree.rst @@ -43,9 +43,10 @@ a) A **shared mount** can be replicated to as many mountpoints and all the # mount --make-shared /mnt - Note: mount(8) command now supports the --make-shared flag, - so the sample 'smount' program is no longer needed and has been - removed. + .. note:: + mount(8) command now supports the --make-shared flag, + so the sample 'smount' program is no longer needed and has been + removed. :: @@ -242,8 +243,9 @@ D) Versioned files The section below explains the detailed semantics of bind, rbind, move, mount, umount and clone-namespace operations. -Note: the word 'vfsmount' and the noun 'mount' have been used -to mean the same thing, throughout this document. +.. Note:: + the word 'vfsmount' and the noun 'mount' have been used + to mean the same thing, throughout this document. a) Mount states @@ -885,8 +887,12 @@ A) Datastructure non-NULL, they form a contiguous (ordered) segment of slave list. A example propagation tree looks as shown in the figure below. - [ NOTE: Though it looks like a forest, if we consider all the shared - mounts as a conceptual entity called 'pnode', it becomes a tree]:: + + .. note:: + Though it looks like a forest, if we consider all the shared + mounts as a conceptual entity called 'pnode', it becomes a tree. + + :: A <--> B <--> C <---> D -- cgit v1.2.3 From d90e7b56406032a6175e79de3d7e884185f6be71 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 25 Aug 2025 14:04:55 +0200 Subject: docs: conf.py: drop xindy rule The rule as-is is wrong, as it was inverted. Besides that, after retest building all repos with suggested LaTeX packages given by sphinx-pre-install, I was unable to reproduce the issues I saw with xindy in the past. So, let's just drop. If anyone reports issues with xindy, we may need to readd, but at the right way, e.g. {options}{pkgname}. Reported-by: Akira Yokosawa Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/83068bc31839e7095f1f408e49658362d467797e.1756123459.git.mchehab+huawei@kernel.org --- Documentation/conf.py | 2 -- 1 file changed, 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/conf.py b/Documentation/conf.py index 8fcecdb927b1..574896cca198 100644 --- a/Documentation/conf.py +++ b/Documentation/conf.py @@ -458,8 +458,6 @@ latex_elements = { "papersize": "a4paper", "passoptionstopackages": dedent(r""" \PassOptionsToPackage{svgnames}{xcolor} - % Avoid encoding troubles when creating indexes - \PassOptionsToPackage{xindy}{language=english,codepage=utf8,noautomatic} """), # The font size ('10pt', '11pt' or '12pt'). "pointsize": "11pt", -- cgit v1.2.3 From 97d37c0a4477c857f2ddf42b5fe9e4a78ab9db85 Mon Sep 17 00:00:00 2001 From: T Pratham Date: Wed, 20 Aug 2025 14:42:26 +0530 Subject: dt-bindings: crypto: Add binding for TI DTHE V2 Add DT binding for Texas Instruments DTHE V2 cryptography engine. DTHE V2 is introduced as a part of TI AM62L SoC and can currently be only found in it. Signed-off-by: T Pratham Reviewed-by: Krzysztof Kozlowski Signed-off-by: Herbert Xu --- .../bindings/crypto/ti,am62l-dthev2.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/ti,am62l-dthev2.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/crypto/ti,am62l-dthev2.yaml b/Documentation/devicetree/bindings/crypto/ti,am62l-dthev2.yaml new file mode 100644 index 000000000000..5486bfeb2fe8 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/ti,am62l-dthev2.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/ti,am62l-dthev2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: K3 SoC DTHE V2 crypto module + +maintainers: + - T Pratham + +properties: + compatible: + enum: + - ti,am62l-dthev2 + + reg: + maxItems: 1 + + dmas: + items: + - description: AES Engine RX DMA Channel + - description: AES Engine TX DMA Channel + - description: SHA Engine TX DMA Channel + + dma-names: + items: + - const: rx + - const: tx1 + - const: tx2 + +required: + - compatible + - reg + - dmas + - dma-names + +additionalProperties: false + +examples: + - | + crypto@40800000 { + compatible = "ti,am62l-dthev2"; + reg = <0x40800000 0x10000>; + + dmas = <&main_bcdma 0 0 0x4700 0>, + <&main_bcdma 0 0 0xc701 0>, + <&main_bcdma 0 0 0xc700 0>; + dma-names = "rx", "tx1", "tx2"; + }; -- cgit v1.2.3 From a52bdee13ed77f02dfd902baeb0eae876846672e Mon Sep 17 00:00:00 2001 From: David Lechner Date: Thu, 28 Aug 2025 16:54:52 -0500 Subject: dt-bindings: iio: adc: adi,ad7124: fix clocks properties Use correct clocks properties for the AD7124 family of ADCs. These ADCs have an internal clock along with an optional external clock that can be connected to the CLK pin. This pin can be wired up 3 ways: 1. Not connected - the internal clock is used. 2. Connected to an external clock (input) - the external clock is used. 3. Connected to the CLK pin on another ADC (output) - the internal clock is used on one and the other is configured for an external clock. The new bindings describe these 3 cases by picking one of the following: 1. Omit both clocks and #clock-cells properties. 2. Include only the clocks property with a phandle to the external clock. 3. Include only the #clock-cells property on the ADC providing the output. The clock-names property is now deprecated and should not be used. The MCLK signal that it refers to is an internal counter in the ADC and therefore does not make sense as a devicetree property as it can't be connected to anything external to the ADC. Since there is only one possible external clock, the clock-names property is not needed anyway. Based on the implementation of the Linux driver, it looks like the "mclk" clock was basically being used as a control to select the power mode of the ADC, which is not something that should be done in the devicetree. Reviewed-by: Rob Herring (Arm) Signed-off-by: David Lechner Link: https://patch.msgid.link/20250828-iio-adc-ad7124-proper-clock-support-v3-1-0b317b4605e5@baylibre.com Signed-off-by: Jonathan Cameron --- .../devicetree/bindings/iio/adc/adi,ad7124.yaml | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml index 4dd5395730c1..2e3f84db6193 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml @@ -28,12 +28,21 @@ properties: clocks: maxItems: 1 - description: phandle to the master clock (mclk) + description: Optional external clock connected to the CLK pin. clock-names: + deprecated: true + description: + MCLK is an internal counter in the ADC. Do not use this property. items: - const: mclk + '#clock-cells': + description: + The CLK pin can be used as an output. When that is the case, include + this property. + const: 0 + interrupts: description: IRQ line for the ADC maxItems: 1 @@ -67,10 +76,14 @@ properties: required: - compatible - reg - - clocks - - clock-names - interrupts +# Can't have both clock input and output at the same time. +not: + required: + - '#clock-cells' + - clocks + patternProperties: "^channel@([0-9]|1[0-5])$": $ref: adc.yaml @@ -136,8 +149,6 @@ examples: interrupt-parent = <&gpio>; rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>; refin1-supply = <&adc_vref>; - clocks = <&ad7124_mclk>; - clock-names = "mclk"; #address-cells = <1>; #size-cells = <0>; -- cgit v1.2.3 From 06cff2c4e4c35ee96532b6ddd51e78641a3b4b9d Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 22 Aug 2025 03:27:30 +0300 Subject: dt-bindings: media: nxp,imx-mipi-csi2: Mark clock-frequency as deprecated Usage of the clock-frequency property, which is already optional, is discouraged in favour of using assigned-clock-rates (and assigned-clock-parents where needed). Mark the property as deprecated, and update the examples accordingly. Link: https://lore.kernel.org/r/20250822002734.23516-11-laurent.pinchart@ideasonboard.com Signed-off-by: Laurent Pinchart Reviewed-by: Frank Li Reviewed-by: Rob Herring (Arm) Signed-off-by: Hans Verkuil --- .../devicetree/bindings/media/nxp,imx-mipi-csi2.yaml | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml index 03a23a26c4f3..db4889bf881e 100644 --- a/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml +++ b/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml @@ -66,6 +66,7 @@ properties: clock-frequency: description: The desired external clock ("wrap") frequency, in Hz default: 166000000 + deprecated: true ports: $ref: /schemas/graph.yaml#/properties/ports @@ -147,7 +148,9 @@ examples: <&clks IMX7D_MIPI_CSI_ROOT_CLK>, <&clks IMX7D_MIPI_DPHY_ROOT_CLK>; clock-names = "pclk", "wrap", "phy"; - clock-frequency = <166000000>; + + assigned-clocks = <&clks IMX7D_MIPI_CSI_ROOT_CLK>; + assigned-clock-rates = <166000000>; power-domains = <&pgc_mipi_phy>; phy-supply = <®_1p0d>; @@ -185,12 +188,16 @@ examples: compatible = "fsl,imx8mm-mipi-csi2"; reg = <0x32e30000 0x1000>; interrupts = ; - clock-frequency = <333000000>; + clocks = <&clk IMX8MM_CLK_DISP_APB_ROOT>, <&clk IMX8MM_CLK_CSI1_ROOT>, <&clk IMX8MM_CLK_CSI1_PHY_REF>, <&clk IMX8MM_CLK_DISP_AXI_ROOT>; clock-names = "pclk", "wrap", "phy", "axi"; + + assigned-clocks = <&clk IMX8MM_CLK_CSI1_ROOT>; + assigned-clock-rates = <250000000>; + power-domains = <&mipi_pd>; ports { -- cgit v1.2.3 From 362fc3fa78f9fa9fe9417c3c02850d282bd2c791 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 22 Aug 2025 03:27:31 +0300 Subject: dt-bindings: media: nxp,imx-mipi-csi2: Add fsl,num-channels property The CSI-2 receiver can be instantiated with up to four output channels. This is an integration-specific property, specify the number of instantiated channels through a new fsl,num-channels property. The property is optional, and defaults to 1 as only one channel is currently supported by drivers. Using the compatible string to infer the number of channels has been considered, but multiple instances of the same CSIS in the same SoC could conceptually be synthesized with a different number of channels. An explicit property is therefore more appropriate. The only known SoC to have more than one channel is the i.MX8MP. As the binding examples do not cover that SoC, don't update them. Link: https://lore.kernel.org/r/20250822002734.23516-12-laurent.pinchart@ideasonboard.com Signed-off-by: Laurent Pinchart Reviewed-by: Rob Herring (Arm) Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml index db4889bf881e..41ad5b84eaeb 100644 --- a/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml +++ b/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml @@ -68,6 +68,13 @@ properties: default: 166000000 deprecated: true + fsl,num-channels: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Number of output channels + minimum: 1 + maximum: 4 + default: 1 + ports: $ref: /schemas/graph.yaml#/properties/ports -- cgit v1.2.3 From acfaba169385bfa243a10a027f8272a974b2288a Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Mon, 16 Jun 2025 04:11:10 +0300 Subject: dt-bindings: media: rkisp1: Require pclk clock on i.MX8MP variant The ISP integrated in the NXP i.MX8MP requires the pclk clock to access the HDR stitching registers. Make it mandatory in the DT binding. Link: https://lore.kernel.org/r/20250616011115.19515-2-laurent.pinchart@ideasonboard.com Signed-off-by: Laurent Pinchart Reviewed-by: Rob Herring (Arm) Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/rockchip-isp1.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml index 6be00aca4181..6b360cbb42e0 100644 --- a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml +++ b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml @@ -155,6 +155,10 @@ allOf: const: fsl,imx8mp-isp then: properties: + clocks: + minItems: 4 + clock-names: + minItems: 4 iommus: false phys: false phy-names: false -- cgit v1.2.3 From 4435a7a3fc283011a7b3e9c3b157aac8384333bd Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Mon, 16 Jun 2025 04:11:11 +0300 Subject: dt-bindings: media: rkisp1: Add second power domain on i.MX8MP In the NXP i.MX8MP, the pclk clock required by the ISP is gated by the MIPI CSI-2 power domain. Add it to the power-domains property, and require specifying power-domain-names accordingly. Link: https://lore.kernel.org/r/20250616011115.19515-3-laurent.pinchart@ideasonboard.com Signed-off-by: Laurent Pinchart Reviewed-by: Rob Herring (Arm) Signed-off-by: Hans Verkuil --- .../devicetree/bindings/media/rockchip-isp1.yaml | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml index 6b360cbb42e0..477c21417e75 100644 --- a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml +++ b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml @@ -71,7 +71,16 @@ properties: const: dphy power-domains: - maxItems: 1 + minItems: 1 + items: + - description: ISP power domain + - description: MIPI CSI-2 power domain + + power-domain-names: + minItems: 1 + items: + - const: isp + - const: csi2 ports: $ref: /schemas/graph.yaml#/properties/ports @@ -162,11 +171,19 @@ allOf: iommus: false phys: false phy-names: false + power-domains: + minItems: 2 + power-domain-names: + minItems: 2 required: - fsl,blk-ctrl + - power-domain-names else: properties: fsl,blk-ctrl: false + power-domains: + maxItems: 1 + power-domain-names: false required: - iommus - phys -- cgit v1.2.3 From a9ee71011a5347dd77887e2c5c2f87f01acd3efb Mon Sep 17 00:00:00 2001 From: Ioana Risteiu Date: Tue, 26 Aug 2025 01:13:50 +0300 Subject: dt-bindings: iio: adc: add IIO backend support Add the generic io-backends property to the AD7779 binding to enable support for the IIO backend framework. Also add the adi,num-lanes property to set the number of lanes used by AD7779. Reviewed-by: Rob Herring (Arm) Reviewed-by: Krzysztof Kozlowski Signed-off-by: Ioana Risteiu Link: https://patch.msgid.link/20250825221355.6214-3-Ioana.Risteiu@analog.com Signed-off-by: Jonathan Cameron --- .../devicetree/bindings/iio/adc/adi,ad7779.yaml | 44 +++++++++++++++++++++- 1 file changed, 43 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7779.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7779.yaml index 044f92f39cfa..ba3f7b2bd6cf 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7779.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7779.yaml @@ -80,11 +80,36 @@ properties: reset-gpios: maxItems: 1 + io-backends: + maxItems: 1 + + adi,num-lanes: + description: + Number of lanes on which the data is sent on the output when the data + output interface is used. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [1, 2, 4] + default: 4 + required: - compatible - reg - clocks - - interrupts + +allOf: + - if: + not: + required: + - io-backends + then: + properties: + adi,num-lanes: false + +oneOf: + - required: + - interrupts + - required: + - io-backends unevaluatedProperties: false @@ -107,4 +132,21 @@ examples: clocks = <&adc_clk>; }; }; + + - | + #include + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad7779"; + reg = <0>; + start-gpios = <&gpio0 87 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio0 93 GPIO_ACTIVE_LOW>; + clocks = <&adc_clk>; + io-backends = <&iio_backend>; + adi,num-lanes = <4>; + }; + }; ... -- cgit v1.2.3 From 91f98de42310c70f9a23595b3b20aa305717d955 Mon Sep 17 00:00:00 2001 From: Hakyeong Kim Date: Mon, 25 Aug 2025 17:14:27 +0530 Subject: dt-bindings: clock: Add ARTPEC-8 clock controller Add dt-schema for Axis ARTPEC-8 SoC clock controller. The Clock Management Unit (CMU) has a top-level block CMU_CMU which generates clocks for other blocks. Add device-tree binding definitions for following CMU blocks: - CMU_CMU - CMU_BUS - CMU_CORE - CMU_CPUCL - CMU_FSYS - CMU_IMEM - CMU_PERI Signed-off-by: Hakyeong Kim Signed-off-by: SeonGu Kang Reviewed-by: Rob Herring (Arm) Signed-off-by: Ravi Patel Link: https://lore.kernel.org/r/20250825114436.46882-2-ravi.patel@samsung.com Signed-off-by: Krzysztof Kozlowski --- .../bindings/clock/axis,artpec8-clock.yaml | 213 +++++++++++++++++++++ 1 file changed, 213 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/axis,artpec8-clock.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/axis,artpec8-clock.yaml b/Documentation/devicetree/bindings/clock/axis,artpec8-clock.yaml new file mode 100644 index 000000000000..277af48ac841 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/axis,artpec8-clock.yaml @@ -0,0 +1,213 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/axis,artpec8-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Axis ARTPEC-8 SoC clock controller + +maintainers: + - Jesper Nilsson + +description: | + ARTPEC-8 clock controller is comprised of several CMU (Clock Management Unit) + units, generating clocks for different domains. Those CMU units are modeled + as separate device tree nodes, and might depend on each other. + The root clock in that root tree is an external clock: OSCCLK (25 MHz). + This external clock must be defined as a fixed-rate clock in dts. + + CMU_CMU is a top-level CMU, where all base clocks are prepared using PLLs and + dividers; all other clocks of function blocks (other CMUs) are usually + derived from CMU_CMU. + + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All clocks available for usage + in clock consumer nodes are defined as preprocessor macros in + 'include/dt-bindings/clock/axis,artpec8-clk.h' header. + +properties: + compatible: + enum: + - axis,artpec8-cmu-cmu + - axis,artpec8-cmu-bus + - axis,artpec8-cmu-core + - axis,artpec8-cmu-cpucl + - axis,artpec8-cmu-fsys + - axis,artpec8-cmu-imem + - axis,artpec8-cmu-peri + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 5 + + clock-names: + minItems: 1 + maxItems: 5 + + "#clock-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - "#clock-cells" + +allOf: + - if: + properties: + compatible: + const: axis,artpec8-cmu-cmu + + then: + properties: + clocks: + items: + - description: External reference clock (25 MHz) + + clock-names: + items: + - const: fin_pll + + - if: + properties: + compatible: + const: axis,artpec8-cmu-bus + + then: + properties: + clocks: + items: + - description: External reference clock (25 MHz) + - description: CMU_BUS BUS clock (from CMU_CMU) + - description: CMU_BUS DLP clock (from CMU_CMU) + + clock-names: + items: + - const: fin_pll + - const: bus + - const: dlp + + - if: + properties: + compatible: + const: axis,artpec8-cmu-core + + then: + properties: + clocks: + items: + - description: External reference clock (25 MHz) + - description: CMU_CORE main clock (from CMU_CMU) + - description: CMU_CORE DLP clock (from CMU_CMU) + + clock-names: + items: + - const: fin_pll + - const: main + - const: dlp + + - if: + properties: + compatible: + const: axis,artpec8-cmu-cpucl + + then: + properties: + clocks: + items: + - description: External reference clock (25 MHz) + - description: CMU_CPUCL switch clock (from CMU_CMU) + + clock-names: + items: + - const: fin_pll + - const: switch + + - if: + properties: + compatible: + const: axis,artpec8-cmu-fsys + + then: + properties: + clocks: + items: + - description: External reference clock (25 MHz) + - description: CMU_FSYS SCAN0 clock (from CMU_CMU) + - description: CMU_FSYS SCAN1 clock (from CMU_CMU) + - description: CMU_FSYS BUS clock (from CMU_CMU) + - description: CMU_FSYS IP clock (from CMU_CMU) + + clock-names: + items: + - const: fin_pll + - const: scan0 + - const: scan1 + - const: bus + - const: ip + + - if: + properties: + compatible: + const: axis,artpec8-cmu-imem + + then: + properties: + clocks: + items: + - description: External reference clock (25 MHz) + - description: CMU_IMEM ACLK clock (from CMU_CMU) + - description: CMU_IMEM JPEG clock (from CMU_CMU) + + clock-names: + items: + - const: fin_pll + - const: aclk + - const: jpeg + + - if: + properties: + compatible: + const: axis,artpec8-cmu-peri + + then: + properties: + clocks: + items: + - description: External reference clock (25 MHz) + - description: CMU_PERI IP clock (from CMU_CMU) + - description: CMU_PERI AUDIO clock (from CMU_CMU) + - description: CMU_PERI DISP clock (from CMU_CMU) + + clock-names: + items: + - const: fin_pll + - const: ip + - const: audio + - const: disp + +additionalProperties: false + +examples: + # Clock controller node for CMU_FSYS + - | + #include + + cmu_fsys: clock-controller@16c10000 { + compatible = "axis,artpec8-cmu-fsys"; + reg = <0x16c10000 0x4000>; + #clock-cells = <1>; + clocks = <&fin_pll>, + <&cmu_cmu CLK_DOUT_CMU_FSYS_SCAN0>, + <&cmu_cmu CLK_DOUT_CMU_FSYS_SCAN1>, + <&cmu_cmu CLK_DOUT_CMU_FSYS_BUS>, + <&cmu_cmu CLK_DOUT_CMU_FSYS_IP>; + clock-names = "fin_pll", "scan0", "scan1", "bus", "ip"; + }; + +... -- cgit v1.2.3 From ea0484e4b82b3496310a94684dfad5e61421f633 Mon Sep 17 00:00:00 2001 From: Ravi Patel Date: Mon, 25 Aug 2025 17:14:32 +0530 Subject: dt-bindings: arm: Convert Axis board/soc bindings to json-schema Convert Axis SoC bindings to DT schema format using json-schema. Existing bindings supports ARTPEC-6 SoC and board. Signed-off-by: SungMin Park Signed-off-by: SeonGu Kang Reviewed-by: Rob Herring (Arm) Signed-off-by: Ravi Patel Link: https://lore.kernel.org/r/20250825114436.46882-7-ravi.patel@samsung.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/axis.txt | 13 ----------- Documentation/devicetree/bindings/arm/axis.yaml | 29 +++++++++++++++++++++++++ 2 files changed, 29 insertions(+), 13 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/axis.txt create mode 100644 Documentation/devicetree/bindings/arm/axis.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/axis.txt b/Documentation/devicetree/bindings/arm/axis.txt deleted file mode 100644 index ebd33a88776f..000000000000 --- a/Documentation/devicetree/bindings/arm/axis.txt +++ /dev/null @@ -1,13 +0,0 @@ -Axis Communications AB -ARTPEC series SoC Device Tree Bindings - -ARTPEC-6 ARM SoC -================ - -Required root node properties: -- compatible = "axis,artpec6"; - -ARTPEC-6 Development board: ---------------------------- -Required root node properties: -- compatible = "axis,artpec6-dev-board", "axis,artpec6"; diff --git a/Documentation/devicetree/bindings/arm/axis.yaml b/Documentation/devicetree/bindings/arm/axis.yaml new file mode 100644 index 000000000000..f9c218dc6883 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/axis.yaml @@ -0,0 +1,29 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/axis.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Axis ARTPEC platforms + +maintainers: + - Jesper Nilsson + - linux-arm-kernel@axis.com + +description: | + ARM platforms using SoCs designed by Axis branded as "ARTPEC". + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Axis ARTPEC-6 SoC board + items: + - enum: + - axis,artpec6-dev-board + - const: axis,artpec6 + +additionalProperties: true + +... -- cgit v1.2.3 From efad8eaf6f2f00460a2227c618ebb7c8e0dca201 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Sat, 23 Aug 2025 11:49:47 +0200 Subject: dt-bindings: arm: apple: Add t8112 j415 compatible This adds the "apple,j415" (MacBook Air (15-inch, M2, 2023) to the apple,t8112 platform. Reviewed-by: Neal Gompa Reviewed-by: Sven Peter Signed-off-by: Janne Grunau Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250823-apple-dt-sync-6-17-v2-4-6dc0daeb4786@jannau.net Signed-off-by: Sven Peter --- Documentation/devicetree/bindings/arm/apple.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentation/devicetree/bindings/arm/apple.yaml index da60e9de1cfb..7073535b7c5b 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -92,6 +92,7 @@ description: | Devices based on the "M2" SoC: - MacBook Air (M2, 2022) + - MacBook Air (15-inch, M2, 2023) - MacBook Pro (13-inch, M2, 2022) - Mac mini (M2, 2023) @@ -279,6 +280,7 @@ properties: items: - enum: - apple,j413 # MacBook Air (M2, 2022) + - apple,j415 # MacBook Air (15-inch, M2, 2023) - apple,j473 # Mac mini (M2, 2023) - apple,j493 # MacBook Pro (13-inch, M2, 2022) - const: apple,t8112 -- cgit v1.2.3 From 03724b3496cb0272a5050a989ebf2494b1ff5a55 Mon Sep 17 00:00:00 2001 From: SeonGu Kang Date: Mon, 1 Sep 2025 10:49:21 +0530 Subject: dt-bindings: pinctrl: samsung: Add compatible for ARTPEC-8 SoC Document the compatible string for ARTPEC-8 SoC pinctrl block, which is similar to other Samsung SoC pinctrl blocks. Signed-off-by: SeonGu Kang Signed-off-by: Ravi Patel Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250901051926.59970-2-ravi.patel@samsung.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml index de8460856141..9386dcd418c2 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml @@ -35,6 +35,7 @@ properties: compatible: enum: + - axis,artpec8-pinctrl - google,gs101-pinctrl - samsung,s3c2412-pinctrl - samsung,s3c2416-pinctrl -- cgit v1.2.3 From eef6dcbc52fa83c392a2f4a52845f347b233a584 Mon Sep 17 00:00:00 2001 From: Prathamesh Shete Date: Sat, 23 Aug 2025 11:24:19 +0530 Subject: dt-bindings: gpio: Add Tegra256 support Extend the existing Tegra186 GPIO controller device tree bindings with support for the GPIO controller found on Tegra256. The number of pins is slightly different, but the programming model remains the same Add a new header, include/dt-bindings/gpio/tegra256-gpio.h, that defines port IDs as well as the TEGRA256_MAIN_GPIO() helper, both of which are used in conjunction to create a unique specifier for each pin. The OS can reconstruct the port ID and pin from these values to determine the register region for the corresponding GPIO. However, the OS does not use the macro definitions in this file. The symbolic names help associate these GPIO specifiers with the names used in the technical documentation available for the chip. Signed-off-by: Prathamesh Shete Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250823055420.24664-1-pshete@nvidia.com Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml b/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml index 065f5761a93f..2bd620a1099b 100644 --- a/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml @@ -85,6 +85,7 @@ properties: - nvidia,tegra194-gpio-aon - nvidia,tegra234-gpio - nvidia,tegra234-gpio-aon + - nvidia,tegra256-gpio reg-names: items: @@ -155,6 +156,7 @@ allOf: - nvidia,tegra186-gpio - nvidia,tegra194-gpio - nvidia,tegra234-gpio + - nvidia,tegra256-gpio then: properties: interrupts: -- cgit v1.2.3 From d407ad36dd3451220f318af28e4f5813943ad4ce Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 12 Aug 2025 12:41:55 +0200 Subject: Documentation/process: maintainer-soc: Use "DTS" instead of "devicetree" Devicetree is a data structure and it is a bit generic term, because some treat Devicetree bindings as Devicetree. What the SoC maintainers profile is mentioning in ABI stability are the Devicetree sources, so DTS files. It is also more common during reviews to refer to these as per "DTS" instead "devicetree". Clarify that by using "DTS" name in few more places. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20250812104154.42289-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann --- Documentation/process/maintainer-soc.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/process/maintainer-soc.rst b/Documentation/process/maintainer-soc.rst index fe9d8bcfbd2b..3ba886f52a51 100644 --- a/Documentation/process/maintainer-soc.rst +++ b/Documentation/process/maintainer-soc.rst @@ -10,7 +10,7 @@ Overview The SoC subsystem is a place of aggregation for SoC-specific code. The main components of the subsystem are: -* devicetrees for 32- & 64-bit ARM and RISC-V +* devicetrees (DTS) for 32- & 64-bit ARM and RISC-V * 32-bit ARM board files (arch/arm/mach*) * 32- & 64-bit ARM defconfigs * SoC-specific drivers across architectures, in particular for 32- & 64-bit @@ -97,8 +97,8 @@ Perhaps one of the most important things to highlight is that dt-bindings document the ABI between the devicetree and the kernel. Please read Documentation/devicetree/bindings/ABI.rst. -If changes are being made to a devicetree that are incompatible with old -kernels, the devicetree patch should not be applied until the driver is, or an +If changes are being made to a DTS that are incompatible with old +kernels, the DTS patch should not be applied until the driver is, or an appropriate time later. Most importantly, any incompatible changes should be clearly pointed out in the patch description and pull request, along with the expected impact on existing users, such as bootloaders or other operating -- cgit v1.2.3 From 337ebfda8a4f2627bf52e200cacf6f3a2f5ccf48 Mon Sep 17 00:00:00 2001 From: Michal Wilczynski Date: Fri, 22 Aug 2025 00:20:16 +0200 Subject: dt-bindings: gpu: img,powervr-rogue: Add TH1520 GPU support Rework the PowerVR Rogue GPU binding to use an explicit, per variant style for defining power domain properties and add support for the T-HEAD TH1520 SoC's GPU. To improve clarity and precision, the binding is refactored so that power domain items are listed explicitly for each variant [1]. The previous method relied on an implicit, positional mapping between the `power-domains` and `power-domain-names` properties. This change replaces the generic rules with self contained if/then blocks for each GPU variant, making the relationship between power domains and their names explicit and unambiguous. The generic if block for img,img-rogue, which previously required power-domains and power-domain-names for all variants, is removed. Instead, each specific GPU variant now defines its own power domain requirements within a self-contained if/then block, making the schema more explicit. This new structure is then used to add support for the `thead,th1520-gpu`. While its BXM-4-64 IP has two conceptual power domains, the TH1520 SoC integrates them behind a single power gate. The new binding models this with a specific rule that enforces a single `power-domains` entry and disallows the `power-domain-names` property. Link: https://lore.kernel.org/all/4d79c8dd-c5fb-442c-ac65-37e7176b0cdd@linaro.org/ [1] Reviewed-by: Krzysztof Kozlowski Reviewed-by: Matt Coster Reviewed-by: Ulf Hansson Signed-off-by: Michal Wilczynski Link: https://lore.kernel.org/r/20250822-apr_14_for_sending-v13-2-af656f7cc6c3@samsung.com Signed-off-by: Matt Coster --- .../devicetree/bindings/gpu/img,powervr-rogue.yaml | 37 +++++++++++++++++----- 1 file changed, 29 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml index 4450e2e73b3c..c87d7bece0ec 100644 --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml @@ -21,6 +21,11 @@ properties: # work with newer dts. - const: img,img-axe - const: img,img-rogue + - items: + - enum: + - thead,th1520-gpu + - const: img,img-bxm-4-64 + - const: img,img-rogue - items: - enum: - ti,j721s2-gpu @@ -77,14 +82,18 @@ required: additionalProperties: false allOf: - # Constraints added alongside the new compatible strings that would otherwise - # create an ABI break. - if: properties: compatible: contains: - const: img,img-rogue + const: img,img-axe-1-16m then: + properties: + power-domains: + items: + - description: Power domain A + power-domain-names: + maxItems: 1 required: - power-domains - power-domain-names @@ -93,13 +102,20 @@ allOf: properties: compatible: contains: - const: img,img-axe-1-16m + const: thead,th1520-gpu then: properties: + clocks: + minItems: 3 + clock-names: + minItems: 3 power-domains: - maxItems: 1 - power-domain-names: - maxItems: 1 + items: + - description: The single, unified power domain for the GPU on the + TH1520 SoC, integrating all internal IP power domains. + power-domain-names: false + required: + - power-domains - if: properties: @@ -109,9 +125,14 @@ allOf: then: properties: power-domains: - minItems: 2 + items: + - description: Power domain A + - description: Power domain B power-domain-names: minItems: 2 + required: + - power-domains + - power-domain-names - if: properties: -- cgit v1.2.3 From 2596e9414e5f5917070a6c524d8e307234d3cc18 Mon Sep 17 00:00:00 2001 From: Marcus Folkesson Date: Mon, 21 Jul 2025 12:43:32 +0200 Subject: dt-bindings: display: sitronix,st7571: add optional inverted property Depending on which display that is connected to the controller, an "1" means either a black or a white pixel. The supported formats (R1/R2/XRGB8888) expects the pixels to map against (4bit): 00 => Black 01 => Dark Gray 10 => Light Gray 11 => White If this is not what the display map against, the controller has support to invert these values. Reviewed-by: Javier Martinez Canillas Signed-off-by: Marcus Folkesson Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250721-st7571-format-v2-2-159f4134098c@gmail.com Signed-off-by: Javier Martinez Canillas --- Documentation/devicetree/bindings/display/sitronix,st7571.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/sitronix,st7571.yaml b/Documentation/devicetree/bindings/display/sitronix,st7571.yaml index 4fea782fccd7..b83721eb4b7f 100644 --- a/Documentation/devicetree/bindings/display/sitronix,st7571.yaml +++ b/Documentation/devicetree/bindings/display/sitronix,st7571.yaml @@ -28,6 +28,11 @@ properties: description: Display supports 4-level grayscale. + sitronix,inverted: + type: boolean + description: + Display pixels are inverted, i.e. 0 is white and 1 is black. + reset-gpios: true width-mm: true height-mm: true -- cgit v1.2.3 From c68f78ae1d86a5eb9632b72f7b4f15912bff5b0f Mon Sep 17 00:00:00 2001 From: Marcus Folkesson Date: Mon, 21 Jul 2025 12:43:33 +0200 Subject: dt-bindings: display: sitronix,st7567: add optional inverted property Depending on which display that is connected to the controller, an "1" means either a black or a white pixel. The supported format (R1) expects the pixels to map against: 0 => Black 1 => White If this is not what the display map against, the controller has support to invert these values. Signed-off-by: Marcus Folkesson Reviewed-by: Rob Herring (Arm) Reviewed-by: Javier Martinez Canillas Link: https://lore.kernel.org/r/20250721-st7571-format-v2-3-159f4134098c@gmail.com Signed-off-by: Javier Martinez Canillas --- Documentation/devicetree/bindings/display/sitronix,st7567.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/sitronix,st7567.yaml b/Documentation/devicetree/bindings/display/sitronix,st7567.yaml index e8a5b8ad18fe..2eb6d00b5a25 100644 --- a/Documentation/devicetree/bindings/display/sitronix,st7567.yaml +++ b/Documentation/devicetree/bindings/display/sitronix,st7567.yaml @@ -23,6 +23,11 @@ properties: reg: maxItems: 1 + sitronix,inverted: + type: boolean + description: + Display pixels are inverted, i.e. 0 is white and 1 is black. + width-mm: true height-mm: true panel-timing: true -- cgit v1.2.3 From 8dbb1779ae22e5cd84d807b7023d29791f892a02 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 1 Sep 2025 15:21:21 +0200 Subject: docs: kernel_include.py: fix an issue when O= is used As reported by Stephen, building docs with O= is now broken. Fix it by ensuring that it will seek files under Kernel source tree. The original logic was defined to accept including files under Documentation/output. The new logic doesn't need it anymore for media, but it might still be useful to preserve the previous behavior. So, I ended preserving it. Reported-by: Stephen Rothwell Closes: https://lore.kernel.org/all/20250901142639.4de35a11@canb.auug.org.au/ Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/da91980ce42f31730dc982920167b2757b9d2769.1756732363.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kernel_include.py | 44 ++++++++++++++++++++++++++++++---- 1 file changed, 39 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py index 23566ab74866..661ed978bed8 100755 --- a/Documentation/sphinx/kernel_include.py +++ b/Documentation/sphinx/kernel_include.py @@ -314,15 +314,49 @@ class KernelInclude(Directive): def run(self): """Include a file as part of the content of this reST file.""" env = self.state.document.settings.env - path = os.path.realpath(os.path.expandvars(self.arguments[0])) - # to get a bit security back, prohibit /etc: - if path.startswith(os.sep + "etc"): - raise self.severe('Problems with "%s" directive, prohibited path: %s' % - (self.name, path)) + # + # The include logic accepts only patches relative to: + # - Kernel source tree + # - Documentation output directory + # + # The logic does check it to prevent directory traverse + # + + srctree = os.path.abspath(os.environ["srctree"]) + + path = os.path.expandvars(self.arguments[0]) + src_path = os.path.join(srctree, path) + + if os.path.isfile(src_path): + base = srctree + path = src_path + elif os.path.exists(arg): + # Allow patches from output dir + base = os.getcwd() + path = os.path.abspath(path) + else: + raise self.warning(f'File "%s" doesn\'t exist', path) + + abs_base = os.path.abspath(base) + abs_full_path = os.path.abspath(os.path.join(base, path)) + + try: + if os.path.commonpath([abs_full_path, abs_base]) != abs_base: + raise self.severe('Problems with "%s" directive, prohibited path: %s' % + (self.name, path)) + except ValueError: + # Paths don't have the same drive (Windows) or other incompatibility + raise self.severe('Problems with "%s" directive, invalid path: %s' % + (self.name, path)) self.arguments[0] = path + # + # Add path location to Sphinx dependencies to ensure proper cache + # invalidation check. + # + env.note_dependency(os.path.abspath(path)) # HINT: I had to copy&paste the whole Include.run method. I'am not happy -- cgit v1.2.3 From 118e54633ca894748f300c0f582f4ae1b6254f8d Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 1 Sep 2025 15:21:22 +0200 Subject: docs: kernel_include.py: drop some old behavior The old behavior is not using anymore, so let's drop it. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/00cdf3cbe2481aac875c543ded14b5eacfe071ec.1756732363.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kernel_include.py | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py index 661ed978bed8..2c4bb8215b4c 100755 --- a/Documentation/sphinx/kernel_include.py +++ b/Documentation/sphinx/kernel_include.py @@ -316,11 +316,9 @@ class KernelInclude(Directive): env = self.state.document.settings.env # - # The include logic accepts only patches relative to: - # - Kernel source tree - # - Documentation output directory - # - # The logic does check it to prevent directory traverse + # The include logic accepts only patches relative to the + # Kernel source tree. The logic does check it to prevent + # directory traverse issues. # srctree = os.path.abspath(os.environ["srctree"]) @@ -331,10 +329,6 @@ class KernelInclude(Directive): if os.path.isfile(src_path): base = srctree path = src_path - elif os.path.exists(arg): - # Allow patches from output dir - base = os.getcwd() - path = os.path.abspath(path) else: raise self.warning(f'File "%s" doesn\'t exist', path) @@ -359,11 +353,6 @@ class KernelInclude(Directive): env.note_dependency(os.path.abspath(path)) - # HINT: I had to copy&paste the whole Include.run method. I'am not happy - # with this, but due to security reasons, the Include.run method does - # not allow absolute or relative pathnames pointing to locations *above* - # the filesystem tree where the reST document is placed. - if not self.state.document.settings.file_insertion_enabled: raise self.warning('"%s" directive disabled.' % self.name) source = self.state_machine.input_lines.source(self.lineno - -- cgit v1.2.3 From 3d13e378d465e8ae0be1697005342055b07eaf11 Mon Sep 17 00:00:00 2001 From: Maud Spierings Date: Fri, 22 Aug 2025 11:20:05 +0200 Subject: dt-bindings: phy: ti,tcan104x-can: Document TI TCAN1051 TCAN1051-Q1 Automotive Fault Protected CAN Transceiver with CAN FD It is pretty much identical to the TCAN1042, add the compatible with fallback on the TCAN1042. Signed-off-by: Maud Spierings Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250822-can_phy3-v1-1-73b3ba1690ee@gocontroll.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml b/Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml index 4a8c3829d85d..138923ffedfe 100644 --- a/Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml +++ b/Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml @@ -18,6 +18,7 @@ properties: - items: - enum: - microchip,ata6561 + - ti,tcan1051 - const: ti,tcan1042 - enum: - ti,tcan1042 -- cgit v1.2.3 From 63727c59a917b6ffdb13d51c251727a3e21d38d9 Mon Sep 17 00:00:00 2001 From: Jens Glathe Date: Fri, 22 Aug 2025 08:44:10 +0200 Subject: dt-bindings: arm: qcom: Add Lenovo TB16 support Document the x1p-42-100/x1-26-100 variants of the Thinkbook 16 G7 QOY. [1]: https://psref.lenovo.com/syspool/Sys/PDF/ThinkBook/ThinkBook_16_G7_QOY/ThinkBook_16_G7_QOY_Spec.pdf Acked-by: Rob Herring (Arm) Signed-off-by: Jens Glathe Link: https://lore.kernel.org/r/20250822-tb16-dt-v12-1-bab6c2986351@oldschoolsolutions.biz Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index fa929698229e..f0a6f6f7b839 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1066,6 +1066,7 @@ properties: - items: - enum: - asus,zenbook-a14-ux3407qa + - lenovo,thinkbook-16 - qcom,x1p42100-crd - const: qcom,x1p42100 -- cgit v1.2.3 From 5fa902fb5716f419915fdb11c6b7e62f5ba7d14f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Eric=20Gon=C3=A7alves?= Date: Fri, 15 Aug 2025 15:14:25 +0000 Subject: dt-bindings: arm: qcom: document r8q board binding MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add binding for the Samsung Galaxy S20 FE 4G/5G (SM-G980/SM-G981B) board, codenamed R8Q, which is based on the Qualcomm Snapdragon 865 SoC. Signed-off-by: Eric Gonçalves Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250815151426.32023-2-ghatto404@gmail.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index f0a6f6f7b839..520e355d9cc9 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -981,6 +981,7 @@ properties: - qcom,qrb5165-rb5 - qcom,sm8250-hdk - qcom,sm8250-mtp + - samsung,r8q - sony,pdx203-generic - sony,pdx206-generic - xiaomi,elish -- cgit v1.2.3 From 922e16d1770624e25e2c751a257c88690f121b1c Mon Sep 17 00:00:00 2001 From: Cristian Cozzolino Date: Mon, 11 Aug 2025 23:08:09 +0200 Subject: dt-bindings: vendor-prefixes: Add Flipkart Add Flipkart to the vendor prefixes. Acked-by: Rob Herring (Arm) Signed-off-by: Cristian Cozzolino Link: https://lore.kernel.org/r/20250811-rimob-initial-devicetree-v4-1-b3194f14aa33@protonmail.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 77160cd47f54..b60957808e5f 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -548,6 +548,8 @@ patternProperties: description: Foxconn Industrial Internet "^firefly,.*": description: Firefly + "^flipkart,.*": + description: Flipkart Inc. "^focaltech,.*": description: FocalTech Systems Co.,Ltd "^forlinx,.*": -- cgit v1.2.3 From ba4857cc649a7a113252e849fbf12bc282399480 Mon Sep 17 00:00:00 2001 From: Cristian Cozzolino Date: Mon, 11 Aug 2025 23:08:10 +0200 Subject: dt-bindings: arm: qcom: Add Billion Capture+ Billion Capture+ (flipkart,rimob) is a smartphone based on Qualcomm Snapdragon 625 (MSM8953). Acked-by: Rob Herring (Arm) Signed-off-by: Cristian Cozzolino Link: https://lore.kernel.org/r/20250811-rimob-initial-devicetree-v4-2-b3194f14aa33@protonmail.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 520e355d9cc9..1221fb5f0665 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -187,6 +187,7 @@ properties: - items: - enum: + - flipkart,rimob - motorola,potter - xiaomi,daisy - xiaomi,mido -- cgit v1.2.3 From f116ec4e149e2b8a36579284af7b0630d7f57723 Mon Sep 17 00:00:00 2001 From: Bryan O'Donoghue Date: Tue, 15 Jul 2025 21:26:57 -0300 Subject: dt-bindings: arm: qcom: Add Dell Inspiron 14 Plus 7441 Document the X1E80100-based Dell Inspiron 14 Plus 7441 laptop, codename: Thena. Signed-off-by: Bryan O'Donoghue Acked-by: Krzysztof Kozlowski Signed-off-by: Val Packett Reviewed-by: Laurentiu Tudor Tested-by: Bryan O'Donoghue Link: https://lore.kernel.org/r/20250716003139.18543-2-val@packett.cool Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 1221fb5f0665..1fc6319bec6b 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1054,6 +1054,7 @@ properties: - enum: - asus,vivobook-s15 - asus,zenbook-a14-ux3407ra + - dell,inspiron-14-plus-7441 - dell,latitude-7455 - dell,xps13-9345 - hp,elitebook-ultra-g1q -- cgit v1.2.3 From faeb2bede83475fc74230d4ee4f4cc126eb6a444 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Thu, 28 Aug 2025 15:11:07 +0200 Subject: dt-bindings: soc: rockchip: add missing clock reference for rk3576-dcphy syscon The rk3576 mipi dcphy syscon controls a clock, so needs to allow the clock property. Add the missing entry in the list for it. Fixes: 0e3f3d7c7ae3 ("dt-bindings: soc: rockchip: add rk3576 mipi dcphy syscon") Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202508271156.z3wDB6bX-lkp@intel.com/ Acked-by: Conor Dooley Signed-off-by: Heiko Stuebner Link: https://lore.kernel.org/r/20250828131107.3531769-1-heiko@sntech.de --- Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml index 6a94c271a6b1..1d0f35e26311 100644 --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml @@ -301,6 +301,7 @@ allOf: compatible: contains: enum: + - rockchip,rk3576-dcphy-grf - rockchip,rk3576-vo1-grf - rockchip,rk3588-vo-grf - rockchip,rk3588-vo0-grf -- cgit v1.2.3 From af13e0089e98a135757ae46f6f9d5a96d33af840 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Thu, 17 Jul 2025 10:37:03 +0000 Subject: dt-bindings: arm: rockchip: Add Radxa ROCK 2A/2F The ROCK 2A and ROCK 2F is a high-performance single board computer developed by Radxa, based on the Rockchip RK3528A SoC. Add devicetree binding documentation for the Radxa ROCK 2A and ROCK 2F boards. Signed-off-by: Jonas Karlman Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250717103720.2853031-2-jonas@kwiboo.se Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 870c318fc8d4..9c34630c11de 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -888,6 +888,13 @@ properties: - const: radxa,rock - const: rockchip,rk3188 + - description: Radxa ROCK 2A/2F + items: + - enum: + - radxa,rock-2a + - radxa,rock-2f + - const: rockchip,rk3528 + - description: Radxa ROCK Pi 4A/A+/B/B+/C items: - enum: -- cgit v1.2.3 From 10e6b1caacb85bb41cacb9271cdb794ae323ee52 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Thu, 17 Jul 2025 10:37:05 +0000 Subject: dt-bindings: arm: rockchip: Add ArmSoM Sige1 The Sige1 is a single board computer developed by ArmSoM, based on the Rockchip RK3528A SoC. Add devicetree binding documentation for the ArmSoM Sige1 board. Signed-off-by: Jonas Karlman Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250717103720.2853031-4-jonas@kwiboo.se Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 9c34630c11de..ab4f0512da43 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -54,6 +54,11 @@ properties: - const: ariaboard,photonicat - const: rockchip,rk3568 + - description: ArmSoM Sige1 board + items: + - const: armsom,sige1 + - const: rockchip,rk3528 + - description: ArmSoM Sige5 board items: - const: armsom,sige5 -- cgit v1.2.3 From 11100e8f407e99adac2d311803540540b9726699 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Thu, 17 Jul 2025 10:37:07 +0000 Subject: dt-bindings: arm: rockchip: Add FriendlyElec NanoPi Zero2 The NanoPi Zero2 is small single board computer developed by FriendlyElec, based on the Rockchip RK3528A SoC. Add devicetree binding documentation for the FriendlyElec NanoPi Zero2 board. Signed-off-by: Jonas Karlman Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250717103720.2853031-6-jonas@kwiboo.se Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index ab4f0512da43..f9ee77f17ad7 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -325,6 +325,11 @@ properties: - friendlyarm,nanopi-r6s - const: rockchip,rk3588s + - description: FriendlyElec NanoPi Zero2 + items: + - const: friendlyarm,nanopi-zero2 + - const: rockchip,rk3528 + - description: FriendlyElec NanoPC T6 series boards items: - enum: -- cgit v1.2.3 From d5df661c9c76cb36d90527349ac6197a4baf2aba Mon Sep 17 00:00:00 2001 From: Abin Joseph Date: Mon, 25 Aug 2025 18:34:23 +0530 Subject: dt-bindings: dmaengine: xilinx_dma: Remove DMA client properties Remove DMA client section mentioned in the dt-bindings as it is not required to document client bindings in dmaengine bindings. Signed-off-by: Abin Joseph Signed-off-by: Radhey Shyam Pandey Acked-by: Rob Herring Signed-off-by: Abin Joseph Link: https://lore.kernel.org/r/20250825130423.5739-1-abin.joseph@amd.com Signed-off-by: Vinod Koul --- .../devicetree/bindings/dma/xilinx/xilinx_dma.txt | 23 ---------------------- 1 file changed, 23 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt index 590d1948f202..b567107270cb 100644 --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt @@ -109,26 +109,3 @@ axi_vdma_0: axivdma@40030000 { xlnx,datawidth = <0x40>; } ; } ; - - -* DMA client - -Required properties: -- dmas: a list of <[Video DMA device phandle] [Channel ID]> pairs, - where Channel ID is '0' for write/tx and '1' for read/rx - channel. For MCMDA, MM2S channel(write/tx) ID start from - '0' and is in [0-15] range. S2MM channel(read/rx) ID start - from '16' and is in [16-31] range. These channels ID are - fixed irrespective of IP configuration. - -- dma-names: a list of DMA channel names, one per "dmas" entry - -Example: -++++++++ - -vdmatest_0: vdmatest@0 { - compatible ="xlnx,axi-vdma-test-1.00.a"; - dmas = <&axi_vdma_0 0 - &axi_vdma_0 1>; - dma-names = "vdma0", "vdma1"; -} ; -- cgit v1.2.3 From 39ce725e621b256188550492b4b53fb02bfc872e Mon Sep 17 00:00:00 2001 From: Guodong Xu Date: Fri, 22 Aug 2025 11:06:27 +0800 Subject: dt-bindings: dma: Add SpacemiT K1 PDMA controller Add device tree binding documentation for the SpacemiT K1 PDMA controller. Signed-off-by: Guodong Xu Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250822-working_dma_0701_v2-v5-1-f5c0eda734cc@riscstar.com Signed-off-by: Vinod Koul --- .../devicetree/bindings/dma/spacemit,k1-pdma.yaml | 68 ++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/spacemit,k1-pdma.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/dma/spacemit,k1-pdma.yaml b/Documentation/devicetree/bindings/dma/spacemit,k1-pdma.yaml new file mode 100644 index 000000000000..ec06235baf5c --- /dev/null +++ b/Documentation/devicetree/bindings/dma/spacemit,k1-pdma.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/spacemit,k1-pdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SpacemiT K1 PDMA Controller + +maintainers: + - Guodong Xu + +allOf: + - $ref: dma-controller.yaml# + +properties: + compatible: + const: spacemit,k1-pdma + + reg: + maxItems: 1 + + interrupts: + description: Shared interrupt for all DMA channels + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + dma-channels: + maximum: 16 + + '#dma-cells': + const: 1 + description: + The DMA request number for the peripheral device. + +required: + - compatible + - reg + - interrupts + - clocks + - resets + - dma-channels + - '#dma-cells' + +unevaluatedProperties: false + +examples: + - | + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + dma-controller@d4000000 { + compatible = "spacemit,k1-pdma"; + reg = <0x0 0xd4000000 0x0 0x4000>; + interrupts = <72>; + clocks = <&syscon_apmu CLK_DMA>; + resets = <&syscon_apmu RESET_DMA>; + dma-channels = <16>; + #dma-cells = <1>; + }; + }; -- cgit v1.2.3 From cc0bacac6de7763a038550cf43cb94634d8be9cd Mon Sep 17 00:00:00 2001 From: Tommaso Merciai Date: Fri, 1 Aug 2025 10:48:22 +0200 Subject: dt-bindings: dma: rz-dmac: Document RZ/G3E family of SoCs The DMAC block on the RZ/G3E SoC is identical to the one found on the RZ/V2H(P) SoC. No driver changes are required, as `renesas,r9a09g057-dmac` will be used as a fallback compatible string on the RZ/G3E SoC. Signed-off-by: Tommaso Merciai Acked-by: Conor Dooley Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20250801084825.471011-3-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml index 92b12762c472..f891cfcc48c7 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml @@ -21,6 +21,11 @@ properties: - renesas,r9a08g045-dmac # RZ/G3S - const: renesas,rz-dmac + - items: + - enum: + - renesas,r9a09g047-dmac # RZ/G3E + - const: renesas,r9a09g057-dmac + - const: renesas,r9a09g057-dmac # RZ/V2H(P) reg: -- cgit v1.2.3 From 931c93119d7228f0fd08dc8dfc229d438aacfc11 Mon Sep 17 00:00:00 2001 From: Yuanfang Zhang Date: Thu, 10 Jul 2025 13:27:20 +0800 Subject: dt-bindings: arm: Add device Trace Network On Chip definition Add a new coresight-tnoc.yaml file to describe the bindings required to define Trace Network On Chip (TNOC) in device trees. TNOC is an integration hierarchy which is a hardware component that integrates the functionalities of TPDA and funnels. It collects trace form subsystems and transfers to coresight sink. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Yuanfang Zhang Reviewed-by: Mike Leach Signed-off-by: Suzuki K Poulose Link: https://lore.kernel.org/r/20250710-trace-noc-v11-1-f849075c40b8@quicinc.com --- .../bindings/arm/qcom,coresight-tnoc.yaml | 113 +++++++++++++++++++++ 1 file changed, 113 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml new file mode 100644 index 000000000000..9d1c93a9ade3 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/qcom,coresight-tnoc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Trace Network On Chip - TNOC + +maintainers: + - Yuanfang Zhang + +description: > + The Trace Network On Chip (TNOC) is an integration hierarchy hardware + component that integrates the functionalities of TPDA and funnels. + + It sits in the different subsystem of SOC and aggregates the trace and + transports it to Aggregation TNOC or to coresight trace sink eventually. + TNOC embeds bridges for all the interfaces APB, ATB, TPDA and NTS (Narrow + Time Stamp). + + TNOC can take inputs from different trace sources i.e. ATB, TPDM. + + Note this binding is specifically intended for Aggregator TNOC instances. + +# Need a custom select here or 'arm,primecell' will match on lots of nodes +select: + properties: + compatible: + contains: + enum: + - qcom,coresight-tnoc + required: + - compatible + +properties: + $nodename: + pattern: "^tn(@[0-9a-f]+)$" + + compatible: + items: + - const: qcom,coresight-tnoc + - const: arm,primecell + + reg: + maxItems: 1 + + clock-names: + items: + - const: apb_pclk + + clocks: + items: + - description: APB register access clock + + in-ports: + $ref: /schemas/graph.yaml#/properties/ports + + patternProperties: + '^port(@[0-9a-f]{1,2})?$': + description: Input connections from CoreSight Trace Bus + $ref: /schemas/graph.yaml#/properties/port + + out-ports: + $ref: /schemas/graph.yaml#/properties/ports + additionalProperties: false + + properties: + port: + description: + Output connection to CoreSight Trace Bus + $ref: /schemas/graph.yaml#/properties/port + +required: + - compatible + - reg + - clocks + - clock-names + - in-ports + - out-ports + +additionalProperties: false + +examples: + - | + tn@109ab000 { + compatible = "qcom,coresight-tnoc", "arm,primecell"; + reg = <0x109ab000 0x4200>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + tn_ag_in_tpdm_gcc: endpoint { + remote-endpoint = <&tpdm_gcc_out_tn_ag>; + }; + }; + }; + + out-ports { + port { + tn_ag_out_funnel_in1: endpoint { + remote-endpoint = <&funnel_in1_in_tn_ag>; + }; + }; + }; + }; +... -- cgit v1.2.3 From 6186e80a7440e0f9f45de6275b7f495ea11bd72c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 30 Aug 2025 19:01:10 +0200 Subject: dt-bindings: mtd samsung-s3c2410: Drop S3C2410 support Samsung S3C24xx family of SoCs was removed from the Linux kernel in the commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January 2023. There are no in-kernel users of its compatibles. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) Signed-off-by: Miquel Raynal --- .../devicetree/bindings/mtd/samsung-s3c2410.txt | 56 ---------------------- 1 file changed, 56 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt b/Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt deleted file mode 100644 index 635455350660..000000000000 --- a/Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt +++ /dev/null @@ -1,56 +0,0 @@ -* Samsung S3C2410 and compatible NAND flash controller - -Required properties: -- compatible : The possible values are: - "samsung,s3c2410-nand" - "samsung,s3c2412-nand" - "samsung,s3c2440-nand" -- reg : register's location and length. -- #address-cells, #size-cells : see nand-controller.yaml -- clocks : phandle to the nand controller clock -- clock-names : must contain "nand" - -Optional child nodes: -Child nodes representing the available nand chips. - -Optional child properties: -- nand-ecc-mode : see nand-controller.yaml -- nand-on-flash-bbt : see nand-controller.yaml - -Each child device node may optionally contain a 'partitions' sub-node, -which further contains sub-nodes describing the flash partition mapping. -See mtd.yaml for more detail. - -Example: - -nand-controller@4e000000 { - compatible = "samsung,s3c2440-nand"; - reg = <0x4e000000 0x40>; - - #address-cells = <1>; - #size-cells = <0>; - - clocks = <&clocks HCLK_NAND>; - clock-names = "nand"; - - nand { - nand-ecc-mode = "soft"; - nand-on-flash-bbt; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0 0x040000>; - }; - - partition@40000 { - label = "kernel"; - reg = <0x040000 0x500000>; - }; - }; - }; -}; -- cgit v1.2.3 From b3c7ab1d2593213c2d3339830b3950a689e83867 Mon Sep 17 00:00:00 2001 From: Miklos Szeredi Date: Mon, 1 Sep 2025 10:43:50 +0200 Subject: fuse: fix references to fuse.rst -> fuse/fuse.rst Commit 6be0ddb20200 ("Documentation: fuse: Consolidate FUSE docs into its own subdirectory") moved fuse docs to a subdirectory but didn't update references inside the kernel tree. Fixes: 6be0ddb20200 ("Documentation: fuse: Consolidate FUSE docs into its own subdirectory") Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202508261621.EaNMWVjm-lkp@intel.com/ Signed-off-by: Miklos Szeredi --- Documentation/filesystems/sysfs.rst | 2 +- Documentation/translations/zh_CN/filesystems/sysfs.txt | 2 +- Documentation/translations/zh_TW/filesystems/sysfs.txt | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/sysfs.rst b/Documentation/filesystems/sysfs.rst index c32993bc83c7..be966f27f284 100644 --- a/Documentation/filesystems/sysfs.rst +++ b/Documentation/filesystems/sysfs.rst @@ -321,7 +321,7 @@ span multiple bus types). fs/ contains a directory for some filesystems. Currently each filesystem wanting to export attributes must create its own hierarchy -below fs/ (see ./fuse.rst for an example). +below fs/ (see fuse/fuse.rst for an example). module/ contains parameter values and state information for all loaded system modules, for both builtin and loadable modules. diff --git a/Documentation/translations/zh_CN/filesystems/sysfs.txt b/Documentation/translations/zh_CN/filesystems/sysfs.txt index 547062759e60..b17c9f638628 100644 --- a/Documentation/translations/zh_CN/filesystems/sysfs.txt +++ b/Documentation/translations/zh_CN/filesystems/sysfs.txt @@ -282,7 +282,7 @@ drivers/ 包含了每个已为特定总线上的设备而挂载的驱动程序 假定驱动没有跨越多个总线类型)。 fs/ 包含了一个为文件系统设立的目录。现在每个想要导出属性的文件系统必须 -在 fs/ 下创建自己的层次结构(参见Documentation/filesystems/fuse.rst)。 +在 fs/ 下创建自己的层次结构(参见Documentation/filesystems/fuse/fuse.rst)。 dev/ 包含两个子目录： char/ 和 block/。在这两个子目录中，有以 : 格式命名的符号链接。这些符号链接指向 sysfs 目录 diff --git a/Documentation/translations/zh_TW/filesystems/sysfs.txt b/Documentation/translations/zh_TW/filesystems/sysfs.txt index 978462d5fe14..d1cee02ef1de 100644 --- a/Documentation/translations/zh_TW/filesystems/sysfs.txt +++ b/Documentation/translations/zh_TW/filesystems/sysfs.txt @@ -285,7 +285,7 @@ drivers/ 包含了每個已爲特定總線上的設備而掛載的驅動程序 假定驅動沒有跨越多個總線類型)。 fs/ 包含了一個爲文件系統設立的目錄。現在每個想要導出屬性的文件系統必須 -在 fs/ 下創建自己的層次結構(參見Documentation/filesystems/fuse.rst)。 +在 fs/ 下創建自己的層次結構(參見Documentation/filesystems/fuse/fuse.rst)。 dev/ 包含兩個子目錄： char/ 和 block/。在這兩個子目錄中，有以 : 格式命名的符號鏈接。這些符號鏈接指向 sysfs 目錄 -- cgit v1.2.3 From 1557c2eb023d9cdf97b4686fd206048c070d4e70 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 30 Aug 2025 13:32:54 +0200 Subject: dt-bindings: arm: samsung: Drop S3C2416 Samsung S3C24xx family of SoCs was removed from the Linux kernel in the commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January 2023. There are no in-kernel users of remaining S3C24xx compatibles. Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250830113253.131974-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml | 6 ------ 1 file changed, 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml index 26fe899badc5..f8e20e602c20 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml @@ -14,12 +14,6 @@ properties: const: '/' compatible: oneOf: - - description: S3C2416 based boards - items: - - enum: - - samsung,smdk2416 # Samsung SMDK2416 - - const: samsung,s3c2416 - - description: S3C6410 based boards items: - enum: -- cgit v1.2.3 From fe49652e36bb4337330d24dce7d571a49f824605 Mon Sep 17 00:00:00 2001 From: Aleksa Sarai Date: Tue, 5 Aug 2025 15:45:09 +1000 Subject: procfs: add "pidns" mount option Since the introduction of pid namespaces, their interaction with procfs has been entirely implicit in ways that require a lot of dancing around by programs that need to construct sandboxes with different PID namespaces. Being able to explicitly specify the pid namespace to use when constructing a procfs super block will allow programs to no longer need to fork off a process which does then does unshare(2) / setns(2) and forks again in order to construct a procfs in a pidns. So, provide a "pidns" mount option which allows such users to just explicitly state which pid namespace they want that procfs instance to use. This interface can be used with fsconfig(2) either with a file descriptor or a path: fsconfig(procfd, FSCONFIG_SET_FD, "pidns", NULL, nsfd); fsconfig(procfd, FSCONFIG_SET_STRING, "pidns", "/proc/self/ns/pid", 0); or with classic mount(2) / mount(8): // mount -t proc -o pidns=/proc/self/ns/pid proc /tmp/proc mount("proc", "/tmp/proc", "proc", MS_..., "pidns=/proc/self/ns/pid"); As this new API is effectively shorthand for setns(2) followed by mount(2), the permission model for this mirrors pidns_install() to avoid opening up new attack surfaces by loosening the existing permission model. In order to avoid having to RCU-protect all users of proc_pid_ns() (to avoid UAFs), attempting to reconfigure an existing procfs instance's pid namespace will error out with -EBUSY. Creating new procfs instances is quite cheap, so this should not be an impediment to most users, and lets us avoid a lot of churn in fs/proc/* for a feature that it seems unlikely userspace would use. Signed-off-by: Aleksa Sarai Link: https://lore.kernel.org/20250805-procfs-pidns-api-v4-2-705f984940e7@cyphar.com Signed-off-by: Christian Brauner --- Documentation/filesystems/proc.rst | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/proc.rst b/Documentation/filesystems/proc.rst index 2971551b7235..b7e3147ba3d4 100644 --- a/Documentation/filesystems/proc.rst +++ b/Documentation/filesystems/proc.rst @@ -2362,6 +2362,7 @@ The following mount options are supported: hidepid= Set /proc// access mode. gid= Set the group authorized to learn processes information. subset= Show only the specified subset of procfs. + pidns= Specify a the namespace used by this procfs. ========= ======================================================== hidepid=off or hidepid=0 means classic mode - everybody may access all @@ -2394,6 +2395,13 @@ information about processes information, just add identd to this group. subset=pid hides all top level files and directories in the procfs that are not related to tasks. +pidns= specifies a pid namespace (either as a string path to something like +`/proc/$pid/ns/pid`, or a file descriptor when using `FSCONFIG_SET_FD`) that +will be used by the procfs instance when translating pids. By default, procfs +will use the calling process's active pid namespace. Note that the pid +namespace of an existing procfs instance cannot be modified (attempting to do +so will give an `-EBUSY` error). + Chapter 5: Filesystem behavior ============================== -- cgit v1.2.3 From 19c5010e8ae23faf7b98fd738ff9970bb9066b78 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 11 Aug 2025 15:54:03 +0200 Subject: dt-bindings: leds: issi,is31fl319x: Drop 'db' suffix duplicating dtschema A common property unit suffix '-db' was added to dtschema, thus in-kernel bindings should not reference the type. Signed-off-by: Krzysztof Kozlowski Acked-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250811-dt-bindings-db-v1-1-457301523bb5@linaro.org Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml b/Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml index 3c0431c51159..906735acfbaf 100644 --- a/Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml +++ b/Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml @@ -42,7 +42,6 @@ properties: description: GPIO attached to the SDB pin. audio-gain-db: - $ref: /schemas/types.yaml#/definitions/uint32 default: 0 description: Audio gain selection for external analog modulation input. enum: [0, 3, 6, 9, 12, 15, 18, 21] -- cgit v1.2.3 From d37db94b078197ec4be1cadebbfd7bf144e3c5e4 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 30 Aug 2025 13:16:59 +0200 Subject: dt-bindings: pinctrl: samsung: Drop S3C2410 Samsung S3C24xx family of SoCs was removed the Linux kernel in the commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January 2023. There are no in-kernel users of remaining S3C24xx compatibles. Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250830111657.126190-4-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- .../pinctrl/samsung,pinctrl-wakeup-interrupt.yaml | 19 +------------------ .../devicetree/bindings/pinctrl/samsung,pinctrl.yaml | 4 ---- 2 files changed, 1 insertion(+), 22 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml index 0da6d69f5991..dd11c73a55da 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml @@ -30,8 +30,6 @@ properties: compatible: oneOf: - enum: - - samsung,s3c2410-wakeup-eint - - samsung,s3c2412-wakeup-eint - samsung,s3c64xx-wakeup-eint - samsung,s5pv210-wakeup-eint - samsung,exynos4210-wakeup-eint @@ -59,27 +57,12 @@ properties: description: Interrupt used by multiplexed external wake-up interrupts. minItems: 1 - maxItems: 6 + maxItems: 4 required: - compatible allOf: - - if: - properties: - compatible: - contains: - enum: - - samsung,s3c2410-wakeup-eint - - samsung,s3c2412-wakeup-eint - then: - properties: - interrupts: - minItems: 6 - maxItems: 6 - required: - - interrupts - - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml index 9386dcd418c2..f1094d65e846 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml @@ -37,10 +37,6 @@ properties: enum: - axis,artpec8-pinctrl - google,gs101-pinctrl - - samsung,s3c2412-pinctrl - - samsung,s3c2416-pinctrl - - samsung,s3c2440-pinctrl - - samsung,s3c2450-pinctrl - samsung,s3c64xx-pinctrl - samsung,s5pv210-pinctrl - samsung,exynos2200-pinctrl -- cgit v1.2.3 From d6900b8bd362b68c66312ea8200bc0c61c4ef542 Mon Sep 17 00:00:00 2001 From: Wei Fang Date: Fri, 29 Aug 2025 13:06:02 +0800 Subject: dt-bindings: ptp: add NETC Timer PTP clock NXP NETC (Ethernet Controller) is a multi-function PCIe Root Complex Integrated Endpoint (RCiEP), the Timer is one of its functions which provides current time with nanosecond resolution, precise periodic pulse, pulse on timeout (alarm), and time capture on external pulse support. And also supports time synchronization as required for IEEE 1588 and IEEE 802.1AS-2020. So add device tree binding doc for the PTP clock based on NETC Timer. NETC Timer has three reference clock sources, but the clock mux is inside the IP. Therefore, the driver will parse the clock name to select the desired clock source. If the clocks property is not present, NETC Timer will use the system clock of NETC IP as its reference clock. Because the Timer is a PCIe function of NETC IP, the system clock of NETC is always available to the Timer. Signed-off-by: Wei Fang Reviewed-by: Frank Li Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250829050615.1247468-2-wei.fang@nxp.com Signed-off-by: Paolo Abeni --- .../devicetree/bindings/ptp/nxp,ptp-netc.yaml | 63 ++++++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 Documentation/devicetree/bindings/ptp/nxp,ptp-netc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ptp/nxp,ptp-netc.yaml b/Documentation/devicetree/bindings/ptp/nxp,ptp-netc.yaml new file mode 100644 index 000000000000..042de9d5a92b --- /dev/null +++ b/Documentation/devicetree/bindings/ptp/nxp,ptp-netc.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ptp/nxp,ptp-netc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP NETC V4 Timer PTP clock + +description: + NETC V4 Timer provides current time with nanosecond resolution, precise + periodic pulse, pulse on timeout (alarm), and time capture on external + pulse support. And it supports time synchronization as required for + IEEE 1588 and IEEE 802.1AS-2020. + +maintainers: + - Wei Fang + - Clark Wang + +properties: + compatible: + enum: + - pci1131,ee02 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + description: + The reference clock of NETC Timer, can be selected between 3 different + clock sources using an integrated hardware mux TMR_CTRL[CK_SEL]. + The "ccm" means the reference clock comes from CCM of SoC. + The "ext" means the reference clock comes from external IO pins. + If not present, indicates that the system clock of NETC IP is selected + as the reference clock. + + clock-names: + enum: + - ccm + - ext + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/pci/pci-device.yaml + +unevaluatedProperties: false + +examples: + - | + pcie { + #address-cells = <3>; + #size-cells = <2>; + + ptp-timer@18,0 { + compatible = "pci1131,ee02"; + reg = <0x00c000 0 0 0 0>; + clocks = <&scmi_clk 18>; + clock-names = "ccm"; + }; + }; -- cgit v1.2.3 From db2d2de1c2a80ba2617246ca1a7b0ffd117e0783 Mon Sep 17 00:00:00 2001 From: Wei Fang Date: Fri, 29 Aug 2025 13:06:03 +0800 Subject: dt-bindings: net: move ptp-timer property to ethernet-controller.yaml For some Ethernet controllers, the PTP timer function is not integrated. Instead, the PTP timer is a separate device and provides PTP Hardware Clock (PHC) to the Ethernet controller to use, such as NXP FMan MAC, ENETC, etc. Therefore, a property is needed to indicate this hardware relationship between the Ethernet controller and the PTP timer. Since this use case is also very common, it is better to add a generic property to ethernet-controller.yaml. According to the existing binding docs, there are two good candidates, one is the "ptp-timer" defined in fsl,fman-dtsec.yaml, and the other is the "ptimer-handle" defined in fsl,fman.yaml. From the perspective of the name, the former is more straightforward, so move the "ptp-timer" from fsl,fman-dtsec.yaml to ethernet-controller.yaml. Signed-off-by: Wei Fang Reviewed-by: Vladimir Oltean Reviewed-by: Frank Li Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250829050615.1247468-3-wei.fang@nxp.com Signed-off-by: Paolo Abeni --- Documentation/devicetree/bindings/net/ethernet-controller.yaml | 5 +++++ Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml | 4 ---- 2 files changed, 5 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml index 66b1cfbbfe22..2c924d296a8f 100644 --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -108,6 +108,11 @@ properties: $ref: "#/properties/phy-handle" deprecated: true + ptp-timer: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Specifies a reference to a node representing an IEEE 1588 PTP device. + rx-fifo-depth: $ref: /schemas/types.yaml#/definitions/uint32 description: diff --git a/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml b/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml index 60aaf30d68ed..ef1e30a48c91 100644 --- a/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml +++ b/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml @@ -81,10 +81,6 @@ properties: An array of two references: the first is the FMan RX port and the second is the TX port used by this MAC. - ptp-timer: - $ref: /schemas/types.yaml#/definitions/phandle - description: A reference to the IEEE1588 timer - phys: description: A reference to the SerDes lane(s) maxItems: 1 -- cgit v1.2.3 From 23a6037ce76cb44d93cfea23aec5c7f3971227d4 Mon Sep 17 00:00:00 2001 From: Jay Vosburgh Date: Fri, 29 Aug 2025 17:08:37 -0700 Subject: bonding: Remove support for use_carrier Remove the implementation of use_carrier, the link monitoring method that utilizes ethtool or ioctl to determine the link state of an interface in a bond. Bonding will always behaves as if use_carrier=1, which relies on netif_carrier_ok() to determine the link state of interfaces. To avoid acquiring RTNL many times per second, bonding inspects link state under RCU, but not under RTNL. However, ethtool implementations in drivers may sleep, and therefore this strategy is unsuitable for use with calls into driver ethtool functions. The use_carrier option was introduced in 2003, to provide backwards compatibility for network device drivers that did not support the then-new netif_carrier_ok/on/off system. Device drivers are now expected to support netif_carrier_*, and the use_carrier backwards compatibility logic is no longer necessary. The option itself remains, but when queried always returns 1, and may only be set to 1. Link: https://lore.kernel.org/000000000000eb54bf061cfd666a@google.com Link: https://lore.kernel.org/20240718122017.d2e33aaac43a.I10ab9c9ded97163aef4e4de10985cd8f7de60d28@changeid Signed-off-by: Jay Vosburgh Reported-by: syzbot+b8c48ea38ca27d150063@syzkaller.appspotmail.com Acked-by: Stanislav Fomichev Link: https://patch.msgid.link/2029487.1756512517@famine Signed-off-by: Jakub Kicinski --- Documentation/networking/bonding.rst | 79 ++++++------------------------------ 1 file changed, 12 insertions(+), 67 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/bonding.rst b/Documentation/networking/bonding.rst index f8f5766703d4..a2b42ae719d2 100644 --- a/Documentation/networking/bonding.rst +++ b/Documentation/networking/bonding.rst @@ -582,10 +582,8 @@ miimon This determines how often the link state of each slave is inspected for link failures. A value of zero disables MII link monitoring. A value of 100 is a good starting point. - The use_carrier option, below, affects how the link state is - determined. See the High Availability section for additional - information. The default value is 100 if arp_interval is not - set. + + The default value is 100 if arp_interval is not set. min_links @@ -896,25 +894,14 @@ updelay use_carrier - Specifies whether or not miimon should use MII or ETHTOOL - ioctls vs. netif_carrier_ok() to determine the link - status. The MII or ETHTOOL ioctls are less efficient and - utilize a deprecated calling sequence within the kernel. The - netif_carrier_ok() relies on the device driver to maintain its - state with netif_carrier_on/off; at this writing, most, but - not all, device drivers support this facility. - - If bonding insists that the link is up when it should not be, - it may be that your network device driver does not support - netif_carrier_on/off. The default state for netif_carrier is - "carrier on," so if a driver does not support netif_carrier, - it will appear as if the link is always up. In this case, - setting use_carrier to 0 will cause bonding to revert to the - MII / ETHTOOL ioctl method to determine the link state. - - A value of 1 enables the use of netif_carrier_ok(), a value of - 0 will use the deprecated MII / ETHTOOL ioctls. The default - value is 1. + Obsolete option that previously selected between MII / + ETHTOOL ioctls and netif_carrier_ok() to determine link + state. + + All link state checks are now done with netif_carrier_ok(). + + For backwards compatibility, this option's value may be inspected + or set. The only valid setting is 1. xmit_hash_policy @@ -2036,22 +2023,8 @@ depending upon the device driver to maintain its carrier state, by querying the device's MII registers, or by making an ethtool query to the device. -If the use_carrier module parameter is 1 (the default value), -then the MII monitor will rely on the driver for carrier state -information (via the netif_carrier subsystem). As explained in the -use_carrier parameter information, above, if the MII monitor fails to -detect carrier loss on the device (e.g., when the cable is physically -disconnected), it may be that the driver does not support -netif_carrier. - -If use_carrier is 0, then the MII monitor will first query the -device's (via ioctl) MII registers and check the link state. If that -request fails (not just that it returns carrier down), then the MII -monitor will make an ethtool ETHTOOL_GLINK request to attempt to obtain -the same information. If both methods fail (i.e., the driver either -does not support or had some error in processing both the MII register -and ethtool requests), then the MII monitor will assume the link is -up. +The MII monitor relies on the driver for carrier state information (via +the netif_carrier subsystem). 8. Potential Sources of Trouble =============================== @@ -2135,34 +2108,6 @@ This will load tg3 and e1000 modules before loading the bonding one. Full documentation on this can be found in the modprobe.d and modprobe manual pages. -8.3. Painfully Slow Or No Failed Link Detection By Miimon ---------------------------------------------------------- - -By default, bonding enables the use_carrier option, which -instructs bonding to trust the driver to maintain carrier state. - -As discussed in the options section, above, some drivers do -not support the netif_carrier_on/_off link state tracking system. -With use_carrier enabled, bonding will always see these links as up, -regardless of their actual state. - -Additionally, other drivers do support netif_carrier, but do -not maintain it in real time, e.g., only polling the link state at -some fixed interval. In this case, miimon will detect failures, but -only after some long period of time has expired. If it appears that -miimon is very slow in detecting link failures, try specifying -use_carrier=0 to see if that improves the failure detection time. If -it does, then it may be that the driver checks the carrier state at a -fixed interval, but does not cache the MII register values (so the -use_carrier=0 method of querying the registers directly works). If -use_carrier=0 does not improve the failover, then the driver may cache -the registers, or the problem may be elsewhere. - -Also, remember that miimon only checks for the device's -carrier state. It has no way to determine the state of devices on or -beyond other ports of a switch, or if a switch is refusing to pass -traffic while still maintaining carrier on. - 9. SNMP agents =============== -- cgit v1.2.3 From 2c01536aae3e3591f27b945e85fc6b92f789580c Mon Sep 17 00:00:00 2001 From: Leo Wang Date: Wed, 13 Aug 2025 18:04:13 +0800 Subject: dt-bindings: arm: aspeed: add Meta Clemente board Document the new compatibles used on Meta Clemente. Acked-by: Conor Dooley Signed-off-by: Leo Wang Link: https://patch.msgid.link/20250813-add-support-for-meta-clemente-bmc-v11-1-8970d41f88b0@fii-foxconn.com Signed-off-by: Andrew Jeffery --- Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml index b3c9d3310d57..aedefca7cf4a 100644 --- a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml +++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml @@ -82,6 +82,7 @@ properties: - asus,x4tf-bmc - facebook,bletchley-bmc - facebook,catalina-bmc + - facebook,clemente-bmc - facebook,cloudripper-bmc - facebook,darwin-bmc - facebook,elbert-bmc -- cgit v1.2.3 From 8f48b160e1b8f0c959e25df63994e6204b3794a8 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Tue, 2 Sep 2025 15:00:40 +0100 Subject: ASoC: dt-bindings: qcom,sm8250: Add glymur sound card Document the bindings for the glymur sound card which is audioreach based architecture. Signed-off-by: Srinivas Kandagatla Reviewed-by: Krzysztof Kozlowski Message-ID: <20250902140044.54508-3-srinivas.kandagatla@oss.qualcomm.com> Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/sound/qcom,sm8250.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml index 5d3dbb6cb1ae..8ac91625dce5 100644 --- a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml @@ -31,6 +31,7 @@ properties: - fairphone,fp4-sndcard - fairphone,fp5-sndcard - qcom,apq8096-sndcard + - qcom,glymur-sndcard - qcom,qcm6490-idp-sndcard - qcom,qcs6490-rb3gen2-sndcard - qcom,qcs8275-sndcard -- cgit v1.2.3 From 25436580f025d42bd7ccf3b960f4c405f3c91512 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Tue, 2 Sep 2025 15:00:42 +0100 Subject: ASoC: dt-bindings: qcom: Add Glymur LPASS wsa and va macro codecs Document compatibles for Qualcomm Glymur SoC macro digital codecs (VA and WSA), compatible with previous generation (SM8550 and SM8650). Signed-off-by: Srinivas Kandagatla Reviewed-by: Krzysztof Kozlowski Message-ID: <20250902140044.54508-5-srinivas.kandagatla@oss.qualcomm.com> Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml | 1 + Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml | 1 + 2 files changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml index dd549db6c841..2e8c26d89b00 100644 --- a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml @@ -20,6 +20,7 @@ properties: - qcom,sc8280xp-lpass-va-macro - items: - enum: + - qcom,glymur-lpass-va-macro - qcom,sm8650-lpass-va-macro - qcom,sm8750-lpass-va-macro - qcom,x1e80100-lpass-va-macro diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml index 9082e363c709..b6f5ba5d1320 100644 --- a/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml @@ -20,6 +20,7 @@ properties: - qcom,sc8280xp-lpass-wsa-macro - items: - enum: + - qcom,glymur-lpass-wsa-macro - qcom,sm8650-lpass-wsa-macro - qcom,sm8750-lpass-wsa-macro - qcom,x1e80100-lpass-wsa-macro -- cgit v1.2.3 From 72243ced3d861f99368ad2edcdce4d71c7108d16 Mon Sep 17 00:00:00 2001 From: Andreas Kemnade Date: Sat, 30 Aug 2025 10:53:26 +0200 Subject: dt-bindings: input: tsc2007: use comma in filename Use comma between vendor-prefix and chip name as it is common. Signed-off-by: Andreas Kemnade Fixes: 45601c66b5dd ("dt-bindings: input: touchscreen: convert tsc2007.txt to yaml format") Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250830085326.36120-1-akemnade@kernel.org Signed-off-by: Dmitry Torokhov --- .../bindings/input/touchscreen/ti,tsc2007.yaml | 75 ++++++++++++++++++++++ .../bindings/input/touchscreen/ti.tsc2007.yaml | 75 ---------------------- 2 files changed, 75 insertions(+), 75 deletions(-) create mode 100644 Documentation/devicetree/bindings/input/touchscreen/ti,tsc2007.yaml delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/ti.tsc2007.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/touchscreen/ti,tsc2007.yaml b/Documentation/devicetree/bindings/input/touchscreen/ti,tsc2007.yaml new file mode 100644 index 000000000000..a73d110272fa --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/ti,tsc2007.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/touchscreen/ti,tsc2007.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments tsc2007 touchscreen controller + +maintainers: + - Frank Li + +properties: + compatible: + const: ti,tsc2007 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + ti,x-plate-ohms: + description: X-plate resistance in ohms. + + gpios: true + + pendown-gpio: true + + ti,max-rt: + $ref: /schemas/types.yaml#/definitions/uint32 + description: maximum pressure. + + ti,fuzzx: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + specifies the absolute input fuzz x value. + If set, it will permit noise in the data up to +- the value given to the fuzz + parameter, that is used to filter noise from the event stream. + + ti,fuzzy: + $ref: /schemas/types.yaml#/definitions/uint32 + description: specifies the absolute input fuzz y value. + + ti,fuzzz: + $ref: /schemas/types.yaml#/definitions/uint32 + description: specifies the absolute input fuzz z value. + + ti,poll-period: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + how much time to wait (in milliseconds) before reading again the + values from the tsc2007. + +required: + - compatible + - reg + - ti,x-plate-ohms + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + touch@49 { + compatible = "ti,tsc2007"; + reg = <0x49>; + interrupt-parent = <&gpio4>; + interrupts = <0x0 0x8>; + gpios = <&gpio4 0 0>; + ti,x-plate-ohms = <180>; + }; + }; diff --git a/Documentation/devicetree/bindings/input/touchscreen/ti.tsc2007.yaml b/Documentation/devicetree/bindings/input/touchscreen/ti.tsc2007.yaml deleted file mode 100644 index 8bb4bc7df4fa..000000000000 --- a/Documentation/devicetree/bindings/input/touchscreen/ti.tsc2007.yaml +++ /dev/null @@ -1,75 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/input/touchscreen/ti.tsc2007.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Texas Instruments tsc2007 touchscreen controller - -maintainers: - - Frank Li - -properties: - compatible: - const: ti,tsc2007 - - reg: - maxItems: 1 - - interrupts: - maxItems: 1 - - ti,x-plate-ohms: - description: X-plate resistance in ohms. - - gpios: true - - pendown-gpio: true - - ti,max-rt: - $ref: /schemas/types.yaml#/definitions/uint32 - description: maximum pressure. - - ti,fuzzx: - $ref: /schemas/types.yaml#/definitions/uint32 - description: - specifies the absolute input fuzz x value. - If set, it will permit noise in the data up to +- the value given to the fuzz - parameter, that is used to filter noise from the event stream. - - ti,fuzzy: - $ref: /schemas/types.yaml#/definitions/uint32 - description: specifies the absolute input fuzz y value. - - ti,fuzzz: - $ref: /schemas/types.yaml#/definitions/uint32 - description: specifies the absolute input fuzz z value. - - ti,poll-period: - $ref: /schemas/types.yaml#/definitions/uint32 - description: - how much time to wait (in milliseconds) before reading again the - values from the tsc2007. - -required: - - compatible - - reg - - ti,x-plate-ohms - -additionalProperties: false - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - - touch@49 { - compatible = "ti,tsc2007"; - reg = <0x49>; - interrupt-parent = <&gpio4>; - interrupts = <0x0 0x8>; - gpios = <&gpio4 0 0>; - ti,x-plate-ohms = <180>; - }; - }; -- cgit v1.2.3 From c1b52451b604b7700419a48cf2f146ebacd9af57 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 22 Aug 2025 18:32:45 -0300 Subject: dt-bindings: input: touchscreen: tsc2007: Document 'wakeup-source' The 'wakeup-source' property is used by many devicetree files and is also supported by the tsc2007_core driver. Document it to avoid the following dt-schema warning: 'wakeup-source' does not match any of the regexes: '^pinctrl-[0-9]+$' Signed-off-by: Fabio Estevam Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250822213245.125901-1-festevam@gmail.com Signed-off-by: Dmitry Torokhov --- Documentation/devicetree/bindings/input/touchscreen/ti,tsc2007.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/touchscreen/ti,tsc2007.yaml b/Documentation/devicetree/bindings/input/touchscreen/ti,tsc2007.yaml index a73d110272fa..a595df3ea802 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/ti,tsc2007.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/ti,tsc2007.yaml @@ -26,6 +26,8 @@ properties: pendown-gpio: true + wakeup-source: true + ti,max-rt: $ref: /schemas/types.yaml#/definitions/uint32 description: maximum pressure. -- cgit v1.2.3 From 835bdddd028ff57afaee28eb5e4b260f714fd555 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 19 Aug 2025 12:53:16 -0400 Subject: dt-bindings: soc: add vf610 reboot syscon controller Add vf610 reboot controller, which used to reboot whole system. Fix below CHECK_DTB warnings: arch/arm/boot/dts/nxp/vf/vf610-bk4.dtb: /soc/bus@40000000/src@4006e000: failed to match any schema with compatible: ['fsl,vf610-src', 'syscon'] IC reference manual calls it as system reset controller(SRC), but it is not module as reset controller, which used to reset individual device. SRC works as reboot controller, which reboots whole system. It provides a syscon interface to syscon-reboot. Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250819165317.3739366-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/soc/fsl/fsl,vf610-src.yaml | 47 ++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/fsl/fsl,vf610-src.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/fsl/fsl,vf610-src.yaml b/Documentation/devicetree/bindings/soc/fsl/fsl,vf610-src.yaml new file mode 100644 index 000000000000..6fb93e8be929 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/fsl/fsl,vf610-src.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/fsl/fsl,vf610-src.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale vf610 System Reset Controller (SRC) + +maintainers: + - Frank Li + +description: + IC reference manual calls it as SRC, but it is not module as reset + controller, which used to reset individual device. SRC works as reboot + controller, which reboots whole system. It provides a syscon interface to + syscon-reboot. + +properties: + compatible: + items: + - enum: + - fsl,vf610-src + - const: syscon + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + + syscon@4006e000 { + compatible = "fsl,vf610-src", "syscon"; + reg = <0x4006e000 0x1000>; + interrupts = <96 IRQ_TYPE_LEVEL_HIGH>; + }; + -- cgit v1.2.3 From 81bb4d07edd72a56180e2c8414ead0e63c379502 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 18 Aug 2025 15:25:35 +0200 Subject: docs: dt: writing-bindings: Document node name ABI and simple-mfd Document established Devicetree bindings maintainers review practice: 1. Device node names should not be treated as an ABI, unless for children of a device when documented. There were many patches posted using of_find_node_by_name() or of_node_name_eq() for accessing siblings or completely different nodes. These cases were introducing undocumented ABI, so they are discouraged. 2. 'simple-mfd' means children do not depend on parent device resources. 'simple-bus' is so simple, that even 'reg' properties are not applicable. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250818132534.120217-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/writing-bindings.rst | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/writing-bindings.rst b/Documentation/devicetree/bindings/writing-bindings.rst index f8e0293a7c06..667816dd7d50 100644 --- a/Documentation/devicetree/bindings/writing-bindings.rst +++ b/Documentation/devicetree/bindings/writing-bindings.rst @@ -31,10 +31,19 @@ Overall design devices only need child nodes when the child nodes have their own DT resources. A single node can be multiple providers (e.g. clocks and resets). +- DON'T treat device node names as a stable ABI, but instead use phandles or + compatibles to find sibling devices. Exception: sub-nodes of given device + could be treated as ABI, if explicitly documented in the bindings. + - DON'T use 'syscon' alone without a specific compatible string. A 'syscon' hardware block should have a compatible string unique enough to infer the register layout of the entire block (at a minimum). +- DON'T use 'simple-mfd' compatible for non-trivial devices, where children + depend on some resources from the parent. Similarly, 'simple-bus' should not + be used for complex buses and even 'regs' property means device is not + a simple bus. + Properties ========== -- cgit v1.2.3 From 75592f9e178915867829b7ec6eb20125924a4814 Mon Sep 17 00:00:00 2001 From: Santosh Mahto Date: Wed, 20 Aug 2025 23:40:13 +0530 Subject: docs: devicetree: fix typo in writing-schema.rst MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fixes a spelling mistake in writing-schema.rst: "interpretted" → "interpreted" Signed-off-by: Santosh Mahto Link: https://lore.kernel.org/r/20250820181013.17817-1-eisantosh95@gmail.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/writing-schema.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/writing-schema.rst b/Documentation/devicetree/bindings/writing-schema.rst index 470d1521fa17..fcd4726f8df4 100644 --- a/Documentation/devicetree/bindings/writing-schema.rst +++ b/Documentation/devicetree/bindings/writing-schema.rst @@ -53,7 +53,7 @@ description The default without any indicators is flowed, plain scalar style where single line breaks and leading whitespace are stripped. Paragraphs are delimited by blank lines (i.e. double line break). This style cannot contain ": " in it as - it will be interpretted as a key. Any " #" sequence will be interpretted as + it will be interpreted as a key. Any " #" sequence will be interpreted as a comment. There's other restrictions on characters as well. Most restrictions are on what the first character can be. -- cgit v1.2.3 From a6dcff26eb4dcb9178917c8c49b10265ee5f749c Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 26 Apr 2024 14:54:37 -0500 Subject: yamllint: Drop excluding quoted values with ',' from checks Strings with commas were excluded from checks because yamllint had false positives for flow style maps and sequences which need quotes when values contain commas. This issue has been fixed as of the 1.34 release, so drop the work-around. Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20240426195438.2771968-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/.yamllint | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/.yamllint b/Documentation/devicetree/bindings/.yamllint index fea5231e1320..532799501800 100644 --- a/Documentation/devicetree/bindings/.yamllint +++ b/Documentation/devicetree/bindings/.yamllint @@ -4,7 +4,7 @@ rules: quoted-strings: required: only-when-needed extra-allowed: - - '[$^,[]' + - '[$^[]' - '^/$' line-length: # 80 chars should be enough, but don't fail if a line is longer -- cgit v1.2.3 From 955212b1e4ac3f299c411ccd68cc702e55c4762d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 20 Aug 2025 16:17:36 +0200 Subject: dt-bindings: display: ingenic,jz4780-hdmi: Add missing clock-names The binding references synopsys,dw-hdmi.yaml schema which defines both 'clocks' and 'clock-names' with variable length, therefore we need here also same constraint for 'clock-names' as for 'clocks'. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250820-dt-bindings-display-v2-1-91e2ccba3d4e@linaro.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml index 0b27df429bdc..84df3cf239d5 100644 --- a/Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml @@ -26,6 +26,9 @@ properties: clocks: maxItems: 2 + clock-names: + maxItems: 2 + ports: $ref: /schemas/graph.yaml#/properties/ports -- cgit v1.2.3 From 0387040b31aa6606cd9ef726ce4b11c5fa6079db Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 20 Aug 2025 16:17:37 +0200 Subject: dt-bindings: display: ti,tdp158: Add missing reg constraint Device can be used over I2C bus, so it documents 'reg' property, however it misses to constrain it to actual I2C address. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250820-dt-bindings-display-v2-2-91e2ccba3d4e@linaro.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/display/bridge/ti,tdp158.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/bridge/ti,tdp158.yaml b/Documentation/devicetree/bindings/display/bridge/ti,tdp158.yaml index 1c522f72c4ba..721da44054e1 100644 --- a/Documentation/devicetree/bindings/display/bridge/ti,tdp158.yaml +++ b/Documentation/devicetree/bindings/display/bridge/ti,tdp158.yaml @@ -17,6 +17,7 @@ properties: # The reg property is required if and only if the device is connected # to an I2C bus. In pin strap mode, reg must not be specified. reg: + maxItems: 1 description: I2C address of the device # Pin 36 = Operation Enable / Reset Pin -- cgit v1.2.3 From 0e44780b423afed8c35005b31536a7bb3c52f70f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 20 Aug 2025 16:17:38 +0200 Subject: dt-bindings: display: rockchip,dw-mipi-dsi: Narrow clocks for rockchip,rk3288-mipi-dsi The binding allows in top-level from one to four clocks and each variant narrows the choice, but rockchip,rk3288-mipi-dsi missed the minItems. Reviewed-by: Heiko Stuebner Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250820-dt-bindings-display-v2-3-91e2ccba3d4e@linaro.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml index 0881e82deb11..c59df3c1a3f7 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml @@ -97,9 +97,11 @@ allOf: then: properties: clocks: + minItems: 2 maxItems: 2 clock-names: + minItems: 2 maxItems: 2 - if: -- cgit v1.2.3 From 4ed46073274a5b23baf0b992c459762e28faf549 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 21 Aug 2025 17:21:33 -0500 Subject: dt-bindings: vendor-prefixes: Add undocumented vendor prefixes Add various vendor prefixes which are in use in compatible strings already. These were found by modifying vendor-prefixes.yaml into a schema to check compatible strings. The added prefixes doesn't include various duplicate prefixes in use such as "lge". Link: https://lore.kernel.org/r/20250821222136.1027269-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/vendor-prefixes.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 77160cd47f54..0f5273123650 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -86,6 +86,8 @@ patternProperties: description: Allegro DVT "^allegromicro,.*": description: Allegro MicroSystems, Inc. + "^alliedtelesis,.*": + description: Allied Telesis, Inc. "^alliedvision,.*": description: Allied Vision Technologies GmbH "^allo,.*": @@ -229,6 +231,8 @@ patternProperties: description: Bitmain Technologies "^blaize,.*": description: Blaize, Inc. + "^bluegiga,.*": + description: Bluegiga Technologies Ltd. "^blutek,.*": description: BluTek Power "^boe,.*": @@ -247,6 +251,8 @@ patternProperties: description: Bticino International "^buffalo,.*": description: Buffalo, Inc. + "^buglabs,.*": + description: Bug Labs, Inc. "^bur,.*": description: B&R Industrial Automation GmbH "^bytedance,.*": @@ -325,6 +331,8 @@ patternProperties: description: Conexant Systems, Inc. "^colorfly,.*": description: Colorful GRP, Shenzhen Xueyushi Technology Ltd. + "^compal,.*": + description: Compal Electronics, Inc. "^compulab,.*": description: CompuLab Ltd. "^comvetia,.*": @@ -353,6 +361,8 @@ patternProperties: description: Guangzhou China Star Optoelectronics Technology Co., Ltd "^csq,.*": description: Shenzen Chuangsiqi Technology Co.,Ltd. + "^csr,.*": + description: Cambridge Silicon Radio "^ctera,.*": description: CTERA Networks Intl. "^ctu,.*": @@ -455,6 +465,8 @@ patternProperties: description: Emtop Embedded Solutions "^eeti,.*": description: eGalax_eMPIA Technology Inc + "^egnite,.*": + description: egnite GmbH "^einfochips,.*": description: Einfochips "^eink,.*": @@ -485,8 +497,12 @@ patternProperties: description: Empire Electronix "^emtrion,.*": description: emtrion GmbH + "^enbw,.*": + description: Energie Baden-Württemberg AG "^enclustra,.*": description: Enclustra GmbH + "^endian,.*": + description: Endian SRL "^endless,.*": description: Endless Mobile, Inc. "^ene,.*": @@ -552,6 +568,8 @@ patternProperties: description: FocalTech Systems Co.,Ltd "^forlinx,.*": description: Baoding Forlinx Embedded Technology Co., Ltd. + "^foxlink,.*": + description: Foxlink Group "^freebox,.*": description: Freebox SAS "^freecom,.*": @@ -640,6 +658,10 @@ patternProperties: description: Haoyu Microelectronic Co. Ltd. "^hardkernel,.*": description: Hardkernel Co., Ltd + "^hce,.*": + description: HCE Engineering SRL + "^headacoustics,.*": + description: HEAD acoustics "^hechuang,.*": description: Shenzhen Hechuang Intelligent Co. "^hideep,.*": @@ -723,6 +745,8 @@ patternProperties: description: Shenzhen INANBO Electronic Technology Co., Ltd. "^incircuit,.*": description: In-Circuit GmbH + "^incostartec,.*": + description: INCOstartec GmbH "^indiedroid,.*": description: Indiedroid "^inet-tek,.*": @@ -931,6 +955,8 @@ patternProperties: description: Maxim Integrated Products "^maxlinear,.*": description: MaxLinear Inc. + "^maxtor,.*": + description: Maxtor Corporation "^mbvl,.*": description: Mobiveil Inc. "^mcube,.*": @@ -1094,6 +1120,8 @@ patternProperties: description: Nordic Semiconductor "^nothing,.*": description: Nothing Technology Limited + "^novatech,.*": + description: NovaTech Automation "^novatek,.*": description: Novatek "^novtech,.*": @@ -1189,6 +1217,8 @@ patternProperties: description: Pervasive Displays, Inc. "^phicomm,.*": description: PHICOMM Co., Ltd. + "^phontech,.*": + description: Phontech "^phytec,.*": description: PHYTEC Messtechnik GmbH "^picochip,.*": @@ -1273,6 +1303,8 @@ patternProperties: description: Ramtron International "^raspberrypi,.*": description: Raspberry Pi Foundation + "^raumfeld,.*": + description: Raumfeld GmbH "^raydium,.*": description: Raydium Semiconductor Corp. "^rda,.*": @@ -1311,6 +1343,8 @@ patternProperties: description: ROHM Semiconductor Co., Ltd "^ronbo,.*": description: Ronbo Electronics + "^ronetix,.*": + description: Ronetix GmbH "^roofull,.*": description: Shenzhen Roofull Technology Co, Ltd "^roseapplepi,.*": @@ -1337,8 +1371,12 @@ patternProperties: description: Schindler "^schneider,.*": description: Schneider Electric + "^schulercontrol,.*": + description: Schuler Group "^sciosense,.*": description: ScioSense B.V. + "^sdmc,.*": + description: SDMC Technology Co., Ltd "^seagate,.*": description: Seagate Technology PLC "^seeed,.*": @@ -1377,6 +1415,8 @@ patternProperties: description: Si-En Technology Ltd. "^si-linux,.*": description: Silicon Linux Corporation + "^sielaff,.*": + description: Sielaff GmbH & Co. "^siemens,.*": description: Siemens AG "^sifive,.*": @@ -1445,6 +1485,8 @@ patternProperties: description: SolidRun "^solomon,.*": description: Solomon Systech Limited + "^somfy,.*": + description: Somfy Systems Inc. "^sony,.*": description: Sony Corporation "^sophgo,.*": @@ -1515,6 +1557,8 @@ patternProperties: "^synopsys,.*": description: Synopsys, Inc. (deprecated, use snps) deprecated: true + "^taos,.*": + description: Texas Advanced Optoelectronic Solutions Inc. "^tbs,.*": description: TBS Technologies "^tbs-biometrics,.*": @@ -1545,6 +1589,8 @@ patternProperties: description: Teltonika Networks "^tempo,.*": description: Tempo Semiconductor + "^tenda,.*": + description: Shenzhen Tenda Technology Co., Ltd. "^terasic,.*": description: Terasic Inc. "^tesla,.*": @@ -1648,6 +1694,8 @@ patternProperties: description: V3 Semiconductor "^vaisala,.*": description: Vaisala + "^valve,.*": + description: Valve Corporation "^vamrs,.*": description: Vamrs Ltd. "^variscite,.*": @@ -1748,6 +1796,8 @@ patternProperties: description: Extreme Engineering Solutions (X-ES) "^xiaomi,.*": description: Xiaomi Technology Co., Ltd. + "^xicor,.*": + description: Xicor Inc. "^xillybus,.*": description: Xillybus Ltd. "^xingbangda,.*": -- cgit v1.2.3 From 8a72549c5b276849def80057a4b4789dbdb87ea6 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 23 Aug 2025 18:32:59 +0200 Subject: dt-bindings: interrupt-controller: marvell,cp110-icu: Document address-cells The CP110 ICU children are interrupt controllers and can be referenced in interrupt-map properties (e.g. in arch/arm64/boot/dts/marvell/armada-cp11x.dtsi), thus the nodes should have address-cells property. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Miquel Raynal Link: https://lore.kernel.org/r/20250823163258.49648-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml b/Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml index 9d4f06f45372..ddfce217e119 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml @@ -49,6 +49,9 @@ patternProperties: reg: maxItems: 1 + '#address-cells': + const: 0 + '#interrupt-cells': const: 2 -- cgit v1.2.3 From f0aed6ffb3548a03dab9e608b2bd8ce07af4be9f Mon Sep 17 00:00:00 2001 From: Harikrishna Shenoy Date: Wed, 27 Aug 2025 16:55:39 +0530 Subject: dt-bindings: display: dsi-controller: add bridge to patternProperties Extend the DSI controller schema to allow bridge child nodes. This makes it possible to describe external bridge devices directly connected as DSI peripherals. Signed-off-by: Harikrishna Shenoy Link: https://lore.kernel.org/r/20250827112539.4001513-1-h-shenoy@ti.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/display/dsi-controller.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/dsi-controller.yaml b/Documentation/devicetree/bindings/display/dsi-controller.yaml index 67ce10307ee0..bb4d6e9e7d0c 100644 --- a/Documentation/devicetree/bindings/display/dsi-controller.yaml +++ b/Documentation/devicetree/bindings/display/dsi-controller.yaml @@ -46,7 +46,7 @@ properties: const: 0 patternProperties: - "^panel@[0-3]$": + "^(panel|bridge)@[0-3]$": description: Panels connected to the DSI link type: object -- cgit v1.2.3 From 8b57a0aeccb1d31b82210384b1f2a3226145635f Mon Sep 17 00:00:00 2001 From: Frank Li Date: Wed, 27 Aug 2025 17:09:11 -0400 Subject: dt-bindings: arm: cpus: Allow fsl,soc-operating-points for i.MX6 The old i.MX6 (over 10 years) chip use fsl,soc-operating-points to get SoC's voltage and frequency information when cpu change frequency. Set fsl,soc-operating-points deprecated. Allow soc-supply property and set it deprecated. Fix bunch of CHECK_DTBS warnings: arch/arm/boot/dts/nxp/imx/imx6ul-prti6g.dtb: cpu@0 (arm,cortex-a7): Unevaluated properties are not allowed ('fsl,soc-operating-points', 'soc-supply' were unexpected) from schema $id: http://devicetree.org/schemas/arm/cpus.yaml# Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250827210912.92029-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index bb1ab514924d..78cc920e83d4 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -347,10 +347,23 @@ properties: deprecated: true description: Use 'cpu-supply' instead + soc-supply: + deprecated: true + description: Only for i.MX6/7 Soc. + sram-supply: deprecated: true description: Use 'mem-supply' instead + fsl,soc-operating-points: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + description: FSL i.MX6 Soc operation-points when change cpu frequency + deprecated: true + items: + items: + - description: Frequency in kHz + - description: Voltage for OPP in uV + mediatek,cci: $ref: /schemas/types.yaml#/definitions/phandle description: Link to Mediatek Cache Coherent Interconnect -- cgit v1.2.3 From 0f356eb097c314710060dde9c4fae4fd516bc63a Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 21 Aug 2025 13:06:40 -0500 Subject: dt-bindings: arm: Add Cortex-A320/A520AE/A720AE cores and PMU Add the recently introduced Cortex-A320/A520AE/A720AE core and PMU compatible strings. Link: https://lore.kernel.org/all/20250821190722.417639-1-robh@kernel.org/ Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 3 +++ Documentation/devicetree/bindings/arm/pmu.yaml | 3 +++ 2 files changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 78cc920e83d4..b1c6943e7d78 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -145,11 +145,14 @@ properties: - arm,cortex-a78 - arm,cortex-a78ae - arm,cortex-a78c + - arm,cortex-a320 - arm,cortex-a510 - arm,cortex-a520 + - arm,cortex-a520ae - arm,cortex-a710 - arm,cortex-a715 - arm,cortex-a720 + - arm,cortex-a720ae - arm,cortex-a725 - arm,cortex-m0 - arm,cortex-m0+ diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml index 295963a3cae7..9bb109e947dd 100644 --- a/Documentation/devicetree/bindings/arm/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/pmu.yaml @@ -48,11 +48,14 @@ properties: - arm,cortex-a76-pmu - arm,cortex-a77-pmu - arm,cortex-a78-pmu + - arm,cortex-a320-pmu - arm,cortex-a510-pmu - arm,cortex-a520-pmu + - arm,cortex-a520ae-pmu - arm,cortex-a710-pmu - arm,cortex-a715-pmu - arm,cortex-a720-pmu + - arm,cortex-a720ae-pmu - arm,cortex-a725-pmu - arm,cortex-x1-pmu - arm,cortex-x2-pmu -- cgit v1.2.3 From 8e322143c30483a646f6e09434ebf0e33b315a4f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 30 Aug 2025 13:32:39 +0200 Subject: dt-bindings: display: samsung: Drop S3C2410 Samsung S3C24xx family of SoCs was removed from Linux kernel in the commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January 2023. There are no in-kernel users of remaining S3C24xx compatibles. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250830113238.131006-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml index 075231716b2f..ff685031bb2c 100644 --- a/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml +++ b/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml @@ -15,7 +15,6 @@ maintainers: properties: compatible: enum: - - samsung,s3c2443-fimd - samsung,s3c6400-fimd - samsung,s5pv210-fimd - samsung,exynos3250-fimd -- cgit v1.2.3 From 93674298bede84898742f4f8836666a2bfd0ece4 Mon Sep 17 00:00:00 2001 From: Masaharu Noguchi Date: Tue, 2 Sep 2025 00:48:12 +0900 Subject: Documentation: fix typo 'Andorid' -> 'Android' in goldfish pipe binding This patch fixes a small typo in the goldfish pipe binding documentation: 'Andorid' -> 'Android'. Signed-off-by: Masaharu Noguchi Link: https://lore.kernel.org/r/20250901154812.570319-1-nogunix@gmail.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/goldfish/pipe.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/goldfish/pipe.txt b/Documentation/devicetree/bindings/goldfish/pipe.txt index e417a31a1ee3..5637ce701788 100644 --- a/Documentation/devicetree/bindings/goldfish/pipe.txt +++ b/Documentation/devicetree/bindings/goldfish/pipe.txt @@ -1,6 +1,6 @@ Android Goldfish QEMU Pipe -Andorid pipe virtual device generated by android emulator. +Android pipe virtual device generated by android emulator. Required properties: -- cgit v1.2.3 From 673f1244b3d47c9b41cda3473c062bec586387be Mon Sep 17 00:00:00 2001 From: Wladislav Wiebe Date: Mon, 4 Aug 2025 11:35:25 +0200 Subject: genirq: Add support for warning on long-running interrupt handlers Introduce a mechanism to detect and warn about prolonged interrupt handlers. With a new command-line parameter (irqhandler.duration_warn_us=), users can configure the duration threshold in microseconds when a warning in such format should be emitted: "[CPU14] long duration of IRQ[159:bad_irq_handler [long_irq]], took: 1330 us" The implementation uses local_clock() to measure the execution duration of the generic IRQ per-CPU event handler. Signed-off-by: Wladislav Wiebe Signed-off-by: Thomas Gleixner Reviewed-by: Jiri Slaby Link: https://lore.kernel.org/all/20250804093525.851-1-wladislav.wiebe@nokia.com --- Documentation/admin-guide/kernel-parameters.txt | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 747a55abf494..bdbc44f52e4a 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -2606,6 +2606,11 @@ for it. Intended to get systems with badly broken firmware running. + irqhandler.duration_warn_us= [KNL] + Warn if an IRQ handler exceeds the specified duration + threshold in microseconds. Useful for identifying + long-running IRQs in the system. + irqpoll [HW] When an interrupt is not handled search all handlers for it. Also check all handlers each timer -- cgit v1.2.3 From 279ea197d9bd56d2a4d0058a55fd0eb88626ad6a Mon Sep 17 00:00:00 2001 From: Taishi Shimizu Date: Sun, 13 Jul 2025 16:18:24 +0900 Subject: dt-bindings: arm: bcm: Add support for Buffalo WXR-1750DHP Add Buffalo WXR-1750DHP under BCM4708 based boards. Signed-off-by: Taishi Shimizu Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250713071826.726682-2-s.taishi14142@gmail.com Signed-off-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml index d925e7a3b5ef..f47d74a5b0b6 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml @@ -25,6 +25,7 @@ properties: - enum: - asus,rt-ac56u - asus,rt-ac68u + - buffalo,wxr-1750dhp - buffalo,wzr-1166dhp - buffalo,wzr-1166dhp2 - buffalo,wzr-1750dhp -- cgit v1.2.3 From d5958c8a09d583273d6713cd9f6da4412a2f45e6 Mon Sep 17 00:00:00 2001 From: Ryan Chung Date: Sun, 31 Aug 2025 19:17:28 +0900 Subject: tracing: rephrase for clearer documentation Signed-off-by: Ryan Chung Acked-by: Steven Rostedt (Google) Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250831101736.11519-2-seokwoo.chung130@gmail.com --- Documentation/trace/boottime-trace.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/trace/boottime-trace.rst b/Documentation/trace/boottime-trace.rst index 3efac10adb36..651f3a2c01de 100644 --- a/Documentation/trace/boottime-trace.rst +++ b/Documentation/trace/boottime-trace.rst @@ -19,7 +19,7 @@ this uses bootconfig file to describe tracing feature programming. Options in the Boot Config ========================== -Here is the list of available options list for boot time tracing in +Here is the list of available options for boot time tracing in boot config file [1]_. All options are under "ftrace." or "kernel." prefix. See kernel parameters for the options which starts with "kernel." prefix [2]_. -- cgit v1.2.3 From b65988af71af62b81bbc6af0cbe05b18eaef4da5 Mon Sep 17 00:00:00 2001 From: Ryan Chung Date: Sun, 31 Aug 2025 19:17:29 +0900 Subject: tracing: fix grammar error in debugging.rst Signed-off-by: Ryan Chung Acked-by: Steven Rostedt (Google) Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250831101736.11519-3-seokwoo.chung130@gmail.com --- Documentation/trace/debugging.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/trace/debugging.rst b/Documentation/trace/debugging.rst index d54bc500af80..4d88c346fc38 100644 --- a/Documentation/trace/debugging.rst +++ b/Documentation/trace/debugging.rst @@ -59,7 +59,7 @@ There is various methods of acquiring the state of the system when a kernel crash occurs. This could be from the oops message in printk, or one could use kexec/kdump. But these just show what happened at the time of the crash. It can be very useful in knowing what happened up to the point of the crash. -The tracing ring buffer, by default, is a circular buffer than will +The tracing ring buffer, by default, is a circular buffer that will overwrite older events with newer ones. When a crash happens, the content of the ring buffer will be all the events that lead up to the crash. -- cgit v1.2.3 From a4c2ff6e507ebb47761865289772494e717d035a Mon Sep 17 00:00:00 2001 From: Ranganath V N Date: Wed, 3 Sep 2025 01:08:22 +0530 Subject: Documentation: Fix spelling mistakes Corrected a few spelling mistakes to improve the readability. Signed-off-by: Ranganath V N Acked-by: Rob Herring (Arm) Reviewed-by: Randy Dunlap Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250902193822.6349-1-vnranganath.20@gmail.com --- Documentation/devicetree/bindings/submitting-patches.rst | 2 +- Documentation/filesystems/iomap/operations.rst | 2 +- Documentation/virt/kvm/review-checklist.rst | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/submitting-patches.rst b/Documentation/devicetree/bindings/submitting-patches.rst index 46d0b036c97e..191085b0d5e8 100644 --- a/Documentation/devicetree/bindings/submitting-patches.rst +++ b/Documentation/devicetree/bindings/submitting-patches.rst @@ -66,7 +66,7 @@ I. For patch submitters any DTS patches, regardless whether using existing or new bindings, should be placed at the end of patchset to indicate no dependency of drivers on the DTS. DTS will be anyway applied through separate tree or branch, so - different order would indicate the serie is non-bisectable. + different order would indicate the series is non-bisectable. If a driver subsystem maintainer prefers to apply entire set, instead of their relevant portion of patchset, please split the DTS patches into diff --git a/Documentation/filesystems/iomap/operations.rst b/Documentation/filesystems/iomap/operations.rst index 067ed8e14ef3..387fd9cc72ca 100644 --- a/Documentation/filesystems/iomap/operations.rst +++ b/Documentation/filesystems/iomap/operations.rst @@ -321,7 +321,7 @@ The fields are as follows: - ``writeback_submit``: Submit the previous built writeback context. Block based file systems should use the iomap_ioend_writeback_submit helper, other file system can implement their own. - File systems can optionall to hook into writeback bio submission. + File systems can optionally hook into writeback bio submission. This might include pre-write space accounting updates, or installing a custom ``->bi_end_io`` function for internal purposes, such as deferring the ioend completion to a workqueue to run metadata update diff --git a/Documentation/virt/kvm/review-checklist.rst b/Documentation/virt/kvm/review-checklist.rst index debac54e14e7..053f00c50d66 100644 --- a/Documentation/virt/kvm/review-checklist.rst +++ b/Documentation/virt/kvm/review-checklist.rst @@ -98,7 +98,7 @@ New APIs It is important to demonstrate your use case. This can be as simple as explaining that the feature is already in use on bare metal, or it can be a proof-of-concept implementation in userspace. The latter need not be - open source, though that is of course preferrable for easier testing. + open source, though that is of course preferable for easier testing. Selftests should test corner cases of the APIs, and should also cover basic host and guest operation if no open source VMM uses the feature. -- cgit v1.2.3 From 3f65aa8ede2377c47c11f1c38b44226b8ca60477 Mon Sep 17 00:00:00 2001 From: Harshit Mogalapalli Date: Sun, 31 Aug 2025 08:11:18 -0700 Subject: Documentation: dev-tools: Fix a typo in autofdo documentation Use "cat /proc/cpuinfo" instead of "cat proc/cpuinfo". Signed-off-by: Harshit Mogalapalli Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250831151118.1274826-1-harshit.m.mogalapalli@oracle.com --- Documentation/dev-tools/autofdo.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/dev-tools/autofdo.rst b/Documentation/dev-tools/autofdo.rst index 1f0a451e9ccd..bcf06e7d6ffa 100644 --- a/Documentation/dev-tools/autofdo.rst +++ b/Documentation/dev-tools/autofdo.rst @@ -131,11 +131,11 @@ Here is an example workflow for AutoFDO kernel: For Zen3:: - $ cat proc/cpuinfo | grep " brs" + $ cat /proc/cpuinfo | grep " brs" For Zen4:: - $ cat proc/cpuinfo | grep amd_lbr_v2 + $ cat /proc/cpuinfo | grep amd_lbr_v2 The following command generated the perf data file:: -- cgit v1.2.3 From 0df41b1b9488f1e85ceb2307639e29ebb1d7ba64 Mon Sep 17 00:00:00 2001 From: Vegard Nossum Date: Sat, 30 Aug 2025 19:08:08 +0200 Subject: docs: sphinx: remove SPDX/copyright comments from HTML output Use Jinja2 comments instead of HTML comments for the SPDX and copyright lines. This prevents them from appearing in the HTML output, which was never the intention; the HTML output has its own copyright line at the bottom of the document. Signed-off-by: Vegard Nossum Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250830170808.3911151-1-vegard.nossum@oracle.com --- Documentation/sphinx/templates/kernel-toc.html | 3 ++- Documentation/sphinx/templates/translations.html | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/templates/kernel-toc.html b/Documentation/sphinx/templates/kernel-toc.html index 41f1efbe64bb..b84969bd31c4 100644 --- a/Documentation/sphinx/templates/kernel-toc.html +++ b/Documentation/sphinx/templates/kernel-toc.html @@ -1,4 +1,5 @@ - +{# SPDX-License-Identifier: GPL-2.0 #} + {# Create a local TOC the kernel way #}

Contents

diff --git a/Documentation/sphinx/templates/translations.html b/Documentation/sphinx/templates/translations.html index 8df5d42d8dcd..351586f41938 100644 --- a/Documentation/sphinx/templates/translations.html +++ b/Documentation/sphinx/templates/translations.html @@ -1,5 +1,5 @@ - - +{# SPDX-License-Identifier: GPL-2.0 #} +{# Copyright © 2023, Oracle and/or its affiliates. #} {# Create a language menu for translations #} {% if languages|length > 0: %} -- cgit v1.2.3 From 0059f3b82fe713481a1ccfe28ebe6a2489e77df3 Mon Sep 17 00:00:00 2001 From: Zenghui Yu Date: Wed, 27 Aug 2025 22:47:38 +0800 Subject: docs: admin-guide: Fix typo in nfsroot.rst There is an obvious mistake in nfsroot.rst where pxelinux was wrongly written as pxeliunx. Fix it. Signed-off-by: Zenghui Yu Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250827144738.43361-1-zenghui.yu@linux.dev --- Documentation/admin-guide/nfs/nfsroot.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/nfs/nfsroot.rst b/Documentation/admin-guide/nfs/nfsroot.rst index 135218f33394..06990309c6ff 100644 --- a/Documentation/admin-guide/nfs/nfsroot.rst +++ b/Documentation/admin-guide/nfs/nfsroot.rst @@ -342,7 +342,7 @@ They depend on various facilities being available: When using pxelinux, the kernel image is specified using "kernel ". The nfsroot parameters are passed to the kernel by adding them to the "append" line. - It is common to use serial console in conjunction with pxeliunx, + It is common to use serial console in conjunction with pxelinux, see Documentation/admin-guide/serial-console.rst for more information. For more information on isolinux, including how to create bootdisks -- cgit v1.2.3 From 7e5a0fe4e8ae2eb341f8ebbee2b24231a58fc28b Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Wed, 27 Aug 2025 14:37:27 +0300 Subject: doc: filesystems: proc: remove stale information from intro Most of the information in the first paragraph of the Introduction/Credits section is outdated. Documentation update suggestions should go to documentation maintainers listed in MAINTAINERS. Remove misleading contact information. Signed-off-by: Baruch Siach Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/cb4987a16ed96ee86841aec921d914bd44249d0b.1756294647.git.baruch@tkos.co.il --- Documentation/filesystems/proc.rst | 21 --------------------- 1 file changed, 21 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/proc.rst b/Documentation/filesystems/proc.rst index 2971551b7235..ede654478dff 100644 --- a/Documentation/filesystems/proc.rst +++ b/Documentation/filesystems/proc.rst @@ -61,19 +61,6 @@ Preface 0.1 Introduction/Credits ------------------------ -This documentation is part of a soon (or so we hope) to be released book on -the SuSE Linux distribution. As there is no complete documentation for the -/proc file system and we've used many freely available sources to write these -chapters, it seems only fair to give the work back to the Linux community. -This work is based on the 2.2.* kernel version and the upcoming 2.4.*. I'm -afraid it's still far from complete, but we hope it will be useful. As far as -we know, it is the first 'all-in-one' document about the /proc file system. It -is focused on the Intel x86 hardware, so if you are looking for PPC, ARM, -SPARC, AXP, etc., features, you probably won't find what you are looking for. -It also only covers IPv4 networking, not IPv6 nor other protocols - sorry. But -additions and patches are welcome and will be added to this document if you -mail them to Bodo. - We'd like to thank Alan Cox, Rik van Riel, and Alexey Kuznetsov and a lot of other people for help compiling this documentation. We'd also like to extend a special thank you to Andi Kleen for documentation, which we relied on heavily @@ -81,17 +68,9 @@ to create this document, as well as the additional information he provided. Thanks to everybody else who contributed source or docs to the Linux kernel and helped create a great piece of software... :) -If you have any comments, corrections or additions, please don't hesitate to -contact Bodo Bauer at bb@ricochet.net. We'll be happy to add them to this -document. - The latest version of this document is available online at https://www.kernel.org/doc/html/latest/filesystems/proc.html -If the above direction does not works for you, you could try the kernel -mailing list at linux-kernel@vger.kernel.org and/or try to reach me at -comandante@zaralinux.com. - 0.2 Legal Stuff --------------- -- cgit v1.2.3 From 781c118c3ece2b546c6c41f617cccb36cb9534f1 Mon Sep 17 00:00:00 2001 From: Taniya Das Date: Fri, 29 Aug 2025 13:28:03 +0530 Subject: dt-bindings: clock: Add DISPCC and reset controller for GLYMUR SoC Add the device tree bindings for the display clock controller which are required on Qualcomm Glymur SoC. Signed-off-by: Taniya Das Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250829-glymur-disp-clock-controllers-v1-1-0ce6fabd837c@oss.qualcomm.com [bjorn: Dropped unnecessary include in DT example] Signed-off-by: Bjorn Andersson --- .../bindings/clock/qcom,glymur-dispcc.yaml | 98 ++++++++++++++++++++++ 1 file changed, 98 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,glymur-dispcc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/qcom,glymur-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,glymur-dispcc.yaml new file mode 100644 index 000000000000..45f027c70e03 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,glymur-dispcc.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,glymur-dispcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Display Clock & Reset Controller on GLYMUR + +maintainers: + - Taniya Das + +description: | + Qualcomm display clock control module which supports the clocks, resets and + power domains for the MDSS instances on GLYMUR SoC. + + See also: + include/dt-bindings/clock/qcom,dispcc-glymur.h + +properties: + compatible: + enum: + - qcom,glymur-dispcc + + clocks: + items: + - description: Board CXO clock + - description: Board sleep clock + - description: DisplayPort 0 link clock + - description: DisplayPort 0 VCO div clock + - description: DisplayPort 1 link clock + - description: DisplayPort 1 VCO div clock + - description: DisplayPort 2 link clock + - description: DisplayPort 2 VCO div clock + - description: DisplayPort 3 link clock + - description: DisplayPort 3 VCO div clock + - description: DSI 0 PLL byte clock + - description: DSI 0 PLL DSI clock + - description: DSI 1 PLL byte clock + - description: DSI 1 PLL DSI clock + - description: Standalone PHY 0 PLL link clock + - description: Standalone PHY 0 VCO div clock + - description: Standalone PHY 1 PLL link clock + - description: Standalone PHY 1 VCO div clock + + power-domains: + description: + A phandle and PM domain specifier for the MMCX power domain. + maxItems: 1 + + required-opps: + description: + A phandle to an OPP node describing required MMCX performance point. + maxItems: 1 + +required: + - compatible + - clocks + - power-domains + - '#power-domain-cells' + +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + + clock-controller@af00000 { + compatible = "qcom,glymur-dispcc"; + reg = <0x0af00000 0x20000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&sleep_clk>, + <&mdss_dp_phy0 0>, + <&mdss_dp_phy0 1>, + <&mdss_dp_phy1 0>, + <&mdss_dp_phy1 1>, + <&mdss_dp_phy2 0>, + <&mdss_dp_phy2 1>, + <&mdss_dp_phy3 0>, + <&mdss_dp_phy3 1>, + <&mdss_dsi0_phy 0>, + <&mdss_dsi0_phy 1>, + <&mdss_dsi1_phy 0>, + <&mdss_dsi1_phy 1>, + <&mdss_phy0_link 0>, + <&mdss_phy0_vco_div 0>, + <&mdss_phy1_link 1>, + <&mdss_phy1_vco_div 1>; + power-domains = <&rpmhpd RPMHPD_MMCX>; + required-opps = <&rpmhpd_opp_low_svs>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +... -- cgit v1.2.3 From 9f9581ba74a931843c6d807ecfeaff9fb8c1b731 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Asbj=C3=B8rn=20Sloth=20T=C3=B8nnesen?= Date: Tue, 2 Sep 2025 15:46:35 +0000 Subject: netlink: specs: fou: change local-v6/peer-v6 check MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit While updating the binary min-len implementation, I noticed that the only user, should AFAICT be using exact-len instead. In net/ipv4/fou_core.c FOU_ATTR_LOCAL_V6 and FOU_ATTR_PEER_V6 are only used for singular IPv6 addresses, and there are AFAICT no known implementations trying to send more, it therefore appears safe to change it to an exact-len policy. This patch therefore changes the local-v6/peer-v6 attributes to use an exact-len check, instead of a min-len check. Signed-off-by: Asbjørn Sloth Tønnesen Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250902154640.759815-2-ast@fiberby.net Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/fou.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/fou.yaml b/Documentation/netlink/specs/fou.yaml index 57735726262e..8e7974ec453f 100644 --- a/Documentation/netlink/specs/fou.yaml +++ b/Documentation/netlink/specs/fou.yaml @@ -52,7 +52,7 @@ attribute-sets: name: local-v6 type: binary checks: - min-len: 16 + exact-len: 16 - name: peer-v4 type: u32 @@ -60,7 +60,7 @@ attribute-sets: name: peer-v6 type: binary checks: - min-len: 16 + exact-len: 16 - name: peer-port type: u16 -- cgit v1.2.3 From f672fcd8e6c411144a06dd07252f24805f229834 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 2 Sep 2025 17:40:52 +0200 Subject: dt-bindings: net: altr,socfpga-stmmac: Constrain interrupts STMMAC on SoCFPGA uses exactly one interrupt in in-kernel DTS and common snps,dwmac.yaml binding is flexible, so define precise constraint for this device. Signed-off-by: Krzysztof Kozlowski Acked-by: Matthew Gerlach Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250902154051.263156-3-krzysztof.kozlowski@linaro.org Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml b/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml index 3a22d35db778..fc445ad5a1f1 100644 --- a/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml +++ b/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml @@ -62,6 +62,13 @@ properties: - const: stmmaceth - const: ptp_ref + interrupts: + maxItems: 1 + + interrupt-names: + items: + - const: macirq + iommus: minItems: 1 maxItems: 2 -- cgit v1.2.3 From 69cd99350740a5acc81f46aa5def37808d8d6e78 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 2 Sep 2025 17:40:53 +0200 Subject: dt-bindings: net: renesas,rzn1-gmac: Constrain interrupts Renesas RZN1 GMAC uses three interrupts in in-kernel DTS and common snps,dwmac.yaml binding is flexible, so define precise constraint for this device. Reviewed-by: Lad Prabhakar Signed-off-by: Krzysztof Kozlowski Reviewed-by: Romain Gantois Reviewed-by: Geert Uytterhoeven Reviewed-by: Wolfram Sang Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250902154051.263156-4-krzysztof.kozlowski@linaro.org Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml b/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml index d9a8d586e260..16dd7a2631ab 100644 --- a/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml +++ b/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml @@ -30,6 +30,15 @@ properties: - const: renesas,rzn1-gmac - const: snps,dwmac + interrupts: + maxItems: 3 + + interrupt-names: + items: + - const: macirq + - const: eth_wake_irq + - const: eth_lpi + pcs-handle: description: phandle pointing to a PCS sub-node compatible with -- cgit v1.2.3 From f9b007a96a89567372a77cbddd24d5ca4be71523 Mon Sep 17 00:00:00 2001 From: Taniya Das Date: Mon, 25 Aug 2025 23:49:08 +0530 Subject: dt-bindings: clock: qcom-rpmhcc: Add support for Glymur SoCs Add bindings and update documentation compatible for RPMh clock controller on Glymur SoC. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Bjorn Andersson Signed-off-by: Taniya Das Link: https://lore.kernel.org/r/20250825-glymur-clock-controller-v5-v5-1-01b8c8681bcd@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml index a4414ba0b287..78fa05726685 100644 --- a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml @@ -17,6 +17,7 @@ description: | properties: compatible: enum: + - qcom,glymur-rpmh-clk - qcom,milos-rpmh-clk - qcom,qcs615-rpmh-clk - qcom,qdu1000-rpmh-clk -- cgit v1.2.3 From ae5b84788e5a7876a67f64761b7265529cb5a39a Mon Sep 17 00:00:00 2001 From: Taniya Das Date: Mon, 25 Aug 2025 23:49:09 +0530 Subject: dt-bindings: clock: qcom: Document the Glymur SoC TCSR Clock Controller The Glymur SoC TCSR block provides CLKREF clocks for EDP, PCIe and USB. Add this to the TCSR clock controller binding together with identifiers for the clocks. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Bjorn Andersson Signed-off-by: Taniya Das Link: https://lore.kernel.org/r/20250825-glymur-clock-controller-v5-v5-2-01b8c8681bcd@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml index 2ed7d59722fc..2c992b3437f2 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml @@ -8,12 +8,14 @@ title: Qualcomm TCSR Clock Controller on SM8550 maintainers: - Bjorn Andersson + - Taniya Das description: | Qualcomm TCSR clock control module provides the clocks, resets and power domains on SM8550 See also: + - include/dt-bindings/clock/qcom,glymur-tcsr.h - include/dt-bindings/clock/qcom,sm8550-tcsr.h - include/dt-bindings/clock/qcom,sm8650-tcsr.h - include/dt-bindings/clock/qcom,sm8750-tcsr.h @@ -22,6 +24,7 @@ properties: compatible: items: - enum: + - qcom,glymur-tcsr - qcom,milos-tcsr - qcom,sar2130p-tcsr - qcom,sm8550-tcsr -- cgit v1.2.3 From ee2d967030fee156ceb2de80ef63ddeb80d60779 Mon Sep 17 00:00:00 2001 From: Taniya Das Date: Mon, 25 Aug 2025 23:49:13 +0530 Subject: dt-bindings: clock: qcom: document the Glymur Global Clock Controller Add device tree bindings for global clock controller on Glymur SoC. Signed-off-by: Taniya Das Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250825-glymur-clock-controller-v5-v5-6-01b8c8681bcd@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- .../devicetree/bindings/clock/qcom,glymur-gcc.yaml | 121 +++++++++++++++++++++ 1 file changed, 121 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,glymur-gcc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/qcom,glymur-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,glymur-gcc.yaml new file mode 100644 index 000000000000..b05b0e6c4483 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,glymur-gcc.yaml @@ -0,0 +1,121 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,glymur-gcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller on Glymur SoC + +maintainers: + - Taniya Das + +description: | + Qualcomm global clock control module provides the clocks, resets and power + domains on Glymur SoC. + + See also: include/dt-bindings/clock/qcom,glymur-gcc.h + +properties: + compatible: + const: qcom,glymur-gcc + + clocks: + items: + - description: Board XO source + - description: Board XO_A source + - description: Sleep clock source + - description: USB 0 Phy DP0 GMUX clock source + - description: USB 0 Phy DP1 GMUX clock source + - description: USB 0 Phy PCIE PIPEGMUX clock source + - description: USB 0 Phy PIPEGMUX clock source + - description: USB 0 Phy SYS PCIE PIPEGMUX clock source + - description: USB 1 Phy DP0 GMUX 2 clock source + - description: USB 1 Phy DP1 GMUX 2 clock source + - description: USB 1 Phy PCIE PIPEGMUX clock source + - description: USB 1 Phy PIPEGMUX clock source + - description: USB 1 Phy SYS PCIE PIPEGMUX clock source + - description: USB 2 Phy DP0 GMUX 2 clock source + - description: USB 2 Phy DP1 GMUX 2 clock source + - description: USB 2 Phy PCIE PIPEGMUX clock source + - description: USB 2 Phy PIPEGMUX clock source + - description: USB 2 Phy SYS PCIE PIPEGMUX clock source + - description: PCIe 3a pipe clock + - description: PCIe 3b pipe clock + - description: PCIe 4 pipe clock + - description: PCIe 5 pipe clock + - description: PCIe 6 pipe clock + - description: QUSB4 0 PHY RX 0 clock source + - description: QUSB4 0 PHY RX 1 clock source + - description: QUSB4 1 PHY RX 0 clock source + - description: QUSB4 1 PHY RX 1 clock source + - description: QUSB4 2 PHY RX 0 clock source + - description: QUSB4 2 PHY RX 1 clock source + - description: UFS PHY RX Symbol 0 clock source + - description: UFS PHY RX Symbol 1 clock source + - description: UFS PHY TX Symbol 0 clock source + - description: USB3 PHY 0 pipe clock source + - description: USB3 PHY 1 pipe clock source + - description: USB3 PHY 2 pipe clock source + - description: USB3 UNI PHY pipe 0 clock source + - description: USB3 UNI PHY pipe 1 clock source + - description: USB4 PHY 0 pcie pipe clock source + - description: USB4 PHY 0 Max pipe clock source + - description: USB4 PHY 1 pcie pipe clock source + - description: USB4 PHY 1 Max pipe clock source + - description: USB4 PHY 2 pcie pipe clock source + - description: USB4 PHY 2 Max pipe clock source + +required: + - compatible + - clocks + - '#power-domain-cells' + +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + clock-controller@100000 { + compatible = "qcom,glymur-gcc"; + reg = <0x100000 0x1f9000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>, + <&sleep_clk>, + <&usb_0_phy_dp0_gmux>, + <&usb_0_phy_dp1_gmux>, + <&usb_0_phy_pcie_pipegmux>, + <&usb_0_phy_pipegmux>, + <&usb_0_phy_sys_pcie_pipegmux>, + <&usb_1_phy_dp0_gmux_2>, + <&usb_1_phy_dp1_gmux_2>, + <&usb_1_phy_pcie_pipegmux>, + <&usb_1_phy_pipegmux>, + <&usb_1_phy_sys_pcie_pipegmux>, + <&usb_2_phy_dp0_gmux 2>, + <&usb_2_phy_dp1_gmux 2>, + <&usb_2_phy_pcie_pipegmux>, + <&usb_2_phy_pipegmux>, + <&usb_2_phy_sys_pcie_pipegmux>, + <&pcie_3a_pipe>, <&pcie_3b_pipe>, + <&pcie_4_pipe>, <&pcie_5_pipe>, + <&pcie_6_pipe>, + <&qusb4_0_phy_rx_0>, <&qusb4_0_phy_rx_1>, + <&qusb4_1_phy_rx_0>, <&qusb4_1_phy_rx_1>, + <&qusb4_2_phy_rx_0>, <&qusb4_2_phy_rx_1>, + <&ufs_phy_rx_symbol_0>, <&ufs_phy_rx_symbol_1>, + <&ufs_phy_tx_symbol_0>, + <&usb3_phy_0_pipe>, <&usb3_phy_1_pipe>, + <&usb3_phy_2_pipe>, + <&usb3_uni_phy_pipe_0>, <&usb3_uni_phy_pipe_1>, + <&usb4_phy_0_pcie_pipe>, <&usb4_phy_0_max_pipe>, + <&usb4_phy_1_pcie_pipe>, <&usb4_phy_1_max_pipe>, + <&usb4_phy_2_pcie_pipe>, <&usb4_phy_2_max_pipe>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + +... -- cgit v1.2.3 From ac77c8f12edd894e8d3fe732d2b1c6c3de09c1aa Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 3 Sep 2025 14:58:12 +0300 Subject: dt-bindings: display/msm: dp-controller: allow eDP for SA8775P On Qualcomm SA8775P the DP controller might be driving either a DisplayPort or a eDP sink (depending on the PHY that is tied to the controller). Reflect that in the schema. Acked-by: Rob Herring (Arm) Signed-off-by: Dmitry Baryshkov Patchwork: https://patchwork.freedesktop.org/patch/672569/ Link: https://lore.kernel.org/r/20250903-dp_mst_bindings-v8-1-7526f0311eaa@oss.qualcomm.com --- .../bindings/display/msm/dp-controller.yaml | 25 ++++++++++++++++------ 1 file changed, 19 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 9923b065323b..aed3bafa67e3 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -174,12 +174,25 @@ allOf: properties: "#sound-dai-cells": false else: - properties: - aux-bus: false - reg: - minItems: 5 - required: - - "#sound-dai-cells" + if: + properties: + compatible: + contains: + enum: + - qcom,sa8775p-dp + then: + oneOf: + - required: + - aux-bus + - required: + - "#sound-dai-cells" + else: + properties: + aux-bus: false + reg: + minItems: 5 + required: + - "#sound-dai-cells" additionalProperties: false -- cgit v1.2.3 From 5484265fd685d752bb75dd8b34f617dd9991ba5c Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 3 Sep 2025 14:58:13 +0300 Subject: dt-bindings: display/msm: dp-controller: fix fallback for SM6350 Currently SM6350 uses qcom,sm8350-dp as a fallback compatible entry. This works, but adding DP MST support will reveal that this SoC is not fully compatible with SM8350 platform: the former one doesn't provide MST support, while the latter one will get it. DT schema for SM8350 is going to demand MST-related clocks which SM6350 doesn't provide. Add new entry for SM6350 with fallback to SC7180 (which belongs to the same generation and also doesn't have MST support). SC7180 has been supported by the Linux kernel long ago (and long before SM8350 support was added). Fixes: 39086151593a ("dt-bindings: display: msm: dp-controller: document SM6350 compatible") Signed-off-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Patchwork: https://patchwork.freedesktop.org/patch/672571/ Link: https://lore.kernel.org/r/20250903-dp_mst_bindings-v8-2-7526f0311eaa@oss.qualcomm.com --- .../devicetree/bindings/display/msm/dp-controller.yaml | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index aed3bafa67e3..0f814aa6f514 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -31,13 +31,25 @@ properties: - qcom,sm8650-dp - items: - enum: - - qcom,sar2130p-dp - qcom,sm6350-dp + - const: qcom,sc7180-dp + + # deprecated entry for compatibility with old DT + - items: + - enum: + - qcom,sm6350-dp + - const: qcom,sm8350-dp + deprecated: true + + - items: + - enum: + - qcom,sar2130p-dp - qcom,sm8150-dp - qcom,sm8250-dp - qcom,sm8450-dp - qcom,sm8550-dp - const: qcom,sm8350-dp + - items: - enum: - qcom,sm8750-dp -- cgit v1.2.3 From afc9e583c0b28f885ef6aa5ef6ea098204c263ed Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 3 Sep 2025 14:58:14 +0300 Subject: dt-bindings: display/msm: dp-controller: document DP on SM7150 The qcom,sm7150-dp compatible is documented in schema. Mark DisplayPort controller as compatible with SM8350. Fixes: 726eded12dd7 ("dt-bindings: display/msm: Add SM7150 MDSS") Signed-off-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Patchwork: https://patchwork.freedesktop.org/patch/672572/ Link: https://lore.kernel.org/r/20250903-dp_mst_bindings-v8-3-7526f0311eaa@oss.qualcomm.com --- Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 1 + Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml | 6 ++++-- 2 files changed, 5 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 0f814aa6f514..a18183f7ec21 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -44,6 +44,7 @@ properties: - items: - enum: - qcom,sar2130p-dp + - qcom,sm7150-dp - qcom,sm8150-dp - qcom,sm8250-dp - qcom,sm8450-dp diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml index 13c5d5ffabde..c5d209019124 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml @@ -61,7 +61,8 @@ patternProperties: additionalProperties: true properties: compatible: - const: qcom,sm7150-dp + contains: + const: qcom,sm7150-dp "^dsi@[0-9a-f]+$": type: object @@ -378,7 +379,8 @@ examples: }; displayport-controller@ae90000 { - compatible = "qcom,sm7150-dp"; + compatible = "qcom,sm7150-dp", + "qcom,sm8350-dp"; reg = <0xae90000 0x200>, <0xae90200 0x200>, <0xae90400 0xc00>, -- cgit v1.2.3 From 2c97ee44d29e90e0e1687c15bca4f1aa8eff3d78 Mon Sep 17 00:00:00 2001 From: Abhinav Kumar Date: Wed, 3 Sep 2025 14:58:15 +0300 Subject: dt-bindings: display/msm: qcom,x1e80100-mdss: correct DP addresses Fix c&p error and correct example to use 32-bit addressing (as the rest of the example DT does) instead of 64-bit (as the platform does). It got unnoticed before since DP controller node wasn't validated against DT schema because of the missing compatible. Fixes: 81de267367d4 ("dt-bindings: display/msm: Document MDSS on X1E80100") Signed-off-by: Abhinav Kumar Reviewed-by: Rob Herring (Arm) Signed-off-by: Jessica Zhang Signed-off-by: Dmitry Baryshkov Patchwork: https://patchwork.freedesktop.org/patch/672574/ Link: https://lore.kernel.org/r/20250903-dp_mst_bindings-v8-4-7526f0311eaa@oss.qualcomm.com --- .../devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml index 3b01a0e47333..e35230a86437 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml @@ -170,11 +170,11 @@ examples: displayport-controller@ae90000 { compatible = "qcom,x1e80100-dp"; - reg = <0 0xae90000 0 0x200>, - <0 0xae90200 0 0x200>, - <0 0xae90400 0 0x600>, - <0 0xae91000 0 0x400>, - <0 0xae91400 0 0x400>; + reg = <0xae90000 0x200>, + <0xae90200 0x200>, + <0xae90400 0x600>, + <0xae91000 0x400>, + <0xae91400 0x400>; interrupt-parent = <&mdss>; interrupts = <12>; -- cgit v1.2.3 From 3259ffe5b14d977c52e3e56f31cf07ca21fb314d Mon Sep 17 00:00:00 2001 From: Abhinav Kumar Date: Wed, 3 Sep 2025 14:58:16 +0300 Subject: dt-bindings: display/msm: dp-controller: add X1E80100 Add X1E80100 to the dp-controller bindings, it has DisplayPort controller similar to other platforms, but it uses its own compatible string. Signed-off-by: Abhinav Kumar Signed-off-by: Jessica Zhang Acked-by: Rob Herring (Arm) Signed-off-by: Dmitry Baryshkov Patchwork: https://patchwork.freedesktop.org/patch/672578/ Link: https://lore.kernel.org/r/20250903-dp_mst_bindings-v8-5-7526f0311eaa@oss.qualcomm.com --- Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index a18183f7ec21..6316c929fd66 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -29,6 +29,8 @@ properties: - qcom,sdm845-dp - qcom,sm8350-dp - qcom,sm8650-dp + - qcom,x1e80100-dp + - items: - enum: - qcom,sm6350-dp @@ -193,6 +195,7 @@ allOf: contains: enum: - qcom,sa8775p-dp + - qcom,x1e80100-dp then: oneOf: - required: -- cgit v1.2.3 From 0253f5ef8da491e8e694763c4aa2ac2f48ede932 Mon Sep 17 00:00:00 2001 From: Abhinav Kumar Date: Wed, 3 Sep 2025 14:58:17 +0300 Subject: dt-bindings: display/msm: drop assigned-clock-parents for dp controller DP controller schema documents assigned-clocks and assigned-clock-parents. However these assignments should not be a part of the ABI: there are no actual requirements on the order of the assignments, MST cases require different number of clocks to be assigned, etc. Instead of fixing up the documentation, drop the assigned-clock-parents and assigned-clocks from the bindings. The generic clock/clock.yaml already covers these properties. Suggested-by: Krzysztof Kozlowski Signed-off-by: Abhinav Kumar Signed-off-by: Jessica Zhang Acked-by: Rob Herring (Arm) Signed-off-by: Dmitry Baryshkov Patchwork: https://patchwork.freedesktop.org/patch/672586/ Link: https://lore.kernel.org/r/20250903-dp_mst_bindings-v8-6-7526f0311eaa@oss.qualcomm.com --- .../devicetree/bindings/display/msm/dp-controller.yaml | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 6316c929fd66..afe01332d66c 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -86,16 +86,6 @@ properties: - const: ctrl_link_iface - const: stream_pixel - assigned-clocks: - items: - - description: link clock source - - description: pixel clock source - - assigned-clock-parents: - items: - - description: phy 0 parent - - description: phy 1 parent - phys: maxItems: 1 -- cgit v1.2.3 From 9be5c47908e669db4934ef9c129b28bbc879a8be Mon Sep 17 00:00:00 2001 From: Abhinav Kumar Date: Wed, 3 Sep 2025 14:58:18 +0300 Subject: dt-bindings: display/msm: expand to support MST On a vast majority of Qualcomm chipsets DisplayPort controller can support several MST streams (up to 4x). To support MST these chipsets use up to 4 stream pixel clocks for the DisplayPort controller and several extra register regions. Expand corresponding region and clock bindings for these platforms and fix example schema files to follow updated bindings. Note: On chipsets that support MST, the number of streams supported can vary between controllers. For example, SA8775P supports 4 MST streams on mdss_dp0 but only 2 streams on mdss_dp1. Signed-off-by: Abhinav Kumar Signed-off-by: Jessica Zhang Signed-off-by: Dmitry Baryshkov Reviewed-by: Rob Herring (Arm) Patchwork: https://patchwork.freedesktop.org/patch/672585/ Link: https://lore.kernel.org/r/20250903-dp_mst_bindings-v8-7-7526f0311eaa@oss.qualcomm.com --- .../bindings/display/msm/dp-controller.yaml | 103 ++++++++++++++++++++- .../bindings/display/msm/qcom,sa8775p-mdss.yaml | 26 +++++- .../bindings/display/msm/qcom,sar2130p-mdss.yaml | 10 +- .../bindings/display/msm/qcom,sc7280-mdss.yaml | 3 +- .../bindings/display/msm/qcom,sm7150-mdss.yaml | 10 +- .../bindings/display/msm/qcom,sm8750-mdss.yaml | 10 +- .../bindings/display/msm/qcom,x1e80100-mdss.yaml | 10 +- 7 files changed, 150 insertions(+), 22 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index afe01332d66c..aeb4e4f36044 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -66,25 +66,37 @@ properties: - description: link register block - description: p0 register block - description: p1 register block + - description: p2 register block + - description: p3 register block + - description: mst2link register block + - description: mst3link register block interrupts: maxItems: 1 clocks: + minItems: 5 items: - description: AHB clock to enable register access - description: Display Port AUX clock - description: Display Port Link clock - description: Link interface clock between DP and PHY - - description: Display Port Pixel clock + - description: Display Port stream 0 Pixel clock + - description: Display Port stream 1 Pixel clock + - description: Display Port stream 2 Pixel clock + - description: Display Port stream 3 Pixel clock clock-names: + minItems: 5 items: - const: core_iface - const: core_aux - const: ctrl_link - const: ctrl_link_iface - const: stream_pixel + - const: stream_1_pixel + - const: stream_2_pixel + - const: stream_3_pixel phys: maxItems: 1 @@ -166,7 +178,6 @@ required: allOf: # AUX BUS does not exist on DP controllers # Audio output also is present only on DP output - # p1 regions is present on DP, but not on eDP - if: properties: compatible: @@ -195,11 +206,95 @@ allOf: else: properties: aux-bus: false - reg: - minItems: 5 required: - "#sound-dai-cells" + - if: + properties: + compatible: + contains: + enum: + # these platforms support SST only + - qcom,sc7180-dp + - qcom,sc7280-dp + - qcom,sc7280-edp + - qcom,sc8180x-edp + - qcom,sc8280xp-edp + then: + properties: + reg: + minItems: 5 + maxItems: 5 + clocks: + minItems: 5 + maxItems: 5 + clocks-names: + minItems: 5 + maxItems: 5 + + - if: + properties: + compatible: + contains: + enum: + # these platforms support 2 streams MST on some interfaces, + # others are SST only + - qcom,sc8280xp-dp + - qcom,x1e80100-dp + then: + properties: + reg: + minItems: 5 + maxItems: 5 + clocks: + minItems: 5 + maxItems: 6 + clocks-names: + minItems: 5 + maxItems: 6 + + - if: + properties: + compatible: + contains: + # 2 streams MST + enum: + - qcom,sc8180x-dp + - qcom,sdm845-dp + - qcom,sm8350-dp + - qcom,sm8650-dp + then: + properties: + reg: + minItems: 5 + maxItems: 5 + clocks: + minItems: 6 + maxItems: 6 + clocks-names: + minItems: 6 + maxItems: 6 + + - if: + properties: + compatible: + contains: + enum: + # these platforms support 4 stream MST on first DP, + # 2 streams MST on the second one. + - qcom,sa8775p-dp + then: + properties: + reg: + minItems: 9 + maxItems: 9 + clocks: + minItems: 6 + maxItems: 8 + clocks-names: + minItems: 6 + maxItems: 8 + additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml index 1053b3bc4908..e2730a2f25cf 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml @@ -375,7 +375,11 @@ examples: <0xaf54200 0x0c0>, <0xaf55000 0x770>, <0xaf56000 0x09c>, - <0xaf57000 0x09c>; + <0xaf57000 0x09c>, + <0xaf58000 0x09c>, + <0xaf59000 0x09c>, + <0xaf5a000 0x23c>, + <0xaf5b000 0x23c>; interrupt-parent = <&mdss0>; interrupts = <12>; @@ -384,16 +388,28 @@ examples: <&dispcc_dptx0_aux_clk>, <&dispcc_dptx0_link_clk>, <&dispcc_dptx0_link_intf_clk>, - <&dispcc_dptx0_pixel0_clk>; + <&dispcc_dptx0_pixel0_clk>, + <&dispcc_dptx0_pixel1_clk>, + <&dispcc_dptx0_pixel2_clk>, + <&dispcc_dptx0_pixel3_clk>; clock-names = "core_iface", "core_aux", "ctrl_link", "ctrl_link_iface", - "stream_pixel"; + "stream_pixel", + "stream_1_pixel", + "stream_2_pixel", + "stream_3_pixel"; assigned-clocks = <&dispcc_mdss_dptx0_link_clk_src>, - <&dispcc_mdss_dptx0_pixel0_clk_src>; - assigned-clock-parents = <&mdss0_dp0_phy 0>, <&mdss0_dp0_phy 1>; + <&dispcc_mdss_dptx0_pixel0_clk_src>, + <&dispcc_mdss_dptx0_pixel1_clk_src>, + <&dispcc_mdss_dptx0_pixel2_clk_src>, + <&dispcc_mdss_dptx0_pixel3_clk_src>; + assigned-clock-parents = <&mdss0_dp0_phy 0>, + <&mdss0_dp0_phy 1>, + <&mdss0_dp0_phy 1>, + <&mdss0_dp0_phy 1>; phys = <&mdss0_dp0_phy>; phy-names = "dp"; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml index 870144b53cec..44c1bb9e4109 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml @@ -207,16 +207,20 @@ examples: <&dispcc_disp_cc_mdss_dptx0_aux_clk>, <&dispcc_disp_cc_mdss_dptx0_link_clk>, <&dispcc_disp_cc_mdss_dptx0_link_intf_clk>, - <&dispcc_disp_cc_mdss_dptx0_pixel0_clk>; + <&dispcc_disp_cc_mdss_dptx0_pixel0_clk>, + <&dispcc_disp_cc_mdss_dptx0_pixel1_clk>; clock-names = "core_iface", "core_aux", "ctrl_link", "ctrl_link_iface", - "stream_pixel"; + "stream_pixel", + "stream_1_pixel"; assigned-clocks = <&dispcc_disp_cc_mdss_dptx0_link_clk_src>, - <&dispcc_disp_cc_mdss_dptx0_pixel0_clk_src>; + <&dispcc_disp_cc_mdss_dptx0_pixel0_clk_src>, + <&dispcc_disp_cc_mdss_dptx0_pixel1_clk_src>; assigned-clock-parents = <&usb_dp_qmpphy_QMP_USB43DP_DP_LINK_CLK>, + <&usb_dp_qmpphy_QMP_USB43DP_DP_VCO_DIV_CLK>, <&usb_dp_qmpphy_QMP_USB43DP_DP_VCO_DIV_CLK>; phys = <&usb_dp_qmpphy QMP_USB43DP_DP_PHY>; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml index 2947f27e0585..b643d3adf669 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml @@ -281,7 +281,8 @@ examples: reg = <0xaea0000 0x200>, <0xaea0200 0x200>, <0xaea0400 0xc00>, - <0xaea1000 0x400>; + <0xaea1000 0x400>, + <0xaea1400 0x400>; interrupt-parent = <&mdss>; interrupts = <14>; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml index c5d209019124..9b0621d88d50 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml @@ -394,16 +394,20 @@ examples: <&dispcc_mdss_dp_aux_clk>, <&dispcc_mdss_dp_link_clk>, <&dispcc_mdss_dp_link_intf_clk>, - <&dispcc_mdss_dp_pixel_clk>; + <&dispcc_mdss_dp_pixel_clk>, + <&dispcc_mdss_dp_pixel1_clk>; clock-names = "core_iface", "core_aux", "ctrl_link", "ctrl_link_iface", - "stream_pixel"; + "stream_pixel", + "stream_1_pixel"; assigned-clocks = <&dispcc_mdss_dp_link_clk_src>, - <&dispcc_mdss_dp_pixel_clk_src>; + <&dispcc_mdss_dp_pixel_clk_src>, + <&dispcc_mdss_dp_pixel1_clk_src>; assigned-clock-parents = <&dp_phy 0>, + <&dp_phy 1>, <&dp_phy 1>; operating-points-v2 = <&dp_opp_table>; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml index 72c70edc1fb0..4151f475f3bc 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml @@ -401,16 +401,20 @@ examples: <&disp_cc_mdss_dptx0_aux_clk>, <&disp_cc_mdss_dptx0_link_clk>, <&disp_cc_mdss_dptx0_link_intf_clk>, - <&disp_cc_mdss_dptx0_pixel0_clk>; + <&disp_cc_mdss_dptx0_pixel0_clk>, + <&disp_cc_mdss_dptx0_pixel1_clk>; clock-names = "core_iface", "core_aux", "ctrl_link", "ctrl_link_iface", - "stream_pixel"; + "stream_pixel", + "stream_1_pixel"; assigned-clocks = <&disp_cc_mdss_dptx0_link_clk_src>, - <&disp_cc_mdss_dptx0_pixel0_clk_src>; + <&disp_cc_mdss_dptx0_pixel0_clk_src>, + <&disp_cc_mdss_dptx0_pixel1_clk_src>; assigned-clock-parents = <&usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>, <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; operating-points-v2 = <&dp_opp_table>; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml index e35230a86437..8d698a2e055a 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml @@ -183,15 +183,19 @@ examples: <&dispcc_dptx0_aux_clk>, <&dispcc_dptx0_link_clk>, <&dispcc_dptx0_link_intf_clk>, - <&dispcc_dptx0_pixel0_clk>; + <&dispcc_dptx0_pixel0_clk>, + <&dispcc_dptx0_pixel1_clk>; clock-names = "core_iface", "core_aux", "ctrl_link", "ctrl_link_iface", - "stream_pixel"; + "stream_pixel", + "stream_1_pixel"; assigned-clocks = <&dispcc_mdss_dptx0_link_clk_src>, - <&dispcc_mdss_dptx0_pixel0_clk_src>; + <&dispcc_mdss_dptx0_pixel0_clk_src>, + <&dispcc_mdss_dptx0_pixel1_clk_src>; assigned-clock-parents = <&usb_1_ss0_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_ss0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>, <&usb_1_ss0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; operating-points-v2 = <&mdss_dp0_opp_table>; -- cgit v1.2.3 From 9428fff44f0c5823fde733b64a344d7a6eda3873 Mon Sep 17 00:00:00 2001 From: "hongyu.chen1" Date: Fri, 22 Aug 2025 13:39:55 +0800 Subject: dt-bindings: power: add Amlogic S6 S7 S7D power domains Add devicetree binding document and related header file for Amlogic S6 S7 S7D secure power domains. Signed-off-by: hongyu.chen1 Signed-off-by: Xianwei Zhao Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250822-pm-s6-s7-s7d-v1-1-82e3f3aff327@amlogic.com Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml index 15d74138baa3..12b71688dd34 100644 --- a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml +++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml @@ -24,6 +24,9 @@ properties: - amlogic,a5-pwrc - amlogic,c3-pwrc - amlogic,t7-pwrc + - amlogic,s6-pwrc + - amlogic,s7-pwrc + - amlogic,s7d-pwrc "#power-domain-cells": const: 1 -- cgit v1.2.3 From acd2fa47aac568052bd8321586be64958e3e93b2 Mon Sep 17 00:00:00 2001 From: Jihed Chaibi Date: Wed, 3 Sep 2025 18:01:17 +0200 Subject: ASoC: dt-bindings: everest,es8316: Document routing strings Add a list of the es8316 pin names to the binding's description to make it self-contained and improve the user experience for board developers. Signed-off-by: Jihed Chaibi Acked-by: Rob Herring (Arm) Message-ID: <20250903160119.83625-2-jihed.chaibi.dev@gmail.com> Signed-off-by: Mark Brown --- .../devicetree/bindings/sound/everest,es8316.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/everest,es8316.yaml b/Documentation/devicetree/bindings/sound/everest,es8316.yaml index e4b2eb5fae2f..81a0215050e0 100644 --- a/Documentation/devicetree/bindings/sound/everest,es8316.yaml +++ b/Documentation/devicetree/bindings/sound/everest,es8316.yaml @@ -12,6 +12,22 @@ maintainers: - Matteo Martelli - Binbin Zhou +description: | + Everest ES8311, ES8316 and ES8323 audio CODECs + + Pins on the device (for linking into audio routes): + + Outputs: + * LOUT: Left Analog Output + * ROUT: Right Analog Output + * MICBIAS: Microphone Bias + + Inputs: + * MIC1P: Microphone 1 Positive Analog Input + * MIC1N: Microphone 1 Negative Analog Input + * MIC2P: Microphone 2 Positive Analog Input + * MIC2N: Microphone 2 Negative Analog Input + allOf: - $ref: dai-common.yaml# -- cgit v1.2.3 From 118ddab8bb4a06fd5e13446d11d69e301044087d Mon Sep 17 00:00:00 2001 From: Jihed Chaibi Date: Wed, 3 Sep 2025 18:01:18 +0200 Subject: ASoC: dt-bindings: nuvoton,nau8825: Document routing strings Add a list of the nau8825 pin names to the binding's description to make it self-contained and improve the user experience for board developers. Signed-off-by: Jihed Chaibi Acked-by: Rob Herring (Arm) Message-ID: <20250903160119.83625-3-jihed.chaibi.dev@gmail.com> Signed-off-by: Mark Brown --- .../devicetree/bindings/sound/nuvoton,nau8825.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/nuvoton,nau8825.yaml b/Documentation/devicetree/bindings/sound/nuvoton,nau8825.yaml index a54f194a0b49..4ebbcb4e6056 100644 --- a/Documentation/devicetree/bindings/sound/nuvoton,nau8825.yaml +++ b/Documentation/devicetree/bindings/sound/nuvoton,nau8825.yaml @@ -9,6 +9,20 @@ title: NAU8825 audio CODEC maintainers: - John Hsu +description: | + NAU8825 audio CODEC + + Pins on the device (for linking into audio routes): + + Outputs: + * HPOL : Headphone Left Output + * HPOR : Headphone Right Output + * MICBIAS : Microphone Bias Output + + Inputs: + * MICP : Analog Microphone Positive Input + * MICN : Analog Microphone Negative Input + allOf: - $ref: dai-common.yaml# -- cgit v1.2.3 From 0ccc1eeda155c947d88ef053e0b54e434e218ee2 Mon Sep 17 00:00:00 2001 From: Jihed Chaibi Date: Wed, 3 Sep 2025 18:01:19 +0200 Subject: ASoC: dt-bindings: wlf,wm8960: Document routing strings (pin names) Add a list of the wm8960 pin names to the binding's description to make it self-contained and improve the user experience for board developers. Signed-off-by: Jihed Chaibi Reviewed-by: Charles Keepax Acked-by: Rob Herring (Arm) Message-ID: <20250903160119.83625-4-jihed.chaibi.dev@gmail.com> Signed-off-by: Mark Brown --- .../devicetree/bindings/sound/wlf,wm8960.yaml | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8960.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8960.yaml index 3c2b9790ffcf..c8c786cb6c4b 100644 --- a/Documentation/devicetree/bindings/sound/wlf,wm8960.yaml +++ b/Documentation/devicetree/bindings/sound/wlf,wm8960.yaml @@ -9,6 +9,28 @@ title: Wolfson WM8960 audio codec maintainers: - patches@opensource.cirrus.com +description: | + Wolfson WM8960 audio codec + + Pins on the device (for linking into audio routes): + + Outputs: + * HP_L : Left Headphone/Line Output + * HP_R : Right Headphone/Line Output + * SPK_LP : Left Speaker Output (Positive) + * SPK_LN : Left Speaker Output (Negative) + * SPK_RP : Right Speaker Output (Positive) + * SPK_RN : Right Speaker Output (Negative) + * OUT3 : Mono, Left, Right or buffered midrail output for capless mode + + Inputs: + * LINPUT1 : Left single-ended or negative differential microphone input + * RINPUT1 : Right single-ended or negative differential microphone input + * LINPUT2 : Left line input or positive differential microphone input + * RINPUT2 : Right line input or positive differential microphone input + * LINPUT3 : Left line input, positive differential microphone, or Jack Detect 2 + * RINPUT3 : Right line input, positive differential microphone, or Jack Detect 3 + properties: compatible: const: wlf,wm8960 -- cgit v1.2.3 From 7748328c2fd82efed24257b2bfd796eb1fa1d09b Mon Sep 17 00:00:00 2001 From: Mohammad Rafi Shaik Date: Wed, 3 Sep 2025 20:43:30 +0530 Subject: ASoC: dt-bindings: qcom,lpass-va-macro: Update bindings for clocks to support ADSP Manage clock settings for ADSP solution. On Existing ADSP bypass solutions, the macro and dcodec GDSCs are enabled using power domains in lpass-va-macro which is not applicable for ADSP based platform. Co-developed-by: Prasad Kumpatla Signed-off-by: Prasad Kumpatla Signed-off-by: Mohammad Rafi Shaik Reviewed-by: Krzysztof Kozlowski Message-ID: <20250903151337.1037246-2-mohammad.rafi.shaik@oss.qualcomm.com> Signed-off-by: Mark Brown --- .../bindings/sound/qcom,lpass-va-macro.yaml | 23 +++++++++++++++++----- 1 file changed, 18 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml index 2e8c26d89b00..1c0d78af3c05 100644 --- a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml @@ -80,12 +80,25 @@ allOf: compatible: contains: const: qcom,sc7280-lpass-va-macro + then: - properties: - clocks: - maxItems: 1 - clock-names: - maxItems: 1 + if: + required: + - power-domains + then: + properties: + clocks: + maxItems: 1 + clock-names: + maxItems: 1 + else: + properties: + clocks: + minItems: 3 + maxItems: 3 + clock-names: + minItems: 3 + maxItems: 3 - if: properties: -- cgit v1.2.3 From 759b5ce3e6e804ee333f0e0da3cf93c38b77b890 Mon Sep 17 00:00:00 2001 From: Cryolitia PukNgae Date: Wed, 3 Sep 2025 13:09:46 +0800 Subject: ALSA: usb-audio: add quirk QUIRK_FLAG_MIXER_CAPTURE_MIN_MUTE The same hardware problem to QUIRK_FLAG_MIXER_PLAYBACK_MIN_MUTE also occurs on the capture streams on some USB devices. Add a new flag for processing the quirk. Link: https://lore.kernel.org/all/C22C1A172EBB9BD9+eccc2e4a-d21e-4a7d-848c-bbf3982feb94@uniontech.com/ Signed-off-by: Cryolitia PukNgae Signed-off-by: Takashi Iwai Link: https://patch.msgid.link/20250903-sound-v1-2-d4ca777b8512@uniontech.com --- Documentation/sound/alsa-configuration.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/sound/alsa-configuration.rst b/Documentation/sound/alsa-configuration.rst index 062b86522e4d..bf45df1558bb 100644 --- a/Documentation/sound/alsa-configuration.rst +++ b/Documentation/sound/alsa-configuration.rst @@ -2329,6 +2329,7 @@ quirk_flags * bit 24: Set minimum volume control value as mute for devices where the lowest playback value represents muted state instead of minimum audible volume + * bit 25: Be similar to bit 24 but for capture streams This module supports multiple devices, autoprobe and hotplugging. -- cgit v1.2.3 From 4d32c1f66a768dd281edadbd244dce1c63c0899d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Barnab=C3=A1s=20Cz=C3=A9m=C3=A1n?= Date: Wed, 3 Sep 2025 23:08:21 +0200 Subject: dt-bindings: clock: qcom: Add MSM8937 Global Clock Controller MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add device tree bindings for the global clock controller on Qualcomm MSM8937 platform. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Barnabás Czémán Link: https://lore.kernel.org/r/20250903-msm8937-v9-1-a097c91c5801@mainlining.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml index fe1f5f3ed992..f2e37f439d28 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml @@ -9,16 +9,21 @@ title: Qualcomm Global Clock & Reset Controller on MSM8953 maintainers: - Adam Skladowski - Sireesh Kodali + - Barnabas Czeman description: | Qualcomm global clock control module provides the clocks, resets and power - domains on MSM8953. + domains on MSM8937 or MSM8953. - See also: include/dt-bindings/clock/qcom,gcc-msm8953.h + See also:: + include/dt-bindings/clock/qcom,gcc-msm8917.h + include/dt-bindings/clock/qcom,gcc-msm8953.h properties: compatible: - const: qcom,gcc-msm8953 + enum: + - qcom,gcc-msm8937 + - qcom,gcc-msm8953 clocks: items: -- cgit v1.2.3 From cf13bed78c90b2c0fc65774e86d564c868fa2a23 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Barnab=C3=A1s=20Cz=C3=A9m=C3=A1n?= Date: Wed, 3 Sep 2025 23:08:23 +0200 Subject: dt-bindings: firmware: qcom,scm: Add MSM8937 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add compatible for MSM8937. Acked-by: Krzysztof Kozlowski Signed-off-by: Barnabás Czémán Link: https://lore.kernel.org/r/20250903-msm8937-v9-3-a097c91c5801@mainlining.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml index b913192219e4..ef97faac7e47 100644 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml @@ -36,6 +36,7 @@ properties: - qcom,scm-msm8226 - qcom,scm-msm8660 - qcom,scm-msm8916 + - qcom,scm-msm8937 - qcom,scm-msm8953 - qcom,scm-msm8960 - qcom,scm-msm8974 @@ -134,6 +135,7 @@ allOf: - qcom,scm-msm8226 - qcom,scm-msm8660 - qcom,scm-msm8916 + - qcom,scm-msm8937 - qcom,scm-msm8953 - qcom,scm-msm8960 - qcom,scm-msm8974 @@ -177,6 +179,7 @@ allOf: - qcom,scm-mdm9607 - qcom,scm-msm8226 - qcom,scm-msm8916 + - qcom,scm-msm8937 - qcom,scm-msm8953 - qcom,scm-msm8974 - qcom,scm-msm8976 -- cgit v1.2.3 From 604a932fa924e7b15be47c6208a305f289cfa309 Mon Sep 17 00:00:00 2001 From: SungMin Park Date: Mon, 1 Sep 2025 10:49:23 +0530 Subject: dt-bindings: arm: axis: Add ARTPEC-8 grizzly board Document the Axis ARTPEC-8 SoC binding and the grizzly board which uses ARTPEC-8 SoC. Signed-off-by: SungMin Park Signed-off-by: SeonGu Kang Signed-off-by: Ravi Patel Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250901051926.59970-4-ravi.patel@samsung.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/axis.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/axis.yaml b/Documentation/devicetree/bindings/arm/axis.yaml index f9c218dc6883..63e9aca85db7 100644 --- a/Documentation/devicetree/bindings/arm/axis.yaml +++ b/Documentation/devicetree/bindings/arm/axis.yaml @@ -8,6 +8,7 @@ title: Axis ARTPEC platforms maintainers: - Jesper Nilsson + - Lars Persson - linux-arm-kernel@axis.com description: | @@ -24,6 +25,12 @@ properties: - axis,artpec6-dev-board - const: axis,artpec6 + - description: Axis ARTPEC-8 SoC board + items: + - enum: + - axis,artpec8-grizzly + - const: axis,artpec8 + additionalProperties: true ... -- cgit v1.2.3 From 632ff61706473127cdc3b779bf24d368e3856ab3 Mon Sep 17 00:00:00 2001 From: "Borislav Petkov (AMD)" Date: Wed, 20 Aug 2025 15:50:42 +0200 Subject: x86/microcode: Add microcode= cmdline parsing Add a "microcode=" command line argument after which all options can be passed in a comma-separated list. Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Sohil Mehta Reviewed-by: Chang S. Bae Link: https://lore.kernel.org/20250820135043.19048-2-bp@kernel.org --- Documentation/admin-guide/kernel-parameters.txt | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 747a55abf494..9e3bbce6583f 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -3767,8 +3767,12 @@ mga= [HW,DRM] - microcode.force_minrev= [X86] - Format: + microcode= [X86] Control the behavior of the microcode loader. + Available options, comma separated: + + dis_ucode_ldr: disable the microcode loader + + force_minrev: Enable or disable the microcode minimal revision enforcement for the runtime microcode loader. -- cgit v1.2.3 From 3cd4c4f3955bd97470cc8728c28327cffb09f71e Mon Sep 17 00:00:00 2001 From: Conley Lee Date: Wed, 3 Sep 2025 16:22:38 +0800 Subject: dt-bindings: net: sun4i-emac: add dma support The sun4i EMAC supports DMA for data transmission, so it is necessary to add DMA options to the device tree bindings. Signed-off-by: Conley Lee Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/tencent_4E434174E9D516431365413D1B8047C6BB06@qq.com Signed-off-by: Jakub Kicinski --- .../devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml index eb26623dab51..d4d8f3a7918e 100644 --- a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml +++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml @@ -33,6 +33,15 @@ properties: - items: - description: phandle to SRAM - description: register value for device + dmas: + items: + - description: RX DMA Channel + - description: TX DMA Channel + + dma-names: + items: + - const: rx + - const: tx required: - compatible -- cgit v1.2.3 From 43181a47263dd9f2bee0afd688a841b09f9b7d12 Mon Sep 17 00:00:00 2001 From: "Borislav Petkov (AMD)" Date: Wed, 20 Aug 2025 15:50:43 +0200 Subject: x86/microcode: Add microcode loader debugging functionality Instead of adding ad-hoc debugging glue to the microcode loader each time I need it, add debugging functionality which is not built by default. Simulate all patch handling the loader does except the actual loading of the microcode patch into the hardware. Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/20250820135043.19048-3-bp@kernel.org --- Documentation/admin-guide/kernel-parameters.txt | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 9e3bbce6583f..2c142e5f9f06 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -3770,6 +3770,10 @@ microcode= [X86] Control the behavior of the microcode loader. Available options, comma separated: + base_rev=X - with with format: + Set the base microcode revision of each thread when in + debug mode. + dis_ucode_ldr: disable the microcode loader force_minrev: -- cgit v1.2.3 From 0fec357ad073e555e7553dbc0d32278b0aaa2179 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= Date: Sun, 24 Aug 2025 18:12:05 +0200 Subject: dt-bindings: input: touchscreen: imagis: add missing minItems MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The binding currently expects exactly 5 keycodes, which matches the chip's theoretical maximum but probably not the number of touch keys on any phone using the IST3032C. Add a minItems value of 2 to prevent dt-validate complaints. Also add another example to make sure the linux,keycodes property is checked. Signed-off-by: Duje Mihanović Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250824-imagis-minitems-v1-1-cea9db55e87f@dujemihanovic.xyz Signed-off-by: Dmitry Torokhov --- .../bindings/input/touchscreen/imagis,ist3038c.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml b/Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml index bd8ede3a4ad8..0ef79343bf9a 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml @@ -35,6 +35,7 @@ properties: linux,keycodes: description: Keycodes for the touch keys + minItems: 2 maxItems: 5 touchscreen-size-x: true @@ -87,5 +88,22 @@ examples: touchscreen-inverted-y; }; }; + - | + #include + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + touchscreen@50 { + compatible = "imagis,ist3032c"; + reg = <0x50>; + interrupt-parent = <&gpio>; + interrupts = <72 IRQ_TYPE_EDGE_FALLING>; + vdd-supply = <&ldo2>; + touchscreen-size-x = <480>; + touchscreen-size-y = <800>; + linux,keycodes = , ; + }; + }; ... -- cgit v1.2.3 From f5e36ecc9e4a2a4bcd942ad1e9947e018ffd15b5 Mon Sep 17 00:00:00 2001 From: E Shattow Date: Sat, 23 Aug 2025 03:01:41 -0700 Subject: dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC Describe JH7110 SoC DDR external memory interface. Signed-off-by: E Shattow Reviewed-by: Krzysztof Kozlowski Reviewed-by: Emil Renner Berthing Signed-off-by: Conor Dooley --- .../memory-controllers/starfive,jh7110-dmc.yaml | 74 ++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/starfive,jh7110-dmc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/memory-controllers/starfive,jh7110-dmc.yaml b/Documentation/devicetree/bindings/memory-controllers/starfive,jh7110-dmc.yaml new file mode 100644 index 000000000000..d65313b33a3e --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/starfive,jh7110-dmc.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/starfive,jh7110-dmc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive JH7110 DMC + +maintainers: + - E Shattow + +description: + JH7110 DDR external memory interface LPDDR4/DDR4/DDR3/LPDDR3 32-bit at + 2133Mbps (up to 2800Mbps). + +properties: + compatible: + items: + - const: starfive,jh7110-dmc + + reg: + items: + - description: controller registers + - description: phy registers + + clocks: + maxItems: 1 + + clock-names: + items: + - const: pll + + resets: + items: + - description: axi + - description: osc + - description: apb + + reset-names: + items: + - const: axi + - const: osc + - const: apb + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + +additionalProperties: false + +examples: + - | + #include + #include + soc { + #address-cells = <2>; + #size-cells = <2>; + + memory-controller@15700000 { + compatible = "starfive,jh7110-dmc"; + reg = <0x0 0x15700000 0x0 0x10000>, + <0x0 0x13000000 0x0 0x10000>; + clocks = <&syscrg JH7110_PLLCLK_PLL1_OUT>; + clock-names = "pll"; + resets = <&syscrg JH7110_SYSRST_DDR_AXI>, + <&syscrg JH7110_SYSRST_DDR_OSC>, + <&syscrg JH7110_SYSRST_DDR_APB>; + reset-names = "axi", "osc", "apb"; + }; + }; -- cgit v1.2.3 From cce65107897d699c78373b88f3fe94602f194d0e Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 29 Aug 2025 18:04:40 -0500 Subject: dt-bindings: gpu: Convert aspeed,ast2400-gfx to DT schema Convert the ASpeed GFX Display Controller binding to DT schema format. There was a duplicate, incomplete binding in mfd which can be dropped. Add the missing 'aspeed,ast2600-gfx' compatible and 'syscon' property. Reviewed-by: Andrew Jeffery Link: https://lore.kernel.org/r/20250829230442.1495926-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/gpu/aspeed,ast2400-gfx.yaml | 63 ++++++++++++++++++++++ .../devicetree/bindings/gpu/aspeed-gfx.txt | 41 -------------- .../devicetree/bindings/mfd/aspeed-gfx.txt | 17 ------ 3 files changed, 63 insertions(+), 58 deletions(-) create mode 100644 Documentation/devicetree/bindings/gpu/aspeed,ast2400-gfx.yaml delete mode 100644 Documentation/devicetree/bindings/gpu/aspeed-gfx.txt delete mode 100644 Documentation/devicetree/bindings/mfd/aspeed-gfx.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpu/aspeed,ast2400-gfx.yaml b/Documentation/devicetree/bindings/gpu/aspeed,ast2400-gfx.yaml new file mode 100644 index 000000000000..20a4e00086ee --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/aspeed,ast2400-gfx.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/aspeed,ast2400-gfx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED GFX Display Controller + +maintainers: + - Joel Stanley + +properties: + compatible: + items: + - enum: + - aspeed,ast2400-gfx + - aspeed,ast2500-gfx + - aspeed,ast2600-gfx + - const: syscon + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + interrupts: + maxItems: 1 + + memory-region: + maxItems: 1 + description: + a reserved-memory region to use for the framebuffer. + + syscon: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to SCU + +required: + - compatible + - reg + - interrupts + - clocks + - resets + - memory-region + +additionalProperties: false + +examples: + - | + #include + + display@1e6e6000 { + compatible = "aspeed,ast2500-gfx", "syscon"; + reg = <0x1e6e6000 0x1000>; + clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; + resets = <&syscon ASPEED_RESET_CRT1>; + interrupts = <0x19>; + memory-region = <&gfx_memory>; + }; diff --git a/Documentation/devicetree/bindings/gpu/aspeed-gfx.txt b/Documentation/devicetree/bindings/gpu/aspeed-gfx.txt deleted file mode 100644 index 958bdf962339..000000000000 --- a/Documentation/devicetree/bindings/gpu/aspeed-gfx.txt +++ /dev/null @@ -1,41 +0,0 @@ -Device tree configuration for the GFX display device on the ASPEED SoCs - -Required properties: - - compatible - * Must be one of the following: - + aspeed,ast2500-gfx - + aspeed,ast2400-gfx - * In addition, the ASPEED pinctrl bindings require the 'syscon' property to - be present - - - reg: Physical base address and length of the GFX registers - - - interrupts: interrupt number for the GFX device - - - clocks: clock number used to generate the pixel clock - - - resets: reset line that must be released to use the GFX device - - - memory-region: - Phandle to a memory region to allocate from, as defined in - Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt - - -Example: - -gfx: display@1e6e6000 { - compatible = "aspeed,ast2500-gfx", "syscon"; - reg = <0x1e6e6000 0x1000>; - reg-io-width = <4>; - clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; - resets = <&syscon ASPEED_RESET_CRT1>; - interrupts = <0x19>; - memory-region = <&gfx_memory>; -}; - -gfx_memory: framebuffer { - size = <0x01000000>; - alignment = <0x01000000>; - compatible = "shared-dma-pool"; - reusable; -}; diff --git a/Documentation/devicetree/bindings/mfd/aspeed-gfx.txt b/Documentation/devicetree/bindings/mfd/aspeed-gfx.txt deleted file mode 100644 index aea5370efd97..000000000000 --- a/Documentation/devicetree/bindings/mfd/aspeed-gfx.txt +++ /dev/null @@ -1,17 +0,0 @@ -* Device tree bindings for Aspeed SoC Display Controller (GFX) - -The Aspeed SoC Display Controller primarily does as its name suggests, but also -participates in pinmux requests on the g5 SoCs. It is therefore considered a -syscon device. - -Required properties: -- compatible: "aspeed,ast2500-gfx", "syscon" -- reg: contains offset/length value of the GFX memory - region. - -Example: - -gfx: display@1e6e6000 { - compatible = "aspeed,ast2500-gfx", "syscon"; - reg = <0x1e6e6000 0x1000>; -}; -- cgit v1.2.3 From b28f9eba12a4967eff6e8a1c0512f86f1ac7fa68 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sat, 28 Jun 2025 11:37:30 -0400 Subject: change the calling conventions for vfs_parse_fs_string() Absolute majority of callers are passing the 4th argument equal to strlen() of the 3rd one. Drop the v_size argument, add vfs_parse_fs_qstr() for the cases that want independent length. Reviewed-by: Christian Brauner Signed-off-by: Al Viro --- Documentation/filesystems/mount_api.rst | 10 +++++++++- Documentation/filesystems/porting.rst | 12 ++++++++++++ 2 files changed, 21 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/mount_api.rst b/Documentation/filesystems/mount_api.rst index e149b89118c8..c99ab1f7fea4 100644 --- a/Documentation/filesystems/mount_api.rst +++ b/Documentation/filesystems/mount_api.rst @@ -504,10 +504,18 @@ returned. clear the pointer, but then becomes responsible for disposing of the object. + * :: + + int vfs_parse_fs_qstr(struct fs_context *fc, const char *key, + const struct qstr *value); + + A wrapper around vfs_parse_fs_param() that copies the value string it is + passed. + * :: int vfs_parse_fs_string(struct fs_context *fc, const char *key, - const char *value, size_t v_size); + const char *value); A wrapper around vfs_parse_fs_param() that copies the value string it is passed. diff --git a/Documentation/filesystems/porting.rst b/Documentation/filesystems/porting.rst index 85f590254f07..ab48ab3f6eb2 100644 --- a/Documentation/filesystems/porting.rst +++ b/Documentation/filesystems/porting.rst @@ -1285,3 +1285,15 @@ rather than a VMA, as the VMA at this stage is not yet valid. The vm_area_desc provides the minimum required information for a filesystem to initialise state upon memory mapping of a file-backed region, and output parameters for the file system to set this state. + +--- + +**mandatory** + +Calling conventions for vfs_parse_fs_string() have changed; it does *not* +take length anymore (value ? strlen(value) : 0 is used). If you want +a different length, use + + vfs_parse_fs_qstr(fc, key, &QSTR_LEN(value, len)) + +instead. -- cgit v1.2.3 From 24452d9ef17502965021ce5df30f4e184245a5ac Mon Sep 17 00:00:00 2001 From: Kees Cook Date: Wed, 3 Sep 2025 20:46:42 -0700 Subject: x86/cfi: Document the "cfi=" bootparam options The kernel-parameters.txt didn't have a section for the cfi= options. Add it. Signed-off-by: Kees Cook Signed-off-by: Peter Zijlstra (Intel) Reviewed-by: Nathan Chancellor Link: https://lore.kernel.org/r/20250904034656.3670313-3-kees@kernel.org --- Documentation/admin-guide/kernel-parameters.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 747a55abf494..8bbffbb334ab 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -608,6 +608,23 @@ ccw_timeout_log [S390] See Documentation/arch/s390/common_io.rst for details. + cfi= [X86-64] Set Control Flow Integrity checking features + when CONFIG_FINEIBT is enabled. + Format: feature[,feature...] + Default: auto + + auto: Use FineIBT if IBT available, otherwise kCFI. + Under FineIBT, enable "paranoid" mode when + FRED is not available. + off: Turn off CFI checking. + kcfi: Use kCFI (disable FineIBT). + fineibt: Use FineIBT (even if IBT not available). + norand: Do not re-randomize CFI hashes. + paranoid: Add caller hash checking under FineIBT. + bhi: Enable register poisoning to stop speculation + across FineIBT. (Disabled by default.) + warn: Do not enforce CFI checking: warn only. + cgroup_disable= [KNL] Disable a particular controller or optional feature Format: {name of the controller(s) or feature(s) to disable} The effects of cgroup_disable=foo are: -- cgit v1.2.3 From 026211c40b055485b4c65c10d644a92864623225 Mon Sep 17 00:00:00 2001 From: Kees Cook Date: Wed, 3 Sep 2025 20:46:44 -0700 Subject: x86/cfi: Add "debug" option to "cfi=" bootparam Add "debug" option for "cfi=" bootparam to get details on early CFI initialization steps so future Kees can find breakage easier. Signed-off-by: Kees Cook Signed-off-by: Peter Zijlstra (Intel) Link: https://lore.kernel.org/r/20250904034656.3670313-5-kees@kernel.org --- Documentation/admin-guide/kernel-parameters.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 8bbffbb334ab..c8337d0e6ba3 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -624,6 +624,7 @@ bhi: Enable register poisoning to stop speculation across FineIBT. (Disabled by default.) warn: Do not enforce CFI checking: warn only. + debug: Report CFI initialization details. cgroup_disable= [KNL] Disable a particular controller or optional feature Format: {name of the controller(s) or feature(s) to disable} -- cgit v1.2.3 From 725386ca1949a570d8b73b179518998d399031bf Mon Sep 17 00:00:00 2001 From: Andrea della Porta Date: Thu, 28 Aug 2025 15:17:10 +0200 Subject: dt-bindings: mmc: Add support for capabilities to Broadcom SDHCI controller The Broadcom BRCMSTB SDHCI Controller device supports Common properties in terms of Capabilities. Reference sdhci-common schema instead of mmc-controller in order for capabilities to be specified in DT nodes avoiding warnings from the DT compiler. Signed-off-by: Andrea della Porta Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/181cc905566f2d9b2e5076295cd285230f81ed07.1756386531.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli --- Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml b/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml index eee6be7a7867..493655a38b37 100644 --- a/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml +++ b/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml @@ -61,7 +61,7 @@ properties: description: Specifies that controller should use auto CMD12 allOf: - - $ref: mmc-controller.yaml# + - $ref: sdhci-common.yaml# - if: properties: clock-names: -- cgit v1.2.3 From d9c74e6f8125ef43d0282c12cb788ae4c5290c27 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 22 Aug 2025 12:34:37 +0300 Subject: dt-bindings: net: cdns,macb: Add compatible for Raspberry Pi RP1 The Raspberry Pi RP1 chip has the Cadence GEM ethernet controller, so add a compatible string for it. Signed-off-by: Dave Stevenson Signed-off-by: Stanimir Varbanov Reviewed-by: Andrew Lunn Acked-by: Conor Dooley Reviewed-by: Nicolas Ferre Reviewed-by: Claudiu Beznea Link: https://patch.msgid.link/20250822093440.53941-3-svarbanov@suse.de Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/cdns,macb.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml index 559d0f733e7e..0591da97d434 100644 --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml @@ -54,6 +54,7 @@ properties: - cdns,np4-macb # NP4 SoC devices - microchip,sama7g5-emac # Microchip SAMA7G5 ethernet interface - microchip,sama7g5-gem # Microchip SAMA7G5 gigabit ethernet interface + - raspberrypi,rp1-gem # Raspberry Pi RP1 gigabit ethernet interface - sifive,fu540-c000-gem # SiFive FU540-C000 SoC - cdns,emac # Generic - cdns,gem # Generic -- cgit v1.2.3 From f4c45db8a10b270bdd4a1644f545576c03ead523 Mon Sep 17 00:00:00 2001 From: Raphael Gallais-Pou Date: Fri, 29 Aug 2025 11:13:25 +0200 Subject: dt-bindings: panel: lvds: Append edt,etml0700z8dha in panel-lvds List EDT ETML0700Z8DHA in the LVDS panel enumeration. Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250829-drm-misc-next-v1-1-fedb48cf50dd@foss.st.com Signed-off-by: Raphael Gallais-Pou --- Documentation/devicetree/bindings/display/panel/panel-lvds.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml index f8f95e772778..4388d5375851 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml @@ -48,6 +48,8 @@ properties: - auo,g084sn05 # Chunghwa Picture Tubes Ltd. 7" WXGA (800x1280) TFT LCD LVDS panel - chunghwa,claa070wp03xg + # EDT ETML0700Z8DHA 7.0" Full HD (1920x1080) color TFT LCD LVDS panel + - edt,etml0700z8dha # EDT ETML0700Z9NDHA 7.0" WSVGA (1024x600) color TFT LCD LVDS panel - edt,etml0700z9ndha # HannStar Display Corp. HSD101PWW2 10.1" WXGA (1280x800) LVDS panel -- cgit v1.2.3 From 09b26dce32f0d3065e6cfbc1095fc21fd5159921 Mon Sep 17 00:00:00 2001 From: Wig Cheng Date: Tue, 2 Sep 2025 14:53:18 +0800 Subject: dt-bindings: vendor-prefixes: Add Mayqueen name Mayqueen is a Taiwan-based company primarily focused on the development of arm64 development boards and e-paper displays. Signed-off-by: Wig Cheng Acked-by: Rob Herring (Arm) Acked-by: Krzysztof Kozlowski Signed-off-by: Thomas Zimmermann Link: https://lore.kernel.org/r/20250902-drm-v5-1-d77c678c4ae3@gmail.com --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index abc43c43813a..7d74ecfee675 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -933,6 +933,8 @@ patternProperties: description: Maxim Integrated Products "^maxlinear,.*": description: MaxLinear Inc. + "^mayqueen,.*": + description: Mayqueen Technologies Ltd. "^mbvl,.*": description: Mobiveil Inc. "^mcube,.*": -- cgit v1.2.3 From d309c5fdf4a795e587f1852e2caf7f205c1bdffc Mon Sep 17 00:00:00 2001 From: LiangCheng Wang Date: Tue, 2 Sep 2025 14:53:19 +0800 Subject: dt-bindings: display: Add Mayqueen Pixpaper e-ink panel The binding is for the Mayqueen Pixpaper e-ink display panel, controlled via an SPI interface. Signed-off-by: LiangCheng Wang Reviewed-by: Rob Herring (Arm) Signed-off-by: Thomas Zimmermann Link: https://lore.kernel.org/r/20250902-drm-v5-2-d77c678c4ae3@gmail.com --- .../bindings/display/mayqueen,pixpaper.yaml | 63 ++++++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/mayqueen,pixpaper.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/mayqueen,pixpaper.yaml b/Documentation/devicetree/bindings/display/mayqueen,pixpaper.yaml new file mode 100644 index 000000000000..cd27f8ba5ae1 --- /dev/null +++ b/Documentation/devicetree/bindings/display/mayqueen,pixpaper.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/mayqueen,pixpaper.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mayqueen Pixpaper e-ink display panel + +maintainers: + - LiangCheng Wang + +description: + The Pixpaper is an e-ink display panel controlled via an SPI interface. + The panel has a resolution of 122x250 pixels and requires GPIO pins for + reset, busy, and data/command control. + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + const: mayqueen,pixpaper + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 1000000 + default: 1000000 + + reset-gpios: + maxItems: 1 + + busy-gpios: + maxItems: 1 + + dc-gpios: + maxItems: 1 + +required: + - compatible + - reg + - reset-gpios + - busy-gpios + - dc-gpios + +unevaluatedProperties: false + +examples: + - | + #include + spi { + #address-cells = <1>; + #size-cells = <0>; + display@0 { + compatible = "mayqueen,pixpaper"; + reg = <0>; + spi-max-frequency = <1000000>; + reset-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; + busy-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; + dc-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>; + }; + }; -- cgit v1.2.3 From f5d15ff664a32593e0152d21ea747fb77e32ce7e Mon Sep 17 00:00:00 2001 From: Woodrow Douglass Date: Fri, 5 Sep 2025 08:39:42 -0400 Subject: regulator: dt-bindings: nxp,pf530x: Add NXP PF5300/PF5301/PF5302 PMICs Bindings for the pf530x series of voltage regulators Signed-off-by: Woodrow Douglass Reviewed-by: Krzysztof Kozlowski Message-ID: <20250902-pf530x-v7-1-10eb2542f944@carnegierobotics.com> Signed-off-by: Mark Brown --- .../devicetree/bindings/regulator/nxp,pf5300.yaml | 54 ++++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/nxp,pf5300.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/regulator/nxp,pf5300.yaml b/Documentation/devicetree/bindings/regulator/nxp,pf5300.yaml new file mode 100644 index 000000000000..5b9d5d4e48d0 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/nxp,pf5300.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/nxp,pf5300.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP PF5300/PF5301/PF5302 PMIC regulators + +maintainers: + - Woodrow Douglass + +description: | + The PF5300, PF5301, and PF5302 integrate high-performance buck converters, + 12 A, 8 A, and 15 A, respectively, to power high-end automotive and industrial + processors. With adaptive voltage positioning and a high-bandwidth loop, they + offer transient regulation to minimize capacitor requirements. + +allOf: + - $ref: regulator.yaml# + +properties: + compatible: + oneOf: + - const: nxp,pf5300 + - items: + - enum: + - nxp,pf5301 + - nxp,pf5302 + - const: nxp,pf5300 + reg: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + regulator@28 { + compatible = "nxp,pf5302", "nxp,pf5300"; + reg = <0x28>; + + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1200000>; + regulator-min-microvolt = <500000>; + }; + }; -- cgit v1.2.3 From f69260511c69888bdec048153d0d475d4c8b0b3e Mon Sep 17 00:00:00 2001 From: "Darrick J. Wong" Date: Wed, 27 Aug 2025 09:30:58 -0700 Subject: xfs: disable deprecated features by default in Kconfig We promised to turn off these old features by default in September 2025. Do so now. Signed-off-by: "Darrick J. Wong" Reviewed-by: Carlos Maiolino --- Documentation/admin-guide/xfs.rst | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/xfs.rst b/Documentation/admin-guide/xfs.rst index a18328a5fb93..693b09ca6292 100644 --- a/Documentation/admin-guide/xfs.rst +++ b/Documentation/admin-guide/xfs.rst @@ -253,9 +253,8 @@ latest version and try again. The deprecation will take place in two parts. Support for mounting V4 filesystems can now be disabled at kernel build time via Kconfig option. -The option will default to yes until September 2025, at which time it -will be changed to default to no. In September 2030, support will be -removed from the codebase entirely. +These options were changed to default to no in September 2025. In +September 2030, support will be removed from the codebase entirely. Note: Distributors may choose to withdraw V4 format support earlier than the dates listed above. -- cgit v1.2.3 From b9a176e54162f890aaf50ac8a467d725ed2f00df Mon Sep 17 00:00:00 2001 From: "Darrick J. Wong" Date: Tue, 2 Sep 2025 14:33:53 -0700 Subject: xfs: remove deprecated mount options These four mount options were scheduled for removal in September 2025, so remove them now. Cc: preichl@redhat.com Signed-off-by: "Darrick J. Wong" Reviewed-by: Carlos Maiolino --- Documentation/admin-guide/xfs.rst | 26 ++------------------------ 1 file changed, 2 insertions(+), 24 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/xfs.rst b/Documentation/admin-guide/xfs.rst index 693b09ca6292..7ad746a3e66c 100644 --- a/Documentation/admin-guide/xfs.rst +++ b/Documentation/admin-guide/xfs.rst @@ -34,22 +34,6 @@ When mounting an XFS filesystem, the following options are accepted. to the file. Specifying a fixed ``allocsize`` value turns off the dynamic behaviour. - attr2 or noattr2 - The options enable/disable an "opportunistic" improvement to - be made in the way inline extended attributes are stored - on-disk. When the new form is used for the first time when - ``attr2`` is selected (either when setting or removing extended - attributes) the on-disk superblock feature bit field will be - updated to reflect this format being in use. - - The default behaviour is determined by the on-disk feature - bit indicating that ``attr2`` behaviour is active. If either - mount option is set, then that becomes the new default used - by the filesystem. - - CRC enabled filesystems always use the ``attr2`` format, and so - will reject the ``noattr2`` mount option if it is set. - discard or nodiscard (default) Enable/disable the issuing of commands to let the block device reclaim space freed by the filesystem. This is @@ -75,12 +59,6 @@ When mounting an XFS filesystem, the following options are accepted. across the entire filesystem rather than just on directories configured to use it. - ikeep or noikeep (default) - When ``ikeep`` is specified, XFS does not delete empty inode - clusters and keeps them around on disk. When ``noikeep`` is - specified, empty inode clusters are returned to the free - space pool. - inode32 or inode64 (default) When ``inode32`` is specified, it indicates that XFS limits inode creation to locations which will not result in inode @@ -267,8 +245,6 @@ Deprecated Mount Options ============================ ================ Mounting with V4 filesystem September 2030 Mounting ascii-ci filesystem September 2030 -ikeep/noikeep September 2025 -attr2/noattr2 September 2025 ============================ ================ @@ -284,6 +260,8 @@ Removed Mount Options osyncisdsync/osyncisosync v4.0 barrier v4.19 nobarrier v4.19 + ikeep/noikeep v6.18 + attr2/noattr2 v6.18 =========================== ======= sysctls -- cgit v1.2.3 From 21d59d00221e4ecbcb597eec0021c667477d3335 Mon Sep 17 00:00:00 2001 From: "Darrick J. Wong" Date: Tue, 2 Sep 2025 14:38:27 -0700 Subject: xfs: remove deprecated sysctl knobs These sysctl knobs were scheduled for removal in September 2025. That time has come, so remove them. Signed-off-by: "Darrick J. Wong" Reviewed-by: Carlos Maiolino --- Documentation/admin-guide/xfs.rst | 26 ++++---------------------- 1 file changed, 4 insertions(+), 22 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/xfs.rst b/Documentation/admin-guide/xfs.rst index 7ad746a3e66c..d6f531f2c0e6 100644 --- a/Documentation/admin-guide/xfs.rst +++ b/Documentation/admin-guide/xfs.rst @@ -289,9 +289,6 @@ The following sysctls are available for the XFS filesystem: removes unused preallocation from clean inodes and releases the unused space back to the free pool. - fs.xfs.speculative_cow_prealloc_lifetime - This is an alias for speculative_prealloc_lifetime. - fs.xfs.error_level (Min: 0 Default: 3 Max: 11) A volume knob for error reporting when internal errors occur. This will generate detailed messages & backtraces for filesystem @@ -318,17 +315,6 @@ The following sysctls are available for the XFS filesystem: This option is intended for debugging only. - fs.xfs.irix_symlink_mode (Min: 0 Default: 0 Max: 1) - Controls whether symlinks are created with mode 0777 (default) - or whether their mode is affected by the umask (irix mode). - - fs.xfs.irix_sgid_inherit (Min: 0 Default: 0 Max: 1) - Controls files created in SGID directories. - If the group ID of the new file does not match the effective group - ID or one of the supplementary group IDs of the parent dir, the - ISGID bit is cleared if the irix_sgid_inherit compatibility sysctl - is set. - fs.xfs.inherit_sync (Min: 0 Default: 1 Max: 1) Setting this to "1" will cause the "sync" flag set by the **xfs_io(8)** chattr command on a directory to be @@ -364,14 +350,7 @@ The following sysctls are available for the XFS filesystem: Deprecated Sysctls ================== -=========================================== ================ - Name Removal Schedule -=========================================== ================ -fs.xfs.irix_sgid_inherit September 2025 -fs.xfs.irix_symlink_mode September 2025 -fs.xfs.speculative_cow_prealloc_lifetime September 2025 -=========================================== ================ - +None currently. Removed Sysctls =============== @@ -381,6 +360,9 @@ Removed Sysctls ============================= ======= fs.xfs.xfsbufd_centisec v4.0 fs.xfs.age_buffer_centisecs v4.0 + fs.xfs.irix_symlink_mode v6.18 + fs.xfs.irix_sgid_inherit v6.18 + fs.xfs.speculative_cow_prealloc_lifetime v6.18 ============================= ======= Error handling -- cgit v1.2.3 From 5f9b5bd0c82925e4a71c5790a37b3142fec946d4 Mon Sep 17 00:00:00 2001 From: Kai Huang Date: Mon, 1 Sep 2025 18:09:29 +0200 Subject: x86/virt/tdx: Update the kexec section in the TDX documentation TDX host kernel now supports kexec/kdump. Update the documentation to reflect that. Opportunistically, remove the parentheses in "Kexec()" and move this section under the "Erratum" section because the updated "Kexec" section now refers to that erratum. Signed-off-by: Kai Huang Signed-off-by: Paolo Bonzini Signed-off-by: Dave Hansen Reviewed-by: Rick Edgecombe Tested-by: Farrah Chen Link: https://lore.kernel.org/all/20250901160930.1785244-7-pbonzini%40redhat.com --- Documentation/arch/x86/tdx.rst | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/arch/x86/tdx.rst b/Documentation/arch/x86/tdx.rst index 719043cd8b46..61670e7df2f7 100644 --- a/Documentation/arch/x86/tdx.rst +++ b/Documentation/arch/x86/tdx.rst @@ -142,13 +142,6 @@ but depends on the BIOS to behave correctly. Note TDX works with CPU logical online/offline, thus the kernel still allows to offline logical CPU and online it again. -Kexec() -~~~~~~~ - -TDX host support currently lacks the ability to handle kexec. For -simplicity only one of them can be enabled in the Kconfig. This will be -fixed in the future. - Erratum ~~~~~~~ @@ -171,6 +164,13 @@ If the platform has such erratum, the kernel prints additional message in machine check handler to tell user the machine check may be caused by kernel bug on TDX private memory. +Kexec +~~~~~~~ + +Currently kexec doesn't work on the TDX platforms with the aforementioned +erratum. It fails when loading the kexec kernel image. Otherwise it +works normally. + Interaction vs S3 and deeper states ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -- cgit v1.2.3 From 9de9040ffc6a3c616a0b4c13c7d4d1c2778cb6ee Mon Sep 17 00:00:00 2001 From: Mounika Botcha Date: Mon, 25 Aug 2025 12:46:58 +0530 Subject: dt-bindings: crypto: Add node for True Random Number Generator Add TRNG node compatible string and reg properities. Signed-off-by: Mounika Botcha Signed-off-by: Harsh Jain Reviewed-by: Krzysztof Kozlowski Signed-off-by: Herbert Xu --- .../bindings/crypto/xlnx,versal-trng.yaml | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml b/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml new file mode 100644 index 000000000000..9dfb0b0ab5c8 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/xlnx,versal-trng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Versal True Random Number Generator Hardware Accelerator + +maintainers: + - Harsh Jain + - Mounika Botcha + +description: + The Versal True Random Number Generator consists of Ring Oscillators as + entropy source and a deterministic CTR_DRBG random bit generator (DRBG). + +properties: + compatible: + const: xlnx,versal-trng + + reg: + maxItems: 1 + +required: + - reg + +additionalProperties: false + +examples: + - | + rng@f1230000 { + compatible = "xlnx,versal-trng"; + reg = <0xf1230000 0x1000>; + }; +... -- cgit v1.2.3 From 940ce882f75b66fe4f0af6da970566ef441de441 Mon Sep 17 00:00:00 2001 From: Nick Chan Date: Thu, 21 Aug 2025 23:56:40 +0800 Subject: dt-bindings: iommu: apple,sart: Add Apple A11 Add apple,t8015-sart for SARTv0 found on the Apple A11 SoC, which uses a different MMIO layout and is thus incompatible with the previously described versions Reviewed-by: Sven Peter Acked-by: Rob Herring (Arm) Signed-off-by: Nick Chan Link: https://lore.kernel.org/r/20250821-t8015-nvme-v3-3-14a4178adf68@gmail.com [sven: adjusted commit message] Signed-off-by: Sven Peter --- Documentation/devicetree/bindings/iommu/apple,sart.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iommu/apple,sart.yaml b/Documentation/devicetree/bindings/iommu/apple,sart.yaml index e87c1520fea6..c8c62f329882 100644 --- a/Documentation/devicetree/bindings/iommu/apple,sart.yaml +++ b/Documentation/devicetree/bindings/iommu/apple,sart.yaml @@ -34,6 +34,7 @@ properties: - const: apple,t6000-sart - enum: - apple,t6000-sart + - apple,t8015-sart - apple,t8103-sart reg: -- cgit v1.2.3 From 1dd8daf1cd49b9a97544826670163d6083ad32cc Mon Sep 17 00:00:00 2001 From: Nick Chan Date: Tue, 26 Aug 2025 20:09:12 +0800 Subject: dt-bindings: nvme: apple,nvme-ans: Add Apple A11 Add ANS2 NVMe bindings for Apple A11 SoC. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Nick Chan Link: https://lore.kernel.org/r/20250826-t8015-nvme-v5-1-caee6ab00144@gmail.com Signed-off-by: Sven Peter --- .../devicetree/bindings/nvme/apple,nvme-ans.yaml | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml b/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml index fc6555724e18..4127d7b0a0f0 100644 --- a/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml +++ b/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml @@ -11,12 +11,14 @@ maintainers: properties: compatible: - items: - - enum: - - apple,t8103-nvme-ans2 - - apple,t8112-nvme-ans2 - - apple,t6000-nvme-ans2 - - const: apple,nvme-ans2 + oneOf: + - const: apple,t8015-nvme-ans2 + - items: + - enum: + - apple,t8103-nvme-ans2 + - apple,t8112-nvme-ans2 + - apple,t6000-nvme-ans2 + - const: apple,nvme-ans2 reg: items: @@ -67,6 +69,7 @@ if: compatible: contains: enum: + - apple,t8015-nvme-ans2 - apple,t8103-nvme-ans2 - apple,t8112-nvme-ans2 then: -- cgit v1.2.3 From 180b82c1c7b2c2c5bffc1642239bed36d7e83f76 Mon Sep 17 00:00:00 2001 From: Yu Kuai Date: Fri, 29 Aug 2025 16:04:20 +0800 Subject: md/md-bitmap: add a new sysfs api bitmap_type The api will be used by mdadm to set bitmap_type while creating new array or assembling array, prepare to add a new bitmap. Currently available options are: cat /sys/block/md0/md/bitmap_type none [bitmap] Link: https://lore.kernel.org/linux-raid/20250829080426.1441678-6-yukuai1@huaweicloud.com Signed-off-by: Yu Kuai Reviewed-by: Hannes Reinecke Reviewed-by: Xiao Ni Reviewed-by: Li Nan --- Documentation/admin-guide/md.rst | 73 +++++++++++++++++++++++----------------- 1 file changed, 43 insertions(+), 30 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/md.rst b/Documentation/admin-guide/md.rst index 4ff2cc291d18..356d2a344f08 100644 --- a/Documentation/admin-guide/md.rst +++ b/Documentation/admin-guide/md.rst @@ -347,6 +347,49 @@ All md devices contain: active-idle like active, but no writes have been seen for a while (safe_mode_delay). + consistency_policy + This indicates how the array maintains consistency in case of unexpected + shutdown. It can be: + + none + Array has no redundancy information, e.g. raid0, linear. + + resync + Full resync is performed and all redundancy is regenerated when the + array is started after unclean shutdown. + + bitmap + Resync assisted by a write-intent bitmap. + + journal + For raid4/5/6, journal device is used to log transactions and replay + after unclean shutdown. + + ppl + For raid5 only, Partial Parity Log is used to close the write hole and + eliminate resync. + + The accepted values when writing to this file are ``ppl`` and ``resync``, + used to enable and disable PPL. + + uuid + This indicates the UUID of the array in the following format: + xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx + + bitmap_type + [RW] When read, this file will display the current and available + bitmap for this array. The currently active bitmap will be enclosed + in [] brackets. Writing an bitmap name or ID to this file will switch + control of this array to that new bitmap. Note that writing a new + bitmap for created array is forbidden. + + none + No bitmap + bitmap + The default internal bitmap + +If bitmap_type is bitmap, then the md device will also contain: + bitmap/location This indicates where the write-intent bitmap for the array is stored. @@ -401,36 +444,6 @@ All md devices contain: once the array becomes non-degraded, and this fact has been recorded in the metadata. - consistency_policy - This indicates how the array maintains consistency in case of unexpected - shutdown. It can be: - - none - Array has no redundancy information, e.g. raid0, linear. - - resync - Full resync is performed and all redundancy is regenerated when the - array is started after unclean shutdown. - - bitmap - Resync assisted by a write-intent bitmap. - - journal - For raid4/5/6, journal device is used to log transactions and replay - after unclean shutdown. - - ppl - For raid5 only, Partial Parity Log is used to close the write hole and - eliminate resync. - - The accepted values when writing to this file are ``ppl`` and ``resync``, - used to enable and disable PPL. - - uuid - This indicates the UUID of the array in the following format: - xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx - - As component devices are added to an md array, they appear in the ``md`` directory as new directories named:: -- cgit v1.2.3 From fb8cc3b0d9db94817a5aae2bcaf78dd079a89e52 Mon Sep 17 00:00:00 2001 From: Yu Kuai Date: Fri, 29 Aug 2025 16:04:21 +0800 Subject: md/md-bitmap: delay registration of bitmap_ops until creating bitmap Currently bitmap_ops is registered while allocating mddev, this is fine when there is only one bitmap_ops. Delay setting bitmap_ops until creating bitmap, so that user can choose which bitmap to use before running the array. Link: https://lore.kernel.org/linux-raid/20250721171557.34587-7-yukuai@kernel.org Signed-off-by: Yu Kuai Reviewed-by: Hannes Reinecke Reviewed-by: Li Nan Reviewed-by: Xiao Ni --- Documentation/admin-guide/md.rst | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/md.rst b/Documentation/admin-guide/md.rst index 356d2a344f08..001363f81850 100644 --- a/Documentation/admin-guide/md.rst +++ b/Documentation/admin-guide/md.rst @@ -388,6 +388,9 @@ All md devices contain: bitmap The default internal bitmap +If bitmap_type is not none, then additional bitmap attributes bitmap/xxx or +llbitmap/xxx will be created after md device KOBJ_CHANGE event. + If bitmap_type is bitmap, then the md device will also contain: bitmap/location -- cgit v1.2.3 From 5ab829f1971dc99f2aac10846c378e67fc875abc Mon Sep 17 00:00:00 2001 From: Yu Kuai Date: Fri, 29 Aug 2025 16:04:26 +0800 Subject: md/md-llbitmap: introduce new lockless bitmap Redundant data is used to enhance data fault tolerance, and the storage method for redundant data vary depending on the RAID levels. And it's important to maintain the consistency of redundant data. Bitmap is used to record which data blocks have been synchronized and which ones need to be resynchronized or recovered. Each bit in the bitmap represents a segment of data in the array. When a bit is set, it indicates that the multiple redundant copies of that data segment may not be consistent. Data synchronization can be performed based on the bitmap after power failure or readding a disk. If there is no bitmap, a full disk synchronization is required. Due to known performance issues with md-bitmap and the unreasonable implementations: - self-managed IO submitting like filemap_write_page(); - global spin_lock I have decided not to continue optimizing based on the current bitmap implementation, this new bitmap is invented without locking from IO fast path and can be used with fast disks. For designs and details, see the comments in drivers/md-llbitmap.c. Link: https://lore.kernel.org/linux-raid/20250829080426.1441678-12-yukuai1@huaweicloud.com Signed-off-by: Yu Kuai Reviewed-by: Li Nan --- Documentation/admin-guide/md.rst | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/md.rst b/Documentation/admin-guide/md.rst index 001363f81850..1c2eacc94758 100644 --- a/Documentation/admin-guide/md.rst +++ b/Documentation/admin-guide/md.rst @@ -387,6 +387,8 @@ All md devices contain: No bitmap bitmap The default internal bitmap + llbitmap + The lockless internal bitmap If bitmap_type is not none, then additional bitmap attributes bitmap/xxx or llbitmap/xxx will be created after md device KOBJ_CHANGE event. @@ -447,6 +449,24 @@ If bitmap_type is bitmap, then the md device will also contain: once the array becomes non-degraded, and this fact has been recorded in the metadata. +If bitmap_type is llbitmap, then the md device will also contain: + + llbitmap/bits + This is read-only, show status of bitmap bits, the number of each + value. + + llbitmap/metadata + This is read-only, show bitmap metadata, include chunksize, chunkshift, + chunks, offset and daemon_sleep. + + llbitmap/daemon_sleep + This is read-write, time in seconds that daemon function will be + triggered to clear dirty bits. + + llbitmap/barrier_idle + This is read-write, time in seconds that page barrier will be idled, + means dirty bits in the page will be cleared. + As component devices are added to an md array, they appear in the ``md`` directory as new directories named:: -- cgit v1.2.3 From c79bf528738c0e98e0744f7a63c27fab35c93b43 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 20 Aug 2025 14:11:01 +0200 Subject: dt-bindings: usb: IXP4xx UDC bindings This adds device tree bindings for the IXP4xx USB Device Controller (UDC). Signed-off-by: Linus Walleij Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250820-ixp4xx-udc-bindings-v1-1-640f29140164@linaro.org Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/intel,ixp4xx-udc.yaml | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/intel,ixp4xx-udc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/intel,ixp4xx-udc.yaml b/Documentation/devicetree/bindings/usb/intel,ixp4xx-udc.yaml new file mode 100644 index 000000000000..4ed602746897 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/intel,ixp4xx-udc.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/intel,ixp4xx-udc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel IXP4xx SoC USB Device Controller (UDC) + +description: The IXP4xx SoCs has a full-speed USB Device + Controller with 16 endpoints and a built-in transceiver. + +maintainers: + - Linus Walleij + +properties: + compatible: + const: intel,ixp4xx-udc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + usb@c800b000 { + compatible = "intel,ixp4xx-udc"; + reg = <0xc800b000 0x1000>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; + }; -- cgit v1.2.3 From 7d3f780122bee082f035aeb6a3cf073dc77dbd1f Mon Sep 17 00:00:00 2001 From: Jihed Chaibi Date: Sun, 24 Aug 2025 13:23:37 +0200 Subject: usb: dt-bindings: ti,twl4030-usb: convert to DT schema Convert the legacy TXT binding for the TWL4030 USB module to the modern YAML DT schema format. This adds formal validation and improves documentation using a conditional schema. Remove the twl4030 section from the obsolete .txt binding file Signed-off-by: Jihed Chaibi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250824112338.64953-2-jihed.chaibi.dev@gmail.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/ti,twl4030-usb.yaml | 74 ++++++++++++++++++++++ .../devicetree/bindings/usb/twlxxxx-usb.txt | 22 ------- 2 files changed, 74 insertions(+), 22 deletions(-) create mode 100644 Documentation/devicetree/bindings/usb/ti,twl4030-usb.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/ti,twl4030-usb.yaml b/Documentation/devicetree/bindings/usb/ti,twl4030-usb.yaml new file mode 100644 index 000000000000..6ef337507425 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/ti,twl4030-usb.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/ti,twl4030-usb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments TWL4030 USB PHY and Comparator + +maintainers: + - Peter Ujfalusi + +description: + Bindings for the USB PHY and comparator module found within the + TWL4030 family of companion chips. If a sibling node is compatible with + "ti,twl4030-bci", the driver for that node will query this device for + USB power status. + +properties: + compatible: + const: ti,twl4030-usb + + interrupts: + minItems: 1 + items: + - description: OTG interrupt number for ID events. + - description: USB interrupt number for VBUS events. + + usb1v5-supply: + description: Phandle to the vusb1v5 regulator. + + usb1v8-supply: + description: Phandle to the vusb1v8 regulator. + + usb3v1-supply: + description: Phandle to the vusb3v1 regulator. + + usb_mode: + description: | + The mode used by the PHY to connect to the controller: + 1: ULPI mode + 2: CEA2011_3PIN mode + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [1, 2] + + '#phy-cells': + const: 0 + +required: + - compatible + - interrupts + - usb1v5-supply + - usb1v8-supply + - usb3v1-supply + - usb_mode + +additionalProperties: false + +examples: + - | + #include + + usb-phy { + compatible = "ti,twl4030-usb"; + + interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + + usb1v5-supply = <®_vusb1v5>; + usb1v8-supply = <®_vusb1v8>; + usb3v1-supply = <®_vusb3v1>; + usb_mode = <1>; + + #phy-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/usb/twlxxxx-usb.txt b/Documentation/devicetree/bindings/usb/twlxxxx-usb.txt index 17327a296110..7194c9504b28 100644 --- a/Documentation/devicetree/bindings/usb/twlxxxx-usb.txt +++ b/Documentation/devicetree/bindings/usb/twlxxxx-usb.txt @@ -19,25 +19,3 @@ Board specific device node entry &twl6030-usb { usb-supply = <&vusb>; }; - -TWL4030 USB PHY AND COMPARATOR - - compatible : Should be "ti,twl4030-usb" - - interrupts : The interrupt numbers to the cpu should be specified. First - interrupt number is the otg interrupt number that raises ID interrupts - and VBUS interrupts. The second interrupt number is optional. - - -supply : phandle to the regulator device tree node. - should be vusb1v5, vusb1v8 and vusb3v1 - - usb_mode : The mode used by the phy to connect to the controller. "1" - specifies "ULPI" mode and "2" specifies "CEA2011_3PIN" mode. - -If a sibling node is compatible "ti,twl4030-bci", then it will find -this device and query it for USB power status. - -twl4030-usb { - compatible = "ti,twl4030-usb"; - interrupts = < 10 4 >; - usb1v5-supply = <&vusb1v5>; - usb1v8-supply = <&vusb1v8>; - usb3v1-supply = <&vusb3v1>; - usb_mode = <1>; -}; -- cgit v1.2.3 From 1daa7f57b85038eb3a4e6220a9623557a759758c Mon Sep 17 00:00:00 2001 From: Jihed Chaibi Date: Sun, 24 Aug 2025 13:23:38 +0200 Subject: usb: dt-bindings: ti,twl6030-usb: convert to DT schema Convert the legacy TXT binding for the TWL6030 USB module to the modern YAML DT schema format. This adds formal validation and improves documentation using a conditional schema. The legacy twlxxxx-usb.txt file is no longer needed and is removed. Signed-off-by: Jihed Chaibi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250824112338.64953-3-jihed.chaibi.dev@gmail.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/ti,twl6030-usb.yaml | 48 ++++++++++++++++++++++ .../devicetree/bindings/usb/twlxxxx-usb.txt | 21 ---------- 2 files changed, 48 insertions(+), 21 deletions(-) create mode 100644 Documentation/devicetree/bindings/usb/ti,twl6030-usb.yaml delete mode 100644 Documentation/devicetree/bindings/usb/twlxxxx-usb.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/ti,twl6030-usb.yaml b/Documentation/devicetree/bindings/usb/ti,twl6030-usb.yaml new file mode 100644 index 000000000000..33b6da50660a --- /dev/null +++ b/Documentation/devicetree/bindings/usb/ti,twl6030-usb.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/ti,twl6030-usb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments TWL6030 USB Comparator + +maintainers: + - Peter Ujfalusi + +description: + Bindings for the USB comparator module found within the TWL6030 + family of companion chips. + +properties: + compatible: + const: ti,twl6030-usb + + interrupts: + items: + - description: OTG for ID events in host mode + - description: USB device mode for VBUS events + + usb-supply: + description: + Phandle to the VUSB regulator. For TWL6030, this should be the 'vusb' + regulator. For TWL6032 subclass, it should be the 'ldousb' regulator. + +required: + - compatible + - interrupts + - usb-supply + +additionalProperties: false + +examples: + - | + #include + + usb { + compatible = "ti,twl6030-usb"; + + interrupts = <4 IRQ_TYPE_LEVEL_HIGH>, <10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + + usb-supply = <®_vusb>; + }; diff --git a/Documentation/devicetree/bindings/usb/twlxxxx-usb.txt b/Documentation/devicetree/bindings/usb/twlxxxx-usb.txt deleted file mode 100644 index 7194c9504b28..000000000000 --- a/Documentation/devicetree/bindings/usb/twlxxxx-usb.txt +++ /dev/null @@ -1,21 +0,0 @@ -USB COMPARATOR OF TWL CHIPS - -TWL6030 USB COMPARATOR - - compatible : Should be "ti,twl6030-usb" - - interrupts : Two interrupt numbers to the cpu should be specified. First - interrupt number is the otg interrupt number that raises ID interrupts when - the controller has to act as host and the second interrupt number is the - usb interrupt number that raises VBUS interrupts when the controller has to - act as device - - usb-supply : phandle to the regulator device tree node. It should be vusb - if it is twl6030 or ldousb if it is twl6032 subclass. - -twl6030-usb { - compatible = "ti,twl6030-usb"; - interrupts = < 4 10 >; -}; - -Board specific device node entry -&twl6030-usb { - usb-supply = <&vusb>; -}; -- cgit v1.2.3 From 771713aeaca19b4dfb47595bea514859f55747b9 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 31 Aug 2025 14:22:24 +0200 Subject: dt-bindings: usb: s3c2410-usb: Drop entirely S3C2410 Samsung S3C24xx family of SoCs was removed the Linux kernel in the commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January 2023. There are no in-kernel users of remaining S3C24xx compatibles. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250831122222.50332-4-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/s3c2410-usb.txt | 22 ---------------------- 1 file changed, 22 deletions(-) delete mode 100644 Documentation/devicetree/bindings/usb/s3c2410-usb.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/s3c2410-usb.txt b/Documentation/devicetree/bindings/usb/s3c2410-usb.txt deleted file mode 100644 index 26c85afd0b53..000000000000 --- a/Documentation/devicetree/bindings/usb/s3c2410-usb.txt +++ /dev/null @@ -1,22 +0,0 @@ -Samsung S3C2410 and compatible SoC USB controller - -OHCI - -Required properties: - - compatible: should be "samsung,s3c2410-ohci" for USB host controller - - reg: address and length of the controller memory mapped region - - interrupts: interrupt number for the USB OHCI controller - - clocks: Should reference the bus and host clocks - - clock-names: Should contain two strings - "usb-bus-host" for the USB bus clock - "usb-host" for the USB host clock - -Example: - -usb0: ohci@49000000 { - compatible = "samsung,s3c2410-ohci"; - reg = <0x49000000 0x100>; - interrupts = <0 0 26 3>; - clocks = <&clocks UCLK>, <&clocks HCLK_USBH>; - clock-names = "usb-bus-host", "usb-host"; -}; -- cgit v1.2.3 From ea32cd911368e32eb770c9078158467845c82b9a Mon Sep 17 00:00:00 2001 From: Jisheng Zhang Date: Tue, 26 Aug 2025 07:45:07 +0800 Subject: dt-bindings: usb: usb251xb: support usage case without I2C control Currently, the usb251xb assumes i2c control, but from HW point of view, the hub supports usage case without any i2c control, I.E we only want the gpio controls, for example the following dt node: usb-hub { compatible = "microchip,usb2512b"; reset-gpios = <&porta 8 GPIO_ACTIVE_LOW>; }; Modify the dt-binding of usb2512b to support this usage case, and add the usage example to the examples section. Signed-off-by: Jisheng Zhang Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250825234509.1041-2-jszhang@kernel.org Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/usb251xb.yaml | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/usb251xb.yaml b/Documentation/devicetree/bindings/usb/usb251xb.yaml index ac5b99710332..0329a6aaaa92 100644 --- a/Documentation/devicetree/bindings/usb/usb251xb.yaml +++ b/Documentation/devicetree/bindings/usb/usb251xb.yaml @@ -240,7 +240,6 @@ additionalProperties: false required: - compatible - - reg examples: - | @@ -269,3 +268,11 @@ examples: swap-dx-lanes = <1 2>; }; }; + + - | + #include + usb-hub { + /* I2C is not connected */ + compatible = "microchip,usb2512b"; + reset-gpios = <&porta 8 GPIO_ACTIVE_LOW>; + }; -- cgit v1.2.3 From 534c702c3c234665ca2fe426a9fbb12281e55d55 Mon Sep 17 00:00:00 2001 From: Markus Heidelberg Date: Fri, 15 Aug 2025 11:58:36 +0200 Subject: dt-bindings: eeprom: at25: use "size" for FRAMs without device ID Not all FRAM chips have a device ID and implement the corresponding read command. Thus the memory size, which is contained in the device ID, cannot be detected and has to be set manually as it is done for EEPROMs. Link: https://lore.kernel.org/all/20250401133148.38330-1-m.heidelberg@cab.de/ Signed-off-by: Markus Heidelberg Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250815095839.4219-2-m.heidelberg@cab.de Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/eeprom/at25.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/eeprom/at25.yaml b/Documentation/devicetree/bindings/eeprom/at25.yaml index c31e5e719525..00e0f07b44f8 100644 --- a/Documentation/devicetree/bindings/eeprom/at25.yaml +++ b/Documentation/devicetree/bindings/eeprom/at25.yaml @@ -56,6 +56,7 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 description: Total eeprom size in bytes. + Also used for FRAMs without device ID where the size cannot be detected. address-width: $ref: /schemas/types.yaml#/definitions/uint32 @@ -146,4 +147,11 @@ examples: reg = <1>; spi-max-frequency = <40000000>; }; + + fram@2 { + compatible = "cypress,fm25", "atmel,at25"; + reg = <2>; + spi-max-frequency = <20000000>; + size = <2048>; + }; }; -- cgit v1.2.3 From 618f571af67a876ce23a1dc4eb08e152fcf0d709 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 4 Sep 2025 13:15:41 -0400 Subject: dt-bindings: input: exc3000: move eeti,egalax_ts from egalax-ts.txt to eeti,exc3000.yaml Remove legacy binding egalax-ts.txt file. And add compatible string eeti,egalax_ts and wakeup-gpios to eeti,exc3000.yaml. "eeti,egalax_ts" is general compatible string, which is not preferred. But it is compatible with old devices (older than 10 years) and existing driver in drivers/input/touchscreen/egalax_ts.c. Allow address 0x4 for eeti,egalax_ts. Don't require touchscreen-size-x(y) for eeti,egalax_ts. Keep the same restriction for existing compatible string. Fix below DTB_CHECKS warnings: arch/arm/boot/dts/nxp/imx/imx6dl-gw52xx.dtb: /soc/bus@2100000/i2c@21a8000/egalax_ts@4: failed to match any schema with compatible: ['eeti,egalax_ts'] Signed-off-by: Frank Li Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250904171543.517650-1-Frank.Li@nxp.com Signed-off-by: Dmitry Torokhov --- .../bindings/input/touchscreen/eeti,exc3000.yaml | 30 +++++++++++++++++----- .../bindings/input/touchscreen/egalax-ts.txt | 18 ------------- 2 files changed, 24 insertions(+), 24 deletions(-) delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/touchscreen/eeti,exc3000.yaml b/Documentation/devicetree/bindings/input/touchscreen/eeti,exc3000.yaml index 1c7ae05a8c15..d19b07d4cfd4 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/eeti,exc3000.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/eeti,exc3000.yaml @@ -9,25 +9,25 @@ title: EETI EXC3000 series touchscreen controller maintainers: - Dmitry Torokhov -allOf: - - $ref: touchscreen.yaml# - properties: compatible: oneOf: - const: eeti,exc3000 - const: eeti,exc80h60 - const: eeti,exc80h84 + - const: eeti,egalax_ts # Do NOT use for new binding - items: - enum: - eeti,exc81w32 - const: eeti,exc80h84 reg: - const: 0x2a + enum: [0x4, 0x2a] interrupts: maxItems: 1 reset-gpios: maxItems: 1 + wakeup-gpios: + maxItems: 1 vdd-supply: description: Power supply regulator for the chip touchscreen-size-x: true @@ -40,11 +40,29 @@ required: - compatible - reg - interrupts - - touchscreen-size-x - - touchscreen-size-y additionalProperties: false +allOf: + - $ref: touchscreen.yaml# + + - if: + properties: + compatible: + not: + contains: + const: eeti,egalax_ts + then: + properties: + reg: + const: 0x2a + + wakeup-gpios: false + + required: + - touchscreen-size-x + - touchscreen-size-y + examples: - | #include "dt-bindings/interrupt-controller/irq.h" diff --git a/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt b/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt deleted file mode 100644 index ebbe93810574..000000000000 --- a/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt +++ /dev/null @@ -1,18 +0,0 @@ -* EETI eGalax Multiple Touch Controller - -Required properties: -- compatible: must be "eeti,egalax_ts" -- reg: i2c slave address -- interrupts: touch controller interrupt -- wakeup-gpios: the gpio pin to be used for waking up the controller - and also used as irq pin - -Example: - - touchscreen@4 { - compatible = "eeti,egalax_ts"; - reg = <0x04>; - interrupt-parent = <&gpio1>; - interrupts = <9 IRQ_TYPE_LEVEL_LOW>; - wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; - }; -- cgit v1.2.3 From 3cc08f9181156585baff92b1a3bba76fb4b14f4b Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 4 Sep 2025 15:17:28 -0400 Subject: dt-bindings: input: convert semtech,sx8654 to yaml format Convert sx8654.txt to yaml format. Signed-off-by: Frank Li Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250904191731.528145-1-Frank.Li@nxp.com Signed-off-by: Dmitry Torokhov --- .../bindings/input/touchscreen/semtech,sx8654.yaml | 52 ++++++++++++++++++++++ .../bindings/input/touchscreen/sx8654.txt | 23 ---------- 2 files changed, 52 insertions(+), 23 deletions(-) create mode 100644 Documentation/devicetree/bindings/input/touchscreen/semtech,sx8654.yaml delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/sx8654.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/touchscreen/semtech,sx8654.yaml b/Documentation/devicetree/bindings/input/touchscreen/semtech,sx8654.yaml new file mode 100644 index 000000000000..b2554064b688 --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/semtech,sx8654.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/touchscreen/semtech,sx8654.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Semtech SX8654 I2C Touchscreen Controller + +maintainers: + - Frank Li + +properties: + compatible: + enum: + - semtech,sx8650 + - semtech,sx8654 + - semtech,sx8655 + - semtech,sx8656 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + reset-gpios: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + touchscreen@48 { + compatible = "semtech,sx8654"; + reg = <0x48>; + interrupt-parent = <&gpio6>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; + }; + }; diff --git a/Documentation/devicetree/bindings/input/touchscreen/sx8654.txt b/Documentation/devicetree/bindings/input/touchscreen/sx8654.txt deleted file mode 100644 index 0ebe6dd043c7..000000000000 --- a/Documentation/devicetree/bindings/input/touchscreen/sx8654.txt +++ /dev/null @@ -1,23 +0,0 @@ -* Semtech SX8654 I2C Touchscreen Controller - -Required properties: -- compatible: must be one of the following, depending on the model: - "semtech,sx8650" - "semtech,sx8654" - "semtech,sx8655" - "semtech,sx8656" -- reg: i2c slave address -- interrupts: touch controller interrupt - -Optional properties: - - reset-gpios: GPIO specification for the NRST input - -Example: - - sx8654@48 { - compatible = "semtech,sx8654"; - reg = <0x48>; - interrupt-parent = <&gpio6>; - interrupts = <3 IRQ_TYPE_EDGE_FALLING>; - reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; - }; -- cgit v1.2.3 From 7328815c5fb0b5bc39dc5c981b18c0008786ab82 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 4 Sep 2025 16:06:37 -0400 Subject: dt-bindings: input: convert max11801-ts to yaml format Convert max11801-ts to yaml format. Signed-off-by: Frank Li Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250904200641.531897-1-Frank.Li@nxp.com Signed-off-by: Dmitry Torokhov --- .../bindings/input/touchscreen/max11801-ts.txt | 17 -------- .../bindings/input/touchscreen/maxim,max11801.yaml | 46 ++++++++++++++++++++++ 2 files changed, 46 insertions(+), 17 deletions(-) delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/max11801-ts.txt create mode 100644 Documentation/devicetree/bindings/input/touchscreen/maxim,max11801.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/touchscreen/max11801-ts.txt b/Documentation/devicetree/bindings/input/touchscreen/max11801-ts.txt deleted file mode 100644 index 05e982c3454e..000000000000 --- a/Documentation/devicetree/bindings/input/touchscreen/max11801-ts.txt +++ /dev/null @@ -1,17 +0,0 @@ -* MAXI MAX11801 Resistive touch screen controller with i2c interface - -Required properties: -- compatible: must be "maxim,max11801" -- reg: i2c slave address -- interrupts: touch controller interrupt - -Example: - -&i2c1 { - max11801: touchscreen@48 { - compatible = "maxim,max11801"; - reg = <0x48>; - interrupt-parent = <&gpio3>; - interrupts = <31 IRQ_TYPE_EDGE_FALLING>; - }; -}; diff --git a/Documentation/devicetree/bindings/input/touchscreen/maxim,max11801.yaml b/Documentation/devicetree/bindings/input/touchscreen/maxim,max11801.yaml new file mode 100644 index 000000000000..4f528d220199 --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/maxim,max11801.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/touchscreen/maxim,max11801.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MAXI MAX11801 Resistive touch screen controller with i2c interface + +maintainers: + - Frank Li + +properties: + compatible: + const: maxim,max11801 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +allOf: + - $ref: touchscreen.yaml + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + touchscreen@48 { + compatible = "maxim,max11801"; + reg = <0x48>; + interrupt-parent = <&gpio3>; + interrupts = <31 IRQ_TYPE_EDGE_FALLING>; + }; + }; -- cgit v1.2.3 From c2cc1e60c1afff4f23c22561b57a5d5157dde20d Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Wed, 3 Sep 2025 12:49:52 +0530 Subject: dt-bindings: display/msm/gmu: Update Adreno 623 bindings Update Adreno 623's dt-binding to remove smmu_clk which is not required for this GMU. Signed-off-by: Jie Zhang Signed-off-by: Akhil P Oommen Reviewed-by: Krzysztof Kozlowski Patchwork: https://patchwork.freedesktop.org/patch/672455/ Signed-off-by: Rob Clark --- .../devicetree/bindings/display/msm/gmu.yaml | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml index 4392aa7a4ffe..afc187935744 100644 --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml @@ -124,6 +124,40 @@ allOf: contains: enum: - qcom,adreno-gmu-623.0 + then: + properties: + reg: + items: + - description: Core GMU registers + - description: Resource controller registers + - description: GMU PDC registers + reg-names: + items: + - const: gmu + - const: rscc + - const: gmu_pdc + clocks: + items: + - description: GMU clock + - description: GPU CX clock + - description: GPU AXI clock + - description: GPU MEMNOC clock + - description: GPU AHB clock + - description: GPU HUB CX clock + clock-names: + items: + - const: gmu + - const: cxo + - const: axi + - const: memnoc + - const: ahb + - const: hub + + - if: + properties: + compatible: + contains: + enum: - qcom,adreno-gmu-635.0 - qcom,adreno-gmu-660.1 - qcom,adreno-gmu-663.0 -- cgit v1.2.3 From f3ebb77fce24b5573e7accc2ba593ae55bded1d9 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 4 Sep 2025 21:57:04 +0200 Subject: dt-bindings: input: touchscreen: goodix: Drop 'interrupts' requirement Since commit 409fe0cea366 ("Input: goodix - add support for polling mode") the interrupts property is optional, since at least the Linux kernel driver supports also polling mode. Signed-off-by: Marek Vasut Acked-by: Conor Dooley Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20250904195727.168152-1-marek.vasut+renesas@mailbox.org Signed-off-by: Dmitry Torokhov --- Documentation/devicetree/bindings/input/touchscreen/goodix.yaml | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml b/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml index eb4992f708b7..a96137c6f063 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml @@ -62,7 +62,6 @@ additionalProperties: false required: - compatible - reg - - interrupts examples: - | -- cgit v1.2.3 From c2cf36221021090e7b4757774f4e4c563f959fdb Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 4 Sep 2025 10:38:17 +0200 Subject: dt-bindings: display: bridge: Reference DAI common schema Several display bridges (e.g. LVDS to HDMI converters) are used as sound Digital Audio Interface (DAI) and have '#sound-dai-cells', thus they should reference dai-common.yaml schema to allow common properties, like DAI name. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250904083816.48076-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml | 1 + Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml | 5 ++++- Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml | 5 ++++- Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml | 5 ++++- Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml | 5 ++++- 5 files changed, 17 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml b/Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml index 0a10e10d80ff..b98d942bbe19 100644 --- a/Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml +++ b/Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml @@ -28,6 +28,7 @@ description: | allOf: - $ref: /schemas/display/lvds-dual-ports.yaml# + - $ref: /schemas/sound/dai-common.yaml# properties: compatible: diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml b/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml index a7eb2603691f..ba644c30dcf4 100644 --- a/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml +++ b/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml @@ -84,7 +84,10 @@ required: - interrupts - ports -additionalProperties: false +allOf: + - $ref: /schemas/sound/dai-common.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml b/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml index 5b9d36f7af30..655db8cfdc25 100644 --- a/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml +++ b/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml @@ -69,7 +69,10 @@ required: - vcc-supply - ports -additionalProperties: false +allOf: + - $ref: /schemas/sound/dai-common.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml b/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml index b8e9cf6ce4e6..3fce9e698ea1 100644 --- a/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml +++ b/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml @@ -81,7 +81,10 @@ oneOf: - required: - ports -additionalProperties: false +allOf: + - $ref: /schemas/sound/dai-common.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml b/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml index 1509c4535e53..17ea06719b56 100644 --- a/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml +++ b/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml @@ -109,7 +109,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/sound/dai-common.yaml# + +unevaluatedProperties: false examples: - | -- cgit v1.2.3 From 714380b03d38e1ca8c5d42f2da6292fae082a769 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Fri, 5 Sep 2025 12:41:57 -0400 Subject: bindings: siox: convert eckelmann,siox-gpio.txt to yaml format Convert eckelmann,siox-gpio.txt to yaml format. Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250905164200.599448-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- .../bindings/siox/eckelmann,siox-gpio.txt | 19 --------- .../bindings/siox/eckelmann,siox-gpio.yaml | 48 ++++++++++++++++++++++ 2 files changed, 48 insertions(+), 19 deletions(-) delete mode 100644 Documentation/devicetree/bindings/siox/eckelmann,siox-gpio.txt create mode 100644 Documentation/devicetree/bindings/siox/eckelmann,siox-gpio.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/siox/eckelmann,siox-gpio.txt b/Documentation/devicetree/bindings/siox/eckelmann,siox-gpio.txt deleted file mode 100644 index 55259cf39c25..000000000000 --- a/Documentation/devicetree/bindings/siox/eckelmann,siox-gpio.txt +++ /dev/null @@ -1,19 +0,0 @@ -Eckelmann SIOX GPIO bus - -Required properties: -- compatible : "eckelmann,siox-gpio" -- din-gpios, dout-gpios, dclk-gpios, dld-gpios: references gpios for the - corresponding bus signals. - -Examples: - - siox { - compatible = "eckelmann,siox-gpio"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_siox>; - - din-gpios = <&gpio6 11 0>; - dout-gpios = <&gpio6 8 0>; - dclk-gpios = <&gpio6 9 0>; - dld-gpios = <&gpio6 10 0>; - }; diff --git a/Documentation/devicetree/bindings/siox/eckelmann,siox-gpio.yaml b/Documentation/devicetree/bindings/siox/eckelmann,siox-gpio.yaml new file mode 100644 index 000000000000..2ff204109b93 --- /dev/null +++ b/Documentation/devicetree/bindings/siox/eckelmann,siox-gpio.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/siox/eckelmann,siox-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Eckelmann SIOX GPIO bus + +maintainers: + - Frank Li + +properties: + compatible: + const: eckelmann,siox-gpio + + din-gpios: + maxItems: 1 + + dout-gpios: + maxItems: 1 + + dclk-gpios: + maxItems: 1 + + dld-gpios: + maxItems: 1 + +required: + - compatible + - din-gpios + - dout-gpios + - dclk-gpios + - dld-gpios + +additionalProperties: false + +examples: + - | + siox { + compatible = "eckelmann,siox-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_siox>; + + din-gpios = <&gpio6 11 0>; + dout-gpios = <&gpio6 8 0>; + dclk-gpios = <&gpio6 9 0>; + dld-gpios = <&gpio6 10 0>; + }; -- cgit v1.2.3 From 43bd82eb33b2ac33232724a8ddb9e07cde492328 Mon Sep 17 00:00:00 2001 From: Denzeel Oliva Date: Thu, 4 Sep 2025 14:07:11 +0000 Subject: dt-bindings: clock: exynos990: Add PERIC0 and PERIC1 clock units Add clock management unit bindings for PERIC0 and PERIC1 blocks which provide clocks for USI, I2C and UART peripherals. Signed-off-by: Denzeel Oliva Signed-off-by: Krzysztof Kozlowski --- .../bindings/clock/samsung,exynos990-clock.yaml | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos990-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos990-clock.yaml index c15cc1752b02..5cd2d80b8ed6 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynos990-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynos990-clock.yaml @@ -30,6 +30,8 @@ description: | properties: compatible: enum: + - samsung,exynos990-cmu-peric1 + - samsung,exynos990-cmu-peric0 - samsung,exynos990-cmu-hsi0 - samsung,exynos990-cmu-peris - samsung,exynos990-cmu-top @@ -56,6 +58,28 @@ required: - reg allOf: + - if: + properties: + compatible: + contains: + enum: + - samsung,exynos990-cmu-peric1 + - samsung,exynos990-cmu-peric0 + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: Connectivity Peripheral 0/1 bus clock (from CMU_TOP) + - description: Connectivity Peripheral 0/1 IP clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: bus + - const: ip + - if: properties: compatible: -- cgit v1.2.3 From 25b2c02e5b1f834b405a7f3fa6854115c8245d4c Mon Sep 17 00:00:00 2001 From: Lucas Yunkyu Lee Date: Mon, 28 Jul 2025 22:49:08 +0200 Subject: hwmon: (asus-ec-sensors) Add STRIX B850-I GAMING WIFI Add support for the STRIX B850-I GAMING WIFI Signed-off-by: Lucas Yunkyu Lee Signed-off-by: Eugene Shalygin Link: https://lore.kernel.org/r/20250728205133.15487-2-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/asus_ec_sensors.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/asus_ec_sensors.rst index de2f2985f06f..558755f9fdd5 100644 --- a/Documentation/hwmon/asus_ec_sensors.rst +++ b/Documentation/hwmon/asus_ec_sensors.rst @@ -25,6 +25,7 @@ Supported boards: * ROG MAXIMUS Z690 FORMULA * ROG STRIX B550-E GAMING * ROG STRIX B550-I GAMING + * ROG STRIX B850-I GAMING WIFI * ROG STRIX X570-E GAMING * ROG STRIX X570-E GAMING WIFI II * ROG STRIX X570-F GAMING -- cgit v1.2.3 From 32afccb263e48164e4f1596bdf4a9a67468ba330 Mon Sep 17 00:00:00 2001 From: Dylan Tackoor Date: Mon, 28 Jul 2025 22:49:09 +0200 Subject: hwmon: (asus-ec-sensors) Add B650E-I Add support for ROG STRIX B650E-I GAMING WIFI. Signed-off-by: Dylan Tackoor Signed-off-by: Eugene Shalygin Link: https://lore.kernel.org/r/20250728205133.15487-3-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/asus_ec_sensors.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/asus_ec_sensors.rst index 558755f9fdd5..1e8274dba35f 100644 --- a/Documentation/hwmon/asus_ec_sensors.rst +++ b/Documentation/hwmon/asus_ec_sensors.rst @@ -25,6 +25,7 @@ Supported boards: * ROG MAXIMUS Z690 FORMULA * ROG STRIX B550-E GAMING * ROG STRIX B550-I GAMING + * ROG STRIX B650E-I GAMING WIFI * ROG STRIX B850-I GAMING WIFI * ROG STRIX X570-E GAMING * ROG STRIX X570-E GAMING WIFI II -- cgit v1.2.3 From 0183cb21b8a87e7499a0ef3b94a7df43e266fa44 Mon Sep 17 00:00:00 2001 From: Nicholas Flintham Date: Mon, 28 Jul 2025 22:49:10 +0200 Subject: hwmon: (asus-ec-sensors) Add ROG STRIX Z790E GAMING WIFI II Add support for the ROG STRIX Z790E GAMING WIFI II board. Signed-off-by: Nicholas Flintham Signed-off-by: Eugene Shalygin Link: https://lore.kernel.org/r/20250728205133.15487-4-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/asus_ec_sensors.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/asus_ec_sensors.rst index 1e8274dba35f..da9a00111d1c 100644 --- a/Documentation/hwmon/asus_ec_sensors.rst +++ b/Documentation/hwmon/asus_ec_sensors.rst @@ -34,6 +34,7 @@ Supported boards: * ROG STRIX Z390-F GAMING * ROG STRIX Z490-F GAMING * ROG STRIX Z690-A GAMING WIFI D4 + * ROG STRIX Z790-E GAMING WIFI II * ROG ZENITH II EXTREME * ROG ZENITH II EXTREME ALPHA * TUF GAMING X670E PLUS -- cgit v1.2.3 From 6a9b2fb8411e1bc9345f048c8061cfa96f45151f Mon Sep 17 00:00:00 2001 From: Lakshay Piplani Date: Mon, 28 Jul 2025 09:49:12 +0530 Subject: dt-bindings: hwmon: (lm75) Add binding for NXP P3T1750 Add "nxp,p3t1750" to the lm75 compatible list. Signed-off-by: Lakshay Piplani Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250728041913.3754236-1-lakshay.piplani@nxp.com Signed-off-by: Guenter Roeck --- Documentation/devicetree/bindings/hwmon/lm75.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/lm75.yaml b/Documentation/devicetree/bindings/hwmon/lm75.yaml index c38255243f57..ecdd09a032e5 100644 --- a/Documentation/devicetree/bindings/hwmon/lm75.yaml +++ b/Documentation/devicetree/bindings/hwmon/lm75.yaml @@ -28,6 +28,7 @@ properties: - maxim,max31725 - maxim,max31726 - maxim,mcp980x + - nxp,p3t1750 - nxp,p3t1755 - nxp,pct2075 - st,stds75 -- cgit v1.2.3 From 83b3354a4ad9a784a3335a2c303c693f521d1e47 Mon Sep 17 00:00:00 2001 From: Lakshay Piplani Date: Mon, 28 Jul 2025 09:49:13 +0530 Subject: hwmon: (lm75) Add NXP P3T1750 support Add support for lm75 compatible NXP P3T1750 temperature sensor. Signed-off-by: Lakshay Piplani Link: https://lore.kernel.org/r/20250728041913.3754236-2-lakshay.piplani@nxp.com [groeck: Fixed alphabetic order for new chip entries] Signed-off-by: Guenter Roeck --- Documentation/hwmon/lm75.rst | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/hwmon/lm75.rst b/Documentation/hwmon/lm75.rst index c6a54bbca3c5..908b3a9df06e 100644 --- a/Documentation/hwmon/lm75.rst +++ b/Documentation/hwmon/lm75.rst @@ -121,9 +121,9 @@ Supported chips: https://www.ti.com/product/TMP1075 - * NXP LM75B, P3T1755, PCT2075 + * NXP LM75B, P3T1750, P3T1755, PCT2075 - Prefix: 'lm75b', 'p3t1755', 'pct2075' + Prefix: 'lm75b', 'p3t1750', 'p3t1755', 'pct2075' Addresses scanned: none @@ -131,6 +131,8 @@ Supported chips: https://www.nxp.com/docs/en/data-sheet/LM75B.pdf + https://www.nxp.com/docs/en/data-sheet/P3T1750DP.pdf + https://www.nxp.com/docs/en/data-sheet/P3T1755.pdf https://www.nxp.com/docs/en/data-sheet/PCT2075.pdf -- cgit v1.2.3 From fec40c4837a95ae511d9e1b709943b6c243db4d2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Runar=20Gr=C3=B8n=C3=A5s?= Date: Fri, 1 Aug 2025 21:50:08 +0200 Subject: hwmon: (asus-ec-sensors) Add X670E-I GAMING WIFI MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for ROG STRIX X670E-I GAMING WIFI Signed-off-by: Runar Grønås Signed-off-by: Eugene Shalygin Link: https://lore.kernel.org/r/20250801195020.11106-1-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/asus_ec_sensors.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/asus_ec_sensors.rst index da9a00111d1c..49f6cac63d19 100644 --- a/Documentation/hwmon/asus_ec_sensors.rst +++ b/Documentation/hwmon/asus_ec_sensors.rst @@ -31,6 +31,7 @@ Supported boards: * ROG STRIX X570-E GAMING WIFI II * ROG STRIX X570-F GAMING * ROG STRIX X570-I GAMING + * ROG STRIX X670E-I GAMING WIFI * ROG STRIX Z390-F GAMING * ROG STRIX Z490-F GAMING * ROG STRIX Z690-A GAMING WIFI D4 -- cgit v1.2.3 From 15c8317366908c3b5a22573483a3dbbefba3fc38 Mon Sep 17 00:00:00 2001 From: Jamie Vickery Date: Sat, 2 Aug 2025 15:09:02 +0200 Subject: hwmon: (asus-ec-sensors) Add Z790-I GAMING WIFI Add support for the ROG STRIX Z790-I GAMING WIFI board Signed-off-by: Jamie Vickery Signed-off-by: Eugene Shalygin Link: https://lore.kernel.org/r/20250802130912.175543-1-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/asus_ec_sensors.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/asus_ec_sensors.rst index 49f6cac63d19..bedddb6bf9e1 100644 --- a/Documentation/hwmon/asus_ec_sensors.rst +++ b/Documentation/hwmon/asus_ec_sensors.rst @@ -36,6 +36,7 @@ Supported boards: * ROG STRIX Z490-F GAMING * ROG STRIX Z690-A GAMING WIFI D4 * ROG STRIX Z790-E GAMING WIFI II + * ROG STRIX Z790-I GAMING WIFI * ROG ZENITH II EXTREME * ROG ZENITH II EXTREME ALPHA * TUF GAMING X670E PLUS -- cgit v1.2.3 From 3331e5469219d92ea8e9a85fe4fbf679b6aac672 Mon Sep 17 00:00:00 2001 From: ChiShih Tsai Date: Thu, 7 Aug 2025 06:37:23 +0800 Subject: dt-bindings: hwmon: adm1275: add sq24905c support Add support for sq24905c Hot-Swap Controller and Digital Power Monitor. Acked-by: Krzysztof Kozlowski Signed-off-by: ChiShih Tsai Link: https://lore.kernel.org/r/20250806223724.1207-2-tomtsai764@gmail.com Signed-off-by: Guenter Roeck --- Documentation/devicetree/bindings/hwmon/adi,adm1275.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/adi,adm1275.yaml b/Documentation/devicetree/bindings/hwmon/adi,adm1275.yaml index ddb72857c846..d6a7517f2a50 100644 --- a/Documentation/devicetree/bindings/hwmon/adi,adm1275.yaml +++ b/Documentation/devicetree/bindings/hwmon/adi,adm1275.yaml @@ -18,6 +18,13 @@ description: | Datasheets: https://www.analog.com/en/products/adm1294.html + The SQ24905C is also a Hot-swap controller compatibility to the ADM1278, + the PMBUS_MFR_MODEL is MC09C + + Datasheets: + https://www.silergy.com/ + download/downloadFile?id=5669&type=product&ftype=note + properties: compatible: enum: @@ -30,6 +37,7 @@ properties: - adi,adm1281 - adi,adm1293 - adi,adm1294 + - silergy,mc09c reg: maxItems: 1 @@ -96,6 +104,7 @@ allOf: - adi,adm1281 - adi,adm1293 - adi,adm1294 + - silergy,mc09c then: properties: adi,volt-curr-sample-average: -- cgit v1.2.3 From 1ba272bfdf55a32c1240a629fd8c98eaaa3f8351 Mon Sep 17 00:00:00 2001 From: ChiShih Tsai Date: Thu, 7 Aug 2025 06:37:24 +0800 Subject: hwmon: (pmbus/adm1275) add sq24905c support Add support for sq24905c which is similar to adm1275 and other chips of the series. Signed-off-by: ChiShih Tsai Link: https://lore.kernel.org/r/20250806223724.1207-3-tomtsai764@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/adm1275.rst | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/hwmon/adm1275.rst b/Documentation/hwmon/adm1275.rst index 57bd7a850558..cf923f20fa52 100644 --- a/Documentation/hwmon/adm1275.rst +++ b/Documentation/hwmon/adm1275.rst @@ -67,6 +67,14 @@ Supported chips: Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADM1293_1294.pdf + * Silergy SQ24905C + + Prefix: 'mc09c' + + Addresses scanned: - + + Datasheet: https://www.silergy.com/download/downloadFile?id=5669&type=product&ftype=note + Author: Guenter Roeck @@ -74,14 +82,14 @@ Description ----------- This driver supports hardware monitoring for Analog Devices ADM1075, ADM1272, -ADM1273, ADM1275, ADM1276, ADM1278, ADM1281, ADM1293, and ADM1294 Hot-Swap -Controller and Digital Power Monitors. +ADM1273, ADM1275, ADM1276, ADM1278, ADM1281, ADM1293, ADM1294, and SQ24905C +Hot-Swap Controller and Digital Power Monitors. -ADM1075, ADM1272, ADM1273, ADM1275, ADM1276, ADM1278, ADM1281, ADM1293, and -ADM1294 are hot-swap controllers that allow a circuit board to be removed from -or inserted into a live backplane. They also feature current and voltage -readback via an integrated 12 bit analog-to-digital converter (ADC), accessed -using a PMBus interface. +ADM1075, ADM1272, ADM1273, ADM1275, ADM1276, ADM1278, ADM1281, ADM1293, +ADM1294 and SQ24905C are hot-swap controllers that allow a circuit board to be +removed from or inserted into a live backplane. They also feature current and +voltage readback via an integrated 12 bit analog-to-digital converter (ADC), +accessed using a PMBus interface. The driver is a client driver to the core PMBus driver. Please see Documentation/hwmon/pmbus.rst for details on PMBus client drivers. @@ -160,5 +168,5 @@ temp1_highest Highest observed temperature. temp1_reset_history Write any value to reset history. Temperature attributes are supported on ADM1272, - ADM1273, ADM1278, and ADM1281. + ADM1273, ADM1278, ADM1281 and SQ24905C. ======================= ======================================================= -- cgit v1.2.3 From fd1a9a68e64fc41bffd8bfbf987a11c53dda4cf2 Mon Sep 17 00:00:00 2001 From: Aleksander Jan Bajkowski Date: Thu, 14 Aug 2025 10:04:41 +0200 Subject: dt-bindings: hwmon: convert lantiq-cputemp to yaml Convert the Lantiq cpu temperature sensor bindings to yaml format. Signed-off-by: Aleksander Jan Bajkowski Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250814080708.3054732-1-olek2@wp.pl Signed-off-by: Guenter Roeck --- .../devicetree/bindings/hwmon/lantiq,cputemp.yaml | 30 ++++++++++++++++++++++ .../devicetree/bindings/hwmon/ltq-cputemp.txt | 10 -------- 2 files changed, 30 insertions(+), 10 deletions(-) create mode 100644 Documentation/devicetree/bindings/hwmon/lantiq,cputemp.yaml delete mode 100644 Documentation/devicetree/bindings/hwmon/ltq-cputemp.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/lantiq,cputemp.yaml b/Documentation/devicetree/bindings/hwmon/lantiq,cputemp.yaml new file mode 100644 index 000000000000..9419b481ff35 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/lantiq,cputemp.yaml @@ -0,0 +1,30 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/lantiq,cputemp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lantiq cpu temperature sensor + +maintainers: + - Florian Eckert + +properties: + compatible: + const: lantiq,cputemp + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + cputemp@103040 { + compatible = "lantiq,cputemp"; + reg = <0x103040 0x4>; + }; diff --git a/Documentation/devicetree/bindings/hwmon/ltq-cputemp.txt b/Documentation/devicetree/bindings/hwmon/ltq-cputemp.txt deleted file mode 100644 index 473b34c876dd..000000000000 --- a/Documentation/devicetree/bindings/hwmon/ltq-cputemp.txt +++ /dev/null @@ -1,10 +0,0 @@ -Lantiq cpu temperature sensor - -Requires node properties: -- compatible value : - "lantiq,cputemp" - -Example: - cputemp@0 { - compatible = "lantiq,cputemp"; - }; -- cgit v1.2.3 From 5473fccb809a4cb6777572d420c03446d96101b0 Mon Sep 17 00:00:00 2001 From: Grant Peltier Date: Wed, 27 Aug 2025 17:44:19 -0500 Subject: dt-bindings: hwmon: (pmbus/isl68137) add RAA228244 and RAA228246 support Add device type support for raa228244 and raa228246. Signed-off-by: Grant Peltier Acked-by: Conor Dooley Link: https://lore.kernel.org/r/c0c6e99e51b6fd4c5dbab02e02e4d81abe31f085.1756331945.git.grantpeltier93@gmail.com Signed-off-by: Guenter Roeck --- Documentation/devicetree/bindings/hwmon/pmbus/isil,isl68137.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/pmbus/isil,isl68137.yaml b/Documentation/devicetree/bindings/hwmon/pmbus/isil,isl68137.yaml index 3dc7f15484d2..ae23a05375cb 100644 --- a/Documentation/devicetree/bindings/hwmon/pmbus/isil,isl68137.yaml +++ b/Documentation/devicetree/bindings/hwmon/pmbus/isil,isl68137.yaml @@ -54,6 +54,8 @@ properties: - renesas,raa228004 - renesas,raa228006 - renesas,raa228228 + - renesas,raa228244 + - renesas,raa228246 - renesas,raa229001 - renesas,raa229004 - renesas,raa229621 -- cgit v1.2.3 From 3d5fcffcdf6266ddf070110eb7d8a6387fd9d291 Mon Sep 17 00:00:00 2001 From: Grant Peltier Date: Wed, 27 Aug 2025 17:42:47 -0500 Subject: docs: hwmon: add RAA228244 and RAA228246 info to isl68137 documentation The Renesas RAA228244 and RAA228246 are recently released digital multiphase controllers. Signed-off-by: Grant Peltier Link: https://lore.kernel.org/r/ddeaf4d2fd1f9c85302ee9b5bf16cfaecf9b89ad.1756331945.git.grantpeltier93@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/isl68137.rst | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/isl68137.rst b/Documentation/hwmon/isl68137.rst index 0e71b22047f8..5bc029c98383 100644 --- a/Documentation/hwmon/isl68137.rst +++ b/Documentation/hwmon/isl68137.rst @@ -374,6 +374,26 @@ Supported chips: Publicly available (after August 2020 launch) at the Renesas website + * Renesas RAA228244 + + Prefix: 'raa228244' + + Addresses scanned: - + + Datasheet: + + Provided by Renesas upon request and NDA + + * Renesas RAA228246 + + Prefix: 'raa228246' + + Addresses scanned: - + + Datasheet: + + Provided by Renesas upon request and NDA + * Renesas RAA229001 Prefix: 'raa229001' -- cgit v1.2.3 From 9d4388466768c65691e6d554e89a0e57528c9edb Mon Sep 17 00:00:00 2001 From: Michael Tandy Date: Sat, 30 Aug 2025 14:00:59 +0200 Subject: (asus-ec-sensors) add Pro WS WRX90E-SAGE SE Add support for Pro WS WRX90E-SAGE SE Signed-off-by: Michael Tandy Signed-off-by: Eugene Shalygin Link: https://lore.kernel.org/r/20250830120121.738223-1-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/asus_ec_sensors.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/asus_ec_sensors.rst index bedddb6bf9e1..12c6b5b266bb 100644 --- a/Documentation/hwmon/asus_ec_sensors.rst +++ b/Documentation/hwmon/asus_ec_sensors.rst @@ -9,6 +9,7 @@ Supported boards: * PRIME X570-PRO * PRIME X670E-PRO WIFI * Pro WS X570-ACE + * Pro WS WRX90E-SAGE SE * ProArt X570-CREATOR WIFI * ProArt X670E-CREATOR WIFI * ProArt X870E-CREATOR WIFI -- cgit v1.2.3 From 402dfbe7ef6bd5d13341a970c47282c7d60cf9a0 Mon Sep 17 00:00:00 2001 From: Debanil Chowdhury Date: Sun, 31 Aug 2025 04:45:54 +0000 Subject: hwmon: crps: Fix typos in crps.rst documentation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Changed a misspelling in crps.rst documentation: "Critial" → "Critical". Found using codespell tool. Signed-off-by: Debanil Chowdhury Link: https://lore.kernel.org/r/20250831045710.6009-1-kerneldev@debanilchowdhury.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/crps.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/hwmon/crps.rst b/Documentation/hwmon/crps.rst index 87380b496558..d42ea59d2dae 100644 --- a/Documentation/hwmon/crps.rst +++ b/Documentation/hwmon/crps.rst @@ -43,7 +43,7 @@ curr1_label "iin" curr1_input Measured input current curr1_max Maximum input current curr1_max_alarm Input maximum current high alarm -curr1_crit Critial high input current +curr1_crit Critical high input current curr1_crit_alarm Input critical current high alarm curr1_rated_max Maximum rated input current @@ -51,7 +51,7 @@ curr2_label "iout1" curr2_input Measured output current curr2_max Maximum output current curr2_max_alarm Output maximum current high alarm -curr2_crit Critial high output current +curr2_crit Critical high output current curr2_crit_alarm Output critical current high alarm curr2_rated_max Maximum rated output current -- cgit v1.2.3 From fa1ab48bfe97c86278ddf7fb535bc597e64fd210 Mon Sep 17 00:00:00 2001 From: Flaviu Nistor Date: Mon, 25 Aug 2025 21:02:43 +0300 Subject: dt-bindings: hwmon: tmp102: Add label property Add support for an optional label property similar to other hwmon devices. This allows, in case of boards with multiple TMP102 sensors, to assign distinct names to each instance. Signed-off-by: Flaviu Nistor Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250825180248.1943607-1-flaviu.nistor@gmail.com [groeck: Dropped unnecessary "|" after "description:"] Signed-off-by: Guenter Roeck --- Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml b/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml index 4c89448eba0d..96b2e4969f78 100644 --- a/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml +++ b/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml @@ -20,6 +20,10 @@ properties: reg: maxItems: 1 + label: + description: + A descriptive name for this channel, like "ambient" or "psu". + "#thermal-sensor-cells": const: 1 @@ -45,6 +49,7 @@ examples: reg = <0x48>; interrupt-parent = <&gpio7>; interrupts = <16 IRQ_TYPE_LEVEL_LOW>; + label = "somelabel"; vcc-supply = <&supply>; #thermal-sensor-cells = <1>; }; -- cgit v1.2.3 From 58639dfde0c29434e902a0efe213b35ede35604e Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Fri, 29 Aug 2025 15:05:09 +1200 Subject: dt-bindings: hwmon: ti,ina2xx: Add INA780 device Add a compatible string for the INA780 device. Signed-off-by: Chris Packham Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250829030512.1179998-2-chris.packham@alliedtelesis.co.nz Signed-off-by: Guenter Roeck --- Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml index fa68b99ef2e2..980ecba6d811 100644 --- a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml +++ b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml @@ -32,6 +32,7 @@ properties: - ti,ina237 - ti,ina238 - ti,ina260 + - ti,ina780 reg: maxItems: 1 -- cgit v1.2.3 From f19617d1478aa595b5e2439847d34f3ac414c836 Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Mon, 1 Sep 2025 08:59:02 -0700 Subject: dt-bindings: hwmon: ti,ina2xx: Update details for various chips ti,maximum-expected-current-microamp, ti,shunt-gain, and shunt-resistor properties are not supported on all chips described in this bindings file. Update the bindings accordingly. Cc: Chris Packham Signed-off-by: Guenter Roeck Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250901155902.2667063-1-linux@roeck-us.net Signed-off-by: Guenter Roeck --- .../devicetree/bindings/hwmon/ti,ina2xx.yaml | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml index 980ecba6d811..8b491be9c49d 100644 --- a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml +++ b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml @@ -115,10 +115,39 @@ allOf: - ti,ina237 - ti,ina238 - ti,ina260 + - ti,ina780 then: properties: ti,maximum-expected-current-microamp: false + - if: + properties: + compatible: + contains: + enum: + - silergy,sy24655 + - ti,ina209 + - ti,ina219 + - ti,ina220 + - ti,ina226 + - ti,ina230 + - ti,ina231 + - ti,ina260 + - ti,ina780 + then: + properties: + ti,shunt-gain: false + + - if: + properties: + compatible: + contains: + enum: + - ti,ina780 + then: + properties: + shunt-resistor: false + unevaluatedProperties: false examples: -- cgit v1.2.3 From 34c61c198d06b83c1a9da88005e3f4eec85447da Mon Sep 17 00:00:00 2001 From: Tom Ingleby Date: Tue, 2 Sep 2025 20:17:56 -0700 Subject: hwmon: (asus-ec-sensors) add ROG STRIX Z690-E GAMING WIFI Add support for the ASUS ROG STRIX Z690-E GAMING WIFI Signed-off-by: Tom Ingleby Link: https://lore.kernel.org/r/20250903031800.4173-1-tom@ewsting.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/asus_ec_sensors.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/asus_ec_sensors.rst index 12c6b5b266bb..e5052159ffa0 100644 --- a/Documentation/hwmon/asus_ec_sensors.rst +++ b/Documentation/hwmon/asus_ec_sensors.rst @@ -36,6 +36,7 @@ Supported boards: * ROG STRIX Z390-F GAMING * ROG STRIX Z490-F GAMING * ROG STRIX Z690-A GAMING WIFI D4 + * ROG STRIX Z690-E GAMING WIFI * ROG STRIX Z790-E GAMING WIFI II * ROG STRIX Z790-I GAMING WIFI * ROG ZENITH II EXTREME -- cgit v1.2.3 From 8702c8f53d93929a804cd16015e229cb0770b4ec Mon Sep 17 00:00:00 2001 From: Eugene Shalygin Date: Wed, 3 Sep 2025 21:17:26 +0200 Subject: hwmon: (asus-ec-sensors) add PRIME Z270-A MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for the PRIME Z270-A board. Tested-by: Jan Philipp Groß Signed-off-by: Eugene Shalygin Link: https://lore.kernel.org/r/20250903191736.14451-1-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/asus_ec_sensors.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/asus_ec_sensors.rst index e5052159ffa0..baf9eba5957c 100644 --- a/Documentation/hwmon/asus_ec_sensors.rst +++ b/Documentation/hwmon/asus_ec_sensors.rst @@ -8,6 +8,7 @@ Supported boards: * PRIME X470-PRO * PRIME X570-PRO * PRIME X670E-PRO WIFI + * PRIME Z270-A * Pro WS X570-ACE * Pro WS WRX90E-SAGE SE * ProArt X570-CREATOR WIFI -- cgit v1.2.3 From bd48b5a4e8d3e1ac2c1ba1e18ba1350ea2c9eb10 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 4 Sep 2025 22:21:09 +0200 Subject: dt-bindings: hwmon: pwm-fan: Document after shutdown fan settings Document fan-shutdown-percent property, used to describe fan RPM in percent set during shutdown. This is used to keep the fan running at fixed RPM after the kernel shut down, which is useful on hardware that does keep heating itself even after the kernel did shut down, for example from some sort of management core. Signed-off-by: Marek Vasut Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250904202157.170600-1-marek.vasut+renesas@mailbox.org Signed-off-by: Guenter Roeck --- Documentation/devicetree/bindings/hwmon/pwm-fan.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/pwm-fan.yaml b/Documentation/devicetree/bindings/hwmon/pwm-fan.yaml index 8b4ed5ee962f..a84cc3a4cfdc 100644 --- a/Documentation/devicetree/bindings/hwmon/pwm-fan.yaml +++ b/Documentation/devicetree/bindings/hwmon/pwm-fan.yaml @@ -31,6 +31,15 @@ properties: it must be self resetting edge interrupts. maxItems: 1 + fan-shutdown-percent: + description: + Fan RPM in percent set during shutdown. This is used to keep the fan + running at fixed RPM after the kernel shut down, which is useful on + hardware that does keep heating itself even after the kernel did shut + down, for example from some sort of management core. + minimum: 0 + maximum: 100 + fan-stop-to-start-percent: description: Minimum fan RPM in percent to start when stopped. -- cgit v1.2.3 From 0bcd01f757bc06471c82a137eafee281ef1b6e38 Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Wed, 28 Aug 2024 21:56:57 -0700 Subject: hwmon: Introduce 64-bit energy attribute support Many chips require 64-bit variables to display the accumulated energy, even more so since the energy units are micro-Joule. Add new sensor type "energy64" to support reporting the chip energy as 64-bit values. Changing the entire hardware monitoring API is not feasible, and it is only really necessary to support reading 64-bit values for the "energyX_input" attribute. For this reason, keep the API as-is and use type casts on both ends to pass 64-bit pointers when reading the accumulated energy. On the write side (which is only useful for the energyX_enable attribute), keep passing the written value as long. Reviewed-by: Chris Packham Tested-by: Chris Packham # INA780 Signed-off-by: Guenter Roeck --- Documentation/hwmon/hwmon-kernel-api.rst | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/hwmon-kernel-api.rst b/Documentation/hwmon/hwmon-kernel-api.rst index e47fc757e63e..037b69c23cb5 100644 --- a/Documentation/hwmon/hwmon-kernel-api.rst +++ b/Documentation/hwmon/hwmon-kernel-api.rst @@ -159,6 +159,7 @@ It contains following fields: hwmon_curr Current sensor hwmon_power Power sensor hwmon_energy Energy sensor + hwmon_energy64 Energy sensor, reported as 64-bit signed value hwmon_humidity Humidity sensor hwmon_fan Fan speed sensor hwmon_pwm PWM control @@ -288,6 +289,8 @@ Parameters: The sensor channel number. val: Pointer to attribute value. + For hwmon_energy64, `'val`' is passed as `long *` but needs + a typecast to `s64 *`. Return value: 0 on success, a negative error number otherwise. -- cgit v1.2.3 From 9a8113a5c6eb23aaaafa9bde043b76a22a3a4e44 Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Sun, 31 Aug 2025 14:53:58 -0700 Subject: hwmon: (ina238) Drop platform data support There are no in-tree users of ina2xx platform data. Drop support for it. The driver already supports device properties which can be used as alternative if needed. Also remove reference to the non-existing shunt_resistor sysfs attribute from the driver documentation. Reviewed-by: Chris Packham Tested-by: Chris Packham # INA780 Signed-off-by: Guenter Roeck --- Documentation/hwmon/ina238.rst | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/hwmon/ina238.rst b/Documentation/hwmon/ina238.rst index 9a24da4786a4..9b830e37c986 100644 --- a/Documentation/hwmon/ina238.rst +++ b/Documentation/hwmon/ina238.rst @@ -29,10 +29,10 @@ The INA238 is a current shunt, power and temperature monitor with an I2C interface. It includes a number of programmable functions including alerts, conversion rate, sample averaging and selectable shunt voltage accuracy. -The shunt value in micro-ohms can be set via platform data or device tree at -compile-time or via the shunt_resistor attribute in sysfs at run-time. Please -refer to the Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml for bindings -if the device tree is used. +The shunt value in micro-ohms can be set via device properties, either from +platform code or from device tree data. Please refer to +Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml for bindings if +device tree is used. Sysfs entries ------------- -- cgit v1.2.3 From f2711a19651f28b426cf78792822a37f7641f43c Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Fri, 5 Sep 2025 13:20:04 -0700 Subject: hwmon: (ina238) Update documentation and Kconfig entry Update driver documentation and Kconfig entry to list all chips supported by the driver. Reviewed-by: Chris Packham Tested-by: Chris Packham # INA780 Signed-off-by: Guenter Roeck --- Documentation/hwmon/ina238.rst | 39 ++++++++++++++++++++++++++++++--------- 1 file changed, 30 insertions(+), 9 deletions(-) (limited to 'Documentation') diff --git a/Documentation/hwmon/ina238.rst b/Documentation/hwmon/ina238.rst index 9b830e37c986..1ac4e2c419ac 100644 --- a/Documentation/hwmon/ina238.rst +++ b/Documentation/hwmon/ina238.rst @@ -5,6 +5,24 @@ Kernel driver ina238 Supported chips: + * Texas Instruments INA228 + + Prefix: 'ina228' + + Addresses: I2C 0x40 - 0x4f + + Datasheet: + https://www.ti.com/lit/gpn/ina228 + + * Texas Instruments INA237 + + Prefix: 'ina237' + + Addresses: I2C 0x40 - 0x4f + + Datasheet: + https://www.ti.com/lit/gpn/ina237 + * Texas Instruments INA238 Prefix: 'ina238' @@ -34,6 +52,13 @@ platform code or from device tree data. Please refer to Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml for bindings if device tree is used. +INA237 is a functionally equivalent variant of INA238 with slightly +different accuracy. INA228 is another variant of INA238 with higher ADC +resolution. This chip also reports the energy. + +SQ52206 is a mostly compatible chip from Sylergy. It reports the energy +as well as the peak power consumption. + Sysfs entries ------------- @@ -53,19 +78,15 @@ in1_max_alarm Maximum shunt voltage alarm power1_input Power measurement (uW) power1_max Maximum power threshold (uW) power1_max_alarm Maximum power alarm +power1_input_highest Peak Power (uW) + (SQ52206 only) curr1_input Current measurement (mA) +energy1_input Energy measurement (uJ) + (SQ52206 and INA237 only) + temp1_input Die temperature measurement (mC) temp1_max Maximum die temperature threshold (mC) temp1_max_alarm Maximum die temperature alarm ======================= ======================================================= - -Additional sysfs entries for sq52206 ------------------------------------- - -======================= ======================================================= -energy1_input Energy measurement (uJ) - -power1_input_highest Peak Power (uW) -======================= ======================================================= -- cgit v1.2.3 From a1d5f8ecb934066220b4cb1b8ba831a8726bf52f Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Sun, 31 Aug 2025 09:25:16 -0700 Subject: hwmon: (ina238) Add support for current limits Since the shunt voltage register and the current register now report the same values, use the shunt voltage limit registers to report and adjust current limits, using the same LSB as the LSB used for the actual current register. Handle current register accuracy differences in separate function to improve code readability. Reviewed-by: Chris Packham Tested-by: Chris Packham # INA780 Signed-off-by: Guenter Roeck --- Documentation/hwmon/ina238.rst | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/ina238.rst b/Documentation/hwmon/ina238.rst index 1ac4e2c419ac..3c7db4a47056 100644 --- a/Documentation/hwmon/ina238.rst +++ b/Documentation/hwmon/ina238.rst @@ -82,6 +82,10 @@ power1_input_highest Peak Power (uW) (SQ52206 only) curr1_input Current measurement (mA) +curr1_min Minimum current threshold (mA) +curr1_min_alarm Minimum current alarm +curr1_max Maximum current threshold (mA) +curr1_max_alarm Maximum current alarm energy1_input Energy measurement (uJ) (SQ52206 and INA237 only) -- cgit v1.2.3 From 248fd3b96d08c2a5736ca8395470544f23fe1f5c Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Sun, 31 Aug 2025 09:39:53 -0700 Subject: hwmon: (ina238) Add support for INA780 INA780 is similar to the other chips in the series, but does not support the shunt voltage register. Shunt voltage limit registers have been renamed to current limit registers, but are otherwise identical. While the chip does not directly report the shunt voltage, report it anyway by calculating its value from the current register. Cc: Chris Packham Reviewed-by: Chris Packham Tested-by: Chris Packham # INA780 Signed-off-by: Guenter Roeck --- Documentation/hwmon/ina238.rst | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/hwmon/ina238.rst b/Documentation/hwmon/ina238.rst index 3c7db4a47056..722760961821 100644 --- a/Documentation/hwmon/ina238.rst +++ b/Documentation/hwmon/ina238.rst @@ -32,6 +32,11 @@ Supported chips: Datasheet: https://www.ti.com/lit/gpn/ina238 + * Texas Instruments INA780 + + Datasheet: + https://www.ti.com/product/ina780a + * Silergy SQ52206 Prefix: 'SQ52206' @@ -56,6 +61,9 @@ INA237 is a functionally equivalent variant of INA238 with slightly different accuracy. INA228 is another variant of INA238 with higher ADC resolution. This chip also reports the energy. +INA780 is a variant of the chip series with built-in shunt resistor. +It also reports the energy. + SQ52206 is a mostly compatible chip from Sylergy. It reports the energy as well as the peak power consumption. @@ -88,7 +96,7 @@ curr1_max Maximum current threshold (mA) curr1_max_alarm Maximum current alarm energy1_input Energy measurement (uJ) - (SQ52206 and INA237 only) + (SQ52206, INA237, and INA780 only) temp1_input Die temperature measurement (mC) temp1_max Maximum die temperature threshold (mC) -- cgit v1.2.3 From 7942ca9a475115b9668e53c2d9cfb57a51d62e04 Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Mon, 1 Sep 2025 09:02:07 -0700 Subject: dt-bindings: hwmon: ti,ina2xx: Add INA700 Add a compatible string for INA700. The chip is register compatible with INA780 but implements different ADC ranges and thus needs a separate compatible entry. Cc: Christian Kahr Reviewed-by: Chris Packham Tested-by: Chris Packham # INA780 Reviewed-by: Krzysztof Kozlowski Signed-off-by: Guenter Roeck --- Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml index 8b491be9c49d..d3cde8936686 100644 --- a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml +++ b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml @@ -32,6 +32,7 @@ properties: - ti,ina237 - ti,ina238 - ti,ina260 + - ti,ina700 - ti,ina780 reg: @@ -115,6 +116,7 @@ allOf: - ti,ina237 - ti,ina238 - ti,ina260 + - ti,ina700 - ti,ina780 then: properties: @@ -133,6 +135,7 @@ allOf: - ti,ina230 - ti,ina231 - ti,ina260 + - ti,ina700 - ti,ina780 then: properties: @@ -143,6 +146,7 @@ allOf: compatible: contains: enum: + - ti,ina700 - ti,ina780 then: properties: -- cgit v1.2.3 From 273bfedc003c40bb0fb471841c62f4fc7063be83 Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Sun, 31 Aug 2025 17:54:16 -0700 Subject: hwmon: (ina238) Add support for INA700 INA700 is register compatible to INA780 but has different current, power, and energy LSB values. While the chip does not directly report the shunt voltage, report it anyway by calculating its value from the current register. Reviewed-by: Chris Packham Tested-by: Chris Packham # INA780 Cc: Christian Kahr Signed-off-by: Guenter Roeck --- Documentation/hwmon/ina238.rst | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/hwmon/ina238.rst b/Documentation/hwmon/ina238.rst index 722760961821..43950d1ec551 100644 --- a/Documentation/hwmon/ina238.rst +++ b/Documentation/hwmon/ina238.rst @@ -32,6 +32,11 @@ Supported chips: Datasheet: https://www.ti.com/lit/gpn/ina238 + * Texas Instruments INA700 + + Datasheet: + https://www.ti.com/product/ina700 + * Texas Instruments INA780 Datasheet: @@ -61,8 +66,8 @@ INA237 is a functionally equivalent variant of INA238 with slightly different accuracy. INA228 is another variant of INA238 with higher ADC resolution. This chip also reports the energy. -INA780 is a variant of the chip series with built-in shunt resistor. -It also reports the energy. +INA700 and INA780 are variants of the chip series with built-in shunt resistor. +They also report the energy. SQ52206 is a mostly compatible chip from Sylergy. It reports the energy as well as the peak power consumption. -- cgit v1.2.3 From 55cb81254333ab90985a9e861d33c6f8e1cf0118 Mon Sep 17 00:00:00 2001 From: Maciej Zonski Date: Sat, 6 Sep 2025 18:17:37 +0200 Subject: hwmon: (asus-ec-sensors) add ROG STRIX X870-I GAMING WIFI Add support for ROG STRIX X870-I GAMING WIFI Signed-off-by: Maciej Zonski Signed-off-by: Eugene Shalygin Link: https://lore.kernel.org/r/20250906161748.219567-1-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/asus_ec_sensors.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/asus_ec_sensors.rst index baf9eba5957c..6a9c5f30e016 100644 --- a/Documentation/hwmon/asus_ec_sensors.rst +++ b/Documentation/hwmon/asus_ec_sensors.rst @@ -34,6 +34,7 @@ Supported boards: * ROG STRIX X570-F GAMING * ROG STRIX X570-I GAMING * ROG STRIX X670E-I GAMING WIFI + * ROG STRIX X870-I GAMING WIFI * ROG STRIX Z390-F GAMING * ROG STRIX Z490-F GAMING * ROG STRIX Z690-A GAMING WIFI D4 -- cgit v1.2.3 From c97c66e04c2294d59827835e6fd46e0e4a5e2c06 Mon Sep 17 00:00:00 2001 From: Wensheng Wang Date: Tue, 5 Aug 2025 18:20:18 +0800 Subject: dt-bindings: hwmon: Add MPS mp2869,mp29608,mp29612,mp29816 and mp29502 Add support for MPS mp2869/mp2869a,mp29608/mp29608a,mp29612/mp29612a, mp29816/mp29816a/mp29816b/mp29816c and mp29502 controller. Acked-by: Rob Herring (Arm) Signed-off-by: Wensheng Wang Link: https://lore.kernel.org/r/20250805102020.749850-1-wenswang@yeah.net Signed-off-by: Guenter Roeck --- Documentation/devicetree/bindings/trivial-devices.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index f3dd18681aa6..0e6ba6e12a63 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -293,10 +293,20 @@ properties: - mps,mp2856 # Monolithic Power Systems Inc. multi-phase controller mp2857 - mps,mp2857 + # Monolithic Power Systems Inc. multi-phase controller mp2869 + - mps,mp2869 # Monolithic Power Systems Inc. multi-phase controller mp2888 - mps,mp2888 # Monolithic Power Systems Inc. multi-phase controller mp2891 - mps,mp2891 + # Monolithic Power Systems Inc. multi-phase controller mp29502 + - mps,mp29502 + # Monolithic Power Systems Inc. multi-phase controller mp29608 + - mps,mp29608 + # Monolithic Power Systems Inc. multi-phase controller mp29612 + - mps,mp29612 + # Monolithic Power Systems Inc. multi-phase controller mp29816 + - mps,mp29816 # Monolithic Power Systems Inc. multi-phase controller mp2993 - mps,mp2993 # Monolithic Power Systems Inc. hot-swap protection device -- cgit v1.2.3 From a3a2923aaf7f2cf3aaa4649bddee2f936751825f Mon Sep 17 00:00:00 2001 From: Wensheng Wang Date: Tue, 5 Aug 2025 18:20:19 +0800 Subject: hwmon: add MP2869,MP29608,MP29612 and MP29816 series driver Add support for MPS VR mp2869/mp2869a,mp29608/mp29608a,mp29612/mp29612a and mp29816/mp29816a/mp29816b/mp29816c controller. This driver exposes telemetry and limit value readings and writtings. Signed-off-by: Wensheng Wang Link: https://lore.kernel.org/r/20250805102020.749850-2-wenswang@yeah.net Signed-off-by: Guenter Roeck --- Documentation/hwmon/index.rst | 1 + Documentation/hwmon/mp2869.rst | 175 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 176 insertions(+) create mode 100644 Documentation/hwmon/mp2869.rst (limited to 'Documentation') diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index d292a86ac5da..36303148dc43 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -173,6 +173,7 @@ Hardware Monitoring Kernel Drivers menf21bmc mlxreg-fan mp2856 + mp2869 mp2888 mp2891 mp2975 diff --git a/Documentation/hwmon/mp2869.rst b/Documentation/hwmon/mp2869.rst new file mode 100644 index 000000000000..2d9d65fc86b6 --- /dev/null +++ b/Documentation/hwmon/mp2869.rst @@ -0,0 +1,175 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Kernel driver mp2869 +==================== + +Supported chips: + + * MPS mp2869 + + Prefix: 'mp2869' + + * MPS mp29608 + + Prefix: 'mp29608' + + * MPS mp29612 + + Prefix: 'mp29612' + + * MPS mp29816 + + Prefix: 'mp29816' + +Author: + + Wensheng Wang + +Description +----------- + +This driver implements support for Monolithic Power Systems, Inc. (MPS) +MP2869 Dual Loop Digital Multi-phase Controller. + +Device compliant with: + +- PMBus rev 1.3 interface. + +The driver exports the following attributes via the 'sysfs' files +for input voltage: + +**in1_input** + +**in1_label** + +**in1_crit** + +**in1_crit_alarm** + +**in1_lcrit** + +**in1_lcrit_alarm** + +**in1_min** + +**in1_min_alarm** + +The driver provides the following attributes for output voltage: + +**in2_input** + +**in2_label** + +**in2_crit** + +**in2_crit_alarm** + +**in2_lcrit** + +**in2_lcrit_alarm** + +**in3_input** + +**in3_label** + +**in3_crit** + +**in3_crit_alarm** + +**in3_lcrit** + +**in3_lcrit_alarm** + +The driver provides the following attributes for input current: + +**curr1_input** + +**curr1_label** + +**curr2_input** + +**curr2_label** + +The driver provides the following attributes for output current: + +**curr3_input** + +**curr3_label** + +**curr3_crit** + +**curr3_crit_alarm** + +**curr3_max** + +**curr3_max_alarm** + +**curr4_input** + +**curr4_label** + +**curr4_crit** + +**curr4_crit_alarm** + +**curr4_max** + +**curr4_max_alarm** + +The driver provides the following attributes for input power: + +**power1_input** + +**power1_label** + +**power2_input** + +**power2_label** + +The driver provides the following attributes for output power: + +**power3_input** + +**power3_label** + +**power3_input** + +**power3_label** + +**power3_max** + +**power3_max_alarm** + +**power4_input** + +**power4_label** + +**power4_input** + +**power4_label** + +**power4_max** + +**power4_max_alarm** + +The driver provides the following attributes for temperature: + +**temp1_input** + +**temp1_crit** + +**temp1_crit_alarm** + +**temp1_max** + +**temp1_max_alarm** + +**temp2_input** + +**temp2_crit** + +**temp2_crit_alarm** + +**temp2_max** + +**temp2_max_alarm** -- cgit v1.2.3 From de33ea612a36f8415579298899fd0b6c28a45c80 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 6 May 2025 10:32:15 +0300 Subject: dt-bindings: extcon: Document Maxim MAX14526 MUIC Add bindings for Maxim MAX14526 MicroUSB Integrated Circuit. Link: https://lore.kernel.org/lkml/20250506073216.43059-2-clamor95@gmail.com/ Signed-off-by: Svyatoslav Ryhel Reviewed-by: Krzysztof Kozlowski Signed-off-by: Chanwoo Choi --- .../devicetree/bindings/extcon/maxim,max14526.yaml | 80 ++++++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/extcon/maxim,max14526.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/extcon/maxim,max14526.yaml b/Documentation/devicetree/bindings/extcon/maxim,max14526.yaml new file mode 100644 index 000000000000..7eb5918df1c2 --- /dev/null +++ b/Documentation/devicetree/bindings/extcon/maxim,max14526.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/extcon/maxim,max14526.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX14526 MicroUSB Integrated Circuit (MUIC) + +maintainers: + - Svyatoslav Ryhel + +properties: + compatible: + const: maxim,max14526 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + connector: + $ref: /schemas/connector/usb-connector.yaml# + + port: + $ref: /schemas/graph.yaml#/properties/port + +required: + - compatible + - reg + - interrupts + - connector + - port + +unevaluatedProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + muic@44 { + compatible = "maxim,max14526"; + reg = <0x44>; + + interrupt-parent = <&gpio>; + interrupts = <72 IRQ_TYPE_EDGE_FALLING>; + + connector { + compatible = "usb-b-connector"; + label = "micro-USB"; + type = "micro"; + }; + + port { + #address-cells = <1>; + #size-cells = <0>; + + muic_to_charger: endpoint@0 { + reg = <0>; + remote-endpoint = <&charger_input>; + }; + + muic_to_usb: endpoint@1 { + reg = <1>; + remote-endpoint = <&usb_input>; + }; + + muic_to_mhl: endpoint@2 { + reg = <2>; + remote-endpoint = <&mhl_input>; + }; + }; + }; + }; +... -- cgit v1.2.3 From 958bb5a2794b2090593bd7a064e0c2f53dfa20cf Mon Sep 17 00:00:00 2001 From: Artur Weber Date: Sun, 17 Aug 2025 10:52:04 +0200 Subject: dt-bindings: extcon: rt8973a: Convert DT bindings to YAML Convert the device tree bindings for Richtek RT8973A MUIC to the YAML format. No functional changes. Signed-off-by: Artur Weber Reviewed-by: Rob Herring (Arm) Signed-off-by: Chanwoo Choi Link: https://lore.kernel.org/lkml/20250817-rt8973a-dt-bindings-yaml-v1-1-150eb4599dc9@gmail.com/ --- .../devicetree/bindings/extcon/extcon-rt8973a.txt | 23 ---------- .../bindings/extcon/richtek,rt8973a-muic.yaml | 49 ++++++++++++++++++++++ 2 files changed, 49 insertions(+), 23 deletions(-) delete mode 100644 Documentation/devicetree/bindings/extcon/extcon-rt8973a.txt create mode 100644 Documentation/devicetree/bindings/extcon/richtek,rt8973a-muic.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/extcon/extcon-rt8973a.txt b/Documentation/devicetree/bindings/extcon/extcon-rt8973a.txt deleted file mode 100644 index cfcf455ad4de..000000000000 --- a/Documentation/devicetree/bindings/extcon/extcon-rt8973a.txt +++ /dev/null @@ -1,23 +0,0 @@ - -* Richtek RT8973A - Micro USB Switch device - -The Richtek RT8973A is Micro USB Switch with OVP and I2C interface. The RT8973A -is a USB port accessory detector and switch that is optimized to protect low -voltage system from abnormal high input voltage (up to 28V) and supports high -speed USB operation. Also, RT8973A support 'auto-configuration' mode. -If auto-configuration mode is enabled, RT8973A would control internal h/w patch -for USB D-/D+ switching. - -Required properties: -- compatible: Should be "richtek,rt8973a-muic" -- reg: Specifies the I2C slave address of the MUIC block. It should be 0x14 -- interrupts: Interrupt specifiers for detection interrupt sources. - -Example: - - rt8973a@14 { - compatible = "richtek,rt8973a-muic"; - interrupt-parent = <&gpx1>; - interrupts = <5 0>; - reg = <0x14>; - }; diff --git a/Documentation/devicetree/bindings/extcon/richtek,rt8973a-muic.yaml b/Documentation/devicetree/bindings/extcon/richtek,rt8973a-muic.yaml new file mode 100644 index 000000000000..f9e0d816c025 --- /dev/null +++ b/Documentation/devicetree/bindings/extcon/richtek,rt8973a-muic.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/extcon/richtek,rt8973a-muic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Richtek RT8973A MUIC + +maintainers: + - Chanwoo Choi + +description: + The Richtek RT8973A is Micro USB Switch with OVP and I2C interface. The RT8973A + is a USB port accessory detector and switch that is optimized to protect low + voltage system from abnormal high input voltage (up to 28V) and supports high + speed USB operation. Also, RT8973A support 'auto-configuration' mode. + If auto-configuration mode is enabled, RT8973A would control internal h/w patch + for USB D-/D+ switching. + +properties: + compatible: + const: richtek,rt8973a-muic + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + usb-switch@14 { + compatible = "richtek,rt8973a-muic"; + reg = <0x14>; + interrupt-parent = <&gpio>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; + }; + }; -- cgit v1.2.3 From 94d885eb8ffe15b3eb4abe92e03d852fce8ba81f Mon Sep 17 00:00:00 2001 From: David Heidelberg Date: Thu, 4 Sep 2025 22:41:44 +0200 Subject: dt-bindings: extcon: linux,extcon-usb-gpio: GPIO must be provided Without providing either ID or VBUS GPIO the driver is not able to operate. Original text binding says: "Either one of id-gpio or vbus-gpio must be present." Fixes: 79a31ce03f41 ("dt-bindings: extcon: convert extcon-usb-gpio.txt to yaml format") Acked-by: Conor Dooley Signed-off-by: David Heidelberg Signed-off-by: Chanwoo Choi Link: https://lore.kernel.org/lkml/20250904-yaml-extcon-usb-gpio-v2-1-a5c4afa496c3@ixit.cz/ --- Documentation/devicetree/bindings/extcon/linux,extcon-usb-gpio.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/extcon/linux,extcon-usb-gpio.yaml b/Documentation/devicetree/bindings/extcon/linux,extcon-usb-gpio.yaml index 8856107bdd33..8f29d333602b 100644 --- a/Documentation/devicetree/bindings/extcon/linux,extcon-usb-gpio.yaml +++ b/Documentation/devicetree/bindings/extcon/linux,extcon-usb-gpio.yaml @@ -25,6 +25,12 @@ properties: required: - compatible +anyOf: + - required: + - id-gpios + - required: + - vbus-gpios + additionalProperties: false examples: -- cgit v1.2.3 From 084d01a173f5f41afd326b1dfe73085972530ca7 Mon Sep 17 00:00:00 2001 From: Yao Zi Date: Thu, 4 Sep 2025 01:34:36 +0000 Subject: dt-bindings: gpio: loongson: Document GPIO controller of LS2K0300 SoC Loongson-2K0300 ships a GPIO controller whose input/output control logic is similar to previous generation of SoCs. Additionally, it acts as an interrupt-controller supporting both level and edge interrupts and has a distinct reset signal. Describe its compatible in devicetree. We enlarge the maximum value of ngpios to 128, since the controller technically supports at most 128 pins, although only 106 are routed out of the package. Properties for interrupt-controllers and resets are introduced and limited as LS2K0300 only. Signed-off-by: Yao Zi Reviewed-by: Krzysztof Kozlowski Reviewed-by: Huacai Chen Reviewed-by: Linus Walleij Link: https://lore.kernel.org/r/20250904013438.2405-2-ziyao@disroot.org Signed-off-by: Bartosz Golaszewski --- .../devicetree/bindings/gpio/loongson,ls-gpio.yaml | 28 +++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml b/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml index b68159600e2b..69852444df23 100644 --- a/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml @@ -14,6 +14,7 @@ properties: oneOf: - enum: - loongson,ls2k-gpio + - loongson,ls2k0300-gpio - loongson,ls2k0500-gpio0 - loongson,ls2k0500-gpio1 - loongson,ls2k2000-gpio0 @@ -36,7 +37,7 @@ properties: ngpios: minimum: 1 - maximum: 64 + maximum: 128 "#gpio-cells": const: 2 @@ -49,6 +50,14 @@ properties: minItems: 1 maxItems: 64 + "#interrupt-cells": + const: 2 + + interrupt-controller: true + + resets: + maxItems: 1 + required: - compatible - reg @@ -58,6 +67,23 @@ required: - gpio-ranges - interrupts +allOf: + - if: + properties: + compatible: + contains: + const: loongson,ls2k0300-gpio + then: + required: + - "#interrupt-cells" + - interrupt-controller + - resets + else: + properties: + "#interrupts-cells": false + interrupt-controller: false + resets: false + additionalProperties: false examples: -- cgit v1.2.3 From 07333899650a5d4c785d3257ee4cd278006b1070 Mon Sep 17 00:00:00 2001 From: "Ivan T. Ivanov" Date: Thu, 28 Aug 2025 14:47:38 +0200 Subject: dt-bindings: pinctrl: Add support for Broadcom STB pin controller The STB pin controller represents a family whose silicon instances are found e.g. on BCM2712 SoC. In particular, on RaspberryPi 5, there are two separate instantiations of the same IP block which differ in the number of pins that are associated and the pinmux functions for each of those pins. The -aon- variant stands for 'Always On'. Depending on the revision of the BCM2712 (CO or D0), the pin controller instance has slight differences in the register layout. Signed-off-by: Ivan T. Ivanov Signed-off-by: Andrea della Porta Reviewed-by: Rob Herring (Arm) [linusw: Dropped extranous label and fixed whitespace] Signed-off-by: Linus Walleij --- .../bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml | 137 +++++++++++++++++++++ 1 file changed, 137 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml new file mode 100644 index 000000000000..ae6c13a746b9 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml @@ -0,0 +1,137 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/brcm,bcm2712c0-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom STB family pin controller + +maintainers: + - Ivan T. Ivanov + - A. della Porta + +description: > + Broadcom's STB family of memory-mapped pin controllers. + + This includes the pin controllers inside the BCM2712 SoC which + are instances of the STB family and has two silicon variants, + C0 and D0, which differs slightly in terms of registers layout. + + The -aon- (Always On) variant is the same IP block but differs + in the number of pins that are associated and the pinmux functions + for each of those pins. + +allOf: + - $ref: pinctrl.yaml# + +properties: + compatible: + enum: + - brcm,bcm2712c0-pinctrl + - brcm,bcm2712c0-aon-pinctrl + - brcm,bcm2712d0-pinctrl + - brcm,bcm2712d0-aon-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '-state$': + oneOf: + - $ref: '#/$defs/brcmstb-pinctrl-state' + - patternProperties: + '-pins$': + $ref: '#/$defs/brcmstb-pinctrl-state' + additionalProperties: false + +$defs: + brcmstb-pinctrl-state: + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + description: > + Pin controller client devices use pin configuration subnodes (children + and grandchildren) for desired pin configuration. + + Client device subnodes use below standard properties. + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode (either this or "groups" must be specified). + items: + pattern: '^((aon_)?s?gpio[0-6]?[0-9])|(emmc_(clk|cmd|dat[0-7]|ds))$' + + function: + description: + Specify the alternative function to be configured for the specified + pins. + enum: [ gpio, alt1, alt2, alt3, alt4, alt5, alt6, alt7, alt8, + aon_cpu_standbyb, aon_fp_4sec_resetb, aon_gpclk, aon_pwm, + arm_jtag, aud_fs_clk0, avs_pmu_bsc, bsc_m0, bsc_m1, bsc_m2, + bsc_m3, clk_observe, ctl_hdmi_5v, enet0, enet0_mii, enet0_rgmii, + ext_sc_clk, fl0, fl1, gpclk0, gpclk1, gpclk2, hdmi_tx0_auto_i2c, + hdmi_tx0_bsc, hdmi_tx1_auto_i2c, hdmi_tx1_bsc, i2s_in, i2s_out, + ir_in, mtsif, mtsif_alt, mtsif_alt1, pdm, pkt, pm_led_out, sc0, + sd0, sd2, sd_card_a, sd_card_b, sd_card_c, sd_card_d, sd_card_e, + sd_card_f, sd_card_g, spdif_out, spi_m, spi_s, sr_edm_sense, te0, + te1, tsio, uart0, uart1, uart2, usb_pwr, usb_vbus, uui, vc_i2c0, + vc_i2c3, vc_i2c4, vc_i2c5, vc_i2csl, vc_pcm, vc_pwm0, vc_pwm1, + vc_spi0, vc_spi3, vc_spi4, vc_spi5, vc_uart0, vc_uart2, vc_uart3, + vc_uart4 ] + + bias-disable: true + bias-pull-down: true + bias-pull-up: true + + required: + - pins + + if: + properties: + pins: + not: + contains: + pattern: "^emmc_(clk|cmd|dat[0-7]|ds)$" + then: + required: + - function + else: + properties: + function: false + + additionalProperties: false + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + pinctrl@7d504100 { + compatible = "brcm,bcm2712c0-pinctrl"; + reg = <0x7d504100 0x30>; + + bt-shutdown-default-state { + function = "gpio"; + pins = "gpio29"; + }; + + uarta-default-state { + rts-tx-pins { + function = "uart0"; + pins = "gpio24", "gpio26"; + bias-disable; + }; + + cts-rx-pins { + function = "uart0"; + pins = "gpio25", "gpio27"; + bias-pull-up; + }; + }; + }; -- cgit v1.2.3 From 203a83112e097a501fbe12722b6342787497efe0 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 5 Sep 2025 11:21:50 +0200 Subject: pinctrl: generic: rename PIN_CONFIG_OUTPUT to LEVEL This generic pin config property is confusingly named so let's rename it to make things clearer. There are already drivers in the tree that use PIN_CONFIG_OUTPUT to *read* the value of an output driven pin, which is a big semantic confusion for the head: are we then reading the setting of the output or the actual value/level that is put out on the pin? We already have PIN_CONFIG_OUTPUT_ENABLE that turns on driver buffers for output, so this can by logical conclusion only drive the voltage level if it should be any different. But if we read the pin, are we then reading the *setting* of the output value or the *actual* value we can see on the line? If the pin has not first been set into output mode with PIN_CONFIG_OUTPUT_ENABLE, but is instead in some input mode or tristate, what will reading this property actually return? Reading the current users reading this property it is clear that what we read is the logical level of the pin as 0 or 1 depending on if it is low or high. Rename it to PIN_CONFIG_LEVEL so it is crystal clear that we set or read the voltage level of the pin and nothing else. Acked-by: Sudeep Holla Signed-off-by: Linus Walleij --- Documentation/driver-api/pin-control.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/pin-control.rst b/Documentation/driver-api/pin-control.rst index 27ea1236307e..8208924e513e 100644 --- a/Documentation/driver-api/pin-control.rst +++ b/Documentation/driver-api/pin-control.rst @@ -863,7 +863,7 @@ has to be handled by the ```` interface. Instead view thi a certain pin config setting. Look in e.g. ```` and you find this in the documentation: - PIN_CONFIG_OUTPUT: + PIN_CONFIG_LEVEL: this will configure the pin in output, use argument 1 to indicate high level, argument 0 to indicate low level. @@ -897,7 +897,7 @@ And your machine configuration may look like this: }; static unsigned long uart_sleep_mode[] = { - PIN_CONF_PACKED(PIN_CONFIG_OUTPUT, 0), + PIN_CONF_PACKED(PIN_CONFIG_LEVEL, 0), }; static struct pinctrl_map pinmap[] __initdata = { -- cgit v1.2.3 From 3c0979c64481f07a6bf9c1775601845ac5fa57f3 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 23 Jul 2025 13:27:45 +0100 Subject: arm64/sme: Drop inaccurate documentation of streaming mode switches The SME ABI documentation contains an inaccurate description of the architectural streaming mode entry/exit behaviour, just remove it since this is better documented by the architecture or with the rest of the documentation for the specific software interfaces concerned. Signed-off-by: Mark Brown Signed-off-by: Will Deacon --- Documentation/arch/arm64/sme.rst | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) (limited to 'Documentation') diff --git a/Documentation/arch/arm64/sme.rst b/Documentation/arch/arm64/sme.rst index 4cb38330e704..583f2ee9cb97 100644 --- a/Documentation/arch/arm64/sme.rst +++ b/Documentation/arch/arm64/sme.rst @@ -81,17 +81,7 @@ The ZA matrix is square with each side having as many bytes as a streaming mode SVE vector. -3. Sharing of streaming and non-streaming mode SVE state ---------------------------------------------------------- - -It is implementation defined which if any parts of the SVE state are shared -between streaming and non-streaming modes. When switching between modes -via software interfaces such as ptrace if no register content is provided as -part of switching no state will be assumed to be shared and everything will -be zeroed. - - -4. System call behaviour +3. System call behaviour ------------------------- * On syscall PSTATE.ZA is preserved, if PSTATE.ZA==1 then the contents of the @@ -112,7 +102,7 @@ be zeroed. exceptions for execve() described in section 6. -5. Signal handling +4. Signal handling ------------------- * Signal handlers are invoked with PSTATE.SM=0, PSTATE.ZA=0, and TPIDR2_EL0=0. -- cgit v1.2.3 From ebe397530638859853738ac1fcd082e1a0fdacdc Mon Sep 17 00:00:00 2001 From: Pankaj Patil Date: Fri, 5 Sep 2025 20:40:19 +0530 Subject: dt-bindings: pinctrl: qcom: Add Glymur pinctrl Add DeviceTree binding for Glymur SoC TLMM block Reviewed-by: Krzysztof Kozlowski Signed-off-by: Pankaj Patil Signed-off-by: Linus Walleij --- .../bindings/pinctrl/qcom,glymur-tlmm.yaml | 133 +++++++++++++++++++++ 1 file changed, 133 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,glymur-tlmm.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,glymur-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,glymur-tlmm.yaml new file mode 100644 index 000000000000..d2b0cfeffb50 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,glymur-tlmm.yaml @@ -0,0 +1,133 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,glymur-tlmm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. Glymur TLMM block + +maintainers: + - Bjorn Andersson + +description: + Top Level Mode Multiplexer pin controller in Qualcomm Glymur SoC. + +allOf: + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# + +properties: + compatible: + const: qcom,glymur-tlmm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + gpio-reserved-ranges: + minItems: 1 + maxItems: 125 + + gpio-line-names: + maxItems: 250 + +patternProperties: + "-state$": + oneOf: + - $ref: "#/$defs/qcom-glymur-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-glymur-tlmm-state" + additionalProperties: false + +$defs: + qcom-glymur-tlmm-state: + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state + unevaluatedProperties: false + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + oneOf: + - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9])$" + - enum: [ ufs_reset, sdc2_clk, sdc2_cmd, sdc2_data ] + minItems: 1 + maxItems: 36 + + function: + description: + Specify the alternative function to be configured for the specified + pins. + enum: [ gpio, resout_gpio_n, aoss_cti, asc_cci, atest_char, atest_usb, + audio_ext_mclk0, audio_ext_mclk1, audio_ref_clk, cam_asc_mclk4, + cam_mclk, cci_async_in, cci_i2c_scl, cci_i2c_sda, cci_timer, + cmu_rng, cri_trng, dbg_out_clk, ddr_bist_complete, + ddr_bist_fail, ddr_bist_start, ddr_bist_stop, ddr_pxi, + edp0_hot, edp0_lcd, edp1_lcd, egpio, eusb0_ac_en, eusb1_ac_en, + eusb2_ac_en, eusb3_ac_en, eusb5_ac_en, eusb6_ac_en, gcc_gp1, + gcc_gp2, gcc_gp3, host2wlan_sol, i2c0_s_scl, i2c0_s_sda, + i2s0_data, i2s0_sck, i2s0_ws, i2s1_data, i2s1_sck, i2s1_ws, + ibi_i3c, jitter_bist, mdp_vsync_out, mdp_vsync_e, mdp_vsync_p, + mdp_vsync_s, pcie3a_clk, pcie3a_rst_n, pcie3b_clk, + pcie4_clk_req_n, pcie5_clk_req_n, pcie6_clk_req_n, phase_flag, + pll_bist_sync, pll_clk_aux, pmc_oca_n, pmc_uva_n, prng_rosc, + qdss_cti, qdss_gpio, qspi, qup0_se0, qup0_se1, qup0_se2, + qup0_se3_l0, qup0_se3, qup0_se4, qup0_se5, qup0_se6, qup0_se7, + qup1_se0, qup1_se1, qup1_se2, qup1_se3, qup1_se4, qup1_se5, + qup1_se6, qup1_se7, qup2_se0, qup2_se1, qup2_se2, qup2_se3, + qup2_se4, qup2_se5, qup2_se6, qup2_se7, qup3_se0, qup3_se1, + sd_write_protect, sdc4_clk, sdc4_cmd, sdc4_data, smb_acok_n, + sys_throttle, tb_trig_sdc2, tb_trig_sdc4, tmess_prng, + tsense_pwm, tsense_therm, usb0_dp, usb0_phy_ps, usb0_sbrx, + usb0_sbtx, usb0_tmu, usb1_dbg, usb1_dp, usb1_phy_ps, usb1_sbrx, + usb1_sbtx, usb1_tmu, usb2_dp, usb2_phy_ps, usb2_sbrx, usb2_sbtx, + usb2_tmu, vsense_trigger_mirnat, wcn_sw, wcn_sw_ctrl ] + + required: + - pins + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + tlmm: pinctrl@f100000 { + compatible = "qcom,glymur-tlmm"; + reg = <0x0f100000 0xf00000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 249>; + wakeup-parent = <&pdc>; + gpio-reserved-ranges = <4 4>, <10 2>, <33 3>, <44 4>; + qup_uart21_default: qup-uart21-default-state { + tx-pins { + pins = "gpio86"; + function = "qup2_se5"; + drive-strength = <2>; + bias-disable; + }; + + rx-pins { + pins = "gpio87"; + function = "qup2_se5"; + drive-strength = <2>; + bias-disable; + }; + }; + }; +... -- cgit v1.2.3 From 90bad684e9ac5ae435c2715fab36f6799849e800 Mon Sep 17 00:00:00 2001 From: Wensheng Wang Date: Tue, 5 Aug 2025 18:20:20 +0800 Subject: hwmon: add MP29502 driver Add support for MPS VR controller mp29502. This driver exposes telemetry and limits value readings and writtings. Signed-off-by: Wensheng Wang Link: https://lore.kernel.org/r/20250805102020.749850-3-wenswang@yeah.net [groeck: Fixed document formatting] Signed-off-by: Guenter Roeck --- Documentation/hwmon/index.rst | 1 + Documentation/hwmon/mp29502.rst | 93 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 94 insertions(+) create mode 100644 Documentation/hwmon/mp29502.rst (limited to 'Documentation') diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index 36303148dc43..b4d26a6fa3a5 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -176,6 +176,7 @@ Hardware Monitoring Kernel Drivers mp2869 mp2888 mp2891 + mp29502 mp2975 mp2993 mp5023 diff --git a/Documentation/hwmon/mp29502.rst b/Documentation/hwmon/mp29502.rst new file mode 100644 index 000000000000..893e741a6b71 --- /dev/null +++ b/Documentation/hwmon/mp29502.rst @@ -0,0 +1,93 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Kernel driver mp29502 +===================== + +Supported chips: + + * MPS mp29502 + + Prefix: 'mp29502' + +Author: + + Wensheng Wang + +Description +----------- + +This driver implements support for Monolithic Power Systems, Inc. (MPS) +MP29502 Digital Multi-phase Controller. + +Device compliant with: + +- PMBus rev 1.3 interface. + +The driver exports the following attributes via the 'sysfs' files +for input voltage: + +**in1_input** + +**in1_label** + +**in1_crit** + +**in1_crit_alarm** + +The driver provides the following attributes for output voltage: + +**in2_input** + +**in2_label** + +**in2_crit** + +**in2_crit_alarm** + +**in2_lcrit** + +**in2_lcrit_alarm** + +The driver provides the following attributes for input current: + +**curr1_input** + +**curr1_label** + +The driver provides the following attributes for output current: + +**curr2_input** + +**curr2_label** + +**curr2_crit** + +**curr2_crit_alarm** + +**curr2_max** + +**curr2_max_alarm** + +The driver provides the following attributes for input power: + +**power1_input** + +**power1_label** + +The driver provides the following attributes for output power: + +**power2_input** + +**power2_label** + +The driver provides the following attributes for temperature: + +**temp1_input** + +**temp1_crit** + +**temp1_crit_alarm** + +**temp1_max** + +**temp1_max_alarm** -- cgit v1.2.3 From 3ad2a7b9b15d5072139a20be84adb36776eb6c9b Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Thu, 5 Jun 2025 16:23:57 -0700 Subject: hwmon: Serialize accesses in hwmon core Implement locking in the hardware monitoring core for drivers using the _with_info() API functions. Most hardware monitoring drivers need to support locking to protect against parallel accesses from userspace. With older API functions, such locking had to be implemented in the driver code since sysfs attributes were created by the driver. However, the _with_info() API creates sysfs attributes in the hardware monitoring core. This makes it easy to move the locking primitives into that code. This has the benefit of simplifying driver code while at the same time reducing the risk of incomplete of bad locking implementations in hardware monitoring drivers. While this means that all accesses are forced to be synchronized, this has little if any practical impact since accesses are expected to be low frequency and are typically synchronized from userspace anyway since only a single process is accessing the data. On top of that, many drivers use regmap, which also has its own locking scheme and already serializes accesses. Signed-off-by: Guenter Roeck --- Documentation/hwmon/hwmon-kernel-api.rst | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/hwmon-kernel-api.rst b/Documentation/hwmon/hwmon-kernel-api.rst index 037b69c23cb5..1d7f1397a827 100644 --- a/Documentation/hwmon/hwmon-kernel-api.rst +++ b/Documentation/hwmon/hwmon-kernel-api.rst @@ -42,6 +42,9 @@ register/unregister functions:: char *devm_hwmon_sanitize_name(struct device *dev, const char *name); + void hwmon_lock(struct device *dev); + void hwmon_unlock(struct device *dev); + hwmon_device_register_with_info registers a hardware monitoring device. It creates the standard sysfs attributes in the hardware monitoring core, letting the driver focus on reading from and writing to the chip instead @@ -79,6 +82,13 @@ devm_hwmon_sanitize_name is the resource managed version of hwmon_sanitize_name; the memory will be freed automatically on device removal. +When using ``[devm_]hwmon_device_register_with_info()`` to register the +hardware monitoring device, accesses using the associated access functions +are serialised by the hardware monitoring core. If a driver needs locking +for other functions such as interrupt handlers or for attributes which are +fully implemented in the driver, hwmon_lock() and hwmon_unlock() can be used +to ensure that calls to those functions are serialized. + Using devm_hwmon_device_register_with_info() -------------------------------------------- -- cgit v1.2.3 From f1f514d730f62fffd8fc160e9fb6df719c7425a7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Barnab=C3=A1s=20Cz=C3=A9m=C3=A1n?= Date: Wed, 3 Sep 2025 23:08:24 +0200 Subject: dt-bindings: display/msm/gpu: describe A505 clocks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Descirbe A505 clocks it is using same clocks like A506. Acked-by: Krzysztof Kozlowski Signed-off-by: Barnabás Czémán Patchwork: https://patchwork.freedesktop.org/patch/672751/ Signed-off-by: Rob Clark --- Documentation/devicetree/bindings/display/msm/gpu.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index 7ef80f9fac8b..3696b083e353 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -252,7 +252,7 @@ allOf: properties: compatible: contains: - pattern: '^qcom,adreno-506\.[0-9]+$' + pattern: '^qcom,adreno-50[56]\.[0-9]+$' then: properties: clocks: -- cgit v1.2.3 From 49e55bdbcbe0abf04d7c8c882d69755ecf43d878 Mon Sep 17 00:00:00 2001 From: Umang Chheda Date: Sat, 6 Sep 2025 00:53:47 +0530 Subject: dt-bindings: arm: qcom: Add Monaco EVK support Introduce new bindings for the Monaco Evaluation Kit (EVK), an IoT board based on the QCS8300 SoC. Signed-off-by: Umang Chheda Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250905192350.1223812-2-umang.chheda@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 1fc6319bec6b..2698ba87cd93 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -849,6 +849,7 @@ properties: - items: - enum: + - qcom,monaco-evk - qcom,qcs8300-ride - const: qcom,qcs8300 -- cgit v1.2.3 From 121f4a7e474393502cd71d63f71df7997cbc2f90 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 7 Aug 2025 08:28:51 -0500 Subject: dt-bindings: ipmi: aspeed,ast2400-kcs-bmc: Add missing "clocks" property The ASpeed kcs-bmc nodes have a "clocks" property which isn't documented. It looks like all the LPC child devices have the same clock source and some of the drivers manage their clock. Perhaps it is the parent device that should have the clock, but it's too late for that. Signed-off-by: Rob Herring (Arm) Message-ID: <20250807132852.3291305-1-robh@kernel.org> Signed-off-by: Corey Minyard --- Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml index 129e32c4c774..610c79863208 100644 --- a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml +++ b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml @@ -40,6 +40,9 @@ properties: - description: ODR register - description: STR register + clocks: + maxItems: 1 + aspeed,lpc-io-reg: $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 1 -- cgit v1.2.3 From 5bad16482c2a7e788c042d98f3e97d3b2bbc8cc5 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 5 Sep 2025 21:16:30 +0200 Subject: regulator: dt-bindings: rpi-panel: Split 7" Raspberry Pi 720x1280 v2 binding The 5" and 7" Raspberry Pi 720x1280 Display 2 MCU is a bit more complex than the original Display 1 ATTINY88 and the binding is also a bit more demanding. Split the binding into separate file and fill in required gpio-controller, #gpio-cells and #pwm-cells which must be present for the V2 MCU. Include mention of the 5" panel in the description of Display 2, as the 5" panel uses the same MCU. Fixes: 6d09c6e474bd ("regulator: dt-bindings: rpi-panel: Add regulator for 7" Raspberry Pi 720x1280") Signed-off-by: Marek Vasut Acked-by: Conor Dooley Message-ID: <20250905191637.147141-1-marek.vasut+renesas@mailbox.org> Signed-off-by: Mark Brown --- ...rrypi,7inch-touchscreen-panel-regulator-v2.yaml | 61 ++++++++++++++++++++++ ...pberrypi,7inch-touchscreen-panel-regulator.yaml | 7 +-- 2 files changed, 63 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator-v2.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator-v2.yaml b/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator-v2.yaml new file mode 100644 index 000000000000..37b9ed371b67 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator-v2.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/raspberrypi,7inch-touchscreen-panel-regulator-v2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RaspberryPi 5" and 7" display V2 MCU-based regulator/backlight controller + +maintainers: + - Marek Vasut + +description: | + The RaspberryPi 5" and 7" display 2 has an MCU-based regulator, PWM + backlight and GPIO controller on the PCB, which is used to turn the + display unit on/off and control the backlight. + +allOf: + - $ref: regulator.yaml# + +properties: + compatible: + const: raspberrypi,touchscreen-panel-regulator-v2 + + reg: + maxItems: 1 + + gpio-controller: true + "#gpio-cells": + const: 2 + description: + The first cell is the pin number, and the second cell is used to + specify the gpio polarity (GPIO_ACTIVE_HIGH or GPIO_ACTIVE_LOW). + + "#pwm-cells": + const: 3 + description: See ../../pwm/pwm.yaml for description of the cell formats. + +additionalProperties: false + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + - "#pwm-cells" + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + regulator@45 { + compatible = "raspberrypi,touchscreen-panel-regulator-v2"; + reg = <0x45>; + gpio-controller; + #gpio-cells = <2>; + #pwm-cells = <3>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml b/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml index 18944d39d08f..41678400e63f 100644 --- a/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml @@ -12,17 +12,14 @@ maintainers: description: | The RaspberryPi 7" display has an ATTINY88-based regulator/backlight controller on the PCB, which is used to turn the display unit on/off - and control the backlight. The V2 supports 5" and 7" panels and also - offers PWM backlight control. + and control the backlight. allOf: - $ref: regulator.yaml# properties: compatible: - enum: - - raspberrypi,7inch-touchscreen-panel-regulator - - raspberrypi,touchscreen-panel-regulator-v2 + const: raspberrypi,7inch-touchscreen-panel-regulator reg: maxItems: 1 -- cgit v1.2.3 From 94a28f9ba264b4b93cd1efa97992db59d74e8048 Mon Sep 17 00:00:00 2001 From: Kurt Borja Date: Mon, 8 Sep 2025 10:54:49 -0500 Subject: hwmon: (sht21) Documentation cleanup Drop extra empty lines and organize sysfs entries in a table. Signed-off-by: Kurt Borja Link: https://lore.kernel.org/r/20250908-sht2x-v4-1-bc15f68af7de@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/sht21.rst | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/hwmon/sht21.rst b/Documentation/hwmon/sht21.rst index 1bccc8e8aac8..9f66cd51b45d 100644 --- a/Documentation/hwmon/sht21.rst +++ b/Documentation/hwmon/sht21.rst @@ -13,8 +13,6 @@ Supported chips: https://www.sensirion.com/file/datasheet_sht21 - - * Sensirion SHT25 Prefix: 'sht25' @@ -25,8 +23,6 @@ Supported chips: https://www.sensirion.com/file/datasheet_sht25 - - Author: Urs Fleisch @@ -47,13 +43,11 @@ in the board setup code. sysfs-Interface --------------- -temp1_input - - temperature input - -humidity1_input - - humidity input -eic - - Electronic Identification Code +=================== ============================================================ +temp1_input Temperature input +humidity1_input Humidity input +eic Electronic Identification Code +=================== ============================================================ Notes ----- -- cgit v1.2.3 From a0cce093689859238f923faa83a6735b7e8613c4 Mon Sep 17 00:00:00 2001 From: Kurt Borja Date: Mon, 8 Sep 2025 10:54:50 -0500 Subject: hwmon: (sht21) Add support for SHT20, SHT25 chips All sht2x chips share the same communication protocol so add support for them. Signed-off-by: Kurt Borja Link: https://lore.kernel.org/r/20250908-sht2x-v4-2-bc15f68af7de@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/sht21.rst | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/sht21.rst b/Documentation/hwmon/sht21.rst index 9f66cd51b45d..d20e8a460ba6 100644 --- a/Documentation/hwmon/sht21.rst +++ b/Documentation/hwmon/sht21.rst @@ -3,6 +3,16 @@ Kernel driver sht21 Supported chips: + * Sensirion SHT20 + + Prefix: 'sht20' + + Addresses scanned: none + + Datasheet: Publicly available at the Sensirion website + + https://www.sensirion.com/file/datasheet_sht20 + * Sensirion SHT21 Prefix: 'sht21' -- cgit v1.2.3 From 69001f21ded78131b995af2900ef574b04a59ae2 Mon Sep 17 00:00:00 2001 From: Cryolitia PukNgae Date: Mon, 8 Sep 2025 10:25:45 +0800 Subject: hwmon: document: add gpd-fan Add GPD fan driver document Signed-off-by: Cryolitia PukNgae Link: https://lore.kernel.org/r/20250908-gpd_fan-v9-2-7b4506c03953@uniontech.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/gpd-fan.rst | 78 +++++++++++++++++++++++++++++++++++++++++ Documentation/hwmon/index.rst | 1 + 2 files changed, 79 insertions(+) create mode 100644 Documentation/hwmon/gpd-fan.rst (limited to 'Documentation') diff --git a/Documentation/hwmon/gpd-fan.rst b/Documentation/hwmon/gpd-fan.rst new file mode 100644 index 000000000000..0b56b70e6264 --- /dev/null +++ b/Documentation/hwmon/gpd-fan.rst @@ -0,0 +1,78 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +Kernel driver gpd-fan +========================= + +Author: + - Cryolitia PukNgae + +Description +------------ + +Handheld devices from Shenzhen GPD Technology Co., Ltd. provide fan readings +and fan control through their embedded controllers. + +Supported devices +----------------- + +Currently the driver supports the following handhelds: + + - GPD Win Mini (7840U) + - GPD Win Mini (8840U) + - GPD Win Mini (HX370) + - GPD Pocket 4 + - GPD Duo + - GPD Win Max 2 (6800U) + - GPD Win Max 2 2023 (7840U) + - GPD Win Max 2 2024 (8840U) + - GPD Win Max 2 2025 (HX370) + - GPD Win 4 (6800U) + - GPD Win 4 (7840U) + +Module parameters +----------------- + +gpd_fan_board + Force specific which module quirk should be used. + Use it like "gpd_fan_board=wm2". + + - wm2 + - GPD Win 4 (7840U) + - GPD Win Max 2 (6800U) + - GPD Win Max 2 2023 (7840U) + - GPD Win Max 2 2024 (8840U) + - GPD Win Max 2 2025 (HX370) + - win4 + - GPD Win 4 (6800U) + - win_mini + - GPD Win Mini (7840U) + - GPD Win Mini (8840U) + - GPD Win Mini (HX370) + - GPD Pocket 4 + - GPD Duo + +Sysfs entries +------------- + +The following attributes are supported: + +fan1_input + Read Only. Reads current fan RPM. + +pwm1_enable + Read/Write. Enable manual fan control. Write "0" to disable control and run + at full speed. Write "1" to set to manual, write "2" to let the EC control + decide fan speed. Read this attribute to see current status. + + NB：In consideration of the safety of the device, when setting to manual mode, + the pwm speed will be set to the maximum value (255) by default. You can set + a different value by writing pwm1 later. + +pwm1 + Read/Write. Read this attribute to see current duty cycle in the range + [0-255]. When pwm1_enable is set to "1" (manual) write any value in the + range [0-255] to set fan speed. + + NB: Many boards (except listed under wm2 above) don't support reading the + current pwm value in auto mode. That will just return EOPNOTSUPP. In manual + mode it will always return the real value. diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index b4d26a6fa3a5..1803a43f6216 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -82,6 +82,7 @@ Hardware Monitoring Kernel Drivers gigabyte_waterforce gsc-hwmon gl518sm + gpd-fan gxp-fan-ctrl hih6130 hp-wmi-sensors -- cgit v1.2.3 From 2c4f536c75217476baabbd557a44e8d4c3a2a23a Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 8 Sep 2025 15:04:18 +0200 Subject: dt-bindings: display: bridge: simple: document the Realtek RTD2171 DP-to-HDMI bridge The Realtek RTD2171 chipset is a transparent DisplayPort 1.4 to HDMI 2.0 bridge. This chipset is usually found in USB-C To HDMI Adapters and Docks, or laptops to provide HDMI display output. Acked-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20250908-topic-x1e80100-hdmi-v3-1-c53b0f2bc2fb@linaro.org Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml b/Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml index 421f99ca42d9..9ef587d46506 100644 --- a/Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml +++ b/Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml @@ -29,6 +29,7 @@ properties: - adi,adv7123 - dumb-vga-dac - radxa,ra620 + - realtek,rtd2171 - ti,opa362 - ti,ths8134 - ti,ths8135 -- cgit v1.2.3 From bc3f7d0340f7cf32b53e40aeed25ac0c6a0e77e7 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sun, 7 Sep 2025 12:25:13 -0300 Subject: dt-bindings: arm: cpus: Document pu-supply The i.MX6Q Reference Manual describes the three digital LDO regulators as follows: "10.4.1.1.1 Digital LDO Regulators The integrated PMU includes three digital LDO regulators: LDO_ARM, LDO_PU, and LDO_SOC. These regulators provide power to the ARM_Core power domain, the combined VPU, IPU and GPU power domain, and the rest of the SoC logic (except always-ON SNVS domain)." imx6dl.dtsi uses the correct names to describe these supplies: arm-supply = <®_arm>; pu-supply = <®_pu>; soc-supply = <®_soc>; 'arm-supply' and 'soc-supply' are already documented, but 'pu-supply' is not. Document the 'pu-supply' property and set it to deprecated. This fixes the following dt-schema warning: cpu@1 (arm,cortex-a9): Unevaluated properties are not allowed ('pu-supply' was unexpected) Signed-off-by: Fabio Estevam Reviewed-by: Frank Li Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250907152513.590218-1-festevam@gmail.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index b1c6943e7d78..41ad4ed0e74c 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -350,6 +350,10 @@ properties: deprecated: true description: Use 'cpu-supply' instead + pu-supply: + deprecated: true + description: Only for i.MX6Q/DL/SL SoCs. + soc-supply: deprecated: true description: Only for i.MX6/7 Soc. -- cgit v1.2.3 From 7095d688de38de197c408f8904cf1c1d8b257dae Mon Sep 17 00:00:00 2001 From: Baojun Xu Date: Sat, 30 Aug 2025 14:14:59 +0800 Subject: ASoC: tas2781: Add tas2118, tas2x20, tas5825 support Update ti,tas2781.yaml for adding tas2118, tas2x20, tas257x and tas582x. Signed-off-by: Baojun Xu Reviewed-by: Rob Herring (Arm) Signed-off-by: Takashi Iwai --- .../devicetree/bindings/sound/ti,tas2781.yaml | 96 +++++++++++++++++++++- 1 file changed, 95 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/ti,tas2781.yaml b/Documentation/devicetree/bindings/sound/ti,tas2781.yaml index 5ea1cdc593b5..011211112be4 100644 --- a/Documentation/devicetree/bindings/sound/ti,tas2781.yaml +++ b/Documentation/devicetree/bindings/sound/ti,tas2781.yaml @@ -1,5 +1,5 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -# Copyright (C) 2022 - 2023 Texas Instruments Incorporated +# Copyright (C) 2022 - 2025 Texas Instruments Incorporated %YAML 1.2 --- $id: http://devicetree.org/schemas/sound/ti,tas2781.yaml# @@ -11,30 +11,77 @@ maintainers: - Shenghao Ding description: | + The TAS2118/TAS2X20/TAS257x is mono, digital input Class-D audio + amplifier optimized for efficiently driving high peak power into + small loudspeakers. + Integrated speaker voltage and current sense provides for + real time monitoring of loudspeaker behavior. The TAS2563/TAS2781 is a mono, digital input Class-D audio amplifier optimized for efficiently driving high peak power into small loudspeakers. An integrated on-chip DSP supports Texas Instruments Smart Amp speaker protection algorithm. The integrated speaker voltage and current sense provides for real time monitoring of loudspeaker behavior. + The TAS5825/TAS5827 is a stereo, digital input Class-D audio + amplifier optimized for efficiently driving high peak power into + small loudspeakers. An integrated on-chip DSP supports Texas + Instruments Smart Amp speaker protection algorithm. The + integrated speaker voltage and current sense provides for real time + monitoring of loudspeaker behavior. Specifications about the audio amplifier can be found at: + https://www.ti.com/lit/gpn/tas2120 + https://www.ti.com/lit/gpn/tas2320 https://www.ti.com/lit/gpn/tas2563 + https://www.ti.com/lit/gpn/tas2572 https://www.ti.com/lit/gpn/tas2781 + https://www.ti.com/lit/gpn/tas5825m + https://www.ti.com/lit/gpn/tas5827 properties: compatible: description: | + ti,tas2020: 3.2-W Mono Digital Input Class-D Speaker Amp with 5.5V PVDD + Support. + + ti,tas2118: 5-W Mono Digital Input Class-D Speaker Amp with Integrated + 8.4-V Class-H Boost. + + ti,tas2120: 8.2-W Mono Digital Input Class-D Speaker Amp with + Integrated 14.75V Class-H Boost. + + ti,tas2320: 15-W Mono Digital Input Class-D Speaker Amp with 15V Support. + ti,tas2563: 6.1-W Boosted Class-D Audio Amplifier With Integrated DSP and IV Sense, 16/20/24/32bit stereo I2S or multichannel TDM. + ti,tas2570: 5.8-W Digital Input smart amp with I/V sense and integrated + 11-V Class-H Boost + + ti,tas2572: 6.6-W Digital Input smart amp with I/V sense and integrated + 13-V Class-H Boost + ti,tas2781: 24-V Class-D Amplifier with Real Time Integrated Speaker Protection and Audio Processing, 16/20/24/32bit stereo I2S or multichannel TDM. + + ti,tas5825: 38-W Stereo, Inductor-Less, Digital Input, Closed-Loop 4.5V + to 26.4V Class-D Audio Amplifier with 192-kHz Extended Audio Processing. + + ti,tas5827: 47-W Stereo, Digital Input, High Efficiency Closed-Loop Class-D + Amplifier with Class-H Algorithm oneOf: - items: - enum: + - ti,tas2020 + - ti,tas2118 + - ti,tas2120 + - ti,tas2320 - ti,tas2563 + - ti,tas2570 + - ti,tas2572 + - ti,tas5825 + - ti,tas5827 - const: ti,tas2781 - enum: - ti,tas2781 @@ -61,6 +108,23 @@ required: allOf: - $ref: dai-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - ti,tas2020 + - ti,tas2118 + - ti,tas2120 + - ti,tas2320 + then: + properties: + reg: + maxItems: 4 + items: + minimum: 0x48 + maximum: 0x4b + - if: properties: compatible: @@ -79,6 +143,21 @@ allOf: minimum: 0x4c maximum: 0x4f + - if: + properties: + compatible: + contains: + enum: + - ti,tas2570 + - ti,tas2572 + then: + properties: + reg: + maxItems: 4 + items: + minimum: 0x48 + maximum: 0x4b + - if: properties: compatible: @@ -97,6 +176,21 @@ allOf: minimum: 0x38 maximum: 0x3f + - if: + properties: + compatible: + contains: + enum: + - ti,tas5825 + - ti,tas5827 + then: + properties: + reg: + maxItems: 4 + items: + minimum: 0x4c + maximum: 0x4f + additionalProperties: false examples: -- cgit v1.2.3 From 6b6dc81ee7e8ca87c71a533e1d69cf96a4f1e986 Mon Sep 17 00:00:00 2001 From: Hangbin Liu Date: Tue, 2 Sep 2025 06:44:59 +0000 Subject: bonding: add support for per-port LACP actor priority Introduce a new netlink attribute 'actor_port_prio' to allow setting the LACP actor port priority on a per-slave basis. This extends the existing bonding infrastructure to support more granular control over LACP negotiations. The priority value is embedded in LACPDU packets and will be used by subsequent patches to influence aggregator selection policies. Signed-off-by: Hangbin Liu Link: https://patch.msgid.link/20250902064501.360822-2-liuhangbin@gmail.com Signed-off-by: Paolo Abeni --- Documentation/networking/bonding.rst | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/bonding.rst b/Documentation/networking/bonding.rst index a2b42ae719d2..345b60992446 100644 --- a/Documentation/networking/bonding.rst +++ b/Documentation/networking/bonding.rst @@ -193,6 +193,15 @@ ad_actor_sys_prio This parameter has effect only in 802.3ad mode and is available through SysFs interface. +actor_port_prio + + In an AD system, this specifies the port priority. The allowed range + is 1 - 65535. If the value is not specified, it takes 255 as the + default value. + + This parameter has effect only in 802.3ad mode and is available through + netlink interface. + ad_actor_system In an AD system, this specifies the mac-address for the actor in -- cgit v1.2.3 From e5a6643435fa4ad1e104323ec7d3e6215e2d832c Mon Sep 17 00:00:00 2001 From: Hangbin Liu Date: Tue, 2 Sep 2025 06:45:00 +0000 Subject: bonding: support aggregator selection based on port priority Add a new ad_select policy 'port_priority' that uses the per-port actor priority values (set via ad_actor_port_prio) to determine aggregator selection. This allows administrators to influence which ports are preferred for aggregation by assigning different priority values, providing more flexible load balancing control in LACP configurations. Signed-off-by: Hangbin Liu Link: https://patch.msgid.link/20250902064501.360822-3-liuhangbin@gmail.com Signed-off-by: Paolo Abeni --- Documentation/networking/bonding.rst | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/bonding.rst b/Documentation/networking/bonding.rst index 345b60992446..e700bf1d095c 100644 --- a/Documentation/networking/bonding.rst +++ b/Documentation/networking/bonding.rst @@ -250,10 +250,18 @@ ad_select ports (slaves). Reselection occurs as described under the "bandwidth" setting, above. - The bandwidth and count selection policies permit failover of - 802.3ad aggregations when partial failure of the active aggregator - occurs. This keeps the aggregator with the highest availability - (either in bandwidth or in number of ports) active at all times. + actor_port_prio or 3 + + The active aggregator is chosen by the highest total sum of + actor port priorities across its active ports. Note this + priority is actor_port_prio, not per port prio, which is + used for primary reselect. + + The bandwidth, count and actor_port_prio selection policies permit + failover of 802.3ad aggregations when partial failure of the active + aggregator occurs. This keeps the aggregator with the highest + availability (either in bandwidth, number of ports, or total value + of port priorities) active at all times. This option was added in bonding version 3.4.0. -- cgit v1.2.3 From 23fc2a41a2c67d622d242b670a10ce8f76a7b68e Mon Sep 17 00:00:00 2001 From: Ryan Chen Date: Mon, 8 Sep 2025 09:18:10 +0800 Subject: dt-bindings: mfd: aspeed: Add AST2700 SCU compatibles Add SCU interrupt controller compatible strings for the AST2700 SoC: scu-ic0 to 3. This extends the MFD binding to support AST2700-based platforms. Signed-off-by: Ryan Chen Signed-off-by: Thomas Gleixner Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/all/20250908011812.1033858-3-ryan_chen@aspeedtech.com --- Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml index 5eccd10d95ce..67be6d095fe4 100644 --- a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml +++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml @@ -75,6 +75,10 @@ patternProperties: - aspeed,ast2500-scu-ic - aspeed,ast2600-scu-ic0 - aspeed,ast2600-scu-ic1 + - aspeed,ast2700-scu-ic0 + - aspeed,ast2700-scu-ic1 + - aspeed,ast2700-scu-ic2 + - aspeed,ast2700-scu-ic3 '^silicon-id@[0-9a-f]+$': description: Unique hardware silicon identifiers within the SoC -- cgit v1.2.3 From ed7240444e82aaaa2245a3cc9b040e4db894a665 Mon Sep 17 00:00:00 2001 From: Ryan Chen Date: Mon, 8 Sep 2025 09:18:11 +0800 Subject: dt-bindings: interrupt-controller: aspeed: Add AST2700 SCU IC compatibles Add compatible strings for the four SCU interrupt controller instances on the AST2700 SoC (scu-ic0 to 3), following the multi-instance model used on AST2600. Also define interrupt indices in the binding header. Signed-off-by: Ryan Chen Signed-off-by: Thomas Gleixner Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/all/20250908011812.1033858-4-ryan_chen@aspeedtech.com --- .../bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml index d5287a2bf866..d998a9d69b91 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2500-scu-ic.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Aspeed AST25XX and AST26XX SCU Interrupt Controller +title: Aspeed AST25XX, AST26XX, AST27XX SCU Interrupt Controller maintainers: - Eddie James @@ -16,6 +16,10 @@ properties: - aspeed,ast2500-scu-ic - aspeed,ast2600-scu-ic0 - aspeed,ast2600-scu-ic1 + - aspeed,ast2700-scu-ic0 + - aspeed,ast2700-scu-ic1 + - aspeed,ast2700-scu-ic2 + - aspeed,ast2700-scu-ic3 reg: maxItems: 1 -- cgit v1.2.3 From 7e5969a4d3e794993c9ca8d4026cf31a34b32b30 Mon Sep 17 00:00:00 2001 From: Kurt Borja Date: Mon, 8 Sep 2025 10:54:51 -0500 Subject: dt-bindings: trivial-devices: Add sht2x sensors Add sensirion,sht2x trivial sensors. Signed-off-by: Kurt Borja Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250908-sht2x-v4-3-bc15f68af7de@gmail.com Signed-off-by: Guenter Roeck --- Documentation/devicetree/bindings/trivial-devices.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index 0e6ba6e12a63..edaba5cd8434 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -372,6 +372,9 @@ properties: # Sensirion low power multi-pixel gas sensor with I2C interface - sensirion,sgpc3 # Sensirion temperature & humidity sensor with I2C interface + - sensirion,sht20 + - sensirion,sht21 + - sensirion,sht25 - sensirion,sht4x # Sensortek 3 axis accelerometer - sensortek,stk8312 -- cgit v1.2.3 From 1dd41ad7565940af6e96828230b6b11a8267437a Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Tue, 24 Jun 2025 08:34:03 +0200 Subject: Documentation: media: update Hans Verkuil's email address Replace hverkuil-cisco@xs4all.nl by hverkuil@kernel.org. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- Documentation/ABI/testing/debugfs-cec-error-inj | 2 +- Documentation/devicetree/bindings/media/cec/cec-gpio.yaml | 2 +- Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml | 2 +- Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml | 2 +- Documentation/userspace-api/media/cec/cec-api.rst | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/debugfs-cec-error-inj b/Documentation/ABI/testing/debugfs-cec-error-inj index 8debcb08a3b5..c512f71bba8e 100644 --- a/Documentation/ABI/testing/debugfs-cec-error-inj +++ b/Documentation/ABI/testing/debugfs-cec-error-inj @@ -1,6 +1,6 @@ What: /sys/kernel/debug/cec/*/error-inj Date: March 2018 -Contact: Hans Verkuil +Contact: Hans Verkuil Description: The CEC Framework allows for CEC error injection commands through diff --git a/Documentation/devicetree/bindings/media/cec/cec-gpio.yaml b/Documentation/devicetree/bindings/media/cec/cec-gpio.yaml index 64d7ec057672..582c6c9cae48 100644 --- a/Documentation/devicetree/bindings/media/cec/cec-gpio.yaml +++ b/Documentation/devicetree/bindings/media/cec/cec-gpio.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: HDMI CEC GPIO maintainers: - - Hans Verkuil + - Hans Verkuil description: | The HDMI CEC GPIO module supports CEC implementations where the CEC line is diff --git a/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml b/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml index 4b46aa755ccd..6ef545b1d622 100644 --- a/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml +++ b/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: NVIDIA Tegra HDMI CEC maintainers: - - Hans Verkuil + - Hans Verkuil allOf: - $ref: cec-common.yaml# diff --git a/Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml b/Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml index 6c403003cdda..2dc2829d42a0 100644 --- a/Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml +++ b/Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices ADV7604/10/11/12 video decoder with HDMI receiver maintainers: - - Hans Verkuil + - Hans Verkuil description: The ADV7604 and ADV7610/11/12 are multiformat video decoders with diff --git a/Documentation/userspace-api/media/cec/cec-api.rst b/Documentation/userspace-api/media/cec/cec-api.rst index 578303d484f3..594f0ec420a2 100644 --- a/Documentation/userspace-api/media/cec/cec-api.rst +++ b/Documentation/userspace-api/media/cec/cec-api.rst @@ -26,7 +26,7 @@ Revision and Copyright ********************** Authors: -- Verkuil, Hans +- Verkuil, Hans - Initial version. -- cgit v1.2.3 From 9bff72cb99b10ead19ab1e36d240cc54bc4954b1 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Tue, 24 Jun 2025 08:39:35 +0200 Subject: Documentation: update Hans Verkuil's email address Replace hverkuil@xs4all.nl by hverkuil@kernel.org. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/bug-hunting.rst | 2 +- Documentation/admin-guide/media/ivtv.rst | 2 +- Documentation/devicetree/bindings/media/cec/cec-common.yaml | 2 +- Documentation/devicetree/bindings/media/silabs,si470x.yaml | 2 +- Documentation/driver-api/media/maintainer-entry-profile.rst | 4 ++-- Documentation/translations/zh_CN/admin-guide/bug-hunting.rst | 2 +- Documentation/translations/zh_TW/admin-guide/bug-hunting.rst | 2 +- Documentation/userspace-api/media/drivers/cx2341x-uapi.rst | 2 +- Documentation/userspace-api/media/v4l/v4l2.rst | 2 +- 9 files changed, 10 insertions(+), 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/bug-hunting.rst b/Documentation/admin-guide/bug-hunting.rst index 30858757c9f2..7da0504388ec 100644 --- a/Documentation/admin-guide/bug-hunting.rst +++ b/Documentation/admin-guide/bug-hunting.rst @@ -252,7 +252,7 @@ For example, if you find a bug at the gspca's sonixj.c file, you can get its maintainers with:: $ ./scripts/get_maintainer.pl --bug -f drivers/media/usb/gspca/sonixj.c - Hans Verkuil (odd fixer:GSPCA USB WEBCAM DRIVER,commit_signer:1/1=100%) + Hans Verkuil (odd fixer:GSPCA USB WEBCAM DRIVER,commit_signer:1/1=100%) Mauro Carvalho Chehab (maintainer:MEDIA INPUT INFRASTRUCTURE (V4L/DVB),commit_signer:1/1=100%) Tejun Heo (commit_signer:1/1=100%) Bhaktipriya Shridhar (commit_signer:1/1=100%,authored:1/1=100%,added_lines:4/4=100%,removed_lines:9/9=100%) diff --git a/Documentation/admin-guide/media/ivtv.rst b/Documentation/admin-guide/media/ivtv.rst index 101f16d0263e..8b65ac3f5321 100644 --- a/Documentation/admin-guide/media/ivtv.rst +++ b/Documentation/admin-guide/media/ivtv.rst @@ -3,7 +3,7 @@ The ivtv driver =============== -Author: Hans Verkuil +Author: Hans Verkuil This is a v4l2 device driver for the Conexant cx23415/6 MPEG encoder/decoder. The cx23415 can do both encoding and decoding, the cx23416 can only do MPEG diff --git a/Documentation/devicetree/bindings/media/cec/cec-common.yaml b/Documentation/devicetree/bindings/media/cec/cec-common.yaml index af6ee5f1c73f..6d5017d9bf55 100644 --- a/Documentation/devicetree/bindings/media/cec/cec-common.yaml +++ b/Documentation/devicetree/bindings/media/cec/cec-common.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: HDMI CEC Adapters Common Properties maintainers: - - Hans Verkuil + - Hans Verkuil properties: $nodename: diff --git a/Documentation/devicetree/bindings/media/silabs,si470x.yaml b/Documentation/devicetree/bindings/media/silabs,si470x.yaml index a3d19c562ca3..db22b88fc5bb 100644 --- a/Documentation/devicetree/bindings/media/silabs,si470x.yaml +++ b/Documentation/devicetree/bindings/media/silabs,si470x.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Silicon Labs Si470x FM Radio Receiver maintainers: - - Hans Verkuil + - Hans Verkuil - Paweł Chmiel properties: diff --git a/Documentation/driver-api/media/maintainer-entry-profile.rst b/Documentation/driver-api/media/maintainer-entry-profile.rst index ad96a89ee916..2127e5b15e8f 100644 --- a/Documentation/driver-api/media/maintainer-entry-profile.rst +++ b/Documentation/driver-api/media/maintainer-entry-profile.rst @@ -75,7 +75,7 @@ The media maintainers that work on specific areas of the subsystem are: Sean Young - HDMI CEC: - Hans Verkuil + Hans Verkuil - Media controller drivers: Laurent Pinchart @@ -84,7 +84,7 @@ The media maintainers that work on specific areas of the subsystem are: Sakari Ailus - V4L2 drivers and core V4L2 frameworks: - Hans Verkuil + Hans Verkuil The subsystem maintainer is: Mauro Carvalho Chehab diff --git a/Documentation/translations/zh_CN/admin-guide/bug-hunting.rst b/Documentation/translations/zh_CN/admin-guide/bug-hunting.rst index 4b3432753eb9..f20bf5be4cf9 100644 --- a/Documentation/translations/zh_CN/admin-guide/bug-hunting.rst +++ b/Documentation/translations/zh_CN/admin-guide/bug-hunting.rst @@ -239,7 +239,7 @@ objdump 例如，您在gspca的sonixj.c文件中发现一个缺陷，则可以通过以下方法找到它的维护者:: $ ./scripts/get_maintainer.pl -f drivers/media/usb/gspca/sonixj.c - Hans Verkuil (odd fixer:GSPCA USB WEBCAM DRIVER,commit_signer:1/1=100%) + Hans Verkuil (odd fixer:GSPCA USB WEBCAM DRIVER,commit_signer:1/1=100%) Mauro Carvalho Chehab (maintainer:MEDIA INPUT INFRASTRUCTURE (V4L/DVB),commit_signer:1/1=100%) Tejun Heo (commit_signer:1/1=100%) Bhaktipriya Shridhar (commit_signer:1/1=100%,authored:1/1=100%,added_lines:4/4=100%,removed_lines:9/9=100%) diff --git a/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst b/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst index 80ea5677ee52..c677dff826f5 100644 --- a/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst +++ b/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst @@ -242,7 +242,7 @@ objdump 例如，您在gspca的sonixj.c文件中發現一個缺陷，則可以通過以下方法找到它的維護者:: $ ./scripts/get_maintainer.pl -f drivers/media/usb/gspca/sonixj.c - Hans Verkuil (odd fixer:GSPCA USB WEBCAM DRIVER,commit_signer:1/1=100%) + Hans Verkuil (odd fixer:GSPCA USB WEBCAM DRIVER,commit_signer:1/1=100%) Mauro Carvalho Chehab (maintainer:MEDIA INPUT INFRASTRUCTURE (V4L/DVB),commit_signer:1/1=100%) Tejun Heo (commit_signer:1/1=100%) Bhaktipriya Shridhar (commit_signer:1/1=100%,authored:1/1=100%,added_lines:4/4=100%,removed_lines:9/9=100%) diff --git a/Documentation/userspace-api/media/drivers/cx2341x-uapi.rst b/Documentation/userspace-api/media/drivers/cx2341x-uapi.rst index debde65fb8cd..b617c988b915 100644 --- a/Documentation/userspace-api/media/drivers/cx2341x-uapi.rst +++ b/Documentation/userspace-api/media/drivers/cx2341x-uapi.rst @@ -130,7 +130,7 @@ Raw format c example Format of embedded V4L2_MPEG_STREAM_VBI_FMT_IVTV VBI data --------------------------------------------------------- -Author: Hans Verkuil +Author: Hans Verkuil This section describes the V4L2_MPEG_STREAM_VBI_FMT_IVTV format of the VBI data diff --git a/Documentation/userspace-api/media/v4l/v4l2.rst b/Documentation/userspace-api/media/v4l/v4l2.rst index cf8ae56a008c..64fb264fb6c4 100644 --- a/Documentation/userspace-api/media/v4l/v4l2.rst +++ b/Documentation/userspace-api/media/v4l/v4l2.rst @@ -86,7 +86,7 @@ Authors, in alphabetical order: - Documented the fielded V4L2_MPEG_STREAM_VBI_FMT_IVTV MPEG stream embedded, sliced VBI data format in this specification. -- Verkuil, Hans +- Verkuil, Hans - Designed and documented the VIDIOC_LOG_STATUS ioctl, the extended control ioctls, major parts of the sliced VBI API, the MPEG encoder and decoder APIs and the DV Timings API. -- cgit v1.2.3 From c329055587ee5248390e53fd2625438919928e2a Mon Sep 17 00:00:00 2001 From: Jorge Ramirez-Ortiz Date: Thu, 14 Aug 2025 10:52:41 +0200 Subject: media: dt-bindings: venus: Add qcm2290 dt schema Add a schema for the venus video encoder/decoder on the qcm2290. The order of the IOMMU list is strict: the first two entries correspond to non-secure IOMMUs, and the remaining three to secure IOMMUs. Signed-off-by: Jorge Ramirez-Ortiz Reviewed-by: Krzysztof Kozlowski Reviewed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../bindings/media/qcom,qcm2290-venus.yaml | 130 +++++++++++++++++++++ 1 file changed, 130 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/qcom,qcm2290-venus.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/qcom,qcm2290-venus.yaml b/Documentation/devicetree/bindings/media/qcom,qcm2290-venus.yaml new file mode 100644 index 000000000000..3f3ee82fc878 --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,qcm2290-venus.yaml @@ -0,0 +1,130 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,qcm2290-venus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QCM2290 Venus video encode and decode accelerators + +maintainers: + - Jorge Ramirez-Ortiz + +description: + The Venus AR50_LITE IP is a video encode and decode accelerator present + on Qualcomm platforms. + +allOf: + - $ref: qcom,venus-common.yaml# + +properties: + compatible: + const: qcom,qcm2290-venus + + power-domains: + maxItems: 3 + + power-domain-names: + items: + - const: venus + - const: vcodec0 + - const: cx + + clocks: + maxItems: 6 + + clock-names: + items: + - const: core + - const: iface + - const: bus + - const: throttle + - const: vcodec0_core + - const: vcodec0_bus + + iommus: + maxItems: 5 + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: video-mem + - const: cpu-cfg + + operating-points-v2: true + opp-table: + type: object + +required: + - compatible + - power-domain-names + - iommus + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + venus: video-codec@5a00000 { + compatible = "qcom,qcm2290-venus"; + reg = <0x5a00000 0xf0000>; + + interrupts = ; + + power-domains = <&gcc GCC_VENUS_GDSC>, + <&gcc GCC_VCODEC0_GDSC>, + <&rpmpd QCM2290_VDDCX>; + power-domain-names = "venus", + "vcodec0", + "cx"; + + operating-points-v2 = <&venus_opp_table>; + + clocks = <&gcc GCC_VIDEO_VENUS_CTL_CLK>, + <&gcc GCC_VIDEO_AHB_CLK>, + <&gcc GCC_VENUS_CTL_AXI_CLK>, + <&gcc GCC_VIDEO_THROTTLE_CORE_CLK>, + <&gcc GCC_VIDEO_VCODEC0_SYS_CLK>, + <&gcc GCC_VCODEC0_AXI_CLK>; + clock-names = "core", + "iface", + "bus", + "throttle", + "vcodec0_core", + "vcodec0_bus"; + + memory-region = <&pil_video_mem>; + + iommus = <&apps_smmu 0x860 0x0>, + <&apps_smmu 0x880 0x0>, + <&apps_smmu 0x861 0x04>, + <&apps_smmu 0x863 0x0>, + <&apps_smmu 0x804 0xe0>; + + interconnects = <&mmnrt_virt MASTER_VIDEO_P0 RPM_ALWAYS_TAG + &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>, + <&bimc MASTER_APPSS_PROC RPM_ACTIVE_TAG + &config_noc SLAVE_VENUS_CFG RPM_ACTIVE_TAG>; + interconnect-names = "video-mem", + "cpu-cfg"; + + venus_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-133333333 { + opp-hz = /bits/ 64 <133333333>; + required-opps = <&rpmpd_opp_low_svs>; + }; + + opp-240000000 { + opp-hz = /bits/ 64 <240000000>; + required-opps = <&rpmpd_opp_svs>; + }; + }; + }; -- cgit v1.2.3 From 9364790e91fbfb34aa4751e5cafe716079e26b70 Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Fri, 29 Aug 2025 17:42:31 +0300 Subject: dt-bindings: media: i2c: Add OmniVision OV6211 image sensor Add device tree bindings documentation for OmniVision OV6211 image sensor. Reviewed-by: Rob Herring (Arm) Signed-off-by: Vladimir Zapolskiy Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../devicetree/bindings/media/i2c/ovti,ov6211.yaml | 96 ++++++++++++++++++++++ 1 file changed, 96 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/i2c/ovti,ov6211.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov6211.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov6211.yaml new file mode 100644 index 000000000000..5a857fa2f371 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov6211.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/ovti,ov6211.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: OmniVision OV6211 Image Sensor + +description: + OmniVision OV6211 image sensor is a high performance monochrome image + sensor. The sensor is controlled over a serial camera control bus + protocol (SCCB), the widest supported output image frame size is 400x400 + at 120 frames per second rate, data output format is 8/10-bit RAW + transferred over one-lane MIPI D-PHY interface. + +maintainers: + - Vladimir Zapolskiy + +allOf: + - $ref: /schemas/media/video-interface-devices.yaml# + +properties: + compatible: + const: ovti,ov6211 + + reg: + maxItems: 1 + + clocks: + description: XVCLK supply clock, 6MHz to 27MHz frequency. + maxItems: 1 + + reset-gpios: + description: Active low GPIO connected to XSHUTDOWN pad of the sensor. + maxItems: 1 + + strobe-gpios: + description: Input GPIO connected to strobe pad of the sensor. + maxItems: 1 + + avdd-supply: + description: Analogue voltage supply, 2.6 to 3.0 volts. + + dovdd-supply: + description: Digital I/O voltage supply, 1.8 volts. + + dvdd-supply: + description: Digital core voltage supply. + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + required: + - link-frequencies + +required: + - compatible + - reg + - port + +unevaluatedProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + camera@60 { + compatible = "ovti,ov6211"; + reg = <0x60>; + clocks = <&camera_clk 0>; + assigned-clocks = <&camera_clk 0>; + assigned-clock-rates = <24000000>; + reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + avdd-supply = <&vreg_2p8>; + dovdd-supply = <&vreg_1p8>; + dvdd-supply = <&vreg_1p2>; + + port { + endpoint { + link-frequencies = /bits/ 64 <480000000>; + remote-endpoint = <&mipi_csi2_ep>; + }; + }; + }; + }; +... -- cgit v1.2.3 From 9acb06945fabc3f8a392674e4c4604bf7657dd29 Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Fri, 29 Aug 2025 17:42:41 +0300 Subject: dt-bindings: media: i2c: Add OmniVision OG0VE1B camera sensor Add device tree bindings documentation for OmniVision OG0VE1B camera sensor. Reviewed-by: Rob Herring (Arm) Signed-off-by: Vladimir Zapolskiy Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../bindings/media/i2c/ovti,og0ve1b.yaml | 97 ++++++++++++++++++++++ 1 file changed, 97 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/i2c/ovti,og0ve1b.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,og0ve1b.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,og0ve1b.yaml new file mode 100644 index 000000000000..bd2f1ae23e65 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ovti,og0ve1b.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/ovti,og0ve1b.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: OmniVision OG0VE1B Image Sensor + +description: + OmniVision OG0VE1B image sensor is a low power consuming monochrome + image sensor. The sensor is controlled over a serial camera control + bus protocol (SCCB), the widest supported image size is 640x480 at + 120 frames per second rate, data output format is 8/10-bit RAW + transferred over one-lane MIPI D-PHY at up to 800 Mbps. + +maintainers: + - Vladimir Zapolskiy + +allOf: + - $ref: /schemas/media/video-interface-devices.yaml# + +properties: + compatible: + const: ovti,og0ve1b + + reg: + maxItems: 1 + + clocks: + description: XVCLK supply clock, 6MHz to 27MHz frequency. + maxItems: 1 + + reset-gpios: + description: Active low GPIO connected to XSHUTDOWN pad of the sensor. + maxItems: 1 + + strobe-gpios: + description: Input GPIO connected to strobe pad of the sensor. + maxItems: 1 + + avdd-supply: + description: Analog voltage supply, 2.6 to 3.0 volts. + + dovdd-supply: + description: Digital I/O voltage supply, 1.7 to 3.0 volts. + + dvdd-supply: + description: Digital core voltage supply. + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + required: + - link-frequencies + +required: + - compatible + - reg + - port + +unevaluatedProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + camera@3e { + compatible = "ovti,og0ve1b"; + reg = <0x3e>; + clocks = <&camera_clk 0>; + assigned-clocks = <&camera_clk 0>; + assigned-clock-rates = <24000000>; + reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + avdd-supply = <&vreg_2p8>; + dovdd-supply = <&vreg_1p8>; + dvdd-supply = <&vreg_1p2>; + + port { + endpoint { + link-frequencies = /bits/ 64 <500000000>; + remote-endpoint = <&mipi_csi2_ep>; + }; + }; + }; + }; + +... -- cgit v1.2.3 From 773bb3066e6debf5b66ce598ec6a989911864d61 Mon Sep 17 00:00:00 2001 From: Himanshu Bhavani Date: Fri, 29 Aug 2025 14:39:50 +0530 Subject: dt-bindings: media: i2c: Add ov2735 sensor Add bindings for Omnivision OV2735 sensor. Add MAINTAINERS entry for Omnivision OV2735 binding documentation Signed-off-by: Himanshu Bhavani Signed-off-by: Hardevsinh Palaniya Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../devicetree/bindings/media/i2c/ovti,ov2735.yaml | 108 +++++++++++++++++++++ 1 file changed, 108 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/i2c/ovti,ov2735.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov2735.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov2735.yaml new file mode 100644 index 000000000000..bb34f21519c8 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov2735.yaml @@ -0,0 +1,108 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/ovti,ov2735.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: OmniVision OV2735 Image Sensor + +maintainers: + - Himanshu Bhavani + +description: + The OmniVision OV2735 is a 2MP (1920x1080) color CMOS image sensor controlled + through an I2C-compatible SCCB bus. it outputs RAW10 format and uses a 1/2.7" + optical format. + +properties: + compatible: + const: ovti,ov2735 + + reg: + maxItems: 1 + + clocks: + items: + - description: XVCLK clock + + avdd-supply: + description: Analog Domain Power Supply + + dovdd-supply: + description: I/O Domain Power Supply + + dvdd-supply: + description: Digital Domain Power Supply + + reset-gpios: + maxItems: 1 + description: Reset Pin GPIO Control (active low) + + enable-gpios: + maxItems: 1 + description: + Active-low enable pin. Labeled as 'PWDN' in the datasheet, but acts as + an enable signal. During power rail ramp-up, the device remains powered + down. Once power rails are stable, pulling this pin low powers on the + device. + + port: + description: MIPI CSI-2 transmitter port + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + items: + - const: 1 + - const: 2 + + required: + - data-lanes + - link-frequencies + +required: + - compatible + - reg + - clocks + - avdd-supply + - dovdd-supply + - dvdd-supply + - port + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + camera-sensor@3c { + compatible = "ovti,ov2735"; + reg = <0x3c>; + clocks = <&ov2735_clk>; + + avdd-supply = <&ov2735_avdd>; + dovdd-supply = <&ov2735_dovdd>; + dvdd-supply = <&ov2735_dvdd>; + + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + enable-gpios = <&gpio2 11 GPIO_ACTIVE_LOW>; + + port { + cam_out: endpoint { + remote-endpoint = <&mipi_in_cam>; + data-lanes = <1 2>; + link-frequencies = /bits/ 64 <420000000>; + }; + }; + }; + }; -- cgit v1.2.3 From aa1826696a55cb0cbf706b41d7cb5f4e22084206 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 13 Aug 2025 12:49:23 +0300 Subject: dt-bindings: media: Deprecate clock-frequency property for camera sensors Usage of the clock-frequency property for camera sensors is discouraged in favour of using assigned-clock-rates (and assigned-clock-parents where needed). Mark the property as deprecated. Update the examples accordingly. In DT examples where the sensor input clock appears to come from a programmable clock generator, replace clock-frequency by the assigned-clocks and assigned-clock-rates properties. Otherwise, just drop clock-frequency. Signed-off-by: Laurent Pinchart Reviewed-by: Rob Herring (Arm) Signed-off-by: Sakari Ailus Reviewed-by: Mehdi Djait Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml | 6 ++++-- Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml | 7 +++++-- Documentation/devicetree/bindings/media/i2c/ovti,ov02a10.yaml | 3 +-- Documentation/devicetree/bindings/media/i2c/ovti,ov5645.yaml | 6 +++++- Documentation/devicetree/bindings/media/i2c/ovti,ov7251.yaml | 6 +++++- Documentation/devicetree/bindings/media/i2c/ovti,ov8856.yaml | 3 +-- Documentation/devicetree/bindings/media/i2c/samsung,s5k5baf.yaml | 6 +++++- Documentation/devicetree/bindings/media/i2c/samsung,s5k6a3.yaml | 6 +++++- Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml | 5 +++-- .../devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml | 3 ++- Documentation/devicetree/bindings/media/samsung,fimc.yaml | 3 ++- 11 files changed, 38 insertions(+), 16 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml index 73144473b9b2..1687b069e032 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml @@ -292,7 +292,8 @@ examples: clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; clock-names = "xvclk"; - clock-frequency = <19200000>; + assigned-clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + assigned-clock-rates = <19200000>; dovdd-supply = <&vreg_lvs1a_1p8>; avdd-supply = <&cam0_avdd_2v8>; @@ -324,7 +325,8 @@ examples: clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; clock-names = "xclk"; - clock-frequency = <24000000>; + assigned-clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + assigned-clock-rates = <24000000>; vdddo-supply = <&vreg_lvs1a_1p8>; vdda-supply = <&cam3_avdd_2v8>; diff --git a/Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml b/Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml index bc664a016396..217b08c8cbbd 100644 --- a/Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml +++ b/Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml @@ -55,6 +55,7 @@ properties: clock-frequency: description: Frequency of the external clock to the sensor in Hz. + deprecated: true reset-gpios: description: Reset GPIO. Also commonly called XSHUTDOWN in hardware @@ -93,7 +94,6 @@ properties: required: - compatible - reg - - clock-frequency - clocks additionalProperties: false @@ -114,8 +114,11 @@ examples: reg = <0x10>; reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; vana-supply = <&vaux3>; + clocks = <&omap3_isp 0>; - clock-frequency = <9600000>; + assigned-clocks = <&omap3_isp 0>; + assigned-clock-rates = <9600000>; + port { ccs_ep: endpoint { data-lanes = <1 2>; diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov02a10.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov02a10.yaml index 67c1c291327b..0e1d9c390180 100644 --- a/Documentation/devicetree/bindings/media/i2c/ovti,ov02a10.yaml +++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov02a10.yaml @@ -39,6 +39,7 @@ properties: clock-frequency: description: Frequency of the eclk clock in Hz. + deprecated: true dovdd-supply: description: @@ -100,7 +101,6 @@ required: - reg - clocks - clock-names - - clock-frequency - dovdd-supply - avdd-supply - dvdd-supply @@ -127,7 +127,6 @@ examples: clocks = <&ov02a10_clk>; clock-names = "eclk"; - clock-frequency = <24000000>; rotation = <180>; diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov5645.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov5645.yaml index bc9b27afe3ea..a583714b1ac7 100644 --- a/Documentation/devicetree/bindings/media/i2c/ovti,ov5645.yaml +++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov5645.yaml @@ -21,6 +21,7 @@ properties: clock-frequency: description: Frequency of the xclk clock in Hz. + deprecated: true vdda-supply: description: Analog voltage supply, 2.8 volts @@ -83,8 +84,11 @@ examples: camera@3c { compatible = "ovti,ov5645"; reg = <0x3c>; + clocks = <&clks 1>; - clock-frequency = <24000000>; + assigned-clocks = <&clks 1>; + assigned-clock-rates = <24000000>; + vdddo-supply = <&ov5645_vdddo_1v8>; vdda-supply = <&ov5645_vdda_2v8>; vddd-supply = <&ov5645_vddd_1v5>; diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov7251.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov7251.yaml index 2e5187acbbb8..922996da59b2 100644 --- a/Documentation/devicetree/bindings/media/i2c/ovti,ov7251.yaml +++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov7251.yaml @@ -29,6 +29,7 @@ properties: clock-frequency: description: Frequency of the xclk clock in Hz. + deprecated: true vdda-supply: description: Analog voltage supply, 2.8 volts @@ -89,8 +90,11 @@ examples: camera@3c { compatible = "ovti,ov7251"; reg = <0x3c>; + clocks = <&clks 1>; - clock-frequency = <24000000>; + assigned-clocks = <&clks 1>; + assigned-clock-rates = <24000000>; + vdddo-supply = <&ov7251_vdddo_1v8>; vdda-supply = <&ov7251_vdda_2v8>; vddd-supply = <&ov7251_vddd_1v5>; diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov8856.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov8856.yaml index 3f6f72c35485..fa71f24823f2 100644 --- a/Documentation/devicetree/bindings/media/i2c/ovti,ov8856.yaml +++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov8856.yaml @@ -37,6 +37,7 @@ properties: clock-frequency: description: Frequency of the xvclk clock in Hertz. + deprecated: true dovdd-supply: description: @@ -87,7 +88,6 @@ required: - reg - clocks - clock-names - - clock-frequency - dovdd-supply - avdd-supply - dvdd-supply @@ -114,7 +114,6 @@ examples: clocks = <&cam_osc>; clock-names = "xvclk"; - clock-frequency = <19200000>; avdd-supply = <&mt6358_vcama2_reg>; dvdd-supply = <&mt6358_vcamd_reg>; diff --git a/Documentation/devicetree/bindings/media/i2c/samsung,s5k5baf.yaml b/Documentation/devicetree/bindings/media/i2c/samsung,s5k5baf.yaml index c8f2955e0825..ebd95a8d9b2f 100644 --- a/Documentation/devicetree/bindings/media/i2c/samsung,s5k5baf.yaml +++ b/Documentation/devicetree/bindings/media/i2c/samsung,s5k5baf.yaml @@ -26,6 +26,7 @@ properties: clock-frequency: default: 24000000 description: mclk clock frequency + deprecated: true rstn-gpios: maxItems: 1 @@ -82,9 +83,12 @@ examples: sensor@2d { compatible = "samsung,s5k5baf"; reg = <0x2d>; + clocks = <&camera 0>; + assigned-clocks = <&camera 0>; + assigned-clock-rates = <24000000>; + clock-names = "mclk"; - clock-frequency = <24000000>; rstn-gpios = <&gpl2 1 GPIO_ACTIVE_LOW>; stbyn-gpios = <&gpl2 0 GPIO_ACTIVE_LOW>; vdda-supply = <&cam_io_en_reg>; diff --git a/Documentation/devicetree/bindings/media/i2c/samsung,s5k6a3.yaml b/Documentation/devicetree/bindings/media/i2c/samsung,s5k6a3.yaml index 7e83a94124b5..e563e35920c4 100644 --- a/Documentation/devicetree/bindings/media/i2c/samsung,s5k6a3.yaml +++ b/Documentation/devicetree/bindings/media/i2c/samsung,s5k6a3.yaml @@ -30,6 +30,7 @@ properties: clock-frequency: default: 24000000 description: extclk clock frequency + deprecated: true gpios: maxItems: 1 @@ -80,8 +81,11 @@ examples: sensor@10 { compatible = "samsung,s5k6a3"; reg = <0x10>; - clock-frequency = <24000000>; + clocks = <&camera 1>; + assigned-clocks = <&camera 1>; + assigned-clock-rates = <24000000>; + clock-names = "extclk"; gpios = <&gpm1 6 GPIO_ACTIVE_LOW>; afvdd-supply = <&ldo19_reg>; diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml index 990acf89af8f..484039671cd1 100644 --- a/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml +++ b/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml @@ -51,6 +51,7 @@ properties: clock-frequency: description: Frequency of the xclk clock in Hz + deprecated: true vdda-supply: description: Analog power supply (2.9V) @@ -100,7 +101,6 @@ required: - reg - clocks - clock-names - - clock-frequency - vdda-supply - vddd-supply - vdddo-supply @@ -125,7 +125,8 @@ examples: clocks = <&gcc 90>; clock-names = "xclk"; - clock-frequency = <37125000>; + assigned-clocks = <&clks 1>; + assigned-clock-rates = <37125000>; vdddo-supply = <&camera_vdddo_1v8>; vdda-supply = <&camera_vdda_2v8>; diff --git a/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml b/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml index 3a5ff3f47060..71d63bb9abb5 100644 --- a/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml +++ b/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml @@ -209,9 +209,10 @@ examples: svdda-supply = <&cam_io_reg>; svddio-supply = <&ldo19_reg>; afvdd-supply = <&ldo19_reg>; - clock-frequency = <24000000>; clocks = <&camera 1>; clock-names = "extclk"; + assigned-clocks = <&camera 1>; + assigned-clock-rates = <24000000>; gpios = <&gpm1 6 GPIO_ACTIVE_LOW>; port { diff --git a/Documentation/devicetree/bindings/media/samsung,fimc.yaml b/Documentation/devicetree/bindings/media/samsung,fimc.yaml index 7808d61f1fa3..2a54379d9509 100644 --- a/Documentation/devicetree/bindings/media/samsung,fimc.yaml +++ b/Documentation/devicetree/bindings/media/samsung,fimc.yaml @@ -259,10 +259,11 @@ examples: svdda-supply = <&cam_io_reg>; svddio-supply = <&ldo19_reg>; afvdd-supply = <&ldo19_reg>; - clock-frequency = <24000000>; /* CAM_B_CLKOUT */ clocks = <&camera 1>; clock-names = "extclk"; + assigned-clocks = <&camera 1>; + assigned-clock-rates = <24000000>; gpios = <&gpm1 6 GPIO_ACTIVE_LOW>; port { -- cgit v1.2.3 From c7d54dba555aa282d9d1abf8a808621ae20cc6c7 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 13 Aug 2025 00:45:10 +0300 Subject: dt-bindings: media: et8ek8: Deprecate clock-frequency property Usage of the clock-frequency property for camera sensors is discouraged in favour of using assigned-clock-rates (and assigned-clock-parents where needed). Drop the property, and update the example accordingly. Signed-off-by: Laurent Pinchart Acked-by: Rob Herring (Arm) Signed-off-by: Sakari Ailus Reviewed-by: Mehdi Djait Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.txt | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.txt b/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.txt index e80d5891b7ed..8d8e40c56872 100644 --- a/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.txt +++ b/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.txt @@ -13,9 +13,6 @@ Mandatory properties - reg: I2C address (0x3e, or an alternative address) - vana-supply: Analogue voltage supply (VANA), 2.8 volts - clocks: External clock to the sensor -- clock-frequency: Frequency of the external clock to the sensor. Camera - driver will set this frequency on the external clock. The clock frequency is - a pre-determined frequency known to be suitable to the board. - reset-gpios: XSHUTDOWN GPIO. The XSHUTDOWN signal is active low. The sensor is in hardware standby mode when the signal is in the low state. @@ -43,8 +40,11 @@ Example compatible = "toshiba,et8ek8"; reg = <0x3e>; vana-supply = <&vaux4>; + clocks = <&isp 0>; - clock-frequency = <9600000>; + assigned-clocks = <&isp 0>; + assigned-clock-rates = <9600000>; + reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */ port { csi_cam1: endpoint { -- cgit v1.2.3 From ea501438dcd321b058be91eadee1c67b5bec3c8d Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 13 Aug 2025 00:45:11 +0300 Subject: dt-bindings: media: imx258: Make clocks property required The sensor requires an external clock, and drivers need to access the clock to retrieve its frequency in order to configure the sensor. This makes usage of the clocks property mandatory for a system to work properly. Mark the property as required. Signed-off-by: Laurent Pinchart Acked-by: Rob Herring (Arm) Signed-off-by: Sakari Ailus Reviewed-by: Mehdi Djait Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/i2c/sony,imx258.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx258.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx258.yaml index 421b935b52bc..d105bd357dbb 100644 --- a/Documentation/devicetree/bindings/media/i2c/sony,imx258.yaml +++ b/Documentation/devicetree/bindings/media/i2c/sony,imx258.yaml @@ -81,6 +81,7 @@ properties: required: - compatible - reg + - clocks - port unevaluatedProperties: false -- cgit v1.2.3 From 4e181beb68a67453dadbac89e7440c4a291236dc Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 13 Aug 2025 00:45:12 +0300 Subject: dt-bindings: media: imx274: Make clocks property required The sensor requires an external clock, and drivers need to access the clock to retrieve its frequency in order to configure the sensor. This makes usage of the clocks property mandatory for a system to work properly. Mark the clocks and clock-names properties as required, and update the example accordingly. Signed-off-by: Laurent Pinchart Reviewed-by: Rob Herring (Arm) Signed-off-by: Sakari Ailus Reviewed-by: Mehdi Djait Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml | 4 ++++ Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml | 3 +++ 2 files changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml index b397a730ee94..b06a6e75ba97 100644 --- a/Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml +++ b/Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml @@ -46,6 +46,8 @@ properties: required: - compatible - reg + - clocks + - clock-names - port additionalProperties: false @@ -59,6 +61,8 @@ examples: imx274: camera-sensor@1a { compatible = "sony,imx274"; reg = <0x1a>; + clocks = <&imx274_clk>; + clock-names = "inck"; reset-gpios = <&gpio_sensor 0 0>; port { diff --git a/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml b/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml index 4dcbd2b039a5..0539d52de422 100644 --- a/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml +++ b/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml @@ -361,6 +361,9 @@ examples: compatible = "sony,imx274"; reg = <0x1a>; + clocks = <&serializer>; + clock-names = "inck"; + reset-gpios = <&serializer1 0 GPIO_ACTIVE_LOW>; port { -- cgit v1.2.3 From 73d31c7626efc54e4293e3c4ab49f849d1a42c68 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 13 Aug 2025 00:45:17 +0300 Subject: media: i2c: ov6650: Drop unused driver The ov6650 driver was introduced in v2.6.37 to support the OMAP1-based Amstrad Delta video phone. The platform still has a board file in the kernel, but support for the camera was dropped in commit ce548396a433 ("media: mach-omap1: board-ams-delta.c: remove soc_camera dependencies") in v5.9. The driver has been unused since as it has received neither ACPI nor DT support. The ov6650 driver is one of the last sensor drivers calling clk_set_rate(). This is deprecated, and calls to the function are being removed to avoid cargo-cult. As the driver is unlikely to ever be used again, drop it instead of trying to avoid call clk_set_rate(). Signed-off-by: Laurent Pinchart Signed-off-by: Sakari Ailus Reviewed-by: Mehdi Djait Signed-off-by: Hans Verkuil --- Documentation/admin-guide/media/i2c-cardlist.rst | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/media/i2c-cardlist.rst b/Documentation/admin-guide/media/i2c-cardlist.rst index 1825a0bb47bd..fff962558cd5 100644 --- a/Documentation/admin-guide/media/i2c-cardlist.rst +++ b/Documentation/admin-guide/media/i2c-cardlist.rst @@ -91,7 +91,6 @@ ov5647 OmniVision OV5647 sensor ov5670 OmniVision OV5670 sensor ov5675 OmniVision OV5675 sensor ov5695 OmniVision OV5695 sensor -ov6650 OmniVision OV6650 sensor ov7251 OmniVision OV7251 sensor ov7640 OmniVision OV7640 sensor ov7670 OmniVision OV7670 sensor -- cgit v1.2.3 From 907cef174cd81053beb54003e79b92f89bcd5d67 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Mon, 1 Sep 2025 13:03:29 +0530 Subject: dt-bindings: media: qcom,sm8550-iris: Update Dikshita Agarwal's email address Replace quic_dikshita@quicinc.com by dikshita.agarwal@oss.qualcomm.com. Signed-off-by: Dikshita Agarwal Reviewed-by: Bryan O'Donoghue [bod: Fixed patch title] Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml index c79bf2101812..0d630e620b09 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml @@ -8,7 +8,7 @@ title: Qualcomm iris video encode and decode accelerators maintainers: - Vikash Garodia - - Dikshita Agarwal + - Dikshita Agarwal description: The iris video processing unit is a video encode and decode accelerator -- cgit v1.2.3 From 088ee3df91ba7058394e92d6daf9bab40c418387 Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Fri, 4 Jul 2025 15:38:41 +0200 Subject: dt-bindings: media: qcom,sm8550-iris: Add X1E80100 compatible Iris in X1E80100 is pretty much identical to SM8550. We can use the same firmware image and the same definitions in the driver, so just add qcom,x1e80100-iris to the existing list with qcom,sm8550-iris as fallback compatible. Signed-off-by: Stephan Gerhold Reviewed-by: Vikash Garodia Acked-by: Rob Herring (Arm) Reviewed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml index 0d630e620b09..170eeb5a4222 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml @@ -20,6 +20,7 @@ properties: - items: - enum: - qcom,sa8775p-iris + - qcom,x1e80100-iris - const: qcom,sm8550-iris - enum: - qcom,qcs8300-iris -- cgit v1.2.3 From 49b5feb5214d1fcd79c44ec3c7be17dd48b761e4 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 4 Aug 2025 15:37:38 +0200 Subject: dt-bindings: media: qcom,sm8550-iris: Add SM8750 video codec Add binding for Qualcom SM8750 Iris video codec, which comes with significantly different powering up sequence than previous SM8650, thus different clocks and resets. For consistency keep existing clock and clock-names naming, so the list shares common part. Reviewed-by: Rob Herring (Arm) Signed-off-by: Krzysztof Kozlowski [bod: re-ordered patch title to dt-bindings: media] Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../bindings/media/qcom,sm8750-iris.yaml | 186 +++++++++++++++++++++ 1 file changed, 186 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/qcom,sm8750-iris.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/qcom,sm8750-iris.yaml b/Documentation/devicetree/bindings/media/qcom,sm8750-iris.yaml new file mode 100644 index 000000000000..c9a0fcafe53f --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,sm8750-iris.yaml @@ -0,0 +1,186 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,sm8750-iris.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM8750 SoC Iris video encoder and decoder + +maintainers: + - Krzysztof Kozlowski + +description: + The Iris video processing unit on Qualcomm SM8750 SoC is a video encode and + decode accelerator. + +properties: + compatible: + enum: + - qcom,sm8750-iris + + clocks: + maxItems: 6 + + clock-names: + items: + - const: iface # AXI0 + - const: core + - const: vcodec0_core + - const: iface1 # AXI1 + - const: core_freerun + - const: vcodec0_core_freerun + + dma-coherent: true + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: cpu-cfg + - const: video-mem + + iommus: + maxItems: 2 + + operating-points-v2: true + opp-table: + type: object + + power-domains: + maxItems: 4 + + power-domain-names: + items: + - const: venus + - const: vcodec0 + - const: mxc + - const: mmcx + + resets: + maxItems: 4 + + reset-names: + items: + - const: bus0 + - const: bus1 + - const: core + - const: vcodec0_core + +required: + - compatible + - dma-coherent + - interconnects + - interconnect-names + - iommus + - power-domain-names + - resets + - reset-names + +allOf: + - $ref: qcom,venus-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #include + #include + + video-codec@aa00000 { + compatible = "qcom,sm8750-iris"; + reg = <0x0aa00000 0xf0000>; + + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc_mvs0c_clk>, + <&videocc_mvs0_clk>, + <&gcc GCC_VIDEO_AXI1_CLK>, + <&videocc_mvs0c_freerun_clk>, + <&videocc_mvs0_freerun_clk>; + clock-names = "iface", + "core", + "vcodec0_core", + "iface1", + "core_freerun", + "vcodec0_core_freerun"; + + dma-coherent; + iommus = <&apps_smmu 0x1940 0>, + <&apps_smmu 0x1947 0>; + + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mmss_noc MASTER_VIDEO_MVP QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "cpu-cfg", + "video-mem"; + + interrupts = ; + + operating-points-v2 = <&iris_opp_table>; + + memory-region = <&video_mem>; + + power-domains = <&videocc_mvs0c_gdsc>, + <&videocc_mvs0_gdsc>, + <&rpmhpd RPMHPD_MXC>, + <&rpmhpd RPMHPD_MMCX>; + power-domain-names = "venus", + "vcodec0", + "mxc", + "mmcx"; + + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>, + <&gcc GCC_VIDEO_AXI1_CLK_ARES>, + <&videocc_mvs0c_freerun_clk_ares>, + <&videocc_mvs0_freerun_clk_ares>; + reset-names = "bus0", + "bus1", + "core", + "vcodec0_core"; + + iris_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-240000000 { + opp-hz = /bits/ 64 <240000000>; + required-opps = <&rpmhpd_opp_low_svs_d1>, + <&rpmhpd_opp_low_svs_d1>; + }; + + opp-338000000 { + opp-hz = /bits/ 64 <338000000>; + required-opps = <&rpmhpd_opp_low_svs>, + <&rpmhpd_opp_low_svs>; + }; + + opp-420000000 { + opp-hz = /bits/ 64 <420000000>; + required-opps = <&rpmhpd_opp_svs>, + <&rpmhpd_opp_svs>; + }; + + opp-444000000 { + opp-hz = /bits/ 64 <444000000>; + required-opps = <&rpmhpd_opp_svs_l1>, + <&rpmhpd_opp_svs_l1>; + }; + + opp-533333334 { + opp-hz = /bits/ 64 <533333334>; + required-opps = <&rpmhpd_opp_nom>, + <&rpmhpd_opp_nom>; + }; + + opp-630000000 { + opp-hz = /bits/ 64 <630000000>; + required-opps = <&rpmhpd_opp_turbo>, + <&rpmhpd_opp_turbo>; + }; + }; + }; -- cgit v1.2.3 From 6d3926a237b68e3bfd3068553e6c3fa3fed1ea1b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 23 Aug 2025 17:53:50 +0200 Subject: dt-bindings: media: qcom,sm8550-iris: Do not reference legacy venus properties The Qualcomm SoC Iris video codec is an evolution of previous Venus and it comes with its own Iris Linux drivers. These new drivers were accepted under condition they actually improve state of afairs, instead of duplicating old, legacy solutions. Unfortunately binding still references common parts of Venus without actual need and benefit. For example Iris does not use fake "video-firmware" device node (fake because there is no actual device underlying it and it was added only to work around some Linux issues with IOMMU mappings). Stop referencing venus-common schema in the new Qualcomm Iris bindings and move all necessary properties, except unused "video-firmware" (no driver usage, no DTS). Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring (Arm) Reviewed-by: Vikash Garodia Reviewed-by: Bryan O'Donoghue [bod: Changed title order to dt-bindings: media] Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../devicetree/bindings/media/qcom,sm8550-iris.yaml | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml index 170eeb5a4222..9c4b760508b5 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml @@ -27,6 +27,9 @@ properties: - qcom,sm8550-iris - qcom,sm8650-iris + reg: + maxItems: 1 + power-domains: maxItems: 4 @@ -46,6 +49,12 @@ properties: - const: core - const: vcodec0_core + firmware-name: + maxItems: 1 + + interrupts: + maxItems: 1 + interconnects: maxItems: 2 @@ -70,6 +79,9 @@ properties: dma-coherent: true + memory-region: + maxItems: 1 + operating-points-v2: true opp-table: @@ -86,7 +98,6 @@ required: - dma-coherent allOf: - - $ref: qcom,venus-common.yaml# - if: properties: compatible: -- cgit v1.2.3 From cba308979b012664c7fe7c5baa818fcb68e86363 Mon Sep 17 00:00:00 2001 From: Loic Poulain Date: Tue, 8 Jul 2025 10:32:21 +0200 Subject: dt-bindings: media: Add qcom,qcm2290-camss Add bindings for qcom,qcm2290-camss in order to support the camera subsystem found in the Qualcomm Robotics RB1 Platform (QRB2210). Signed-off-by: Loic Poulain Reviewed-by: Bryan O'Donoghue Reviewed-by: Krzysztof Kozlowski [bod: reordered patch title to dt-bindings: media] Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../bindings/media/qcom,qcm2290-camss.yaml | 243 +++++++++++++++++++++ 1 file changed, 243 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/qcom,qcm2290-camss.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/qcom,qcm2290-camss.yaml b/Documentation/devicetree/bindings/media/qcom,qcm2290-camss.yaml new file mode 100644 index 000000000000..391d0f6f67ef --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,qcm2290-camss.yaml @@ -0,0 +1,243 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,qcm2290-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QCM2290 Camera Subsystem (CAMSS) + +maintainers: + - Loic Poulain + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. + +properties: + compatible: + const: qcom,qcm2290-camss + + reg: + maxItems: 9 + + reg-names: + items: + - const: top + - const: csid0 + - const: csid1 + - const: csiphy0 + - const: csiphy1 + - const: csitpg0 + - const: csitpg1 + - const: vfe0 + - const: vfe1 + + clocks: + maxItems: 15 + + clock-names: + items: + - const: ahb + - const: axi + - const: camnoc_nrt_axi + - const: camnoc_rt_axi + - const: csi0 + - const: csi1 + - const: csiphy0 + - const: csiphy0_timer + - const: csiphy1 + - const: csiphy1_timer + - const: top_ahb + - const: vfe0 + - const: vfe0_cphy_rx + - const: vfe1 + - const: vfe1_cphy_rx + + interrupts: + maxItems: 8 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csiphy0 + - const: csiphy1 + - const: csitpg0 + - const: csitpg1 + - const: vfe0 + - const: vfe1 + + interconnects: + maxItems: 3 + + interconnect-names: + items: + - const: ahb + - const: hf_mnoc + - const: sf_mnoc + + iommus: + maxItems: 4 + + power-domains: + items: + - description: GDSC CAMSS Block, Global Distributed Switch Controller. + + vdd-csiphy-1p2-supply: + description: + Phandle to a 1.2V regulator supply to CSI PHYs. + + vdd-csiphy-1p8-supply: + description: + Phandle to 1.8V regulator supply to CSI PHYs pll block. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + patternProperties: + "^port@[0-3]+$": + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + + description: + Input port for receiving CSI data from a CSIPHY. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - data-lanes + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - interrupt-names + - interconnects + - interconnect-names + - iommus + - power-domains + - vdd-csiphy-1p2-supply + - vdd-csiphy-1p8-supply + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + camss: camss@5c6e000 { + compatible = "qcom,qcm2290-camss"; + + reg = <0x0 0x5c11000 0x0 0x1000>, + <0x0 0x5c6e000 0x0 0x1000>, + <0x0 0x5c75000 0x0 0x1000>, + <0x0 0x5c52000 0x0 0x1000>, + <0x0 0x5c53000 0x0 0x1000>, + <0x0 0x5c66000 0x0 0x400>, + <0x0 0x5c68000 0x0 0x400>, + <0x0 0x5c6f000 0x0 0x4000>, + <0x0 0x5c76000 0x0 0x4000>; + reg-names = "top", + "csid0", + "csid1", + "csiphy0", + "csiphy1", + "csitpg0", + "csitpg1", + "vfe0", + "vfe1"; + + clocks = <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMSS_AXI_CLK>, + <&gcc GCC_CAMSS_NRT_AXI_CLK>, + <&gcc GCC_CAMSS_RT_AXI_CLK>, + <&gcc GCC_CAMSS_TFE_0_CSID_CLK>, + <&gcc GCC_CAMSS_TFE_1_CSID_CLK>, + <&gcc GCC_CAMSS_CPHY_0_CLK>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, + <&gcc GCC_CAMSS_CPHY_1_CLK>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_TFE_0_CLK>, + <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_TFE_1_CLK>, + <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>; + clock-names = "ahb", + "axi", + "camnoc_nrt_axi", + "camnoc_rt_axi", + "csi0", + "csi1", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "top_ahb", + "vfe0", + "vfe0_cphy_rx", + "vfe1", + "vfe1_cphy_rx"; + + interrupts = , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csiphy0", + "csiphy1", + "csitpg0", + "csitpg1", + "vfe0", + "vfe1"; + + interconnects = <&bimc MASTER_APPSS_PROC RPM_ACTIVE_TAG + &config_noc SLAVE_CAMERA_CFG RPM_ACTIVE_TAG>, + <&mmrt_virt MASTER_CAMNOC_HF RPM_ALWAYS_TAG + &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>, + <&mmnrt_virt MASTER_CAMNOC_SF RPM_ALWAYS_TAG + &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>; + interconnect-names = "ahb", + "hf_mnoc", + "sf_mnoc"; + + iommus = <&apps_smmu 0x400 0x0>, + <&apps_smmu 0x800 0x0>, + <&apps_smmu 0x820 0x0>, + <&apps_smmu 0x840 0x0>; + + power-domains = <&gcc GCC_CAMSS_TOP_GDSC>; + + vdd-csiphy-1p2-supply = <&pm4125_l5>; + vdd-csiphy-1p8-supply = <&pm4125_l13>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; -- cgit v1.2.3 From 8dd22e90331d64bd15adc598a8d41fee2ccf93da Mon Sep 17 00:00:00 2001 From: Vikram Sharma Date: Thu, 14 Aug 2025 15:46:09 +0530 Subject: media: dt-bindings: Add qcom,sa8775p-camss compatible Add the compatible string "qcom,sa8775p-camss" to support the Camera Subsystem (CAMSS) on the Qualcomm lemans platform. The Lemans(SA8775P) platform provides: - 2 x VFE (version 690), each with 3 RDI - 5 x VFE Lite (version 690), each with 6 RDI - 2 x CSID (version 690) - 5 x CSID Lite (version 690) - 4 x CSIPHY (version 690) - 3 x TPG Lemans is the first Qualcomm SoC to introduce a CSIPHY-based Test Pattern Generator (TPG). Co-developed-by: Wenmeng Liu Signed-off-by: Wenmeng Liu Signed-off-by: Vikram Sharma Reviewed-by: Krzysztof Kozlowski Reviewed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../bindings/media/qcom,sa8775p-camss.yaml | 361 +++++++++++++++++++++ 1 file changed, 361 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml new file mode 100644 index 000000000000..019caa2b09c3 --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml @@ -0,0 +1,361 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,sa8775p-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SA8775P CAMSS ISP + +maintainers: + - Vikram Sharma + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. + +properties: + compatible: + const: qcom,sa8775p-camss + + reg: + maxItems: 22 + + reg-names: + items: + - const: csid_wrapper + - const: csid0 + - const: csid1 + - const: csid_lite0 + - const: csid_lite1 + - const: csid_lite2 + - const: csid_lite3 + - const: csid_lite4 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: csiphy3 + - const: tpg0 + - const: tpg1 + - const: tpg2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite0 + - const: vfe_lite1 + - const: vfe_lite2 + - const: vfe_lite3 + - const: vfe_lite4 + + clocks: + maxItems: 28 + + clock-names: + items: + - const: camnoc_axi + - const: core_ahb + - const: cpas_ahb + - const: cpas_fast_ahb_clk + - const: cpas_vfe_lite + - const: cpas_vfe0 + - const: cpas_vfe1 + - const: csid + - const: csiphy0 + - const: csiphy0_timer + - const: csiphy1 + - const: csiphy1_timer + - const: csiphy2 + - const: csiphy2_timer + - const: csiphy3 + - const: csiphy3_timer + - const: csiphy_rx + - const: gcc_axi_hf + - const: gcc_axi_sf + - const: icp_ahb + - const: vfe0 + - const: vfe0_fast_ahb + - const: vfe1 + - const: vfe1_fast_ahb + - const: vfe_lite + - const: vfe_lite_ahb + - const: vfe_lite_cphy_rx + - const: vfe_lite_csid + + interrupts: + maxItems: 21 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid_lite0 + - const: csid_lite1 + - const: csid_lite2 + - const: csid_lite3 + - const: csid_lite4 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: csiphy3 + - const: tpg0 + - const: tpg1 + - const: tpg2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite0 + - const: vfe_lite1 + - const: vfe_lite2 + - const: vfe_lite3 + - const: vfe_lite4 + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: ahb + - const: hf_0 + + iommus: + maxItems: 1 + + power-domains: + items: + - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller. + + power-domain-names: + items: + - const: top + + vdda-phy-supply: + description: + Phandle to a regulator supply to PHY core block. + + vdda-pll-supply: + description: + Phandle to 1.8V regulator supply to PHY refclk pll block. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + patternProperties: + "^port@[0-3]+$": + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data on CSIPHY 0-3. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - data-lanes + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - interrupt-names + - interconnects + - interconnect-names + - iommus + - power-domains + - power-domain-names + - vdda-phy-supply + - vdda-pll-supply + - ports + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + isp@ac78000 { + compatible = "qcom,sa8775p-camss"; + + reg = <0x0 0xac78000 0x0 0x1000>, + <0x0 0xac7a000 0x0 0x0f00>, + <0x0 0xac7c000 0x0 0x0f00>, + <0x0 0xac84000 0x0 0x0f00>, + <0x0 0xac88000 0x0 0x0f00>, + <0x0 0xac8c000 0x0 0x0f00>, + <0x0 0xac90000 0x0 0x0f00>, + <0x0 0xac94000 0x0 0x0f00>, + <0x0 0xac9c000 0x0 0x2000>, + <0x0 0xac9e000 0x0 0x2000>, + <0x0 0xaca0000 0x0 0x2000>, + <0x0 0xaca2000 0x0 0x2000>, + <0x0 0xacac000 0x0 0x0400>, + <0x0 0xacad000 0x0 0x0400>, + <0x0 0xacae000 0x0 0x0400>, + <0x0 0xac4d000 0x0 0xd000>, + <0x0 0xac5a000 0x0 0xd000>, + <0x0 0xac85000 0x0 0x0d00>, + <0x0 0xac89000 0x0 0x0d00>, + <0x0 0xac8d000 0x0 0x0d00>, + <0x0 0xac91000 0x0 0x0d00>, + <0x0 0xac95000 0x0 0x0d00>; + reg-names = "csid_wrapper", + "csid0", + "csid1", + "csid_lite0", + "csid_lite1", + "csid_lite2", + "csid_lite3", + "csid_lite4", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "tpg0", + "tpg1", + "tpg2", + "vfe0", + "vfe1", + "vfe_lite0", + "vfe_lite1", + "vfe_lite2", + "vfe_lite3", + "vfe_lite4"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CORE_AHB_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CPAS_FAST_AHB_CLK>, + <&camcc CAM_CC_CPAS_IFE_LITE_CLK>, + <&camcc CAM_CC_CPAS_IFE_0_CLK>, + <&camcc CAM_CC_CPAS_IFE_1_CLK>, + <&camcc CAM_CC_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY3_CLK>, + <&camcc CAM_CC_CSI3PHYTIMER_CLK>, + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&gcc GCC_CAMERA_SF_AXI_CLK>, + <&camcc CAM_CC_ICP_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>; + clock-names = "camnoc_axi", + "core_ahb", + "cpas_ahb", + "cpas_fast_ahb_clk", + "cpas_vfe_lite", + "cpas_vfe0", + "cpas_vfe1", + "csid", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "csiphy3", + "csiphy3_timer", + "csiphy_rx", + "gcc_axi_hf", + "gcc_axi_sf", + "icp_ahb", + "vfe0", + "vfe0_fast_ahb", + "vfe1", + "vfe1_fast_ahb", + "vfe_lite", + "vfe_lite_ahb", + "vfe_lite_cphy_rx", + "vfe_lite_csid"; + + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csid_lite0", + "csid_lite1", + "csid_lite2", + "csid_lite3", + "csid_lite4", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "tpg0", + "tpg1", + "tpg2", + "vfe0", + "vfe1", + "vfe_lite0", + "vfe_lite1", + "vfe_lite2", + "vfe_lite3", + "vfe_lite4"; + + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "ahb", + "hf_0"; + + iommus = <&apps_smmu 0x3400 0x20>; + + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; + power-domain-names = "top"; + + vdda-phy-supply = <&vreg_l4a_0p88>; + vdda-pll-supply = <&vreg_l1c_1p2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; -- cgit v1.2.3 From 634a2958fae30b9ea2c603e7b12c2729407c8292 Mon Sep 17 00:00:00 2001 From: Vikram Sharma Date: Wed, 13 Aug 2025 11:07:18 +0530 Subject: media: dt-bindings: Add qcom,qcs8300-camss compatible Add the compatible string "qcom,qcs8300-camss" to support the Camera Subsystem (CAMSS) on the Qualcomm QCS8300 platform. The QCS8300 platform provides: - 2 x VFE (version 690), each with 3 RDI - 5 x VFE Lite (version 690), each with 6 RDI - 2 x CSID (version 690) - 5 x CSID Lite (version 690) - 3 x CSIPHY (version 690) - 3 x TPG Signed-off-by: Vikram Sharma Reviewed-by: Krzysztof Kozlowski Reviewed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../bindings/media/qcom,qcs8300-camss.yaml | 336 +++++++++++++++++++++ 1 file changed, 336 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml b/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml new file mode 100644 index 000000000000..80a4540a22dc --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml @@ -0,0 +1,336 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,qcs8300-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QCS8300 CAMSS ISP + +maintainers: + - Vikram Sharma + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. + +properties: + compatible: + const: qcom,qcs8300-camss + + reg: + maxItems: 21 + + reg-names: + items: + - const: csid_wrapper + - const: csid0 + - const: csid1 + - const: csid_lite0 + - const: csid_lite1 + - const: csid_lite2 + - const: csid_lite3 + - const: csid_lite4 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: tpg0 + - const: tpg1 + - const: tpg2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite0 + - const: vfe_lite1 + - const: vfe_lite2 + - const: vfe_lite3 + - const: vfe_lite4 + + clocks: + maxItems: 26 + + clock-names: + items: + - const: camnoc_axi + - const: core_ahb + - const: cpas_ahb + - const: cpas_fast_ahb_clk + - const: cpas_vfe_lite + - const: cpas_vfe0 + - const: cpas_vfe1 + - const: csid + - const: csiphy0 + - const: csiphy0_timer + - const: csiphy1 + - const: csiphy1_timer + - const: csiphy2 + - const: csiphy2_timer + - const: csiphy_rx + - const: gcc_axi_hf + - const: gcc_axi_sf + - const: icp_ahb + - const: vfe0 + - const: vfe0_fast_ahb + - const: vfe1 + - const: vfe1_fast_ahb + - const: vfe_lite + - const: vfe_lite_ahb + - const: vfe_lite_cphy_rx + - const: vfe_lite_csid + + interrupts: + maxItems: 20 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid_lite0 + - const: csid_lite1 + - const: csid_lite2 + - const: csid_lite3 + - const: csid_lite4 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: tpg0 + - const: tpg1 + - const: tpg2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite0 + - const: vfe_lite1 + - const: vfe_lite2 + - const: vfe_lite3 + - const: vfe_lite4 + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: ahb + - const: hf_0 + + iommus: + maxItems: 1 + + power-domains: + items: + - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller. + + power-domain-names: + items: + - const: top + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + patternProperties: + "^port@[0-2]+$": + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data on CSIPHY 0-2. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - data-lanes + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - interrupt-names + - interconnects + - interconnect-names + - iommus + - power-domains + - power-domain-names + - ports + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + isp@ac78000 { + compatible = "qcom,qcs8300-camss"; + + reg = <0x0 0xac78000 0x0 0x1000>, + <0x0 0xac7a000 0x0 0x0f00>, + <0x0 0xac7c000 0x0 0x0f00>, + <0x0 0xac84000 0x0 0x0f00>, + <0x0 0xac88000 0x0 0x0f00>, + <0x0 0xac8c000 0x0 0x0f00>, + <0x0 0xac90000 0x0 0x0f00>, + <0x0 0xac94000 0x0 0x0f00>, + <0x0 0xac9c000 0x0 0x2000>, + <0x0 0xac9e000 0x0 0x2000>, + <0x0 0xaca0000 0x0 0x2000>, + <0x0 0xacac000 0x0 0x0400>, + <0x0 0xacad000 0x0 0x0400>, + <0x0 0xacae000 0x0 0x0400>, + <0x0 0xac4d000 0x0 0xd000>, + <0x0 0xac60000 0x0 0xd000>, + <0x0 0xac85000 0x0 0x0d00>, + <0x0 0xac89000 0x0 0x0d00>, + <0x0 0xac8d000 0x0 0x0d00>, + <0x0 0xac91000 0x0 0x0d00>, + <0x0 0xac95000 0x0 0x0d00>; + reg-names = "csid_wrapper", + "csid0", + "csid1", + "csid_lite0", + "csid_lite1", + "csid_lite2", + "csid_lite3", + "csid_lite4", + "csiphy0", + "csiphy1", + "csiphy2", + "tpg0", + "tpg1", + "tpg2", + "vfe0", + "vfe1", + "vfe_lite0", + "vfe_lite1", + "vfe_lite2", + "vfe_lite3", + "vfe_lite4"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CORE_AHB_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CPAS_FAST_AHB_CLK>, + <&camcc CAM_CC_CPAS_IFE_LITE_CLK>, + <&camcc CAM_CC_CPAS_IFE_0_CLK>, + <&camcc CAM_CC_CPAS_IFE_1_CLK>, + <&camcc CAM_CC_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&gcc GCC_CAMERA_SF_AXI_CLK>, + <&camcc CAM_CC_ICP_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>; + clock-names = "camnoc_axi", + "core_ahb", + "cpas_ahb", + "cpas_fast_ahb_clk", + "cpas_vfe_lite", + "cpas_vfe0", + "cpas_vfe1", + "csid", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "csiphy_rx", + "gcc_axi_hf", + "gcc_axi_sf", + "icp_ahb", + "vfe0", + "vfe0_fast_ahb", + "vfe1", + "vfe1_fast_ahb", + "vfe_lite", + "vfe_lite_ahb", + "vfe_lite_cphy_rx", + "vfe_lite_csid"; + + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csid_lite0", + "csid_lite1", + "csid_lite2", + "csid_lite3", + "csid_lite4", + "csiphy0", + "csiphy1", + "csiphy2", + "tpg0", + "tpg1", + "tpg2", + "vfe0", + "vfe1", + "vfe_lite0", + "vfe_lite1", + "vfe_lite2", + "vfe_lite3", + "vfe_lite4"; + + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "ahb", + "hf_0"; + + iommus = <&apps_smmu 0x2400 0x20>; + + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; + power-domain-names = "top"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; -- cgit v1.2.3 From d5ad57fc428c1e44335d25c822eb89645f425f32 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 9 Sep 2025 16:03:32 +0200 Subject: dt-bindings: input: qcom,pm8941-pwrkey: Fix formatting of descriptions Property descriptions should indent with two spaces and they do not need to preserve formatting. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250909140331.69756-2-krzysztof.kozlowski@linaro.org Signed-off-by: Dmitry Torokhov --- .../bindings/input/qcom,pm8941-pwrkey.yaml | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/qcom,pm8941-pwrkey.yaml b/Documentation/devicetree/bindings/input/qcom,pm8941-pwrkey.yaml index 62314a5fdce5..72006a14fd41 100644 --- a/Documentation/devicetree/bindings/input/qcom,pm8941-pwrkey.yaml +++ b/Documentation/devicetree/bindings/input/qcom,pm8941-pwrkey.yaml @@ -25,23 +25,22 @@ properties: maxItems: 1 debounce: - description: | - Time in microseconds that key must be pressed or - released for state change interrupt to trigger. + description: + Time in microseconds that key must be pressed or released for state + change interrupt to trigger. $ref: /schemas/types.yaml#/definitions/uint32 bias-pull-up: - description: | - Presence of this property indicates that the KPDPWR_N - pin should be configured for pull up. + description: + Presence of this property indicates that the KPDPWR_N pin should be + configured for pull up. $ref: /schemas/types.yaml#/definitions/flag linux,code: - description: | - The input key-code associated with the power key. - Use the linux event codes defined in - include/dt-bindings/input/linux-event-codes.h - When property is omitted KEY_POWER is assumed. + description: + The input key-code associated with the power key. Use the linux event + codes defined in include/dt-bindings/input/linux-event-codes.h. + When property is omitted KEY_POWER is assumed. required: - compatible -- cgit v1.2.3 From b69f8c496ea05f80c2bae91a74b48c00c06c524e Mon Sep 17 00:00:00 2001 From: Luiz Otavio Mello Date: Mon, 8 Sep 2025 09:15:17 -0400 Subject: drm/i915: Remove todo and comments about struct_mutex This patch completes the removal of struct_mutex from the driver. Remove the related TODO item, as the transition away from struct_mutex is now complete. Also clean up references to struct_mutex in i915.rst to avoid outdated documentation. Signed-off-by: Luiz Otavio Mello Reviewed-by: Rodrigo Vivi Link: https://lore.kernel.org/r/20250908131518.36625-10-luiz.mello@estudante.ufscar.br Acked-by: Thomas Zimmermann Signed-off-by: Rodrigo Vivi --- Documentation/gpu/i915.rst | 7 ------- Documentation/gpu/todo.rst | 25 ------------------------- 2 files changed, 32 deletions(-) (limited to 'Documentation') diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst index 72932fa31b8d..eba09c3ddce4 100644 --- a/Documentation/gpu/i915.rst +++ b/Documentation/gpu/i915.rst @@ -358,8 +358,6 @@ Locking Guidelines #. All locking rules and interface contracts with cross-driver interfaces (dma-buf, dma_fence) need to be followed. -#. No struct_mutex anywhere in the code - #. dma_resv will be the outermost lock (when needed) and ww_acquire_ctx is to be hoisted at highest level and passed down within i915_gem_ctx in the call chain @@ -367,11 +365,6 @@ Locking Guidelines #. While holding lru/memory manager (buddy, drm_mm, whatever) locks system memory allocations are not allowed - * Enforce this by priming lockdep (with fs_reclaim). If we - allocate memory while holding these looks we get a rehash - of the shrinker vs. struct_mutex saga, and that would be - real bad. - #. Do not nest different lru/memory manager locks within each other. Take them in turn to update memory allocations, relying on the object’s dma_resv ww_mutex to serialize against other operations. diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst index be8637da3fe9..c796331d9acc 100644 --- a/Documentation/gpu/todo.rst +++ b/Documentation/gpu/todo.rst @@ -173,31 +173,6 @@ Contact: Simona Vetter Level: Intermediate -Get rid of dev->struct_mutex from GEM drivers ---------------------------------------------- - -``dev->struct_mutex`` is the Big DRM Lock from legacy days and infested -everything. Nowadays in modern drivers the only bit where it's mandatory is -serializing GEM buffer object destruction. Which unfortunately means drivers -have to keep track of that lock and either call ``unreference`` or -``unreference_locked`` depending upon context. - -Core GEM doesn't have a need for ``struct_mutex`` any more since kernel 4.8, -and there's a GEM object ``free`` callback for any drivers which are -entirely ``struct_mutex`` free. - -For drivers that need ``struct_mutex`` it should be replaced with a driver- -private lock. The tricky part is the BO free functions, since those can't -reliably take that lock any more. Instead state needs to be protected with -suitable subordinate locks or some cleanup work pushed to a worker thread. For -performance-critical drivers it might also be better to go with a more -fine-grained per-buffer object and per-context lockings scheme. Currently only -the ``msm`` and `i915` drivers use ``struct_mutex``. - -Contact: Simona Vetter, respective driver maintainers - -Level: Advanced - Move Buffer Object Locking to dma_resv_lock() --------------------------------------------- -- cgit v1.2.3 From 818045d1658fd4ceec06fb6efa62ed9c5b7f23cf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Eric=20Gon=C3=A7alves?= Date: Fri, 5 Sep 2025 19:09:30 +0000 Subject: dt-bindings: arm: qcom: document x1q board binding MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add binding for the Samsung Galaxy S20 board, codenamed X1Q, which is based on the Qualcomm Snapdragon 865 SoC. Signed-off-by: Eric Gonçalves Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250905190931.27481-3-ghatto404@gmail.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 2698ba87cd93..cf49dd0000e0 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -984,6 +984,7 @@ properties: - qcom,sm8250-hdk - qcom,sm8250-mtp - samsung,r8q + - samsung,x1q - sony,pdx203-generic - sony,pdx206-generic - xiaomi,elish -- cgit v1.2.3 From f874abea20bc381ecf3cab6dad56c5ff66d1a5cc Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 9 Sep 2025 09:21:42 +0700 Subject: Documentation: w1: Fix SPDX comment syntax on masters and slaves toctree index Commit e9bb627561535d ("docs: w1: convert to ReST and add to the kAPI group of docs") converts 1-Wire docs to reST alongside with SPDX comment, yet the comment is written in one dot as opposed to two in order to be recognized as comment directive, which spills it into htmldocs output. This issue is partially fixed in d8fb03e1ea64e7 ("docs: w1: Fix SPDX-License-Identifier syntax") as it only touches top-level w1 toctree. Do the same fix on masters and slaves toctrees. Fixes: e9bb62756153 ("docs: w1: convert to ReST and add to the kAPI group of docs") Signed-off-by: Bagas Sanjaya Reviewed-by: Krzysztof Kozlowski Signed-off-by: Jonathan Corbet Message-ID: <20250909022142.18007-1-bagasdotme@gmail.com> --- Documentation/w1/masters/index.rst | 2 +- Documentation/w1/slaves/index.rst | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/w1/masters/index.rst b/Documentation/w1/masters/index.rst index cc40189909fd..871442c7f195 100644 --- a/Documentation/w1/masters/index.rst +++ b/Documentation/w1/masters/index.rst @@ -1,4 +1,4 @@ -. SPDX-License-Identifier: GPL-2.0 +.. SPDX-License-Identifier: GPL-2.0 ===================== 1-wire Master Drivers diff --git a/Documentation/w1/slaves/index.rst b/Documentation/w1/slaves/index.rst index d0697b202f09..a210f38c889c 100644 --- a/Documentation/w1/slaves/index.rst +++ b/Documentation/w1/slaves/index.rst @@ -1,4 +1,4 @@ -. SPDX-License-Identifier: GPL-2.0 +.. SPDX-License-Identifier: GPL-2.0 ==================== 1-wire Slave Drivers -- cgit v1.2.3 From 4b6fba464322f5850dbcce32f3a25eeebf64e770 Mon Sep 17 00:00:00 2001 From: Vegard Nossum Date: Fri, 5 Sep 2025 16:46:07 +0200 Subject: docs: add Documentation/.renames.txt This is the result of running: scripts/documentation-gen-renames.py --rev v6.17-rc3 > Documentation/.renames.txt This file records renames in the Documentation/ directory so that we can use it to quickly generate HTML redirects from removed paths. Suggested-by: Jonathan Corbet Signed-off-by: Vegard Nossum Signed-off-by: Jonathan Corbet Message-ID: <20250905144608.577449-3-vegard.nossum@oracle.com> --- Documentation/.renames.txt | 1191 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 1191 insertions(+) create mode 100644 Documentation/.renames.txt (limited to 'Documentation') diff --git a/Documentation/.renames.txt b/Documentation/.renames.txt new file mode 100644 index 000000000000..c0bd5d3dc8b9 --- /dev/null +++ b/Documentation/.renames.txt @@ -0,0 +1,1191 @@ +80211/cfg80211 driver-api/80211/cfg80211 +80211/index driver-api/80211/index +80211/introduction driver-api/80211/introduction +80211/mac80211 driver-api/80211/mac80211 +80211/mac80211-advanced driver-api/80211/mac80211-advanced +EDID/howto admin-guide/edid +PCI/picebus-howto PCI/pciebus-howto +RAS/address-translation admin-guide/RAS/address-translation +RAS/error-decoding admin-guide/RAS/error-decoding +RAS/ras admin-guide/RAS/error-decoding +accelerators/ocxl userspace-api/accelerators/ocxl +admin-guide/gpio/sysfs userspace-api/gpio/sysfs +admin-guide/l1tf admin-guide/hw-vuln/l1tf +admin-guide/media/v4l-with-ir admin-guide/media/remote-controller +admin-guide/ras admin-guide/RAS/main +admin-guide/security-bugs process/security-bugs +aoe/aoe admin-guide/aoe/aoe +aoe/examples admin-guide/aoe/examples +aoe/index admin-guide/aoe/index +aoe/todo admin-guide/aoe/todo +arc/arc arch/arc/arc +arc/features arch/arc/features +arc/index arch/arc/index +arch/x86/resctrl filesystems/resctrl +arm/arm arch/arm/arm +arm/booting arch/arm/booting +arm/cluster-pm-race-avoidance arch/arm/cluster-pm-race-avoidance +arm/features arch/arm/features +arm/firmware arch/arm/firmware +arm/google/chromebook-boot-flow arch/arm/google/chromebook-boot-flow +arm/index arch/arm/index +arm/interrupts arch/arm/interrupts +arm/ixp4xx arch/arm/ixp4xx +arm/kernel_mode_neon arch/arm/kernel_mode_neon +arm/kernel_user_helpers arch/arm/kernel_user_helpers +arm/keystone/knav-qmss arch/arm/keystone/knav-qmss +arm/keystone/overview arch/arm/keystone/overview +arm/marvel arch/arm/marvell +arm/marvell arch/arm/marvell +arm/mem_alignment arch/arm/mem_alignment +arm/memory arch/arm/memory +arm/microchip arch/arm/microchip +arm/netwinder arch/arm/netwinder +arm/nwfpe/index arch/arm/nwfpe/index +arm/nwfpe/netwinder-fpe arch/arm/nwfpe/netwinder-fpe +arm/nwfpe/notes arch/arm/nwfpe/notes +arm/nwfpe/nwfpe arch/arm/nwfpe/nwfpe +arm/nwfpe/todo arch/arm/nwfpe/todo +arm/omap/dss arch/arm/omap/dss +arm/omap/index arch/arm/omap/index +arm/omap/omap arch/arm/omap/omap +arm/omap/omap_pm arch/arm/omap/omap_pm +arm/porting arch/arm/porting +arm/pxa/mfp arch/arm/pxa/mfp +arm/sa1100/assabet arch/arm/sa1100/assabet +arm/sa1100/cerf arch/arm/sa1100/cerf +arm/sa1100/index arch/arm/sa1100/index +arm/sa1100/lart arch/arm/sa1100/lart +arm/sa1100/serial_uart arch/arm/sa1100/serial_uart +arm/samsung/bootloader-interface arch/arm/samsung/bootloader-interface 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userspace-api/media/rc/lirc-read +media/uapi/rc/lirc-set-measure-carrier-mode userspace-api/media/rc/lirc-set-measure-carrier-mode +media/uapi/rc/lirc-set-rec-carrier userspace-api/media/rc/lirc-set-rec-carrier +media/uapi/rc/lirc-set-rec-carrier-range userspace-api/media/rc/lirc-set-rec-carrier-range +media/uapi/rc/lirc-set-rec-timeout userspace-api/media/rc/lirc-set-rec-timeout +media/uapi/rc/lirc-set-send-carrier userspace-api/media/rc/lirc-set-send-carrier +media/uapi/rc/lirc-set-send-duty-cycle userspace-api/media/rc/lirc-set-send-duty-cycle +media/uapi/rc/lirc-set-transmitter-mask userspace-api/media/rc/lirc-set-transmitter-mask +media/uapi/rc/lirc-set-wideband-receiver userspace-api/media/rc/lirc-set-wideband-receiver +media/uapi/rc/lirc-write userspace-api/media/rc/lirc-write +media/uapi/rc/rc-intro userspace-api/media/rc/rc-intro +media/uapi/rc/rc-protos userspace-api/media/rc/rc-protos +media/uapi/rc/rc-sysfs-nodes userspace-api/media/rc/rc-sysfs-nodes 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arch/powerpc/pmu-ebb +powerpc/ptrace arch/powerpc/ptrace +powerpc/qe_firmware arch/powerpc/qe_firmware +powerpc/syscall64-abi arch/powerpc/syscall64-abi +powerpc/transactional_memory arch/powerpc/transactional_memory +powerpc/ultravisor arch/powerpc/ultravisor +powerpc/vas-api arch/powerpc/vas-api +powerpc/vcpudispatch_stats arch/powerpc/vcpudispatch_stats +powerpc/vmemmap_dedup arch/powerpc/vmemmap_dedup +process/clang-format dev-tools/clang-format +process/magic-number staging/magic-number +process/unaligned-memory-access core-api/unaligned-memory-access +rapidio/index driver-api/rapidio/index +rapidio/mport_cdev driver-api/rapidio/mport_cdev +rapidio/rapidio driver-api/rapidio/rapidio +rapidio/rio_cm driver-api/rapidio/rio_cm +rapidio/sysfs driver-api/rapidio/sysfs +rapidio/tsi721 driver-api/rapidio/tsi721 +riscv/acpi arch/riscv/acpi +riscv/boot arch/riscv/boot +riscv/boot-image-header arch/riscv/boot-image-header +riscv/features arch/riscv/features +riscv/hwprobe arch/riscv/hwprobe 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admin-guide/thermal/intel_powerclamp +thermal/nouveau_thermal driver-api/thermal/nouveau_thermal +thermal/power_allocator driver-api/thermal/power_allocator +thermal/sysfs-api driver-api/thermal/sysfs-api +thermal/x86_pkg_temperature_thermal driver-api/thermal/x86_pkg_temperature_thermal +tpm/index security/tpm/index +tpm/tpm_vtpm_proxy security/tpm/tpm_vtpm_proxy +trace/coresight trace/coresight/coresight +trace/coresight-cpu-debug trace/coresight/coresight-cpu-debug +trace/rv/da_monitor_synthesis trace/rv/monitor_synthesis +translations/it_IT/admin-guide/security-bugs translations/it_IT/process/security-bugs +translations/it_IT/process/clang-format translations/it_IT/dev-tools/clang-format +translations/it_IT/process/magic-number translations/it_IT/staging/magic-number +translations/it_IT/riscv/patch-acceptance translations/it_IT/arch/riscv/patch-acceptance +translations/ja_JP/howto translations/ja_JP/process/howto +translations/ko_KR/howto translations/ko_KR/process/howto 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+userspace-api/media/v4l/pixfmt-meta-uvc userspace-api/media/v4l/metafmt-uvc +userspace-api/media/v4l/pixfmt-meta-vivid userspace-api/media/v4l/metafmt-vivid +userspace-api/media/v4l/pixfmt-meta-vsp1-hgo userspace-api/media/v4l/metafmt-vsp1-hgo +userspace-api/media/v4l/pixfmt-meta-vsp1-hgt userspace-api/media/v4l/metafmt-vsp1-hgt +virt/coco/sevguest virt/coco/sev-guest +virt/kvm/amd-memory-encryption virt/kvm/x86/amd-memory-encryption +virt/kvm/arm/psci virt/kvm/arm/fw-pseudo-registers +virt/kvm/cpuid virt/kvm/x86/cpuid +virt/kvm/hypercalls virt/kvm/x86/hypercalls +virt/kvm/mmu virt/kvm/x86/mmu +virt/kvm/msr virt/kvm/x86/msr +virt/kvm/nested-vmx virt/kvm/x86/nested-vmx +virt/kvm/running-nested-guests virt/kvm/x86/running-nested-guests +virt/kvm/s390-diag virt/kvm/s390/s390-diag +virt/kvm/s390-pv virt/kvm/s390/s390-pv +virt/kvm/s390-pv-boot virt/kvm/s390/s390-pv-boot +virt/kvm/timekeeping virt/kvm/x86/timekeeping +virt/kvm/x86/halt-polling virt/kvm/halt-polling +virtual/index virt/index +virtual/kvm/amd-memory-encryption virt/kvm/x86/amd-memory-encryption +virtual/kvm/cpuid virt/kvm/x86/cpuid +virtual/kvm/index virt/kvm/index +virtual/kvm/vcpu-requests virt/kvm/vcpu-requests +virtual/paravirt_ops virt/paravirt_ops +vm/active_mm mm/active_mm +vm/arch_pgtable_helpers mm/arch_pgtable_helpers +vm/balance mm/balance +vm/bootmem mm/bootmem +vm/damon/api mm/damon/api +vm/damon/design mm/damon/design +vm/damon/faq mm/damon/faq +vm/damon/index mm/damon/index +vm/free_page_reporting mm/free_page_reporting +vm/highmem mm/highmem +vm/hmm mm/hmm +vm/hugetlbfs_reserv mm/hugetlbfs_reserv +vm/hugetlbpage admin-guide/mm/hugetlbpage +vm/hwpoison mm/hwpoison +vm/idle_page_tracking admin-guide/mm/idle_page_tracking +vm/index mm/index +vm/ksm mm/ksm +vm/memory-model mm/memory-model +vm/mmu_notifier mm/mmu_notifier +vm/numa mm/numa +vm/numa_memory_policy admin-guide/mm/numa_memory_policy +vm/oom mm/oom +vm/overcommit-accounting mm/overcommit-accounting +vm/page_allocation mm/page_allocation +vm/page_cache mm/page_cache +vm/page_frags mm/page_frags +vm/page_migration mm/page_migration +vm/page_owner mm/page_owner +vm/page_reclaim mm/page_reclaim +vm/page_table_check mm/page_table_check +vm/page_tables mm/page_tables +vm/pagemap admin-guide/mm/pagemap +vm/physical_memory mm/physical_memory +vm/process_addrs mm/process_addrs +vm/remap_file_pages mm/remap_file_pages +vm/shmfs mm/shmfs +vm/slab mm/slab +vm/slub admin-guide/mm/slab +vm/soft-dirty admin-guide/mm/soft-dirty +vm/split_page_table_lock mm/split_page_table_lock +vm/swap mm/swap +vm/swap_numa admin-guide/mm/swap_numa +vm/transhuge mm/transhuge +vm/unevictable-lru mm/unevictable-lru +vm/userfaultfd admin-guide/mm/userfaultfd +vm/vmalloc mm/vmalloc +vm/vmalloced-kernel-stacks mm/vmalloced-kernel-stacks +vm/vmemmap_dedup mm/vmemmap_dedup +vm/zsmalloc mm/zsmalloc +vm/zswap admin-guide/mm/zswap +watch_queue core-api/watch_queue +x86/amd-memory-encryption arch/x86/amd-memory-encryption +x86/amd_hsmp arch/x86/amd_hsmp +x86/boot arch/x86/boot +x86/booting-dt arch/x86/booting-dt +x86/buslock arch/x86/buslock +x86/cpuinfo arch/x86/cpuinfo +x86/earlyprintk arch/x86/earlyprintk +x86/elf_auxvec arch/x86/elf_auxvec +x86/entry_64 arch/x86/entry_64 +x86/exception-tables arch/x86/exception-tables +x86/features arch/x86/features +x86/i386/IO-APIC arch/x86/i386/IO-APIC +x86/i386/index arch/x86/i386/index +x86/ifs arch/x86/ifs +x86/index arch/x86/index +x86/intel-hfi arch/x86/intel-hfi +x86/intel_txt arch/x86/intel_txt +x86/iommu arch/x86/iommu +x86/kernel-stacks arch/x86/kernel-stacks +x86/mds arch/x86/mds +x86/microcode arch/x86/microcode +x86/mtrr arch/x86/mtrr +x86/orc-unwinder arch/x86/orc-unwinder +x86/pat arch/x86/pat +x86/protection-keys core-api/protection-keys +x86/pti arch/x86/pti +x86/resctrl filesystems/resctrl +x86/resctrl_ui filesystems/resctrl +x86/sgx arch/x86/sgx +x86/sva arch/x86/sva +x86/tdx arch/x86/tdx +x86/tlb arch/x86/tlb +x86/topology arch/x86/topology +x86/tsx_async_abort arch/x86/tsx_async_abort +x86/usb-legacy-support arch/x86/usb-legacy-support +x86/x86_64/5level-paging arch/x86/x86_64/5level-paging +x86/x86_64/cpu-hotplug-spec arch/x86/x86_64/cpu-hotplug-spec +x86/x86_64/fake-numa-for-cpusets arch/x86/x86_64/fake-numa-for-cpusets +x86/x86_64/fsgs arch/x86/x86_64/fsgs +x86/x86_64/index arch/x86/x86_64/index +x86/x86_64/machinecheck arch/x86/x86_64/machinecheck +x86/x86_64/mm arch/x86/x86_64/mm +x86/x86_64/uefi arch/x86/x86_64/uefi +x86/xstate arch/x86/xstate +x86/zero-page arch/x86/zero-page +xilinx/eemi driver-api/xilinx/eemi +xilinx/index driver-api/xilinx/index +xtensa/atomctl arch/xtensa/atomctl +xtensa/booting arch/xtensa/booting +xtensa/features arch/xtensa/features +xtensa/index arch/xtensa/index +xtensa/mmu arch/xtensa/mmu -- cgit v1.2.3 From f2c2f6490085e29521f87d5464b2cdceff0f0c7a Mon Sep 17 00:00:00 2001 From: Vegard Nossum Date: Fri, 5 Sep 2025 16:46:08 +0200 Subject: docs: add tools/docs/gen-redirects.py Add a new script and a new documentation 'make' target, htmldocs-redirects. This will generate HTML stub files in the HTML documentation output directory that redirect the browser to the new path. Suggested-by: Konstantin Ryabitsev Suggested-by: Jonathan Corbet Signed-off-by: Vegard Nossum Signed-off-by: Jonathan Corbet Message-ID: <20250905144608.577449-4-vegard.nossum@oracle.com> --- Documentation/Makefile | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/Makefile b/Documentation/Makefile index 5c20c68be89a..3609cb86137b 100644 --- a/Documentation/Makefile +++ b/Documentation/Makefile @@ -108,6 +108,9 @@ htmldocs: @$(srctree)/scripts/sphinx-pre-install --version-check @+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,html,$(var),,$(var))) +htmldocs-redirects: $(srctree)/Documentation/.renames.txt + @tools/docs/gen-redirects.py --output $(BUILDDIR) < $< + # If Rust support is available and .config exists, add rustdoc generated contents. # If there are any, the errors from this make rustdoc will be displayed but # won't stop the execution of htmldocs @@ -175,6 +178,7 @@ cleandocs: dochelp: @echo ' Linux kernel internal documentation in different formats from ReST:' @echo ' htmldocs - HTML' + @echo ' htmldocs-redirects - generate HTML redirects for moved pages' @echo ' texinfodocs - Texinfo' @echo ' infodocs - Info' @echo ' latexdocs - LaTeX' -- cgit v1.2.3 From dc896f853e1ae4523a6a45947c8ee89f46b8c93b Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Thu, 4 Sep 2025 07:45:33 -0700 Subject: docs: submitting-patches: adjust Fixes definition slightly Every now and then people send stylistic patches and use Fixes purely to refer to a commit which added the ugly or unnecessary code. Reword the docs about Fixes. It should hopefully be enough to lead with the word "bug" rather than "issue". We can add more verbiage later, tho, let's try the word swap first. I always feel like the more words the smaller the chance someone will actually read the docs. Signed-off-by: Jakub Kicinski Signed-off-by: Jonathan Corbet Message-ID: <20250904144533.2146576-1-kuba@kernel.org> --- Documentation/process/submitting-patches.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/process/submitting-patches.rst b/Documentation/process/submitting-patches.rst index cede4e7b29af..5778cb9701e1 100644 --- a/Documentation/process/submitting-patches.rst +++ b/Documentation/process/submitting-patches.rst @@ -602,8 +602,8 @@ future. Note, this is one of only three tags you might be able to use without explicit permission of the person named (see 'Tagging people requires permission' below for details). -A Fixes: tag indicates that the patch fixes an issue in a previous commit. It -is used to make it easy to determine where a bug originated, which can help +A Fixes: tag indicates that the patch fixes a bug in a previous commit. It +is used to make it easy to determine where an issue originated, which can help review a bug fix. This tag also assists the stable kernel team in determining which stable kernel versions should receive your fix. This is the preferred method for indicating a bug fixed by the patch. See :ref:`describe_changes` -- cgit v1.2.3 From f44a29784f685804d9970cfb0d3439c9e30981d7 Mon Sep 17 00:00:00 2001 From: Konstantin Ryabitsev Date: Tue, 2 Sep 2025 11:44:19 -0400 Subject: Documentation: update maintainer-pgp-guide for latest best practices Freshen up the maintainer PGP guide: - Bump minimum GnuPG version requirement from 2.2 to 2.4, since 2.2 is no longer maintained - All major hardware tokens now support Curve25519, so remove outdated ECC support callouts - Update hardware device recommendations (Nitrokey Pro 2 -> Nitrokey 3) - Broaden backup media terminology (USB thumb drive -> external media) - Update wording to follow vale's linter recommendations - Various minor wording improvements for clarity Signed-off-by: Konstantin Ryabitsev Reviewed-by: Paul Barker Signed-off-by: Jonathan Corbet Message-ID: <20250902-pgp-guide-updates-v1-1-62ac7312d3f9@linuxfoundation.org> --- Documentation/process/maintainer-pgp-guide.rst | 158 ++++++++++++------------- 1 file changed, 75 insertions(+), 83 deletions(-) (limited to 'Documentation') diff --git a/Documentation/process/maintainer-pgp-guide.rst b/Documentation/process/maintainer-pgp-guide.rst index f5277993b195..b6919bf606c3 100644 --- a/Documentation/process/maintainer-pgp-guide.rst +++ b/Documentation/process/maintainer-pgp-guide.rst @@ -49,7 +49,7 @@ hosting infrastructure, regardless of how good the security practices for the latter may be. The above guiding principle is the reason why this guide is needed. We -want to make sure that by placing trust into developers we do not simply +want to make sure that by placing trust into developers we do not merely shift the blame for potential future security incidents to someone else. The goal is to provide a set of guidelines developers can use to create a secure working environment and safeguard the PGP keys used to @@ -60,7 +60,7 @@ establish the integrity of the Linux kernel itself. PGP tools ========= -Use GnuPG 2.2 or later +Use GnuPG 2.4 or later ---------------------- Your distro should already have GnuPG installed by default, you just @@ -69,9 +69,9 @@ To check, run:: $ gpg --version | head -n1 -If you have version 2.2 or above, then you are good to go. If you have a -version that is prior than 2.2, then some commands from this guide may -not work. +If you have version 2.4 or above, then you are good to go. If you have +an earlier version, then you are using a release of GnuPG that is no +longer maintained and some commands from this guide may not work. Configure gpg-agent options ~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -199,13 +199,6 @@ separate signing subkey:: $ gpg --quick-addkey [fpr] ed25519 sign -.. note:: ECC support in GnuPG - - Note, that if you intend to use a hardware token that does not - support ED25519 ECC keys, you should choose "nistp256" instead or - "ed25519." See the section below on recommended hardware devices. - - Back up your Certify key for disaster recovery ---------------------------------------------- @@ -213,7 +206,7 @@ The more signatures you have on your PGP key from other developers, the more reasons you have to create a backup version that lives on something other than digital media, for disaster recovery reasons. -The best way to create a printable hardcopy of your private key is by +A good way to create a printable hardcopy of your private key is by using the ``paperkey`` software written for this very purpose. See ``man paperkey`` for more details on the output format and its benefits over other solutions. Paperkey should already be packaged for most @@ -224,11 +217,11 @@ key:: $ gpg --export-secret-key [fpr] | paperkey -o /tmp/key-backup.txt -Print out that file (or pipe the output straight to lpr), then take a -pen and write your passphrase on the margin of the paper. **This is -strongly recommended** because the key printout is still encrypted with -that passphrase, and if you ever change it you will not remember what it -used to be when you had created the backup -- *guaranteed*. +Print out that file, then take a pen and write your passphrase on the +margin of the paper. **This is strongly recommended** because the key +printout is still encrypted with that passphrase, and if you ever change +it you will not remember what it used to be when you had created the +backup -- *guaranteed*. Put the resulting printout and the hand-written passphrase into an envelope and store in a secure and well-protected place, preferably away from your @@ -236,10 +229,9 @@ home, such as your bank vault. .. note:: - Your printer is probably no longer a simple dumb device connected to - your parallel port, but since the output is still encrypted with - your passphrase, printing out even to "cloud-integrated" modern - printers should remain a relatively safe operation. + The key is still encrypted with your passphrase, so printing out + even to "cloud-integrated" modern printers should remain a + relatively safe operation. Back up your whole GnuPG directory ---------------------------------- @@ -255,16 +247,17 @@ on these external copies whenever you need to use your Certify key -- such as when making changes to your own key or signing other people's keys after conferences and summits. -Start by getting a small USB "thumb" drive (preferably two!) that you -will use for backup purposes. You will need to encrypt them using LUKS --- refer to your distro's documentation on how to accomplish this. +Start by getting an external media card (preferably two!) that you will +use for backup purposes. You will need to create an encrypted partition +on this device using LUKS -- refer to your distro's documentation on how +to accomplish this. For the encryption passphrase, you can use the same one as on your PGP key. -Once the encryption process is over, re-insert the USB drive and make -sure it gets properly mounted. Copy your entire ``.gnupg`` directory -over to the encrypted storage:: +Once the encryption process is over, re-insert your device and make sure +it gets properly mounted. Copy your entire ``.gnupg`` directory over to +the encrypted storage:: $ cp -a ~/.gnupg /media/disk/foo/gnupg-backup @@ -273,11 +266,10 @@ You should now test to make sure everything still works:: $ gpg --homedir=/media/disk/foo/gnupg-backup --list-key [fpr] If you don't get any errors, then you should be good to go. Unmount the -USB drive, distinctly label it so you don't blow it away next time you -need to use a random USB drive, and put in a safe place -- but not too -far away, because you'll need to use it every now and again for things -like editing identities, adding or revoking subkeys, or signing other -people's keys. +device, distinctly label it so you don't overwrite it by accident, and +put in a safe place -- but not too far away, because you'll need to use +it every now and again for things like editing identities, adding or +revoking subkeys, or signing other people's keys. Remove the Certify key from your homedir ---------------------------------------- @@ -303,7 +295,7 @@ and store it on offline storage. your GnuPG directory in its entirety. What we are about to do will render your key useless if you do not have a usable backup! -First, identify the keygrip of your Certify key:: +First, identify the "keygrip" of your Certify key:: $ gpg --with-keygrip --list-key [fpr] @@ -328,8 +320,8 @@ Certify key fingerprint). This will correspond directly to a file in your 2222000000000000000000000000000000000000.key 3333000000000000000000000000000000000000.key -All you have to do is simply remove the .key file that corresponds to -the Certify key keygrip:: +It is sufficient to remove the .key file that corresponds to the Certify +key keygrip:: $ cd ~/.gnupg/private-keys-v1.d $ rm 1111000000000000000000000000000000000000.key @@ -372,7 +364,7 @@ GnuPG operation is performed, the keys are loaded into system memory and can be stolen from there by sufficiently advanced malware (think Meltdown and Spectre). -The best way to completely protect your keys is to move them to a +A good way to completely protect your keys is to move them to a specialized hardware device that is capable of smartcard operations. The benefits of smartcards @@ -383,11 +375,11 @@ private keys and performing crypto operations directly on the card itself. Because the key contents never leave the smartcard, the operating system of the computer into which you plug in the hardware device is not able to retrieve the private keys themselves. This is very -different from the encrypted USB storage device we used earlier for -backup purposes -- while that USB device is plugged in and mounted, the +different from the encrypted media storage device we used earlier for +backup purposes -- while that device is plugged in and mounted, the operating system is able to access the private key contents. -Using external encrypted USB media is not a substitute to having a +Using external encrypted media is not a substitute to having a smartcard-capable device. Available smartcard devices @@ -398,17 +390,15 @@ easiest is to get a specialized USB device that implements smartcard functionality. There are several options available: - `Nitrokey Start`_: Open hardware and Free Software, based on FSI - Japan's `Gnuk`_. One of the few available commercial devices that - support ED25519 ECC keys, but offer fewest security features (such as - resistance to tampering or some side-channel attacks). -- `Nitrokey Pro 2`_: Similar to the Nitrokey Start, but more - tamper-resistant and offers more security features. Pro 2 supports ECC - cryptography (NISTP). + Japan's `Gnuk`_. One of the cheapest options, but offers fewest + security features (such as resistance to tampering or some + side-channel attacks). +- `Nitrokey 3`_: Similar to the Nitrokey Start, but more + tamper-resistant and offers more security features and USB + form-factors. Supports ECC cryptography (ED25519 and NISTP). - `Yubikey 5`_: proprietary hardware and software, but cheaper than - Nitrokey Pro and comes available in the USB-C form that is more useful - with newer laptops. Offers additional security features such as FIDO - U2F, among others, and now finally supports NISTP and ED25519 ECC - keys. + Nitrokey with a similar set of features. Supports ECC cryptography + (ED25519 and NISTP). Your choice will depend on cost, shipping availability in your geographical region, and open/proprietary hardware considerations. @@ -419,8 +409,8 @@ geographical region, and open/proprietary hardware considerations. you `qualify for a free Nitrokey Start`_ courtesy of The Linux Foundation. -.. _`Nitrokey Start`: https://shop.nitrokey.com/shop/product/nitrokey-start-6 -.. _`Nitrokey Pro 2`: https://shop.nitrokey.com/shop/product/nkpr2-nitrokey-pro-2-3 +.. _`Nitrokey Start`: https://www.nitrokey.com/products/nitrokeys +.. _`Nitrokey 3`: https://www.nitrokey.com/products/nitrokeys .. _`Yubikey 5`: https://www.yubico.com/products/yubikey-5-overview/ .. _Gnuk: https://www.fsij.org/doc-gnuk/ .. _`qualify for a free Nitrokey Start`: https://www.kernel.org/nitrokey-digital-tokens-for-kernel-developers.html @@ -455,7 +445,7 @@ the smartcard). You so rarely need to use the Admin PIN, that you will inevitably forget what it is if you do not record it. Getting back to the main card menu, you can also set other values (such -as name, sex, login data, etc), but it's not necessary and will +as name, gender, login data, etc), but it's not necessary and will additionally leak information about your smartcard should you lose it. .. note:: @@ -615,7 +605,7 @@ run:: You can also use a specific date if that is easier to remember (e.g. your birthday, January 1st, or Canada Day):: - $ gpg --quick-set-expire [fpr] 2025-07-01 + $ gpg --quick-set-expire [fpr] 2038-07-01 Remember to send the updated key back to keyservers:: @@ -656,9 +646,9 @@ hundreds of cloned repositories floating around, how does anyone verify that their copy of linux.git has not been tampered with by a malicious third party? -Or what happens if a backdoor is discovered in the code and the "Author" -line in the commit says it was done by you, while you're pretty sure you -had `nothing to do with it`_? +Or what happens if malicious code is discovered in the kernel and the +"Author" line in the commit says it was done by you, while you're pretty +sure you had `nothing to do with it`_? To address both of these issues, Git introduced PGP integration. Signed tags prove the repository integrity by assuring that its contents are @@ -681,8 +671,7 @@ should be used (``[fpr]`` is the fingerprint of your key):: How to work with signed tags ---------------------------- -To create a signed tag, simply pass the ``-s`` switch to the tag -command:: +To create a signed tag, pass the ``-s`` switch to the tag command:: $ git tag -s [tagname] @@ -693,7 +682,7 @@ not been maliciously altered. How to verify signed tags ~~~~~~~~~~~~~~~~~~~~~~~~~ -To verify a signed tag, simply use the ``verify-tag`` command:: +To verify a signed tag, use the ``verify-tag`` command:: $ git verify-tag [tagname] @@ -712,9 +701,9 @@ The merge message will contain something like this:: # gpg: Signature made [...] # gpg: Good signature from [...] -If you are verifying someone else's git tag, then you will need to -import their PGP key. Please refer to the -":ref:`verify_identities`" section below. +If you are verifying someone else's git tag, you will first need to +import their PGP key. Please refer to the ":ref:`verify_identities`" +section below. Configure git to always sign annotated tags ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -728,16 +717,16 @@ configuration option:: How to work with signed commits ------------------------------- -It is easy to create signed commits, but it is much more difficult to -use them in Linux kernel development, since it relies on patches sent to -the mailing list, and this workflow does not preserve PGP commit -signatures. Furthermore, when rebasing your repository to match -upstream, even your own PGP commit signatures will end up discarded. For -this reason, most kernel developers don't bother signing their commits -and will ignore signed commits in any external repositories that they -rely upon in their work. +It is also possible to create signed commits, but they have limited +usefulness in Linux kernel development. The kernel contribution workflow +relies on sending in patches, and converting commits to patches does not +preserve git commit signatures. Furthermore, when rebasing your own +repository on a newer upstream, PGP commit signatures will end up +discarded. For this reason, most kernel developers don't bother signing +their commits and will ignore signed commits in any external +repositories that they rely upon in their work. -However, if you have your working git tree publicly available at some +That said, if you have your working git tree publicly available at some git hosting service (kernel.org, infradead.org, ozlabs.org, or others), then the recommendation is that you sign all your git commits even if upstream developers do not directly benefit from this practice. @@ -748,7 +737,7 @@ We recommend this for the following reasons: provenance, even externally maintained trees carrying PGP commit signatures will be valuable for such purposes. 2. If you ever need to re-clone your local repository (for example, - after a disk failure), this lets you easily verify the repository + after reinstalling your system), this lets you verify the repository integrity before resuming your work. 3. If someone needs to cherry-pick your commits, this allows them to quickly verify their integrity before applying them. @@ -756,9 +745,8 @@ We recommend this for the following reasons: Creating signed commits ~~~~~~~~~~~~~~~~~~~~~~~ -To create a signed commit, you just need to pass the ``-S`` flag to the -``git commit`` command (it's capital ``-S`` due to collision with -another flag):: +To create a signed commit, pass the ``-S`` flag to the ``git commit`` +command (it's capital ``-S`` due to collision with another flag):: $ git commit -S @@ -775,7 +763,6 @@ You can tell git to always sign commits:: .. _verify_identities: - How to work with signed patches ------------------------------- @@ -793,6 +780,11 @@ headers (a-la DKIM): Installing and configuring patatt ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +.. note:: + + If you use B4 to send in your patches, patatt is already installed + and integrated into your workflow. + Patatt is packaged for many distributions already, so please check there first. You can also install it from pypi using "``pip install patatt``". @@ -835,9 +827,9 @@ encounters, for example:: How to verify kernel developer identities ========================================= -Signing tags and commits is easy, but how does one go about verifying -that the key used to sign something belongs to the actual kernel -developer and not to a malicious imposter? +Signing tags and commits is straightforward, but how does one go about +verifying that the key used to sign something belongs to the actual +kernel developer and not to a malicious imposter? Configure auto-key-retrieval using WKD and DANE ----------------------------------------------- @@ -884,7 +876,7 @@ various software makers dictating who should be your trusted certifying entity, PGP leaves this responsibility to each user. Unfortunately, very few people understand how the Web of Trust works. -While it remains an important aspect of the OpenPGP specification, +While it is still an important part of the OpenPGP specification, recent versions of GnuPG (2.2 and above) have implemented an alternative mechanism called "Trust on First Use" (TOFU). You can think of TOFU as "the SSH-like approach to trust." With SSH, the first time you connect @@ -894,8 +886,8 @@ to connect, forcing you to make a decision on whether you choose to trust the changed key or not. Similarly, the first time you import someone's PGP key, it is assumed to be valid. If at any point in the future GnuPG comes across another key with the same identity, both the -previously imported key and the new key will be marked as invalid and -you will need to manually figure out which one to keep. +previously imported key and the new key will be marked for verification +and you will need to manually figure out which one to keep. We recommend that you use the combined TOFU+PGP trust model (which is the new default in GnuPG v2). To set it, add (or modify) the -- cgit v1.2.3 From 87f8ae1d0faebbaaf163ecfd1321432d85ada178 Mon Sep 17 00:00:00 2001 From: Valentina Fernandez Date: Mon, 8 Sep 2025 12:57:28 +0100 Subject: dt-bindings: riscv: microchip: document icicle kit with production device With the introduction of the Icicle Kit using the production MPFS250T device, it's necessary to distinguish it from the engineering sample (-es) variant. Engineering samples cannot write to flash from the MSS, as noted in the PolarFire SoC FPGA ES errata. Add specific compatibles for the Icicle Kit with Production device (MPFS250T) and Icicle Kit with Engineering Sample (MPFS250T_ES). The icicle kit reference designs in the v2025.07 release include the Mi-V IHC IP v2, used to send/receive data between clusters when using Asymmetric Multiprocessing (AMP) mode. In reference design releases prior to v2025.07, the MI-V IHC subsystem was included as a proof of concept in the design prior to becoming an IP available in the Libero catalog. Among other improvements, the new Mi-V IHC IP v2 includes some changes to the register map. For this reason, make use of a new reference design compatible to denote that v2025.07 reference design releases are not backwards compatible. Signed-off-by: Valentina Fernandez Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/riscv/microchip.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml index 78ce76ae1b6d..8ddc5c02973e 100644 --- a/Documentation/devicetree/bindings/riscv/microchip.yaml +++ b/Documentation/devicetree/bindings/riscv/microchip.yaml @@ -18,10 +18,18 @@ properties: const: '/' compatible: oneOf: + - items: + - const: microchip,mpfs-icicle-prod-reference-rtl-v2507 + - const: microchip,mpfs-icicle-kit-prod + - const: microchip,mpfs-icicle-kit + - const: microchip,mpfs-prod + - const: microchip,mpfs + - items: - enum: - microchip,mpfs-icicle-reference-rtlv2203 - microchip,mpfs-icicle-reference-rtlv2210 + - microchip,mpfs-icicle-es-reference-rtl-v2507 - const: microchip,mpfs-icicle-kit - const: microchip,mpfs -- cgit v1.2.3 From d6d9d9be2aa407c10911967a3115654b21a5c23d Mon Sep 17 00:00:00 2001 From: Valentina Fernandez Date: Mon, 8 Sep 2025 12:57:31 +0100 Subject: dt-bindings: riscv: microchip: document Discovery Kit The Discovery Kit (MPFS-DISCO-KIT) is a development board featuring a Microchip PolarFire SoC MPFS095T. Link: https://www.microchip.com/en-us/development-tool/mpfs-disco-kit Signed-off-by: Valentina Fernandez Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/riscv/microchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml index 8ddc5c02973e..381d6eb6672e 100644 --- a/Documentation/devicetree/bindings/riscv/microchip.yaml +++ b/Documentation/devicetree/bindings/riscv/microchip.yaml @@ -33,6 +33,11 @@ properties: - const: microchip,mpfs-icicle-kit - const: microchip,mpfs + - items: + - const: microchip,mpfs-disco-kit-reference-rtl-v2507 + - const: microchip,mpfs-disco-kit + - const: microchip,mpfs + - items: - enum: - aldec,tysom-m-mpfs250t-rev2 -- cgit v1.2.3 From 3ef9c995fa51a90b08b0cc8d2951acb53c38936c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 4 Sep 2025 16:24:01 +0200 Subject: docs: dt: writing-schema: Describe defining properties in top-level Document established Devicetree bindings maintainers review practice: Properties having differences per each device in the binding, e.g. different constraints for lists or different allowed values, should still be defined in top-level 'properties' section and only customized in 'if:then:'. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250904142400.179955-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/writing-schema.rst | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/writing-schema.rst b/Documentation/devicetree/bindings/writing-schema.rst index fcd4726f8df4..05c34248e544 100644 --- a/Documentation/devicetree/bindings/writing-schema.rst +++ b/Documentation/devicetree/bindings/writing-schema.rst @@ -165,6 +165,14 @@ The YAML Devicetree format also makes all string values an array and scalar values a matrix (in order to define groupings) even when only a single value is present. Single entries in schemas are fixed up to match this encoding. +When bindings cover multiple similar devices that differ in some properties, +those properties should be constrained for each device. This usually means: + + * In top level 'properties' define the property with the broadest constraints. + * In 'if:then:' blocks, further narrow the constraints for those properties. + * Do not define the properties within an 'if:then:' block (note that + 'additionalItems' also won't allow that). + Coding style ------------ -- cgit v1.2.3 From b132e9745e8cd5d383253dc3f21775d6cdea1fd8 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sun, 7 Sep 2025 00:48:52 +0300 Subject: dt-bindings: dp-connector: describe separate DP and AUX lines In some cases it's reasonable to describe DP lanes and AUX signal lines separately in the DT. One of the typical reasons is if the source of DP signals can support either USB-C or DP connections. In such a case the transmitter of DP signals have separate ports: one for SS lanes and another one for SBU / AUX signals. Instead of leaving AUX signals from the controller unconnected, add an option to the DT schema to AUX signal lines separately from the main link lanes. Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20250907-dp-conenctor-sbu-v1-1-de79c0fcd64d@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) --- .../bindings/display/connector/dp-connector.yaml | 52 +++++++++++++++++++++- 1 file changed, 51 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/connector/dp-connector.yaml b/Documentation/devicetree/bindings/display/connector/dp-connector.yaml index 22792a79e7ce..1f2b449dc910 100644 --- a/Documentation/devicetree/bindings/display/connector/dp-connector.yaml +++ b/Documentation/devicetree/bindings/display/connector/dp-connector.yaml @@ -31,10 +31,32 @@ properties: $ref: /schemas/graph.yaml#/properties/port description: Connection to controller providing DP signals + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: OF graph representation of signales routed to DP connector + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Connection to controller providing DP signals + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Connection to controller providing AUX signals + + required: + - port@0 + - port@1 + required: - compatible - type - - port + +oneOf: + - required: + - port + - required: + - ports additionalProperties: false @@ -52,4 +74,32 @@ examples: }; }; + - | + /* DP connecttor being driven by the USB+DP combo PHY */ + connector { + compatible = "dp-connector"; + label = "dp0"; + type = "full-size"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + endpoint { + remote-endpoint = <&phy_ss_out>; + }; + }; + + port@1 { + reg = <1>; + + endpoint { + remote-endpoint = <&phy_sbu_out>; + }; + }; + }; + }; ... -- cgit v1.2.3 From 30549eebc4d84f844c62965f2e1d362bc1accdce Mon Sep 17 00:00:00 2001 From: Geliang Tang Date: Sun, 7 Sep 2025 17:32:42 +0200 Subject: mptcp: make ADD_ADDR retransmission timeout adaptive Currently the ADD_ADDR option is retransmitted with a fixed timeout. This patch makes the retransmission timeout adaptive by using the maximum RTO among all the subflows, while still capping it at the configured maximum value (add_addr_timeout_max). This improves responsiveness when establishing new subflows. Specifically: 1. Adds mptcp_adjust_add_addr_timeout() helper to compute the adaptive timeout. 2. Uses maximum subflow RTO (icsk_rto) when available. 3. Applies exponential backoff based on retransmission count. 4. Maintains fallback to configured max timeout when no RTO data exists. This slightly changes the behaviour of the MPTCP "add_addr_timeout" sysctl knob to be used as a maximum instead of a fixed value. But this is seen as an improvement: the ADD_ADDR might be sent quicker than before to improve the overall MPTCP connection. Also, the default value is set to 2 min, which was already way too long, and caused the ADD_ADDR not to be retransmitted for connections shorter than 2 minutes. Suggested-by: Matthieu Baerts (NGI0) Closes: https://github.com/multipath-tcp/mptcp_net-next/issues/576 Reviewed-by: Christoph Paasch Signed-off-by: Geliang Tang Reviewed-by: Matthieu Baerts (NGI0) Signed-off-by: Matthieu Baerts (NGI0) Link: https://patch.msgid.link/20250907-net-next-mptcp-add_addr-retrans-adapt-v1-1-824cc805772b@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/networking/mptcp-sysctl.rst | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/mptcp-sysctl.rst b/Documentation/networking/mptcp-sysctl.rst index 1683c139821e..1eb6af26b4a7 100644 --- a/Documentation/networking/mptcp-sysctl.rst +++ b/Documentation/networking/mptcp-sysctl.rst @@ -8,9 +8,11 @@ MPTCP Sysfs variables =============================== add_addr_timeout - INTEGER (seconds) - Set the timeout after which an ADD_ADDR control message will be - resent to an MPTCP peer that has not acknowledged a previous - ADD_ADDR message. + Set the maximum value of timeout after which an ADD_ADDR control message + will be resent to an MPTCP peer that has not acknowledged a previous + ADD_ADDR message. A dynamically estimated retransmission timeout based + on the estimated connection round-trip-time is used if this value is + lower than the maximum one. Do not retransmit if set to 0. -- cgit v1.2.3 From ce0b015e2619ae64b7d33fb24a6b6cadcd70c317 Mon Sep 17 00:00:00 2001 From: Vlad Dumitrescu Date: Sat, 6 Sep 2025 18:29:43 -0700 Subject: devlink: Add 'total_vfs' generic device param NICs are typically configured with total_vfs=0, forcing users to rely on external tools to enable SR-IOV (a widely used and essential feature). Add total_vfs parameter to devlink for SR-IOV max VF configurability. Enables standard kernel tools to manage SR-IOV, addressing the need for flexible VF configuration. Signed-off-by: Vlad Dumitrescu Tested-by: Kamal Heib Reviewed-by: Jiri Pirko Signed-off-by: Saeed Mahameed Reviewed-by: Simon Horman Link: https://patch.msgid.link/20250907012953.301746-2-saeed@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/networking/devlink/devlink-params.rst | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/devlink/devlink-params.rst b/Documentation/networking/devlink/devlink-params.rst index 211b58177e12..c51da4fba7e7 100644 --- a/Documentation/networking/devlink/devlink-params.rst +++ b/Documentation/networking/devlink/devlink-params.rst @@ -143,3 +143,8 @@ own name. * - ``clock_id`` - u64 - Clock ID used by the device for registering DPLL devices and pins. + * - ``total_vfs`` + - u32 + - The max number of Virtual Functions (VFs) exposed by the PF. + after reboot/pci reset, 'sriov_totalvfs' entry under the device's sysfs + directory will report this value. -- cgit v1.2.3 From bf2da4799fdb6eb58d9c9541b7dc1096c260499d Mon Sep 17 00:00:00 2001 From: Saeed Mahameed Date: Sat, 6 Sep 2025 18:29:44 -0700 Subject: net/mlx5: Implement cqe_compress_type via devlink params Selects which algorithm should be used by the NIC in order to decide rate of CQE compression dependeng on PCIe bus conditions. Supported values: 1) balanced, merges fewer CQEs, resulting in a moderate compression ratio but maintaining a balance between bandwidth savings and performance 2) aggressive, merges more CQEs into a single entry, achieving a higher compression rate and maximizing performance, particularly under high traffic loads. Signed-off-by: Saeed Mahameed Reviewed-by: Jiri Pirko Reviewed-by: Simon Horman Link: https://patch.msgid.link/20250907012953.301746-3-saeed@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/networking/devlink/mlx5.rst | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/devlink/mlx5.rst b/Documentation/networking/devlink/mlx5.rst index 7febe0aecd53..2edc842b620d 100644 --- a/Documentation/networking/devlink/mlx5.rst +++ b/Documentation/networking/devlink/mlx5.rst @@ -117,6 +117,16 @@ parameters. - driverinit - Control the size (in packets) of the hairpin queues. + * - ``cqe_compress_type`` + - string + - permanent + - Configure which mechanism/algorithm should be used by the NIC that will + affect the rate (aggressiveness) of compressed CQEs depending on PCIe bus + conditions and other internal NIC factors. This mode affects all queues + that enable compression. + * ``balanced`` : Merges fewer CQEs, resulting in a moderate compression ratio but maintaining a balance between bandwidth savings and performance + * ``aggressive`` : Merges more CQEs into a single entry, achieving a higher compression rate and maximizing performance, particularly under high traffic loads + The ``mlx5`` driver supports reloading via ``DEVLINK_CMD_RELOAD`` Info versions -- cgit v1.2.3 From 95a0af146dff5437acb4ea27eacc05aa22c7bb54 Mon Sep 17 00:00:00 2001 From: Vlad Dumitrescu Date: Sat, 6 Sep 2025 18:29:45 -0700 Subject: net/mlx5: Implement devlink enable_sriov parameter Example usage: devlink dev param set pci/0000:01:00.0 name enable_sriov value {true, false} cmode permanent devlink dev reload pci/0000:01:00.0 action fw_activate echo 1 >/sys/bus/pci/devices/0000:01:00.0/remove echo 1 >/sys/bus/pci/rescan grep ^ /sys/bus/pci/devices/0000:01:00.0/sriov_* Signed-off-by: Vlad Dumitrescu Tested-by: Kamal Heib Reviewed-by: Jiri Pirko Signed-off-by: Saeed Mahameed Reviewed-by: Simon Horman Link: https://patch.msgid.link/20250907012953.301746-4-saeed@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/networking/devlink/mlx5.rst | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/devlink/mlx5.rst b/Documentation/networking/devlink/mlx5.rst index 2edc842b620d..c3610f7c1d4b 100644 --- a/Documentation/networking/devlink/mlx5.rst +++ b/Documentation/networking/devlink/mlx5.rst @@ -15,23 +15,31 @@ Parameters * - Name - Mode - Validation + - Notes * - ``enable_roce`` - driverinit - - Type: Boolean - - If the device supports RoCE disablement, RoCE enablement state controls + - Boolean + - If the device supports RoCE disablement, RoCE enablement state controls device support for RoCE capability. Otherwise, the control occurs in the driver stack. When RoCE is disabled at the driver level, only raw ethernet QPs are supported. * - ``io_eq_size`` - driverinit - The range is between 64 and 4096. + - * - ``event_eq_size`` - driverinit - The range is between 64 and 4096. + - * - ``max_macs`` - driverinit - The range is between 1 and 2^31. Only power of 2 values are supported. + - + * - ``enable_sriov`` + - permanent + - Boolean + - Applies to each physical function (PF) independently, if the device + supports it. Otherwise, it applies symmetrically to all PFs. The ``mlx5`` driver also implements the following driver-specific parameters. -- cgit v1.2.3 From a4c49611cf4f7018ee80f02bded12fd4002ef95c Mon Sep 17 00:00:00 2001 From: Vlad Dumitrescu Date: Sat, 6 Sep 2025 18:29:46 -0700 Subject: net/mlx5: Implement devlink total_vfs parameter Some devices support both symmetric (same value for all PFs) and asymmetric, while others only support symmetric configuration. This implementation prefers asymmetric, since it is closer to the devlink model (per function settings), but falls back to symmetric when needed. Example usage: devlink dev param set pci/0000:01:00.0 name total_vfs value cmode permanent devlink dev reload pci/0000:01:00.0 action fw_activate echo 1 >/sys/bus/pci/devices/0000:01:00.0/remove echo 1 >/sys/bus/pci/rescan cat /sys/bus/pci/devices/0000:01:00.0/sriov_totalvfs Signed-off-by: Vlad Dumitrescu Reviewed-by: Jiri Pirko Tested-by: Kamal Heib Signed-off-by: Saeed Mahameed Reviewed-by: Simon Horman Link: https://patch.msgid.link/20250907012953.301746-5-saeed@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/networking/devlink/mlx5.rst | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/devlink/mlx5.rst b/Documentation/networking/devlink/mlx5.rst index c3610f7c1d4b..07b1424cbfbb 100644 --- a/Documentation/networking/devlink/mlx5.rst +++ b/Documentation/networking/devlink/mlx5.rst @@ -40,6 +40,28 @@ Parameters - Boolean - Applies to each physical function (PF) independently, if the device supports it. Otherwise, it applies symmetrically to all PFs. + * - ``total_vfs`` + - permanent + - The range is between 1 and a device-specific max. + - Applies to each physical function (PF) independently, if the device + supports it. Otherwise, it applies symmetrically to all PFs. + +Note: permanent parameters such as ``enable_sriov`` and ``total_vfs`` require FW reset to take effect + +.. code-block:: bash + + # setup parameters + devlink dev param set pci/0000:01:00.0 name enable_sriov value true cmode permanent + devlink dev param set pci/0000:01:00.0 name total_vfs value 8 cmode permanent + + # Fw reset + devlink dev reload pci/0000:01:00.0 action fw_activate + + # for PCI related config such as sriov PCI reset/rescan is required: + echo 1 >/sys/bus/pci/devices/0000:01:00.0/remove + echo 1 >/sys/bus/pci/rescan + grep ^ /sys/bus/pci/devices/0000:01:00.0/sriov_* + The ``mlx5`` driver also implements the following driver-specific parameters. -- cgit v1.2.3 From f4053490a6f651476124903dbe0777e3c24ac8cb Mon Sep 17 00:00:00 2001 From: Dragos Tatulea Date: Sun, 7 Sep 2025 12:39:35 +0300 Subject: net/mlx5e: Make PCIe congestion event thresholds configurable Add devlink driverinit parameters for configuring the thresholds for PCIe congestion events. These parameters are registered only when the firmware supports this feature. Update the mlx5 devlink docs as well on these new params. Signed-off-by: Dragos Tatulea Signed-off-by: Tariq Toukan Reviewed-by: Simon Horman Link: https://patch.msgid.link/1757237976-531416-2-git-send-email-tariqt@nvidia.com Signed-off-by: Jakub Kicinski --- Documentation/networking/devlink/mlx5.rst | 52 +++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/devlink/mlx5.rst b/Documentation/networking/devlink/mlx5.rst index 07b1424cbfbb..60cc9fedf1ef 100644 --- a/Documentation/networking/devlink/mlx5.rst +++ b/Documentation/networking/devlink/mlx5.rst @@ -146,6 +146,58 @@ parameters. - u32 - driverinit - Control the size (in packets) of the hairpin queues. + * - ``pcie_cong_inbound_high`` + - u16 + - driverinit + - High threshold configuration for PCIe congestion events. The firmware + will send an event once device side inbound PCIe traffic went + above the configured high threshold for a long enough period (at least + 200ms). + + See pci_bw_inbound_high ethtool stat. + + Units are 0.01 %. Accepted values are in range [0, 10000]. + pcie_cong_inbound_low < pcie_cong_inbound_high. + Default value: 9000 (Corresponds to 90%). + * - ``pcie_cong_inbound_low`` + - u16 + - driverinit + - Low threshold configuration for PCIe congestion events. The firmware + will send an event once device side inbound PCIe traffic went + below the configured low threshold, only after having been previously in + a congested state. + + See pci_bw_inbound_low ethtool stat. + + Units are 0.01 %. Accepted values are in range [0, 10000]. + pcie_cong_inbound_low < pcie_cong_inbound_high. + Default value: 7500. + * - ``pcie_cong_outbound_high`` + - u16 + - driverinit + - High threshold configuration for PCIe congestion events. The firmware + will send an event once device side outbound PCIe traffic went + above the configured high threshold for a long enough period (at least + 200ms). + + See pci_bw_outbound_high ethtool stat. + + Units are 0.01 %. Accepted values are in range [0, 10000]. + pcie_cong_outbound_low < pcie_cong_outbound_high. + Default value: 9000 (Corresponds to 90%). + * - ``pcie_cong_outbound_low`` + - u16 + - driverinit + - Low threshold configuration for PCIe congestion events. The firmware + will send an event once device side outbound PCIe traffic went + below the configured low threshold, only after having been previously in + a congested state. + + See pci_bw_outbound_low ethtool stat. + + Units are 0.01 %. Accepted values are in range [0, 10000]. + pcie_cong_outbound_low < pcie_cong_outbound_high. + Default value: 7500. * - ``cqe_compress_type`` - string -- cgit v1.2.3 From cdc492746e3f6d73a9e6a6a9962c9f1f7b7961b5 Mon Sep 17 00:00:00 2001 From: Dragos Tatulea Date: Sun, 7 Sep 2025 12:39:36 +0300 Subject: net/mlx5e: Add stale counter for PCIe congestion events This ethtool counter is meant to help with observing how many times the congestion event was triggered but on query there was no state change. This would help to indicate when a work item was scheduled to run too late and in the meantime the congestion state changed back to previous state. While at it, do a driveby typo fix in documentation for pci_bw_inbound_high. Signed-off-by: Dragos Tatulea Signed-off-by: Tariq Toukan Reviewed-by: Simon Horman Link: https://patch.msgid.link/1757237976-531416-3-git-send-email-tariqt@nvidia.com Signed-off-by: Jakub Kicinski --- .../networking/device_drivers/ethernet/mellanox/mlx5/counters.rst | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst index 754c81436408..cc498895f92e 100644 --- a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst +++ b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst @@ -1348,7 +1348,7 @@ Device Counters is in a congested state. If pci_bw_inbound_high == pci_bw_inbound_low then the device is not congested. If pci_bw_inbound_high > pci_bw_inbound_low then the device is congested. - - Tnformative + - Informative * - `pci_bw_inbound_low` - The number of times the device crossed the low inbound PCIe bandwidth @@ -1373,3 +1373,8 @@ Device Counters If pci_bw_outbound_high == pci_bw_outbound_low then the device is not congested. If pci_bw_outbound_high > pci_bw_outbound_low then the device is congested. - Informative + + * - `pci_bw_stale_event` + - The number of times the device fired a PCIe congestion event but on query + there was no change in state. + - Informative -- cgit v1.2.3 From 2f572b0def6e90e4a6cf90f3a8cb11d4def7b637 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Fri, 18 Jul 2025 17:47:22 +0800 Subject: dt-bindings: firmware: imx95-scmi: Allow linux,code for protocol@81 BBM protocol supports a single power button, supported by driver imx-sm-bbm-key.c. By default this is KEY_POWER, but can also be overwritten using linux,code. Add a reference to this schema and add linux,code as a supported property. Reviewed-by: Rob Herring (Arm) Signed-off-by: Alexander Stein Signed-off-by: Peng Fan Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/firmware/nxp,imx95-scmi.yaml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi.yaml b/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi.yaml index 2bda2e0e1369..7a5a02da2719 100644 --- a/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi.yaml +++ b/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi.yaml @@ -24,13 +24,19 @@ properties: const: 0x80 protocol@81: - $ref: '/schemas/firmware/arm,scmi.yaml#/$defs/protocol-node' - unevaluatedProperties: false + type: object + allOf: + - $ref: '/schemas/firmware/arm,scmi.yaml#/$defs/protocol-node' + - $ref: /schemas/input/input.yaml# + additionalProperties: false properties: reg: const: 0x81 + linux,code: + default: 116 # KEY_POWER + protocol@82: description: SCMI CPU Protocol which allows an agent to start or stop a CPU. It is -- cgit v1.2.3 From 4a2bab7ccceb14b48e86794b87104248c75aa587 Mon Sep 17 00:00:00 2001 From: Binbin Zhou Date: Thu, 4 Sep 2025 21:07:08 +0800 Subject: dt-bindings: mtd: loongson,ls1b-nand-controller: Document the Loongson-2K0500 NAND controller Add new compatible for the Loongson-2K NAND controller used for Loongson-2K0500 SoC. Acked-by: Rob Herring (Arm) Signed-off-by: Binbin Zhou Signed-off-by: Miquel Raynal --- .../devicetree/bindings/mtd/loongson,ls1b-nand-controller.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mtd/loongson,ls1b-nand-controller.yaml b/Documentation/devicetree/bindings/mtd/loongson,ls1b-nand-controller.yaml index a09e92e416c4..4ec2b5d1e89d 100644 --- a/Documentation/devicetree/bindings/mtd/loongson,ls1b-nand-controller.yaml +++ b/Documentation/devicetree/bindings/mtd/loongson,ls1b-nand-controller.yaml @@ -4,13 +4,14 @@ $id: http://devicetree.org/schemas/mtd/loongson,ls1b-nand-controller.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Loongson-1 NAND Controller +title: Loongson NAND Controller maintainers: - Keguang Zhang + - Binbin Zhou description: - The Loongson-1 NAND controller abstracts all supported operations, + The Loongson NAND controller abstracts all supported operations, meaning it does not support low-level access to raw NAND flash chips. Moreover, the controller is paired with the DMA engine to perform READ and PROGRAM functions. @@ -24,6 +25,7 @@ properties: - enum: - loongson,ls1b-nand-controller - loongson,ls1c-nand-controller + - loongson,ls2k0500-nand-controller - items: - enum: - loongson,ls1a-nand-controller -- cgit v1.2.3 From 0b1ae6480c3be58ad31afe757cbf1069ae072bb1 Mon Sep 17 00:00:00 2001 From: Binbin Zhou Date: Thu, 4 Sep 2025 21:07:10 +0800 Subject: dt-bindings: mtd: loongson,ls1b-nand-controller: Document the Loongson-2K1000 NAND controller Add new compatible for the Loongson-2K NAND controller used for Loongson-2K1000 SoC. Reviewed-by: Rob Herring (Arm) Signed-off-by: Binbin Zhou Signed-off-by: Miquel Raynal --- .../mtd/loongson,ls1b-nand-controller.yaml | 50 +++++++++++++++++++++- 1 file changed, 49 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mtd/loongson,ls1b-nand-controller.yaml b/Documentation/devicetree/bindings/mtd/loongson,ls1b-nand-controller.yaml index 4ec2b5d1e89d..cf85d0cede00 100644 --- a/Documentation/devicetree/bindings/mtd/loongson,ls1b-nand-controller.yaml +++ b/Documentation/devicetree/bindings/mtd/loongson,ls1b-nand-controller.yaml @@ -26,18 +26,22 @@ properties: - loongson,ls1b-nand-controller - loongson,ls1c-nand-controller - loongson,ls2k0500-nand-controller + - loongson,ls2k1000-nand-controller - items: - enum: - loongson,ls1a-nand-controller - const: loongson,ls1b-nand-controller reg: - maxItems: 2 + minItems: 2 + maxItems: 3 reg-names: + minItems: 2 items: - const: nand - const: nand-dma + - const: dma-config dmas: maxItems: 1 @@ -54,6 +58,27 @@ required: unevaluatedProperties: false +if: + properties: + compatible: + contains: + enum: + - loongson,ls2k1000-nand-controller + +then: + properties: + reg: + minItems: 3 + reg-names: + minItems: 3 + +else: + properties: + reg: + maxItems: 2 + reg-names: + maxItems: 2 + examples: - | nand-controller@1fe78000 { @@ -72,3 +97,26 @@ examples: nand-ecc-algo = "hamming"; }; }; + + - | + nand-controller@1fe26000 { + compatible = "loongson,ls2k1000-nand-controller"; + reg = <0x1fe26000 0x24>, + <0x1fe26040 0x4>, + <0x1fe00438 0x8>; + reg-names = "nand", "nand-dma", "dma-config"; + dmas = <&apbdma0 0>; + dma-names = "rxtx"; + + #address-cells = <1>; + #size-cells = <0>; + + nand@0 { + reg = <0>; + label = "ls2k1000-nand"; + nand-use-soft-ecc-engine; + nand-ecc-algo = "bch"; + nand-ecc-strength = <8>; + nand-ecc-step-size = <512>; + }; + }; -- cgit v1.2.3 From 550faad18505aac40a1551a5b467e0a63bf2d639 Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Sat, 6 Sep 2025 15:16:52 -0500 Subject: dt-bindings: memory: tegra210: emc: Document OPP table and interconnect These are needed for dynamic frequency scaling of the EMC controller. Signed-off-by: Aaron Kling Signed-off-by: Krzysztof Kozlowski --- .../bindings/memory-controllers/nvidia,tegra210-emc.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-emc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-emc.yaml index bc8477e7ab19..4e4fb4acd7f9 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-emc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-emc.yaml @@ -33,6 +33,9 @@ properties: items: - description: EMC general interrupt + "#interconnect-cells": + const: 0 + memory-region: maxItems: 1 description: @@ -44,6 +47,11 @@ properties: description: phandle of the memory controller node + operating-points-v2: + description: + Should contain freqs and voltages and opp-supported-hw property, which + is a bitfield indicating SoC speedo ID mask. + required: - compatible - reg @@ -79,4 +87,7 @@ examples: interrupts = ; memory-region = <&emc_table>; nvidia,memory-controller = <&mc>; + operating-points-v2 = <&dvfs_opp_table>; + + #interconnect-cells = <0>; }; -- cgit v1.2.3 From 930b6fe1a50c7ba69608230322614c87ea3dd35e Mon Sep 17 00:00:00 2001 From: Mateusz Koza Date: Mon, 8 Sep 2025 15:05:35 +0200 Subject: dt-bindings: arm: mediatek: Add grinn,genio-700-sbc Add device tree bindings support for the Grinn GenioSBC-700, a single-board computer based on the MediaTek Genio 700 SoC. More details about the hardware: - https://grinn-global.com/products/grinn-geniosom-700 - https://grinn-global.com/products/grinn-genioboard-edge-ai-sbc Acked-by: Conor Dooley Signed-off-by: Mateusz Koza Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20250908130620.2309399-3-mateusz.koza@grinn-global.com Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/arm/mediatek.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 19ed9448c9c2..448241939a75 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -436,6 +436,7 @@ properties: - const: mediatek,mt8188 - items: - enum: + - grinn,genio-700-sbc - mediatek,mt8390-evk - const: mediatek,mt8390 - const: mediatek,mt8188 -- cgit v1.2.3 From 12a565af705542c4380e95f4e3a505a2c25ad754 Mon Sep 17 00:00:00 2001 From: Mateusz Koza Date: Mon, 8 Sep 2025 15:05:37 +0200 Subject: dt-bindings: arm: mediatek: Add grinn,genio-510-sbc Add device tree bindings support for the Grinn GenioSBC-510, a single-board computer based on the MediaTek Genio 510 SoC. More details about the hardware: - https://grinn-global.com/products/grinn-geniosom-510 - https://grinn-global.com/products/grinn-genioboard-edge-ai-sbc Acked-by: Conor Dooley Signed-off-by: Mateusz Koza Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20250908130620.2309399-5-mateusz.koza@grinn-global.com Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/arm/mediatek.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 448241939a75..f04277873694 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -431,6 +431,7 @@ properties: - const: mediatek,mt8365 - items: - enum: + - grinn,genio-510-sbc - mediatek,mt8370-evk - const: mediatek,mt8370 - const: mediatek,mt8188 -- cgit v1.2.3 From a75fe12fa2e2f96b619f25b8cda1fdef6d616ab1 Mon Sep 17 00:00:00 2001 From: Yu Kuai Date: Wed, 10 Sep 2025 16:04:45 +0800 Subject: blk-mq: fix stale nr_requests documentation The nr_requests documentation is still the removed single queue, remove it and update to current blk-mq. Signed-off-by: Yu Kuai Reviewed-by: Nilay Shroff Signed-off-by: Jens Axboe --- Documentation/ABI/stable/sysfs-block | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/stable/sysfs-block b/Documentation/ABI/stable/sysfs-block index 0ddffc9133d0..0ed10aeff86b 100644 --- a/Documentation/ABI/stable/sysfs-block +++ b/Documentation/ABI/stable/sysfs-block @@ -603,16 +603,10 @@ Date: July 2003 Contact: linux-block@vger.kernel.org Description: [RW] This controls how many requests may be allocated in the - block layer for read or write requests. Note that the total - allocated number may be twice this amount, since it applies only - to reads or writes (not the accumulated sum). - - To avoid priority inversion through request starvation, a - request queue maintains a separate request pool per each cgroup - when CONFIG_BLK_CGROUP is enabled, and this parameter applies to - each such per-block-cgroup request pool. IOW, if there are N - block cgroups, each request queue may have up to N request - pools, each independently regulated by nr_requests. + block layer. Noted this value only represents the quantity for a + single blk_mq_tags instance. The actual number for the entire + device depends on the hardware queue count, whether elevator is + enabled, and whether tags are shared. What: /sys/block//queue/nr_zones -- cgit v1.2.3 From 350027a3ef3f30f68a06d87e72f9bcc0dba49fb8 Mon Sep 17 00:00:00 2001 From: Nickolay Goppen Date: Mon, 8 Sep 2025 15:28:45 +0300 Subject: dt-bindings: pinctrl: qcom: Add SDM660 LPI pinctrl Add bindings for pin controller in SDM660 Low Power Audio SubSystem (LPASS). Reviewed-by: Krzysztof Kozlowski Co-developed-by: Richard Acayan Signed-off-by: Richard Acayan Signed-off-by: Nickolay Goppen Signed-off-by: Linus Walleij --- .../pinctrl/qcom,sdm660-lpass-lpi-pinctrl.yaml | 109 +++++++++++++++++++++ 1 file changed, 109 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sdm660-lpass-lpi-pinctrl.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm660-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdm660-lpass-lpi-pinctrl.yaml new file mode 100644 index 000000000000..409e5a4d4da9 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm660-lpass-lpi-pinctrl.yaml @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,sdm660-lpass-lpi-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SDM660 SoC LPASS LPI TLMM + +maintainers: + - Nickolay Goppen + +description: + Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem + (LPASS) Low Power Island (LPI) of Qualcomm SDM660 SoC. + +properties: + compatible: + const: qcom,sdm660-lpass-lpi-pinctrl + + reg: + items: + - description: LPASS LPI TLMM Control and Status registers + +patternProperties: + "-state$": + oneOf: + - $ref: "#/$defs/qcom-sdm660-lpass-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-sdm660-lpass-state" + additionalProperties: false + +$defs: + qcom-sdm660-lpass-state: + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state + unevaluatedProperties: false + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + pattern: "^gpio([0-9]|[1-2][0-9]|3[0-1])$" + + function: + enum: [ gpio, comp_rx, dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, + mclk0, pdm_tx, pdm_clk, pdm_rx, pdm_sync ] + description: + Specify the alternative function to be configured for the specified + pins. + +allOf: + - $ref: qcom,lpass-lpi-common.yaml# + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + lpi_tlmm: pinctrl@15070000 { + compatible = "qcom,sdm660-lpass-lpi-pinctrl"; + reg = <0x15070000 0x20000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&lpi_tlmm 0 0 32>; + + cdc_pdm_default: cdc-pdm-default-state { + clk-pins { + pins = "gpio18"; + function = "pdm_clk"; + drive-strength = <8>; + output-high; + }; + + sync-pins{ + pins = "gpio19"; + function = "pdm_sync"; + drive-strength = <4>; + output-high; + }; + + tx-pins { + pins = "gpio20"; + function = "pdm_tx"; + drive-strength = <8>; + }; + + rx-pins { + pins = "gpio21", "gpio23", "gpio25"; + function = "pdm_rx"; + drive-strength = <4>; + output-high; + }; + }; + + cdc_comp_default: cdc-comp-default-state { + pins = "gpio22", "gpio24"; + function = "comp_rx"; + drive-strength = <8>; + }; + }; -- cgit v1.2.3 From 7df7b728c3cff1d61253c39e38e39c33bb4e7d09 Mon Sep 17 00:00:00 2001 From: "Mario Limonciello (AMD)" Date: Mon, 11 Aug 2025 11:26:06 -0500 Subject: DRM: Add a new 'boot_display' attribute On systems with multiple GPUs there can be uncertainty which GPU is the primary one used to drive the display at bootup. In some desktop environments this can lead to increased power consumption because secondary GPUs may be used for rendering and never go to a low power state. In order to disambiguate this add a new sysfs attribute 'boot_display' that uses the output of video_is_primary_device() to populate whether the PCI device was used for driving the display. Suggested-by: Manivannan Sadhasivam Acked-by: Manivannan Sadhasivam Link: https://gitlab.freedesktop.org/xorg/lib/libpciaccess/-/issues/23 Reviewed-by: Thomas Zimmermann Link: https://lore.kernel.org/r/20250811162606.587759-5-superm1@kernel.org Signed-off-by: Mario Limonciello (AMD) --- Documentation/ABI/testing/sysfs-class-drm | 8 ++++++++ 1 file changed, 8 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-class-drm (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-class-drm b/Documentation/ABI/testing/sysfs-class-drm new file mode 100644 index 000000000000..d23fed5e29a7 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-class-drm @@ -0,0 +1,8 @@ +What: /sys/class/drm/.../boot_display +Date: January 2026 +Contact: Linux DRI developers +Description: + This file indicates that displays connected to the device were + used to display the boot sequence. If a display connected to + the device was used to display the boot sequence the file will + be present and contain "1". -- cgit v1.2.3 From a414408126d13d6d5b2d2c4e537295771cc256cb Mon Sep 17 00:00:00 2001 From: Rakuram Eswaran Date: Mon, 18 Aug 2025 23:23:34 +0530 Subject: Documentation/driver-api: Fix typo error in cxl Fixed the following typo errors intersparsed ==> interspersed in Documentation/driver-api/cxl/platform/bios-and-efi.rst Reviewed-by: Jonathan Cameron Reviewed-by: Dave Jiang Reviewed-by: Gregory Price Link: https://patch.msgid.link/20250818175335.5312-1-rakuram.e96@gmail.com Signed-off-by: Dave Jiang --- Documentation/driver-api/cxl/platform/bios-and-efi.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/platform/bios-and-efi.rst b/Documentation/driver-api/cxl/platform/bios-and-efi.rst index 645322632cc9..a9aa0ccd92af 100644 --- a/Documentation/driver-api/cxl/platform/bios-and-efi.rst +++ b/Documentation/driver-api/cxl/platform/bios-and-efi.rst @@ -202,7 +202,7 @@ future and such a configuration should be avoided. Memory Holes ------------ -If your platform includes memory holes intersparsed between your CXL memory, it +If your platform includes memory holes interspersed between your CXL memory, it is recommended to utilize multiple decoders to cover these regions of memory, rather than try to program the decoders to accept the entire range and expect Linux to manage the overlap. -- cgit v1.2.3 From cdb2511bf3925ce095c31e1647c12086d34f9cc2 Mon Sep 17 00:00:00 2001 From: Inochi Amaoto Date: Tue, 8 Jul 2025 14:30:36 +0800 Subject: dt-bindings: phy: Add Sophgo CV1800 USB phy The USB phy of Sophgo CV18XX series SoC needs to sense a pin called "VBUS_DET" to get the right operation mode. If this pin is not connected, it only supports setting the mode manually. Add USB phy bindings for Sophgo CV18XX/SG200X series SoC. Signed-off-by: Inochi Amaoto Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250708063038.497473-2-inochiama@gmail.com Signed-off-by: Vinod Koul --- .../bindings/phy/sophgo,cv1800b-usb2-phy.yaml | 54 ++++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/sophgo,cv1800b-usb2-phy.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/sophgo,cv1800b-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/sophgo,cv1800b-usb2-phy.yaml new file mode 100644 index 000000000000..2ff8f85d0282 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/sophgo,cv1800b-usb2-phy.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/sophgo,cv1800b-usb2-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo CV18XX/SG200X USB 2.0 PHY + +maintainers: + - Inochi Amaoto + +properties: + compatible: + const: sophgo,cv1800b-usb2-phy + + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + clocks: + items: + - description: PHY app clock + - description: PHY stb clock + - description: PHY lpm clock + + clock-names: + items: + - const: app + - const: stb + - const: lpm + + resets: + maxItems: 1 + +required: + - compatible + - "#phy-cells" + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + phy@48 { + compatible = "sophgo,cv1800b-usb2-phy"; + reg = <0x48 0x4>; + #phy-cells = <0>; + clocks = <&clk 93>, <&clk 94>, <&clk 95>; + clock-names = "app", "stb", "lpm"; + resets = <&rst 58>; + }; -- cgit v1.2.3 From c254815b02673cc77a84103c4c0d6197bd90c0ef Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Wed, 3 Sep 2025 19:04:50 +0200 Subject: dt-bindings: phy: rockchip-inno-csi-dphy: make power-domains non-required There are variants of the Rockchip Innosilicon CSI DPHY (e.g., the RK3568 variant) that are powered on by default as they are part of the ALIVE power domain. Remove 'power-domains' from the required properties in order to avoid false positives. Fixes: 22c8e0a69b7f ("dt-bindings: phy: add compatible for rk356x to rockchip-inno-csi-dphy") Cc: stable@kernel.org Reviewed-by: Krzysztof Kozlowski Signed-off-by: Michael Riesch Link: https://lore.kernel.org/r/20250616-rk3588-csi-dphy-v4-2-a4f340a7f0cf@collabora.com Signed-off-by: Vinod Koul --- .../devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml index 5ac994b3c0aa..b304bc5a08c4 100644 --- a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml +++ b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml @@ -57,11 +57,24 @@ required: - clocks - clock-names - '#phy-cells' - - power-domains - resets - reset-names - rockchip,grf +allOf: + - if: + properties: + compatible: + contains: + enum: + - rockchip,px30-csi-dphy + - rockchip,rk1808-csi-dphy + - rockchip,rk3326-csi-dphy + - rockchip,rk3368-csi-dphy + then: + required: + - power-domains + additionalProperties: false examples: -- cgit v1.2.3 From 5072b8e98eef4685a5a9a8bae56072cb65a2ef69 Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Wed, 3 Sep 2025 19:04:51 +0200 Subject: dt-bindings: phy: rockchip-inno-csi-dphy: add rk3588 variant The Rockchip RK3588 variant of the CSI-2 DPHY features two reset lines. Add the variant and allow for the additional reset. While at it, fix the description of the first reset in order to avoid confusion. Signed-off-by: Michael Riesch Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250616-rk3588-csi-dphy-v4-3-a4f340a7f0cf@collabora.com Signed-off-by: Vinod Koul --- .../bindings/phy/rockchip-inno-csi-dphy.yaml | 50 +++++++++++++++++++++- 1 file changed, 49 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml index b304bc5a08c4..03950b3cad08 100644 --- a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml +++ b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml @@ -21,6 +21,7 @@ properties: - rockchip,rk3326-csi-dphy - rockchip,rk3368-csi-dphy - rockchip,rk3568-csi-dphy + - rockchip,rk3588-csi-dphy reg: maxItems: 1 @@ -40,11 +41,15 @@ properties: resets: items: - - description: exclusive PHY reset line + - description: APB reset line + - description: PHY reset line + minItems: 1 reset-names: items: - const: apb + - const: phy + minItems: 1 rockchip,grf: $ref: /schemas/types.yaml#/definitions/phandle @@ -74,6 +79,30 @@ allOf: then: required: - power-domains + - if: + properties: + compatible: + contains: + enum: + - rockchip,px30-csi-dphy + - rockchip,rk1808-csi-dphy + - rockchip,rk3326-csi-dphy + - rockchip,rk3368-csi-dphy + - rockchip,rk3568-csi-dphy + then: + properties: + resets: + maxItems: 1 + + reset-names: + maxItems: 1 + else: + properties: + resets: + minItems: 2 + + reset-names: + minItems: 2 additionalProperties: false @@ -91,3 +120,22 @@ examples: reset-names = "apb"; rockchip,grf = <&grf>; }; + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + phy@fedc0000 { + compatible = "rockchip,rk3588-csi-dphy"; + reg = <0x0 0xfedc0000 0x0 0x8000>; + clocks = <&cru PCLK_CSIPHY0>; + clock-names = "pclk"; + #phy-cells = <0>; + resets = <&cru SRST_P_CSIPHY0>, <&cru SRST_CSIPHY0>; + reset-names = "apb", "phy"; + rockchip,grf = <&csidphy0_grf>; + }; + }; -- cgit v1.2.3 From 4a09265c42350e6494d793191e6dbe59a4dddbe4 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 30 Aug 2025 18:48:33 +0200 Subject: dt-bindings: iio: adc: samsung,exynos: Drop S3C2410 Samsung S3C24xx family of SoCs was removed the Linux kernel in the commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January 2023. There are no in-kernel users of remaining S3C24xx compatibles. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250830-s3c-cleanup-adc-v2-4-4f8299343d32@linaro.org Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml | 4 ---- 1 file changed, 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml index 8069e99ddac8..73d7ba0fda1d 100644 --- a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml @@ -18,10 +18,6 @@ properties: - samsung,exynos3250-adc - samsung,exynos4212-adc # Exynos4212 and Exynos4412 - samsung,exynos7-adc - - samsung,s3c2410-adc - - samsung,s3c2416-adc - - samsung,s3c2440-adc - - samsung,s3c2443-adc - samsung,s3c6410-adc - samsung,s5pv210-adc - items: -- cgit v1.2.3 From 0f2aeee58425faaa3117944711f8b41f8b42b5da Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 30 Aug 2025 18:48:34 +0200 Subject: dt-bindings: iio: adc: samsung,exynos: Drop touchscreen support With last user of touchscreen via ADC (S3C24xx SoC) gone, drop the unused has-touchscreen property and optional touchscreen interrupt for samsung,s3c6410-adc. The samsung,s5pv210-adc is the only platform having two interrupts, so add a constrain for that. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250830-s3c-cleanup-adc-v2-5-4f8299343d32@linaro.org Signed-off-by: Jonathan Cameron --- .../bindings/iio/adc/samsung,exynos-adc.yaml | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml index 73d7ba0fda1d..def879f6ed20 100644 --- a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml @@ -42,8 +42,6 @@ properties: maxItems: 2 interrupts: - description: - ADC interrupt followed by optional touchscreen interrupt. minItems: 1 maxItems: 2 @@ -58,11 +56,6 @@ properties: Phandle to the PMU system controller node (to access the ADC_PHY register on Exynos3250/4x12/5250/5420/5800). - has-touchscreen: - description: - If present, indicates that a touchscreen is connected and usable. - type: boolean - required: - compatible - reg @@ -114,13 +107,20 @@ allOf: - const: adc - if: - required: - - has-touchscreen + properties: + compatible: + contains: + const: samsung,s5pv210-adc then: properties: interrupts: - minItems: 2 - maxItems: 2 + items: + - description: main (ADC) + - description: pending (PENDN) + else: + properties: + interrupts: + maxItems: 1 examples: - | -- cgit v1.2.3 From 8efd9d976652371ada359e717e0bf72ab453a5cf Mon Sep 17 00:00:00 2001 From: Dixit Parmar Date: Sat, 6 Sep 2025 14:07:56 +0530 Subject: dt-bindings: iio: magnetometer: Infineon TLV493D 3D Magnetic sensor Document the bindings for Infineon TLV493D Low-Power 3D Magnetic Sensor controlled by I2C interface. Main applications includes joysticks, control elements (white goods, multifunction knops), or electric meters (anti- tampering). Drop duplicate entry for infineon,tlv493d from trivial-devices.yaml as its documented in this separate dt-binding file now. Datasheet: https://www.infineon.com/assets/row/public/documents/24/49/infineon-tlv493d-a1b6-datasheet-en.pdf Reviewed-by: Krzysztof Kozlowski Signed-off-by: Dixit Parmar Link: https://patch.msgid.link/20250906-tlv493d-sensor-v6_16-rc5-v6-1-b1a62d968353@gmail.com Signed-off-by: Jonathan Cameron --- .../iio/magnetometer/infineon,tlv493d-a1b6.yaml | 45 ++++++++++++++++++++++ .../devicetree/bindings/trivial-devices.yaml | 2 - 2 files changed, 45 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/iio/magnetometer/infineon,tlv493d-a1b6.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/magnetometer/infineon,tlv493d-a1b6.yaml b/Documentation/devicetree/bindings/iio/magnetometer/infineon,tlv493d-a1b6.yaml new file mode 100644 index 000000000000..dd23a9370a71 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/magnetometer/infineon,tlv493d-a1b6.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/magnetometer/infineon,tlv493d-a1b6.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Infineon Technologies TLV493D Low-Power 3D Magnetic Sensor + +maintainers: + - Dixit Parmar + +properties: + $nodename: + pattern: '^magnetometer@[0-9a-f]+$' + + compatible: + const: infineon,tlv493d-a1b6 + + reg: + maxItems: 1 + + vdd-supply: + description: 2.8V to 3.5V VDD supply + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - vdd-supply + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + magnetometer@5e { + compatible = "infineon,tlv493d-a1b6"; + reg = <0x5e>; + vdd-supply = <&hall_vcc>; + }; + }; diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index f3dd18681aa6..7656d8569766 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -133,8 +133,6 @@ properties: - infineon,ir36021 # Infineon IRPS5401 Voltage Regulator (PMIC) - infineon,irps5401 - # Infineon TLV493D-A1B6 I2C 3D Magnetic Sensor - - infineon,tlv493d-a1b6 # Infineon Hot-swap controller xdp710 - infineon,xdp710 # Infineon Multi-phase Digital VR Controller xdpe11280 -- cgit v1.2.3 From b947d4edfc4fc23a912b0ba160f8af3543b0283b Mon Sep 17 00:00:00 2001 From: Primoz Fiser Date: Fri, 5 Sep 2025 08:55:02 +0200 Subject: dt-bindings: iio: afe: current-sense-amplifier: Add io-channel-cells The current-sense-amplifier is an IIO provider thus can be referenced by IIO consumers (via "io-channels" property in consumer device node). Such provider is required to describe number of cells used in phandle lookup with "io-channel-cells" property. Signed-off-by: Primoz Fiser Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250905065503.3022107-1-primoz.fiser@norik.com Signed-off-by: Jonathan Cameron --- .../devicetree/bindings/iio/afe/current-sense-amplifier.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/afe/current-sense-amplifier.yaml b/Documentation/devicetree/bindings/iio/afe/current-sense-amplifier.yaml index 527501c1d695..bcf4ddcfd13b 100644 --- a/Documentation/devicetree/bindings/iio/afe/current-sense-amplifier.yaml +++ b/Documentation/devicetree/bindings/iio/afe/current-sense-amplifier.yaml @@ -24,6 +24,9 @@ properties: description: | Channel node of a voltage io-channel. + "#io-channel-cells": + const: 0 + sense-resistor-micro-ohms: description: The sense resistance. @@ -46,6 +49,7 @@ examples: - | sysi { compatible = "current-sense-amplifier"; + #io-channel-cells = <0>; io-channels = <&tiadc 0>; sense-resistor-micro-ohms = <20000>; -- cgit v1.2.3 From 7b69cb9a18b1ec4699b36caff44152ee673be18a Mon Sep 17 00:00:00 2001 From: Gwendal Grignou Date: Wed, 3 Sep 2025 12:01:02 -0700 Subject: Documentation: iio: Remove location attribute The cros-ec specific |location| attribute has been superseded by the generic |label| attribute. Signed-off-by: Gwendal Grignou Signed-off-by: Jonathan Cameron --- Documentation/ABI/testing/sysfs-bus-iio-cros-ec | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-bus-iio-cros-ec b/Documentation/ABI/testing/sysfs-bus-iio-cros-ec index adf24c40126f..9e3926243797 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio-cros-ec +++ b/Documentation/ABI/testing/sysfs-bus-iio-cros-ec @@ -7,16 +7,6 @@ Description: corresponding calibration offsets can be read from `*_calibbias` entries. -What: /sys/bus/iio/devices/iio:deviceX/location -Date: July 2015 -KernelVersion: 4.7 -Contact: linux-iio@vger.kernel.org -Description: - This attribute returns a string with the physical location where - the motion sensor is placed. For example, in a laptop a motion - sensor can be located on the base or on the lid. Current valid - values are 'base' and 'lid'. - What: /sys/bus/iio/devices/iio:deviceX/id Date: September 2017 KernelVersion: 4.14 -- cgit v1.2.3 From b17b850da6f9c4440a49d96cded5faa85123aadf Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Thu, 4 Sep 2025 21:46:41 +0300 Subject: dt-bindings: arm: nxp: lpc: Assign myself as maintainer of NXP LPC32xx platforms Make a formal change to reflect the actual NXP LPC32xx maintainership for the last years. Cc: Roland Stigge Acked-by: Rob Herring (Arm) Reviewed-by: Frank Li Signed-off-by: Vladimir Zapolskiy --- Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml b/Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml index f1bd6f50e726..6b7f5e6f99cf 100644 --- a/Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml +++ b/Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: NXP LPC32xx Platforms maintainers: - - Roland Stigge + - Vladimir Zapolskiy properties: compatible: -- cgit v1.2.3 From 5e38d940a36c419622286251dd0efa96956d0ed5 Mon Sep 17 00:00:00 2001 From: Ray Chang Date: Fri, 22 Aug 2025 15:33:08 +0800 Subject: dt-bindings: arm: fsl: Add EDM-G-IMX8M-PLUS SOM and WB-EDM-G carrier board Add support for TechNexion EDM-G-IMX8M-PLUS SOM and WB-EDM-G carrier board. Signed-off-by: Ray Chang Signed-off-by: Richard Hu Acked-by: Rob Herring (Arm) Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index ebafa6ecbcb6..8e48a34af890 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1201,6 +1201,13 @@ properties: - const: polyhex,imx8mp-debix-som-a # Polyhex Debix SOM A - const: fsl,imx8mp + - description: TechNexion EDM-G-IMX8M-PLUS SoM based boards + items: + - enum: + - technexion,edm-g-imx8mp-wb # TechNexion EDM-G-IMX8MP SOM on WB-EDM-G + - const: technexion,edm-g-imx8mp # TechNexion EDM-G-IMX8MP SOM + - const: fsl,imx8mp + - description: Toradex Boards with SMARC iMX8M Plus Modules items: - const: toradex,smarc-imx8mp-dev # Toradex SMARC iMX8M Plus on Toradex SMARC Development Board -- cgit v1.2.3 From 1419c28eb246e181e7b917b1b0b65282201dfc34 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 22 Aug 2025 09:02:41 -0300 Subject: dt-bindings: soc: fsl,imx-iomuxc-gpr: Document i.MX53 imx53.dtsi has the following compatible entry: compatible = "fsl,imx53-iomuxc-gpr", "syscon"; Document the "fsl,imx53-iomuxc-gpr" entry to fix the following dt-schema warning: failed to match any schema with compatible: ['fsl,imx53-iomuxc-gpr', 'syscon'] Signed-off-by: Fabio Estevam Acked-by: Conor Dooley Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml index 8451cb4dd87c..b77ce8c6a935 100644 --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml @@ -38,6 +38,7 @@ properties: - const: simple-mfd - items: - enum: + - fsl,imx53-iomuxc-gpr - fsl,imx8mm-iomuxc-gpr - fsl,imx8mn-iomuxc-gpr - fsl,imx8mp-iomuxc-gpr -- cgit v1.2.3 From 1f24a240974589ce42f70502ccb3ff3f5189d69a Mon Sep 17 00:00:00 2001 From: "Matthieu Baerts (NGI0)" Date: Tue, 9 Sep 2025 19:46:09 +0200 Subject: doc: mptcp: fix Netlink specs link The Netlink specs RST files are no longer generated inside the source tree. In other words, the path to mptcp_pm.rst has changed, and needs to be updated to the new location. Fixes: 1ce4da3dd99e ("docs: use parser_yaml extension to handle Netlink specs") Reported-by: Kory Maincent Closes: https://lore.kernel.org/20250828185037.07873d04@kmaincent-XPS-13-7390 Signed-off-by: Matthieu Baerts (NGI0) Link: https://patch.msgid.link/20250909-net-next-mptcp-pm-link-v1-1-0f1c4b8439c6@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/networking/mptcp.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/networking/mptcp.rst b/Documentation/networking/mptcp.rst index 17f2bab61164..fdc7bfd5d5c5 100644 --- a/Documentation/networking/mptcp.rst +++ b/Documentation/networking/mptcp.rst @@ -66,7 +66,7 @@ same rules are applied for all the connections (see: ``ip mptcp``) ; and the userspace one (type ``1``), controlled by a userspace daemon (i.e. `mptcpd `_) where different rules can be applied for each connection. The path managers can be controlled via a Netlink API; see -netlink_spec/mptcp_pm.rst. +../netlink/specs/mptcp_pm.rst. To be able to use multiple IP addresses on a host to create multiple *subflows* (paths), the default in-kernel MPTCP path-manager needs to know which IP -- cgit v1.2.3 From ffad4278c2ac31c91b563036121cdcf4d5dd45ec Mon Sep 17 00:00:00 2001 From: Abhijit Gangurde Date: Wed, 3 Sep 2025 11:45:53 +0530 Subject: net: ionic: Create an auxiliary device for rdma driver To support RDMA capable ethernet device, create an auxiliary device in the ionic Ethernet driver. The RDMA device is modeled as an auxiliary device to the Ethernet device. Reviewed-by: Shannon Nelson Signed-off-by: Abhijit Gangurde Link: https://patch.msgid.link/20250903061606.4139957-2-abhijit.gangurde@amd.com Signed-off-by: Leon Romanovsky --- .../networking/device_drivers/ethernet/pensando/ionic.rst | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/device_drivers/ethernet/pensando/ionic.rst b/Documentation/networking/device_drivers/ethernet/pensando/ionic.rst index 05fe2b11bb18..a0029b6db31e 100644 --- a/Documentation/networking/device_drivers/ethernet/pensando/ionic.rst +++ b/Documentation/networking/device_drivers/ethernet/pensando/ionic.rst @@ -13,6 +13,7 @@ Contents - Identifying the Adapter - Enabling the driver - Configuring the driver +- RDMA Support via Auxiliary Device - Statistics - Support @@ -105,6 +106,15 @@ XDP Support for XDP includes the basics, plus Jumbo frames, Redirect and ndo_xmit. There is no current support for zero-copy sockets or HW offload. +RDMA Support via Auxiliary Device +================================= + +The ionic driver supports RDMA (Remote Direct Memory Access) functionality +through the Linux auxiliary device framework when advertised by the firmware. +RDMA capability is detected during device initialization, and if supported, +the ethernet driver will create an auxiliary device that allows the RDMA +driver to bind and provide InfiniBand/RoCE functionality. + Statistics ========== -- cgit v1.2.3 From 6603fbf158e9a34eb0961579becee377c1efa1ee Mon Sep 17 00:00:00 2001 From: Abhijit Gangurde Date: Wed, 3 Sep 2025 11:46:06 +0530 Subject: RDMA/ionic: Add Makefile/Kconfig to kernel build environment Add ionic to the kernel build environment. Co-developed-by: Allen Hubbe Signed-off-by: Allen Hubbe Signed-off-by: Abhijit Gangurde Link: https://patch.msgid.link/20250903061606.4139957-15-abhijit.gangurde@amd.com Signed-off-by: Leon Romanovsky --- .../networking/device_drivers/ethernet/index.rst | 1 + .../ethernet/pensando/ionic_rdma.rst | 52 ++++++++++++++++++++++ 2 files changed, 53 insertions(+) create mode 100644 Documentation/networking/device_drivers/ethernet/pensando/ionic_rdma.rst (limited to 'Documentation') diff --git a/Documentation/networking/device_drivers/ethernet/index.rst b/Documentation/networking/device_drivers/ethernet/index.rst index 40ac552641a3..1fabfe02eb12 100644 --- a/Documentation/networking/device_drivers/ethernet/index.rst +++ b/Documentation/networking/device_drivers/ethernet/index.rst @@ -50,6 +50,7 @@ Contents: neterion/s2io netronome/nfp pensando/ionic + pensando/ionic_rdma smsc/smc9 stmicro/stmmac ti/cpsw diff --git a/Documentation/networking/device_drivers/ethernet/pensando/ionic_rdma.rst b/Documentation/networking/device_drivers/ethernet/pensando/ionic_rdma.rst new file mode 100644 index 000000000000..42eb461d5f85 --- /dev/null +++ b/Documentation/networking/device_drivers/ethernet/pensando/ionic_rdma.rst @@ -0,0 +1,52 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +=========================================================== +RDMA Driver for the AMD Pensando(R) Ethernet adapter family +=========================================================== + +AMD Pensando RDMA driver. +Copyright (C) 2018-2025, Advanced Micro Devices, Inc. + +Overview +======== + +The ionic_rdma driver provides Remote Direct Memory Access functionality +for AMD Pensando DSC (Distributed Services Card) devices. This driver +implements RDMA capabilities as an auxiliary driver that operates in +conjunction with the ionic ethernet driver. + +The ionic ethernet driver detects RDMA capability during device +initialization and creates auxiliary devices that the ionic_rdma driver +binds to, establishing the RDMA data path and control interfaces. + +Identifying the Adapter +======================= + +See Documentation/networking/device_drivers/ethernet/pensando/ionic.rst +for more information on identifying the adapter. + +Enabling the driver +=================== + +The ionic_rdma driver depends on the ionic ethernet driver. +See Documentation/networking/device_drivers/ethernet/pensando/ionic.rst +for detailed information on enabling and configuring the ionic driver. + +The ionic_rdma driver is enabled via the standard kernel configuration system, +using the make command:: + + make oldconfig/menuconfig/etc. + +The driver is located in the menu structure at: + + -> Device Drivers + -> InfiniBand support + -> AMD Pensando DSC RDMA/RoCE Support + +Support +======= + +For general Linux RDMA support, please use the RDMA mailing +list, which is monitored by AMD Pensando personnel:: + + linux-rdma@vger.kernel.org -- cgit v1.2.3 From 76e145f857e9dea47002f23965a21ea35caa8bbd Mon Sep 17 00:00:00 2001 From: Josua Mayer Date: Sat, 23 Aug 2025 17:28:21 +0300 Subject: dt-bindings: arm: fsl: Add bindings for SolidRun i.MX8MP SoM and boards Add bindings for SolidRun i.MX8M Plus System on Module based boards: - CuBox-M is a complete produc with enclosure including the SoM - HummingBoard Mate/Pro/Pulse/Ripple are evaluation boards with common design but different available interfaces. Signed-off-by: Josua Mayer Acked-by: Rob Herring (Arm) Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 8e48a34af890..b98efb7bf6ee 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1201,6 +1201,17 @@ properties: - const: polyhex,imx8mp-debix-som-a # Polyhex Debix SOM A - const: fsl,imx8mp + - description: SolidRun i.MX8MP SoM based boards + items: + - enum: + - solidrun,imx8mp-cubox-m # SolidRun i.MX8MP SoM on CuBox-M + - solidrun,imx8mp-hummingboard-mate # SolidRun i.MX8MP SoM on HummingBoard Mate + - solidrun,imx8mp-hummingboard-pro # SolidRun i.MX8MP SoM on HummingBoard Pro + - solidrun,imx8mp-hummingboard-pulse # SolidRun i.MX8MP SoM on HummingBoard Pulse + - solidrun,imx8mp-hummingboard-ripple # SolidRun i.MX8MP SoM on HummingBoard Ripple + - const: solidrun,imx8mp-sr-som + - const: fsl,imx8mp + - description: TechNexion EDM-G-IMX8M-PLUS SoM based boards items: - enum: -- cgit v1.2.3 From 0463d9d492dfc896f61fd6319688e02341fea772 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Wed, 27 Aug 2025 17:24:45 -0400 Subject: dt-bindings: fsl: fsl,imx7ulp-smc1: Allow clocks and clock-names Allow clocks and clock-names to match existed dts file. 'hsrun_divcore' should be 'hsrun-divcore'. But use '_' to keep old dts back compatible. Fix below CHECK_DTBS warnings: arch/arm/boot/dts/nxp/imx/imx7ulp-com.dtb: clock-controller@40410000 (fsl,imx7ulp-smc1): '#clock-cells', 'clock-names', 'clocks' do not match any of the regexes: '^pinctrl-[0-9]+$' from schema $id: http://devicetree.org/schemas/arm/freescale/fsl,imx7ulp-pm.yaml# Signed-off-by: Frank Li Acked-by: Rob Herring (Arm) Signed-off-by: Shawn Guo --- .../devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml index 3b26040f8f18..9d377e193c12 100644 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml @@ -28,6 +28,14 @@ properties: reg: maxItems: 1 + clocks: + maxItems: 2 + + clock-names: + items: + - const: divcore + - const: hsrun_divcore + required: - compatible - reg -- cgit v1.2.3 From f001225088b8736f55dd28a4616cdf1b1bdcdd2e Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 1 Sep 2025 12:04:29 +0200 Subject: dt-bindings: arm: fsl: add TQMa91xx SOM series TQMa91xx series is using NXP i.MX91 CPU on an LGA or socketable type board. MBa91xxCA is a starterkit base board for TQMa91xx on an adapter board. Reviewed-by: Frank Li Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index b98efb7bf6ee..00cdf490b062 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1451,6 +1451,24 @@ properties: - fsl,imxrt1170-evk # i.MXRT1170 EVK Board - const: fsl,imxrt1170 + - description: + TQMa91xxLA and TQMa91xxCA are two series of feature compatible SOM + using NXP i.MX91 SOC in 11x11 mm package. + TQMa91xxLA is designed to be soldered on different carrier boards. + TQMa91xxCA is a compatible variant using board to board connectors. + All SOM and CPU variants use the same device tree hence only one + compatible is needed. Bootloader disables all features not present + in the assembled SOC. + MBa91xxCA mainboard can be used as starterkit for the SOM + soldered on an adapter board or for the connector variant + MBa91xxLA mainboard is a single board computer using the solderable + SOM variant + items: + - enum: + - tq,imx91-tqma9131-mba91xxca # TQ-Systems GmbH i.MX91 TQMa91xxCA/LA SOM on MBa91xxCA + - const: tq,imx91-tqma9131 # TQ-Systems GmbH i.MX91 TQMa91xxCA/LA SOM + - const: fsl,imx91 + - description: TQMa93xxLA and TQMa93xxCA are two series of feature compatible SOM using NXP i.MX93 SOC in 11x11 mm package. -- cgit v1.2.3 From 92f96706947e902fd9156cdcdd61c9a44b4b186c Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Wed, 3 Sep 2025 19:04:49 +0200 Subject: dt-bindings: soc: rockchip: add rk3588 csidphy grf syscon Add CSIDPHY GRF syscon compatible for the Rockchip RK3588. Acked-by: "Rob Herring (Arm)" Signed-off-by: Michael Riesch Link: https://lore.kernel.org/r/20250616-rk3588-csi-dphy-v4-1-a4f340a7f0cf@collabora.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml index 1d0f35e26311..01641692418b 100644 --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml @@ -48,6 +48,7 @@ properties: - rockchip,rk3576-vop-grf - rockchip,rk3588-bigcore0-grf - rockchip,rk3588-bigcore1-grf + - rockchip,rk3588-csidphy-grf - rockchip,rk3588-dcphy-grf - rockchip,rk3588-hdptxphy-grf - rockchip,rk3588-ioc -- cgit v1.2.3 From 8c30b0018f9d93391573e091960d257fd9de120a Mon Sep 17 00:00:00 2001 From: chenmiao Date: Fri, 5 Sep 2025 18:12:58 +0000 Subject: openrisc: Add jump label support Supported a complete jump_label implementation based on the ARM64 and RV64 version and add the CONFIG_JUMP_LABEL=y to the defconfig. Testing was conducted using a dedicated test module jump-label-test, provided in the link below. For detailed steps, please refer to the README also at the provided link. Link: https://github.com/ChenMiaoi/GSoC-2025-Final-Report/tree/main/tests/jump-label-test Test Environment: - Hardware: QEMU emulated OR1K - Kernel Version: 6.17.0-rc3-dirty - Configs: CONFIG_MODULES=y,CONFIG_MODULE_UNLOAD=y - Toolchain: or1k-none-linux-musl-gcc 15.1.0 Test Results: $ insmod jump_label_test.ko [ 32.590000] Jump label performance test module loaded [ 35.250000] Normal branch time: 1241327150 ns (124 ns per iteration) [ 35.250000] Jump label (false) time: 706422700 ns (70 ns per iteration) [ 35.250000] Jump label (true) time: 708913450 ns (70 ns per iteration) $ rmmod jump_label_test.ko [ 72.210000] Jump label test module unloaded The results show approximately 43% improvement in branch performance when using jump labels compared to traditional branches. Link: https://lore.kernel.org/openrisc/aLsZ9S3X0OpKy1RM@antec/T/#u Signed-off-by: chenmiao Signed-off-by: Stafford Horne --- Documentation/features/core/jump-labels/arch-support.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/features/core/jump-labels/arch-support.txt b/Documentation/features/core/jump-labels/arch-support.txt index ccada815569f..683de7c15058 100644 --- a/Documentation/features/core/jump-labels/arch-support.txt +++ b/Documentation/features/core/jump-labels/arch-support.txt @@ -17,7 +17,7 @@ | microblaze: | TODO | | mips: | ok | | nios2: | TODO | - | openrisc: | TODO | + | openrisc: | ok | | parisc: | ok | | powerpc: | ok | | riscv: | ok | -- cgit v1.2.3 From 87c0881bd734a2cea12076716d5d9a050789d4b7 Mon Sep 17 00:00:00 2001 From: Stefan Kerkmann Date: Wed, 10 Sep 2025 11:34:05 +0200 Subject: ASoC: dt-bindings: ti,pcm1754: add binding documentation The Texas Instruments PCM1754 is a simple stereo DAC without any digital management interface but soft mute, PCM input format and 44.1 kHz digital de-emphasis can be configured via strapping pins. Only soft mute and PCM input format selection is currently exposed via optional GPIOs in the driver. Signed-off-by: Stefan Kerkmann Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250910-v6-12-topic-pcm1754-v2-1-0917dbe73c65@pengutronix.de Signed-off-by: Mark Brown --- .../devicetree/bindings/sound/ti,pcm1754.yaml | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/ti,pcm1754.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/ti,pcm1754.yaml b/Documentation/devicetree/bindings/sound/ti,pcm1754.yaml new file mode 100644 index 000000000000..a757f737690c --- /dev/null +++ b/Documentation/devicetree/bindings/sound/ti,pcm1754.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/ti,pcm1754.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments PCM1754 Stereo DAC + +description: + The PCM1754 is a simple stereo DAC that is controlled via hardware gpios. + +maintainers: + - Stefan Kerkmann + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + enum: + - ti,pcm1754 + + vcc-supply: true + + '#sound-dai-cells': + const: 0 + + format-gpios: + maxItems: 1 + description: + GPIO used to select the PCM format + + mute-gpios: + maxItems: 1 + description: + GPIO used to mute all outputs + +required: + - compatible + - '#sound-dai-cells' + - vcc-supply + +additionalProperties: false + +examples: + - | + #include + codec { + compatible = "ti,pcm1754"; + #sound-dai-cells = <0>; + + vcc-supply = <&vcc_reg>; + mute-gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; + format-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>; + }; -- cgit v1.2.3 From 59ba108806516adeaed51a536d55d4f5e9645881 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 10 Sep 2025 18:36:15 -0500 Subject: ASoC: dt-bindings: linux,spdif: Add "port" node The SPDIF receiver/transmitter can be connected to a DAI device via OF graph port. It is already in use and supported. Signed-off-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250910233615.775397-2-robh@kernel.org Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/sound/linux,spdif.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/linux,spdif.yaml b/Documentation/devicetree/bindings/sound/linux,spdif.yaml index 0f4893e11ec4..aea6230db54c 100644 --- a/Documentation/devicetree/bindings/sound/linux,spdif.yaml +++ b/Documentation/devicetree/bindings/sound/linux,spdif.yaml @@ -23,6 +23,9 @@ properties: sound-name-prefix: true + port: + $ref: /schemas/graph.yaml#/properties/port + required: - "#sound-dai-cells" - compatible -- cgit v1.2.3 From c7ec58c39b0252e6635dde55e5c708132ab25cfc Mon Sep 17 00:00:00 2001 From: Wasim Nazir Date: Mon, 8 Sep 2025 13:49:55 +0530 Subject: dt-bindings: eeprom: at24: Add compatible for Giantec GT24C256C The gt24c256c is another 24c256 compatible EEPROM, and does not follow the generic name matching, so add a separate compatible for it. This ensures accurate device-tree representation and enables proper kernel support for systems using this part. Acked-by: Krzysztof Kozlowski Signed-off-by: Wasim Nazir Link: https://lore.kernel.org/r/20250908-lemans-evk-bu-v4-5-5c319c696a7d@oss.qualcomm.com Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/eeprom/at24.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml index 0ac68646c077..50af7ccf6e21 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.yaml +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml @@ -143,6 +143,7 @@ properties: - const: atmel,24c128 - items: - enum: + - giantec,gt24c256c - puya,p24c256c - const: atmel,24c256 - items: -- cgit v1.2.3 From 76bc2203a46ef704a4cd8003986f6bd74139a367 Mon Sep 17 00:00:00 2001 From: Chris Morgan Date: Thu, 4 Sep 2025 11:05:26 -0500 Subject: dt-bindings: mfd: ti,bq25703a: Add TI BQ25703A Charger Document the Texas instruments BQ25703A series of charger managers/ buck/boost regulators. Signed-off-by: Chris Morgan Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250904160530.66178-2-macroalpha82@gmail.com Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/ti,bq25703a.yaml | 117 +++++++++++++++++++++ 1 file changed, 117 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/ti,bq25703a.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/ti,bq25703a.yaml b/Documentation/devicetree/bindings/mfd/ti,bq25703a.yaml new file mode 100644 index 000000000000..ba14663c9266 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ti,bq25703a.yaml @@ -0,0 +1,117 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ti,bq25703a.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: BQ25703A Charger Manager/Buck/Boost Converter + +maintainers: + - Chris Morgan + +allOf: + - $ref: /schemas/power/supply/power-supply.yaml# + +properties: + compatible: + const: ti,bq25703a + + reg: + const: 0x6b + + input-current-limit-microamp: + description: + Maximum total input current allowed used for both charging and + powering the device. + minimum: 50000 + maximum: 6400000 + default: 3250000 + + interrupts: + maxItems: 1 + + monitored-battery: + description: + A minimum of constant-charge-current-max-microamp, + constant-charge-voltage-max-microvolt, and + voltage-min-design-microvolt are required. + + regulators: + type: object + additionalProperties: false + description: + Boost converter regulator output of bq257xx. + + properties: + vbus: + type: object + $ref: /schemas/regulator/regulator.yaml + additionalProperties: false + + properties: + regulator-name: true + regulator-min-microamp: + minimum: 0 + maximum: 6350000 + regulator-max-microamp: + minimum: 0 + maximum: 6350000 + regulator-min-microvolt: + minimum: 4480000 + maximum: 20800000 + regulator-max-microvolt: + minimum: 4480000 + maximum: 20800000 + enable-gpios: + description: + The BQ25703 may require both a register write and a GPIO + toggle to enable the boost regulator. + + required: + - regulator-name + - regulator-min-microamp + - regulator-max-microamp + - regulator-min-microvolt + - regulator-max-microvolt + +unevaluatedProperties: false + +required: + - compatible + - reg + - input-current-limit-microamp + - monitored-battery + - power-supplies + +examples: + - | + #include + #include + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + bq25703: charger@6b { + compatible = "ti,bq25703a"; + reg = <0x6b>; + input-current-limit-microamp = <5000000>; + interrupt-parent = <&gpio0>; + interrupts = ; + monitored-battery = <&battery>; + power-supplies = <&fusb302>; + + regulators { + usb_otg_vbus: vbus { + enable-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; + regulator-max-microamp = <960000>; + regulator-max-microvolt = <5088000>; + regulator-min-microamp = <512000>; + regulator-min-microvolt = <4992000>; + regulator-name = "usb_otg_vbus"; + }; + }; + }; + }; + +... -- cgit v1.2.3 From 804ebc2bdcc85f30973708835b47ee023a4be003 Mon Sep 17 00:00:00 2001 From: Kartik Rajput Date: Thu, 28 Aug 2025 11:29:29 +0530 Subject: dt-bindings: i2c: nvidia,tegra20-i2c: Document Tegra264 I2C Tegra264 has 17 generic I2C controllers, two of which are in always-on partition of the SoC. In addition to the features supported by Tegra194 it also supports a SW mutex register to allow sharing the same I2C instance across multiple firmware. Document compatible string "nvidia,tegra264-i2c" for Tegra264 I2C. Signed-off-by: Kartik Rajput Acked-by: Conor Dooley Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml index 6b6f6762d122..f0693b872cb6 100644 --- a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml @@ -80,6 +80,12 @@ properties: support for 64 KiB transactions whereas earlier chips supported no more than 4 KiB per transactions. const: nvidia,tegra194-i2c + - description: + Tegra264 has 17 generic I2C controllers, two of which are in the AON + (always-on) partition of the SoC. In addition to the features from + Tegra194, a SW mutex register is added to support use of the same I2C + instance across multiple firmwares. + const: nvidia,tegra264-i2c reg: maxItems: 1 @@ -186,6 +192,7 @@ allOf: contains: enum: - nvidia,tegra194-i2c + - nvidia,tegra264-i2c then: required: - resets -- cgit v1.2.3 From 6b670e53ac6ecd531d90324e9ef87a029d2c98b9 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Sat, 6 Sep 2025 16:53:33 +0300 Subject: dt-bindings: display: tegra: Move avdd-dsi-csi-supply from VI to CSI The avdd-dsi-csi-supply is CSI power supply, it has nothing to do with VI, like same supply is used with DSI and has nothing to do with DC. Move it to correct place. Signed-off-by: Svyatoslav Ryhel Acked-by: Rob Herring (Arm) Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml | 3 --- .../devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml | 3 +++ 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml index 2181855a0920..644f42b942ad 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml @@ -70,9 +70,6 @@ properties: ranges: maxItems: 1 - avdd-dsi-csi-supply: - description: DSI/CSI power supply. Must supply 1.2 V. - vip: $ref: /schemas/display/tegra/nvidia,tegra20-vip.yaml diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml index fa07a40d1004..37f6129c9c92 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml @@ -37,6 +37,9 @@ properties: - const: cile - const: csi_tpg + avdd-dsi-csi-supply: + description: DSI/CSI power supply. Must supply 1.2 V. + power-domains: maxItems: 1 -- cgit v1.2.3 From 669c71f6c6b0034f918430a2fdcf577683d31db6 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 9 Sep 2025 10:49:57 +0300 Subject: dt-bindings: arm: tegra: Add Xiaomi Mi Pad (A0101) Add a compatible for the Xiaomi Mi Pad (A0101) tablet. Signed-off-by: Svyatoslav Ryhel Acked-by: Rob Herring (Arm) Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/arm/tegra.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml index 1634dab53269..5b0f03af370d 100644 --- a/Documentation/devicetree/bindings/arm/tegra.yaml +++ b/Documentation/devicetree/bindings/arm/tegra.yaml @@ -174,6 +174,10 @@ properties: - const: google,nyan-big - const: google,nyan - const: nvidia,tegra124 + - description: Xiaomi Mi Pad (A0101) + items: + - const: xiaomi,mocha + - const: nvidia,tegra124 - items: - enum: - nvidia,darcy -- cgit v1.2.3 From 04f27a0fda6b6be104531eeb95d07ef1b3a72af8 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Sat, 6 Sep 2025 09:29:33 +0300 Subject: dt-bindings: arm: tegra: Add ASUS TF101G and SL101 Add a compatible for ASUS Eee Pad Transformer TF101G and ASUS Eee Pad Slider SL101. Signed-off-by: Svyatoslav Ryhel Acked-by: Krzysztof Kozlowski Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/arm/tegra.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml index 5b0f03af370d..6139407c2cbf 100644 --- a/Documentation/devicetree/bindings/arm/tegra.yaml +++ b/Documentation/devicetree/bindings/arm/tegra.yaml @@ -36,8 +36,12 @@ properties: - toradex,colibri_t20-iris - const: toradex,colibri_t20 - const: nvidia,tegra20 - - items: - - const: asus,tf101 + - description: ASUS Transformers T20 Device family + items: + - enum: + - asus,sl101 + - asus,tf101 + - asus,tf101g - const: nvidia,tegra20 - items: - const: acer,picasso -- cgit v1.2.3 From 1ed2786e9ef8f16204dc3f30c46412070cb7140e Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Wed, 10 Sep 2025 02:01:37 +0000 Subject: dt-bindings: soc: renesas: Document R-Car X5H Ironhide Document the compatible values for the Renesas R-Car X5H (R8A78000) SoC, as used on the Renesas Ironhide board. Signed-off-by: Kuninori Morimoto Acked-by: Krzysztof Kozlowski Reviewed-by: Geert Uytterhoeven Link: https://patch.msgid.link/87ms73vzen.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/soc/renesas/renesas.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml index 5f9d541d177a..f4947ac65460 100644 --- a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml +++ b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml @@ -473,6 +473,12 @@ properties: - const: renesas,r8a779mb - const: renesas,r8a7795 + - description: R-Car X5H (R8A78000) + items: + - enum: + - renesas,ironhide # Ironhide (RTP8A78000ASKB0F10S) + - const: renesas,r8a78000 + - description: RZ/N1D (R9A06G032) items: - enum: -- cgit v1.2.3 From eadaa8b255f36ee39ca97d0815c25eeeb1f5d674 Mon Sep 17 00:00:00 2001 From: Leon Romanovsky Date: Tue, 9 Sep 2025 16:27:29 +0300 Subject: dma-mapping: introduce new DMA attribute to indicate MMIO memory This patch introduces the DMA_ATTR_MMIO attribute to mark DMA buffers that reside in memory-mapped I/O (MMIO) regions, such as device BARs exposed through the host bridge, which are accessible for peer-to-peer (P2P) DMA. This attribute is especially useful for exporting device memory to other devices for DMA without CPU involvement, and avoids unnecessary or potentially detrimental CPU cache maintenance calls. DMA_ATTR_MMIO is supposed to provide dma_map_resource() functionality without need to call to special function and perform branching when processing generic containers like bio_vec by the callers. Reviewed-by: Jason Gunthorpe Signed-off-by: Leon Romanovsky Signed-off-by: Marek Szyprowski Link: https://lore.kernel.org/r/6f058ec395c5348014860dbc2eed348c17975843.1757423202.git.leonro@nvidia.com --- Documentation/core-api/dma-attributes.rst | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'Documentation') diff --git a/Documentation/core-api/dma-attributes.rst b/Documentation/core-api/dma-attributes.rst index 1887d92e8e92..0bdc2be65e57 100644 --- a/Documentation/core-api/dma-attributes.rst +++ b/Documentation/core-api/dma-attributes.rst @@ -130,3 +130,21 @@ accesses to DMA buffers in both privileged "supervisor" and unprivileged subsystem that the buffer is fully accessible at the elevated privilege level (and ideally inaccessible or at least read-only at the lesser-privileged levels). + +DMA_ATTR_MMIO +------------- + +This attribute indicates the physical address is not normal system +memory. It may not be used with kmap*()/phys_to_virt()/phys_to_page() +functions, it may not be cacheable, and access using CPU load/store +instructions may not be allowed. + +Usually this will be used to describe MMIO addresses, or other non-cacheable +register addresses. When DMA mapping this sort of address we call +the operation Peer to Peer as a one device is DMA'ing to another device. +For PCI devices the p2pdma APIs must be used to determine if +DMA_ATTR_MMIO is appropriate. + +For architectures that require cache flushing for DMA coherence +DMA_ATTR_MMIO will not perform any cache flushing. The address +provided must never be mapped cacheable into the CPU. -- cgit v1.2.3 From e9e81d86fee63c6d5757841ab557019ddf73786f Mon Sep 17 00:00:00 2001 From: Leon Romanovsky Date: Tue, 9 Sep 2025 16:27:31 +0300 Subject: dma-debug: refactor to use physical addresses for page mapping Convert the DMA debug infrastructure from page-based to physical address-based mapping as a preparation to rely on physical address for DMA mapping routines. The refactoring renames debug_dma_map_page() to debug_dma_map_phys() and changes its signature to accept a phys_addr_t parameter instead of struct page and offset. Similarly, debug_dma_unmap_page() becomes debug_dma_unmap_phys(). A new dma_debug_phy type is introduced to distinguish physical address mappings from other debug entry types. All callers throughout the codebase are updated to pass physical addresses directly, eliminating the need for page-to-physical conversion in the debug layer. This refactoring eliminates the need to convert between page pointers and physical addresses in the debug layer, making the code more efficient and consistent with the DMA mapping API's physical address focus. Reviewed-by: Jason Gunthorpe Signed-off-by: Leon Romanovsky [mszyprow: added a fixup] Signed-off-by: Marek Szyprowski Link: https://lore.kernel.org/r/56d1a6769b68dfcbf8b26a75a7329aeb8e3c3b6a.1757423202.git.leonro@nvidia.com Link: https://lore.kernel.org/all/20250910052618.GH341237@unreal/ --- Documentation/core-api/dma-api.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/core-api/dma-api.rst b/Documentation/core-api/dma-api.rst index 3087bea715ed..ca75b3541679 100644 --- a/Documentation/core-api/dma-api.rst +++ b/Documentation/core-api/dma-api.rst @@ -761,7 +761,7 @@ example warning message may look like this:: [] find_busiest_group+0x207/0x8a0 [] _spin_lock_irqsave+0x1f/0x50 [] check_unmap+0x203/0x490 - [] debug_dma_unmap_page+0x49/0x50 + [] debug_dma_unmap_phys+0x49/0x50 [] nv_tx_done_optimized+0xc6/0x2c0 [] nv_nic_irq_optimized+0x73/0x2b0 [] handle_IRQ_event+0x34/0x70 @@ -855,7 +855,7 @@ that a driver may be leaking mappings. dma-debug interface debug_dma_mapping_error() to debug drivers that fail to check DMA mapping errors on addresses returned by dma_map_single() and dma_map_page() interfaces. This interface clears a flag set by -debug_dma_map_page() to indicate that dma_mapping_error() has been called by +debug_dma_map_phys() to indicate that dma_mapping_error() has been called by the driver. When driver does unmap, debug_dma_unmap() checks the flag and if this flag is still set, prints warning message that includes call trace that leads up to the unmap. This interface can be called from dma_mapping_error() -- cgit v1.2.3 From 0b467f5a7f19853d8b7a920468d795e682442b80 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 8 Sep 2025 18:10:13 -0500 Subject: dt-bindings: net: Convert apm,xgene-enet to DT schema Convert the APM XGene Ethernet binding to DT schema format. Add the missing apm,xgene2-sgenet and apm,xgene2-xgenet compatibles. Drop "reg-names" as required. Add support for up to 16 interrupts. Reviewed-by: Jacob Keller Signed-off-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250908231016.2070305-1-robh@kernel.org Signed-off-by: Jakub Kicinski --- .../devicetree/bindings/net/apm,xgene-enet.yaml | 115 +++++++++++++++++++++ .../devicetree/bindings/net/apm-xgene-enet.txt | 91 ---------------- 2 files changed, 115 insertions(+), 91 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/apm,xgene-enet.yaml delete mode 100644 Documentation/devicetree/bindings/net/apm-xgene-enet.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/apm,xgene-enet.yaml b/Documentation/devicetree/bindings/net/apm,xgene-enet.yaml new file mode 100644 index 000000000000..1c767ef8fcc5 --- /dev/null +++ b/Documentation/devicetree/bindings/net/apm,xgene-enet.yaml @@ -0,0 +1,115 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/apm,xgene-enet.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: APM X-Gene SoC Ethernet + +maintainers: + - Iyappan Subramanian + - Keyur Chudgar + - Quan Nguyen + +allOf: + - $ref: ethernet-controller.yaml# + +properties: + compatible: + enum: + - apm,xgene-enet + - apm,xgene1-sgenet + - apm,xgene1-xgenet + - apm,xgene2-sgenet + - apm,xgene2-xgenet + + reg: + maxItems: 3 + + reg-names: + items: + - const: enet_csr + - const: ring_csr + - const: ring_cmd + + clocks: + maxItems: 1 + + dma-coherent: true + + interrupts: + description: An rx and tx completion interrupt pair per queue + minItems: 1 + maxItems: 16 + + channel: + description: Ethernet to CPU start channel number + $ref: /schemas/types.yaml#/definitions/uint32 + + port-id: + description: Port number + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 1 + + tx-delay: + description: Delay value for RGMII bridge TX clock + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 7 + default: 4 + + rx-delay: + description: Delay value for RGMII bridge RX clock + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 7 + default: 2 + + rxlos-gpios: + description: Input GPIO from SFP+ module indicating incoming signal + maxItems: 1 + + mdio: + description: MDIO bus subnode + $ref: mdio.yaml# + unevaluatedProperties: false + + properties: + compatible: + const: apm,xgene-mdio + + required: + - compatible + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + ethernet@17020000 { + compatible = "apm,xgene-enet"; + reg = <0x17020000 0xd100>, + <0x17030000 0x400>, + <0x10000000 0x200>; + reg-names = "enet_csr", "ring_csr", "ring_cmd"; + interrupts = <0x0 0x3c 0x4>; + channel = <0>; + port-id = <0>; + clocks = <&menetclk 0>; + local-mac-address = [00 01 73 00 00 01]; + phy-connection-type = "rgmii"; + phy-handle = <&menetphy>; + + mdio { + compatible = "apm,xgene-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + menetphy: ethernet-phy@3 { + compatible = "ethernet-phy-id001c.c915"; + reg = <3>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/apm-xgene-enet.txt b/Documentation/devicetree/bindings/net/apm-xgene-enet.txt deleted file mode 100644 index f591ab782dbc..000000000000 --- a/Documentation/devicetree/bindings/net/apm-xgene-enet.txt +++ /dev/null @@ -1,91 +0,0 @@ -APM X-Gene SoC Ethernet nodes - -Ethernet nodes are defined to describe on-chip ethernet interfaces in -APM X-Gene SoC. - -Required properties for all the ethernet interfaces: -- compatible: Should state binding information from the following list, - - "apm,xgene-enet": RGMII based 1G interface - - "apm,xgene1-sgenet": SGMII based 1G interface - - "apm,xgene1-xgenet": XFI based 10G interface -- reg: Address and length of the register set for the device. It contains the - information of registers in the same order as described by reg-names -- reg-names: Should contain the register set names - - "enet_csr": Ethernet control and status register address space - - "ring_csr": Descriptor ring control and status register address space - - "ring_cmd": Descriptor ring command register address space -- interrupts: Two interrupt specifiers can be specified. - - First is the Rx interrupt. This irq is mandatory. - - Second is the Tx completion interrupt. - This is supported only on SGMII based 1GbE and 10GbE interfaces. -- channel: Ethernet to CPU, start channel (prefetch buffer) number - - Must map to the first irq and irqs must be sequential -- port-id: Port number (0 or 1) -- clocks: Reference to the clock entry. -- local-mac-address: MAC address assigned to this device -- phy-connection-type: Interface type between ethernet device and PHY device - -Required properties for ethernet interfaces that have external PHY: -- phy-handle: Reference to a PHY node connected to this device - -- mdio: Device tree subnode with the following required properties: - - compatible: Must be "apm,xgene-mdio". - - #address-cells: Must be <1>. - - #size-cells: Must be <0>. - - For the phy on the mdio bus, there must be a node with the following fields: - - compatible: PHY identifier. Please refer ./phy.txt for the format. - - reg: The ID number for the phy. - -Optional properties: -- status: Should be "ok" or "disabled" for enabled/disabled. Default is "ok". -- tx-delay: Delay value for RGMII bridge TX clock. - Valid values are between 0 to 7, that maps to - 417, 717, 1020, 1321, 1611, 1913, 2215, 2514 ps - Default value is 4, which corresponds to 1611 ps -- rx-delay: Delay value for RGMII bridge RX clock. - Valid values are between 0 to 7, that maps to - 273, 589, 899, 1222, 1480, 1806, 2147, 2464 ps - Default value is 2, which corresponds to 899 ps -- rxlos-gpios: Input gpio from SFP+ module to indicate availability of - incoming signal. - - -Example: - menetclk: menetclk { - compatible = "apm,xgene-device-clock"; - clock-output-names = "menetclk"; - status = "ok"; - }; - - menet: ethernet@17020000 { - compatible = "apm,xgene-enet"; - status = "disabled"; - reg = <0x0 0x17020000 0x0 0xd100>, - <0x0 0x17030000 0x0 0x400>, - <0x0 0x10000000 0x0 0x200>; - reg-names = "enet_csr", "ring_csr", "ring_cmd"; - interrupts = <0x0 0x3c 0x4>; - port-id = <0>; - clocks = <&menetclk 0>; - local-mac-address = [00 01 73 00 00 01]; - phy-connection-type = "rgmii"; - phy-handle = <&menetphy>; - mdio { - compatible = "apm,xgene-mdio"; - #address-cells = <1>; - #size-cells = <0>; - menetphy: menetphy@3 { - compatible = "ethernet-phy-id001c.c915"; - reg = <0x3>; - }; - - }; - }; - -/* Board-specific peripheral configurations */ -&menet { - tx-delay = <4>; - rx-delay = <2>; - status = "ok"; -}; -- cgit v1.2.3 From e663ad6e06a776b739d490b51c59c07cb4d767a4 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 8 Sep 2025 18:10:14 -0500 Subject: dt-bindings: net: Convert APM XGene MDIO to DT schema Convert the APM XGene MDIO bus binding to DT schema format. It's a straight-forward conversion. Reviewed-by: Jacob Keller Signed-off-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250908231016.2070305-2-robh@kernel.org Signed-off-by: Jakub Kicinski --- .../bindings/net/apm,xgene-mdio-rgmii.yaml | 54 ++++++++++++++++++++++ .../devicetree/bindings/net/apm-xgene-mdio.txt | 37 --------------- 2 files changed, 54 insertions(+), 37 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/apm,xgene-mdio-rgmii.yaml delete mode 100644 Documentation/devicetree/bindings/net/apm-xgene-mdio.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/apm,xgene-mdio-rgmii.yaml b/Documentation/devicetree/bindings/net/apm,xgene-mdio-rgmii.yaml new file mode 100644 index 000000000000..470fb5f7f7b5 --- /dev/null +++ b/Documentation/devicetree/bindings/net/apm,xgene-mdio-rgmii.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/apm,xgene-mdio-rgmii.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: APM X-Gene SoC MDIO + +maintainers: + - Iyappan Subramanian + - Keyur Chudgar + - Quan Nguyen + +allOf: + - $ref: mdio.yaml# + +properties: + compatible: + enum: + - apm,xgene-mdio-rgmii + - apm,xgene-mdio-xfi + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +unevaluatedProperties: false + +required: + - compatible + - reg + - clocks + +examples: + - | + mdio@17020000 { + compatible = "apm,xgene-mdio-rgmii"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x17020000 0xd100>; + clocks = <&menetclk 0>; + + phy@3 { + reg = <0x3>; + }; + phy@4 { + reg = <0x4>; + }; + phy@5 { + reg = <0x5>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/apm-xgene-mdio.txt b/Documentation/devicetree/bindings/net/apm-xgene-mdio.txt deleted file mode 100644 index 78722d74cea8..000000000000 --- a/Documentation/devicetree/bindings/net/apm-xgene-mdio.txt +++ /dev/null @@ -1,37 +0,0 @@ -APM X-Gene SoC MDIO node - -MDIO node is defined to describe on-chip MDIO controller. - -Required properties: - - compatible: Must be "apm,xgene-mdio-rgmii" or "apm,xgene-mdio-xfi" - - #address-cells: Must be <1>. - - #size-cells: Must be <0>. - - reg: Address and length of the register set - - clocks: Reference to the clock entry - -For the phys on the mdio bus, there must be a node with the following fields: - - compatible: PHY identifier. Please refer ./phy.txt for the format. - - reg: The ID number for the phy. - -Example: - - mdio: mdio@17020000 { - compatible = "apm,xgene-mdio-rgmii"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0 0x17020000 0x0 0xd100>; - clocks = <&menetclk 0>; - }; - - /* Board-specific peripheral configurations */ - &mdio { - menetphy: phy@3 { - reg = <0x3>; - }; - sgenet0phy: phy@4 { - reg = <0x4>; - }; - sgenet1phy: phy@5 { - reg = <0x5>; - }; - }; -- cgit v1.2.3 From 3e915577cf0b7d3f9088c398888e5e01e10356d7 Mon Sep 17 00:00:00 2001 From: Anshul Dalal Date: Thu, 14 Aug 2025 19:15:28 +0530 Subject: dt-bindings: arm: ti: Add binding for AM625 SiP The AM6254atl SiP belongs to the K3 Multicore SoC architecture platform, providing AM625 SoC with 512MiB of integrated DDR in the package. For further information about the package check: https://www.ti.com/lit/ds/symlink/am625sip.pdf Signed-off-by: Anshul Dalal Reviewed-by: Bryan Brattlof Acked-by: Conor Dooley Link: https://patch.msgid.link/20250814134531.2743874-3-anshuld@ti.com Signed-off-by: Nishanth Menon --- Documentation/devicetree/bindings/arm/ti/k3.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index e80c653fa438..f98817e97d4c 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -58,6 +58,13 @@ properties: - ti,am62-lp-sk - const: ti,am625 + - description: K3 AM6254atl SiP + items: + - enum: + - ti,am6254atl-sk + - const: ti,am6254atl + - const: ti,am625 + - description: K3 AM62x SoC Toradex Verdin Modules and Carrier Boards items: - enum: -- cgit v1.2.3 From 03c7b1f0ee9f7c8d047a6ea5767ac96490d1385c Mon Sep 17 00:00:00 2001 From: Stefano Radaelli Date: Tue, 9 Sep 2025 23:37:39 +0200 Subject: dt-bindings: arm: ti: Add bindings for Variscite VAR-SOM-AM62P Add devicetree bindings for Variscite VAR-SOM-AM62P System on Module and its carrier boards. Signed-off-by: Stefano Radaelli Reviewed-by: Judith Mendez Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250909213749.28098-2-stefano.radaelli21@gmail.com Signed-off-by: Nishanth Menon --- Documentation/devicetree/bindings/arm/ti/k3.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index f98817e97d4c..0105dcda6e04 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -113,6 +113,12 @@ properties: - const: toradex,verdin-am62p # Verdin AM62P Module - const: ti,am62p5 + - description: K3 AM62P5 SoC Variscite SOM and Carrier Boards + items: + - const: variscite,var-som-am62p-symphony + - const: variscite,var-som-am62p + - const: ti,am62p5 + - description: K3 AM642 SoC items: - enum: -- cgit v1.2.3 From 273532a0da09638d0e981df3d012199e2af38447 Mon Sep 17 00:00:00 2001 From: Raviteja Laggyshetty Date: Tue, 19 Aug 2025 11:24:46 +0000 Subject: dt-bindings: interconnect: Add OSM L3 compatible for QCS615 SoC Add Operation State Manager (OSM) L3 interconnect provider binding for QCS615 SoC. As the OSM hardware in QCS615 and SM8150 are same, added a family-level compatible for SM8150 SoC. Signed-off-by: Raviteja Laggyshetty Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250819-talos-l3-icc-v3-1-04529e85dac7@oss.qualcomm.com Signed-off-by: Georgi Djakov --- Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml index ab5a921c3495..4b9b98fbe8f2 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml @@ -41,6 +41,11 @@ properties: - qcom,qcs8300-epss-l3 - const: qcom,sa8775p-epss-l3 - const: qcom,epss-l3 + - items: + - enum: + - qcom,qcs615-osm-l3 + - const: qcom,sm8150-osm-l3 + - const: qcom,osm-l3 reg: maxItems: 1 -- cgit v1.2.3 From c656c99c118b44bb360b0718fadfbf3754fd44d5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= Date: Wed, 3 Sep 2025 12:51:39 +0200 Subject: dt-bindings: mmc: sdhci-pxa: Add minItems to pinctrl-names MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some older boards only require a default pinctrl. Add a minItems property so these don't cause dt-validate warnings. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202509030625.PBgLIAwG-lkp@intel.com/ Signed-off-by: Duje Mihanović Acked-by: Rob Herring (Arm) Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml index fba1cc50fdf0..186ce8ff4626 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml @@ -44,6 +44,7 @@ allOf: items: - const: default - const: state_cmd_gpio + minItems: 1 pinctrl-1: description: @@ -61,6 +62,7 @@ allOf: items: - const: default - const: state_uhs + minItems: 1 pinctrl-1: description: -- cgit v1.2.3 From ce55f63137919a1d943b0d883a6ac3744108af0f Mon Sep 17 00:00:00 2001 From: Monish Chunara Date: Mon, 8 Sep 2025 13:49:51 +0530 Subject: dt-bindings: mmc: sdhci-msm: Document the Lemans compatible Add the MSM SDHCI compatible name to support both eMMC and SD card for Lemans, which uses 'sa8775p' as the fallback SoC. Ensure the new compatible string matches existing Lemans-compatible formats without introducing a new naming convention. The SDHCI controller on Lemans is based on MSM SDHCI v5 IP. Hence, document the compatible with "qcom,sdhci-msm-v5" as the fallback. Signed-off-by: Monish Chunara Acked-by: Krzysztof Kozlowski Signed-off-by: Wasim Nazir Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml index 22d1f50c3fd1..594bd174ff21 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml @@ -48,6 +48,7 @@ properties: - qcom,qcs615-sdhci - qcom,qcs8300-sdhci - qcom,qdu1000-sdhci + - qcom,sa8775p-sdhci - qcom,sar2130p-sdhci - qcom,sc7180-sdhci - qcom,sc7280-sdhci -- cgit v1.2.3 From 98682689a1a443067e1981d9eed8c6ddcef8cdf3 Mon Sep 17 00:00:00 2001 From: Sarthak Garg Date: Mon, 8 Sep 2025 16:11:20 +0530 Subject: dt-bindings: mmc: controller: Add max-sd-hs-hz property Introduce a new optional device tree property max-sd-hs-hz to limit the maximum frequency (in Hz) used for SD cards operating in High-Speed (HS) mode due to any board electrical limitations. Signed-off-by: Sarthak Garg Reviewed-by: Krzysztof Kozlowski Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml index 9a7235439759..7414d5522dfe 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml @@ -93,6 +93,14 @@ properties: minimum: 400000 maximum: 384000000 + max-sd-hs-hz: + description: | + Maximum frequency (in Hz) to be used for SD cards operating in + High-Speed (HS) mode. + minimum: 400000 + maximum: 50000000 + default: 50000000 + disable-wp: $ref: /schemas/types.yaml#/definitions/flag description: -- cgit v1.2.3 From d1a7bf9031b9f91b86187bcd5bd7a4bfd76bcaef Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tom=C3=A1=C5=A1=20Macholda?= Date: Thu, 11 Sep 2025 18:13:07 +0200 Subject: dt-bindings: marvell: armada-37xx: add ripe,atlas-v5 compatible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Document compatible for RIPE Atlas Probe v5. Signed-off-by: Tomáš Macholda Acked-by: Krzysztof Kozlowski Signed-off-by: Gregory CLEMENT --- Documentation/devicetree/bindings/arm/marvell/armada-37xx.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-37xx.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-37xx.yaml index 51e1386f0e01..b2f4fe81b97c 100644 --- a/Documentation/devicetree/bindings/arm/marvell/armada-37xx.yaml +++ b/Documentation/devicetree/bindings/arm/marvell/armada-37xx.yaml @@ -23,6 +23,7 @@ properties: - marvell,armada-3720-db - methode,edpu - methode,udpu + - ripe,atlas-v5 - const: marvell,armada3720 - const: marvell,armada3710 -- cgit v1.2.3 From 7cbba32a2d62c3c18128c04f88b1901d702bb2bf Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 12 Sep 2025 14:12:00 +0100 Subject: slimbus: qcom: remove unused qcom controller driver Qcom Slimbus controller driver is totally unused and dead code, there is no point in keeping this driver in the kernel without users. This patch removes the driver along with device tree bindings. Signed-off-by: Srinivas Kandagatla Acked-by: Rob Herring (Arm) Acked-by: Dmitry Baryshkov Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20250912131202.303026-2-srini@kernel.org Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/slimbus/qcom,slim.yaml | 86 ---------------------- .../devicetree/bindings/slimbus/slimbus.yaml | 13 +--- 2 files changed, 4 insertions(+), 95 deletions(-) delete mode 100644 Documentation/devicetree/bindings/slimbus/qcom,slim.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/slimbus/qcom,slim.yaml b/Documentation/devicetree/bindings/slimbus/qcom,slim.yaml deleted file mode 100644 index 883bda58ca97..000000000000 --- a/Documentation/devicetree/bindings/slimbus/qcom,slim.yaml +++ /dev/null @@ -1,86 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/slimbus/qcom,slim.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Qualcomm SoC SLIMbus controller - -maintainers: - - Krzysztof Kozlowski - - Srinivas Kandagatla - -description: - SLIMbus controller used when applications processor controls SLIMbus master - component. - -allOf: - - $ref: slimbus.yaml# - -properties: - compatible: - items: - - enum: - - qcom,apq8064-slim - - const: qcom,slim - - reg: - items: - - description: Physical address of controller register blocks - - description: SLEW RATE register - - reg-names: - items: - - const: ctrl - - const: slew - - clocks: - items: - - description: Interface clock for this controller - - description: Interrupt for controller core's BAM - - clock-names: - items: - - const: iface - - const: core - - interrupts: - maxItems: 1 - -required: - - compatible - - reg - - reg-names - - clocks - - clock-names - - interrupts - -unevaluatedProperties: false - -examples: - - | - #include - #include - #include - - soc { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - slim@28080000 { - compatible = "qcom,apq8064-slim", "qcom,slim"; - reg = <0x28080000 0x2000>, <0x80207c 4>; - reg-names = "ctrl", "slew"; - interrupts = ; - clocks = <&lcc SLIMBUS_SRC>, <&lcc AUDIO_SLIMBUS_CLK>; - clock-names = "iface", "core"; - #address-cells = <2>; - #size-cells = <0>; - - audio-codec@1,0 { - compatible = "slim217,60"; - reg = <1 0>; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/slimbus/slimbus.yaml b/Documentation/devicetree/bindings/slimbus/slimbus.yaml index 3b8cae9d1016..89017d9cda10 100644 --- a/Documentation/devicetree/bindings/slimbus/slimbus.yaml +++ b/Documentation/devicetree/bindings/slimbus/slimbus.yaml @@ -68,8 +68,6 @@ additionalProperties: true examples: - | - #include - #include #include soc { @@ -78,17 +76,14 @@ examples: ranges; slim@28080000 { - compatible = "qcom,apq8064-slim", "qcom,slim"; - reg = <0x28080000 0x2000>, <0x80207c 4>; - reg-names = "ctrl", "slew"; - interrupts = ; - clocks = <&lcc SLIMBUS_SRC>, <&lcc AUDIO_SLIMBUS_CLK>; - clock-names = "iface", "core"; + compatible = "qcom,slim-ngd-v1.5.0"; + reg = <0x091c0000 0x2c000>; + interrupts = ; #address-cells = <2>; #size-cells = <0>; audio-codec@1,0 { - compatible = "slim217,60"; + compatible = "slim217,1a0"; reg = <1 0>; }; }; -- cgit v1.2.3 From 8de0848447b9d94db3c09e6aea62181ac1329706 Mon Sep 17 00:00:00 2001 From: Ling Xu Date: Fri, 12 Sep 2025 14:12:59 +0100 Subject: dt-bindings: misc: qcom,fastrpc: Add GDSP label There are some products which support GDSP remoteprocs. GDSP is General Purpose DSP where tasks can be offloaded. There are 2 GDSPs named gdsp0 and gdsp1. Add "gdsp0" and "gdsp1" as the new supported labels for GDSP fastrpc domains. Acked-by: Krzysztof Kozlowski Reviewed-by: Ekansh Gupta Signed-off-by: Ling Xu Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20250912131302.303199-2-srini@kernel.org Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml index 0840a3d92513..3f6199fc9ae6 100644 --- a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml +++ b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml @@ -27,6 +27,8 @@ properties: - sdsp - cdsp - cdsp1 + - gdsp0 + - gdsp1 memory-region: maxItems: 1 -- cgit v1.2.3 From 9b58f88a1f48b75e98ebb03490340c48b54cb804 Mon Sep 17 00:00:00 2001 From: Ciprian Costea Date: Fri, 12 Sep 2025 14:14:11 +0100 Subject: dt-bindings: nvmem: Add the nxp,s32g-ocotp yaml file Add bindings to expose the On Chip One-Time Programmable Controller (OCOTP) for the NXP s32g chipset. There are three versions of this chip but they're compatible so we can fall back to the nxp,s32g2-ocotp compatible. Signed-off-by: Ciprian Costea Signed-off-by: Dan Carpenter Reviewed-by: Rob Herring (Arm) Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20250912131415.303407-2-srini@kernel.org Signed-off-by: Greg Kroah-Hartman --- .../bindings/nvmem/nxp,s32g-ocotp-nvmem.yaml | 45 ++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/nxp,s32g-ocotp-nvmem.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/nvmem/nxp,s32g-ocotp-nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nxp,s32g-ocotp-nvmem.yaml new file mode 100644 index 000000000000..8d46e7d28da6 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/nxp,s32g-ocotp-nvmem.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/nxp,s32g-ocotp-nvmem.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP S32G OCOTP NVMEM driver + +maintainers: + - Ciprian Costea + +description: + The drivers provides an interface to access One Time + Programmable memory pages, such as TMU fuse values. + +properties: + compatible: + oneOf: + - enum: + - nxp,s32g2-ocotp + - items: + - enum: + - nxp,s32g3-ocotp + - nxp,s32r45-ocotp + - const: nxp,s32g2-ocotp + reg: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +allOf: + - $ref: nvmem.yaml# + +examples: + - | + nvmem@400a4000 { + compatible = "nxp,s32g2-ocotp"; + reg = <0x400a4000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + }; -- cgit v1.2.3 From 4a9b344e90c7ca654d7a469d0a467f90ef2add64 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Fri, 12 Sep 2025 14:14:13 +0100 Subject: dt-bindings: nvmem: sl28cpld: add sa67mcu compatible The Kontron SMARC-sAM67 has the same nvmem layout as the SMARC-sAL28. To To be prepared for any board specific quirks, add a specific compatible. Signed-off-by: Michael Walle Acked-by: Krzysztof Kozlowski Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20250912131415.303407-4-srini@kernel.org Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/nvmem/layouts/kontron,sl28-vpd.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/nvmem/layouts/kontron,sl28-vpd.yaml b/Documentation/devicetree/bindings/nvmem/layouts/kontron,sl28-vpd.yaml index c713e23819f1..afd1919c6b1c 100644 --- a/Documentation/devicetree/bindings/nvmem/layouts/kontron,sl28-vpd.yaml +++ b/Documentation/devicetree/bindings/nvmem/layouts/kontron,sl28-vpd.yaml @@ -19,7 +19,12 @@ select: false properties: compatible: - const: kontron,sl28-vpd + oneOf: + - items: + - enum: + - kontron,sa67-vpd + - const: kontron,sl28-vpd + - const: kontron,sl28-vpd serial-number: type: object -- cgit v1.2.3 From ddb095e81d60902d76be250fa5f7f1d1e32f65ec Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Fri, 12 Sep 2025 14:14:14 +0100 Subject: dt-bindings: nvmem: Document support for Airoha AN8855 Switch EFUSE Document support for Airoha AN8855 Switch EFUSE used to calibrate internal PHYs and store additional configuration info. Signed-off-by: Christian Marangi Reviewed-by: Rob Herring (Arm) Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20250912131415.303407-5-srini@kernel.org Signed-off-by: Greg Kroah-Hartman --- .../bindings/nvmem/airoha,an8855-efuse.yaml | 123 +++++++++++++++++++++ 1 file changed, 123 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/airoha,an8855-efuse.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/nvmem/airoha,an8855-efuse.yaml b/Documentation/devicetree/bindings/nvmem/airoha,an8855-efuse.yaml new file mode 100644 index 000000000000..9802d9ea2176 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/airoha,an8855-efuse.yaml @@ -0,0 +1,123 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/airoha,an8855-efuse.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Airoha AN8855 Switch EFUSE + +maintainers: + - Christian Marangi + +description: + Airoha AN8855 EFUSE used to calibrate internal PHYs and store additional + configuration info. + +$ref: nvmem.yaml# + +properties: + compatible: + const: airoha,an8855-efuse + + '#nvmem-cell-cells': + const: 0 + +required: + - compatible + - '#nvmem-cell-cells' + +unevaluatedProperties: false + +examples: + - | + efuse { + compatible = "airoha,an8855-efuse"; + + #nvmem-cell-cells = <0>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + shift_sel_port0_tx_a: shift-sel-port0-tx-a@c { + reg = <0xc 0x4>; + }; + + shift_sel_port0_tx_b: shift-sel-port0-tx-b@10 { + reg = <0x10 0x4>; + }; + + shift_sel_port0_tx_c: shift-sel-port0-tx-c@14 { + reg = <0x14 0x4>; + }; + + shift_sel_port0_tx_d: shift-sel-port0-tx-d@18 { + reg = <0x18 0x4>; + }; + + shift_sel_port1_tx_a: shift-sel-port1-tx-a@1c { + reg = <0x1c 0x4>; + }; + + shift_sel_port1_tx_b: shift-sel-port1-tx-b@20 { + reg = <0x20 0x4>; + }; + + shift_sel_port1_tx_c: shift-sel-port1-tx-c@24 { + reg = <0x24 0x4>; + }; + + shift_sel_port1_tx_d: shift-sel-port1-tx-d@28 { + reg = <0x28 0x4>; + }; + + shift_sel_port2_tx_a: shift-sel-port2-tx-a@2c { + reg = <0x2c 0x4>; + }; + + shift_sel_port2_tx_b: shift-sel-port2-tx-b@30 { + reg = <0x30 0x4>; + }; + + shift_sel_port2_tx_c: shift-sel-port2-tx-c@34 { + reg = <0x34 0x4>; + }; + + shift_sel_port2_tx_d: shift-sel-port2-tx-d@38 { + reg = <0x38 0x4>; + }; + + shift_sel_port3_tx_a: shift-sel-port3-tx-a@4c { + reg = <0x4c 0x4>; + }; + + shift_sel_port3_tx_b: shift-sel-port3-tx-b@50 { + reg = <0x50 0x4>; + }; + + shift_sel_port3_tx_c: shift-sel-port3-tx-c@54 { + reg = <0x54 0x4>; + }; + + shift_sel_port3_tx_d: shift-sel-port3-tx-d@58 { + reg = <0x58 0x4>; + }; + + shift_sel_port4_tx_a: shift-sel-port4-tx-a@5c { + reg = <0x5c 0x4>; + }; + + shift_sel_port4_tx_b: shift-sel-port4-tx-b@60 { + reg = <0x60 0x4>; + }; + + shift_sel_port4_tx_c: shift-sel-port4-tx-c@64 { + reg = <0x64 0x4>; + }; + + shift_sel_port4_tx_d: shift-sel-port4-tx-d@68 { + reg = <0x68 0x4>; + }; + }; + }; -- cgit v1.2.3 From 49fce0730fd3c028982574c85eb2eb824d6e63f7 Mon Sep 17 00:00:00 2001 From: Markus Schneider-Pargmann Date: Wed, 10 Sep 2025 16:23:31 -0500 Subject: dt-bindings: serial: 8250_omap: Add wakeup pinctrl state Pins associated with the 8250 omap unit can be the source of a wakeup in deep sleep states. To be able to wakeup, these pins have to be configured in a special way. To support this configuration add the default and wakeup pinctrl states. Signed-off-by: Markus Schneider-Pargmann Signed-off-by: Kendall Willis Link: https://lore.kernel.org/r/20250910-uart-daisy-chain-8250-omap-v2-1-e90d44c1a9ac@ti.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/serial/8250_omap.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/serial/8250_omap.yaml b/Documentation/devicetree/bindings/serial/8250_omap.yaml index 1859f71297ff..aabacca2b2fa 100644 --- a/Documentation/devicetree/bindings/serial/8250_omap.yaml +++ b/Documentation/devicetree/bindings/serial/8250_omap.yaml @@ -71,6 +71,22 @@ properties: overrun-throttle-ms: true wakeup-source: true + pinctrl-0: + description: Default pinctrl state + + pinctrl-1: + description: Wakeup pinctrl state + + pinctrl-names: + description: + When present should contain at least "default" describing the default pin + states. The second state called "wakeup" describes the pins in their + wakeup configuration required to exit sleep states. + minItems: 1 + items: + - const: default + - const: wakeup + required: - compatible - reg -- cgit v1.2.3 From 5cacd26436a66e24b1f0335a5d2b71eed4ab0d74 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Wed, 20 Aug 2025 21:23:17 +0100 Subject: dt-bindings: watchdog: renesas,wdt: Add support for RZ/T2H and RZ/N2H Extend the Renesas WDT device tree bindings to support the watchdog timer found on the RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs. The RZ/T2H WDT is mostly compatible with the one found on the RZ/V2H(P), but includes an additional register and differs in the clock division ratio settings for the WDTCR[CKS] field. To reflect these differences, introduce a new compatible string, "renesas,r9a09g077-wdt". The binding schema is updated accordingly. On RZ/T2H, the WDT does not require the "resets" property. It also requires two register regions and the presence of a "power-domains" property. The "clock-names" property is limited to a single entry, "pclk", for this SoC. The RZ/N2H SoC uses the same WDT IP as the RZ/T2H. It is supported by using "renesas,r9a09g087-wdt" as the primary compatible string, with "renesas,r9a09g077-wdt" listed as a fallback to describe the shared hardware features. Example: wdt0: watchdog@80082000 { compatible = "renesas,r9a09g077-wdt"; reg = <0 0x80082000 0 0x400>, <0 0x81295100 0 0x04>; clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKL>; clock-names = "pclk"; power-domains = <&cpg>; status = "disabled"; }; Signed-off-by: Lad Prabhakar Reviewed-by: Rob Herring (Arm) Reviewed-by: Geert Uytterhoeven Reviewed-by: Guenter Roeck Signed-off-by: Guenter Roeck Signed-off-by: Wim Van Sebroeck --- .../devicetree/bindings/watchdog/renesas,wdt.yaml | 36 ++++++++++++++++++++-- 1 file changed, 33 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml index 78874b90c88c..b6e60162c263 100644 --- a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml @@ -81,10 +81,17 @@ properties: - renesas,r9a09g056-wdt # RZ/V2N - const: renesas,r9a09g057-wdt # RZ/V2H(P) - - const: renesas,r9a09g057-wdt # RZ/V2H(P) + - enum: + - renesas,r9a09g057-wdt # RZ/V2H(P) + - renesas,r9a09g077-wdt # RZ/T2H + + - items: + - const: renesas,r9a09g087-wdt # RZ/N2H + - const: renesas,r9a09g077-wdt # RZ/T2H reg: - maxItems: 1 + minItems: 1 + maxItems: 2 interrupts: minItems: 1 @@ -132,6 +139,7 @@ allOf: compatible: contains: enum: + - renesas,r9a09g077-wdt - renesas,rza-wdt - renesas,rzn1-wdt then: @@ -183,7 +191,9 @@ allOf: properties: compatible: contains: - const: renesas,r9a09g057-wdt + enum: + - renesas,r9a09g057-wdt + - renesas,r9a09g077-wdt then: properties: interrupts: false @@ -192,6 +202,26 @@ allOf: required: - interrupts + - if: + properties: + compatible: + contains: + const: renesas,r9a09g077-wdt + then: + properties: + resets: false + clock-names: + maxItems: 1 + reg: + minItems: 2 + required: + - clock-names + - power-domains + else: + properties: + reg: + maxItems: 1 + additionalProperties: false examples: -- cgit v1.2.3 From 5799d5d8a6c877f03ad5b5a640977053be45059a Mon Sep 17 00:00:00 2001 From: David Kaplan Date: Fri, 12 Sep 2025 10:24:28 -0500 Subject: x86/bugs: Add attack vector controls for VMSCAPE Use attack vector controls to select whether VMSCAPE requires mitigation, similar to other bugs. Signed-off-by: David Kaplan Signed-off-by: Borislav Petkov (AMD) --- Documentation/admin-guide/hw-vuln/attack_vector_controls.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/hw-vuln/attack_vector_controls.rst b/Documentation/admin-guide/hw-vuln/attack_vector_controls.rst index 5964901d66e3..d0bdbd81dcf9 100644 --- a/Documentation/admin-guide/hw-vuln/attack_vector_controls.rst +++ b/Documentation/admin-guide/hw-vuln/attack_vector_controls.rst @@ -218,6 +218,7 @@ SRSO X X X X SSB X TAA X X X X * (Note 2) TSA X X X X +VMSCAPE X =============== ============== ============ ============= ============== ============ ======== Notes: -- cgit v1.2.3 From 3e403c2faad9398fb70313f7cc0303c38f1ade9c Mon Sep 17 00:00:00 2001 From: Loic Poulain Date: Thu, 11 Sep 2025 23:21:01 +0200 Subject: dt-bindings: i2c: qcom-cci: Document QCM2290 compatible The CCI on QCM2290 is the interface for controlling camera sensor over I2C. It requires only two clocks. Signed-off-by: Loic Poulain Reviewed-by: Krzysztof Kozlowski Reviewed-by: Bjorn Andersson Signed-off-by: Wolfram Sang --- .../devicetree/bindings/i2c/qcom,i2c-cci.yaml | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml index 73144473b9b2..83b13370ff6c 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml @@ -25,6 +25,7 @@ properties: - items: - enum: + - qcom,qcm2290-cci - qcom,sc7280-cci - qcom,sc8280xp-cci - qcom,sdm670-cci @@ -44,11 +45,11 @@ properties: const: 0 clocks: - minItems: 3 + minItems: 2 maxItems: 6 clock-names: - minItems: 3 + minItems: 2 maxItems: 6 interrupts: @@ -113,6 +114,7 @@ allOf: then: properties: clocks: + minItems: 3 maxItems: 3 clock-names: items: @@ -120,6 +122,22 @@ allOf: - const: cci_ahb - const: cci + - if: + properties: + compatible: + contains: + enum: + - qcom,qcm2290-cci + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + items: + - const: ahb + - const: cci + - if: properties: compatible: -- cgit v1.2.3 From c62859e13712334bd17d46ee0c1b26e8673d2961 Mon Sep 17 00:00:00 2001 From: Wenmeng Liu Date: Fri, 12 Sep 2025 23:19:25 +0800 Subject: dt-bindings: i2c: qcom-cci: Document sa8775p compatible Add the sa8775p CCI device string compatible. Acked-by: Rob Herring (Arm) Reviewed-by: Bryan O'Donoghue Signed-off-by: Wenmeng Liu Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml index 83b13370ff6c..7456783d1f8e 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml @@ -26,6 +26,7 @@ properties: - items: - enum: - qcom,qcm2290-cci + - qcom,sa8775p-cci - qcom,sc7280-cci - qcom,sc8280xp-cci - qcom,sdm670-cci @@ -241,6 +242,7 @@ allOf: compatible: contains: enum: + - qcom,sa8775p-cci - qcom,sm8550-cci - qcom,sm8650-cci - qcom,x1e80100-cci -- cgit v1.2.3 From 947e2d6414b3118bab920f1b0c27b4301dc5a361 Mon Sep 17 00:00:00 2001 From: Denzeel Oliva Date: Sun, 7 Sep 2025 22:13:38 +0000 Subject: dt-bindings: i2c: exynos5: Add exynos990-hsi2c compatible Add samsung,exynos990-hsi2c dedicated compatible for representing I2C of Exynos990 SoC. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Denzeel Oliva Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml index 7ae8c7b1d006..6fc03281a8f8 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml @@ -38,6 +38,7 @@ properties: - google,gs101-hsi2c - samsung,exynos2200-hsi2c - samsung,exynos850-hsi2c + - samsung,exynos990-hsi2c - const: samsung,exynosautov9-hsi2c - const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420 deprecated: true -- cgit v1.2.3 From f77a13df57e803fe574dd29c5454088fcc6f3285 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:29 +0200 Subject: dt-bindings: i2c: apple,i2c: Add apple,t6020-i2c compatible After discussion with the devicetree maintainers we agreed to not extend lists with the generic compatible "apple,i2c" anymore [1]. Use "apple,t8103-i2c" as fallback compatible as it is the SoC the driver and bindings were written for. This block is compatible with t8103, so just add the new per-SoC compatible using apple,t8103-i2c as base. [1]: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ Signed-off-by: Janne Grunau Acked-by: Andi Shyti Signed-off-by: Wolfram Sang --- .../devicetree/bindings/i2c/apple,i2c.yaml | 27 +++++++++++++--------- 1 file changed, 16 insertions(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/apple,i2c.yaml b/Documentation/devicetree/bindings/i2c/apple,i2c.yaml index fed3e1b8c43f..500a965bdb7a 100644 --- a/Documentation/devicetree/bindings/i2c/apple,i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/apple,i2c.yaml @@ -20,17 +20,22 @@ allOf: properties: compatible: - items: - - enum: - - apple,s5l8960x-i2c - - apple,t7000-i2c - - apple,s8000-i2c - - apple,t8010-i2c - - apple,t8015-i2c - - apple,t8103-i2c - - apple,t8112-i2c - - apple,t6000-i2c - - const: apple,i2c + oneOf: + - items: + - const: apple,t6020-i2c + - const: apple,t8103-i2c + - items: + - enum: + # Do not add additional SoC to this list. + - apple,s5l8960x-i2c + - apple,t7000-i2c + - apple,s8000-i2c + - apple,t8010-i2c + - apple,t8015-i2c + - apple,t8103-i2c + - apple,t8112-i2c + - apple,t6000-i2c + - const: apple,i2c reg: maxItems: 1 -- cgit v1.2.3 From 69329daf16af7d0ec189a760f28ea6a1ffb7f23a Mon Sep 17 00:00:00 2001 From: Akhil R Date: Mon, 18 Aug 2025 10:03:44 +0530 Subject: dt-bindings: i2c: nvidia,tegra20-i2c: Add Tegra256 I2C compatible Add compatible for Tegra256 I2C controllers. Tegra256 consists of 8 generic Tegra I2C controllers similar to previous generations. The parent clock frequency is different in these controllers and hence the timing parameter values are different from the previous ones. Signed-off-by: Akhil R Acked-by: Rob Herring (Arm) Acked-by: Thierry Reding Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml index 6b6f6762d122..32c3b69ccf34 100644 --- a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml @@ -80,6 +80,11 @@ properties: support for 64 KiB transactions whereas earlier chips supported no more than 4 KiB per transactions. const: nvidia,tegra194-i2c + - description: | + Tegra256 has 8 generic I2C controllers. The controllers are similar to + the previous generations, but have a different parent clock and hence + the timing parameters are configured differently. + const: nvidia,tegra256-i2c reg: maxItems: 1 @@ -186,6 +191,7 @@ allOf: contains: enum: - nvidia,tegra194-i2c + - nvidia,tegra256-i2c then: required: - resets -- cgit v1.2.3 From 3456820e01f9b40167e8438f5a43c76e4361c2d6 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 9 Sep 2025 09:23:38 -0500 Subject: dt-bindings: net: Drop duplicate brcm,bcm7445-switch-v4.0.txt The brcm,bcm7445-switch-v4.0.txt binding is already covered by dsa/brcm,sf2.yaml. The listed deprecated properties aren't used anywhere either. Signed-off-by: Rob Herring (Arm) Acked-by: Florian Fainelli Link: https://patch.msgid.link/20250909142339.3219200-2-robh@kernel.org Signed-off-by: Jakub Kicinski --- .../bindings/net/brcm,bcm7445-switch-v4.0.txt | 50 ---------------------- 1 file changed, 50 deletions(-) delete mode 100644 Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt b/Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt deleted file mode 100644 index 284cddb3118e..000000000000 --- a/Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt +++ /dev/null @@ -1,50 +0,0 @@ -* Broadcom Starfighter 2 integrated switch - -See dsa/brcm,bcm7445-switch-v4.0.yaml for the documentation. - -*Deprecated* binding required properties: - -- dsa,mii-bus: phandle to the MDIO bus controller, see dsa/dsa.txt -- dsa,ethernet: phandle to the CPU network interface controller, see dsa/dsa.txt -- #address-cells: must be 2, see dsa/dsa.txt - -Example using the old DSA DeviceTree binding: - -switch_top@f0b00000 { - compatible = "simple-bus"; - #size-cells = <1>; - #address-cells = <1>; - ranges = <0 0xf0b00000 0x40804>; - - ethernet_switch@0 { - compatible = "brcm,bcm7445-switch-v4.0"; - #size-cells = <0>; - #address-cells = <2>; - reg = <0x0 0x40000 - 0x40000 0x110 - 0x40340 0x30 - 0x40380 0x30 - 0x40400 0x34 - 0x40600 0x208>; - interrupts = <0 0x18 0 - 0 0x19 0>; - brcm,num-gphy = <1>; - brcm,num-rgmii-ports = <2>; - brcm,fcb-pause-override; - brcm,acb-packets-inflight; - - ... - switch@0 { - reg = <0 0>; - #size-cells = <0>; - #address-cells = <1>; - - port@0 { - label = "gphy"; - reg = <0>; - brcm,use-bcm-hdr; - }; - ... - }; - }; -}; -- cgit v1.2.3 From 0f610e650d4e979490ccfa4c22ca29ca547f41e7 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Fri, 12 Sep 2025 01:47:05 +0800 Subject: dt-bindings: clock: sun55i-a523-ccu: Add A523 MCU CCU clock controller There are four clock controllers in the A523 SoC. The existing binding already covers two of them that are critical for basic operation. The remaining ones are the MCU clock controller and CPU PLL clock controller. Add a description for the MCU CCU. This unit controls and provides clocks to the MCU (RISC-V) subsystem and peripherals meant to operate under low power conditions. Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250911174710.3149589-3-wens@kernel.org Signed-off-by: Chen-Yu Tsai --- .../bindings/clock/allwinner,sun55i-a523-ccu.yaml | 37 ++++++++++++++++++++-- 1 file changed, 35 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun55i-a523-ccu.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun55i-a523-ccu.yaml index f5f62e9a10a1..58be701a720e 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun55i-a523-ccu.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun55i-a523-ccu.yaml @@ -19,6 +19,7 @@ properties: compatible: enum: - allwinner,sun55i-a523-ccu + - allwinner,sun55i-a523-mcu-ccu - allwinner,sun55i-a523-r-ccu reg: @@ -26,11 +27,11 @@ properties: clocks: minItems: 4 - maxItems: 5 + maxItems: 9 clock-names: minItems: 4 - maxItems: 5 + maxItems: 9 required: - "#clock-cells" @@ -63,6 +64,38 @@ allOf: - const: iosc - const: losc-fanout + - if: + properties: + compatible: + enum: + - allwinner,sun55i-a523-mcu-ccu + + then: + properties: + clocks: + items: + - description: High Frequency Oscillator (usually at 24MHz) + - description: Low Frequency Oscillator (usually at 32kHz) + - description: Internal Oscillator + - description: Audio PLL (4x) + - description: Peripherals PLL 0 (300 MHz output) + - description: DSP module clock + - description: MBUS clock + - description: PRCM AHB clock + - description: PRCM APB0 clock + + clock-names: + items: + - const: hosc + - const: losc + - const: iosc + - const: pll-audio0-4x + - const: pll-periph0-300m + - const: dsp + - const: mbus + - const: r-ahb + - const: r-apb0 + - if: properties: compatible: -- cgit v1.2.3 From db5796c5c5c6db72339e818b54e6a2e043f7032c Mon Sep 17 00:00:00 2001 From: Lukas Schmid Date: Sun, 31 Aug 2025 18:25:30 +0200 Subject: dt-bindings: arm: sunxi: Add NetCube Systems Nagami SoM and carrier board bindings The NetCube Systems Nagami is an System on Module base on the Allwinner T113s SoC. It is intended to be used in low cost devices which require simple layouts and low BOM cost. The NetCube Systems Nagami Basic Carrier Board is a simple carrier for the Nagami SoM. It is intended to serve as a simple reference design for a custom implementation or just evaluating the module with other peripherals The NetCube Systems Nagami Keypad Carrier is a custom board intended to fit a standard Ritto Intercom enclosure and provides a Keypad, NFC-Reader and Status-LED all controllable over Ethernet with PoE support. Signed-off-by: Lukas Schmid Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250831162536.2380589-2-lukas.schmid@netcube.li Signed-off-by: Chen-Yu Tsai --- Documentation/devicetree/bindings/arm/sunxi.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index c25a22fe4d25..72ef861a0b68 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -595,6 +595,14 @@ properties: - const: netcube,kumquat - const: allwinner,sun8i-v3s + - description: NetCube Systems Nagami SoM based boards + items: + - enum: + - netcube,nagami-basic-carrier + - netcube,nagami-keypad-carrier + - const: netcube,nagami + - const: allwinner,sun8i-t113s + - description: NextThing Co. CHIP items: - const: nextthing,chip -- cgit v1.2.3 From 70da02061499ca89ab92f7c4310f815d5fe674ec Mon Sep 17 00:00:00 2001 From: Antoniu Miclaus Date: Mon, 8 Sep 2025 07:35:22 +0000 Subject: iio: add power and energy measurement modifiers Add new IIO modifiers to support power and energy measurement devices: Power modifiers: - IIO_MOD_ACTIVE: Real power consumed by the load - IIO_MOD_REACTIVE: Power that oscillates between source and load - IIO_MOD_APPARENT: Magnitude of complex power Signal quality modifiers: - IIO_MOD_RMS: Root Mean Square value Additionally adds: - IIO_CHAN_INFO_POWERFACTOR: Power factor channel info type for representing the ratio of active power to apparent power These modifiers enable proper representation of power measurement devices like energy meters and power analyzers. Signed-off-by: Antoniu Miclaus Signed-off-by: Jonathan Cameron --- Documentation/ABI/testing/sysfs-bus-iio | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio index 2fb2cea4b192..78da68826307 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio +++ b/Documentation/ABI/testing/sysfs-bus-iio @@ -167,7 +167,18 @@ Description: is required is a consistent labeling. Units after application of scale and offset are millivolts. +What: /sys/bus/iio/devices/iio:deviceX/in_altvoltageY_rms_raw +KernelVersion: 6.18 +Contact: linux-iio@vger.kernel.org +Description: + Raw (unscaled) Root Mean Square (RMS) voltage measurement from + channel Y. Units after application of scale and offset are + millivolts. + What: /sys/bus/iio/devices/iio:deviceX/in_powerY_raw +What: /sys/bus/iio/devices/iio:deviceX/in_powerY_active_raw +What: /sys/bus/iio/devices/iio:deviceX/in_powerY_reactive_raw +What: /sys/bus/iio/devices/iio:deviceX/in_powerY_apparent_raw KernelVersion: 4.5 Contact: linux-iio@vger.kernel.org Description: @@ -176,6 +187,13 @@ Description: unique to allow association with event codes. Units after application of scale and offset are milliwatts. +What: /sys/bus/iio/devices/iio:deviceX/in_powerY_powerfactor +KernelVersion: 6.18 +Contact: linux-iio@vger.kernel.org +Description: + Power factor measurement from channel Y. Power factor is the + ratio of active power to apparent power. The value is unitless. + What: /sys/bus/iio/devices/iio:deviceX/in_capacitanceY_raw KernelVersion: 3.2 Contact: linux-iio@vger.kernel.org @@ -1569,6 +1587,9 @@ Description: What: /sys/.../iio:deviceX/in_energy_input What: /sys/.../iio:deviceX/in_energy_raw +What: /sys/.../iio:deviceX/in_energyY_active_raw +What: /sys/.../iio:deviceX/in_energyY_reactive_raw +What: /sys/.../iio:deviceX/in_energyY_apparent_raw KernelVersion: 4.0 Contact: linux-iio@vger.kernel.org Description: @@ -1707,6 +1728,14 @@ Description: component of the signal while the 'q' channel contains the quadrature component. +What: /sys/bus/iio/devices/iio:deviceX/in_altcurrentY_rms_raw +KernelVersion: 6.18 +Contact: linux-iio@vger.kernel.org +Description: + Raw (unscaled no bias removal etc.) Root Mean Square (RMS) current + measurement from channel Y. Units after application of scale and + offset are milliamps. + What: /sys/.../iio:deviceX/in_energy_en What: /sys/.../iio:deviceX/in_distance_en What: /sys/.../iio:deviceX/in_velocity_sqrt(x^2+y^2+z^2)_en -- cgit v1.2.3 From a29d1137efd9c20b6801caf14f3b7a1053e75839 Mon Sep 17 00:00:00 2001 From: Antoniu Miclaus Date: Mon, 8 Sep 2025 07:35:23 +0000 Subject: dt-bindings: iio: adc: add ade9000 Add devicetree bindings support for ade9000. Signed-off-by: Antoniu Miclaus Reviewed-by: Conor Dooley Signed-off-by: Jonathan Cameron --- .../devicetree/bindings/iio/adc/adi,ade9000.yaml | 95 ++++++++++++++++++++++ 1 file changed, 95 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ade9000.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ade9000.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ade9000.yaml new file mode 100644 index 000000000000..bd429552d568 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/adi,ade9000.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2025 Analog Devices Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ade9000.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADE9000 High Performance, Polyphase Energy Metering + +maintainers: + - Antoniu Miclaus + +description: | + The ADE9000 is a highly accurate, fully integrated, multiphase energy and power + quality monitoring device. Superior analog performance and a digital signal + processing (DSP) core enable accurate energy monitoring over a wide dynamic + range. An integrated high end reference ensures low drift over temperature + with a combined drift of less than ±25 ppm/°C maximum for the entire channel + including a programmable gain amplifier (PGA) and an analog-to-digital + converter (ADC). + + https://www.analog.com/media/en/technical-documentation/data-sheets/ADE9000.pdf + +$ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + enum: + - adi,ade9000 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 20000000 + + interrupts: + maxItems: 3 + + interrupt-names: + items: + enum: [irq0, irq1, dready] + minItems: 1 + maxItems: 3 + + reset-gpios: + description: + Must be the device tree identifier of the RESET pin. As the line is + active low, it should be marked GPIO_ACTIVE_LOW. + maxItems: 1 + + vdd-supply: true + + vref-supply: true + + clocks: + description: External clock source when not using crystal + maxItems: 1 + + + "#clock-cells": + description: + ADE9000 can provide clock output via CLKOUT pin with external buffer. + const: 0 + +required: + - compatible + - reg + - vdd-supply + +unevaluatedProperties: false + +examples: + - | + #include + #include + + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ade9000"; + reg = <0>; + spi-max-frequency = <7000000>; + + #clock-cells = <0>; + reset-gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + interrupts = <2 IRQ_TYPE_EDGE_FALLING>, <3 IRQ_TYPE_EDGE_FALLING>, <4 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "irq0", "irq1", "dready"; + interrupt-parent = <&gpio>; + clocks = <&ext_clock_24576khz>; + vdd-supply = <&vdd_reg>; + }; + }; -- cgit v1.2.3 From 942ab02bc96f4a03c5221a8855d5fb0d27515e6a Mon Sep 17 00:00:00 2001 From: Antoniu Miclaus Date: Mon, 8 Sep 2025 07:35:25 +0000 Subject: docs: iio: add documentation for ade9000 driver Add documentation for ade9000 driver which describes the driver device files and shows how the user may use the ABI for various scenarios (configuration, measurement, etc.). Signed-off-by: Antoniu Miclaus Signed-off-by: Jonathan Cameron --- Documentation/iio/ade9000.rst | 268 ++++++++++++++++++++++++++++++++++++++++++ Documentation/iio/index.rst | 1 + 2 files changed, 269 insertions(+) create mode 100644 Documentation/iio/ade9000.rst (limited to 'Documentation') diff --git a/Documentation/iio/ade9000.rst b/Documentation/iio/ade9000.rst new file mode 100644 index 000000000000..43d4b8dc1cb7 --- /dev/null +++ b/Documentation/iio/ade9000.rst @@ -0,0 +1,268 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=============== +ADE9000 driver +=============== + +This driver supports Analog Device's ADE9000 energy measurement IC on SPI bus. + +1. Supported devices +==================== + +* `ADE9000 `_ + +The ADE9000 is a highly accurate, fully integrated, multiphase energy and power +quality monitoring device. Superior analog performance and a digital signal +processing (DSP) core enable accurate energy monitoring over a wide dynamic +range. An integrated high end reference ensures low drift over temperature +with a combined drift of less than ±25 ppm/°C maximum for the entire channel +including a programmable gain amplifier (PGA) and an analog-to-digital +converter (ADC). + +2. Device attributes +==================== + +Power and energy measurements are provided for voltage, current, active power, +reactive power, apparent power, and power factor across three phases. + +Each IIO device has a device folder under ``/sys/bus/iio/devices/iio:deviceX``, +where X is the IIO index of the device. Under these folders reside a set of +device files, depending on the characteristics and features of the hardware +device in question. These files are consistently generalized and documented in +the IIO ABI documentation. + +The following tables show the ADE9000 related device files, found in the +specific device folder path ``/sys/bus/iio/devices/iio:deviceX``. + ++---------------------------------------------------+----------------------------------------------------------+ +| Current measurement related device files | Description | ++---------------------------------------------------+----------------------------------------------------------+ +| in_current[0-2]_raw | Raw current measurement for phases A, B, C. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_current[0-2]_scale | Scale for current channels. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_current[0-2]_calibscale | Calibration gain for current channels (AIGAIN reg). | ++---------------------------------------------------+----------------------------------------------------------+ +| in_altcurrent[0-2]_rms_raw | RMS current measurement for phases A, B, C. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_altcurrent[0-2]_rms_scale | Scale for RMS current channels. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_altcurrent[0-2]_rms_calibbias | RMS offset correction for current channels (IRMSOS reg). | ++---------------------------------------------------+----------------------------------------------------------+ + ++---------------------------------------------------+----------------------------------------------------------+ +| Voltage measurement related device files | Description | ++---------------------------------------------------+----------------------------------------------------------+ +| in_voltage[0-2]_raw | Raw voltage measurement for phases A, B, C. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_voltage[0-2]_scale | Scale for voltage channels. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_voltage[0-2]_calibscale | Calibration gain for voltage channels (AVGAIN reg). | ++---------------------------------------------------+----------------------------------------------------------+ +| in_voltage[0-2]_frequency | Measured line frequency from instantaneous voltage. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_altvoltage[0-2]_rms_raw | RMS voltage measurement for phases A, B, C. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_altvoltage[0-2]_rms_scale | Scale for RMS voltage channels. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_altvoltage[0-2]_rms_calibbias | RMS offset correction for voltage channels (VRMSOS reg). | ++---------------------------------------------------+----------------------------------------------------------+ + ++---------------------------------------------------+----------------------------------------------------------+ +| Power measurement related device files | Description | ++---------------------------------------------------+----------------------------------------------------------+ +| in_power[0-2]_active_raw | Active power measurement for phases A, B, C. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_power[0-2]_active_scale | Scale for active power channels. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_power[0-2]_active_calibbias | Calibration offset for active power (xWATTOS regs). | ++---------------------------------------------------+----------------------------------------------------------+ +| in_power[0-2]_active_calibscale | Calibration gain for active power (APGAIN reg). | ++---------------------------------------------------+----------------------------------------------------------+ +| in_power[0-2]_reactive_raw | Reactive power measurement for phases A, B, C. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_power[0-2]_reactive_scale | Scale for reactive power channels. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_power[0-2]_reactive_calibbias | Calibration offset for reactive power (xVAROS regs). | ++---------------------------------------------------+----------------------------------------------------------+ +| in_power[0-2]_apparent_raw | Apparent power measurement for phases A, B, C. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_power[0-2]_apparent_scale | Scale for apparent power channels. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_power[0-2]_powerfactor | Power factor for phases A, B, C. | ++---------------------------------------------------+----------------------------------------------------------+ + ++---------------------------------------------------+----------------------------------------------------------+ +| Energy measurement related device files | Description | ++---------------------------------------------------+----------------------------------------------------------+ +| in_energy[0-2]_active_raw | Active energy measurement for phases A, B, C. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_energy[0-2]_reactive_raw | Reactive energy measurement for phases A, B, C. | ++---------------------------------------------------+----------------------------------------------------------+ +| in_energy[0-2]_apparent_raw | Apparent energy measurement for phases A, B, C. | ++---------------------------------------------------+----------------------------------------------------------+ + ++------------------------------+------------------------------------------------------------------+ +| Shared device attributes | Description | ++------------------------------+------------------------------------------------------------------+ +| name | Name of the IIO device. | ++------------------------------+------------------------------------------------------------------+ +| filter_type | Waveform buffer filter type (sinc4, sinc4+lp). | ++------------------------------+------------------------------------------------------------------+ +| filter_type_available | Available filter types for waveform buffer. | ++------------------------------+------------------------------------------------------------------+ + +3. Calibration and scaling +=========================== + +The ADE9000 provides multiple levels of gain and offset correction: + +**Calibration Gain (per-channel)** + Fine-tuning calibration gains applied in the digital domain for each channel type. + Controlled via ``calibscale`` attributes (AIGAIN, AVGAIN, APGAIN registers). + +**Calibration Bias (per-channel)** + Hardware calibration offsets applied by the device internally: + + - Power measurements: Controlled via ``calibbias`` attributes for power channels (xWATTOS, xVAROS registers). + - RMS measurements: Controlled via ``calibbias`` attributes for RMS channels (IRMSOS, VRMSOS registers). + + These are internal chip calibrations, not userspace-applied offsets. + +4. Event attributes +=================== + +The ADE9000 provides various interrupts that are mapped to IIO events. +Event functionality is only available if the corresponding interrupts are +connected in the device tree. + ++---------------------------------------------------+----------------------------------------------------------+ +| IIO Event Attribute | ADE9000 Datasheet Equivalent | ++---------------------------------------------------+----------------------------------------------------------+ +| in_voltage[0-2]_thresh_either_en | Zero crossing detection interrupt (ZXVx) | ++---------------------------------------------------+----------------------------------------------------------+ +| in_altvoltage[0-2]_rms_thresh_rising_en | RMS swell detection interrupt (SWELLx) | ++---------------------------------------------------+----------------------------------------------------------+ +| in_altvoltage[0-2]_rms_thresh_rising_value | RMS swell threshold (SWELL_LVL register) | ++---------------------------------------------------+----------------------------------------------------------+ +| in_altvoltage[0-2]_rms_thresh_falling_en | RMS sag/dip detection interrupt (DIPx) | ++---------------------------------------------------+----------------------------------------------------------+ +| in_altvoltage[0-2]_rms_thresh_falling_value | RMS sag/dip threshold (DIP_LVL register) | ++---------------------------------------------------+----------------------------------------------------------+ +| in_current[0-2]_thresh_either_en | Current zero crossing detection interrupt (ZXIx) | ++---------------------------------------------------+----------------------------------------------------------+ + +Event directions: + +- ``rising``: Upper threshold crossing (swell detection) +- ``falling``: Lower threshold crossing (sag/dip detection) +- ``either``: Any threshold crossing (zero crossing detection) +- ``none``: Timeout or non-directional events + +**Note**: Event attributes are only available if the corresponding interrupts +(irq0, irq1, dready) are specified in the device tree. The driver works without +interrupts but with reduced functionality. + +5. Device buffers +================= + +This driver supports IIO buffers for waveform capture. Buffer functionality +requires the dready interrupt to be connected. + +The device supports capturing voltage and current waveforms for power quality +analysis. The waveform buffer can be configured to capture data from different +channel combinations. + +Supported channel combinations for buffered capture: + +- Phase A: voltage and current (IA + VA) +- Phase B: voltage and current (IB + VB) +- Phase C: voltage and current (IC + VC) +- All phases: all voltage and current channels +- Individual channels: IA, VA, IB, VB, IC, VC + +Usage examples +-------------- + +Enable waveform capture for Phase A: + +.. code-block:: bash + + root:/sys/bus/iio/devices/iio:device0> echo 1 > scan_elements/in_current0_en + root:/sys/bus/iio/devices/iio:device0> echo 1 > scan_elements/in_voltage0_en + +Set buffer length and enable: + +.. code-block:: bash + + root:/sys/bus/iio/devices/iio:device0> echo 100 > buffer/length + root:/sys/bus/iio/devices/iio:device0> echo 1 > buffer/enable + +6. Clock output +=============== + +The ADE9000 can provide a clock output via the CLKOUT pin when using an external +crystal/clock source. This feature is enabled by specifying ``#clock-cells = <0>`` +in the device tree. The output clock will be registered as "clkout" and can be +referenced by other devices. + +7. Usage examples +================= + +Show device name: + +.. code-block:: bash + + root:/sys/bus/iio/devices/iio:device0> cat name + ade9000 + +Read voltage measurements: + +.. code-block:: bash + + root:/sys/bus/iio/devices/iio:device0> cat in_voltage0_raw + 12345 + root:/sys/bus/iio/devices/iio:device0> cat in_voltage0_scale + 0.000030517 + +- Phase A voltage = in_voltage0_raw * in_voltage0_scale = 0.3769 V + +Read power measurements: + +.. code-block:: bash + + root:/sys/bus/iio/devices/iio:device0> cat in_power0_active_raw + 5678 + root:/sys/bus/iio/devices/iio:device0> cat in_power0_scale + 0.000244140 + +- Phase A active power = in_power0_active_raw * in_power0_scale = 1.386 W + +Configure calibration gains: + +.. code-block:: bash + + # Set current channel 0 calibration gain + root:/sys/bus/iio/devices/iio:device0> echo 0x800000 > in_current0_calibscale + # Set voltage channel 0 calibration gain + root:/sys/bus/iio/devices/iio:device0> echo 0x7FFFFF > in_voltage0_calibscale + +Configure RMS voltage event thresholds (requires interrupts): + +.. code-block:: bash + + # Set RMS sag detection threshold + root:/sys/bus/iio/devices/iio:device0> echo 180000 > events/in_altvoltage0_rms_thresh_falling_value + # Enable RMS sag detection + root:/sys/bus/iio/devices/iio:device0> echo 1 > events/in_altvoltage0_rms_thresh_falling_en + + # Set RMS swell detection threshold + root:/sys/bus/iio/devices/iio:device0> echo 260000 > events/in_altvoltage0_rms_thresh_rising_value + # Enable RMS swell detection + root:/sys/bus/iio/devices/iio:device0> echo 1 > events/in_altvoltage0_rms_thresh_rising_en + +8. IIO Interfacing Tools +======================== + +See ``Documentation/iio/iio_tools.rst`` for the description of the available IIO +interfacing tools. diff --git a/Documentation/iio/index.rst b/Documentation/iio/index.rst index 9d34d9c89c43..315ae37d6fd4 100644 --- a/Documentation/iio/index.rst +++ b/Documentation/iio/index.rst @@ -28,6 +28,7 @@ Industrial I/O Kernel Drivers ad7606 ad7625 ad7944 + ade9000 adis16475 adis16480 adis16550 -- cgit v1.2.3 From ee905c92feb469daac1b48ae0db026f528f8b5f7 Mon Sep 17 00:00:00 2001 From: Antoniu Miclaus Date: Mon, 8 Sep 2025 07:35:26 +0000 Subject: Documentation: ABI: iio: add sinc4+lp Add new filter type to the sysfs-bus-iio ABI documentation: - "sinc4+lp" for Sinc4 + Low Pass Filter Signed-off-by: Antoniu Miclaus Signed-off-by: Jonathan Cameron --- Documentation/ABI/testing/sysfs-bus-iio | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio index 78da68826307..cb300135b4c4 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio +++ b/Documentation/ABI/testing/sysfs-bus-iio @@ -2319,6 +2319,7 @@ Description: time. * "sinc4" - Sinc 4. Excellent noise performance. Long 1st conversion time. + * "sinc4+lp" - Sinc4 + Low Pass Filter. * "sinc4+sinc1" - Sinc4 + averaging by 8. Low 1st conversion time. * "sinc5" - The digital sinc5 filter. Excellent noise -- cgit v1.2.3 From 29cc0ac502a4804e624ffe152d720ba7dd28703c Mon Sep 17 00:00:00 2001 From: David Lechner Date: Thu, 11 Sep 2025 16:42:05 -0500 Subject: iio: ABI: document "sinc4+rej60" filter_type Add a bullet point for "sinc4+rej60" filter_type that is used in the ad7124 driver. Signed-off-by: David Lechner Reviewed-by: Andy Shevchenko Signed-off-by: Jonathan Cameron --- Documentation/ABI/testing/sysfs-bus-iio | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio index cb300135b4c4..43ca01251c4e 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio +++ b/Documentation/ABI/testing/sysfs-bus-iio @@ -2322,6 +2322,7 @@ Description: * "sinc4+lp" - Sinc4 + Low Pass Filter. * "sinc4+sinc1" - Sinc4 + averaging by 8. Low 1st conversion time. + * "sinc4+rej60" - Sinc4 + 60Hz rejection. * "sinc5" - The digital sinc5 filter. Excellent noise performance * "sinc5+avg" - Sinc5 + averaging by 4. -- cgit v1.2.3 From 0f06e28747b3d896b9c71c2a7e9f48061755162b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= Date: Thu, 11 Sep 2025 14:43:44 +0200 Subject: dt-bindings: mfd: 88pm886: Add #io-channel-cells MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add an #io-channel-cells property to the Marvell 88PM886 PMIC binding to allow referencing the IO channels exposed by its GPADC. Acked-by: Karel Balej # for the PMIC Acked-by: Krzysztof Kozlowski Signed-off-by: Duje Mihanović Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/mfd/marvell,88pm886-a1.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/marvell,88pm886-a1.yaml b/Documentation/devicetree/bindings/mfd/marvell,88pm886-a1.yaml index d6a71c912b76..92a72a99fd79 100644 --- a/Documentation/devicetree/bindings/mfd/marvell,88pm886-a1.yaml +++ b/Documentation/devicetree/bindings/mfd/marvell,88pm886-a1.yaml @@ -35,6 +35,9 @@ properties: description: LDO or buck regulator. unevaluatedProperties: false + '#io-channel-cells': + const: 1 + required: - compatible - reg @@ -53,6 +56,7 @@ examples: reg = <0x30>; interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&gic>; + #io-channel-cells = <1>; wakeup-source; regulators { -- cgit v1.2.3 From bf99115eb2b8e7022e497290c1d4c585b56a6926 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 12 Sep 2025 14:09:33 -0500 Subject: iio: ABI: add filter types for ad7173 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add new filter types used in the ad7173 driver to the IIO ABI documentation. These chips have a few filter types that haven't been seen before in other drivers. Reviewed-by: Nuno Sá Signed-off-by: David Lechner Signed-off-by: Jonathan Cameron --- Documentation/ABI/testing/sysfs-bus-iio | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio index 43ca01251c4e..89b4740dcfa1 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio +++ b/Documentation/ABI/testing/sysfs-bus-iio @@ -2327,6 +2327,11 @@ Description: performance * "sinc5+avg" - Sinc5 + averaging by 4. * "sinc5+pf1" - Sinc5 + device specific Post Filter 1. + * "sinc5+sinc1" - Sinc5 + Sinc1. + * "sinc5+sinc1+pf1" - Sinc5 + Sinc1 + device specific Post Filter 1. + * "sinc5+sinc1+pf2" - Sinc5 + Sinc1 + device specific Post Filter 2. + * "sinc5+sinc1+pf3" - Sinc5 + Sinc1 + device specific Post Filter 3. + * "sinc5+sinc1+pf4" - Sinc5 + Sinc1 + device specific Post Filter 4. * "wideband" - filter with wideband low ripple passband and sharp transition band. -- cgit v1.2.3 From a841614e607c9e232dd56ec726ba63d2750025a2 Mon Sep 17 00:00:00 2001 From: Alexandre Courbot Date: Sat, 13 Sep 2025 23:12:20 +0900 Subject: gpu: nova-core: firmware: process and prepare the GSP firmware The GSP firmware is a binary blob that is verified, loaded, and run by the GSP bootloader. Its presentation is a bit peculiar as the GSP bootloader expects to be given a DMA address to a 3-levels page table mapping the GSP firmware at address 0 of its own address space. Prepare such a structure containing the DMA-mapped firmware as well as the DMA-mapped page tables, and a way to obtain the DMA handle of the level 0 page table. Then, move the GSP firmware instance from the `Firmware` struct to the `start_gsp` method since it doesn't need to be kept after the GSP is booted. As we are performing the required ELF section parsing and radix3 page table building, remove these items from the TODO file. Acked-by: Danilo Krummrich Link: https://lore.kernel.org/r/20250913-nova_firmware-v6-7-9007079548b0@nvidia.com Signed-off-by: Alexandre Courbot --- Documentation/gpu/nova/core/todo.rst | 17 ----------------- 1 file changed, 17 deletions(-) (limited to 'Documentation') diff --git a/Documentation/gpu/nova/core/todo.rst b/Documentation/gpu/nova/core/todo.rst index 48b20656dcb1..091a2fb78c6b 100644 --- a/Documentation/gpu/nova/core/todo.rst +++ b/Documentation/gpu/nova/core/todo.rst @@ -230,23 +230,6 @@ Rust abstraction for debugfs APIs. GPU (general) ============= -Parse firmware headers ----------------------- - -Parse ELF headers from the firmware files loaded from the filesystem. - -| Reference: ELF utils -| Complexity: Beginner -| Contact: Abdiel Janulgue - -Build radix3 page table ------------------------ - -Build the radix3 page table to map the firmware. - -| Complexity: Intermediate -| Contact: Abdiel Janulgue - Initial Devinit support ----------------------- -- cgit v1.2.3 From 7bca1760cd86b9ef62d4c2baf168b68a708011bd Mon Sep 17 00:00:00 2001 From: Sang-Heon Jeon Date: Sun, 10 Aug 2025 12:25:47 -0700 Subject: docs/mm/damon/design: fix typo: s/sz_trtied/sz_tried/ There are some typo in statistics section of DAMON design docs - sz_trtied -> sz_tried Link: https://lkml.kernel.org/r/20250729144414.31958-1-ekffu200098@gmail.com Signed-off-by: Sang-Heon Jeon Signed-off-by: SeongJae Park Reviewed-by: SeongJae Park Reviewed-by: Dev Jain Reviewed-by: Honggyu Kim Signed-off-by: Andrew Morton --- Documentation/mm/damon/design.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/mm/damon/design.rst b/Documentation/mm/damon/design.rst index 03f8137256f5..2f6ba5c7f4c7 100644 --- a/Documentation/mm/damon/design.rst +++ b/Documentation/mm/damon/design.rst @@ -689,7 +689,7 @@ DAMOS accounts below statistics for each scheme, from the beginning of the scheme's execution. - ``nr_tried``: Total number of regions that the scheme is tried to be applied. -- ``sz_trtied``: Total size of regions that the scheme is tried to be applied. +- ``sz_tried``: Total size of regions that the scheme is tried to be applied. - ``sz_ops_filter_passed``: Total bytes that passed operations set layer-handled DAMOS filters. - ``nr_applied``: Total number of regions that the scheme is applied. -- cgit v1.2.3 From 9dc21bbd62edeae6f63e6f25e1edb7167452457b Mon Sep 17 00:00:00 2001 From: David Hildenbrand Date: Fri, 15 Aug 2025 14:54:53 +0100 Subject: prctl: extend PR_SET_THP_DISABLE to optionally exclude VM_HUGEPAGE Patch series "prctl: extend PR_SET_THP_DISABLE to only provide THPs when advised", v5. This will allow individual processes to opt-out of THP = "always" into THP = "madvise", without affecting other workloads on the system. This has been extensively discussed on the mailing list and has been summarized very well by David in the first patch which also includes the links to alternatives, please refer to the first patch commit message for the motivation for this series. Patch 1 adds the PR_THP_DISABLE_EXCEPT_ADVISED flag to implement this, along with the MMF changes. Patch 2 is a cleanup patch for tva_flags that will allow the forced collapse case to be transmitted to vma_thp_disabled (which is done in patch 3). Patch 4 adds documentation for PR_SET_THP_DISABLE/PR_GET_THP_DISABLE. Patches 6-7 implement the selftests for PR_SET_THP_DISABLE for completely disabling THPs (old behaviour) and only enabling it at advise (PR_THP_DISABLE_EXCEPT_ADVISED). This patch (of 7): People want to make use of more THPs, for example, moving from the "never" system policy to "madvise", or from "madvise" to "always". While this is great news for every THP desperately waiting to get allocated out there, apparently there are some workloads that require a bit of care during that transition: individual processes may need to opt-out from this behavior for various reasons, and this should be permitted without needing to make all other workloads on the system similarly opt-out. The following scenarios are imaginable: (1) Switch from "none" system policy to "madvise"/"always", but keep THPs disabled for selected workloads. (2) Stay at "none" system policy, but enable THPs for selected workloads, making only these workloads use the "madvise" or "always" policy. (3) Switch from "madvise" system policy to "always", but keep the "madvise" policy for selected workloads: allocate THPs only when advised. (4) Stay at "madvise" system policy, but enable THPs even when not advised for selected workloads -- "always" policy. Once can emulate (2) through (1), by setting the system policy to "madvise"/"always" while disabling THPs for all processes that don't want THPs. It requires configuring all workloads, but that is a user-space problem to sort out. (4) can be emulated through (3) in a similar way. Back when (1) was relevant in the past, as people started enabling THPs, we added PR_SET_THP_DISABLE, so relevant workloads that were not ready yet (i.e., used by Redis) were able to just disable THPs completely. Redis still implements the option to use this interface to disable THPs completely. With PR_SET_THP_DISABLE, we added a way to force-disable THPs for a workload -- a process, including fork+exec'ed process hierarchy. That essentially made us support (1): simply disable THPs for all workloads that are not ready for THPs yet, while still enabling THPs system-wide. The quest for handling (3) and (4) started, but current approaches (completely new prctl, options to set other policies per process, alternatives to prctl -- mctrl, cgroup handling) don't look particularly promising. Likely, the future will use bpf or something similar to implement better policies, in particular to also make better decisions about THP sizes to use, but this will certainly take a while as that work just started. Long story short: a simple enable/disable is not really suitable for the future, so we're not willing to add completely new toggles. While we could emulate (3)+(4) through (1)+(2) by simply disabling THPs completely for these processes, this is a step backwards, because these processes can no longer allocate THPs in regions where THPs were explicitly advised: regions flagged as VM_HUGEPAGE. Apparently, that imposes a problem for relevant workloads, because "not THPs" is certainly worse than "THPs only when advised". Could we simply relax PR_SET_THP_DISABLE, to "disable THPs unless not explicitly advised by the app through MAD_HUGEPAGE"? *maybe*, but this would change the documented semantics quite a bit, and the versatility to use it for debugging purposes, so I am not 100% sure that is what we want -- although it would certainly be much easier. So instead, as an easy way forward for (3) and (4), add an option to make PR_SET_THP_DISABLE disable *less* THPs for a process. In essence, this patch: (A) Adds PR_THP_DISABLE_EXCEPT_ADVISED, to be used as a flag in arg3 of prctl(PR_SET_THP_DISABLE) when disabling THPs (arg2 != 0). prctl(PR_SET_THP_DISABLE, 1, PR_THP_DISABLE_EXCEPT_ADVISED). (B) Makes prctl(PR_GET_THP_DISABLE) return 3 if PR_THP_DISABLE_EXCEPT_ADVISED was set while disabling. Previously, it would return 1 if THPs were disabled completely. Now it returns the set flags as well: 3 if PR_THP_DISABLE_EXCEPT_ADVISED was set. (C) Renames MMF_DISABLE_THP to MMF_DISABLE_THP_COMPLETELY, to express the semantics clearly. Fortunately, there are only two instances outside of prctl() code. (D) Adds MMF_DISABLE_THP_EXCEPT_ADVISED to express "no THP except for VMAs with VM_HUGEPAGE" -- essentially "thp=madvise" behavior Fortunately, we only have to extend vma_thp_disabled(). (E) Indicates "THP_enabled: 0" in /proc/pid/status only if THPs are disabled completely Only indicating that THPs are disabled when they are really disabled completely, not only partially. For now, we don't add another interface to obtained whether THPs are disabled partially (PR_THP_DISABLE_EXCEPT_ADVISED was set). If ever required, we could add a new entry. The documented semantics in the man page for PR_SET_THP_DISABLE "is inherited by a child created via fork(2) and is preserved across execve(2)" is maintained. This behavior, for example, allows for disabling THPs for a workload through the launching process (e.g., systemd where we fork() a helper process to then exec()). For now, MADV_COLLAPSE will *fail* in regions without VM_HUGEPAGE and VM_NOHUGEPAGE. As MADV_COLLAPSE is a clear advise that user space thinks a THP is a good idea, we'll enable that separately next (requiring a bit of cleanup first). There is currently not way to prevent that a process will not issue PR_SET_THP_DISABLE itself to re-enable THP. There are not really known users for re-enabling it, and it's against the purpose of the original interface. So if ever required, we could investigate just forbidding to re-enable them, or make this somehow configurable. Link: https://lkml.kernel.org/r/20250815135549.130506-1-usamaarif642@gmail.com Link: https://lkml.kernel.org/r/20250815135549.130506-2-usamaarif642@gmail.com Acked-by: Zi Yan Acked-by: Usama Arif Tested-by: Usama Arif Signed-off-by: David Hildenbrand Reviewed-by: Lorenzo Stoakes Signed-off-by: Usama Arif Cc: Arnd Bergmann Cc: Baolin Wang Cc: Barry Song Cc: Dev Jain Cc: Jann Horn Cc: Johannes Weiner Cc: Jonathan Corbet Cc: Liam Howlett Cc: Mariano Pache Cc: Michal Hocko Cc: Mike Rapoport Cc: Rik van Riel Cc: Ryan Roberts Cc: SeongJae Park Cc: Shakeel Butt Cc: Suren Baghdasaryan Cc: Vlastimil Babka Cc: Yafang Signed-off-by: Andrew Morton --- Documentation/filesystems/proc.rst | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/proc.rst b/Documentation/filesystems/proc.rst index 2971551b7235..915a3e44bc12 100644 --- a/Documentation/filesystems/proc.rst +++ b/Documentation/filesystems/proc.rst @@ -291,8 +291,9 @@ It's slow but very precise. HugetlbPages size of hugetlb memory portions CoreDumping process's memory is currently being dumped (killing the process may lead to a corrupted core) - THP_enabled process is allowed to use THP (returns 0 when - PR_SET_THP_DISABLE is set on the process + THP_enabled process is allowed to use THP (returns 0 when + PR_SET_THP_DISABLE is set on the process to disable + THP completely, not just partially) Threads number of threads SigQ number of signals queued/max. number for queue SigPnd bitmap of pending signals for the thread -- cgit v1.2.3 From 7de854910bcb7aca917223caf9feec23035d4c26 Mon Sep 17 00:00:00 2001 From: Usama Arif Date: Fri, 15 Aug 2025 14:54:56 +0100 Subject: docs: transhuge: document process level THP controls This includes the PR_SET_THP_DISABLE/PR_GET_THP_DISABLE pair of prctl calls as well the newly introduced PR_THP_DISABLE_EXCEPT_ADVISED flag for the PR_SET_THP_DISABLE prctl call. Link: https://lkml.kernel.org/r/20250815135549.130506-5-usamaarif642@gmail.com Signed-off-by: Usama Arif Reviewed-by: Lorenzo Stoakes Reviewed-by: Zi Yan Cc: Arnd Bergmann Cc: Baolin Wang Cc: Barry Song Cc: David Hildenbrand Cc: Dev Jain Cc: Jann Horn Cc: Johannes Weiner Cc: Jonathan Corbet Cc: Liam Howlett Cc: Mariano Pache Cc: Michal Hocko Cc: Mike Rapoport Cc: Rik van Riel Cc: Ryan Roberts Cc: SeongJae Park Cc: Shakeel Butt Cc: Suren Baghdasaryan Cc: Vlastimil Babka Cc: Yafang Signed-off-by: Andrew Morton --- Documentation/admin-guide/mm/transhuge.rst | 36 ++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/mm/transhuge.rst b/Documentation/admin-guide/mm/transhuge.rst index 370fba113460..a16a04841b96 100644 --- a/Documentation/admin-guide/mm/transhuge.rst +++ b/Documentation/admin-guide/mm/transhuge.rst @@ -225,6 +225,42 @@ to "always" or "madvise"), and it'll be automatically shutdown when PMD-sized THP is disabled (when both the per-size anon control and the top-level control are "never") +process THP controls +-------------------- + +A process can control its own THP behaviour using the ``PR_SET_THP_DISABLE`` +and ``PR_GET_THP_DISABLE`` pair of prctl(2) calls. The THP behaviour set using +``PR_SET_THP_DISABLE`` is inherited across fork(2) and execve(2). These calls +support the following arguments:: + + prctl(PR_SET_THP_DISABLE, 1, 0, 0, 0): + This will disable THPs completely for the process, irrespective + of global THP controls or madvise(..., MADV_COLLAPSE) being used. + + prctl(PR_SET_THP_DISABLE, 1, PR_THP_DISABLE_EXCEPT_ADVISED, 0, 0): + This will disable THPs for the process except when the usage of THPs is + advised. Consequently, THPs will only be used when: + - Global THP controls are set to "always" or "madvise" and + madvise(..., MADV_HUGEPAGE) or madvise(..., MADV_COLLAPSE) is used. + - Global THP controls are set to "never" and madvise(..., MADV_COLLAPSE) + is used. This is the same behavior as if THPs would not be disabled on + a process level. + Note that MADV_COLLAPSE is currently always rejected if + madvise(..., MADV_NOHUGEPAGE) is set on an area. + + prctl(PR_SET_THP_DISABLE, 0, 0, 0, 0): + This will re-enable THPs for the process, as if they were never disabled. + Whether THPs will actually be used depends on global THP controls and + madvise() calls. + + prctl(PR_GET_THP_DISABLE, 0, 0, 0, 0): + This returns a value whose bits indicate how THP-disable is configured: + Bits + 1 0 Value Description + |0|0| 0 No THP-disable behaviour specified. + |0|1| 1 THP is entirely disabled for this process. + |1|1| 3 THP-except-advised mode is set for this process. + Khugepaged controls ------------------- -- cgit v1.2.3 From 7b06c471afc8d82c9c246532b74c4ad4db2890d2 Mon Sep 17 00:00:00 2001 From: SeongJae Park Date: Thu, 28 Aug 2025 10:12:39 -0700 Subject: Docs/mm/damon/design: document 'address unit' parameter Add 'addr_unit' parameter description on DAMON design document. Link: https://lkml.kernel.org/r/20250828171242.59810-9-sj@kernel.org Signed-off-by: SeongJae Park Signed-off-by: Quanmin Yan Reviewed-by: SeongJae Park Cc: David Hildenbrand Cc: Jonathan Corbet Cc: Kefeng Wang Cc: Liam Howlett Cc: Lorenzo Stoakes Cc: Michal Hocko Cc: Mike Rapoport Cc: Suren Baghdasaryan Cc: Vlastimil Babka Cc: ze zuo Signed-off-by: Andrew Morton --- Documentation/mm/damon/design.rst | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/mm/damon/design.rst b/Documentation/mm/damon/design.rst index 2f6ba5c7f4c7..d9d5baa1ec87 100644 --- a/Documentation/mm/damon/design.rst +++ b/Documentation/mm/damon/design.rst @@ -67,7 +67,7 @@ processes, NUMA nodes, files, and backing memory devices would be supportable. Also, if some architectures or devices support special optimized access check features, those will be easily configurable. -DAMON currently provides below three operation sets. Below two subsections +DAMON currently provides below three operation sets. Below three subsections describe how those work. - vaddr: Monitor virtual address spaces of specific processes @@ -135,6 +135,18 @@ the interference is the responsibility of sysadmins. However, it solves the conflict with the reclaim logic using ``PG_idle`` and ``PG_young`` page flags, as Idle page tracking does. +Address Unit +------------ + +DAMON core layer uses ``unsinged long`` type for monitoring target address +ranges. In some cases, the address space for a given operations set could be +too large to be handled with the type. ARM (32-bit) with large physical +address extension is an example. For such cases, a per-operations set +parameter called ``address unit`` is provided. It represents the scale factor +that need to be multiplied to the core layer's address for calculating real +address on the given address space. Support of ``address unit`` parameter is +up to each operations set implementation. ``paddr`` is the only operations set +implementation that supports the parameter. .. _damon_core_logic: -- cgit v1.2.3 From e0c725455fd5a042a50f029c24738ee60b5e1516 Mon Sep 17 00:00:00 2001 From: SeongJae Park Date: Thu, 28 Aug 2025 10:12:40 -0700 Subject: Docs/admin-guide/mm/damon/usage: document addr_unit file Document addr_unit DAMON sysfs file on DAMON usage document. Link: https://lkml.kernel.org/r/20250828171242.59810-10-sj@kernel.org Signed-off-by: SeongJae Park Signed-off-by: Quanmin Yan Reviewed-by: SeongJae Park Cc: David Hildenbrand Cc: Jonathan Corbet Cc: Kefeng Wang Cc: Liam Howlett Cc: Lorenzo Stoakes Cc: Michal Hocko Cc: Mike Rapoport Cc: Suren Baghdasaryan Cc: Vlastimil Babka Cc: ze zuo Signed-off-by: Andrew Morton --- Documentation/admin-guide/mm/damon/usage.rst | 11 +++++++---- Documentation/mm/damon/design.rst | 2 ++ 2 files changed, 9 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/mm/damon/usage.rst b/Documentation/admin-guide/mm/damon/usage.rst index ff3a2dda1f02..2cae60b6f3ca 100644 --- a/Documentation/admin-guide/mm/damon/usage.rst +++ b/Documentation/admin-guide/mm/damon/usage.rst @@ -61,7 +61,7 @@ comma (","). │ :ref:`kdamonds `/nr_kdamonds │ │ :ref:`0 `/state,pid,refresh_ms │ │ │ :ref:`contexts `/nr_contexts - │ │ │ │ :ref:`0 `/avail_operations,operations + │ │ │ │ :ref:`0 `/avail_operations,operations,addr_unit │ │ │ │ │ :ref:`monitoring_attrs `/ │ │ │ │ │ │ intervals/sample_us,aggr_us,update_us │ │ │ │ │ │ │ intervals_goal/access_bp,aggrs,min_sample_us,max_sample_us @@ -188,9 +188,9 @@ details). At the moment, only one context per kdamond is supported, so only contexts// ------------- -In each context directory, two files (``avail_operations`` and ``operations``) -and three directories (``monitoring_attrs``, ``targets``, and ``schemes``) -exist. +In each context directory, three files (``avail_operations``, ``operations`` +and ``addr_unit``) and three directories (``monitoring_attrs``, ``targets``, +and ``schemes``) exist. DAMON supports multiple types of :ref:`monitoring operations `, including those for virtual address @@ -205,6 +205,9 @@ You can set and get what type of monitoring operations DAMON will use for the context by writing one of the keywords listed in ``avail_operations`` file and reading from the ``operations`` file. +``addr_unit`` file is for setting and getting the :ref:`address unit +` parameter of the operations set. + .. _sysfs_monitoring_attrs: contexts//monitoring_attrs/ diff --git a/Documentation/mm/damon/design.rst b/Documentation/mm/damon/design.rst index d9d5baa1ec87..80354f4f42ba 100644 --- a/Documentation/mm/damon/design.rst +++ b/Documentation/mm/damon/design.rst @@ -135,6 +135,8 @@ the interference is the responsibility of sysadmins. However, it solves the conflict with the reclaim logic using ``PG_idle`` and ``PG_young`` page flags, as Idle page tracking does. +.. _damon_design_addr_unit: + Address Unit ------------ -- cgit v1.2.3 From 56cd19404abae2c17d1e6d1e3c7d23dd79b75039 Mon Sep 17 00:00:00 2001 From: SeongJae Park Date: Thu, 28 Aug 2025 10:12:41 -0700 Subject: Docs/ABI/damon: document addr_unit file Document addr_unit DAMON sysfs file on DAMON ABI document. Link: https://lkml.kernel.org/r/20250828171242.59810-11-sj@kernel.org Signed-off-by: SeongJae Park Signed-off-by: Quanmin Yan Reviewed-by: SeongJae Park Cc: David Hildenbrand Cc: Jonathan Corbet Cc: Kefeng Wang Cc: Liam Howlett Cc: Lorenzo Stoakes Cc: Michal Hocko Cc: Mike Rapoport Cc: Suren Baghdasaryan Cc: Vlastimil Babka Cc: ze zuo Signed-off-by: Andrew Morton --- Documentation/ABI/testing/sysfs-kernel-mm-damon | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-kernel-mm-damon b/Documentation/ABI/testing/sysfs-kernel-mm-damon index 6791d879759e..b6b71db36ca7 100644 --- a/Documentation/ABI/testing/sysfs-kernel-mm-damon +++ b/Documentation/ABI/testing/sysfs-kernel-mm-damon @@ -77,6 +77,13 @@ Description: Writing a keyword for a monitoring operations set ('vaddr' for Note that only the operations sets that listed in 'avail_operations' file are valid inputs. +What: /sys/kernel/mm/damon/admin/kdamonds//contexts//addr_unit +Date: Aug 2025 +Contact: SeongJae Park +Description: Writing an integer to this file sets the 'address unit' + parameter of the given operations set of the context. Reading + the file returns the last-written 'address unit' value. + What: /sys/kernel/mm/damon/admin/kdamonds//contexts//monitoring_attrs/intervals/sample_us Date: Mar 2022 Contact: SeongJae Park -- cgit v1.2.3 From 1455b6ac210d5c094066264e7a6809c3a6a9a4d2 Mon Sep 17 00:00:00 2001 From: Soham Bagchi Date: Mon, 28 Jul 2025 12:43:18 -0600 Subject: kcov: load acquire coverage count in user-space code Update the KCOV documentation to use a load-acquire operation for the first element of the shared memory buffer between kernel-space and user-space. The load-acquire pairs with the write memory barrier used in kcov_move_area(). [soham.bagchi@utah.edu: v2] Link: https://lkml.kernel.org/r/20250803180558.2967962-1-soham.bagchi@utah.edu Link: https://lkml.kernel.org/r/20250728184318.1839137-2-soham.bagchi@utah.edu Signed-off-by: Soham Bagchi Reviewed-by: Marco Elver Cc: Alexander Potapenko Cc: Andrey Konovalov Cc: Arnd Bergmann Cc: Dmitriy Vyukov Cc: Jonathan Corbet Cc: Thomas Gleinxer Signed-off-by: Andrew Morton --- Documentation/dev-tools/kcov.rst | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/dev-tools/kcov.rst b/Documentation/dev-tools/kcov.rst index 6611434e2dd2..8127849d40f5 100644 --- a/Documentation/dev-tools/kcov.rst +++ b/Documentation/dev-tools/kcov.rst @@ -361,7 +361,12 @@ local tasks spawned by the process and the global task that handles USB bus #1: */ sleep(2); - n = __atomic_load_n(&cover[0], __ATOMIC_RELAXED); + /* + * The load to the coverage count should be an acquire to pair with + * pair with the corresponding write memory barrier (smp_wmb()) on + * the kernel-side in kcov_move_area(). + */ + n = __atomic_load_n(&cover[0], __ATOMIC_ACQUIRE); for (i = 0; i < n; i++) printf("0x%lx\n", cover[i + 1]); if (ioctl(fd, KCOV_DISABLE, 0)) -- cgit v1.2.3 From 8c2b91fbb0078b0c33d9031ebbbced04a351ecfe Mon Sep 17 00:00:00 2001 From: Feng Tang Date: Mon, 25 Aug 2025 10:56:59 +0800 Subject: panic: refine the document for 'panic_print' User reported current document about SYS_INFO_PANIC_CONSOLE_REPLAY is confusing, that people could expect all user space console messages to be replayed. Specify that only 'kernel' messages will be replayed to solve the confusion. Link: https://lkml.kernel.org/r/20250825025701.81921-3-feng.tang@linux.alibaba.com Signed-off-by: Feng Tang Reported-by: Askar Safin Reviewed-by: Petr Mladek Cc: John Ogness Cc: Jonathan Corbet Cc: Lance Yang Cc: "Paul E . McKenney" Cc: Steven Rostedt Signed-off-by: Andrew Morton --- Documentation/admin-guide/kernel-parameters.txt | 2 +- Documentation/admin-guide/sysctl/kernel.rst | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 747a55abf494..86f395f2933b 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -4589,7 +4589,7 @@ bit 2: print timer info bit 3: print locks info if CONFIG_LOCKDEP is on bit 4: print ftrace buffer - bit 5: replay all messages on consoles at the end of panic + bit 5: replay all kernel messages on consoles at the end of panic bit 6: print all CPUs backtrace (if available in the arch) bit 7: print only tasks in uninterruptible (blocked) state *Be aware* that this option may print a _lot_ of lines, diff --git a/Documentation/admin-guide/sysctl/kernel.rst b/Documentation/admin-guide/sysctl/kernel.rst index 8b49eab937d0..f3ee807b5d8b 100644 --- a/Documentation/admin-guide/sysctl/kernel.rst +++ b/Documentation/admin-guide/sysctl/kernel.rst @@ -890,7 +890,7 @@ bit 1 print system memory info bit 2 print timer info bit 3 print locks info if ``CONFIG_LOCKDEP`` is on bit 4 print ftrace buffer -bit 5 replay all messages on consoles at the end of panic +bit 5 replay all kernel messages on consoles at the end of panic bit 6 print all CPUs backtrace (if available in the arch) bit 7 print only tasks in uninterruptible (blocked) state ===== ============================================ -- cgit v1.2.3 From c25822ccaa40fbc8ec38510397e0fbb8b1b0c0e2 Mon Sep 17 00:00:00 2001 From: Fan Yu Date: Sun, 7 Sep 2025 00:14:57 +0800 Subject: docs: update delaytop documentation for new interactive features This commit updates the delaytop documentation to reflect the newly added features: 1) Added comprehensive description of interactive keyboard controls 2) Documented all available sort fields 3) Added examples for advanced usage scenarios 4) Included PSI availability note Link: https://lkml.kernel.org/r/20250907001457696qAqUGGkV1VfEO6OkVMovW@zte.com.cn Signed-off-by: Fan Yu Reviewed-by: xu xin Signed-off-by: Andrew Morton --- Documentation/accounting/delay-accounting.rst | 91 +++++++++++++++++---------- 1 file changed, 58 insertions(+), 33 deletions(-) (limited to 'Documentation') diff --git a/Documentation/accounting/delay-accounting.rst b/Documentation/accounting/delay-accounting.rst index 8ccc5af5ea1e..86d7902a657f 100644 --- a/Documentation/accounting/delay-accounting.rst +++ b/Documentation/accounting/delay-accounting.rst @@ -134,47 +134,72 @@ The above command can be used with -v to get more debug information. After the system starts, use `delaytop` to get the system-wide delay information, which includes system-wide PSI information and Top-N high-latency tasks. +Note: PSI support requires `CONFIG_PSI=y` and `psi=1` for full functionality. -`delaytop` supports sorting by CPU latency in descending order by default, -displays the top 20 high-latency tasks by default, and refreshes the latency -data every 2 seconds by default. +`delaytop` is an interactive tool for monitoring system pressure and task delays. +It supports multiple sorting options, display modes, and real-time keyboard controls. -Get PSI information and Top-N tasks delay, since system boot:: +Basic usage with default settings (sorts by CPU delay, shows top 20 tasks, refreshes every 2 seconds):: bash# ./delaytop - System Pressure Information: (avg10/avg60/avg300/total) - CPU some: 0.0%/ 0.0%/ 0.0%/ 345(ms) + System Pressure Information: (avg10/avg60vg300/total) + CPU some: 0.0%/ 0.0%/ 0.0%/ 106137(ms) CPU full: 0.0%/ 0.0%/ 0.0%/ 0(ms) Memory full: 0.0%/ 0.0%/ 0.0%/ 0(ms) Memory some: 0.0%/ 0.0%/ 0.0%/ 0(ms) - IO full: 0.0%/ 0.0%/ 0.0%/ 65(ms) - IO some: 0.0%/ 0.0%/ 0.0%/ 79(ms) + IO full: 0.0%/ 0.0%/ 0.0%/ 2240(ms) + IO some: 0.0%/ 0.0%/ 0.0%/ 2783(ms) IRQ full: 0.0%/ 0.0%/ 0.0%/ 0(ms) - Top 20 processes (sorted by CPU delay): - PID TGID COMMAND CPU(ms) IO(ms) SWAP(ms) RCL(ms) THR(ms) CMP(ms) WP(ms) IRQ(ms) - ---------------------------------------------------------------------------------------------- - 161 161 zombie_memcg_re 1.40 0.00 0.00 0.00 0.00 0.00 0.00 0.00 - 130 130 blkcg_punt_bio 1.37 0.00 0.00 0.00 0.00 0.00 0.00 0.00 - 444 444 scsi_tmf_0 0.73 0.00 0.00 0.00 0.00 0.00 0.00 0.00 - 1280 1280 rsyslogd 0.53 0.04 0.00 0.00 0.00 0.00 0.00 0.00 - 12 12 ksoftirqd/0 0.47 0.00 0.00 0.00 0.00 0.00 0.00 0.00 - 1277 1277 nbd-server 0.44 0.00 0.00 0.00 0.00 0.00 0.00 0.00 - 308 308 kworker/2:2-sys 0.41 0.00 0.00 0.00 0.00 0.00 0.00 0.00 - 55 55 netns 0.36 0.00 0.00 0.00 0.00 0.00 0.00 0.00 - 1187 1187 acpid 0.31 0.03 0.00 0.00 0.00 0.00 0.00 0.00 - 6184 6184 kworker/1:2-sys 0.24 0.00 0.00 0.00 0.00 0.00 0.00 0.00 - 186 186 kaluad 0.24 0.00 0.00 0.00 0.00 0.00 0.00 0.00 - 18 18 ksoftirqd/1 0.24 0.00 0.00 0.00 0.00 0.00 0.00 0.00 - 185 185 kmpath_rdacd 0.23 0.00 0.00 0.00 0.00 0.00 0.00 0.00 - 190 190 kstrp 0.23 0.00 0.00 0.00 0.00 0.00 0.00 0.00 - 2759 2759 agetty 0.20 0.03 0.00 0.00 0.00 0.00 0.00 0.00 - 1190 1190 kworker/0:3-sys 0.19 0.00 0.00 0.00 0.00 0.00 0.00 0.00 - 1272 1272 sshd 0.15 0.04 0.00 0.00 0.00 0.00 0.00 0.00 - 1156 1156 license 0.15 0.11 0.00 0.00 0.00 0.00 0.00 0.00 - 134 134 md 0.13 0.00 0.00 0.00 0.00 0.00 0.00 0.00 - 6142 6142 kworker/3:2-xfs 0.13 0.00 0.00 0.00 0.00 0.00 0.00 0.00 - -Dynamic interactive interface of delaytop:: + [o]sort [M]memverbose [q]quit + Top 20 processes (sorted by cpu delay): + PID TGID COMMAND CPU(ms) IO(ms) IRQ(ms) MEM(ms) + ------------------------------------------------------------------------ + 110 110 kworker/15:0H-s 27.91 0.00 0.00 0.00 + 57 57 cpuhp/7 3.18 0.00 0.00 0.00 + 99 99 cpuhp/14 2.97 0.00 0.00 0.00 + 51 51 cpuhp/6 0.90 0.00 0.00 0.00 + 44 44 kworker/4:0H-sy 0.80 0.00 0.00 0.00 + 60 60 ksoftirqd/7 0.74 0.00 0.00 0.00 + 76 76 idle_inject/10 0.31 0.00 0.00 0.00 + 100 100 idle_inject/14 0.30 0.00 0.00 0.00 + 1309 1309 systemsettings 0.29 0.00 0.00 0.00 + 45 45 cpuhp/5 0.22 0.00 0.00 0.00 + 63 63 cpuhp/8 0.20 0.00 0.00 0.00 + 87 87 cpuhp/12 0.18 0.00 0.00 0.00 + 93 93 cpuhp/13 0.17 0.00 0.00 0.00 + 1265 1265 acpid 0.17 0.00 0.00 0.00 + 1552 1552 sshd 0.17 0.00 0.00 0.00 + 2584 2584 sddm-helper 0.16 0.00 0.00 0.00 + 1284 1284 rtkit-daemon 0.15 0.00 0.00 0.00 + 1326 1326 nde-netfilter 0.14 0.00 0.00 0.00 + 27 27 cpuhp/2 0.13 0.00 0.00 0.00 + 631 631 kworker/11:2-rc 0.11 0.00 0.00 0.00 + +Interactive keyboard controls during runtime:: + + o - Select sort field (CPU, IO, IRQ, Memory, etc.) + M - Toggle display mode (Default/Memory Verbose) + q - Quit + +Available sort fields(use -s/--sort or interactive command):: + + cpu(c) - CPU delay + blkio(i) - I/O delay + irq(q) - IRQ delay + mem(m) - Total memory delay + swapin(s) - Swapin delay (memory verbose mode only) + freepages(r) - Freepages reclaim delay (memory verbose mode only) + thrashing(t) - Thrashing delay (memory verbose mode only) + compact(p) - Compaction delay (memory verbose mode only) + wpcopy(w) - Write page copy delay (memory verbose mode only) + +Advanced usage examples:: + + # ./delaytop -s blkio + Sorted by IO delay + + # ./delaytop -s mem -M + Sorted by memory delay in memory verbose mode # ./delaytop -p pid Print delayacct stats -- cgit v1.2.3 From d43ce98223496e68bf8f12b42325e39ea5ae7247 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 8 Sep 2025 11:58:59 +0100 Subject: dt-bindings: net: renesas,rzv2h-gbeth: Document Renesas RZ/T2H and RZ/N2H SoCs Add device tree binding support for the Gigabit Ethernet MAC (GMAC) IP on Renesas RZ/T2H and RZ/N2H SoCs. While these SoCs use the same Synopsys DesignWare MAC version 5.20 as RZ/V2H, they are synthesized with different hardware configurations. Add new compatible strings "renesas,r9a09g077-gbeth" for RZ/T2H and "renesas,r9a09g087-gbeth" for RZ/N2H, with the latter using RZ/T2H as fallback since they share identical GMAC IP. Update the schema to handle hardware differences between SoC variants. RZ/T2H requires only 3 clocks compared to 7 on RZ/V2H, supports 8 RX/TX queue pairs instead of 4, and needs 2 reset controls with reset-names property versus a single unnamed reset. RZ/T2H also has the split header feature enabled which is disabled on RZ/V2H. Add support for an optional pcs-handle property to connect the GMAC to the MIIC PCS converter on RZ/T2H. Use conditional schema validation to enforce the correct clock, reset, and interrupt configurations per SoC variant. Extend the base snps,dwmac.yaml schema to accommodate the increased interrupt count, supporting up to 19 interrupts and extending the rx-queue and tx-queue interrupt name patterns to cover queues 0-7. Signed-off-by: Lad Prabhakar Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250908105901.3198975-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Jakub Kicinski --- .../bindings/net/renesas,rzv2h-gbeth.yaml | 178 ++++++++++++++++----- .../devicetree/bindings/net/snps,dwmac.yaml | 9 +- 2 files changed, 143 insertions(+), 44 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml b/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml index 23e39bcea96b..bd53ab300f50 100644 --- a/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml +++ b/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml @@ -17,63 +17,111 @@ select: - renesas,r9a09g047-gbeth - renesas,r9a09g056-gbeth - renesas,r9a09g057-gbeth + - renesas,r9a09g077-gbeth + - renesas,r9a09g087-gbeth - renesas,rzv2h-gbeth required: - compatible properties: compatible: - items: - - enum: - - renesas,r9a09g047-gbeth # RZ/G3E - - renesas,r9a09g056-gbeth # RZ/V2N - - renesas,r9a09g057-gbeth # RZ/V2H(P) - - const: renesas,rzv2h-gbeth - - const: snps,dwmac-5.20 + oneOf: + - items: + - enum: + - renesas,r9a09g047-gbeth # RZ/G3E + - renesas,r9a09g056-gbeth # RZ/V2N + - renesas,r9a09g057-gbeth # RZ/V2H(P) + - const: renesas,rzv2h-gbeth + - const: snps,dwmac-5.20 + - items: + - const: renesas,r9a09g077-gbeth # RZ/T2H + - const: snps,dwmac-5.20 + - items: + - const: renesas,r9a09g087-gbeth # RZ/N2H + - const: renesas,r9a09g077-gbeth + - const: snps,dwmac-5.20 reg: maxItems: 1 clocks: - items: - - description: CSR clock - - description: AXI system clock - - description: PTP clock - - description: TX clock - - description: RX clock - - description: TX clock phase-shifted by 180 degrees - - description: RX clock phase-shifted by 180 degrees + oneOf: + - items: + - description: CSR clock + - description: AXI system clock + - description: PTP clock + - description: TX clock + - description: RX clock + - description: TX clock phase-shifted by 180 degrees + - description: RX clock phase-shifted by 180 degrees + - items: + - description: CSR clock + - description: AXI system clock + - description: TX clock clock-names: - items: - - const: stmmaceth - - const: pclk - - const: ptp_ref - - const: tx - - const: rx - - const: tx-180 - - const: rx-180 - - interrupts: - minItems: 11 + oneOf: + - items: + - const: stmmaceth + - const: pclk + - const: ptp_ref + - const: tx + - const: rx + - const: tx-180 + - const: rx-180 + - items: + - const: stmmaceth + - const: pclk + - const: tx interrupt-names: - items: - - const: macirq - - const: eth_wake_irq - - const: eth_lpi - - const: rx-queue-0 - - const: rx-queue-1 - - const: rx-queue-2 - - const: rx-queue-3 - - const: tx-queue-0 - - const: tx-queue-1 - - const: tx-queue-2 - - const: tx-queue-3 + oneOf: + - items: + - const: macirq + - const: eth_wake_irq + - const: eth_lpi + - const: rx-queue-0 + - const: rx-queue-1 + - const: rx-queue-2 + - const: rx-queue-3 + - const: tx-queue-0 + - const: tx-queue-1 + - const: tx-queue-2 + - const: tx-queue-3 + - items: + - const: macirq + - const: eth_wake_irq + - const: eth_lpi + - const: rx-queue-0 + - const: rx-queue-1 + - const: rx-queue-2 + - const: rx-queue-3 + - const: rx-queue-4 + - const: rx-queue-5 + - const: rx-queue-6 + - const: rx-queue-7 + - const: tx-queue-0 + - const: tx-queue-1 + - const: tx-queue-2 + - const: tx-queue-3 + - const: tx-queue-4 + - const: tx-queue-5 + - const: tx-queue-6 + - const: tx-queue-7 resets: - items: - - description: AXI power-on system reset + oneOf: + - items: + - description: AXI power-on system reset + - items: + - description: AXI power-on system reset + - description: AHB reset + + pcs-handle: + description: + phandle pointing to a PCS sub-node compatible with + Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml# + (Refer RZ/T2H portion in the DT-binding file) required: - compatible @@ -87,6 +135,56 @@ required: allOf: - $ref: snps,dwmac.yaml# + - if: + properties: + compatible: + contains: + const: renesas,r9a09g077-gbeth + then: + properties: + clocks: + maxItems: 3 + + clock-names: + maxItems: 3 + + interrupts: + minItems: 19 + + interrupt-names: + minItems: 19 + + resets: + minItems: 2 + + reset-names: + minItems: 2 + + required: + - reset-names + else: + properties: + clocks: + minItems: 7 + + clock-names: + minItems: 7 + + interrupts: + minItems: 11 + maxItems: 11 + + interrupt-names: + minItems: 11 + maxItems: 11 + + resets: + maxItems: 1 + + pcs-handle: false + + reset-names: false + unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 4e3cbaa06229..658c004e6a5c 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -75,6 +75,7 @@ properties: - qcom,sc8280xp-ethqos - qcom,sm8150-ethqos - renesas,r9a06g032-gmac + - renesas,r9a09g077-gbeth - renesas,rzn1-gmac - renesas,rzv2h-gbeth - rockchip,px30-gmac @@ -118,11 +119,11 @@ properties: interrupts: minItems: 1 - maxItems: 11 + maxItems: 19 interrupt-names: minItems: 1 - maxItems: 11 + maxItems: 19 items: oneOf: - description: Combined signal for various interrupt events @@ -134,9 +135,9 @@ properties: - description: The interrupt that occurs when HW safety error triggered const: sfty - description: Per channel receive completion interrupt - pattern: '^rx-queue-[0-3]$' + pattern: '^rx-queue-[0-7]$' - description: Per channel transmit completion interrupt - pattern: '^tx-queue-[0-3]$' + pattern: '^tx-queue-[0-7]$' clocks: minItems: 1 -- cgit v1.2.3 From e13f988c4591eed99f5f34d396458f315f0f5651 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:21 +0200 Subject: dt-bindings: arm: apple: apple,pmgr: Add t6020-pmgr compatible After discussion with the devicetree maintainers we agreed to not extend lists with the generic compatible "apple,pmgr" anymore [1]. Use "apple,t8103-pmgr" as base compatible as it is the SoC the bindings were written for. The block on Apple M2 Pro/Max/Ultra SoCs is compatible with "apple,t8103-pmgr" so use it as fallback compatible and add t6020 as per-SoC compatible. [1]: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ Acked-by: Krzysztof Kozlowski Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- .../devicetree/bindings/arm/apple/apple,pmgr.yaml | 33 +++++++++++++--------- 1 file changed, 20 insertions(+), 13 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml index 5001f4d5a0dc..b88f41a225a3 100644 --- a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml +++ b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml @@ -20,19 +20,26 @@ properties: pattern: "^power-management@[0-9a-f]+$" compatible: - items: - - enum: - - apple,s5l8960x-pmgr - - apple,t7000-pmgr - - apple,s8000-pmgr - - apple,t8010-pmgr - - apple,t8015-pmgr - - apple,t8103-pmgr - - apple,t8112-pmgr - - apple,t6000-pmgr - - const: apple,pmgr - - const: syscon - - const: simple-mfd + oneOf: + - items: + - enum: + # Do not add additional SoC to this list. + - apple,s5l8960x-pmgr + - apple,t7000-pmgr + - apple,s8000-pmgr + - apple,t8010-pmgr + - apple,t8015-pmgr + - apple,t8103-pmgr + - apple,t8112-pmgr + - apple,t6000-pmgr + - const: apple,pmgr + - const: syscon + - const: simple-mfd + - items: + - const: apple,t6020-pmgr + - const: apple,t8103-pmgr + - const: syscon + - const: simple-mfd reg: maxItems: 1 -- cgit v1.2.3 From 48553ae8cc09ca7f720b20f7253d528cb8052847 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:23 +0200 Subject: dt-bindings: power: apple,pmgr-pwrstate: Add t6020 compatible After discussion with the devicetree maintainers we agreed to not extend lists with the generic compatible "apple,pmgr-pwrstate" anymore [1]. Use "apple,t8103-pmgr-pwrstate" as base compatible as it is the SoC the driver and bindings were written for. The implementation on Apple M2 Pro/Max/Ultra SoCs is compatible so add its per-SoC compatible with the new base. [1]: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- .../bindings/power/apple,pmgr-pwrstate.yaml | 27 +++++++++++++--------- 1 file changed, 16 insertions(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml index 6e9a670eaf56..caf151880999 100644 --- a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml +++ b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml @@ -29,17 +29,22 @@ description: | properties: compatible: - items: - - enum: - - apple,s5l8960x-pmgr-pwrstate - - apple,t7000-pmgr-pwrstate - - apple,s8000-pmgr-pwrstate - - apple,t8010-pmgr-pwrstate - - apple,t8015-pmgr-pwrstate - - apple,t8103-pmgr-pwrstate - - apple,t8112-pmgr-pwrstate - - apple,t6000-pmgr-pwrstate - - const: apple,pmgr-pwrstate + oneOf: + - items: + - enum: + # Do not add additional SoC to this list. + - apple,s5l8960x-pmgr-pwrstate + - apple,t7000-pmgr-pwrstate + - apple,s8000-pmgr-pwrstate + - apple,t8010-pmgr-pwrstate + - apple,t8015-pmgr-pwrstate + - apple,t8103-pmgr-pwrstate + - apple,t8112-pmgr-pwrstate + - apple,t6000-pmgr-pwrstate + - const: apple,pmgr-pwrstate + - items: + - const: apple,t6020-pmgr-pwrstate + - const: apple,t8103-pmgr-pwrstate reg: maxItems: 1 -- cgit v1.2.3 From 5a606b577cba2326e122811ab5130ff56568902f Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:24 +0200 Subject: dt-bindings: cpufreq: apple,cluster-cpufreq: Add t6020 compatible The CPU frequency control on M2 Pro/Max/Ultra SoCs is compatible to the M2 (T8112) one. So add this with the per-SoC compatible to the bindings. Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml b/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml index 896276b8c6bb..b51913a81791 100644 --- a/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml +++ b/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml @@ -35,6 +35,9 @@ properties: - const: apple,t7000-cluster-cpufreq - const: apple,s5l8960x-cluster-cpufreq - const: apple,s5l8960x-cluster-cpufreq + - items: + - const: apple,t6020-cluster-cpufreq + - const: apple,t8112-cluster-cpufreq reg: maxItems: 1 -- cgit v1.2.3 From 0b95df9004b150c38cf9177735c39a51fff00561 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:25 +0200 Subject: dt-bindings: interrupt-controller: apple,aic2: Add apple,t6020-aic compatible The Apple M2 Pro/Max/Ultra SoCs use AIC2 as interrupt controller. This is the final SoC added as compatible as Apple M3 and later use AIC3. Apple's A15 uses AIC2 as well but has no official support for alternate operating systems. Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml index 2bde6cc6fe0a..ee5a0dfff437 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml @@ -34,6 +34,7 @@ properties: - enum: - apple,t8112-aic - apple,t6000-aic + - apple,t6020-aic - const: apple,aic2 interrupt-controller: true -- cgit v1.2.3 From 874c90221e261b7a778f6beacd3d5f7e9a701a64 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:26 +0200 Subject: dt-bindings: iommu: dart: Add apple,t6020-dart compatible t6020-dart is compatible to t8110-dart and annotated as such in Apple's device tree. Add its per-SoC compatible in case t6020 specific handling becomes necessary. The dart instances on M2 Pro/Max/Ultra based SoCs differ in one aspect from the M2 based ones. They indicate an IAS of 42 requiring implementing support for a fouth page table level in the dart driver and its io-pgtable [1]. [1]: https://lore.kernel.org/asahi/20250821-apple-dart-4levels-v2-0-e39af79daa37@jannau.net/ Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/iommu/apple,dart.yaml | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iommu/apple,dart.yaml b/Documentation/devicetree/bindings/iommu/apple,dart.yaml index 7adb1de455a5..47ec7fa52c3a 100644 --- a/Documentation/devicetree/bindings/iommu/apple,dart.yaml +++ b/Documentation/devicetree/bindings/iommu/apple,dart.yaml @@ -22,11 +22,15 @@ description: |+ properties: compatible: - enum: - - apple,t8103-dart - - apple,t8103-usb4-dart - - apple,t8110-dart - - apple,t6000-dart + oneOf: + - enum: + - apple,t8103-dart + - apple,t8103-usb4-dart + - apple,t8110-dart + - apple,t6000-dart + - items: + - const: apple,t6020-dart + - const: apple,t8110-dart reg: maxItems: 1 -- cgit v1.2.3 From aa5272300c5acaef878d32205b3b3bfd80084c14 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:28 +0200 Subject: dt-bindings: pinctrl: apple,pinctrl: Add apple,t6020-pinctrl compatible After discussion with the devicetree maintainers we agreed to not extend lists with the generic compatible "apple,pinctrl" anymore [1]. Use "apple,t8103-pinctrl" as fallback compatible as it is the SoC the driver and bindings were written for. The M2 Pro/Max/Ultra SoCs use the same pinctrl hardware, so just add its per-SoC compatible using the new base as fallback. [1]: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ Acked-by: Linus Walleij Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- .../devicetree/bindings/pinctrl/apple,pinctrl.yaml | 27 +++++++++++++--------- 1 file changed, 16 insertions(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml index 63737d858944..665ec79a69f1 100644 --- a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml @@ -16,17 +16,22 @@ description: | properties: compatible: - items: - - enum: - - apple,s5l8960x-pinctrl - - apple,t7000-pinctrl - - apple,s8000-pinctrl - - apple,t8010-pinctrl - - apple,t8015-pinctrl - - apple,t8103-pinctrl - - apple,t8112-pinctrl - - apple,t6000-pinctrl - - const: apple,pinctrl + oneOf: + - items: + - const: apple,t6020-pinctrl + - const: apple,t8103-pinctrl + - items: + # Do not add additional SoC to this list. + - enum: + - apple,s5l8960x-pinctrl + - apple,t7000-pinctrl + - apple,s8000-pinctrl + - apple,t8010-pinctrl + - apple,t8015-pinctrl + - apple,t8103-pinctrl + - apple,t8112-pinctrl + - apple,t6000-pinctrl + - const: apple,pinctrl reg: maxItems: 1 -- cgit v1.2.3 From 9f601db6a1c0c7e191f7948a18f9daedde009836 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:30 +0200 Subject: dt-bindings: mailbox: apple,mailbox: Add t6020 compatible The mailbox hardware remains unchanged on M2 Pro/Max/Ultra SoCs so just add its per-SoC compatible. Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml b/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml index bdf58f03b848..28985cc62c25 100644 --- a/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml @@ -31,6 +31,7 @@ properties: - apple,t8103-asc-mailbox - apple,t8112-asc-mailbox - apple,t6000-asc-mailbox + - apple,t6020-asc-mailbox - const: apple,asc-mailbox-v4 - description: -- cgit v1.2.3 From c7a4fe4086ad5fabb1ca8a8bd3f02e728eab1eb9 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:31 +0200 Subject: dt-bindings: gpu: apple,agx: Add agx-{g14s,g14c,g14d} compatibles Add compatibles for the GPU variants found on Apple's M2 Pro/Max/Ultra SoCs. Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/gpu/apple,agx.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpu/apple,agx.yaml b/Documentation/devicetree/bindings/gpu/apple,agx.yaml index 51629b3833b0..05af942ad174 100644 --- a/Documentation/devicetree/bindings/gpu/apple,agx.yaml +++ b/Documentation/devicetree/bindings/gpu/apple,agx.yaml @@ -16,11 +16,17 @@ properties: - apple,agx-g13g - apple,agx-g13s - apple,agx-g14g + - apple,agx-g14s - items: - enum: - apple,agx-g13c - apple,agx-g13d - const: apple,agx-g13s + - items: + - enum: + - apple,agx-g14c + - apple,agx-g14d + - const: apple,agx-g14s reg: items: -- cgit v1.2.3 From 9d7b6d117df245721902a497d90da220d7c27ee5 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:32 +0200 Subject: dt-bindings: iommu: apple,sart: Add apple,t6020-sart compatible "apple,t6020-sart" as found in Apple's M2 Pro/Max/Ultra SoCs is compatible with SART3 used in t6000. Add its per-SoC compatible to allow a distinction should it become necessary. Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/iommu/apple,sart.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iommu/apple,sart.yaml b/Documentation/devicetree/bindings/iommu/apple,sart.yaml index c8c62f329882..88e66d4b13c6 100644 --- a/Documentation/devicetree/bindings/iommu/apple,sart.yaml +++ b/Documentation/devicetree/bindings/iommu/apple,sart.yaml @@ -30,7 +30,9 @@ properties: compatible: oneOf: - items: - - const: apple,t8112-sart + - enum: + - apple,t6020-sart + - apple,t8112-sart - const: apple,t6000-sart - enum: - apple,t6000-sart -- cgit v1.2.3 From a3ee3333467c076a1f0655dbe6d4950af360c3a5 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:34 +0200 Subject: dt-bindings: nvme: apple: Add apple,t6020-nvme-ans2 compatible After discussion with the devicetree maintainers we agreed to not extend lists with the generic compatible "apple,nvme-ans2" anymore [1]. Add "apple,t8103-nvme-ans2" as fallback compatible as it is the SoC the driver and bindings were written for. Invert the condition for the 2 or 3 power-domains check to allow using "apple,t8103-nvme-ans2" as base compatible. "apple,t6020-nvme-ans2" on Apple M2 Pro/Max/Ultra SoCs is compatible with "apple,t8103-nvme-ans2" so add its per-SoC compatible. [1]: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- .../devicetree/bindings/nvme/apple,nvme-ans.yaml | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml b/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml index 4127d7b0a0f0..4c0b1f90aff8 100644 --- a/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml +++ b/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml @@ -13,8 +13,12 @@ properties: compatible: oneOf: - const: apple,t8015-nvme-ans2 + - items: + - const: apple,t6020-nvme-ans2 + - const: apple,t8103-nvme-ans2 - items: - enum: + # Do not add additional SoC to this list. - apple,t8103-nvme-ans2 - apple,t8112-nvme-ans2 - apple,t6000-nvme-ans2 @@ -69,21 +73,20 @@ if: compatible: contains: enum: - - apple,t8015-nvme-ans2 - - apple,t8103-nvme-ans2 - - apple,t8112-nvme-ans2 + - apple,t6000-nvme-ans2 + - apple,t6020-nvme-ans2 then: properties: power-domains: - maxItems: 2 + minItems: 3 power-domain-names: - maxItems: 2 + minItems: 3 else: properties: power-domains: - minItems: 3 + maxItems: 2 power-domain-names: - minItems: 3 + maxItems: 2 required: - compatible -- cgit v1.2.3 From ef4d6ea11df035d742d4ef4ba21fbe401fc05d86 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:35 +0200 Subject: dt-bindings: net: bcm4377-bluetooth: Add BCM4388 compatible Add BCM4388 PCI vendor/product ID as compatible. The BCM4388 WiFi/BT module is found on Apple silicon devices with M2 Pro/Max/Ultra and later. Support for this variant was added in 2024 without amending the dt-bindings. Link: https://lore.kernel.org/asahi/20240602-btbcm4388-v1-1-210e4b4eeb3b@svenpeter.dev/ Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- .../devicetree/bindings/net/bluetooth/brcm,bcm4377-bluetooth.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/bluetooth/brcm,bcm4377-bluetooth.yaml b/Documentation/devicetree/bindings/net/bluetooth/brcm,bcm4377-bluetooth.yaml index 37cb39a3a62e..fd78258d71b4 100644 --- a/Documentation/devicetree/bindings/net/bluetooth/brcm,bcm4377-bluetooth.yaml +++ b/Documentation/devicetree/bindings/net/bluetooth/brcm,bcm4377-bluetooth.yaml @@ -23,6 +23,7 @@ properties: - pci14e4,5fa0 # BCM4377 - pci14e4,5f69 # BCM4378 - pci14e4,5f71 # BCM4387 + - pci14e4,5f72 # BCM4388 reg: maxItems: 1 -- cgit v1.2.3 From 4fb80f2f90d6882ead09d5333dee82ec8df580b0 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:36 +0200 Subject: dt-bindings: net: bcm4329-fmac: Add BCM4388 PCI compatible BCM4388 WiFi/BT modules are found on Apple silicon devices using M2 Pro/Max/Ultra and later. Driver support for this module is not submitted yet. Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml b/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml index 7c8100e59a6c..3be757678764 100644 --- a/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml +++ b/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml @@ -53,6 +53,7 @@ properties: - pci14e4,4488 # BCM4377 - pci14e4,4425 # BCM4378 - pci14e4,4433 # BCM4387 + - pci14e4,4434 # BCM4388 - pci14e4,449d # BCM43752 reg: -- cgit v1.2.3 From b7e4229a5a2c9c25be4acf99153071779864be95 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:38 +0200 Subject: dt-bindings: mfd: apple,smc: Add t6020-smc compatible After discussion with the devicetree maintainers we agreed to not extend lists with the generic compatible "apple,smc" anymore [1]. Use "apple,t8103-smc" as base compatible as it is the SoC the driver and bindings were written for. SMC on Apple's M2 Pro/Max/Ultra SoCs is compatible with the existing driver so add its per-SoC compatible with the new base compatible as fallback used by the driver. [1]: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/mfd/apple,smc.yaml | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/apple,smc.yaml b/Documentation/devicetree/bindings/mfd/apple,smc.yaml index 8a10e270d421..5429538f7e2e 100644 --- a/Documentation/devicetree/bindings/mfd/apple,smc.yaml +++ b/Documentation/devicetree/bindings/mfd/apple,smc.yaml @@ -15,12 +15,17 @@ description: properties: compatible: - items: - - enum: - - apple,t6000-smc - - apple,t8103-smc - - apple,t8112-smc - - const: apple,smc + oneOf: + - items: + - const: apple,t6020-smc + - const: apple,t8103-smc + - items: + - enum: + # Do not add additional SoC to this list. + - apple,t6000-smc + - apple,t8103-smc + - apple,t8112-smc + - const: apple,smc reg: items: -- cgit v1.2.3 From 006d3506094ce32984d53001b502826b8fe410d3 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:41 +0200 Subject: dt-bindings: spmi: apple,spmi: Add t6020-spmi compatible After discussion with the devicetree maintainers we agreed to not extend lists with the generic compatible "apple,spmi" anymore [1]. Use "apple,t8103-spmi" as base compatible as it is the SoC the driver and bindings were written for. The SPMI controller on Apple M2 Pro/Max/Ultra is compatible to "apple,t8103-spmi" so add its per-SoC compatible with the former as fallback used by the existing driver. [1]: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/spmi/apple,spmi.yaml | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spmi/apple,spmi.yaml b/Documentation/devicetree/bindings/spmi/apple,spmi.yaml index 16bd7eb2b7af..dbf09ad0ecde 100644 --- a/Documentation/devicetree/bindings/spmi/apple,spmi.yaml +++ b/Documentation/devicetree/bindings/spmi/apple,spmi.yaml @@ -16,12 +16,17 @@ allOf: properties: compatible: - items: - - enum: - - apple,t8103-spmi - - apple,t6000-spmi - - apple,t8112-spmi - - const: apple,spmi + oneOf: + - items: + - const: apple,t6020-spmi + - const: apple,t8103-spmi + - items: + - enum: + # Do not add additional SoC to this list. + - apple,t8103-spmi + - apple,t6000-spmi + - apple,t8112-spmi + - const: apple,spmi reg: maxItems: 1 -- cgit v1.2.3 From 5410df1a5a4b1d23abcb0dfe1b43c9745b731749 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:43 +0200 Subject: dt-bindings: watchdog: apple,wdt: Add t6020-wdt compatible After discussion with the devicetree maintainers we agreed to not extend lists with the generic compatible "apple,wdt" anymore [1]. Use "apple,t8103-wdt" as base compatible as it is the SoC the driver and bindings were written for. The block on the Apple M2 Pro/Max/Ultra SoCs is compatible with the existing driver so add its per-SoC compatible. [1]: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- .../devicetree/bindings/watchdog/apple,wdt.yaml | 27 +++++++++++++--------- 1 file changed, 16 insertions(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml b/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml index 310832fa8c28..05602678c070 100644 --- a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml @@ -14,17 +14,22 @@ allOf: properties: compatible: - items: - - enum: - - apple,s5l8960x-wdt - - apple,t7000-wdt - - apple,s8000-wdt - - apple,t8010-wdt - - apple,t8015-wdt - - apple,t8103-wdt - - apple,t8112-wdt - - apple,t6000-wdt - - const: apple,wdt + oneOf: + - items: + - const: apple,t6020-wdt + - const: apple,t8103-wdt + - items: + - enum: + # Do not add additional SoC to this list. + - apple,s5l8960x-wdt + - apple,t7000-wdt + - apple,s8000-wdt + - apple,t8010-wdt + - apple,t8015-wdt + - apple,t8103-wdt + - apple,t8112-wdt + - apple,t6000-wdt + - const: apple,wdt reg: maxItems: 1 -- cgit v1.2.3 From ff0b47ab71a6171da70319b147efe6fa675a471f Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:45 +0200 Subject: dt-bindings: clock: apple,nco: Add t6020-nco compatible After discussion with the devicetree maintainers we agreed to not extend lists with the generic compatible "apple,nco" anymore [1]. Use "apple,t8103-nco" as base compatible as it is the SoC the driver and bindings were written for. The block found on Apple's M2 Pro/Max/Ultra SoCs is compatible with "apple,t8103-nco" so add its per-SoC compatible with the former as fallback used by the existing driver. [1]: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/clock/apple,nco.yaml | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/apple,nco.yaml b/Documentation/devicetree/bindings/clock/apple,nco.yaml index 8b8411dc42f6..080454f56721 100644 --- a/Documentation/devicetree/bindings/clock/apple,nco.yaml +++ b/Documentation/devicetree/bindings/clock/apple,nco.yaml @@ -19,12 +19,17 @@ description: | properties: compatible: - items: - - enum: - - apple,t6000-nco - - apple,t8103-nco - - apple,t8112-nco - - const: apple,nco + oneOf: + - items: + - const: apple,t6020-nco + - const: apple,t8103-nco + - items: + - enum: + # Do not add additional SoC to this list. + - apple,t6000-nco + - apple,t8103-nco + - apple,t8112-nco + - const: apple,nco clocks: description: -- cgit v1.2.3 From 19cf142ab94d326fb06582fda57485801e1c328d Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:47 +0200 Subject: dt-bindings: dma: apple,admac: Add t6020-admac compatible After discussion with the devicetree maintainers we agreed to not extend lists with the generic compatible "apple,admac" anymore [1]. Use "apple,t8103-admac" as base compatible as it is the SoC the driver and bindings were written for. admac on Apple's M2 Pro/Max/Ultra SoCs is compatible with "apple,t8103-admac" so add its per-SoC compatible with the former as fallback used by the existing driver. [1]: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/dma/apple,admac.yaml | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/dma/apple,admac.yaml b/Documentation/devicetree/bindings/dma/apple,admac.yaml index ab193bc8bdbb..6a200cbd7d02 100644 --- a/Documentation/devicetree/bindings/dma/apple,admac.yaml +++ b/Documentation/devicetree/bindings/dma/apple,admac.yaml @@ -22,12 +22,17 @@ allOf: properties: compatible: - items: - - enum: - - apple,t6000-admac - - apple,t8103-admac - - apple,t8112-admac - - const: apple,admac + oneOf: + - items: + - const: apple,t6020-admac + - const: apple,t8103-admac + - items: + - enum: + # Do not add additional SoC to this list. + - apple,t6000-admac + - apple,t8103-admac + - apple,t8112-admac + - const: apple,admac reg: maxItems: 1 -- cgit v1.2.3 From a3ec6ef203e436dfa7fd007d2122b3bc3679edb6 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:49 +0200 Subject: ASoC: dt-bindings: apple,mca: Add t6020-mca compatible After discussion with the devicetree maintainers we agreed to not extend lists with the generic compatible "apple,mca" anymore [1]. Use "apple,t8103-mca" as base compatible as it is the SoC the driver and bindings were written for. mca on Apple's M2 Pro/Max/Ultra SoCs is compatible with "apple,t8103-mca" so add its per-SoC compatible with the former as fallbeck used by the existing driver. [1]: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ Acked-by: Mark Brown Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/sound/apple,mca.yaml | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/apple,mca.yaml b/Documentation/devicetree/bindings/sound/apple,mca.yaml index 5c6ec08c7d24..2beb725118ad 100644 --- a/Documentation/devicetree/bindings/sound/apple,mca.yaml +++ b/Documentation/devicetree/bindings/sound/apple,mca.yaml @@ -19,12 +19,17 @@ allOf: properties: compatible: - items: - - enum: - - apple,t6000-mca - - apple,t8103-mca - - apple,t8112-mca - - const: apple,mca + oneOf: + - items: + - const: apple,t6020-mca + - const: apple,t8103-mca + - items: + - enum: + # Do not add additional SoC to this list. + - apple,t6000-mca + - apple,t8103-mca + - apple,t8112-mca + - const: apple,mca reg: items: -- cgit v1.2.3 From b85efa8dcbb3b4147ebab9dc053e8bb20c7c48f9 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:52:10 +0200 Subject: spi: dt-bindings: apple,spi: Add t6020-spi compatible After discussion with the devicetree maintainers we agreed to not extend lists with the generic compatible "apple,spi" anymore [1]. Use "apple,t8103-spi" as base compatible as it is the SoC the driver and bindings were written for. The SPI controller on Apple M2 Pro/Max/Ultra SoCs is compatible with "apple,t8103-spi" so add its per-SoC compatible with the former as fallback used by the existing driver. [1]: https://lore.kernel.org/asahi/12ab93b7-1fc2-4ce0-926e-c8141cfe81bf@kernel.org/ Acked-by: Mark Brown Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/spi/apple,spi.yaml | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/apple,spi.yaml b/Documentation/devicetree/bindings/spi/apple,spi.yaml index 7bef605a2963..9356b9c337c8 100644 --- a/Documentation/devicetree/bindings/spi/apple,spi.yaml +++ b/Documentation/devicetree/bindings/spi/apple,spi.yaml @@ -14,12 +14,16 @@ maintainers: properties: compatible: - items: - - enum: - - apple,t8103-spi - - apple,t8112-spi - - apple,t6000-spi - - const: apple,spi + oneOf: + - items: + - const: apple,t6020-spi + - const: apple,t8103-spi + - items: + - enum: + - apple,t8103-spi + - apple,t8112-spi + - apple,t6000-spi + - const: apple,spi reg: maxItems: 1 -- cgit v1.2.3 From eb391228ae08dfc153f8838ed700bb75a28b1493 Mon Sep 17 00:00:00 2001 From: Parvathi Pudi Date: Fri, 12 Sep 2025 16:14:50 +0530 Subject: dt-bindings: net: ti: Adds DUAL-EMAC mode support on PRU-ICSS2 for AM57xx, AM43xx and AM33xx SOCs Documentation update for the newly added "pruss2_eth" device tree node and its dependencies along with compatibility for PRU-ICSS Industrial Ethernet Peripheral (IEP), PRU-ICSS Enhanced Capture (eCAP) peripheral and using YAML binding document for AM57xx SoCs. Reviewed-by: Mohan Reddy Putluru Co-developed-by: Basharath Hussain Khaja Signed-off-by: Basharath Hussain Khaja Signed-off-by: Parvathi Pudi Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250912104741.528721-2-parvathi@couthit.com Signed-off-by: Jakub Kicinski --- .../devicetree/bindings/net/ti,icss-iep.yaml | 10 +- .../devicetree/bindings/net/ti,icssm-prueth.yaml | 233 +++++++++++++++++++++ .../devicetree/bindings/net/ti,pruss-ecap.yaml | 32 +++ .../devicetree/bindings/soc/ti/ti,pruss.yaml | 9 + 4 files changed, 281 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/ti,icssm-prueth.yaml create mode 100644 Documentation/devicetree/bindings/net/ti,pruss-ecap.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/ti,icss-iep.yaml b/Documentation/devicetree/bindings/net/ti,icss-iep.yaml index e36e3a622904..ea2659d90a52 100644 --- a/Documentation/devicetree/bindings/net/ti,icss-iep.yaml +++ b/Documentation/devicetree/bindings/net/ti,icss-iep.yaml @@ -8,6 +8,8 @@ title: Texas Instruments ICSS Industrial Ethernet Peripheral (IEP) module maintainers: - Md Danish Anwar + - Parvathi Pudi + - Basharath Hussain Khaja properties: compatible: @@ -17,9 +19,11 @@ properties: - ti,am642-icss-iep - ti,j721e-icss-iep - const: ti,am654-icss-iep - - - const: ti,am654-icss-iep - + - enum: + - ti,am654-icss-iep + - ti,am5728-icss-iep + - ti,am4376-icss-iep + - ti,am3356-icss-iep reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/net/ti,icssm-prueth.yaml b/Documentation/devicetree/bindings/net/ti,icssm-prueth.yaml new file mode 100644 index 000000000000..a98ad45ca66f --- /dev/null +++ b/Documentation/devicetree/bindings/net/ti,icssm-prueth.yaml @@ -0,0 +1,233 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/ti,icssm-prueth.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ICSSM PRUSS Ethernet + +maintainers: + - Roger Quadros + - Andrew F. Davis + - Parvathi Pudi + - Basharath Hussain Khaja + +description: + Ethernet based on the Programmable Real-Time Unit and Industrial + Communication Subsystem. + +properties: + compatible: + enum: + - ti,am57-prueth # for AM57x SoC family + - ti,am4376-prueth # for AM43x SoC family + - ti,am3359-prueth # for AM33x SoC family + + sram: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle to OCMC SRAM node + + ti,mii-rt: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle to the MII_RT peripheral for ICSS + + ti,iep: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle to IEP (Industrial Ethernet Peripheral) for ICSS + + ti,ecap: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle to Enhanced Capture (eCAP) event for ICSS + + interrupts: + items: + - description: High priority Rx Interrupt specifier. + - description: Low priority Rx Interrupt specifier. + + interrupt-names: + items: + - const: rx_hp + - const: rx_lp + + ethernet-ports: + type: object + additionalProperties: false + + properties: + '#address-cells': + const: 1 + '#size-cells': + const: 0 + + patternProperties: + ^ethernet-port@[0-1]$: + type: object + description: ICSSM PRUETH external ports + $ref: ethernet-controller.yaml# + unevaluatedProperties: false + + properties: + reg: + items: + - enum: [0, 1] + description: ICSSM PRUETH port number + + interrupts: + maxItems: 3 + + interrupt-names: + items: + - const: rx + - const: emac_ptp_tx + - const: hsr_ptp_tx + + required: + - reg + + anyOf: + - required: + - ethernet-port@0 + - required: + - ethernet-port@1 + +required: + - compatible + - sram + - ti,mii-rt + - ti,iep + - ti,ecap + - ethernet-ports + - interrupts + - interrupt-names + +allOf: + - $ref: /schemas/remoteproc/ti,pru-consumer.yaml# + +unevaluatedProperties: false + +examples: + - | + /* Dual-MAC Ethernet application node on PRU-ICSS2 */ + pruss2_eth: pruss2-eth { + compatible = "ti,am57-prueth"; + ti,prus = <&pru2_0>, <&pru2_1>; + sram = <&ocmcram1>; + ti,mii-rt = <&pruss2_mii_rt>; + ti,iep = <&pruss2_iep>; + ti,ecap = <&pruss2_ecap>; + interrupts = <20 2 2>, <21 3 3>; + interrupt-names = "rx_hp", "rx_lp"; + interrupt-parent = <&pruss2_intc>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + pruss2_emac0: ethernet-port@0 { + reg = <0>; + phy-handle = <&pruss2_eth0_phy>; + phy-mode = "mii"; + interrupts = <20 2 2>, <26 6 6>, <23 6 6>; + interrupt-names = "rx", "emac_ptp_tx", "hsr_ptp_tx"; + /* Filled in by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + }; + + pruss2_emac1: ethernet-port@1 { + reg = <1>; + phy-handle = <&pruss2_eth1_phy>; + phy-mode = "mii"; + interrupts = <21 3 3>, <27 9 7>, <24 9 7>; + interrupt-names = "rx", "emac_ptp_tx", "hsr_ptp_tx"; + /* Filled in by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + }; + }; + }; + - | + /* Dual-MAC Ethernet application node on PRU-ICSS1 */ + pruss1_eth: pruss1-eth { + compatible = "ti,am4376-prueth"; + ti,prus = <&pru1_0>, <&pru1_1>; + sram = <&ocmcram>; + ti,mii-rt = <&pruss1_mii_rt>; + ti,iep = <&pruss1_iep>; + ti,ecap = <&pruss1_ecap>; + interrupts = <20 2 2>, <21 3 3>; + interrupt-names = "rx_hp", "rx_lp"; + interrupt-parent = <&pruss1_intc>; + + pinctrl-0 = <&pruss1_eth_default>; + pinctrl-names = "default"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + pruss1_emac0: ethernet-port@0 { + reg = <0>; + phy-handle = <&pruss1_eth0_phy>; + phy-mode = "mii"; + interrupts = <20 2 2>, <26 6 6>, <23 6 6>; + interrupt-names = "rx", "emac_ptp_tx", + "hsr_ptp_tx"; + /* Filled in by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + }; + + pruss1_emac1: ethernet-port@1 { + reg = <1>; + phy-handle = <&pruss1_eth1_phy>; + phy-mode = "mii"; + interrupts = <21 3 3>, <27 9 7>, <24 9 7>; + interrupt-names = "rx", "emac_ptp_tx", + "hsr_ptp_tx"; + /* Filled in by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + }; + }; + }; + - | + /* Dual-MAC Ethernet application node on PRU-ICSS */ + pruss_eth: pruss-eth { + compatible = "ti,am3359-prueth"; + ti,prus = <&pru0>, <&pru1>; + sram = <&ocmcram>; + ti,mii-rt = <&pruss_mii_rt>; + ti,iep = <&pruss_iep>; + ti,ecap = <&pruss_ecap>; + interrupts = <20 2 2>, <21 3 3>; + interrupt-names = "rx_hp", "rx_lp"; + interrupt-parent = <&pruss_intc>; + + pinctrl-0 = <&pruss_eth_default>; + pinctrl-names = "default"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + pruss_emac0: ethernet-port@0 { + reg = <0>; + phy-handle = <&pruss_eth0_phy>; + phy-mode = "mii"; + interrupts = <20 2 2>, <26 6 6>, <23 6 6>; + interrupt-names = "rx", "emac_ptp_tx", + "hsr_ptp_tx"; + /* Filled in by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + }; + + pruss_emac1: ethernet-port@1 { + reg = <1>; + phy-handle = <&pruss_eth1_phy>; + phy-mode = "mii"; + interrupts = <21 3 3>, <27 9 7>, <24 9 7>; + interrupt-names = "rx", "emac_ptp_tx", + "hsr_ptp_tx"; + /* Filled in by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/ti,pruss-ecap.yaml b/Documentation/devicetree/bindings/net/ti,pruss-ecap.yaml new file mode 100644 index 000000000000..42f217099b2e --- /dev/null +++ b/Documentation/devicetree/bindings/net/ti,pruss-ecap.yaml @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/ti,pruss-ecap.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments PRU-ICSS Enhanced Capture (eCAP) event module + +maintainers: + - Murali Karicheri + - Parvathi Pudi + - Basharath Hussain Khaja + +properties: + compatible: + const: ti,pruss-ecap + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pruss2_ecap: ecap@30000 { + compatible = "ti,pruss-ecap"; + reg = <0x30000 0x60>; + }; diff --git a/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml b/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml index 927b3200e29e..b5336bcbfb01 100644 --- a/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml +++ b/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml @@ -251,6 +251,15 @@ patternProperties: type: object + ecap@[a-f0-9]+$: + description: + PRU-ICSS has a Enhanced Capture (eCAP) event module which can generate + and capture periodic timer based events which will be used for features + like RX Pacing to rise interrupt when the timer event has occurred. + Each PRU-ICSS instance has one eCAP module irrespective of SOCs. + $ref: /schemas/net/ti,pruss-ecap.yaml# + type: object + mii-rt@[a-f0-9]+$: description: | Real-Time Ethernet to support multiple industrial communication protocols. -- cgit v1.2.3 From 043439ad1a23cd3f65628310d1f5a06e61f8b431 Mon Sep 17 00:00:00 2001 From: Haren Myneni Date: Tue, 9 Sep 2025 01:43:53 -0700 Subject: powerpc/pseries: Define papr-hvpipe ioctl PowerPC FW introduced HVPIPE RTAS calls such as ibm,send-hvpipe-msg and ibm,receive-hvpipe-msg for the user space to exchange information with different sources such as Hardware Management Consoles (HMC). HVPIPE_IOC_CREATE_HANDLE is defined to use /dev/papr-hvpipe interface for ibm,send-hvpipe-msg and ibm,receive-hvpipe-msg RTAS calls. Also defined papr_hvpipe_hdr which will added in the payload that is passed between the kernel and the user space. Signed-off-by: Haren Myneni Tested-by: Shashank MS Reviewed-by: Mahesh Salgaonkar Reviewed-by: Tyrel Datwyler Signed-off-by: Madhavan Srinivasan Link: https://patch.msgid.link/20250909084402.1488456-2-haren@linux.ibm.com --- Documentation/userspace-api/ioctl/ioctl-number.rst | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/userspace-api/ioctl/ioctl-number.rst b/Documentation/userspace-api/ioctl/ioctl-number.rst index 406a9f4d0869..7c527a01d1cf 100644 --- a/Documentation/userspace-api/ioctl/ioctl-number.rst +++ b/Documentation/userspace-api/ioctl/ioctl-number.rst @@ -374,6 +374,8 @@ Code Seq# Include File Comments 0xB2 08 arch/powerpc/include/uapi/asm/papr-physical-attestation.h powerpc/pseries Physical Attestation API +0xB2 09 arch/powerpc/include/uapi/asm/papr-hvpipe.h powerpc/pseries HVPIPE API + 0xB3 00 linux/mmc/ioctl.h 0xB4 00-0F linux/gpio.h 0xB5 00-0F uapi/linux/rpmsg.h -- cgit v1.2.3 From 09cbe54681241ac67ca595743d29f7da85363928 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 27 May 2025 22:58:22 +0200 Subject: dt-bindings: timer: renesas,rz-mtu3: Use #pwm-cells = <3> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With the goal to unify all PWM bindings to use #pwm-cells = <3> update the renesas,rz-mtu3 binding accordingly. Keep <2> documented as a deprecated value at least until the in-tree device trees are fixed accordingly. Signed-off-by: Uwe Kleine-König Acked-by: Rob Herring (Arm) Reviewed-by: Biju Das Link: https://lore.kernel.org/r/20250527205823.377785-2-u.kleine-koenig@baylibre.com Signed-off-by: Uwe Kleine-König --- Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml b/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml index 3931054b42fb..3ad10c5b66ba 100644 --- a/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml +++ b/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml @@ -221,7 +221,10 @@ properties: maxItems: 1 "#pwm-cells": - const: 2 + oneOf: + - const: 2 + deprecated: true + - const: 3 required: - compatible @@ -299,5 +302,5 @@ examples: clocks = <&cpg CPG_MOD R9A07G044_MTU_X_MCK_MTU3>; power-domains = <&cpg>; resets = <&cpg R9A07G044_MTU_X_PRESET_MTU3>; - #pwm-cells = <2>; + #pwm-cells = <3>; }; -- cgit v1.2.3 From 3513752cfe6fc1cfb0d99b3b4c554eb56e8bf8a1 Mon Sep 17 00:00:00 2001 From: Daniel Lezcano Date: Tue, 12 Aug 2025 22:00:35 +0200 Subject: dt-bindings: pwm: fsl,vf610-ftm-pwm: Add compatible for s32g2 and s32g3 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The S32G2 and S32G3 have a FlexTimer (FTM) available which is the same as the one found on the Vybrid Family and the i.MX8. Add the compatibles in the bindings Signed-off-by: Daniel Lezcano Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250812200036.3432917-2-daniel.lezcano@linaro.org Signed-off-by: Uwe Kleine-König --- Documentation/devicetree/bindings/pwm/fsl,vf610-ftm-pwm.yaml | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pwm/fsl,vf610-ftm-pwm.yaml b/Documentation/devicetree/bindings/pwm/fsl,vf610-ftm-pwm.yaml index 7f9f72d95e7a..c7a10180208e 100644 --- a/Documentation/devicetree/bindings/pwm/fsl,vf610-ftm-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/fsl,vf610-ftm-pwm.yaml @@ -26,9 +26,14 @@ maintainers: properties: compatible: - enum: - - fsl,vf610-ftm-pwm - - fsl,imx8qm-ftm-pwm + oneOf: + - enum: + - fsl,vf610-ftm-pwm + - fsl,imx8qm-ftm-pwm + - nxp,s32g2-ftm-pwm + - items: + - const: nxp,s32g3-ftm-pwm + - const: nxp,s32g2-ftm-pwm reg: maxItems: 1 -- cgit v1.2.3 From efedb508591e231b47b23ce6b353c81eeb3b9a84 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 21 Aug 2025 10:31:11 +0200 Subject: dt-bindings: pwm: nxp,lpc1850-sct-pwm: Minor whitespace cleanup in example MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The DTS code coding style expects exactly one space around '=' character. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250821083110.46420-2-krzysztof.kozlowski@linaro.org Signed-off-by: Uwe Kleine-König --- Documentation/devicetree/bindings/pwm/nxp,lpc1850-sct-pwm.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pwm/nxp,lpc1850-sct-pwm.yaml b/Documentation/devicetree/bindings/pwm/nxp,lpc1850-sct-pwm.yaml index ffda0123878e..920e0413d431 100644 --- a/Documentation/devicetree/bindings/pwm/nxp,lpc1850-sct-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/nxp,lpc1850-sct-pwm.yaml @@ -48,7 +48,7 @@ examples: pwm@40000000 { compatible = "nxp,lpc1850-sct-pwm"; reg = <0x40000000 0x1000>; - clocks =<&ccu1 CLK_CPU_SCT>; + clocks = <&ccu1 CLK_CPU_SCT>; clock-names = "pwm"; #pwm-cells = <3>; }; -- cgit v1.2.3 From d322a0e01d9ecc91881d7a6ad388a37a1a81471f Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Thu, 28 Aug 2025 16:01:39 +0200 Subject: dt-bindings: pwm: apple,s5l-fpwm: Add t6020-fpwm compatible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The PWM controller on Apple's M2 Pro/Max SoCs behaves in the same way as on previous M1 and M2 SoCs. Add its per SoC compatible. At the same time fix the order of existing entries. The sort order logic is having SoC numeric code families in release order, and SoCs within each family in release order: - t8xxx (Apple HxxP/G series, "phone"/"tablet" chips) - t8103 (Apple H13G/M1) - t8112 (Apple H14G/M2) - t6xxx (Apple HxxJ series, "desktop" chips) - t6000/t6001/t6002 (Apple H13J(S/C/D) / M1 Pro/Max/Ultra) - t6020/t6021/t6022 (Apple H14J(S/C/D) / M2 Pro/Max/Ultra) Note that SoCs of the t600[0-2] / t602[0-2] family share the t6000 / t6020 compatible where the hardware is 100% compatible, which is usually the case in this highly related set of SoCs. Signed-off-by: Janne Grunau Reviewed-by: Neal Gompa Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250828-dt-apple-t6020-v1-20-507ba4c4b98e@jannau.net Signed-off-by: Uwe Kleine-König --- Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml b/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml index 142157bff0cd..04519b0c581d 100644 --- a/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml +++ b/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml @@ -17,8 +17,9 @@ properties: items: - enum: - apple,t8103-fpwm - - apple,t6000-fpwm - apple,t8112-fpwm + - apple,t6000-fpwm + - apple,t6020-fpwm - const: apple,s5l-fpwm reg: -- cgit v1.2.3 From ebd524a3ac3a172aa26f99d20d4d00d57da9a875 Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Sun, 14 Sep 2025 16:20:33 +0300 Subject: dt-bindings: pwm: samsung: add exynos8890 compatible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add samsung,exynos8890-pwm compatible string to binding document. Signed-off-by: Ivaylo Ivanov Link: https://lore.kernel.org/r/20250914132033.2622886-1-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Uwe Kleine-König --- Documentation/devicetree/bindings/pwm/pwm-samsung.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml index 17a2b927af33..97acbdec39f1 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml @@ -31,6 +31,7 @@ properties: - enum: - samsung,exynos5433-pwm - samsung,exynos7-pwm + - samsung,exynos8890-pwm - samsung,exynosautov9-pwm - samsung,exynosautov920-pwm - tesla,fsd-pwm -- cgit v1.2.3 From bebf57bf054b561a62f3440142b2eddab2b0bbff Mon Sep 17 00:00:00 2001 From: Babu Moger Date: Fri, 5 Sep 2025 16:34:05 -0500 Subject: x86/resctrl: Add ABMC feature in the command line options Add a kernel command-line parameter to enable or disable the exposure of the ABMC (Assignable Bandwidth Monitoring Counters) hardware feature to resctrl. Signed-off-by: Babu Moger Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Reinette Chatre Link: https://lore.kernel.org/cover.1757108044.git.babu.moger@amd.com --- Documentation/admin-guide/kernel-parameters.txt | 2 +- Documentation/filesystems/resctrl.rst | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 5a7a83c411e9..889e68e83682 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -6155,7 +6155,7 @@ rdt= [HW,X86,RDT] Turn on/off individual RDT features. List is: cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp, - mba, smba, bmec. + mba, smba, bmec, abmc. E.g. to turn on cmt and turn off mba use: rdt=cmt,!mba diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesystems/resctrl.rst index c7949dd44f2f..c97fd77a107d 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -26,6 +26,7 @@ MBM (Memory Bandwidth Monitoring) "cqm_mbm_total", "cqm_mbm_local" MBA (Memory Bandwidth Allocation) "mba" SMBA (Slow Memory Bandwidth Allocation) "" BMEC (Bandwidth Monitoring Event Configuration) "" +ABMC (Assignable Bandwidth Monitoring Counters) "" =============================================== ================================ Historically, new features were made visible by default in /proc/cpuinfo. This -- cgit v1.2.3 From 3b497c3f4f0427d940ec5c8600e840c8adc5cfbf Mon Sep 17 00:00:00 2001 From: Babu Moger Date: Fri, 5 Sep 2025 16:34:09 -0500 Subject: fs/resctrl: Introduce the interface to display monitoring modes Introduce the resctrl file "mbm_assign_mode" to list the supported counter assignment modes. The "mbm_event" counter assignment mode allows users to assign a hardware counter to an RMID, event pair and monitor bandwidth usage as long as it is assigned. The hardware continues to track the assigned counter until it is explicitly unassigned by the user. Each event within a resctrl group can be assigned independently in this mode. On AMD systems "mbm_event" mode is backed by the ABMC (Assignable Bandwidth Monitoring Counters) hardware feature and is enabled by default. The "default" mode is the existing mode that works without the explicit counter assignment, instead relying on dynamic counter assignment by hardware that may result in hardware not dedicating a counter resulting in monitoring data reads returning "Unavailable". Provide an interface to display the monitor modes on the system. $ cat /sys/fs/resctrl/info/L3_MON/mbm_assign_mode [mbm_event] default Add IS_ENABLED(CONFIG_RESCTRL_ASSIGN_FIXED) check to support Arm64. On x86, CONFIG_RESCTRL_ASSIGN_FIXED is not defined. On Arm64, it will be defined when the "mbm_event" mode is supported. Add IS_ENABLED(CONFIG_RESCTRL_ASSIGN_FIXED) check early to ensure the user interface remains compatible with upcoming Arm64 support. IS_ENABLED() safely evaluates to 0 when the configuration is not defined. As a result, for MPAM, the display would be either: [default] or [mbm_event] Signed-off-by: Babu Moger Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Reinette Chatre Link: https://lore.kernel.org/cover.1757108044.git.babu.moger@amd.com --- Documentation/filesystems/resctrl.rst | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesystems/resctrl.rst index c97fd77a107d..b692829fec5f 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -257,6 +257,37 @@ with the following files: # cat /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config 0=0x30;1=0x30;3=0x15;4=0x15 +"mbm_assign_mode": + The supported counter assignment modes. The enclosed brackets indicate which mode + is enabled. + :: + + # cat /sys/fs/resctrl/info/L3_MON/mbm_assign_mode + [mbm_event] + default + + "mbm_event": + + mbm_event mode allows users to assign a hardware counter to an RMID, event + pair and monitor the bandwidth usage as long as it is assigned. The hardware + continues to track the assigned counter until it is explicitly unassigned by + the user. Each event within a resctrl group can be assigned independently. + + In this mode, a monitoring event can only accumulate data while it is backed + by a hardware counter. Use "mbm_L3_assignments" found in each CTRL_MON and MON + group to specify which of the events should have a counter assigned. The number + of counters available is described in the "num_mbm_cntrs" file. Changing the + mode may cause all counters on the resource to reset. + + "default": + + In default mode, resctrl assumes there is a hardware counter for each + event within every CTRL_MON and MON group. On AMD platforms, it is + recommended to use the mbm_event mode, if supported, to prevent reset of MBM + events between reads resulting from hardware re-allocating counters. This can + result in misleading values or display "Unavailable" if no counter is assigned + to the event. + "max_threshold_occupancy": Read/write file provides the largest value (in bytes) at which a previously used LLC_occupancy -- cgit v1.2.3 From 8c793336eaf8893a29626155d74615fe9f03e7f2 Mon Sep 17 00:00:00 2001 From: Babu Moger Date: Fri, 5 Sep 2025 16:34:10 -0500 Subject: fs/resctrl: Add resctrl file to display number of assignable counters The "mbm_event" counter assignment mode allows users to assign a hardware counter to an RMID, event pair and monitor bandwidth usage as long as it is assigned. The hardware continues to track the assigned counter until it is explicitly unassigned by the user. Create 'num_mbm_cntrs' resctrl file that displays the number of counters supported in each domain. 'num_mbm_cntrs' is only visible to user space when the system supports "mbm_event" mode. Signed-off-by: Babu Moger Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Reinette Chatre Link: https://lore.kernel.org/cover.1757108044.git.babu.moger@amd.com --- Documentation/filesystems/resctrl.rst | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesystems/resctrl.rst index b692829fec5f..4eb27530be6f 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -288,6 +288,17 @@ with the following files: result in misleading values or display "Unavailable" if no counter is assigned to the event. +"num_mbm_cntrs": + The maximum number of counters (total of available and assigned counters) in + each domain when the system supports mbm_event mode. + + For example, on a system with maximum of 32 memory bandwidth monitoring + counters in each of its L3 domains: + :: + + # cat /sys/fs/resctrl/info/L3_MON/num_mbm_cntrs + 0=32;1=32 + "max_threshold_occupancy": Read/write file provides the largest value (in bytes) at which a previously used LLC_occupancy -- cgit v1.2.3 From 16ff6b038fb3b64aa033efdc95d673239610e1a6 Mon Sep 17 00:00:00 2001 From: Babu Moger Date: Fri, 5 Sep 2025 16:34:12 -0500 Subject: fs/resctrl: Introduce interface to display number of free MBM counters Introduce the "available_mbm_cntrs" resctrl file to display the number of counters available for assignment in each domain when "mbm_event" mode is enabled. Signed-off-by: Babu Moger Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Reinette Chatre Link: https://lore.kernel.org/cover.1757108044.git.babu.moger@amd.com --- Documentation/filesystems/resctrl.rst | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesystems/resctrl.rst index 4eb27530be6f..446736dbd97f 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -299,6 +299,17 @@ with the following files: # cat /sys/fs/resctrl/info/L3_MON/num_mbm_cntrs 0=32;1=32 +"available_mbm_cntrs": + The number of counters available for assignment in each domain when mbm_event + mode is enabled on the system. + + For example, on a system with 30 available [hardware] assignable counters + in each of its L3 domains: + :: + + # cat /sys/fs/resctrl/info/L3_MON/available_mbm_cntrs + 0=30;1=30 + "max_threshold_occupancy": Read/write file provides the largest value (in bytes) at which a previously used LLC_occupancy -- cgit v1.2.3 From 159f36cd4de7718779fd0b232de5137b4ffd2d1e Mon Sep 17 00:00:00 2001 From: Babu Moger Date: Fri, 5 Sep 2025 16:34:22 -0500 Subject: fs/resctrl: Support counter read/reset with mbm_event assignment mode When "mbm_event" counter assignment mode is enabled, the architecture requires a counter ID to read the event data. Introduce an is_mbm_cntr field in struct rmid_read to indicate whether counter assignment mode is in use. Update the logic to call resctrl_arch_cntr_read() and resctrl_arch_reset_cntr() when the assignment mode is active. Report 'Unassigned' in case the user attempts to read an event without assigning a hardware counter. Suggested-by: Reinette Chatre Signed-off-by: Babu Moger Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Reinette Chatre Link: https://lore.kernel.org/cover.1757108044.git.babu.moger@amd.com --- Documentation/filesystems/resctrl.rst | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesystems/resctrl.rst index 446736dbd97f..4c24c5f3f4c1 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -434,6 +434,12 @@ When monitoring is enabled all MON groups will also contain: for the L3 cache they occupy). These are named "mon_sub_L3_YY" where "YY" is the node number. + When the 'mbm_event' counter assignment mode is enabled, reading + an MBM event of a MON group returns 'Unassigned' if no hardware + counter is assigned to it. For CTRL_MON groups, 'Unassigned' is + returned if the MBM event does not have an assigned counter in the + CTRL_MON group nor in any of its associated MON groups. + "mon_hw_id": Available only with debug option. The identifier used by hardware for the monitor group. On x86 this is the RMID. -- cgit v1.2.3 From ea274cbeaf8f0667267b347e3f84797439cdab4e Mon Sep 17 00:00:00 2001 From: Babu Moger Date: Fri, 5 Sep 2025 16:34:23 -0500 Subject: fs/resctrl: Add event configuration directory under info/L3_MON/ The "mbm_event" counter assignment mode allows the user to assign a hardware counter to an RMID, event pair and monitor the bandwidth as long as it is assigned. The user can specify the memory transaction(s) for the counter to track. When this mode is supported, the /sys/fs/resctrl/info/L3_MON/event_configs directory contains a sub-directory for each MBM event that can be assigned to a counter. The MBM event sub-directory contains a file named "event_filter" that is used to view and modify which memory transactions the MBM event is configured with. Create /sys/fs/resctrl/info/L3_MON/event_configs directory on resctrl mount and pre-populate it with directories for the two existing MBM events: mbm_total_bytes and mbm_local_bytes. Create the "event_filter" file within each MBM event directory with the needed *show() that displays the memory transactions with which the MBM event is configured. Example: $ mount -t resctrl resctrl /sys/fs/resctrl $ cd /sys/fs/resctrl/ $ cat info/L3_MON/event_configs/mbm_total_bytes/event_filter local_reads,remote_reads,local_non_temporal_writes, remote_non_temporal_writes,local_reads_slow_memory, remote_reads_slow_memory,dirty_victim_writes_all $ cat info/L3_MON/event_configs/mbm_local_bytes/event_filter local_reads,local_non_temporal_writes,local_reads_slow_memory Signed-off-by: Babu Moger Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Reinette Chatre Link: https://lore.kernel.org/cover.1757108044.git.babu.moger@amd.com --- Documentation/filesystems/resctrl.rst | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesystems/resctrl.rst index 4c24c5f3f4c1..ddd95f1472e6 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -310,6 +310,39 @@ with the following files: # cat /sys/fs/resctrl/info/L3_MON/available_mbm_cntrs 0=30;1=30 +"event_configs": + Directory that exists when "mbm_event" counter assignment mode is supported. + Contains a sub-directory for each MBM event that can be assigned to a counter. + + Two MBM events are supported by default: mbm_local_bytes and mbm_total_bytes. + Each MBM event's sub-directory contains a file named "event_filter" that is + used to view and modify which memory transactions the MBM event is configured + with. The file is accessible only when "mbm_event" counter assignment mode is + enabled. + + List of memory transaction types supported: + + ========================== ======================================================== + Name Description + ========================== ======================================================== + dirty_victim_writes_all Dirty Victims from the QOS domain to all types of memory + remote_reads_slow_memory Reads to slow memory in the non-local NUMA domain + local_reads_slow_memory Reads to slow memory in the local NUMA domain + remote_non_temporal_writes Non-temporal writes to non-local NUMA domain + local_non_temporal_writes Non-temporal writes to local NUMA domain + remote_reads Reads to memory in the non-local NUMA domain + local_reads Reads to memory in the local NUMA domain + ========================== ======================================================== + + For example:: + + # cat /sys/fs/resctrl/info/L3_MON/event_configs/mbm_total_bytes/event_filter + local_reads,remote_reads,local_non_temporal_writes,remote_non_temporal_writes, + local_reads_slow_memory,remote_reads_slow_memory,dirty_victim_writes_all + + # cat /sys/fs/resctrl/info/L3_MON/event_configs/mbm_local_bytes/event_filter + local_reads,local_non_temporal_writes,local_reads_slow_memory + "max_threshold_occupancy": Read/write file provides the largest value (in bytes) at which a previously used LLC_occupancy -- cgit v1.2.3 From f9ae5913d47cda67481a4f54cc3273d3d1d00a01 Mon Sep 17 00:00:00 2001 From: Babu Moger Date: Fri, 5 Sep 2025 16:34:24 -0500 Subject: fs/resctrl: Provide interface to update the event configurations When "mbm_event" counter assignment mode is enabled, users can modify the event configuration by writing to the 'event_filter' resctrl file. The event configurations for mbm_event mode are located in /sys/fs/resctrl/info/L3_MON/event_configs/. Update the assignments of all CTRL_MON and MON resource groups when the event configuration is modified. Example: $ mount -t resctrl resctrl /sys/fs/resctrl $ cd /sys/fs/resctrl/ $ cat info/L3_MON/event_configs/mbm_local_bytes/event_filter local_reads,local_non_temporal_writes,local_reads_slow_memory $ echo "local_reads,local_non_temporal_writes" > info/L3_MON/event_configs/mbm_total_bytes/event_filter $ cat info/L3_MON/event_configs/mbm_total_bytes/event_filter local_reads,local_non_temporal_writes Signed-off-by: Babu Moger Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Reinette Chatre Link: https://lore.kernel.org/cover.1757108044.git.babu.moger@amd.com --- Documentation/filesystems/resctrl.rst | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesystems/resctrl.rst index ddd95f1472e6..2e840ef26f68 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -343,6 +343,18 @@ with the following files: # cat /sys/fs/resctrl/info/L3_MON/event_configs/mbm_local_bytes/event_filter local_reads,local_non_temporal_writes,local_reads_slow_memory + Modify the event configuration by writing to the "event_filter" file within + the "event_configs" directory. The read/write "event_filter" file contains the + configuration of the event that reflects which memory transactions are counted by it. + + For example:: + + # echo "local_reads, local_non_temporal_writes" > + /sys/fs/resctrl/info/L3_MON/event_configs/mbm_total_bytes/event_filter + + # cat /sys/fs/resctrl/info/L3_MON/event_configs/mbm_total_bytes/event_filter + local_reads,local_non_temporal_writes + "max_threshold_occupancy": Read/write file provides the largest value (in bytes) at which a previously used LLC_occupancy -- cgit v1.2.3 From ac1df9bb0ba3ae94137fb494cd9efc598f65d826 Mon Sep 17 00:00:00 2001 From: Babu Moger Date: Fri, 5 Sep 2025 16:34:25 -0500 Subject: fs/resctrl: Introduce mbm_assign_on_mkdir to enable assignments on mkdir The "mbm_event" counter assignment mode allows users to assign a hardware counter to an RMID, event pair and monitor the bandwidth as long as it is assigned. Introduce a user-configurable option that determines if a counter will automatically be assigned to an RMID, event pair when its associated monitor group is created via mkdir. Accessible when "mbm_event" counter assignment mode is enabled. Suggested-by: Peter Newman Signed-off-by: Babu Moger Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Reinette Chatre Link: https://lore.kernel.org/cover.1757108044.git.babu.moger@amd.com --- Documentation/filesystems/resctrl.rst | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesystems/resctrl.rst index 2e840ef26f68..1de815b3a07b 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -355,6 +355,26 @@ with the following files: # cat /sys/fs/resctrl/info/L3_MON/event_configs/mbm_total_bytes/event_filter local_reads,local_non_temporal_writes +"mbm_assign_on_mkdir": + Exists when "mbm_event" counter assignment mode is supported. Accessible + only when "mbm_event" counter assignment mode is enabled. + + Determines if a counter will automatically be assigned to an RMID, MBM event + pair when its associated monitor group is created via mkdir. Enabled by default + on boot, also when switched from "default" mode to "mbm_event" counter assignment + mode. Users can disable this capability by writing to the interface. + + "0": + Auto assignment is disabled. + "1": + Auto assignment is enabled. + + Example:: + + # echo 0 > /sys/fs/resctrl/info/L3_MON/mbm_assign_on_mkdir + # cat /sys/fs/resctrl/info/L3_MON/mbm_assign_on_mkdir + 0 + "max_threshold_occupancy": Read/write file provides the largest value (in bytes) at which a previously used LLC_occupancy -- cgit v1.2.3 From cba8222880b88d96f3ed6c8a115e335e552b83a1 Mon Sep 17 00:00:00 2001 From: Babu Moger Date: Fri, 5 Sep 2025 16:34:27 -0500 Subject: fs/resctrl: Introduce mbm_L3_assignments to list assignments in a group Introduce the mbm_L3_assignments resctrl file associated with CTRL_MON and MON resource groups to display the counter assignment states of the resource group when "mbm_event" counter assignment mode is enabled. Display the list in the following format: :=;= Event: A valid MBM event listed in /sys/fs/resctrl/info/L3_MON/event_configs directory. Domain ID: A valid domain ID. The assignment state can be one of the following: _ : No counter assigned. e : Counter assigned exclusively. Example: To list the assignment states for the default group $ cd /sys/fs/resctrl $ cat /sys/fs/resctrl/mbm_L3_assignments mbm_total_bytes:0=e;1=e mbm_local_bytes:0=e;1=e Signed-off-by: Babu Moger Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Reinette Chatre Link: https://lore.kernel.org/cover.1757108044.git.babu.moger@amd.com --- Documentation/filesystems/resctrl.rst | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesystems/resctrl.rst index 1de815b3a07b..a2b7240b0818 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -509,6 +509,37 @@ When monitoring is enabled all MON groups will also contain: Available only with debug option. The identifier used by hardware for the monitor group. On x86 this is the RMID. +When monitoring is enabled all MON groups may also contain: + +"mbm_L3_assignments": + Exists when "mbm_event" counter assignment mode is supported and lists the + counter assignment states of the group. + + The assignment list is displayed in the following format: + + :=;= + + Event: A valid MBM event in the + /sys/fs/resctrl/info/L3_MON/event_configs directory. + + Domain ID: A valid domain ID. + + Assignment states: + + _ : No counter assigned. + + e : Counter assigned exclusively. + + Example: + + To display the counter assignment states for the default group. + :: + + # cd /sys/fs/resctrl + # cat /sys/fs/resctrl/mbm_L3_assignments + mbm_total_bytes:0=e;1=e + mbm_local_bytes:0=e;1=e + When the "mba_MBps" mount option is used all CTRL_MON groups will also contain: "mba_MBps_event": -- cgit v1.2.3 From 88bee79640aea6192f98c8faae30e0013453479d Mon Sep 17 00:00:00 2001 From: Babu Moger Date: Fri, 5 Sep 2025 16:34:28 -0500 Subject: fs/resctrl: Introduce the interface to modify assignments in a group Enable the mbm_l3_assignments resctrl file to be used to modify counter assignments of CTRL_MON and MON groups when the "mbm_event" counter assignment mode is enabled. Process the assignment modifications in the following format: :=;= Event: A valid MBM event in the /sys/fs/resctrl/info/L3_MON/event_configs directory. Domain ID: A valid domain ID. When writing, '*' applies the changes to all domains. Assignment states: _ : Unassign a counter. e : Assign a counter exclusively. Examples: $ cd /sys/fs/resctrl $ cat /sys/fs/resctrl/mbm_L3_assignments mbm_total_bytes:0=e;1=e mbm_local_bytes:0=e;1=e To unassign the counter associated with the mbm_total_bytes event on domain 0: $ echo "mbm_total_bytes:0=_" > mbm_L3_assignments $ cat /sys/fs/resctrl/mbm_L3_assignments mbm_total_bytes:0=_;1=e mbm_local_bytes:0=e;1=e To unassign the counter associated with the mbm_total_bytes event on all the domains: $ echo "mbm_total_bytes:*=_" > mbm_L3_assignments $ cat /sys/fs/resctrl/mbm_L3_assignments mbm_total_bytes:0=_;1=_ mbm_local_bytes:0=e;1=e Signed-off-by: Babu Moger Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Reinette Chatre Link: https://lore.kernel.org/cover.1757108044.git.babu.moger@amd.com --- Documentation/filesystems/resctrl.rst | 151 +++++++++++++++++++++++++++++++++- 1 file changed, 150 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesystems/resctrl.rst index a2b7240b0818..f60f6a96cb6b 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -522,7 +522,8 @@ When monitoring is enabled all MON groups may also contain: Event: A valid MBM event in the /sys/fs/resctrl/info/L3_MON/event_configs directory. - Domain ID: A valid domain ID. + Domain ID: A valid domain ID. When writing, '*' applies the changes + to all the domains. Assignment states: @@ -540,6 +541,35 @@ When monitoring is enabled all MON groups may also contain: mbm_total_bytes:0=e;1=e mbm_local_bytes:0=e;1=e + Assignments can be modified by writing to the interface. + + Examples: + + To unassign the counter associated with the mbm_total_bytes event on domain 0: + :: + + # echo "mbm_total_bytes:0=_" > /sys/fs/resctrl/mbm_L3_assignments + # cat /sys/fs/resctrl/mbm_L3_assignments + mbm_total_bytes:0=_;1=e + mbm_local_bytes:0=e;1=e + + To unassign the counter associated with the mbm_total_bytes event on all the domains: + :: + + # echo "mbm_total_bytes:*=_" > /sys/fs/resctrl/mbm_L3_assignments + # cat /sys/fs/resctrl/mbm_L3_assignments + mbm_total_bytes:0=_;1=_ + mbm_local_bytes:0=e;1=e + + To assign a counter associated with the mbm_total_bytes event on all domains in + exclusive mode: + :: + + # echo "mbm_total_bytes:*=e" > /sys/fs/resctrl/mbm_L3_assignments + # cat /sys/fs/resctrl/mbm_L3_assignments + mbm_total_bytes:0=e;1=e + mbm_local_bytes:0=e;1=e + When the "mba_MBps" mount option is used all CTRL_MON groups will also contain: "mba_MBps_event": @@ -1585,6 +1615,125 @@ View the llc occupancy snapshot:: # cat /sys/fs/resctrl/p1/mon_data/mon_L3_00/llc_occupancy 11234000 + +Examples on working with mbm_assign_mode +======================================== + +a. Check if MBM counter assignment mode is supported. +:: + + # mount -t resctrl resctrl /sys/fs/resctrl/ + + # cat /sys/fs/resctrl/info/L3_MON/mbm_assign_mode + [mbm_event] + default + +The "mbm_event" mode is detected and enabled. + +b. Check how many assignable counters are supported. +:: + + # cat /sys/fs/resctrl/info/L3_MON/num_mbm_cntrs + 0=32;1=32 + +c. Check how many assignable counters are available for assignment in each domain. +:: + + # cat /sys/fs/resctrl/info/L3_MON/available_mbm_cntrs + 0=30;1=30 + +d. To list the default group's assign states. +:: + + # cat /sys/fs/resctrl/mbm_L3_assignments + mbm_total_bytes:0=e;1=e + mbm_local_bytes:0=e;1=e + +e. To unassign the counter associated with the mbm_total_bytes event on domain 0. +:: + + # echo "mbm_total_bytes:0=_" > /sys/fs/resctrl/mbm_L3_assignments + # cat /sys/fs/resctrl/mbm_L3_assignments + mbm_total_bytes:0=_;1=e + mbm_local_bytes:0=e;1=e + +f. To unassign the counter associated with the mbm_total_bytes event on all domains. +:: + + # echo "mbm_total_bytes:*=_" > /sys/fs/resctrl/mbm_L3_assignments + # cat /sys/fs/resctrl/mbm_L3_assignment + mbm_total_bytes:0=_;1=_ + mbm_local_bytes:0=e;1=e + +g. To assign a counter associated with the mbm_total_bytes event on all domains in +exclusive mode. +:: + + # echo "mbm_total_bytes:*=e" > /sys/fs/resctrl/mbm_L3_assignments + # cat /sys/fs/resctrl/mbm_L3_assignments + mbm_total_bytes:0=e;1=e + mbm_local_bytes:0=e;1=e + +h. Read the events mbm_total_bytes and mbm_local_bytes of the default group. There is +no change in reading the events with the assignment. +:: + + # cat /sys/fs/resctrl/mon_data/mon_L3_00/mbm_total_bytes + 779247936 + # cat /sys/fs/resctrl/mon_data/mon_L3_01/mbm_total_bytes + 562324232 + # cat /sys/fs/resctrl/mon_data/mon_L3_00/mbm_local_bytes + 212122123 + # cat /sys/fs/resctrl/mon_data/mon_L3_01/mbm_local_bytes + 121212144 + +i. Check the event configurations. +:: + + # cat /sys/fs/resctrl/info/L3_MON/event_configs/mbm_total_bytes/event_filter + local_reads,remote_reads,local_non_temporal_writes,remote_non_temporal_writes, + local_reads_slow_memory,remote_reads_slow_memory,dirty_victim_writes_all + + # cat /sys/fs/resctrl/info/L3_MON/event_configs/mbm_local_bytes/event_filter + local_reads,local_non_temporal_writes,local_reads_slow_memory + +j. Change the event configuration for mbm_local_bytes. +:: + + # echo "local_reads, local_non_temporal_writes, local_reads_slow_memory, remote_reads" > + /sys/fs/resctrl/info/L3_MON/event_configs/mbm_local_bytes/event_filter + + # cat /sys/fs/resctrl/info/L3_MON/event_configs/mbm_local_bytes/event_filter + local_reads,local_non_temporal_writes,local_reads_slow_memory,remote_reads + +k. Now read the local events again. The first read may come back with "Unavailable" +status. The subsequent read of mbm_local_bytes will display the current value. +:: + + # cat /sys/fs/resctrl/mon_data/mon_L3_00/mbm_local_bytes + Unavailable + # cat /sys/fs/resctrl/mon_data/mon_L3_00/mbm_local_bytes + 2252323 + # cat /sys/fs/resctrl/mon_data/mon_L3_01/mbm_local_bytes + Unavailable + # cat /sys/fs/resctrl/mon_data/mon_L3_01/mbm_local_bytes + 1566565 + +l. Users have the option to go back to 'default' mbm_assign_mode if required. This can be +done using the following command. Note that switching the mbm_assign_mode may reset all +the MBM counters (and thus all MBM events) of all the resctrl groups. +:: + + # echo "default" > /sys/fs/resctrl/info/L3_MON/mbm_assign_mode + # cat /sys/fs/resctrl/info/L3_MON/mbm_assign_mode + mbm_event + [default] + +m. Unmount the resctrl filesystem. +:: + + # umount /sys/fs/resctrl/ + Intel RDT Errata ================ -- cgit v1.2.3 From 8004ea01cf6338298e0c6ab055bc3ec659ce381b Mon Sep 17 00:00:00 2001 From: Babu Moger Date: Fri, 5 Sep 2025 16:34:30 -0500 Subject: fs/resctrl: Introduce the interface to switch between monitor modes Resctrl subsystem can support two monitoring modes, "mbm_event" or "default". In mbm_event mode, monitoring event can only accumulate data while it is backed by a hardware counter. In "default" mode, resctrl assumes there is a hardware counter for each event within every CTRL_MON and MON group. Introduce mbm_assign_mode resctrl file to switch between mbm_event and default modes. Example: To list the MBM monitor modes supported: $ cat /sys/fs/resctrl/info/L3_MON/mbm_assign_mode [mbm_event] default To enable the "mbm_event" counter assignment mode: $ echo "mbm_event" > /sys/fs/resctrl/info/L3_MON/mbm_assign_mode To enable the "default" monitoring mode: $ echo "default" > /sys/fs/resctrl/info/L3_MON/mbm_assign_mode Reset MBM event counters automatically as part of changing the mode. Clear both architectural and non-architectural event states to prevent overflow conditions during the next event read. Clear assignable counter configuration on all the domains. Also, enable auto assignment when switching to "mbm_event" mode. Signed-off-by: Babu Moger Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Reinette Chatre Link: https://lore.kernel.org/cover.1757108044.git.babu.moger@amd.com --- Documentation/filesystems/resctrl.rst | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesystems/resctrl.rst index f60f6a96cb6b..006d23af66e1 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -259,7 +259,8 @@ with the following files: "mbm_assign_mode": The supported counter assignment modes. The enclosed brackets indicate which mode - is enabled. + is enabled. The MBM events associated with counters may reset when "mbm_assign_mode" + is changed. :: # cat /sys/fs/resctrl/info/L3_MON/mbm_assign_mode @@ -279,6 +280,15 @@ with the following files: of counters available is described in the "num_mbm_cntrs" file. Changing the mode may cause all counters on the resource to reset. + Moving to mbm_event counter assignment mode requires users to assign the counters + to the events. Otherwise, the MBM event counters will return 'Unassigned' when read. + + The mode is beneficial for AMD platforms that support more CTRL_MON + and MON groups than available hardware counters. By default, this + feature is enabled on AMD platforms with the ABMC (Assignable Bandwidth + Monitoring Counters) capability, ensuring counters remain assigned even + when the corresponding RMID is not actively used by any processor. + "default": In default mode, resctrl assumes there is a hardware counter for each @@ -288,6 +298,16 @@ with the following files: result in misleading values or display "Unavailable" if no counter is assigned to the event. + * To enable "mbm_event" counter assignment mode: + :: + + # echo "mbm_event" > /sys/fs/resctrl/info/L3_MON/mbm_assign_mode + + * To enable "default" monitoring mode: + :: + + # echo "default" > /sys/fs/resctrl/info/L3_MON/mbm_assign_mode + "num_mbm_cntrs": The maximum number of counters (total of available and assigned counters) in each domain when the system supports mbm_event mode. -- cgit v1.2.3 From 7f8d35b589c9f6acda0e36b184c193d38f092c36 Mon Sep 17 00:00:00 2001 From: Kaustabh Chakraborty Date: Sun, 6 Jul 2025 23:55:45 +0530 Subject: dt-bindings: samsung,mipi-dsim: document exynos7870 DSIM compatible Add compatible string for Exynos7870 DSIM bridge controller. The device requires four clock sources, in schema they're named as "bus", "pll", "byte", and "esc". Suggested-by: Krzysztof Kozlowski Reviewed-by: Rob Herring (Arm) Signed-off-by: Kaustabh Chakraborty Signed-off-by: Inki Dae --- .../bindings/display/bridge/samsung,mipi-dsim.yaml | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml b/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml index 1acad99f3965..ad279f0993fa 100644 --- a/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml +++ b/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml @@ -24,6 +24,7 @@ properties: - samsung,exynos5410-mipi-dsi - samsung,exynos5422-mipi-dsi - samsung,exynos5433-mipi-dsi + - samsung,exynos7870-mipi-dsi - fsl,imx8mm-mipi-dsim - fsl,imx8mp-mipi-dsim - items: @@ -144,6 +145,32 @@ required: allOf: - $ref: ../dsi-controller.yaml# + - if: + properties: + compatible: + contains: + const: samsung,exynos7870-mipi-dsi + + then: + properties: + clocks: + minItems: 4 + maxItems: 4 + + clock-names: + items: + - const: bus + - const: pll + - const: byte + - const: esc + + ports: + required: + - port@0 + + required: + - ports + - if: properties: compatible: -- cgit v1.2.3 From 0e6ee83c4b68448063e88e14c13c17d83e7d9735 Mon Sep 17 00:00:00 2001 From: Kaustabh Chakraborty Date: Sun, 6 Jul 2025 22:59:45 +0530 Subject: dt-bindings: display: samsung,exynos7-decon: document iommus, memory-region, and ports Similar to FIMD and Exynos5433's DECON, the Exynos7 DECON hardware: - May optionally require an IOMMU to initialize a display region. - Outputs image data to another block, say an MIC or a DSI master. If an IOMMU is present, it may also require to access the reserved framebuffer region. Document these bindings in the devicetree schema. Signed-off-by: Kaustabh Chakraborty Reviewed-by: Krzysztof Kozlowski Signed-off-by: Inki Dae --- .../display/samsung/samsung,exynos7-decon.yaml | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml index 53916e4c95d8..14b954718008 100644 --- a/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml +++ b/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml @@ -80,6 +80,21 @@ properties: - const: vsync - const: lcd_sys + iommus: + maxItems: 1 + + memory-region: + maxItems: 1 + description: + A phandle to a node describing a reserved framebuffer memory region. + For example, the splash memory region set up by the bootloader. + + port: + $ref: /schemas/graph.yaml#/properties/port + description: + Output port which is connected to either a Mobile Image Compressor + (MIC) or a DSI Master device. + power-domains: maxItems: 1 @@ -92,6 +107,7 @@ required: - clock-names - interrupts - interrupt-names + - port - reg additionalProperties: false @@ -118,4 +134,9 @@ examples: "decon0_vclk"; pinctrl-0 = <&lcd_clk &pwm1_out>; pinctrl-names = "default"; + port { + decon_to_dsi: endpoint { + remote-endpoint = <&dsi_to_decon>; + }; + }; }; -- cgit v1.2.3 From 7075ae4ac9db93a3e762f3c2793ad57dbbf8a120 Mon Sep 17 00:00:00 2001 From: Angela Czubak Date: Mon, 18 Aug 2025 23:08:44 +0000 Subject: Input: add INPUT_PROP_HAPTIC_TOUCHPAD INPUT_PROP_HAPTIC_TOUCHPAD property is to be set for a device with simple haptic capabilities. Signed-off-by: Angela Czubak Co-developed-by: Jonathan Denose Signed-off-by: Jonathan Denose Acked-by: Dmitry Torokhov Reviewed-by: Randy Dunlap Signed-off-by: Benjamin Tissoires --- Documentation/input/event-codes.rst | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'Documentation') diff --git a/Documentation/input/event-codes.rst b/Documentation/input/event-codes.rst index b4557462edd7..1ead9bb8d9c6 100644 --- a/Documentation/input/event-codes.rst +++ b/Documentation/input/event-codes.rst @@ -400,6 +400,20 @@ can report through the rotational axes (absolute and/or relative rx, ry, rz). All other axes retain their meaning. A device must not mix regular directional axes and accelerometer axes on the same event node. +INPUT_PROP_HAPTIC_TOUCHPAD +-------------------------- + +The INPUT_PROP_HAPTIC_TOUCHPAD property indicates that device: +- supports simple haptic auto and manual triggering +- can differentiate between at least 5 fingers +- uses correct resolution for the X/Y (units and value) +- reports correct force per touch, and correct units for them (newtons or grams) +- follows the MT protocol type B + +Summing up, such devices follow the MS spec for input devices in +Win8 and Win8.1, and in addition support the Simple haptic controller HID table, +and report correct units for the pressure. + Guidelines ========== -- cgit v1.2.3 From f99b3917789d83ea89b24b722d784956f8289f45 Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Mon, 15 Sep 2025 14:57:29 +0200 Subject: fs: rename generic_delete_inode() and generic_drop_inode() generic_delete_inode() is rather misleading for what the routine is doing. inode_just_drop() should be much clearer. The new naming is inconsistent with generic_drop_inode(), so rename that one as well with inode_ as the suffix. No functional changes. Signed-off-by: Mateusz Guzik Reviewed-by: Jan Kara Signed-off-by: Christian Brauner --- Documentation/filesystems/porting.rst | 4 ++-- Documentation/filesystems/vfs.rst | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/porting.rst b/Documentation/filesystems/porting.rst index 85f590254f07..b5db45c0094c 100644 --- a/Documentation/filesystems/porting.rst +++ b/Documentation/filesystems/porting.rst @@ -340,8 +340,8 @@ of those. Caller makes sure async writeback cannot be running for the inode whil ->drop_inode() returns int now; it's called on final iput() with inode->i_lock held and it returns true if filesystems wants the inode to be -dropped. As before, generic_drop_inode() is still the default and it's been -updated appropriately. generic_delete_inode() is also alive and it consists +dropped. As before, inode_generic_drop() is still the default and it's been +updated appropriately. inode_just_drop() is also alive and it consists simply of return 1. Note that all actual eviction work is done by caller after ->drop_inode() returns. diff --git a/Documentation/filesystems/vfs.rst b/Documentation/filesystems/vfs.rst index 486a91633474..7a314eee6305 100644 --- a/Documentation/filesystems/vfs.rst +++ b/Documentation/filesystems/vfs.rst @@ -327,11 +327,11 @@ or bottom half). inode->i_lock spinlock held. This method should be either NULL (normal UNIX filesystem - semantics) or "generic_delete_inode" (for filesystems that do + semantics) or "inode_just_drop" (for filesystems that do not want to cache inodes - causing "delete_inode" to always be called regardless of the value of i_nlink) - The "generic_delete_inode()" behavior is equivalent to the old + The "inode_just_drop()" behavior is equivalent to the old practice of using "force_delete" in the put_inode() case, but does not have the races that the "force_delete()" approach had. -- cgit v1.2.3 From 8d978222e87c5ea50f912141b18421882f89492a Mon Sep 17 00:00:00 2001 From: Shubhrajyoti Datta Date: Mon, 8 Sep 2025 17:26:48 +0530 Subject: dt-bindings: memory-controllers: Add support for Versal NET EDAC Add device tree bindings for AMD Versal NET EDAC for DDR controller. Signed-off-by: Shubhrajyoti Datta Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/20250908115649.22903-1-shubhrajyoti.datta@amd.com --- .../memory-controllers/xlnx,versal-net-ddrmc5.yaml | 41 ++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/xlnx,versal-net-ddrmc5.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/memory-controllers/xlnx,versal-net-ddrmc5.yaml b/Documentation/devicetree/bindings/memory-controllers/xlnx,versal-net-ddrmc5.yaml new file mode 100644 index 000000000000..479288567d0b --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/xlnx,versal-net-ddrmc5.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/xlnx,versal-net-ddrmc5.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Versal NET Memory Controller + +maintainers: + - Shubhrajyoti Datta + +description: + The integrated DDR Memory Controllers (DDRMCs) support both DDR5 and LPDDR5 + compact and extended memory interfaces. Versal NET DDR memory controller + has an optional ECC support which correct single bit ECC errors and detect + double bit ECC errors. It also has support for reporting other errors like + MMCM (Mixed-Mode Clock Manager) errors and General software errors. + +properties: + compatible: + const: xlnx,versal-net-ddrmc5 + + amd,rproc: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle to the remoteproc_r5 rproc node using which APU interacts + with remote processor. APU primarily communicates with the RPU for + accessing the DDRMC address space and getting error notification. + +required: + - compatible + - amd,rproc + +additionalProperties: false + +examples: + - | + memory-controller { + compatible = "xlnx,versal-net-ddrmc5"; + amd,rproc = <&remoteproc_r5>; + }; -- cgit v1.2.3 From a1e891fe4ae8df3ba17d75c270f1877e282c9d2c Mon Sep 17 00:00:00 2001 From: Ivan Vecera Date: Tue, 9 Sep 2025 11:15:32 +0200 Subject: dpll: zl3073x: Implement devlink flash callback Use the introduced functionality to read firmware files and flash their contents into the device's internal flash memory to implement the devlink flash update callback. Sample output on EDS2 development board: # devlink -j dev info i2c/1-0070 | jq '.[][]["versions"]["running"]' { "fw": "6026" } # devlink dev flash i2c/1-0070 file firmware_fw2.hex [utility] Prepare flash mode [utility] Downloading image 100% [utility] Flash mode enabled [firmware1-part1] Downloading image 100% [firmware1-part1] Flashing image [firmware1-part2] Downloading image 100% [firmware1-part2] Flashing image [firmware1] Flashing done [firmware2] Downloading image 100% [firmware2] Flashing image 100% [firmware2] Flashing done [utility] Leaving flash mode Flashing done # devlink -j dev info i2c/1-0070 | jq '.[][]["versions"]["running"]' { "fw": "7006" } Reviewed-by: Przemek Kitszel Signed-off-by: Ivan Vecera Link: https://patch.msgid.link/20250909091532.11790-6-ivecera@redhat.com Signed-off-by: Jakub Kicinski --- Documentation/networking/devlink/zl3073x.rst | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/devlink/zl3073x.rst b/Documentation/networking/devlink/zl3073x.rst index 4b6cfaf38643..fc5a8dc272a7 100644 --- a/Documentation/networking/devlink/zl3073x.rst +++ b/Documentation/networking/devlink/zl3073x.rst @@ -49,3 +49,17 @@ The ``zl3073x`` driver reports the following versions - running - 1.3.0.1 - Device configuration version customized by OEM + +Flash Update +============ + +The ``zl3073x`` driver implements support for flash update using the +``devlink-flash`` interface. It supports updating the device flash using a +combined flash image ("bundle") that contains multiple components (firmware +parts and configurations). + +During the flash procedure, the standard firmware interface is not available, +so the driver unregisters all DPLLs and associated pins, and re-registers them +once the flash procedure is complete. + +The driver does not support any overwrite mask flags. -- cgit v1.2.3 From dcc7a571a3665a16581b5b18ca6b113f60a9a41a Mon Sep 17 00:00:00 2001 From: Amirreza Zarrabi Date: Thu, 11 Sep 2025 21:07:50 -0700 Subject: Documentation: tee: Add Qualcomm TEE driver Add documentation for the Qualcomm TEE driver. Acked-by: Sumit Garg Signed-off-by: Amirreza Zarrabi Signed-off-by: Jens Wiklander --- Documentation/tee/index.rst | 1 + Documentation/tee/qtee.rst | 96 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 97 insertions(+) create mode 100644 Documentation/tee/qtee.rst (limited to 'Documentation') diff --git a/Documentation/tee/index.rst b/Documentation/tee/index.rst index 4be6e69d7837..62afb7ee9b52 100644 --- a/Documentation/tee/index.rst +++ b/Documentation/tee/index.rst @@ -11,6 +11,7 @@ TEE Subsystem op-tee amd-tee ts-tee + qtee .. only:: subproject and html diff --git a/Documentation/tee/qtee.rst b/Documentation/tee/qtee.rst new file mode 100644 index 000000000000..2fa2c1bf6384 --- /dev/null +++ b/Documentation/tee/qtee.rst @@ -0,0 +1,96 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================================= +QTEE (Qualcomm Trusted Execution Environment) +============================================= + +The QTEE driver handles communication with Qualcomm TEE [1]. + +The lowest level of communication with QTEE builds on the ARM SMC Calling +Convention (SMCCC) [2], which is the foundation for QTEE's Secure Channel +Manager (SCM) [3] used internally by the driver. + +In a QTEE-based system, services are represented as objects with a series of +operations that can be called to produce results, including other objects. + +When an object is hosted within QTEE, executing its operations is referred +to as "direct invocation". QTEE can also invoke objects hosted in the non-secure +world using a method known as "callback request". + +The SCM provides two functions to support direct invocation and callback requests: + +- QCOM_SCM_SMCINVOKE_INVOKE: Used for direct invocation. It can return either + a result or initiate a callback request. +- QCOM_SCM_SMCINVOKE_CB_RSP: Used to submit a response to a callback request + triggered by a previous direct invocation. + +The QTEE Transport Message [4] is stacked on top of the SCM driver functions. + +A message consists of two buffers shared with QTEE: inbound and outbound +buffers. The inbound buffer is used for direct invocation, and the outbound +buffer is used to make callback requests. This picture shows the contents of +a QTEE transport message:: + + +---------------------+ + | v + +-----------------+-------+-------+------+--------------------------+ + | qcomtee_msg_ |object | buffer | | + | object_invoke | id | offset, size | | (inbound buffer) + +-----------------+-------+--------------+--------------------------+ + <---- header -----><---- arguments ------><- in/out buffer payload -> + + +-----------+ + | v + +-----------------+-------+-------+------+----------------------+ + | qcomtee_msg_ |object | buffer | | + | callback | id | offset, size | | (outbound buffer) + +-----------------+-------+--------------+----------------------+ + +Each buffer is started with a header and array of arguments. + +QTEE Transport Message supports four types of arguments: + +- Input Object (IO) is an object parameter to the current invocation + or callback request. +- Output Object (OO) is an object parameter from the current invocation + or callback request. +- Input Buffer (IB) is (offset, size) pair to the inbound or outbound region + to store parameter to the current invocation or callback request. +- Output Buffer (OB) is (offset, size) pair to the inbound or outbound region + to store parameter from the current invocation or callback request. + +Picture of the relationship between the different components in the QTEE +architecture:: + + User space Kernel Secure world + ~~~~~~~~~~ ~~~~~~ ~~~~~~~~~~~~ + +--------+ +----------+ +--------------+ + | Client | |callback | | Trusted | + +--------+ |server | | Application | + /\ +----------+ +--------------+ + || +----------+ /\ /\ + || |callback | || || + || |server | || \/ + || +----------+ || +--------------+ + || /\ || | TEE Internal | + || || || | API | + \/ \/ \/ +--------+--------+ +--------------+ + +---------------------+ | TEE | QTEE | | QTEE | + | libqcomtee [5] | | subsys | driver | | Trusted OS | + +-------+-------------+--+----+-------+----+-------------+--------------+ + | Generic TEE API | | QTEE MSG | + | IOCTL (TEE_IOC_*) | | SMCCC (QCOM_SCM_SMCINVOKE_*) | + +-----------------------------+ +---------------------------------+ + +References +========== + +[1] https://docs.qualcomm.com/bundle/publicresource/topics/80-70015-11/qualcomm-trusted-execution-environment.html + +[2] http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html + +[3] drivers/firmware/qcom/qcom_scm.c + +[4] drivers/tee/qcomtee/qcomtee_msg.h + +[5] https://github.com/quic/quic-teec -- cgit v1.2.3 From dd1704a50738605997e0aff71981c33241c3df67 Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Thu, 7 Aug 2025 08:09:30 +0200 Subject: dt-binding: can: m_can: add optional resets property The m_can IP core has an external reset line. Add it to the bindings documentation. Signed-off-by: Marc Kleine-Budde Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250807-stm32mp15-m_can-add-reset-v2-1-f69ebbfced1f@pengutronix.de Signed-off-by: Alexandre Torgue --- Documentation/devicetree/bindings/net/can/bosch,m_can.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml index c4887522e8fe..61ef60d8f1c7 100644 --- a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml +++ b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml @@ -50,6 +50,9 @@ properties: - const: hclk - const: cclk + resets: + maxItems: 1 + bosch,mram-cfg: description: | Message RAM configuration data. -- cgit v1.2.3 From 6c7c620585c6537dd5dcc75f972b875caf00f773 Mon Sep 17 00:00:00 2001 From: Ashish Kalra Date: Wed, 20 Aug 2025 20:50:25 +0000 Subject: KVM: SEV: Add SEV-SNP CipherTextHiding support Ciphertext hiding prevents host accesses from reading the ciphertext of SNP guest private memory. Instead of reading ciphertext, the host reads will see constant default values (0xff). The SEV ASID space is split into SEV and SEV-ES/SEV-SNP ASID ranges. Enabling ciphertext hiding further splits the SEV-ES/SEV-SNP ASID space into separate ASID ranges for SEV-ES and SEV-SNP guests. Add a new off-by-default kvm-amd module parameter to enable ciphertext hiding and allow the admin to configure the SEV-ES and SEV-SNP ASID ranges. Simply cap the maximum SEV-SNP ASID as appropriate, i.e. don't reject loading KVM or disable ciphertest hiding for a too-big value, as KVM's general approach for module params is to sanitize inputs based on hardware/kernel support, not burn the world down. This also allows the admin to use -1u to assign all SEV-ES/SNP ASIDs to SNP without needing dedicated handling in KVM. Suggested-by: Sean Christopherson Signed-off-by: Ashish Kalra Co-developed-by: Sean Christopherson Link: https://lore.kernel.org/r/95abc49edfde36d4fb791570ea2a4be6ad95fd0d.1755721927.git.ashish.kalra@amd.com Signed-off-by: Sean Christopherson --- Documentation/admin-guide/kernel-parameters.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 747a55abf494..69d640efb661 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -2957,6 +2957,27 @@ (enabled). Disable by KVM if hardware lacks support for NPT. + kvm-amd.ciphertext_hiding_asids= + [KVM,AMD] Ciphertext hiding prevents disallowed accesses + to SNP private memory from reading ciphertext. Instead, + reads will see constant default values (0xff). + + If ciphertext hiding is enabled, the joint SEV-ES and + SEV-SNP ASID space is partitioned into separate SEV-ES + and SEV-SNP ASID ranges, with the SEV-SNP range being + [1..max_snp_asid] and the SEV-ES range being + (max_snp_asid..min_sev_asid), where min_sev_asid is + enumerated by CPUID.0x.8000_001F[EDX]. + + A non-zero value enables SEV-SNP ciphertext hiding and + adjusts the ASID ranges for SEV-ES and SEV-SNP guests. + KVM caps the number of SEV-SNP ASIDs at the maximum + possible value, e.g. specifying -1u will assign all + joint SEV-ES and SEV-SNP ASIDs to SEV-SNP. Note, + assigning all joint ASIDs to SEV-SNP, i.e. configuring + max_snp_asid == min_sev_asid-1, will effectively make + SEV-ES unusable. + kvm-arm.mode= [KVM,ARM,EARLY] Select one of KVM/arm64's modes of operation. -- cgit v1.2.3 From 0f101028407605c7b7cea53946ee4d25f82cfb6c Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Sun, 14 Sep 2025 16:02:29 +0300 Subject: dt-bindings: regulator: document max77838 pmic The max77838 is a pmic, containing a BUCK regulator and 4 LDOs. It's primarily used in the Samsung Galaxy S7 lineup and is accessed over I2C. Document it. Signed-off-by: Ivaylo Ivanov Acked-by: Conor Dooley Reviewed-by: Igor Belwon Link: https://patch.msgid.link/20250914130230.2622030-2-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Mark Brown --- .../bindings/regulator/maxim,max77838.yaml | 68 ++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/maxim,max77838.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/regulator/maxim,max77838.yaml b/Documentation/devicetree/bindings/regulator/maxim,max77838.yaml new file mode 100644 index 000000000000..bed36af5493d --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/maxim,max77838.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/maxim,max77838.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim Integrated MAX77838 PMIC + +maintainers: + - Ivaylo Ivanov + +properties: + $nodename: + pattern: "pmic@[0-9a-f]{1,2}" + compatible: + enum: + - maxim,max77838 + + reg: + maxItems: 1 + + regulators: + type: object + $ref: regulator.yaml# + description: | + list of regulators provided by this controller, must be named + after their hardware counterparts ldo[1-4] and buck + + properties: + buck: + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + + patternProperties: + "^ldo([1-4])$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + + additionalProperties: false + +required: + - compatible + - reg + - regulators + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@60 { + compatible = "maxim,max77838"; + reg = <0x60>; + + regulators { + ldo2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + }; + }; + }; +... -- cgit v1.2.3 From d021fb3ae844dad0a1d2f037a9657fde330955bb Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 15 Sep 2025 10:12:26 +0300 Subject: dt-bindings: iio: adc: ROHM BD79112 ADC/GPIO The ROHM BD79112 is an ADC/GPIO with 32 channels. The channel inputs can be used as ADC or GPIO. Using the GPIOs as IRQ sources isn't supported. The ADC is 12-bit, supporting input voltages up to 5.7V, and separate I/O voltage supply. Maximum SPI clock rate is 20 MHz (10 MHz with daisy-chain configuration) and maximum sampling rate is 1MSPS. Add a device tree binding document for the ROHM BD79112. Signed-off-by: Matti Vaittinen Acked-by: Conor Dooley Reviewed-by: Linus Walleij Signed-off-by: Jonathan Cameron --- .../devicetree/bindings/iio/adc/rohm,bd79112.yaml | 104 +++++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/rohm,bd79112.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/rohm,bd79112.yaml b/Documentation/devicetree/bindings/iio/adc/rohm,bd79112.yaml new file mode 100644 index 000000000000..aa8b07c3fac1 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/rohm,bd79112.yaml @@ -0,0 +1,104 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/rohm,bd79112.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM BD79112 ADC/GPO + +maintainers: + - Matti Vaittinen + +description: | + The ROHM BD79112 is a 12-bit, 32-channel, SAR ADC. ADC input pins can be + also configured as general purpose inputs/outputs. SPI should use MODE 3. + +properties: + compatible: + const: rohm,bd79112 + + reg: + maxItems: 1 + + spi-cpha: true + spi-cpol: true + + gpio-controller: true + "#gpio-cells": + const: 2 + + vdd-supply: true + + iovdd-supply: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^channel@([0-9]|[12][0-9]|3[01])$": + type: object + $ref: /schemas/iio/adc/adc.yaml# + description: Represents ADC channel. Omitted channels' inputs are GPIOs. + + properties: + reg: + description: AIN pin number + minimum: 0 + maximum: 31 + + required: + - reg + + additionalProperties: false + +required: + - compatible + - reg + - iovdd-supply + - vdd-supply + - spi-cpha + - spi-cpol + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + adc: adc@0 { + compatible = "rohm,bd79112"; + reg = <0x0>; + + spi-cpha; + spi-cpol; + + vdd-supply = <&dummyreg>; + iovdd-supply = <&dummyreg>; + + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + channel@0 { + reg = <0>; + }; + channel@1 { + reg = <1>; + }; + channel@2 { + reg = <2>; + }; + channel@16 { + reg = <16>; + }; + channel@20 { + reg = <20>; + }; + }; + }; -- cgit v1.2.3 From 92d6295a29dba56148406a8452c69ab49787741b Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Tue, 9 Sep 2025 23:22:54 -0500 Subject: Documentation/amdgpu: Add Ryzen AI 330 series processor This has been announced so add to the table. Link: https://www.amd.com/en/products/processors/laptop/ryzen/ai-300-series/amd-ryzen-ai-5-330.html Acked-by: Alex Deucher Signed-off-by: Mario Limonciello Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/apu-asic-info-table.csv | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/apu-asic-info-table.csv b/Documentation/gpu/amdgpu/apu-asic-info-table.csv index b479c5629146..dee5f663a47f 100644 --- a/Documentation/gpu/amdgpu/apu-asic-info-table.csv +++ b/Documentation/gpu/amdgpu/apu-asic-info-table.csv @@ -13,5 +13,6 @@ Ryzen 7x20 series, Mendocino, 3.1.6, 10.3.7, 3.1.1, 5.2.7, 13.0.8, 13.0.8 Ryzen 7x40 series, Phoenix, 3.1.4, 11.0.1 / 11.0.4, 4.0.2, 6.0.1, 13.0.4 / 13.0.11, 13.0.4 / 13.0.11 Ryzen 8x40 series, Hawk Point, 3.1.4, 11.0.1 / 11.0.4, 4.0.2, 6.0.1, 13.0.4 / 13.0.11, 13.0.4 / 13.0.11 Ryzen AI 300 series, Strix Point, 3.5.0, 11.5.0, 4.0.5, 6.1.0, 14.0.0, 14.0.0 +Ryzen AI 330 series, Krackan Point, 3.6.0, 11.5.3, 4.0.5, 6.1.3, 14.0.5, 14.0.5 Ryzen AI 350 series, Krackan Point, 3.5.0, 11.5.2, 4.0.5, 6.1.2, 14.0.4, 14.0.4 Ryzen AI Max 300 series, Strix Halo, 3.5.1, 11.5.1, 4.0.6, 6.1.1, 14.0.1, 14.0.1 -- cgit v1.2.3 From e0dd9b8e9e669c5f7de0bbf2e1d2706a7c7d63f7 Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Wed, 10 Sep 2025 13:40:30 -0500 Subject: drm/amd: Duplicate DC_FEATURE_MASK and DC_DEBUG_MASK enum values into kdoc [Why] When kernel documentation is generated the enum values themselves don't end up in the documentation. This makes browsing them in HTML a lot less useful. [How] Copy DC_DEBUG_MASK and DC_FEATURE_MASK enum values into matching kdoc comments. Reviewed-by: Alex Deucher Signed-off-by: Mario Limonciello Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/driver-core.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/driver-core.rst b/Documentation/gpu/amdgpu/driver-core.rst index bd4be32f2725..3ce276272171 100644 --- a/Documentation/gpu/amdgpu/driver-core.rst +++ b/Documentation/gpu/amdgpu/driver-core.rst @@ -210,4 +210,4 @@ IP Blocks :doc: IP Blocks .. kernel-doc:: drivers/gpu/drm/amd/include/amd_shared.h - :identifiers: amd_ip_block_type amd_ip_funcs DC_DEBUG_MASK + :identifiers: amd_ip_block_type amd_ip_funcs DC_FEATURE_MASK DC_DEBUG_MASK -- cgit v1.2.3 From 944df7a31452f75bbc15b1e7215e1aacee8cd1b4 Mon Sep 17 00:00:00 2001 From: Jonathan Corbet Date: Mon, 8 Sep 2025 13:32:10 -0600 Subject: docs: update the guidance for Link: tags As stated definitively by Linus, the use of Link: tags should be limited to situations where there is additional useful information to be found at the far end of the link. Update our documentation to reflect that policy, and to remove the suggestion for a Git hook to add those tags automatically. Link: https://lore.kernel.org/all/CAHk-=wh5AyuvEhNY9a57v-vwyr7EkPVRUKMPwj92yF_K0dJHVg@mail.gmail.com/ Cc: Linus Walleij Reviewed-by: Randy Dunlap Reviewed-by: Linus Walleij Signed-off-by: Jonathan Corbet Message-ID: <87segwyc3p.fsf@trenco.lwn.net> --- Documentation/maintainer/configure-git.rst | 28 ---------------------------- Documentation/process/5.Posting.rst | 7 +++---- 2 files changed, 3 insertions(+), 32 deletions(-) (limited to 'Documentation') diff --git a/Documentation/maintainer/configure-git.rst b/Documentation/maintainer/configure-git.rst index 0a36831814ea..0c21f203cf7a 100644 --- a/Documentation/maintainer/configure-git.rst +++ b/Documentation/maintainer/configure-git.rst @@ -28,31 +28,3 @@ You may also like to tell ``gpg`` which ``tty`` to use (add to your shell rc file):: export GPG_TTY=$(tty) - - -Creating commit links to lore.kernel.org ----------------------------------------- - -The web site https://lore.kernel.org is meant as a grand archive of all mail -list traffic concerning or influencing the kernel development. Storing archives -of patches here is a recommended practice, and when a maintainer applies a -patch to a subsystem tree, it is a good idea to provide a Link: tag with a -reference back to the lore archive so that people that browse the commit -history can find related discussions and rationale behind a certain change. -The link tag will look like this:: - - Link: https://lore.kernel.org/r/ - -This can be configured to happen automatically any time you issue ``git am`` -by adding the following hook into your git:: - - $ git config am.messageid true - $ cat >.git/hooks/applypatch-msg <<'EOF' - #!/bin/sh - . git-sh-setup - perl -pi -e 's|^Message-I[dD]:\s*]+)>?$|Link: https://lore.kernel.org/r/$1|g;' "$1" - test -x "$GIT_DIR/hooks/commit-msg" && - exec "$GIT_DIR/hooks/commit-msg" ${1+"$@"} - : - EOF - $ chmod a+x .git/hooks/applypatch-msg diff --git a/Documentation/process/5.Posting.rst b/Documentation/process/5.Posting.rst index 22fa925353cf..9999bcbdccc9 100644 --- a/Documentation/process/5.Posting.rst +++ b/Documentation/process/5.Posting.rst @@ -207,10 +207,9 @@ document with a specification implemented by the patch:: Link: https://example.com/somewhere.html optional-other-stuff -Many maintainers when applying a patch also add this tag to link to the -latest public review posting of the patch; often this is automatically done -by tools like b4 or a git hook like the one described in -'Documentation/maintainer/configure-git.rst'. +As per guidance from the Chief Penguin, a Link: tag should only be added to +a commit if it leads to useful information that is not found in the commit +itself. If the URL points to a public bug report being fixed by the patch, use the "Closes:" tag instead:: -- cgit v1.2.3 From 00d95fcc4dee66dfb6980de6f2973b32f973a1eb Mon Sep 17 00:00:00 2001 From: Jonathan Corbet Date: Tue, 9 Sep 2025 13:35:37 -0600 Subject: docs: kdoc: handle the obsolescensce of docutils.ErrorString() The ErrorString() and SafeString() docutils functions were helpers meant to ease the handling of encodings during the Python 3 transition. There is no real need for them after Python 3.6, and docutils 0.22 removes them, breaking the docs build Handle this by just injecting our own one-liner version of ErrorString(), and removing the sole SafeString() call entirely. Reported-by: Zhixu Liu Signed-off-by: Jonathan Corbet Message-ID: <87ldmnv2pi.fsf@trenco.lwn.net> --- Documentation/sphinx/kernel_feat.py | 4 +++- Documentation/sphinx/kernel_include.py | 6 ++++-- Documentation/sphinx/maintainers_include.py | 4 +++- 3 files changed, 10 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kernel_feat.py b/Documentation/sphinx/kernel_feat.py index e3a51867f27b..aaac76892ceb 100644 --- a/Documentation/sphinx/kernel_feat.py +++ b/Documentation/sphinx/kernel_feat.py @@ -40,9 +40,11 @@ import sys from docutils import nodes, statemachine from docutils.statemachine import ViewList from docutils.parsers.rst import directives, Directive -from docutils.utils.error_reporting import ErrorString from sphinx.util.docutils import switch_source_input +def ErrorString(exc): # Shamelessly stolen from docutils + return f'{exc.__class__.__name}: {exc}' + __version__ = '1.0' def setup(app): diff --git a/Documentation/sphinx/kernel_include.py b/Documentation/sphinx/kernel_include.py index 2c4bb8215b4c..f94412cd17c9 100755 --- a/Documentation/sphinx/kernel_include.py +++ b/Documentation/sphinx/kernel_include.py @@ -89,7 +89,6 @@ import sys from docutils import io, nodes, statemachine from docutils.statemachine import ViewList -from docutils.utils.error_reporting import SafeString, ErrorString from docutils.parsers.rst import Directive, directives from docutils.parsers.rst.directives.body import CodeBlock, NumberLines @@ -106,6 +105,9 @@ logger = logging.getLogger(__name__) RE_DOMAIN_REF = re.compile(r'\\ :(ref|c:type|c:func):`([^<`]+)(?:<([^>]+)>)?`\\') RE_SIMPLE_REF = re.compile(r'`([^`]+)`') +def ErrorString(exc): # Shamelessly stolen from docutils + return f'{exc.__class__.__name}: {exc}' + # ============================================================================== class KernelInclude(Directive): @@ -156,7 +158,7 @@ class KernelInclude(Directive): except UnicodeEncodeError: raise self.severe('Problems with directive path:\n' 'Cannot encode input file path "%s" ' - '(wrong locale?).' % SafeString(path)) + '(wrong locale?).' % path) except IOError as error: raise self.severe('Problems with directive path:\n%s.' % ErrorString(error)) diff --git a/Documentation/sphinx/maintainers_include.py b/Documentation/sphinx/maintainers_include.py index d31cff867436..519ad18685b2 100755 --- a/Documentation/sphinx/maintainers_include.py +++ b/Documentation/sphinx/maintainers_include.py @@ -22,10 +22,12 @@ import re import os.path from docutils import statemachine -from docutils.utils.error_reporting import ErrorString from docutils.parsers.rst import Directive from docutils.parsers.rst.directives.misc import Include +def ErrorString(exc): # Shamelessly stolen from docutils + return f'{exc.__class__.__name}: {exc}' + __version__ = '1.0' def setup(app): -- cgit v1.2.3 From 8c01cc2382bc351672c8eb946c16f567cfffef60 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Wed, 10 Sep 2025 21:41:22 +0100 Subject: dt-bindings: net: pcs: renesas,rzn1-miic: Add RZ/T2H and RZ/N2H support Add device tree binding support for RZ/T2H and RZ/N2H SoCs to the existing RZ/N1 MIIC converter binding. These SoCs share similar MIIC functionality but have architectural differences that require schema updates. Add new compatible strings "renesas,r9a09g077-miic" for RZ/T2H and "renesas,r9a09g087-miic" for RZ/N2H, with the latter falling back to the RZ/T2H variant. The new SoCs require reset support with two reset lines for converter register reset and converter reset, which are not present on RZ/N1. Update port configurations to accommodate the different architectures. RZ/N1 supports 5 ports numbered 1-5 with complex input mappings covering indices 0-13, while RZ/T2H and RZ/N2H support 4 ports numbered 0-3 with simplified input mappings covering indices 0-8. Extend the switch port configuration property to support value 0 for the new SoCs. Add a new dt-bindings header file with media interface connection matrix constants that map GMAC, ESC, and ETHSW ports to numeric identifiers for use with RZ/T2H and RZ/N2H device trees. Update DT schema validation to ensure proper port numbering and input mappings per SoC variant. Signed-off-by: Lad Prabhakar Tested-by: Wolfram Sang Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250910204132.319975-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Jakub Kicinski --- .../bindings/net/pcs/renesas,rzn1-miic.yaml | 177 +++++++++++++++------ 1 file changed, 129 insertions(+), 48 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml b/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml index 2d33bbab7163..3adbcf56d2be 100644 --- a/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml +++ b/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml @@ -4,14 +4,15 @@ $id: http://devicetree.org/schemas/net/pcs/renesas,rzn1-miic.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Renesas RZ/N1 MII converter +title: Renesas RZ/N1, RZ/N2H and RZ/T2H MII converter maintainers: - Clément Léger + - Lad Prabhakar description: | - This MII converter is present on the Renesas RZ/N1 SoC family. It is - responsible to do MII passthrough or convert it to RMII/RGMII. + This MII converter is present on the Renesas RZ/N1, RZ/N2H and RZ/T2H SoC + families. It is responsible to do MII passthrough or convert it to RMII/RGMII. properties: '#address-cells': @@ -21,10 +22,16 @@ properties: const: 0 compatible: - items: - - enum: - - renesas,r9a06g032-miic - - const: renesas,rzn1-miic + oneOf: + - items: + - enum: + - renesas,r9a06g032-miic + - const: renesas,rzn1-miic + - items: + - const: renesas,r9a09g077-miic # RZ/T2H + - items: + - const: renesas,r9a09g087-miic # RZ/N2H + - const: renesas,r9a09g077-miic reg: maxItems: 1 @@ -43,11 +50,22 @@ properties: - const: rmii_ref - const: hclk + resets: + items: + - description: Converter register reset + - description: Converter reset + + reset-names: + items: + - const: rst + - const: crst + renesas,miic-switch-portin: description: MII Switch PORTIN configuration. This value should use one of - the values defined in dt-bindings/net/pcs-rzn1-miic.h. + the values defined in dt-bindings/net/pcs-rzn1-miic.h for RZ/N1 SoC and + include/dt-bindings/net/renesas,r9a09g077-pcs-miic.h for RZ/N2H, RZ/T2H SoCs. $ref: /schemas/types.yaml#/definitions/uint32 - enum: [1, 2] + enum: [0, 1, 2] power-domains: maxItems: 1 @@ -60,11 +78,12 @@ patternProperties: properties: reg: description: MII Converter port number. - enum: [1, 2, 3, 4, 5] + enum: [0, 1, 2, 3, 4, 5] renesas,miic-input: description: Converter input port configuration. This value should use - one of the values defined in dt-bindings/net/pcs-rzn1-miic.h. + one of the values defined in dt-bindings/net/pcs-rzn1-miic.h for RZ/N1 SoC + and include/dt-bindings/net/renesas,r9a09g077-pcs-miic.h for RZ/N2H, RZ/T2H SoCs. $ref: /schemas/types.yaml#/definitions/uint32 required: @@ -73,47 +92,109 @@ patternProperties: additionalProperties: false - allOf: - - if: - properties: - reg: - const: 1 - then: - properties: - renesas,miic-input: - const: 0 - - if: +allOf: + - if: + properties: + compatible: + contains: + const: renesas,rzn1-miic + then: + properties: + renesas,miic-switch-portin: + enum: [1, 2] + resets: false + reset-names: false + patternProperties: + "^mii-conv@[0-5]$": properties: reg: - const: 2 - then: - properties: - renesas,miic-input: - enum: [1, 11] - - if: - properties: - reg: - const: 3 - then: - properties: - renesas,miic-input: - enum: [7, 10] - - if: + enum: [1, 2, 3, 4, 5] + allOf: + - if: + properties: + reg: + const: 1 + then: + properties: + renesas,miic-input: + const: 0 + - if: + properties: + reg: + const: 2 + then: + properties: + renesas,miic-input: + enum: [1, 11] + - if: + properties: + reg: + const: 3 + then: + properties: + renesas,miic-input: + enum: [7, 10] + - if: + properties: + reg: + const: 4 + then: + properties: + renesas,miic-input: + enum: [4, 6, 9, 13] + - if: + properties: + reg: + const: 5 + then: + properties: + renesas,miic-input: + enum: [3, 5, 8, 12] + else: + properties: + renesas,miic-switch-portin: + const: 0 + required: + - resets + - reset-names + patternProperties: + "^mii-conv@[0-5]$": properties: reg: - const: 4 - then: - properties: - renesas,miic-input: - enum: [4, 6, 9, 13] - - if: - properties: - reg: - const: 5 - then: - properties: - renesas,miic-input: - enum: [3, 5, 8, 12] + enum: [0, 1, 2, 3] + allOf: + - if: + properties: + reg: + const: 0 + then: + properties: + renesas,miic-input: + enum: [0, 3, 6] + - if: + properties: + reg: + const: 1 + then: + properties: + renesas,miic-input: + enum: [1, 4, 7] + - if: + properties: + reg: + const: 2 + then: + properties: + renesas,miic-input: + enum: [2, 5, 8] + - if: + properties: + reg: + const: 3 + then: + properties: + renesas,miic-input: + const: 1 required: - '#address-cells' -- cgit v1.2.3 From 515c0ead788f4118a91b3ae55fe51f95543553ec Mon Sep 17 00:00:00 2001 From: "Matthieu Baerts (NGI0)" Date: Sat, 13 Sep 2025 15:29:52 +0200 Subject: netlink: specs: team: avoid mangling multilines doc By default, strings defined in YAML at the next line are folded: newlines are replaced by spaces. Here, the newlines are there for a reason, and should be kept in the output. This can be fixed by adding the '|' symbol to use the "literal" style. This issue was introduced by commit 387724cbf415 ("Documentation: netlink: add a YAML spec for team"), but visible in the doc only since the parent commit. To avoid warnings when generating the HTML output, and to look better, the code layout is now in a dedicated code block, which requires '::' and a new blank line. Just for a question of uniformity, a new blank line is also added after the code block. Suggested-by: Donald Hunter Signed-off-by: Matthieu Baerts (NGI0) Link: https://patch.msgid.link/20250913-net-next-ynl-attr-doc-rst-v3-2-4f06420d87db@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/team.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/team.yaml b/Documentation/netlink/specs/team.yaml index cf02d47d12a4..83a275b44c82 100644 --- a/Documentation/netlink/specs/team.yaml +++ b/Documentation/netlink/specs/team.yaml @@ -25,8 +25,9 @@ definitions: attribute-sets: - name: team - doc: - The team nested layout of get/set msg looks like + doc: | + The team nested layout of get/set msg looks like:: + [TEAM_ATTR_LIST_OPTION] [TEAM_ATTR_ITEM_OPTION] [TEAM_ATTR_OPTION_*], ... @@ -39,6 +40,7 @@ attribute-sets: [TEAM_ATTR_ITEM_PORT] [TEAM_ATTR_PORT_*], ... ... + name-prefix: team-attr- attributes: - -- cgit v1.2.3 From 12e74931ee9792b5256f4433efd779cfd0aca443 Mon Sep 17 00:00:00 2001 From: "Matthieu Baerts (NGI0)" Date: Sat, 13 Sep 2025 15:29:53 +0200 Subject: netlink: specs: explicitly declare block scalar strings In YAML, it is allowed to declare a scalar strings at the next lines without explicitly declaring them as a block. Yet, they looks weird, and can cause issues when ':' or '#' are present. The modified lines didn't have issues with the special characters, but it seems better to explicitly declare such blocks as scalar strings to encourage people to "properly" declare future scalar strings. The right angle bracket is used with a minus sign to indicate that the folded style should be used without adding extra newlines. By doing that, the output is not changed compared to what was done before this patch. Suggested-by: Donald Hunter Signed-off-by: Matthieu Baerts (NGI0) Link: https://patch.msgid.link/20250913-net-next-ynl-attr-doc-rst-v3-3-4f06420d87db@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/conntrack.yaml | 2 +- Documentation/netlink/specs/netdev.yaml | 22 +++++++++++----------- Documentation/netlink/specs/nftables.yaml | 2 +- Documentation/netlink/specs/nl80211.yaml | 2 +- Documentation/netlink/specs/ovs_datapath.yaml | 2 +- Documentation/netlink/specs/ovs_flow.yaml | 2 +- Documentation/netlink/specs/ovs_vport.yaml | 2 +- Documentation/netlink/specs/rt-addr.yaml | 2 +- Documentation/netlink/specs/rt-link.yaml | 2 +- Documentation/netlink/specs/rt-neigh.yaml | 2 +- Documentation/netlink/specs/rt-route.yaml | 2 +- Documentation/netlink/specs/rt-rule.yaml | 2 +- Documentation/netlink/specs/tc.yaml | 2 +- 13 files changed, 23 insertions(+), 23 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/conntrack.yaml b/Documentation/netlink/specs/conntrack.yaml index c6832633ab7b..642ac859cb7a 100644 --- a/Documentation/netlink/specs/conntrack.yaml +++ b/Documentation/netlink/specs/conntrack.yaml @@ -4,7 +4,7 @@ name: conntrack protocol: netlink-raw protonum: 12 -doc: +doc: >- Netfilter connection tracking subsystem over nfnetlink definitions: diff --git a/Documentation/netlink/specs/netdev.yaml b/Documentation/netlink/specs/netdev.yaml index c035dc0f64fd..e00d3fa1c152 100644 --- a/Documentation/netlink/specs/netdev.yaml +++ b/Documentation/netlink/specs/netdev.yaml @@ -2,7 +2,7 @@ --- name: netdev -doc: +doc: >- netdev configuration over generic netlink. definitions: @@ -13,33 +13,33 @@ definitions: entries: - name: basic - doc: + doc: >- XDP features set supported by all drivers (XDP_ABORTED, XDP_DROP, XDP_PASS, XDP_TX) - name: redirect - doc: + doc: >- The netdev supports XDP_REDIRECT - name: ndo-xmit - doc: + doc: >- This feature informs if netdev implements ndo_xdp_xmit callback. - name: xsk-zerocopy - doc: + doc: >- This feature informs if netdev supports AF_XDP in zero copy mode. - name: hw-offload - doc: + doc: >- This feature informs if netdev supports XDP hw offloading. - name: rx-sg - doc: + doc: >- This feature informs if netdev implements non-linear XDP buffer support in the driver napi callback. - name: ndo-xmit-sg - doc: + doc: >- This feature informs if netdev implements non-linear XDP buffer support in ndo_xdp_xmit callback. - @@ -67,15 +67,15 @@ definitions: entries: - name: tx-timestamp - doc: + doc: >- HW timestamping egress packets is supported by the driver. - name: tx-checksum - doc: + doc: >- L3 checksum HW offload is supported by the driver. - name: tx-launch-time-fifo - doc: + doc: >- Launch time HW offload is supported by the driver. - name: queue-type diff --git a/Documentation/netlink/specs/nftables.yaml b/Documentation/netlink/specs/nftables.yaml index 2ee10d92d644..cce88819ba71 100644 --- a/Documentation/netlink/specs/nftables.yaml +++ b/Documentation/netlink/specs/nftables.yaml @@ -4,7 +4,7 @@ name: nftables protocol: netlink-raw protonum: 12 -doc: +doc: >- Netfilter nftables configuration over netlink. definitions: diff --git a/Documentation/netlink/specs/nl80211.yaml b/Documentation/netlink/specs/nl80211.yaml index 610fdd5e000e..802097128bda 100644 --- a/Documentation/netlink/specs/nl80211.yaml +++ b/Documentation/netlink/specs/nl80211.yaml @@ -3,7 +3,7 @@ name: nl80211 protocol: genetlink-legacy -doc: +doc: >- Netlink API for 802.11 wireless devices definitions: diff --git a/Documentation/netlink/specs/ovs_datapath.yaml b/Documentation/netlink/specs/ovs_datapath.yaml index 0c0abf3f9f05..f7b3671991e6 100644 --- a/Documentation/netlink/specs/ovs_datapath.yaml +++ b/Documentation/netlink/specs/ovs_datapath.yaml @@ -5,7 +5,7 @@ version: 2 protocol: genetlink-legacy uapi-header: linux/openvswitch.h -doc: +doc: >- OVS datapath configuration over generic netlink. definitions: diff --git a/Documentation/netlink/specs/ovs_flow.yaml b/Documentation/netlink/specs/ovs_flow.yaml index 2dac9c8add57..951837b72e1d 100644 --- a/Documentation/netlink/specs/ovs_flow.yaml +++ b/Documentation/netlink/specs/ovs_flow.yaml @@ -5,7 +5,7 @@ version: 1 protocol: genetlink-legacy uapi-header: linux/openvswitch.h -doc: +doc: >- OVS flow configuration over generic netlink. definitions: diff --git a/Documentation/netlink/specs/ovs_vport.yaml b/Documentation/netlink/specs/ovs_vport.yaml index da47e65fd574..fa975f8821b6 100644 --- a/Documentation/netlink/specs/ovs_vport.yaml +++ b/Documentation/netlink/specs/ovs_vport.yaml @@ -5,7 +5,7 @@ version: 2 protocol: genetlink-legacy uapi-header: linux/openvswitch.h -doc: +doc: >- OVS vport configuration over generic netlink. definitions: diff --git a/Documentation/netlink/specs/rt-addr.yaml b/Documentation/netlink/specs/rt-addr.yaml index bafe3bfeabfb..3a582eac1629 100644 --- a/Documentation/netlink/specs/rt-addr.yaml +++ b/Documentation/netlink/specs/rt-addr.yaml @@ -5,7 +5,7 @@ protocol: netlink-raw uapi-header: linux/rtnetlink.h protonum: 0 -doc: +doc: >- Address configuration over rtnetlink. definitions: diff --git a/Documentation/netlink/specs/rt-link.yaml b/Documentation/netlink/specs/rt-link.yaml index 210394c188a3..6ab31f86854d 100644 --- a/Documentation/netlink/specs/rt-link.yaml +++ b/Documentation/netlink/specs/rt-link.yaml @@ -5,7 +5,7 @@ protocol: netlink-raw uapi-header: linux/rtnetlink.h protonum: 0 -doc: +doc: >- Link configuration over rtnetlink. definitions: diff --git a/Documentation/netlink/specs/rt-neigh.yaml b/Documentation/netlink/specs/rt-neigh.yaml index 30a9ee16f128..2f568a6231c9 100644 --- a/Documentation/netlink/specs/rt-neigh.yaml +++ b/Documentation/netlink/specs/rt-neigh.yaml @@ -5,7 +5,7 @@ protocol: netlink-raw uapi-header: linux/rtnetlink.h protonum: 0 -doc: +doc: >- IP neighbour management over rtnetlink. definitions: diff --git a/Documentation/netlink/specs/rt-route.yaml b/Documentation/netlink/specs/rt-route.yaml index 5b514ddeff1d..1ecb3fadc067 100644 --- a/Documentation/netlink/specs/rt-route.yaml +++ b/Documentation/netlink/specs/rt-route.yaml @@ -5,7 +5,7 @@ protocol: netlink-raw uapi-header: linux/rtnetlink.h protonum: 0 -doc: +doc: >- Route configuration over rtnetlink. definitions: diff --git a/Documentation/netlink/specs/rt-rule.yaml b/Documentation/netlink/specs/rt-rule.yaml index 46b1d426e7e8..bebee452a950 100644 --- a/Documentation/netlink/specs/rt-rule.yaml +++ b/Documentation/netlink/specs/rt-rule.yaml @@ -5,7 +5,7 @@ protocol: netlink-raw uapi-header: linux/fib_rules.h protonum: 0 -doc: +doc: >- FIB rule management over rtnetlink. definitions: diff --git a/Documentation/netlink/specs/tc.yaml b/Documentation/netlink/specs/tc.yaml index b1afc7ab3539..b398f7a46dae 100644 --- a/Documentation/netlink/specs/tc.yaml +++ b/Documentation/netlink/specs/tc.yaml @@ -5,7 +5,7 @@ protocol: netlink-raw uapi-header: linux/pkt_cls.h protonum: 0 -doc: +doc: >- Netlink raw family for tc qdisc, chain, class and filter configuration over rtnetlink. -- cgit v1.2.3 From 17628f1abbf4bd4162c655f3260d68bc1934ec73 Mon Sep 17 00:00:00 2001 From: Ioana Ciornei Date: Fri, 12 Sep 2025 19:59:16 +0300 Subject: dt-bindings: gpio: fix trivial-gpio's schema id In case the trivial-gpio schema is referenced through a $ref like /schemas/trivial-gpio.yaml to match its current schema ID, the following error message is displayed: Error in referenced schema matching $id: http://devicetree.org/schemas/trivial-gpio.yaml Tried these paths (check schema $id if path is wrong): /path/to/linux/Documentation/devicetree/bindings/trivial-gpio.yaml /path/to/dtchema/schemas/trivial-gpio.yaml Fix this by adding the 'gpio' folder to the schema's ID to match its file path. Fixes: f03a7f20b23c ("dt-bindings: gpio: Create a trivial GPIO schema") Signed-off-by: Ioana Ciornei Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250912165916.3098215-1-ioana.ciornei@nxp.com Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/gpio/trivial-gpio.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpio/trivial-gpio.yaml b/Documentation/devicetree/bindings/gpio/trivial-gpio.yaml index 0299d4a25086..c994177de940 100644 --- a/Documentation/devicetree/bindings/gpio/trivial-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/trivial-gpio.yaml @@ -1,7 +1,7 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: http://devicetree.org/schemas/trivial-gpio.yaml# +$id: http://devicetree.org/schemas/gpio/trivial-gpio.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Trivial 2-cell GPIO controllers -- cgit v1.2.3 From 8d7de4a014f589c1776959f7fdadbf7b12045aac Mon Sep 17 00:00:00 2001 From: Jonas Rebmann Date: Wed, 10 Sep 2025 14:35:22 +0200 Subject: ASoC: dt-bindings: asahi-kasei,ak4458: Reference common DAI properties Reference the dai-common.yaml schema to allow '#sound-dai-cells' and "sound-name-prefix' to be used. Signed-off-by: Jonas Rebmann Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250910-imx8mp-prt8ml-v1-2-fd04aed15670@pengutronix.de Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/sound/asahi-kasei,ak4458.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/asahi-kasei,ak4458.yaml b/Documentation/devicetree/bindings/sound/asahi-kasei,ak4458.yaml index 4477f84b7acc..1fdbeecc5eff 100644 --- a/Documentation/devicetree/bindings/sound/asahi-kasei,ak4458.yaml +++ b/Documentation/devicetree/bindings/sound/asahi-kasei,ak4458.yaml @@ -15,6 +15,9 @@ properties: - asahi-kasei,ak4458 - asahi-kasei,ak4497 + "#sound-dai-cells": + const: 0 + reg: maxItems: 1 @@ -46,6 +49,7 @@ required: - reg allOf: + - $ref: dai-common.yaml# - if: properties: compatible: -- cgit v1.2.3 From e3df98d30369d7859a855bd3e500ea46205640ca Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 9 Sep 2025 07:04:31 +0700 Subject: xfs: extend removed sysctls table Commit 21d59d00221e4e ("xfs: remove deprecated sysctl knobs") moves recently-removed sysctls to the removed sysctls table but fails to extend the table, hence triggering Sphinx warning: Documentation/admin-guide/xfs.rst:365: ERROR: Malformed table. Text in column margin in table line 8. ============================= ======= Name Removed ============================= ======= fs.xfs.xfsbufd_centisec v4.0 fs.xfs.age_buffer_centisecs v4.0 fs.xfs.irix_symlink_mode v6.18 fs.xfs.irix_sgid_inherit v6.18 fs.xfs.speculative_cow_prealloc_lifetime v6.18 ============================= ======= [docutils] Extend "Name" column of the table to fit the now-longest sysctl, which is fs.xfs.speculative_cow_prealloc_lifetime. Fixes: 21d59d00221e ("xfs: remove deprecated sysctl knobs") Reported-by: Stephen Rothwell Closes: https://lore.kernel.org/linux-next/20250908180406.32124fb7@canb.auug.org.au/ Signed-off-by: Bagas Sanjaya Reviewed-by: Darrick J. Wong Reviewed-by: Randy Dunlap Signed-off-by: Carlos Maiolino --- Documentation/admin-guide/xfs.rst | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/xfs.rst b/Documentation/admin-guide/xfs.rst index d6f531f2c0e6..c85cd327af28 100644 --- a/Documentation/admin-guide/xfs.rst +++ b/Documentation/admin-guide/xfs.rst @@ -355,15 +355,15 @@ None currently. Removed Sysctls =============== -============================= ======= - Name Removed -============================= ======= - fs.xfs.xfsbufd_centisec v4.0 - fs.xfs.age_buffer_centisecs v4.0 - fs.xfs.irix_symlink_mode v6.18 - fs.xfs.irix_sgid_inherit v6.18 - fs.xfs.speculative_cow_prealloc_lifetime v6.18 -============================= ======= +========================================== ======= + Name Removed +========================================== ======= + fs.xfs.xfsbufd_centisec v4.0 + fs.xfs.age_buffer_centisecs v4.0 + fs.xfs.irix_symlink_mode v6.18 + fs.xfs.irix_sgid_inherit v6.18 + fs.xfs.speculative_cow_prealloc_lifetime v6.18 +========================================== ======= Error handling ============== -- cgit v1.2.3 From 62a12a221769f102062c014dc227555d3a6a6df1 Mon Sep 17 00:00:00 2001 From: Vivian Wang Date: Sun, 14 Sep 2025 12:23:12 +0800 Subject: dt-bindings: net: Add support for SpacemiT K1 The Ethernet MACs on SpacemiT K1 appears to be a custom design. SpacemiT refers to them as "EMAC", so let's just call them "spacemit,k1-emac". Signed-off-by: Vivian Wang Reviewed-by: Conor Dooley Link: https://patch.msgid.link/20250914-net-k1-emac-v12-1-65b31b398f44@iscas.ac.cn Signed-off-by: Paolo Abeni --- .../devicetree/bindings/net/spacemit,k1-emac.yaml | 81 ++++++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/spacemit,k1-emac.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/spacemit,k1-emac.yaml b/Documentation/devicetree/bindings/net/spacemit,k1-emac.yaml new file mode 100644 index 000000000000..500a3e1daa23 --- /dev/null +++ b/Documentation/devicetree/bindings/net/spacemit,k1-emac.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/spacemit,k1-emac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SpacemiT K1 Ethernet MAC + +allOf: + - $ref: ethernet-controller.yaml# + +maintainers: + - Vivian Wang + +properties: + compatible: + const: spacemit,k1-emac + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + mdio-bus: + $ref: mdio.yaml# + unevaluatedProperties: false + + resets: + maxItems: 1 + + spacemit,apmu: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to syscon that controls this MAC + - description: offset of control registers + description: + A phandle to syscon with byte offset to control registers for this MAC + +required: + - compatible + - reg + - clocks + - interrupts + - resets + - spacemit,apmu + +unevaluatedProperties: false + +examples: + - | + #include + + ethernet@cac80000 { + compatible = "spacemit,k1-emac"; + reg = <0xcac80000 0x00000420>; + clocks = <&syscon_apmu CLK_EMAC0_BUS>; + interrupts = <131>; + mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&rgmii0>; + phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_cfg>; + resets = <&syscon_apmu RESET_EMAC0>; + rx-internal-delay-ps = <0>; + tx-internal-delay-ps = <0>; + spacemit,apmu = <&syscon_apmu 0x3e4>; + + mdio-bus { + #address-cells = <0x1>; + #size-cells = <0x0>; + + rgmii0: phy@1 { + reg = <0x1>; + }; + }; + }; -- cgit v1.2.3 From 88d0d17192c5a850dc07bb38035b69c4cefde270 Mon Sep 17 00:00:00 2001 From: Alexey Klimov Date: Mon, 15 Sep 2025 17:27:48 +0100 Subject: ASoC: dt-bindings: add bindings for pm4125 audio codec The audio codec IC is found on Qualcomm PM4125/PM2250 PMIC. It has TX and RX soundwire slave devices hence two files are added. Signed-off-by: Alexey Klimov Reviewed-by: Srinivas Kandagatla Tested-by: Srinivas Kandagatla Link: https://patch.msgid.link/20250915-pm4125_audio_codec_v1-v4-1-b247b64eec52@linaro.org Signed-off-by: Mark Brown --- .../bindings/sound/qcom,pm4125-codec.yaml | 134 +++++++++++++++++++++ .../devicetree/bindings/sound/qcom,pm4125-sdw.yaml | 79 ++++++++++++ 2 files changed, 213 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/qcom,pm4125-codec.yaml create mode 100644 Documentation/devicetree/bindings/sound/qcom,pm4125-sdw.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/qcom,pm4125-codec.yaml b/Documentation/devicetree/bindings/sound/qcom,pm4125-codec.yaml new file mode 100644 index 000000000000..6e2f103be1d3 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/qcom,pm4125-codec.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/qcom,pm4125-codec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm PM4125 Audio Codec + +maintainers: + - Alexey Klimov + +description: + The audio codec IC found on Qualcomm PM4125/PM2250 PMIC. + It has RX and TX Soundwire slave devices. + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + const: qcom,pm4125-codec + + reg: + description: + Specifies the SPMI base address for the audio codec peripherals. The + address space contains reset register needed to power-on the codec. + maxItems: 1 + + reg-names: + maxItems: 1 + + vdd-io-supply: + description: A reference to the 1.8V I/O supply + + vdd-cp-supply: + description: A reference to the charge pump I/O supply + + vdd-mic-bias-supply: + description: A reference to the 3.3V mic bias supply + + vdd-pa-vpos-supply: + description: A reference to the PA VPOS supply + + qcom,tx-device: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: A reference to Soundwire tx device phandle + + qcom,rx-device: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: A reference to Soundwire rx device phandle + + qcom,micbias1-microvolt: + description: micbias1 voltage + minimum: 1800000 + maximum: 2850000 + + qcom,micbias2-microvolt: + description: micbias2 voltage + minimum: 1800000 + maximum: 2850000 + + qcom,micbias3-microvolt: + description: micbias3 voltage + minimum: 1800000 + maximum: 2850000 + + qcom,mbhc-buttons-vthreshold-microvolt: + description: + Array of 8 Voltage threshold values corresponding to headset + button0 - button7 + minItems: 8 + maxItems: 8 + + '#sound-dai-cells': + const: 1 + +required: + - compatible + - reg + - vdd-io-supply + - vdd-cp-supply + - vdd-mic-bias-supply + - vdd-pa-vpos-supply + - qcom,tx-device + - qcom,rx-device + - qcom,micbias1-microvolt + - qcom,micbias2-microvolt + - qcom,micbias3-microvolt + - '#sound-dai-cells' + +unevaluatedProperties: false + +examples: + - | + #include + + spmi { + #address-cells = <2>; + #size-cells = <0>; + + pmic { + #address-cells = <1>; + #size-cells = <0>; + + audio-codec@f000 { + compatible = "qcom,pm4125-codec"; + reg = <0xf000>; + vdd-io-supply = <&pm4125_l15>; + vdd-cp-supply = <&pm4125_s4>; + vdd-pa-vpos-supply = <&pm4125_s4>; + vdd-mic-bias-supply = <&pm4125_l22>; + qcom,micbias1-microvolt = <1800000>; + qcom,micbias2-microvolt = <1800000>; + qcom,micbias3-microvolt = <1800000>; + qcom,rx-device = <&pm4125_rx>; + qcom,tx-device = <&pm4125_tx>; + #sound-dai-cells = <1>; + }; + }; + }; + + /* ... */ + + soundwire@a610000 { + reg = <0x0a610000 0x2000>; + #address-cells = <2>; + #size-cells = <0>; + pm4125_rx: audio-codec@0,4 { + compatible = "sdw20217010c00"; + reg = <0 4>; + qcom,rx-port-mapping = <1 3>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/sound/qcom,pm4125-sdw.yaml b/Documentation/devicetree/bindings/sound/qcom,pm4125-sdw.yaml new file mode 100644 index 000000000000..23624f32ac30 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/qcom,pm4125-sdw.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/qcom,pm4125-sdw.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SoundWire Slave devices on PM4125/PM2250 PMIC audio codec. + +maintainers: + - Alexey Klimov + +description: + The audio codec IC found on Qualcomm PM4125/PM2250 PMICs. + It has RX and TX Soundwire slave devices. + +properties: + compatible: + const: sdw20217010c00 + + reg: + maxItems: 1 + + qcom,tx-port-mapping: + description: | + Specifies static port mapping between device and host tx ports. + In the order of the device port index which are adc1_port, adc23_port, + dmic03_mbhc_port, dmic46_port. + Supports maximum 2 tx soundwire ports. + + PM4125 TX Port 1 (ADC1,2 & DMIC0 & MBHC) <=> SWR0 Port 1 + PM4125 TX Port 2 (ADC1 & DMIC0,1,2 & MBHC) <=> SWR0 Port 2 + + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + maxItems: 2 + items: + enum: [1, 2, 3, 4] + + qcom,rx-port-mapping: + description: | + Specifies static port mapping between device and host rx ports. + In the order of device port index which are hph_port, clsh_port, + comp_port, lo_port, dsd port. + Supports maximum 2 rx soundwire ports. + + PM4125 RX Port 1 (HPH_L/R) <==> SWR1 Port 1 (HPH_L/R) + PM4125 RX Port 2 (COMP_L/R) <==> SWR1 Port 3 (COMP_L/R) + + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + maxItems: 2 + items: + enum: [1, 2, 3, 4, 5] + +required: + - compatible + - reg + +oneOf: + - required: + - qcom,tx-port-mapping + - required: + - qcom,rx-port-mapping + +additionalProperties: false + +examples: + - | + soundwire@a610000 { + reg = <0x0a610000 0x2000>; + #address-cells = <2>; + #size-cells = <0>; + pm4125_rx: codec@0,1 { + compatible = "sdw20217010c00"; + reg = <0 1>; + qcom,rx-port-mapping = <1 3>; + }; + }; +... -- cgit v1.2.3 From aee814458fb98819876442f0261fad0bb9842224 Mon Sep 17 00:00:00 2001 From: Mathieu Dubois-Briand Date: Sun, 24 Aug 2025 13:57:20 +0200 Subject: dt-bindings: mfd: gpio: Add MAX7360 Add device tree bindings for Maxim Integrated MAX7360 device with support for keypad, rotary, gpios and pwm functionalities. Reviewed-by: "Rob Herring (Arm)" Reviewed-by: Krzysztof Kozlowski Signed-off-by: Mathieu Dubois-Briand Link: https://lore.kernel.org/r/20250824-mdb-max7360-support-v14-1-435cfda2b1ea@bootlin.com Signed-off-by: Lee Jones --- .../bindings/gpio/maxim,max7360-gpio.yaml | 83 +++++++++ .../devicetree/bindings/mfd/maxim,max7360.yaml | 191 +++++++++++++++++++++ 2 files changed, 274 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/maxim,max7360-gpio.yaml create mode 100644 Documentation/devicetree/bindings/mfd/maxim,max7360.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpio/maxim,max7360-gpio.yaml b/Documentation/devicetree/bindings/gpio/maxim,max7360-gpio.yaml new file mode 100644 index 000000000000..c5c3fc4c816f --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/maxim,max7360-gpio.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/maxim,max7360-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX7360 GPIO controller + +maintainers: + - Kamel Bouhara + - Mathieu Dubois-Briand + +description: | + Maxim MAX7360 GPIO controller, in MAX7360 chipset + https://www.analog.com/en/products/max7360.html + + The device provides two series of GPIOs, referred here as GPIOs and GPOs. + + PORT0 to PORT7 pins can be used as GPIOs, with support for interrupts and + constant-current mode. These pins will also be used by the rotary encoder and + PWM functionalities. + + COL2 to COL7 pins can be used as GPOs, there is no input capability. COL pins + will be partitioned, with the first pins being affected to the keypad + functionality and the last ones as GPOs. + +properties: + compatible: + enum: + - maxim,max7360-gpio + - maxim,max7360-gpo + + gpio-controller: true + + "#gpio-cells": + const: 2 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + maxim,constant-current-disable: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Bit field, each bit disables constant-current output of the associated + GPIO, starting from the least significant bit for the first GPIO. + maximum: 0xff + +required: + - compatible + - gpio-controller + +allOf: + - if: + properties: + compatible: + contains: + enum: + - maxim,max7360-gpio + ngpios: false + then: + required: + - interrupt-controller + else: + properties: + interrupt-controller: false + maxim,constant-current-disable: false + +additionalProperties: false + +examples: + - | + gpio { + compatible = "maxim,max7360-gpio"; + + gpio-controller; + #gpio-cells = <2>; + maxim,constant-current-disable = <0x06>; + + interrupt-controller; + #interrupt-cells = <2>; + }; diff --git a/Documentation/devicetree/bindings/mfd/maxim,max7360.yaml b/Documentation/devicetree/bindings/mfd/maxim,max7360.yaml new file mode 100644 index 000000000000..3fc920c8639d --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/maxim,max7360.yaml @@ -0,0 +1,191 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/maxim,max7360.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX7360 Keypad, Rotary encoder, PWM and GPIO controller + +maintainers: + - Kamel Bouhara + - Mathieu Dubois-Briand + +description: | + Maxim MAX7360 device, with following functions: + - keypad controller + - rotary controller + - GPIO and GPO controller + - PWM controller + + https://www.analog.com/en/products/max7360.html + +allOf: + - $ref: /schemas/input/matrix-keymap.yaml# + - $ref: /schemas/input/input.yaml# + +properties: + compatible: + enum: + - maxim,max7360 + + reg: + maxItems: 1 + + interrupts: + maxItems: 2 + + interrupt-names: + items: + - const: inti + - const: intk + + keypad-debounce-delay-ms: + description: Keypad debounce delay in ms + minimum: 9 + maximum: 40 + default: 9 + + rotary-debounce-delay-ms: + description: Rotary encoder debounce delay in ms + minimum: 0 + maximum: 15 + default: 0 + + linux,axis: + $ref: /schemas/input/rotary-encoder.yaml#/properties/linux,axis + + rotary-encoder,relative-axis: + $ref: /schemas/types.yaml#/definitions/flag + description: + Register a relative axis rather than an absolute one. + + rotary-encoder,steps: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 24 + description: + Number of steps in a full turnaround of the + encoder. Only relevant for absolute axis. Defaults to 24 which is a + typical value for such devices. + + rotary-encoder,rollover: + $ref: /schemas/types.yaml#/definitions/flag + description: + Automatic rollover when the rotary value becomes + greater than the specified steps or smaller than 0. For absolute axis only. + + "#pwm-cells": + const: 3 + + gpio: + $ref: /schemas/gpio/maxim,max7360-gpio.yaml# + description: + PORT0 to PORT7 general purpose input/output pins configuration. + + gpo: + $ref: /schemas/gpio/maxim,max7360-gpio.yaml# + description: > + COL2 to COL7 general purpose output pins configuration. Allows to use + unused keypad columns as outputs. + + The MAX7360 has 8 column lines and 6 of them can be used as GPOs. GPIOs + numbers used for this gpio-controller node do correspond to the column + numbers: values 0 and 1 are never valid, values from 2 to 7 might be valid + depending on the value of the keypad,num-column property. + +patternProperties: + '-pins$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: /schemas/pinctrl/pincfg-node.yaml + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + pattern: '^(PORT[0-7]|ROTARY)$' + minItems: 1 + maxItems: 8 + + function: + description: + Specify the alternative function to be configured for the specified + pins. + enum: [gpio, pwm, rotary] + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - interrupt-names + - linux,keymap + - linux,axis + - "#pwm-cells" + - gpio + - gpo + +unevaluatedProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + io-expander@38 { + compatible = "maxim,max7360"; + reg = <0x38>; + + interrupt-parent = <&gpio1>; + interrupts = <23 IRQ_TYPE_LEVEL_LOW>, + <24 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "inti", "intk"; + + keypad,num-rows = <8>; + keypad,num-columns = <4>; + linux,keymap = < + MATRIX_KEY(0x00, 0x00, KEY_F5) + MATRIX_KEY(0x01, 0x00, KEY_F4) + MATRIX_KEY(0x02, 0x01, KEY_F6) + >; + keypad-debounce-delay-ms = <10>; + autorepeat; + + rotary-debounce-delay-ms = <2>; + linux,axis = <0>; /* REL_X */ + rotary-encoder,relative-axis; + + #pwm-cells = <3>; + + max7360_gpio: gpio { + compatible = "maxim,max7360-gpio"; + + gpio-controller; + #gpio-cells = <2>; + maxim,constant-current-disable = <0x06>; + + interrupt-controller; + #interrupt-cells = <0x2>; + }; + + max7360_gpo: gpo { + compatible = "maxim,max7360-gpo"; + + gpio-controller; + #gpio-cells = <2>; + }; + + backlight_pins: backlight-pins { + pins = "PORT2"; + function = "pwm"; + }; + }; + }; -- cgit v1.2.3 From 3f5df63955756fbe253a2a26043accf7318fa53a Mon Sep 17 00:00:00 2001 From: Aleksandrs Vinarskis Date: Wed, 10 Sep 2025 14:01:08 +0200 Subject: dt-bindings: leds: Add generic LED consumer documentation Introduce common generic led consumer binding, where consumer defines led(s) by phandle, as opposed to trigger-source binding where the trigger source is defined in led itself. Add already used in some schemas 'leds' parameter which expects phandle-array. Additionally, introduce 'led-names' which could be used by consumers to map LED devices to their respective functions. Signed-off-by: Aleksandrs Vinarskis Reviewed-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250910-leds-v5-1-bb90a0f897d5@vinarskis.com Signed-off-by: Lee Jones --- .../devicetree/bindings/leds/leds-consumer.yaml | 67 ++++++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 Documentation/devicetree/bindings/leds/leds-consumer.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/leds/leds-consumer.yaml b/Documentation/devicetree/bindings/leds/leds-consumer.yaml new file mode 100644 index 000000000000..fe6a0faa1d3b --- /dev/null +++ b/Documentation/devicetree/bindings/leds/leds-consumer.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/leds-consumer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common leds consumer + +maintainers: + - Aleksandrs Vinarskis + +description: + Some LED defined in DT are required by other DT consumers, for example + v4l2 subnode may require privacy or flash LED. Unlike trigger-source + approach which is typically used as 'soft' binding, referencing LED + devices by phandle makes things simpler when 'hard' binding is desired. + + Document LED properties that its consumers may define. + +select: true + +properties: + leds: + oneOf: + - type: object + - $ref: /schemas/types.yaml#/definitions/phandle-array + description: + A list of LED device(s) required by a particular consumer. + items: + maxItems: 1 + + led-names: + description: + A list of device name(s). Used to map LED devices to their respective + functions, when consumer requires more than one LED. + +additionalProperties: true + +examples: + - | + #include + #include + + leds { + compatible = "gpio-leds"; + + privacy_led: privacy-led { + color = ; + default-state = "off"; + function = LED_FUNCTION_INDICATOR; + gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>; + }; + }; + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + v4l2_node: camera@36 { + reg = <0x36>; + + leds = <&privacy_led>; + led-names = "privacy"; + }; + }; + +... -- cgit v1.2.3 From 22420da3662a69d8894ee624494213a5888a1e87 Mon Sep 17 00:00:00 2001 From: Aleksandrs Vinarskis Date: Wed, 10 Sep 2025 14:01:09 +0200 Subject: dt-bindings: leds: Unify 'leds' property A number of existing schemas use 'leds' property to provide phandle-array of LED(s) to the consumer. Additionally, with the upcoming privacy-led support in device-tree, v4l2 subnode could be a LED consumer, meaning that all camera sensors should support 'leds' and 'led-names' property via common 'video-interface-devices.yaml'. To avoid duplication, unify 'leds' property from existing schemas to newly introduced 'led-consumer.yaml'. Signed-off-by: Aleksandrs Vinarskis Reviewed-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250910-leds-v5-2-bb90a0f897d5@vinarskis.com Signed-off-by: Lee Jones --- .../devicetree/bindings/leds/backlight/led-backlight.yaml | 6 +----- Documentation/devicetree/bindings/leds/leds-group-multicolor.yaml | 5 +---- .../devicetree/bindings/media/video-interface-devices.yaml | 8 ++++++++ 3 files changed, 10 insertions(+), 9 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/leds/backlight/led-backlight.yaml b/Documentation/devicetree/bindings/leds/backlight/led-backlight.yaml index f5554da6bc6c..8fc5af8f27f9 100644 --- a/Documentation/devicetree/bindings/leds/backlight/led-backlight.yaml +++ b/Documentation/devicetree/bindings/leds/backlight/led-backlight.yaml @@ -23,11 +23,7 @@ properties: compatible: const: led-backlight - leds: - description: A list of LED nodes - $ref: /schemas/types.yaml#/definitions/phandle-array - items: - maxItems: 1 + leds: true required: - compatible diff --git a/Documentation/devicetree/bindings/leds/leds-group-multicolor.yaml b/Documentation/devicetree/bindings/leds/leds-group-multicolor.yaml index 8ed059a5a724..5c9cfa39396b 100644 --- a/Documentation/devicetree/bindings/leds/leds-group-multicolor.yaml +++ b/Documentation/devicetree/bindings/leds/leds-group-multicolor.yaml @@ -17,10 +17,7 @@ properties: compatible: const: leds-group-multicolor - leds: - description: - An aray of monochromatic leds - $ref: /schemas/types.yaml#/definitions/phandle-array + leds: true required: - leds diff --git a/Documentation/devicetree/bindings/media/video-interface-devices.yaml b/Documentation/devicetree/bindings/media/video-interface-devices.yaml index cf7712ad297c..3ad1590b0496 100644 --- a/Documentation/devicetree/bindings/media/video-interface-devices.yaml +++ b/Documentation/devicetree/bindings/media/video-interface-devices.yaml @@ -17,6 +17,14 @@ properties: An array of phandles, each referring to a flash LED, a sub-node of the LED driver device node. + leds: + minItems: 1 + maxItems: 1 + + led-names: + enum: + - privacy + lens-focus: $ref: /schemas/types.yaml#/definitions/phandle description: -- cgit v1.2.3 From 3bc3ff8fd2fe5886043b38d3d3c9d6ecb12d0a83 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Mon, 15 Sep 2025 23:24:15 -0500 Subject: dt-bindings: vendor-prefixes: Add Particle Industries Particle is a San Francisco-based company providing an integrated IoT Platform-as-a-Service. https://www.particle.io/ Acked-by: Rob Herring (Arm) Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20250915-tachyon-v2-1-4f8b02a17512@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index b60957808e5f..50850df73187 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1181,6 +1181,8 @@ patternProperties: description: Parade Technologies Inc. "^parallax,.*": description: Parallax Inc. + "^particle,.*": + description: Particle Industries, Inc. "^pda,.*": description: Precision Design Associates, Inc. "^pegatron,.*": -- cgit v1.2.3 From b727cf24feb56a93f7bafbcdce7ea99b9ccb16cd Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Mon, 15 Sep 2025 23:24:16 -0500 Subject: dt-bindings: arm: qcom: Add Particle Tachyon The Particle Tachyon is a single board computer with 5G connectivity with AI accelerator, based on the Qualcomm QCM6490 platform. Document the top-level compatible for this board. Acked-by: Rob Herring (Arm) Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20250915-tachyon-v2-2-4f8b02a17512@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index cf49dd0000e0..0a05426acb6a 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -331,6 +331,7 @@ properties: - items: - enum: - fairphone,fp5 + - particle,tachyon - qcom,qcm6490-idp - qcom,qcs6490-rb3gen2 - shift,otter -- cgit v1.2.3 From a58d6100ee2c4a732fb4e1520885958480a82110 Mon Sep 17 00:00:00 2001 From: Jens Glathe Date: Mon, 15 Sep 2025 09:35:04 +0200 Subject: dt-bindings: arm: qcom: Add HP Omnibook X14 AI X1P4200 variant The HP Omnibook X14 AI PC is available in fe0 (Hamoa, x1e80100) and fe1 (Purwa, x1p42100) SKUs. Since they are not completely dtb-compatible, add another variant: hp,omnibook-x14-fe1 compatible to cqom,x1p42100 Reviewed-by: Krzysztof Kozlowski Signed-off-by: Jens Glathe Link: https://lore.kernel.org/r/20250915-hp-x14-x1p-v9-1-fa457ca30ffe@oldschoolsolutions.biz Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 0a05426acb6a..68cc458ca6bf 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1072,6 +1072,7 @@ properties: - items: - enum: - asus,zenbook-a14-ux3407qa + - hp,omnibook-x14-fe1 - lenovo,thinkbook-16 - qcom,x1p42100-crd - const: qcom,x1p42100 -- cgit v1.2.3 From f3317e8c36a26d3374f29b8475982a96c6d44ccf Mon Sep 17 00:00:00 2001 From: Jorge Marques Date: Wed, 27 Aug 2025 15:51:58 +0200 Subject: dt-bindings: i3c: Add adi-i3c-master Add bindings doc for ADI I3C Controller IP core, a FPGA synthesizable IP core that implements the MIPI I3C Basic controller specification. The IP Core is versioned following Semantic Versioning 2.0.0 and ADI's open-source HDL guidelines for devicetree bindings and drivers. Reviewed-by: Conor Dooley Signed-off-by: Jorge Marques Link: https://lore.kernel.org/r/20250827-adi-i3c-master-v9-1-04413925abe1@analog.com Signed-off-by: Alexandre Belloni --- .../devicetree/bindings/i3c/adi,i3c-master.yaml | 72 ++++++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/i3c/adi,i3c-master.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i3c/adi,i3c-master.yaml b/Documentation/devicetree/bindings/i3c/adi,i3c-master.yaml new file mode 100644 index 000000000000..2498672d2654 --- /dev/null +++ b/Documentation/devicetree/bindings/i3c/adi,i3c-master.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i3c/adi,i3c-master.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices I3C Controller + +description: + FPGA-based I3C controller designed to interface with I3C and I2C peripherals, + implementing a subset of the I3C-basic specification. The IP core is tested + on arm, microblaze, and arm64 architectures. + + https://analogdevicesinc.github.io/hdl/library/i3c_controller + +maintainers: + - Jorge Marques + +properties: + compatible: + const: adi,i3c-master-v1 + + reg: + maxItems: 1 + + clocks: + minItems: 1 + items: + - description: The AXI interconnect clock, drives the register map. + - description: + The secondary clock, drives the internal logic asynchronously to the + register map. The presence of this entry states that the IP Core was + synthesized with a second clock input, and the absence of this entry + indicates a topology where a single clock input drives all the + internal logic. + + clock-names: + minItems: 1 + items: + - const: axi + - const: i3c + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + +allOf: + - $ref: i3c.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + + i3c@44a00000 { + compatible = "adi,i3c-master-v1"; + reg = <0x44a00000 0x1000>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clkc 15>, <&clkc 15>; + clock-names = "axi", "i3c"; + #address-cells = <3>; + #size-cells = <0>; + + /* I3C and I2C devices */ + }; -- cgit v1.2.3 From c5d0df4945085098e4778b27267a225efacf4d2a Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 8 Sep 2025 10:39:30 +0100 Subject: dt-bindings: i3c: renesas,i3c: Add RZ/V2H(P) and RZ/V2N support Add device tree binding support for the I3C Bus Interface on Renesas RZ/V2H(P) and RZ/V2N SoCs. The I3C IP on these SoCs is identical to that found on the RZ/G3E SoC. Add new compatible strings "renesas,r9a09g056-i3c" for RZ/V2N and "renesas,r9a09g057-i3c" for RZ/V2H(P). Both variants use "renesas,r9a09g047-i3c" as a fallback compatible to indicate hardware compatibility with the RZ/G3E implementation. Update the title to be more generic as it now covers multiple SoC families beyond just RZ/G3S and RZ/G3E. Signed-off-by: Lad Prabhakar Reviewed-by: Tommaso Merciai Acked-by: Rob Herring (Arm) Reviewed-by: Wolfram Sang Link: https://lore.kernel.org/r/20250908093930.12591-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Alexandre Belloni --- Documentation/devicetree/bindings/i3c/renesas,i3c.yaml | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i3c/renesas,i3c.yaml b/Documentation/devicetree/bindings/i3c/renesas,i3c.yaml index fe2e9633c46f..a20d875086d4 100644 --- a/Documentation/devicetree/bindings/i3c/renesas,i3c.yaml +++ b/Documentation/devicetree/bindings/i3c/renesas,i3c.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/i3c/renesas,i3c.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Renesas RZ/G3S and RZ/G3E I3C Bus Interface +title: Renesas I3C Bus Interface maintainers: - Wolfram Sang @@ -12,10 +12,16 @@ maintainers: properties: compatible: - items: - - enum: - - renesas,r9a08g045-i3c # RZ/G3S - - renesas,r9a09g047-i3c # RZ/G3E + oneOf: + - items: + - enum: + - renesas,r9a08g045-i3c # RZ/G3S + - renesas,r9a09g047-i3c # RZ/G3E + - items: + - enum: + - renesas,r9a09g056-i3c # RZ/V2N + - renesas,r9a09g057-i3c # RZ/V2H(P) + - const: renesas,r9a09g047-i3c reg: maxItems: 1 -- cgit v1.2.3 From 1b255e1beabf6826758d6018ddd2e1e3bba32f44 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Asbj=C3=B8rn=20Sloth=20T=C3=B8nnesen?= Date: Mon, 15 Sep 2025 14:42:56 +0000 Subject: tools: ynl: add ipv4-or-v6 display hint MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The attribute WGALLOWEDIP_A_IPADDR can contain either an IPv4 or an IPv6 address depending on WGALLOWEDIP_A_FAMILY, however in practice it is enough to look at the attribute length. This patch implements an ipv4-or-v6 display hint, that can deal with this kind of attribute. It only implements this display hint for genetlink-legacy, it can be added to other protocol variants if needed, but we don't want to encourage it's use. Signed-off-by: Asbjørn Sloth Tønnesen Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250915144301.725949-12-ast@fiberby.net Signed-off-by: Jakub Kicinski --- Documentation/netlink/genetlink-legacy.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/netlink/genetlink-legacy.yaml b/Documentation/netlink/genetlink-legacy.yaml index b29d62eefa16..66fb8653a344 100644 --- a/Documentation/netlink/genetlink-legacy.yaml +++ b/Documentation/netlink/genetlink-legacy.yaml @@ -154,7 +154,7 @@ properties: Optional format indicator that is intended only for choosing the right formatting mechanism when displaying values of this type. - enum: [ hex, mac, fddi, ipv4, ipv6, uuid ] + enum: [ hex, mac, fddi, ipv4, ipv6, ipv4-or-v6, uuid ] struct: description: Name of the nested struct type. type: string -- cgit v1.2.3 From 06ce29264f1d46f00fdb46b0c2d9fb060ce72368 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Wed, 3 Sep 2025 15:11:27 -0400 Subject: dt-bindings: rtc: pcf85063: remove quartz-load-femtofarads restriction for nxp,pcf85063 Original TXT binding doc have not limitition about quartz-load-femtofarads, which only allow 7000 for nxp,pcf85063. So remove it to fix below CHECK_DTBS warnings: arch/arm/boot/dts/nxp/imx/imx6dl-skov-revc-lt2.dtb: rtc@51 (nxp,pcf85063): quartz-load-femtofarads:0: 7000 was expected from schema $id: http://devicetree.org/schemas/rtc/nxp,pcf85063.yaml# Signed-off-by: Frank Li Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250903191128.439164-1-Frank.Li@nxp.com Signed-off-by: Alexandre Belloni --- Documentation/devicetree/bindings/rtc/nxp,pcf85063.yaml | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/rtc/nxp,pcf85063.yaml b/Documentation/devicetree/bindings/rtc/nxp,pcf85063.yaml index 1e6277e524c2..f7013cd8fc20 100644 --- a/Documentation/devicetree/bindings/rtc/nxp,pcf85063.yaml +++ b/Documentation/devicetree/bindings/rtc/nxp,pcf85063.yaml @@ -62,16 +62,6 @@ allOf: then: properties: quartz-load-femtofarads: false - - if: - properties: - compatible: - contains: - enum: - - nxp,pcf85063 - then: - properties: - quartz-load-femtofarads: - const: 7000 - if: properties: compatible: -- cgit v1.2.3 From 0dbb84b5c447ddf2681ed0248a6fb7c9fc3fdb6c Mon Sep 17 00:00:00 2001 From: Frank Li Date: Wed, 27 Aug 2025 15:33:55 -0400 Subject: dt-bindings: rtc: trivial-rtc: add dallas,m41t00 Add compatible string dallas,m41t00 for dallas m41t00 RTC. Signed-off-by: Frank Li Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250827193356.78368-1-Frank.Li@nxp.com Signed-off-by: Alexandre Belloni --- Documentation/devicetree/bindings/rtc/trivial-rtc.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml index 5e0c7cd25cc6..587b7cd5806c 100644 --- a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml @@ -38,6 +38,8 @@ properties: - dallas,ds1672 # Extremely Accurate I²C RTC with Integrated Crystal and SRAM - dallas,ds3232 + # Dallas m41t00 Real-time Clock + - dallas,m41t00 # SD2405AL Real-Time Clock - dfrobot,sd2405al # EM Microelectronic EM3027 RTC -- cgit v1.2.3 From bf7ab18cd741ae82ee8d8e356f73ce3003f6b2fc Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 30 Aug 2025 15:00:27 +0200 Subject: dt-bindings: rtc: s3c: Drop S3C2410 Samsung S3C24xx family of SoCs was removed the Linux kernel in the commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January 2023. There are no in-kernel users of remaining S3C24xx compatibles. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250830130024.142815-6-krzysztof.kozlowski@linaro.org Signed-off-by: Alexandre Belloni --- Documentation/devicetree/bindings/rtc/s3c-rtc.yaml | 40 ++-------------------- 1 file changed, 3 insertions(+), 37 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.yaml b/Documentation/devicetree/bindings/rtc/s3c-rtc.yaml index bf4e11d6dffb..338874e7ed7f 100644 --- a/Documentation/devicetree/bindings/rtc/s3c-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/s3c-rtc.yaml @@ -13,9 +13,6 @@ properties: compatible: oneOf: - enum: - - samsung,s3c2410-rtc - - samsung,s3c2416-rtc - - samsung,s3c2443-rtc - samsung,s3c6410-rtc - items: - enum: @@ -29,19 +26,12 @@ properties: maxItems: 1 clocks: - description: - Must contain a list of phandle and clock specifier for the rtc - clock and in the case of a s3c6410 compatible controller, also - a source clock. - minItems: 1 maxItems: 2 clock-names: - description: - Must contain "rtc" and for a s3c6410 compatible controller - also "rtc_src". - minItems: 1 - maxItems: 2 + items: + - const: rtc + - const: rtc_src interrupts: description: @@ -54,30 +44,6 @@ properties: allOf: - $ref: rtc.yaml# - - if: - properties: - compatible: - contains: - enum: - - samsung,s3c6410-rtc - - samsung,exynos3250-rtc - then: - properties: - clocks: - minItems: 2 - maxItems: 2 - clock-names: - items: - - const: rtc - - const: rtc_src - else: - properties: - clocks: - minItems: 1 - maxItems: 1 - clock-names: - items: - - const: rtc unevaluatedProperties: false -- cgit v1.2.3 From 84454c4e504b1fe86f77a898190d63b4193ca25d Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 7 Aug 2025 16:44:13 -0500 Subject: dt-bindings: rtc: Drop isil,isl12057.txt The "isil,isl12057" compatible is already supported by rtc-ds1307.yaml, so remove the old text binding. Signed-off-by: Rob Herring (Arm) Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250807214414.4172910-1-robh@kernel.org Signed-off-by: Alexandre Belloni --- .../devicetree/bindings/rtc/isil,isl12057.txt | 74 ---------------------- 1 file changed, 74 deletions(-) delete mode 100644 Documentation/devicetree/bindings/rtc/isil,isl12057.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/rtc/isil,isl12057.txt b/Documentation/devicetree/bindings/rtc/isil,isl12057.txt deleted file mode 100644 index ff7c43555199..000000000000 --- a/Documentation/devicetree/bindings/rtc/isil,isl12057.txt +++ /dev/null @@ -1,74 +0,0 @@ -Intersil ISL12057 I2C RTC/Alarm chip - -ISL12057 is a trivial I2C device (it has simple device tree bindings, -consisting of a compatible field, an address and possibly an interrupt -line). - -Nonetheless, it also supports an option boolean property -("wakeup-source") to handle the specific use-case found -on at least three in-tree users of the chip (NETGEAR ReadyNAS 102, 104 -and 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip -(associated with the alarm supported by the driver) is not connected -to the SoC but to a PMIC. It allows the device to be powered up when -RTC alarm rings. In order to mark the device has a wakeup source and -get access to the 'wakealarm' sysfs entry, this specific property can -be set when the IRQ#2 pin of the chip is not connected to the SoC but -can wake up the device. - -Required properties supported by the device: - - - "compatible": must be "isil,isl12057" - - "reg": I2C bus address of the device - -Optional properties: - - - "wakeup-source": mark the chip as a wakeup source, independently of - the availability of an IRQ line connected to the SoC. - - -Example isl12057 node without IRQ#2 pin connected (no alarm support): - - isl12057: isl12057@68 { - compatible = "isil,isl12057"; - reg = <0x68>; - }; - - -Example isl12057 node with IRQ#2 pin connected to main SoC via MPP6 (note -that the pinctrl-related properties below are given for completeness and -may not be required or may be different depending on your system or -SoC, and the main function of the MPP used as IRQ line, i.e. -"interrupt-parent" and "interrupts" are usually sufficient): - - pinctrl { - ... - - rtc_alarm_pin: rtc_alarm_pin { - marvell,pins = "mpp6"; - marvell,function = "gpio"; - }; - - ... - - }; - - ... - - isl12057: isl12057@68 { - compatible = "isil,isl12057"; - reg = <0x68>; - pinctrl-0 = <&rtc_alarm_pin>; - pinctrl-names = "default"; - interrupt-parent = <&gpio0>; - interrupts = <6 IRQ_TYPE_EDGE_FALLING>; - }; - - -Example isl12057 node without IRQ#2 pin connected to the SoC but to a -PMIC, allowing the device to be started based on configured alarm: - - isl12057: isl12057@68 { - compatible = "isil,isl12057"; - reg = <0x68>; - wakeup-source; - }; -- cgit v1.2.3 From f2e44e5fb2de9a464b4fc94d8de071da7ebfda15 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 21 Aug 2025 16:57:01 -0500 Subject: dt-bindings: rtc: Fix Xicor X1205 vendor prefix The vendor for the Xircom X1205 RTC is not Xircom, but Xicor which was acquired by Intersil. Signed-off-by: Rob Herring (Arm) Reviewed-by: Linus Walleij Link: https://lore.kernel.org/r/20250821215703.869628-1-robh@kernel.org Signed-off-by: Alexandre Belloni --- Documentation/devicetree/bindings/rtc/trivial-rtc.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml index 587b7cd5806c..b47822370d6f 100644 --- a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml @@ -85,8 +85,8 @@ properties: - via,vt8500-rtc # I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC - whwave,sd3078 - # Xircom X1205 I2C RTC - - xircom,x1205 + # Xicor/Intersil X1205 I2C RTC + - xicor,x1205 reg: maxItems: 1 -- cgit v1.2.3 From 01cc0dc9de9c5647a2e42309f86db0f2d3cc0f68 Mon Sep 17 00:00:00 2001 From: Lukas Wunner Date: Mon, 15 Sep 2025 15:50:01 +0200 Subject: Documentation: PCI: Sync AER doc with code The PCIe Advanced Error Reporting driver has evolved over the years but its documentation hasn't. Catch up with past code changes: * The documentation claims that Correctable Errors are logged with KERN_INFO severity, but the code uses KERN_WARN. It had used KERN_WARN from the beginning with commit 6c2b374d7485 ("PCI-Express AER implemetation: AER core and aerdriver"). In 2013, commit 2cced2d95961 ("aerdrv: Cleanup log output for AER") switched to KERN_ERR, until 2020 when it was reverted back to KERN_WARN by commit e83e2ca3c395 ("PCI/AER: Log correctable errors as warning, not error"). * An example log message in the documentation uses the term "Uncorrected", but the code uses "Uncorrectable" since commit 02a06f5f1a6a ("PCI/AER: Use 'Correctable' and 'Uncorrectable' spec terms for errors"). * The example contains the Requester ID "id=0500", which is omitted since commit 010caed4ccb6 ("PCI/AER: Decode Error Source Requester ID"). * The example contains the error name "Unsupported Request", which is instead reported as "UnsupReq" since commit bd237801fef2 ("PCI/AER: Adopt lspci names for AER error decoding"). * The example doesn't prepend "0x" to hex values from the TLP Header Log, as introduced by commit f68ea779d98a ("PCI: Add pcie_print_tlp_log() to print TLP Header and Prefix Log"). * The documentation refers to a reset_link callback which was removed by commit b6cf1a42f916 ("PCI/ERR: Remove service dependency in pcie_do_recovery()"). * Commit 579086225502 ("PCI/ERR: Recover from RCiEP AER errors") added support to recover Root Complex Integrated Endpoints by applying a Function Level Reset, alternatively to the Secondary Bus Reset which is applied otherwise. * On non-fatal errors, a reset was previously never performed. But the AER driver has just been amended to allow drivers to opt in to a reset. * The documentation claims that a warning message is logged if a driver lacks pci_error_handlers. But the message has been informational (logged with KERN_INFO severity) since its introduction with commit 01daacfb9035 ("PCI/AER: Log which device prevents error recovery"). The documentation claims that the message is only logged for fatal errors, which is incorrect. Moreover it refers to "section 3", even though the documentation no longer contains section numbers since commit 4e37f055a92e ("Documentation: PCI: convert pcieaer-howto.txt to reST"). Section 3 is titled "Developer Guide". That's the same section where the reference is located, so it is self-referential and can be dropped. Signed-off-by: Lukas Wunner Signed-off-by: Bjorn Helgaas Reviewed-by: Brian Norris Reviewed-by: Kuppuswamy Sathyanarayanan Link: https://patch.msgid.link/7501bfc5b9920193a25998a3cbcf72c47674ec63.1757942121.git.lukas@wunner.de --- Documentation/PCI/pcieaer-howto.rst | 83 +++++++++++++++++-------------------- 1 file changed, 39 insertions(+), 44 deletions(-) (limited to 'Documentation') diff --git a/Documentation/PCI/pcieaer-howto.rst b/Documentation/PCI/pcieaer-howto.rst index 4b71e2f43ca7..d448efe572c8 100644 --- a/Documentation/PCI/pcieaer-howto.rst +++ b/Documentation/PCI/pcieaer-howto.rst @@ -70,16 +70,16 @@ AER error output ---------------- When a PCIe AER error is captured, an error message will be output to -console. If it's a correctable error, it is output as an info message. +console. If it's a correctable error, it is output as a warning message. Otherwise, it is printed as an error. So users could choose different log level to filter out correctable error messages. Below shows an example:: - 0000:50:00.0: PCIe Bus Error: severity=Uncorrected (Fatal), type=Transaction Layer, id=0500(Requester ID) + 0000:50:00.0: PCIe Bus Error: severity=Uncorrectable (Fatal), type=Transaction Layer, (Requester ID) 0000:50:00.0: device [8086:0329] error status/mask=00100000/00000000 - 0000:50:00.0: [20] Unsupported Request (First) - 0000:50:00.0: TLP Header: 04000001 00200a03 05010000 00050100 + 0000:50:00.0: [20] UnsupReq (First) + 0000:50:00.0: TLP Header: 0x04000001 0x00200a03 0x05010000 0x00050100 In the example, 'Requester ID' means the ID of the device that sent the error message to the Root Port. Please refer to PCIe specs for other @@ -152,18 +152,6 @@ the device driver. Provide callbacks ----------------- -callback reset_link to reset PCIe link -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -This callback is used to reset the PCIe physical link when a -fatal error happens. The Root Port AER service driver provides a -default reset_link function, but different Upstream Ports might -have different specifications to reset the PCIe link, so -Upstream Port drivers may provide their own reset_link functions. - -Section 3.2.2.2 provides more detailed info on when to call -reset_link. - PCI error-recovery callbacks ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -174,8 +162,8 @@ when performing error recovery actions. Data struct pci_driver has a pointer, err_handler, to point to pci_error_handlers who consists of a couple of callback function pointers. The AER driver follows the rules defined in -pci-error-recovery.rst except PCIe-specific parts (e.g. -reset_link). Please refer to pci-error-recovery.rst for detailed +pci-error-recovery.rst except PCIe-specific parts (see +below). Please refer to pci-error-recovery.rst for detailed definitions of the callbacks. The sections below specify when to call the error callback functions. @@ -189,10 +177,21 @@ software intervention or any loss of data. These errors do not require any recovery actions. The AER driver clears the device's correctable error status register accordingly and logs these errors. -Non-correctable (non-fatal and fatal) errors -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +Uncorrectable (non-fatal and fatal) errors +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -If an error message indicates a non-fatal error, performing link reset +The AER driver performs a Secondary Bus Reset to recover from +uncorrectable errors. The reset is applied at the port above +the originating device: If the originating device is an Endpoint, +only the Endpoint is reset. If on the other hand the originating +device has subordinate devices, those are all affected by the +reset as well. + +If the originating device is a Root Complex Integrated Endpoint, +there's no port above where a Secondary Bus Reset could be applied. +In this case, the AER driver instead applies a Function Level Reset. + +If an error message indicates a non-fatal error, performing a reset at upstream is not required. The AER driver calls error_detected(dev, pci_channel_io_normal) to all drivers associated within a hierarchy in question. For example:: @@ -204,38 +203,34 @@ Downstream Port B and Endpoint. A driver may return PCI_ERS_RESULT_CAN_RECOVER, PCI_ERS_RESULT_DISCONNECT, or PCI_ERS_RESULT_NEED_RESET, depending on -whether it can recover or the AER driver calls mmio_enabled as next. +whether it can recover without a reset, considers the device unrecoverable +or needs a reset for recovery. If all affected drivers agree that they can +recover without a reset, it is skipped. Should one driver request a reset, +it overrides all other drivers. If an error message indicates a fatal error, kernel will broadcast error_detected(dev, pci_channel_io_frozen) to all drivers within -a hierarchy in question. Then, performing link reset at upstream is -necessary. As different kinds of devices might use different approaches -to reset link, AER port service driver is required to provide the -function to reset link via callback parameter of pcie_do_recovery() -function. If reset_link is not NULL, recovery function will use it -to reset the link. If error_detected returns PCI_ERS_RESULT_CAN_RECOVER -and reset_link returns PCI_ERS_RESULT_RECOVERED, the error handling goes -to mmio_enabled. - -Frequent Asked Questions ------------------------- +a hierarchy in question. Then, performing a reset at upstream is +necessary. If error_detected returns PCI_ERS_RESULT_CAN_RECOVER +to indicate that recovery without a reset is possible, the error +handling goes to mmio_enabled, but afterwards a reset is still +performed. -Q: - What happens if a PCIe device driver does not provide an - error recovery handler (pci_driver->err_handler is equal to NULL)? +In other words, for non-fatal errors, drivers may opt in to a reset. +But for fatal errors, they cannot opt out of a reset, based on the +assumption that the link is unreliable. -A: - The devices attached with the driver won't be recovered. If the - error is fatal, kernel will print out warning messages. Please refer - to section 3 for more information. +Frequently Asked Questions +-------------------------- Q: - What happens if an upstream port service driver does not provide - callback reset_link? + What happens if a PCIe device driver does not provide an + error recovery handler (pci_driver->err_handler is equal to NULL)? A: - Fatal error recovery will fail if the errors are reported by the - upstream ports who are attached by the service driver. + The devices attached with the driver won't be recovered. + The kernel will print out informational messages to identify + unrecoverable devices. Software error injection -- cgit v1.2.3 From 8e4a13fc61d364ff61b4410810f7b947b6208039 Mon Sep 17 00:00:00 2001 From: Lukas Wunner Date: Mon, 15 Sep 2025 15:50:02 +0200 Subject: Documentation: PCI: Sync error recovery doc with code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Amend the documentation on PCI error recovery to fix minor inaccuracies vis-à-vis the actual code: * The documentation claims that a missing ->resume() or ->mmio_enabled() callback always leads to recovery through reset. But none of the implementations do this (pcie_do_recovery(), eeh_handle_normal_event(), zpci_event_do_error_state_clear()). Drop the claim to align the documentation with the code. * The documentation does not list PCI_ERS_RESULT_RECOVERED as a valid return value from ->error_detected(). But none of the implementations forbid this and some drivers are returning it, e.g.: drivers/bus/mhi/host/pci_generic.c drivers/infiniband/hw/hfi1/pcie.c Further down in the documentation it is implied that the return value is in fact allowed: "The platform will call the resume() callback on all affected device drivers if all drivers on the segment have returned PCI_ERS_RESULT_RECOVERED from one of the 3 previous callbacks." The "3 previous callbacks" being ->error_detected(), ->mmio_enabled() and ->slot_reset(). Add it to the valid return values for consistency. Signed-off-by: Lukas Wunner Signed-off-by: Bjorn Helgaas Reviewed-by: Brian Norris Reviewed-by: Niklas Schnelle Reviewed-by: Kuppuswamy Sathyanarayanan Link: https://patch.msgid.link/ed3c3385499775fcc25f1ee66f395e212919f94a.1757942121.git.lukas@wunner.de --- Documentation/PCI/pci-error-recovery.rst | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/PCI/pci-error-recovery.rst b/Documentation/PCI/pci-error-recovery.rst index 42e1e78353f3..d5c661baa87f 100644 --- a/Documentation/PCI/pci-error-recovery.rst +++ b/Documentation/PCI/pci-error-recovery.rst @@ -108,8 +108,8 @@ A driver does not have to implement all of these callbacks; however, if it implements any, it must implement error_detected(). If a callback is not implemented, the corresponding feature is considered unsupported. For example, if mmio_enabled() and resume() aren't there, then it -is assumed that the driver is not doing any direct recovery and requires -a slot reset. Typically a driver will want to know about +is assumed that the driver does not need these callbacks +for recovery. Typically a driver will want to know about a slot_reset(). The actual steps taken by a platform to recover from a PCI error @@ -141,6 +141,9 @@ shouldn't do any new IOs. Called in task context. This is sort of a All drivers participating in this system must implement this call. The driver must return one of the following result codes: + - PCI_ERS_RESULT_RECOVERED + Driver returns this if it thinks the device is usable despite + the error and does not need further intervention. - PCI_ERS_RESULT_CAN_RECOVER Driver returns this if it thinks it might be able to recover the HW by just banging IOs or if it wants to be given -- cgit v1.2.3 From 15dea68d41d58979dcf9011b5dd787aed5fe7dba Mon Sep 17 00:00:00 2001 From: Lukas Wunner Date: Mon, 15 Sep 2025 15:50:03 +0200 Subject: Documentation: PCI: Amend error recovery doc with DPC/AER specifics Amend the documentation on PCI error recovery with specifics about Downstream Port Containment and Advanced Error Reporting: * Explain that with DPC, devices are inaccessible upon an error (similar to EEH on powerpc) and do not become accessible until the link is re-enabled. * Explain that with AER, although devices may already be accessible in the ->error_detected() callback, accesses should be deferred to the ->mmio_enabled() callback for compatibility with EEH on powerpc and with s390. Signed-off-by: Lukas Wunner Signed-off-by: Bjorn Helgaas Reviewed-by: Brian Norris Reviewed-by: Niklas Schnelle Reviewed-by: Kuppuswamy Sathyanarayanan Link: https://patch.msgid.link/61d8eeadb20ee71c3a852f44c863bfe0209c454d.1757942121.git.lukas@wunner.de --- Documentation/PCI/pci-error-recovery.rst | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'Documentation') diff --git a/Documentation/PCI/pci-error-recovery.rst b/Documentation/PCI/pci-error-recovery.rst index d5c661baa87f..9e1e2f2a13fa 100644 --- a/Documentation/PCI/pci-error-recovery.rst +++ b/Documentation/PCI/pci-error-recovery.rst @@ -122,6 +122,10 @@ A PCI bus error is detected by the PCI hardware. On powerpc, the slot is isolated, in that all I/O is blocked: all reads return 0xffffffff, all writes are ignored. +Similarly, on platforms supporting Downstream Port Containment +(PCIe r7.0 sec 6.2.11), the link to the sub-hierarchy with the +faulting device is disabled. Any device in the sub-hierarchy +becomes inaccessible. STEP 1: Notification -------------------- @@ -204,6 +208,24 @@ link reset was performed by the HW. If the platform can't just re-enable IOs without a slot reset or a link reset, it will not call this callback, and instead will have gone directly to STEP 3 (Link Reset) or STEP 4 (Slot Reset) +.. note:: + + On platforms supporting Advanced Error Reporting (PCIe r7.0 sec 6.2), + the faulting device may already be accessible in STEP 1 (Notification). + Drivers should nevertheless defer accesses to STEP 2 (MMIO Enabled) + to be compatible with EEH on powerpc and with s390 (where devices are + inaccessible until STEP 2). + + On platforms supporting Downstream Port Containment, the link to the + sub-hierarchy with the faulting device is re-enabled in STEP 3 (Link + Reset). Hence devices in the sub-hierarchy are inaccessible until + STEP 4 (Slot Reset). + + For errors such as Surprise Down (PCIe r7.0 sec 6.2.7), the device + may not even be accessible in STEP 4 (Slot Reset). Drivers can detect + accessibility by checking whether reads from the device return all 1's + (PCI_POSSIBLE_ERROR()). + .. note:: The following is proposed; no platform implements this yet: -- cgit v1.2.3 From 40103d2a42fe68f3aad77609b42451ee5c713f6e Mon Sep 17 00:00:00 2001 From: Lukas Wunner Date: Mon, 15 Sep 2025 15:50:04 +0200 Subject: Documentation: PCI: Tidy error recovery doc's PCIe nomenclature Commit 11502feab423 ("Documentation: PCI: Tidy AER documentation") replaced the terms "PCI-E", "PCI-Express" and "PCI Express" with "PCIe" in the AER documentation. Do the same in the documentation on PCI error recovery. While at it, add a missing period and a missing blank. Signed-off-by: Lukas Wunner Signed-off-by: Bjorn Helgaas Reviewed-by: Brian Norris Reviewed-by: Niklas Schnelle Reviewed-by: Kuppuswamy Sathyanarayanan Link: https://patch.msgid.link/db56b7ef12043f709a04ce67c1d1e102ab5f4e19.1757942121.git.lukas@wunner.de --- Documentation/PCI/pci-error-recovery.rst | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/PCI/pci-error-recovery.rst b/Documentation/PCI/pci-error-recovery.rst index 9e1e2f2a13fa..5df481ac6193 100644 --- a/Documentation/PCI/pci-error-recovery.rst +++ b/Documentation/PCI/pci-error-recovery.rst @@ -13,7 +13,7 @@ PCI Error Recovery Many PCI bus controllers are able to detect a variety of hardware PCI errors on the bus, such as parity errors on the data and address buses, as well as SERR and PERR errors. Some of the more advanced -chipsets are able to deal with these errors; these include PCI-E chipsets, +chipsets are able to deal with these errors; these include PCIe chipsets, and the PCI-host bridges found on IBM Power4, Power5 and Power6-based pSeries boxes. A typical action taken is to disconnect the affected device, halting all I/O to it. The goal of a disconnection is to avoid system @@ -206,7 +206,7 @@ reset or some such, but not restart operations. This callback is made if all drivers on a segment agree that they can try to recover and if no automatic link reset was performed by the HW. If the platform can't just re-enable IOs without a slot reset or a link reset, it will not call this callback, and -instead will have gone directly to STEP 3 (Link Reset) or STEP 4 (Slot Reset) +instead will have gone directly to STEP 3 (Link Reset) or STEP 4 (Slot Reset). .. note:: @@ -259,14 +259,14 @@ The driver should return one of the following result codes: The next step taken depends on the results returned by the drivers. If all drivers returned PCI_ERS_RESULT_RECOVERED, then the platform -proceeds to either STEP3 (Link Reset) or to STEP 5 (Resume Operations). +proceeds to either STEP 3 (Link Reset) or to STEP 5 (Resume Operations). If any driver returned PCI_ERS_RESULT_NEED_RESET, then the platform proceeds to STEP 4 (Slot Reset) STEP 3: Link Reset ------------------ -The platform resets the link. This is a PCI-Express specific step +The platform resets the link. This is a PCIe specific step and is done whenever a fatal error has been detected that can be "solved" by resetting the link. @@ -288,13 +288,13 @@ that is equivalent to what it would be after a fresh system power-on followed by power-on BIOS/system firmware initialization. Soft reset is also known as hot-reset. -Powerpc fundamental reset is supported by PCI Express cards only +Powerpc fundamental reset is supported by PCIe cards only and results in device's state machines, hardware logic, port states and configuration registers to initialize to their default conditions. For most PCI devices, a soft reset will be sufficient for recovery. Optional fundamental reset is provided to support a limited number -of PCI Express devices for which a soft reset is not sufficient +of PCIe devices for which a soft reset is not sufficient for recovery. If the platform supports PCI hotplug, then the reset might be @@ -338,7 +338,7 @@ Result codes: - PCI_ERS_RESULT_DISCONNECT Same as above. -Drivers for PCI Express cards that require a fundamental reset must +Drivers for PCIe cards that require a fundamental reset must set the needs_freset bit in the pci_dev structure in their probe function. For example, the QLogic qla2xxx driver sets the needs_freset bit for certain PCI card types:: -- cgit v1.2.3 From 5089ec0bb1bc80a87cfbc2a90e047161adfcb630 Mon Sep 17 00:00:00 2001 From: Taimoor Zaeem Date: Sun, 14 Sep 2025 16:31:56 +0500 Subject: Documentation: staging: fix spelling error in remoteproc.rst Fix typo 'implementors' to 'implementers' in remote processor framework documentation. Signed-off-by: Taimoor Zaeem Signed-off-by: Jonathan Corbet Message-ID: --- Documentation/staging/remoteproc.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/staging/remoteproc.rst b/Documentation/staging/remoteproc.rst index 348ee7e508ac..5c226fa076d6 100644 --- a/Documentation/staging/remoteproc.rst +++ b/Documentation/staging/remoteproc.rst @@ -104,7 +104,7 @@ Typical usage rproc_shutdown(my_rproc); } -API for implementors +API for implementers ==================== :: -- cgit v1.2.3 From 9946f344528afabb8620a5c3b788cfa505211517 Mon Sep 17 00:00:00 2001 From: Akiyoshi Kurita Date: Sun, 14 Sep 2025 02:34:13 +0900 Subject: docs: w1: ds2482: fix typo in buses Correct a spelling mistake in ds2482.rst ("busses" -> "buses"). No functional change. Signed-off-by: Akiyoshi Kurita Signed-off-by: Jonathan Corbet Message-ID: <20250913173413.951378-1-weibu@redadmin.org> --- Documentation/w1/masters/ds2482.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/w1/masters/ds2482.rst b/Documentation/w1/masters/ds2482.rst index 17ebe8f660cd..5862024e4b15 100644 --- a/Documentation/w1/masters/ds2482.rst +++ b/Documentation/w1/masters/ds2482.rst @@ -22,7 +22,7 @@ Description ----------- The Maxim/Dallas Semiconductor DS2482 is a I2C device that provides -one (DS2482-100) or eight (DS2482-800) 1-wire busses. +one (DS2482-100) or eight (DS2482-800) 1-wire buses. General Remarks -- cgit v1.2.3 From 1e9ddbb2cd346e42256c5ede2cc40439f2f99bb7 Mon Sep 17 00:00:00 2001 From: Akira Yokosawa Date: Thu, 11 Sep 2025 17:29:31 +0900 Subject: docs: Pull LKMM documentation into dev-tools book Currently, LKMM docs are not included in any of kernel documentation books. Commit e40573a43d16 ("docs: put atomic*.txt and memory-barriers.txt into the core-api book") covered plain-text docs under Documentation/ by using the "include::" directive along with the ":literal:" option. As LKMM docs are not under Documentation/, the same approach would not work due to the directive's restriction. As a matter of fact, kernel documentation has an extended directive by the name of "kernel-include::", which loosens such restriction and accepts any files under the kernel source tree. Rather than moving LKMM docs around, use the latter and pull them into the dev-tools book next to KCSAN. Signed-off-by: Akira Yokosawa Cc: Paul E. McKenney Acked-by: Paul E. McKenney Signed-off-by: Jonathan Corbet Message-ID: <7ce84a93-5cbc-420e-894a-06a0372c52ab@gmail.com> --- Documentation/dev-tools/index.rst | 1 + .../dev-tools/lkmm/docs/access-marking.rst | 11 +++++++++++ Documentation/dev-tools/lkmm/docs/cheatsheet.rst | 11 +++++++++++ .../dev-tools/lkmm/docs/control-dependencies.rst | 11 +++++++++++ Documentation/dev-tools/lkmm/docs/explanation.rst | 11 +++++++++++ Documentation/dev-tools/lkmm/docs/glossary.rst | 11 +++++++++++ .../dev-tools/lkmm/docs/herd-representation.rst | 11 +++++++++++ Documentation/dev-tools/lkmm/docs/index.rst | 21 +++++++++++++++++++++ Documentation/dev-tools/lkmm/docs/litmus-tests.rst | 11 +++++++++++ Documentation/dev-tools/lkmm/docs/locking.rst | 11 +++++++++++ Documentation/dev-tools/lkmm/docs/ordering.rst | 11 +++++++++++ Documentation/dev-tools/lkmm/docs/readme.rst | 11 +++++++++++ Documentation/dev-tools/lkmm/docs/recipes.rst | 11 +++++++++++ Documentation/dev-tools/lkmm/docs/references.rst | 11 +++++++++++ Documentation/dev-tools/lkmm/docs/simple.rst | 11 +++++++++++ Documentation/dev-tools/lkmm/index.rst | 15 +++++++++++++++ Documentation/dev-tools/lkmm/readme.rst | 11 +++++++++++ 17 files changed, 191 insertions(+) create mode 100644 Documentation/dev-tools/lkmm/docs/access-marking.rst create mode 100644 Documentation/dev-tools/lkmm/docs/cheatsheet.rst create mode 100644 Documentation/dev-tools/lkmm/docs/control-dependencies.rst create mode 100644 Documentation/dev-tools/lkmm/docs/explanation.rst create mode 100644 Documentation/dev-tools/lkmm/docs/glossary.rst create mode 100644 Documentation/dev-tools/lkmm/docs/herd-representation.rst create mode 100644 Documentation/dev-tools/lkmm/docs/index.rst create mode 100644 Documentation/dev-tools/lkmm/docs/litmus-tests.rst create mode 100644 Documentation/dev-tools/lkmm/docs/locking.rst create mode 100644 Documentation/dev-tools/lkmm/docs/ordering.rst create mode 100644 Documentation/dev-tools/lkmm/docs/readme.rst create mode 100644 Documentation/dev-tools/lkmm/docs/recipes.rst create mode 100644 Documentation/dev-tools/lkmm/docs/references.rst create mode 100644 Documentation/dev-tools/lkmm/docs/simple.rst create mode 100644 Documentation/dev-tools/lkmm/index.rst create mode 100644 Documentation/dev-tools/lkmm/readme.rst (limited to 'Documentation') diff --git a/Documentation/dev-tools/index.rst b/Documentation/dev-tools/index.rst index 65c54b27a60b..4b8425e348ab 100644 --- a/Documentation/dev-tools/index.rst +++ b/Documentation/dev-tools/index.rst @@ -29,6 +29,7 @@ Documentation/process/debugging/index.rst ubsan kmemleak kcsan + lkmm/index kfence kselftest kunit/index diff --git a/Documentation/dev-tools/lkmm/docs/access-marking.rst b/Documentation/dev-tools/lkmm/docs/access-marking.rst new file mode 100644 index 000000000000..80058a4da980 --- /dev/null +++ b/Documentation/dev-tools/lkmm/docs/access-marking.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Access Marking +-------------- + +Literal include of ``tools/memory-model/Documentation/access-marking.txt``. + +------------------------------------------------------------------ + +.. kernel-include:: tools/memory-model/Documentation/access-marking.txt + :literal: diff --git a/Documentation/dev-tools/lkmm/docs/cheatsheet.rst b/Documentation/dev-tools/lkmm/docs/cheatsheet.rst new file mode 100644 index 000000000000..37681f6a6a8c --- /dev/null +++ b/Documentation/dev-tools/lkmm/docs/cheatsheet.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Cheatsheet +---------- + +Literal include of ``tools/memory-model/Documentation/cheatsheet.txt``. + +------------------------------------------------------------------ + +.. kernel-include:: tools/memory-model/Documentation/cheatsheet.txt + :literal: diff --git a/Documentation/dev-tools/lkmm/docs/control-dependencies.rst b/Documentation/dev-tools/lkmm/docs/control-dependencies.rst new file mode 100644 index 000000000000..5ae97e8861eb --- /dev/null +++ b/Documentation/dev-tools/lkmm/docs/control-dependencies.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Control Dependencies +-------------------- + +Literal include of ``tools/memory-model/Documentation/control-dependencies.txt``. + +------------------------------------------------------------------ + +.. kernel-include:: tools/memory-model/Documentation/control-dependencies.txt + :literal: diff --git a/Documentation/dev-tools/lkmm/docs/explanation.rst b/Documentation/dev-tools/lkmm/docs/explanation.rst new file mode 100644 index 000000000000..0bcba9a5ddf7 --- /dev/null +++ b/Documentation/dev-tools/lkmm/docs/explanation.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Explanation +----------- + +Literal include of ``tools/memory-model/Documentation/explanation.txt``. + +------------------------------------------------------------------ + +.. kernel-include:: tools/memory-model/Documentation/explanation.txt + :literal: diff --git a/Documentation/dev-tools/lkmm/docs/glossary.rst b/Documentation/dev-tools/lkmm/docs/glossary.rst new file mode 100644 index 000000000000..849aefdf3d6e --- /dev/null +++ b/Documentation/dev-tools/lkmm/docs/glossary.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Glossary +-------- + +Literal include of ``tools/memory-model/Documentation/glossary.txt``. + +------------------------------------------------------------------ + +.. kernel-include:: tools/memory-model/Documentation/glossary.txt + :literal: diff --git a/Documentation/dev-tools/lkmm/docs/herd-representation.rst b/Documentation/dev-tools/lkmm/docs/herd-representation.rst new file mode 100644 index 000000000000..ebf4a2181cd7 --- /dev/null +++ b/Documentation/dev-tools/lkmm/docs/herd-representation.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +herd-representation +------------------- + +Literal include of ``tools/memory-model/Documentation/herd-representation``. + +------------------------------------------------------------------ + +.. kernel-include:: tools/memory-model/Documentation/herd-representation.txt + :literal: diff --git a/Documentation/dev-tools/lkmm/docs/index.rst b/Documentation/dev-tools/lkmm/docs/index.rst new file mode 100644 index 000000000000..abbddcc009de --- /dev/null +++ b/Documentation/dev-tools/lkmm/docs/index.rst @@ -0,0 +1,21 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Documentation +============= + +.. toctree:: + :maxdepth: 1 + + readme + simple + ordering + litmus-tests + locking + recipes + control-dependencies + access-marking + cheatsheet + explanation + herd-representation + glossary + references diff --git a/Documentation/dev-tools/lkmm/docs/litmus-tests.rst b/Documentation/dev-tools/lkmm/docs/litmus-tests.rst new file mode 100644 index 000000000000..3293f4540156 --- /dev/null +++ b/Documentation/dev-tools/lkmm/docs/litmus-tests.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Litmus Tests +------------ + +Literal include of ``tools/memory-model/Documentation/litmus-tests.txt``. + +------------------------------------------------------------------ + +.. kernel-include:: tools/memory-model/Documentation/litmus-tests.txt + :literal: diff --git a/Documentation/dev-tools/lkmm/docs/locking.rst b/Documentation/dev-tools/lkmm/docs/locking.rst new file mode 100644 index 000000000000..b5eae4c0acb7 --- /dev/null +++ b/Documentation/dev-tools/lkmm/docs/locking.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Locking +------- + +Literal include of ``tools/memory-model/Documentation/locking.txt``. + +------------------------------------------------------------------ + +.. kernel-include:: tools/memory-model/Documentation/locking.txt + :literal: diff --git a/Documentation/dev-tools/lkmm/docs/ordering.rst b/Documentation/dev-tools/lkmm/docs/ordering.rst new file mode 100644 index 000000000000..a2343c12462d --- /dev/null +++ b/Documentation/dev-tools/lkmm/docs/ordering.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Ordering +-------- + +Literal include of ``tools/memory-model/Documentation/ordering.txt``. + +------------------------------------------------------------------ + +.. kernel-include:: tools/memory-model/Documentation/ordering.txt + :literal: diff --git a/Documentation/dev-tools/lkmm/docs/readme.rst b/Documentation/dev-tools/lkmm/docs/readme.rst new file mode 100644 index 000000000000..51e7a64e4435 --- /dev/null +++ b/Documentation/dev-tools/lkmm/docs/readme.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +README (for LKMM Documentation) +------------------------------- + +Literal include of ``tools/memory-model/Documentation/README``. + +------------------------------------------------------------------ + +.. kernel-include:: tools/memory-model/Documentation/README + :literal: diff --git a/Documentation/dev-tools/lkmm/docs/recipes.rst b/Documentation/dev-tools/lkmm/docs/recipes.rst new file mode 100644 index 000000000000..e55952640047 --- /dev/null +++ b/Documentation/dev-tools/lkmm/docs/recipes.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Recipes +------- + +Literal include of ``tools/memory-model/Documentation/recipes.txt``. + +------------------------------------------------------------------ + +.. kernel-include:: tools/memory-model/Documentation/recipes.txt + :literal: diff --git a/Documentation/dev-tools/lkmm/docs/references.rst b/Documentation/dev-tools/lkmm/docs/references.rst new file mode 100644 index 000000000000..c6831b3c9c02 --- /dev/null +++ b/Documentation/dev-tools/lkmm/docs/references.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +References +---------- + +Literal include of ``tools/memory-model/Documentation/references.txt``. + +------------------------------------------------------------------ + +.. kernel-include:: tools/memory-model/Documentation/references.txt + :literal: diff --git a/Documentation/dev-tools/lkmm/docs/simple.rst b/Documentation/dev-tools/lkmm/docs/simple.rst new file mode 100644 index 000000000000..5c1094c95f45 --- /dev/null +++ b/Documentation/dev-tools/lkmm/docs/simple.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Simple +------ + +Literal include of ``tools/memory-model/Documentation/simple.txt``. + +------------------------------------------------------------------ + +.. kernel-include:: tools/memory-model/Documentation/simple.txt + :literal: diff --git a/Documentation/dev-tools/lkmm/index.rst b/Documentation/dev-tools/lkmm/index.rst new file mode 100644 index 000000000000..e52782449ca3 --- /dev/null +++ b/Documentation/dev-tools/lkmm/index.rst @@ -0,0 +1,15 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================================ +Linux Kernel Memory Consistency Model (LKMM) +============================================ + +This section literally renders documents under ``tools/memory-model/`` +and ``tools/memory-model/Documentation/``, which are maintained in +the *pure* plain text form. + +.. toctree:: + :maxdepth: 2 + + readme + docs/index diff --git a/Documentation/dev-tools/lkmm/readme.rst b/Documentation/dev-tools/lkmm/readme.rst new file mode 100644 index 000000000000..a7f847109584 --- /dev/null +++ b/Documentation/dev-tools/lkmm/readme.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0 + +README (for LKMM) +================= + +Literal include of ``tools/memory-model/README``. + +------------------------------------------------------------ + +.. kernel-include:: tools/memory-model/README + :literal: -- cgit v1.2.3 From c5dca38633daa1e240144bac453cf9065604a413 Mon Sep 17 00:00:00 2001 From: "Fabio M. De Francesco" Date: Mon, 15 Sep 2025 16:57:20 +0200 Subject: cxl: Documentation/driver-api/cxl: Describe the x86 Low Memory Hole solution Add documentation on how to resolve conflicts between CXL Fixed Memory Windows, Platform Low Memory Holes, intermediate Switch and Endpoint Decoders. [dj]: Fixed inconsistent spacing after '.' [dj]: Fixed subject line from Alison. [dj]: Removed '::' before table from Bagas. Reviewed-by: Gregory Price Signed-off-by: Fabio M. De Francesco Reviewed-by: Bagas Sanjaya Reviewed-by: Alison Schofield Reviewed-by: Dave Jiang Signed-off-by: Dave Jiang --- Documentation/driver-api/cxl/conventions.rst | 135 +++++++++++++++++++++++++++ 1 file changed, 135 insertions(+) (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/conventions.rst b/Documentation/driver-api/cxl/conventions.rst index da347a81a237..e37336d7b116 100644 --- a/Documentation/driver-api/cxl/conventions.rst +++ b/Documentation/driver-api/cxl/conventions.rst @@ -45,3 +45,138 @@ Detailed Description of the Change ---------------------------------- + + +Resolve conflict between CFMWS, Platform Memory Holes, and Endpoint Decoders +============================================================================ + +Document +-------- + +CXL Revision 3.2, Version 1.0 + +License +------- + +SPDX-License Identifier: CC-BY-4.0 + +Creator/Contributors +-------------------- + +- Fabio M. De Francesco, Intel +- Dan J. Williams, Intel +- Mahesh Natu, Intel + +Summary of the Change +--------------------- + +According to the current Compute Express Link (CXL) Specifications (Revision +3.2, Version 1.0), the CXL Fixed Memory Window Structure (CFMWS) describes zero +or more Host Physical Address (HPA) windows associated with each CXL Host +Bridge. Each window represents a contiguous HPA range that may be interleaved +across one or more targets, including CXL Host Bridges. Each window has a set +of restrictions that govern its usage. It is the Operating System-directed +configuration and Power Management (OSPM) responsibility to utilize each window +for the specified use. + +Table 9-22 of the current CXL Specifications states that the Window Size field +contains the total number of consecutive bytes of HPA this window describes. +This value must be a multiple of the Number of Interleave Ways (NIW) * 256 MB. + +Platform Firmware (BIOS) might reserve physical addresses below 4 GB where a +memory gap such as the Low Memory Hole for PCIe MMIO may exist. In such cases, +the CFMWS Range Size may not adhere to the NIW * 256 MB rule. + +The HPA represents the actual physical memory address space that the CXL devices +can decode and respond to, while the System Physical Address (SPA), a related +but distinct concept, represents the system-visible address space that users can +direct transaction to and so it excludes reserved regions. + +BIOS publishes CFMWS to communicate the active SPA ranges that, on platforms +with LMH's, map to a strict subset of the HPA. The SPA range trims out the hole, +resulting in lost capacity in the Endpoints with no SPA to map to that part of +the HPA range that intersects the hole. + +E.g, an x86 platform with two CFMWS and an LMH starting at 2 GB: + + +--------+------------+-------------------+------------------+-------------------+------+ + | Window | CFMWS Base | CFMWS Size | HDM Decoder Base | HDM Decoder Size | Ways | + +========+============+===================+==================+===================+======+ + |  0 | 0 GB | 2 GB | 0 GB | 3 GB | 12 | + +--------+------------+-------------------+------------------+-------------------+------+ + |  1 | 4 GB | NIW*256MB Aligned | 4 GB | NIW*256MB Aligned | 12 | + +--------+------------+-------------------+------------------+-------------------+------+ + +HDM decoder base and HDM decoder size represent all the 12 Endpoint Decoders of +a 12 ways region and all the intermediate Switch Decoders. They are configured +by the BIOS according to the NIW * 256MB rule, resulting in a HPA range size of +3GB. Instead, the CFMWS Base and CFMWS Size are used to configure the Root +Decoder HPA range that results smaller (2GB) than that of the Switch and +Endpoint Decoders in the hierarchy (3GB). + +This creates 2 issues which lead to a failure to construct a region: + +1) A mismatch in region size between root and any HDM decoder. The root decoders + will always be smaller due to the trim. + +2) The trim causes the root decoder to violate the (NIW * 256MB) rule. + +This change allows a region with a base address of 0GB to bypass these checks to +allow for region creation with the trimmed root decoder address range. + +This change does not allow for any other arbitrary region to violate these +checks - it is intended exclusively to enable x86 platforms which map CXL memory +under 4GB. + +Despite the HDM decoders covering the PCIE hole HPA region, it is expected that +the platform will never route address accesses to the CXL complex because the +root decoder only covers the trimmed region (which excludes this). This is +outside the ability of Linux to enforce. + +On the example platform, only the first 2GB will be potentially usable, but +Linux, aiming to adhere to the current specifications, fails to construct +Regions and attach Endpoint and intermediate Switch Decoders to them. + +There are several points of failure that due to the expectation that the Root +Decoder HPA size, that is equal to the CFMWS from which it is configured, has +to be greater or equal to the matching Switch and Endpoint HDM Decoders. + +In order to succeed with construction and attachment, Linux must construct a +Region with Root Decoder HPA range size, and then attach to that all the +intermediate Switch Decoders and Endpoint Decoders that belong to the hierarchy +regardless of their range sizes. + +Benefits of the Change +---------------------- + +Without the change, the OSPM wouldn't match intermediate Switch and Endpoint +Decoders with Root Decoders configured with CFMWS HPA sizes that don't align +with the NIW * 256MB constraint, and so it leads to lost memdev capacity. + +This change allows the OSPM to construct Regions and attach intermediate Switch +and Endpoint Decoders to them, so that the addressable part of the memory +devices total capacity is made available to the users. + +References +---------- + +Compute Express Link Specification Revision 3.2, Version 1.0 + + +Detailed Description of the Change +---------------------------------- + +The description of the Window Size field in table 9-22 needs to account for +platforms with Low Memory Holes, where SPA ranges might be subsets of the +endpoints HPA. Therefore, it has to be changed to the following: + +"The total number of consecutive bytes of HPA this window represents. This value +shall be a multiple of NIW * 256 MB. + +On platforms that reserve physical addresses below 4 GB, such as the Low Memory +Hole for PCIe MMIO on x86, an instance of CFMWS whose Base HPA range is 0 might +have a size that doesn't align with the NIW * 256 MB constraint. + +Note that the matching intermediate Switch Decoders and the Endpoint Decoders +HPA range sizes must still align to the above-mentioned rule, but the memory +capacity that exceeds the CFMWS window size won't be accessible.". -- cgit v1.2.3 From b4f7a727c29cd1fa6149a81f16408ee7c1f7de0c Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 9 Sep 2025 17:34:32 +0300 Subject: dt-bindings: power: supply: bq27xxx: document optional interrupt Document an optional interrupt found in some controllers of BQ27xxx series. The pin to which the interrupt is connected is called SOC_INT or GPOUT. Signed-off-by: Svyatoslav Ryhel Reviewed-by: Rob Herring (Arm) Signed-off-by: Sebastian Reichel --- .../devicetree/bindings/power/supply/bq27xxx.yaml | 37 ++++++++++++++++++++-- 1 file changed, 34 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml b/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml index 309ea33b5b25..bc05400186cf 100644 --- a/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml +++ b/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml @@ -16,9 +16,6 @@ description: | Support various Texas Instruments fuel gauge devices that share similar register maps and power supply properties -allOf: - - $ref: power-supply.yaml# - properties: compatible: enum: @@ -58,6 +55,10 @@ properties: maxItems: 1 description: integer, I2C address of the fuel gauge. + interrupts: + maxItems: 1 + description: the SOC_INT or GPOUT pin + monitored-battery: description: | The fuel gauge uses the following battery properties: @@ -68,6 +69,36 @@ properties: power-supplies: true +allOf: + - $ref: power-supply.yaml# + - if: + properties: + compatible: + contains: + enum: + - ti,bq27200 + - ti,bq27210 + - ti,bq27500 # deprecated, use revision specific property below + - ti,bq27510 # deprecated, use revision specific property below + - ti,bq27520 # deprecated, use revision specific property below + - ti,bq27500-1 + - ti,bq27510g1 + - ti,bq27510g2 + - ti,bq27521 + - ti,bq27541 + - ti,bq27542 + - ti,bq27546 + - ti,bq27742 + - ti,bq27545 + - ti,bq27411 + - ti,bq27z561 + - ti,bq28z610 + - ti,bq34z100 + - ti,bq78z100 + then: + properties: + interrupts: false + required: - compatible - reg -- cgit v1.2.3 From 220928e52cb03d223b3acad3888baf0687486d21 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 18 Aug 2025 20:21:18 +0100 Subject: arm64/hwcap: Add hwcap for FEAT_LSFE FEAT_LSFE (Large System Float Extension), providing atomic floating point memory operations, is optional from v9.5. This feature adds no new architectural stare and we have no immediate use for it in the kernel so simply provide a hwcap for it to support discovery by userspace. Signed-off-by: Mark Brown Signed-off-by: Will Deacon --- Documentation/arch/arm64/elf_hwcaps.rst | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/arch/arm64/elf_hwcaps.rst b/Documentation/arch/arm64/elf_hwcaps.rst index f58ada4d6cb2..a15df4956849 100644 --- a/Documentation/arch/arm64/elf_hwcaps.rst +++ b/Documentation/arch/arm64/elf_hwcaps.rst @@ -441,6 +441,10 @@ HWCAP3_MTE_FAR HWCAP3_MTE_STORE_ONLY Functionality implied by ID_AA64PFR2_EL1.MTESTOREONLY == 0b0001. +HWCAP3_LSFE + Functionality implied by ID_AA64ISAR3_EL1.LSFE == 0b0001 + + 4. Unused AT_HWCAP bits ----------------------- -- cgit v1.2.3 From d1829e0b2f0619c39b0ce0b84fcbf67569108376 Mon Sep 17 00:00:00 2001 From: E Shattow Date: Fri, 5 Sep 2025 07:39:40 -0700 Subject: dt-bindings: riscv: starfive: add milkv,marscm-emmc Add "milkv,marscm-emmc" as a StarFive JH7110 SoC-based system-on-module. Signed-off-by: E Shattow Acked-by: Rob Herring (Arm) Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/riscv/starfive.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml index 7ef85174353d..0713edb687fe 100644 --- a/Documentation/devicetree/bindings/riscv/starfive.yaml +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml @@ -28,6 +28,7 @@ properties: - enum: - deepcomputing,fml13v01 - milkv,mars + - milkv,marscm-emmc - pine64,star64 - starfive,visionfive-2-v1.2a - starfive,visionfive-2-v1.3b -- cgit v1.2.3 From 12a29108384cfe073a4de778d5207d53b492f85e Mon Sep 17 00:00:00 2001 From: E Shattow Date: Fri, 5 Sep 2025 07:39:42 -0700 Subject: dt-bindings: riscv: starfive: add milkv,marscm-lite Add "milkv,marscm-lite" as a StarFive JH7110 SoC-based system-on-module. Signed-off-by: E Shattow Acked-by: Rob Herring (Arm) Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/riscv/starfive.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml index 0713edb687fe..04510341a71e 100644 --- a/Documentation/devicetree/bindings/riscv/starfive.yaml +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml @@ -29,6 +29,7 @@ properties: - deepcomputing,fml13v01 - milkv,mars - milkv,marscm-emmc + - milkv,marscm-lite - pine64,star64 - starfive,visionfive-2-v1.2a - starfive,visionfive-2-v1.3b -- cgit v1.2.3 From c0f303d7d4723b01c686e949e6f26a93e5cda910 Mon Sep 17 00:00:00 2001 From: Huang Shijie Date: Tue, 9 Sep 2025 11:32:35 +0800 Subject: arm64: mm: Rework the 'rodata=' options As per admin guide documentation, "rodata=on" should be the default on platforms. Documentation/admin-guide/kernel-parameters.txt describes these options as rodata= [KNL,EARLY] on Mark read-only kernel memory as read-only (default). off Leave read-only kernel memory writable for debugging. full Mark read-only kernel memory and aliases as read-only [arm64] But on arm64 platform, RODATA_FULL_DEFAULT_ENABLED is enabled by default, so "rodata=full" is the default instead. For parity with other architectures, namely x86, rework 'rodata=on' to match the current "full" behaviour and replace 'rodata=full' with a new 'rodata=noalias' option which retains writable aliases in the direct map for memory regions outside of the kernel image. Signed-off-by: Huang Shijie Reviewed-by: Anshuman Khandual Signed-off-by: Will Deacon --- Documentation/admin-guide/kernel-parameters.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 747a55abf494..fe99652c584e 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -6405,8 +6405,9 @@ rodata= [KNL,EARLY] on Mark read-only kernel memory as read-only (default). off Leave read-only kernel memory writable for debugging. - full Mark read-only kernel memory and aliases as read-only - [arm64] + noalias Mark read-only kernel memory as read-only but retain + writable aliases in the direct map for regions outside + of the kernel image. [arm64] rockchip.usb_uart [EARLY] -- cgit v1.2.3 From 5b5133e6a55bf6ca18de1b33c2ffe17d1162ec8e Mon Sep 17 00:00:00 2001 From: Jiaming Zhang Date: Sat, 6 Sep 2025 01:47:36 +0800 Subject: Documentation: KVM: Call out that KVM strictly follows the 8254 PIT spec Explicitly document that the behavior of KVM_SET_PIT2 strictly conforms to the Intel 8254 PIT hardware specification, specifically that a write of '0' adheres to the spec's definition that a programmed count of '0' is converted to the maximum possible value (2^16). E.g. an unaware userspace might attempt to validate that KVM_GET_PIT2 returns the exact state set via KVM_SET_PIT2, and be surprised when the returned count is 65536, not 0. Add a references to the Intel 8254 PIT datasheet that will hopefully stay fresh for some time (the internet isn't exactly brimming with copies of the 8254 datasheet). Link: https://lore.kernel.org/all/CANypQFbEySjKOFLqtFFf2vrEe=NBr7XJfbkjQhqXuZGg7Rpoxw@mail.gmail.com Signed-off-by: Jiaming Zhang Link: https://lore.kernel.org/r/20250905174736.260694-1-r772577952@gmail.com [sean: add context Link, drop local APIC change, massage changelog accordingly] Signed-off-by: Sean Christopherson --- Documentation/virt/kvm/api.rst | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index 6aa40ee05a4a..b3f2395a62d1 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -3075,6 +3075,12 @@ This IOCTL replaces the obsolete KVM_GET_PIT. Sets the state of the in-kernel PIT model. Only valid after KVM_CREATE_PIT2. See KVM_GET_PIT2 for details on struct kvm_pit_state2. +.. Tip:: + ``KVM_SET_PIT2`` strictly adheres to the spec of Intel 8254 PIT. For example, + a ``count`` value of 0 in ``struct kvm_pit_channel_state`` is interpreted as + 65536, which is the maximum count value. Refer to `Intel 8254 programmable + interval timer `_. + This IOCTL replaces the obsolete KVM_SET_PIT. -- cgit v1.2.3 From 7cfbe1c3397c9368d2bd7fbf5345a5bf4c43df0d Mon Sep 17 00:00:00 2001 From: "Kory Maincent (Dent Project)" Date: Mon, 15 Sep 2025 19:06:28 +0200 Subject: docs: devlink: Sort table of contents alphabetically Sort devlink documentation table of contents alphabetically to improve readability and make it easier to locate specific chapters. Signed-off-by: Kory Maincent Link: https://patch.msgid.link/20250915-feature_poe_permanent_conf-v3-3-78871151088b@bootlin.com Signed-off-by: Jakub Kicinski --- Documentation/networking/devlink/index.rst | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/devlink/index.rst b/Documentation/networking/devlink/index.rst index 270a65a01411..0c58e5c729d9 100644 --- a/Documentation/networking/devlink/index.rst +++ b/Documentation/networking/devlink/index.rst @@ -56,18 +56,18 @@ general. :maxdepth: 1 devlink-dpipe + devlink-eswitch-attr + devlink-flash devlink-health devlink-info - devlink-flash + devlink-linecard devlink-params devlink-port devlink-region - devlink-resource devlink-reload + devlink-resource devlink-selftests devlink-trap - devlink-linecard - devlink-eswitch-attr Driver-specific documentation ----------------------------- @@ -78,12 +78,14 @@ parameters, info versions, and other features it supports. .. toctree:: :maxdepth: 1 + am65-nuss-cpsw-switch bnxt etas_es58x hns3 i40e - ionic ice + ionic + iosm ixgbe kvaser_pciefd kvaser_usb @@ -93,11 +95,9 @@ parameters, info versions, and other features it supports. mv88e6xxx netdevsim nfp - qed - ti-cpsw-switch - am65-nuss-cpsw-switch - prestera - iosm octeontx2 + prestera + qed sfc + ti-cpsw-switch zl3073x -- cgit v1.2.3 From 7c85e4da8ce734eaca66a921aabeb6107842169f Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Sat, 6 Sep 2025 15:16:56 -0500 Subject: dt-bindings: clock: silabs,si5341: Add missing properties Add "clock-output-names" which is a standard property for clock providers. Add the "always-on" boolean property which was undocumented, but already in use for some time. The flag prevents a clock output from being disabled. Signed-off-by: Rob Herring (Arm) Tested-by: Michal Simek Reviewed-by: Michal Simek Signed-off-by: Stephen Boyd --- Documentation/devicetree/bindings/clock/silabs,si5341.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/silabs,si5341.yaml b/Documentation/devicetree/bindings/clock/silabs,si5341.yaml index b4f7efdf0b7b..d6416bded3d5 100644 --- a/Documentation/devicetree/bindings/clock/silabs,si5341.yaml +++ b/Documentation/devicetree/bindings/clock/silabs,si5341.yaml @@ -73,6 +73,8 @@ properties: - const: in1 - const: in2 + clock-output-names: true + interrupts: maxItems: 1 description: Interrupt for INTRb pin @@ -130,6 +132,10 @@ patternProperties: description: Number of clock output maximum: 9 + always-on: + description: Set to keep the clock output always running + type: boolean + silabs,format: description: Output format $ref: /schemas/types.yaml#/definitions/uint32 -- cgit v1.2.3 From d98b40c07552a3bdc72bfc5879748707ba7598ae Mon Sep 17 00:00:00 2001 From: K Prateek Nayak Date: Mon, 1 Sep 2025 17:04:18 +0000 Subject: Documentation/x86/topology: Detail CPUID leaves used for topology enumeration Add a new section describing the different CPUID leaves and fields used to parse topology on x86 systems. [ bp: Cleanups and simplifications ontop. ] Suggested-by: Borislav Petkov Signed-off-by: K Prateek Nayak Signed-off-by: Borislav Petkov (AMD) Signed-off-by: Ingo Molnar Link: https://lore.kernel.org/20250901170418.4314-1-kprateek.nayak@amd.com --- Documentation/arch/x86/topology.rst | 191 ++++++++++++++++++++++++++++++++++++ 1 file changed, 191 insertions(+) (limited to 'Documentation') diff --git a/Documentation/arch/x86/topology.rst b/Documentation/arch/x86/topology.rst index c12837e61bda..86bec8ac2c4d 100644 --- a/Documentation/arch/x86/topology.rst +++ b/Documentation/arch/x86/topology.rst @@ -141,6 +141,197 @@ Thread-related topology information in the kernel: +System topology enumeration +=========================== + +The topology on x86 systems can be discovered using a combination of vendor +specific CPUID leaves which enumerate the processor topology and the cache +hierarchy. + +The CPUID leaves in their preferred order of parsing for each x86 vendor is as +follows: + +1) AMD + + 1) CPUID leaf 0x80000026 [Extended CPU Topology] (Core::X86::Cpuid::ExCpuTopology) + + The extended CPUID leaf 0x80000026 is the extension of the CPUID leaf 0xB + and provides the topology information of Core, Complex, CCD (Die), and + Socket in each level. + + Support for the leaf is discovered by checking if the maximum extended + CPUID level is >= 0x80000026 and then checking if `LogProcAtThisLevel` + in `EBX[15:0]` at a particular level (starting from 0) is non-zero. + + The `LevelType` in `ECX[15:8]` at the level provides the topology domain + the level describes - Core, Complex, CCD(Die), or the Socket. + + The kernel uses the `CoreMaskWidth` from `EAX[4:0]` to discover the + number of bits that need to be right-shifted from `ExtendedLocalApicId` + in `EDX[31:0]` in order to get a unique Topology ID for the topology + level. CPUs with the same Topology ID share the resources at that level. + + CPUID leaf 0x80000026 also provides more information regarding the power + and efficiency rankings, and about the core type on AMD processors with + heterogeneous characteristics. + + If CPUID leaf 0x80000026 is supported, further parsing is not required. + + 2) CPUID leaf 0x0000000B [Extended Topology Enumeration] (Core::X86::Cpuid::ExtTopEnum) + + The extended CPUID leaf 0x0000000B is the predecessor on the extended + CPUID leaf 0x80000026 and only describes the core, and the socket domains + of the processor topology. + + The support for the leaf is discovered by checking if the maximum supported + CPUID level is >= 0xB and then if `EBX[31:0]` at a particular level + (starting from 0) is non-zero. + + The `LevelType` in `ECX[15:8]` at the level provides the topology domain + that the level describes - Thread, or Processor (Socket). + + The kernel uses the `CoreMaskWidth` from `EAX[4:0]` to discover the + number of bits that need to be right-shifted from the `ExtendedLocalApicId` + in `EDX[31:0]` to get a unique Topology ID for that topology level. CPUs + sharing the Topology ID share the resources at that level. + + If CPUID leaf 0xB is supported, further parsing is not required. + + + 3) CPUID leaf 0x80000008 ECX [Size Identifiers] (Core::X86::Cpuid::SizeId) + + If neither the CPUID leaf 0x80000026 nor 0xB is supported, the number of + CPUs on the package is detected using the Size Identifier leaf + 0x80000008 ECX. + + The support for the leaf is discovered by checking if the supported + extended CPUID level is >= 0x80000008. + + The shifts from the APIC ID for the Socket ID is calculated from the + `ApicIdSize` field in `ECX[15:12]` if it is non-zero. + + If `ApicIdSize` is reported to be zero, the shift is calculated as the + order of the `number of threads` calculated from `NC` field in + `ECX[7:0]` which describes the `number of threads - 1` on the package. + + Unless Extended APIC ID is supported, the APIC ID used to find the + Socket ID is from the `LocalApicId` field of CPUID leaf 0x00000001 + `EBX[31:24]`. + + The topology parsing continues to detect if Extended APIC ID is + supported or not. + + + 4) CPUID leaf 0x8000001E [Extended APIC ID, Core Identifiers, Node Identifiers] + (Core::X86::Cpuid::{ExtApicId,CoreId,NodeId}) + + The support for Extended APIC ID can be detected by checking for the + presence of `TopologyExtensions` in `ECX[22]` of CPUID leaf 0x80000001 + [Feature Identifiers] (Core::X86::Cpuid::FeatureExtIdEcx). + + If Topology Extensions is supported, the APIC ID from `ExtendedApicId` + from CPUID leaf 0x8000001E `EAX[31:0]` should be preferred over that from + `LocalApicId` field of CPUID leaf 0x00000001 `EBX[31:24]` for topology + enumeration. + + On processors of Family 0x17 and above that do not support CPUID leaf + 0x80000026 or CPUID leaf 0xB, the shifts from the APIC ID for the Core + ID is calculated using the order of `number of threads per core` + calculated using the `ThreadsPerCore` field in `EBX[15:8]` which + describes `number of threads per core - 1`. + + On Processors of Family 0x15, the Core ID from `EBX[7:0]` is used as the + `cu_id` (Compute Unit ID) to detect CPUs that share the compute units. + + + All AMD processors that support the `TopologyExtensions` feature store the + `NodeId` from the `ECX[7:0]` of CPUID leaf 0x8000001E + (Core::X86::Cpuid::NodeId) as the per-CPU `node_id`. On older processors, + the `node_id` was discovered using MSR_FAM10H_NODE_ID MSR (MSR + 0x0xc001_100c). The presence of the NODE_ID MSR was detected by checking + `ECX[19]` of CPUID leaf 0x80000001 [Feature Identifiers] + (Core::X86::Cpuid::FeatureExtIdEcx). + + +2) Intel + + On Intel platforms, the CPUID leaves that enumerate the processor + topology are as follows: + + 1) CPUID leaf 0x1F (V2 Extended Topology Enumeration Leaf) + + The CPUID leaf 0x1F is the extension of the CPUID leaf 0xB and provides + the topology information of Core, Module, Tile, Die, DieGrp, and Socket + in each level. + + The support for the leaf is discovered by checking if the supported + CPUID level is >= 0x1F and then `EBX[31:0]` at a particular level + (starting from 0) is non-zero. + + The `Domain Type` in `ECX[15:8]` of the sub-leaf provides the topology + domain that the level describes - Core, Module, Tile, Die, DieGrp, and + Socket. + + The kernel uses the value from `EAX[4:0]` to discover the number of + bits that need to be right shifted from the `x2APIC ID` in `EDX[31:0]` + to get a unique Topology ID for the topology level. CPUs with the same + Topology ID share the resources at that level. + + If CPUID leaf 0x1F is supported, further parsing is not required. + + + 2) CPUID leaf 0x0000000B (Extended Topology Enumeration Leaf) + + The extended CPUID leaf 0x0000000B is the predecessor of the V2 Extended + Topology Enumeration Leaf 0x1F and only describes the core, and the + socket domains of the processor topology. + + The support for the leaf is iscovered by checking if the supported CPUID + level is >= 0xB and then checking if `EBX[31:0]` at a particular level + (starting from 0) is non-zero. + + CPUID leaf 0x0000000B shares the same layout as CPUID leaf 0x1F and + should be enumerated in a similar manner. + + If CPUID leaf 0xB is supported, further parsing is not required. + + + 3) CPUID leaf 0x00000004 (Deterministic Cache Parameters Leaf) + + On Intel processors that support neither CPUID leaf 0x1F, nor CPUID leaf + 0xB, the shifts for the SMT domains is calculated using the number of + CPUs sharing the L1 cache. + + Processors that feature Hyper-Threading is detected using `EDX[28]` of + CPUID leaf 0x1 (Basic CPUID Information). + + The order of `Maximum number of addressable IDs for logical processors + sharing this cache` from `EAX[25:14]` of level-0 of CPUID 0x4 provides + the shifts from the APIC ID required to compute the Core ID. + + The APIC ID and Package information is computed using the data from + CPUID leaf 0x1. + + + 4) CPUID leaf 0x00000001 (Basic CPUID Information) + + The mask and shifts to derive the Physical Package (socket) ID is + computed using the `Maximum number of addressable IDs for logical + processors in this physical package` from `EBX[23:16]` of CPUID leaf + 0x1. + + The APIC ID on the legacy platforms is derived from the `Initial APIC + ID` field from `EBX[31:24]` of CPUID leaf 0x1. + + +3) Centaur and Zhaoxin + + Similar to Intel, Centaur and Zhaoxin use a combination of CPUID leaf + 0x00000004 (Deterministic Cache Parameters Leaf) and CPUID leaf 0x00000001 + (Basic CPUID Information) to derive the topology information. + + + System topology examples ======================== -- cgit v1.2.3 From 7d547c1c249872b7732767e483758cb4fcb2d99b Mon Sep 17 00:00:00 2001 From: Ze Huang Date: Sat, 13 Sep 2025 00:53:47 +0800 Subject: dt-bindings: usb: dwc3: add support for SpacemiT K1 Add support for the USB 3.0 Dual-Role Device (DRD) controller embedded in the SpacemiT K1 SoC. The controller is based on the Synopsys DesignWare Core USB 3 (DWC3) IP, supporting USB3.0 host mode and USB 2.0 DRD mode. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Ze Huang Link: https://lore.kernel.org/r/20250913-dwc3_generic-v8-1-b50f81f05f95@linux.dev Signed-off-by: Greg Kroah-Hartman Link: https://lore.kernel.org/r/20250913-dwc3_generic-v8-1-b50f81f05f95@linux.dev --- .../devicetree/bindings/usb/spacemit,k1-dwc3.yaml | 121 +++++++++++++++++++++ 1 file changed, 121 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml new file mode 100644 index 000000000000..0f0b5e061ca1 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml @@ -0,0 +1,121 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/spacemit,k1-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SpacemiT K1 SuperSpeed DWC3 USB SoC Controller + +maintainers: + - Ze Huang + +description: | + The SpacemiT K1 embeds a DWC3 USB IP Core which supports Host functions + for USB 3.0 and DRD for USB 2.0. + + Key features: + - USB3.0 SuperSpeed and USB2.0 High/Full/Low-Speed support + - Supports low-power modes (USB2.0 suspend, USB3.0 U1/U2/U3) + - Internal DMA controller and flexible endpoint FIFO sizing + + Communication Interface: + - Use of PIPE3 (125MHz) interface for USB3.0 PHY + - Use of UTMI+ (30/60MHz) interface for USB2.0 PHY + +allOf: + - $ref: snps,dwc3-common.yaml# + +properties: + compatible: + const: spacemit,k1-dwc3 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: usbdrd30 + + interrupts: + maxItems: 1 + + phys: + items: + - description: phandle to USB2/HS PHY + - description: phandle to USB3/SS PHY + + phy-names: + items: + - const: usb2-phy + - const: usb3-phy + + resets: + items: + - description: USB3.0 AHB reset + - description: USB3.0 VCC reset + - description: USB3.0 PHY reset + + reset-names: + items: + - const: ahb + - const: vcc + - const: phy + + reset-delay: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 2 + description: delay after reset sequence [us] + + vbus-supply: + description: A phandle to the regulator supplying the VBUS voltage. + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - phys + - phy-names + - resets + - reset-names + +unevaluatedProperties: false + +examples: + - | + usb@c0a00000 { + compatible = "spacemit,k1-dwc3"; + reg = <0xc0a00000 0x10000>; + clocks = <&syscon_apmu 16>; + clock-names = "usbdrd30"; + interrupts = <125>; + phys = <&usb2phy>, <&usb3phy>; + phy-names = "usb2-phy", "usb3-phy"; + resets = <&syscon_apmu 8>, + <&syscon_apmu 9>, + <&syscon_apmu 10>; + reset-names = "ahb", "vcc", "phy"; + reset-delay = <2>; + vbus-supply = <&usb3_vbus>; + #address-cells = <1>; + #size-cells = <0>; + + hub_2_0: hub@1 { + compatible = "usb2109,2817"; + reg = <1>; + vdd-supply = <&usb3_vhub>; + peer-hub = <&hub_3_0>; + reset-gpios = <&gpio 3 28 1>; + }; + + hub_3_0: hub@2 { + compatible = "usb2109,817"; + reg = <2>; + vdd-supply = <&usb3_vhub>; + peer-hub = <&hub_2_0>; + reset-gpios = <&gpio 3 28 1>; + }; + }; -- cgit v1.2.3 From dd0d2618e3f815a030622599e540d3be1964a888 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Tue, 16 Sep 2025 16:02:39 +0100 Subject: dt-bindings: usb: Document Renesas RZ/G3E USB3HOST Document the Renesas RZ/G3E USB3.2 Gen2 Host Controller (a.k.a USB3HOST). The USB3HOST is compliant with the Universal Serial Bus 3.2 Specification Revision 1.0. - Supports 1 downstream USB receptacles - Number of SSP Gen2 or SS ports: 1 - Number of HS or FS or LS ports: 1 - Supports Super Speed Plus Gen2x1 (10 Gbps), Super Speed (5 Gbps), High Speed (480 Mbps), Full Speed (12Mbps), and Low Speed (1.5 Mbps). - Supports all transfer-types: Control, Bulk, Interrupt, Isochronous, and these split-transactions. - Supports Power Control and Over Current Detection. Reviewed-by: Rob Herring (Arm) Signed-off-by: Biju Das Link: https://lore.kernel.org/r/20250916150255.4231-4-biju.das.jz@bp.renesas.com Signed-off-by: Greg Kroah-Hartman --- .../bindings/usb/renesas,rzg3e-xhci.yaml | 87 ++++++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/renesas,rzg3e-xhci.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/renesas,rzg3e-xhci.yaml b/Documentation/devicetree/bindings/usb/renesas,rzg3e-xhci.yaml new file mode 100644 index 000000000000..98260f9fb442 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/renesas,rzg3e-xhci.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/renesas,rzg3e-xhci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/G3E USB 3.2 Gen2 Host controller + +maintainers: + - Biju Das + +properties: + compatible: + const: renesas,r9a09g047-xhci + + reg: + maxItems: 1 + + interrupts: + items: + - description: Logical OR of all interrupt signals. + - description: System management interrupt + - description: Host system error interrupt + - description: Power management event interrupt + - description: xHC interrupt + + interrupt-names: + items: + - const: all + - const: smi + - const: hse + - const: pme + - const: xhc + + clocks: + maxItems: 1 + + phys: + maxItems: 2 + + phy-names: + items: + - const: usb2-phy + - const: usb3-phy + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - power-domains + - resets + - phys + - phy-names + +allOf: + - $ref: usb-xhci.yaml + +additionalProperties: false + +examples: + - | + #include + #include + + usb@15850000 { + compatible = "renesas,r9a09g047-xhci"; + reg = <0x15850000 0x10000>; + interrupts = , + , + , + , + ; + interrupt-names = "all", "smi", "hse", "pme", "xhc"; + clocks = <&cpg CPG_MOD 0xaf>; + power-domains = <&cpg>; + resets = <&cpg 0xaa>; + phys = <&usb3_phy>, <&usb3_phy>; + phy-names = "usb2-phy", "usb3-phy"; + }; -- cgit v1.2.3 From 5bcf9e1d0a5da750ff180e7385b0bd4041686516 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= Date: Sat, 13 Sep 2025 23:12:48 +0200 Subject: dt-bindings: clock: marvell,pxa1908: Add syscon compatible to apmu MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add required syscon compatible and #power-domain-cells to the APMU controller. This is required for the SoC's power domain controller as the registers are shared. Device tree bindings for said power domains are also added. Reviewed-by: Rob Herring (Arm) Signed-off-by: Duje Mihanović Signed-off-by: Ulf Hansson --- .../devicetree/bindings/clock/marvell,pxa1908.yaml | 30 +++++++++++++++++----- 1 file changed, 24 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml b/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml index 4e78933232b6..6f3a8578fe2a 100644 --- a/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml +++ b/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml @@ -19,11 +19,14 @@ description: | properties: compatible: - enum: - - marvell,pxa1908-apbc - - marvell,pxa1908-apbcp - - marvell,pxa1908-mpmu - - marvell,pxa1908-apmu + oneOf: + - enum: + - marvell,pxa1908-apbc + - marvell,pxa1908-apbcp + - marvell,pxa1908-mpmu + - items: + - const: marvell,pxa1908-apmu + - const: syscon reg: maxItems: 1 @@ -31,6 +34,9 @@ properties: '#clock-cells': const: 1 + '#power-domain-cells': + const: 1 + required: - compatible - reg @@ -38,11 +44,23 @@ required: additionalProperties: false +if: + not: + properties: + compatible: + contains: + const: marvell,pxa1908-apmu + +then: + properties: + '#power-domain-cells': false + examples: # APMU block: - | clock-controller@d4282800 { - compatible = "marvell,pxa1908-apmu"; + compatible = "marvell,pxa1908-apmu", "syscon"; reg = <0xd4282800 0x400>; #clock-cells = <1>; + #power-domain-cells = <1>; }; -- cgit v1.2.3 From cf6ee09b0913308729f9c38cfbcb8320c10fe5d5 Mon Sep 17 00:00:00 2001 From: Matthew Wood Date: Wed, 17 Sep 2025 05:58:14 -0700 Subject: PCI/sysfs: Expose PCI device serial number MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a single sysfs read-only interface for reading PCI device serial numbers from userspace in a programmatic way. This device attribute uses the same hexadecimal 1-byte dashed formatting as lspci serial number capability output. If a device doesn't support the serial number capability, the serial_number sysfs attribute will not be visible. Signed-off-by: Matthew Wood Signed-off-by: Bjorn Helgaas Reviewed-by: Mario Limonciello Reviewed-by: Jonathan Cameron Reviewed-by: Thomas Weißschuh Reviewed-by: Keith Busch Reviewed-by: Krzysztof Wilczyński Link: https://patch.msgid.link/20250917125815.722952-2-thepacketgeek@gmail.com --- Documentation/ABI/testing/sysfs-bus-pci | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-bus-pci b/Documentation/ABI/testing/sysfs-bus-pci index 69f952fffec7..92debe879ffb 100644 --- a/Documentation/ABI/testing/sysfs-bus-pci +++ b/Documentation/ABI/testing/sysfs-bus-pci @@ -612,3 +612,12 @@ Description: # ls doe_features 0001:01 0001:02 doe_discovery + +What: /sys/bus/pci/devices/.../serial_number +Date: December 2025 +Contact: Matthew Wood +Description: + This is visible only for PCI devices that support the serial + number extended capability. The file is read only and due to + the possible sensitivity of accessible serial numbers, admin + only. -- cgit v1.2.3 From 9bc7130822c4c7f3ef39f20174a379e476586ab3 Mon Sep 17 00:00:00 2001 From: Viken Dadhaniya Date: Thu, 11 Sep 2025 10:02:51 +0530 Subject: dt-bindings: qcom: se-common: Add QUP Peripheral-specific properties for I2C, SPI, and SERIAL bus Introduce a new YAML schema for QUP-supported peripherals. Define common properties used across QUP-supported peripherals. Add property `qcom,enable-gsi-dma` to configure the Serial Engine (SE) for QCOM GPI DMA mode. Reference the common schema YAML in the GENI I2C, SPI, and SERIAL YAML files. Reviewed-by: Krzysztof Kozlowski Co-developed-by: Mukesh Kumar Savaliya Signed-off-by: Mukesh Kumar Savaliya Signed-off-by: Viken Dadhaniya Link: https://lore.kernel.org/r/20250911043256.3523057-2-viken.dadhaniya@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- .../bindings/i2c/qcom,i2c-geni-qcom.yaml | 1 + .../bindings/serial/qcom,serial-geni-qcom.yaml | 1 + .../bindings/soc/qcom/qcom,se-common-props.yaml | 26 ++++++++++++++++++++++ .../bindings/spi/qcom,spi-geni-qcom.yaml | 1 + 4 files changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,se-common-props.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml index 9f66a3bb1f80..51534953a69c 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml @@ -75,6 +75,7 @@ required: allOf: - $ref: /schemas/i2c/i2c-controller.yaml# + - $ref: /schemas/soc/qcom/qcom,se-common-props.yaml# - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml index dd33794b3534..ed7b3909d87d 100644 --- a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml +++ b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml @@ -12,6 +12,7 @@ maintainers: allOf: - $ref: /schemas/serial/serial.yaml# + - $ref: /schemas/soc/qcom/qcom,se-common-props.yaml# properties: compatible: diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,se-common-props.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,se-common-props.yaml new file mode 100644 index 000000000000..6a34f05a07e8 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,se-common-props.yaml @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/qcom/qcom,se-common-props.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: QUP Peripheral-specific properties for I2C, SPI and SERIAL bus + +description: + The Generic Interface (GENI) based Qualcomm Universal Peripheral (QUP) is + a programmable module that supports a wide range of serial interfaces + such as UART, SPI, I2C, I3C, etc. This defines the common properties used + across QUP-supported peripherals. + +maintainers: + - Mukesh Kumar Savaliya + - Viken Dadhaniya + +properties: + qcom,enable-gsi-dma: + $ref: /schemas/types.yaml#/definitions/flag + description: + Configure the Serial Engine (SE) to transfer data in QCOM GPI DMA mode. + By default, FIFO mode (PIO/CPU DMA) will be selected. + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml index 2e20ca313ec1..d12c5a060ed0 100644 --- a/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml +++ b/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml @@ -25,6 +25,7 @@ description: allOf: - $ref: /schemas/spi/spi-controller.yaml# + - $ref: /schemas/soc/qcom/qcom,se-common-props.yaml# properties: compatible: -- cgit v1.2.3 From f9d803784f8dfea60f394d7fc94084c5f1eb4027 Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Wed, 17 Sep 2025 14:11:18 -0700 Subject: dt-bindings: input: touchscreen: document Himax HX852x(ES) Himax HX852x(ES) is a touch panel controller with optional support for capacitive touch keys. Unfortunately, the model naming is quite unclear and confusing. There seems to be a distinction between models (e.g. HX8526) and the "series" suffix (e.g. -A, -B, -C, -D, -E, -ES). But this doesn't seem to be applied very consistently because e.g. HX8527-E(44) actually seems to belong to the -ES series. The compatible consists of the actual part number followed by the "series" as fallback compatible. Typically only the latter will be interesting for drivers as there is no relevant difference on the driver side. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Stephan Gerhold Link: https://lore.kernel.org/r/20250915-hx852x-v5-1-b938182f1056@linaro.org Signed-off-by: Dmitry Torokhov --- .../bindings/input/touchscreen/himax,hx852es.yaml | 81 ++++++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 Documentation/devicetree/bindings/input/touchscreen/himax,hx852es.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/touchscreen/himax,hx852es.yaml b/Documentation/devicetree/bindings/input/touchscreen/himax,hx852es.yaml new file mode 100644 index 000000000000..40a60880111d --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/himax,hx852es.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/touchscreen/himax,hx852es.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Himax HX852x(ES) touch panel controller + +maintainers: + - Stephan Gerhold + +allOf: + - $ref: touchscreen.yaml# + +properties: + compatible: + items: + - enum: + - himax,hx8525e + - himax,hx8526e + - himax,hx8527e + - const: himax,hx852es + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + description: Touch Screen Interrupt (TSIX), active low + + reset-gpios: + maxItems: 1 + description: External Reset (XRES), active low + + vcca-supply: + description: Analog power supply (VCCA) + + vccd-supply: + description: Digital power supply (VCCD) + + touchscreen-inverted-x: true + touchscreen-inverted-y: true + touchscreen-size-x: true + touchscreen-size-y: true + touchscreen-swapped-x-y: true + + linux,keycodes: + minItems: 1 + maxItems: 4 + +required: + - compatible + - reg + - interrupts + - reset-gpios + +additionalProperties: false + +examples: + - | + #include + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + touchscreen@48 { + compatible = "himax,hx8527e", "himax,hx852es"; + reg = <0x48>; + interrupt-parent = <&tlmm>; + interrupts = <13 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>; + vcca-supply = <®_ts_vcca>; + vccd-supply = <&pm8916_l6>; + linux,keycodes = ; + }; + }; + +... -- cgit v1.2.3 From c3a45c5fde95d319125812f629c579cc63c69941 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Fri, 12 Sep 2025 09:51:46 +0300 Subject: dt-bindings: power: supply: bq24190: document charge enable pin Document active low Charge Enable pin. Battery charging is enabled when REG01[5:4] = 01 and CE pin = Low. CE pin must be pulled high or low. Signed-off-by: Svyatoslav Ryhel Reviewed-by: Rob Herring (Arm) Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/power/supply/bq24190.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/power/supply/bq24190.yaml b/Documentation/devicetree/bindings/power/supply/bq24190.yaml index ac9a76fc5876..938554a9fb02 100644 --- a/Documentation/devicetree/bindings/power/supply/bq24190.yaml +++ b/Documentation/devicetree/bindings/power/supply/bq24190.yaml @@ -30,6 +30,12 @@ properties: interrupts: maxItems: 1 + ce-gpios: + description: + Active low Charge Enable pin. Battery charging is enabled when + REG01[5:4] = 01 and CE pin is Low. CE pin must be pulled high or low. + maxItems: 1 + usb-otg-vbus: $ref: /schemas/regulator/regulator.yaml# description: | -- cgit v1.2.3 From d69ae81efbc95c94a2760fc82d27cdab4c26fe76 Mon Sep 17 00:00:00 2001 From: Fenglin Wu Date: Wed, 17 Sep 2025 18:15:14 +0800 Subject: power: supply: core: Add resistance power supply property Some battery drivers provide the ability to export internal resistance as a parameter. Add internal_resistance power supply property for that purpose. Signed-off-by: Fenglin Wu Signed-off-by: Sebastian Reichel --- Documentation/ABI/testing/sysfs-class-power | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-class-power b/Documentation/ABI/testing/sysfs-class-power index 87a058e14e7e..e6cce423c632 100644 --- a/Documentation/ABI/testing/sysfs-class-power +++ b/Documentation/ABI/testing/sysfs-class-power @@ -553,6 +553,22 @@ Description: Integer > 0: representing full cycles Integer = 0: cycle_count info is not available +What: /sys/class/power_supply//internal_resistance +Date: August 2025 +Contact: linux-arm-msm@vger.kernel.org +Description: + Represent the battery's internal resistance, often referred + to as Equivalent Series Resistance (ESR). It is a dynamic + parameter that reflects the opposition to current flow within + the cell. It is not a fixed value but varies significantly + based on several operational conditions, including battery + state of charge (SoC), temperature, and whether the battery + is in a charging or discharging state. + + Access: Read + + Valid values: Represented in microohms + **USB Properties** What: /sys/class/power_supply//input_current_limit -- cgit v1.2.3 From cd93fbdce5981c947f22015ded3ac6bd1939b0ad Mon Sep 17 00:00:00 2001 From: Fenglin Wu Date: Wed, 17 Sep 2025 18:15:15 +0800 Subject: power: supply: core: Add state_of_health power supply property Add state_of_health power supply property to represent battery health percentage. Signed-off-by: Fenglin Wu Signed-off-by: Sebastian Reichel --- Documentation/ABI/testing/sysfs-class-power | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-class-power b/Documentation/ABI/testing/sysfs-class-power index e6cce423c632..4b21d5d23251 100644 --- a/Documentation/ABI/testing/sysfs-class-power +++ b/Documentation/ABI/testing/sysfs-class-power @@ -569,6 +569,27 @@ Description: Valid values: Represented in microohms +What: /sys/class/power_supply//state_of_health +Date: August 2025 +Contact: linux-arm-msm@vger.kernel.org +Description: + The state_of_health parameter quantifies the overall condition + of a battery as a percentage, reflecting its ability to deliver + rated performance relative to its original specifications. It is + dynamically computed using a combination of learned capacity + and impedance-based degradation indicators, both of which evolve + over the battery's lifecycle. + Note that the exact algorithms are kept secret by most battery + vendors and the value from different battery vendors cannot be + compared with each other as there is no vendor-agnostic definition + of "performance". Also this usually cannot be used for any + calculations (i.e. this is not the factor between charge_full and + charge_full_design). + + Access: Read + + Valid values: 0 - 100 (percent) + **USB Properties** What: /sys/class/power_supply//input_current_limit -- cgit v1.2.3 From 7f8624af8e8c2c1a0169b46a23729a4cc614635c Mon Sep 17 00:00:00 2001 From: Fenglin Wu Date: Wed, 17 Sep 2025 18:15:19 +0800 Subject: dt-bindings: soc: qcom,pmic-glink: Add charge limit nvmem properties Add nvmem properties to retrieve charge control configurations from the PMIC SDAM registers. Acked-by: Rob Herring (Arm) Signed-off-by: Fenglin Wu Signed-off-by: Sebastian Reichel --- .../devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml index 48114bb0c927..7085bf88afab 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml @@ -56,6 +56,20 @@ properties: The array should contain a gpio entry for each PMIC Glink connector, in reg order. It is defined that GPIO active level means "CC2" or Reversed/Flipped orientation. + nvmem-cells: + minItems: 3 + maxItems: 3 + description: + The nvmem cells contain the charge control settings, including the charge control + enable status, the battery state of charge (SoC) threshold for stopping charging, + and the battery SoC delta required to restart charging. + + nvmem-cell-names: + items: + - const: charge_limit_en + - const: charge_limit_end + - const: charge_limit_delta + patternProperties: '^connector@\d$': $ref: /schemas/connector/usb-connector.yaml# -- cgit v1.2.3 From 6bdcb735fec6cb866b0d40634d4f23effba81074 Mon Sep 17 00:00:00 2001 From: Cosmin Ratiu Date: Tue, 16 Sep 2025 17:11:43 +0300 Subject: devlink: Add a 'num_doorbells' driverinit param This parameter can be used by drivers to configure a different number of doorbells. Signed-off-by: Cosmin Ratiu Reviewed-by: Dragos Tatulea Reviewed-by: Jiri Pirko Signed-off-by: Tariq Toukan Reviewed-by: Simon Horman Signed-off-by: Jakub Kicinski --- Documentation/networking/devlink/devlink-params.rst | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/devlink/devlink-params.rst b/Documentation/networking/devlink/devlink-params.rst index c51da4fba7e7..0a9c20d70122 100644 --- a/Documentation/networking/devlink/devlink-params.rst +++ b/Documentation/networking/devlink/devlink-params.rst @@ -148,3 +148,6 @@ own name. - The max number of Virtual Functions (VFs) exposed by the PF. after reboot/pci reset, 'sriov_totalvfs' entry under the device's sysfs directory will report this value. + * - ``num_doorbells`` + - u32 + - Controls the number of doorbells used by the device. -- cgit v1.2.3 From 11bbcfb7668c6f4d97260f7caaefea22678bc31e Mon Sep 17 00:00:00 2001 From: Cosmin Ratiu Date: Tue, 16 Sep 2025 17:11:44 +0300 Subject: net/mlx5e: Use the 'num_doorbells' devlink param Use the new devlink param to control how many doorbells mlx5e devices allocate and use. The maximum number of doorbells configurable is capped to the maximum number of channels. This only applies to the Ethernet part, the RDMA devices using mlx5 manage their own doorbells. Signed-off-by: Cosmin Ratiu Reviewed-by: Dragos Tatulea Signed-off-by: Tariq Toukan Reviewed-by: Simon Horman Signed-off-by: Jakub Kicinski --- Documentation/networking/devlink/mlx5.rst | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/devlink/mlx5.rst b/Documentation/networking/devlink/mlx5.rst index 60cc9fedf1ef..41c9b716699e 100644 --- a/Documentation/networking/devlink/mlx5.rst +++ b/Documentation/networking/devlink/mlx5.rst @@ -62,6 +62,15 @@ Note: permanent parameters such as ``enable_sriov`` and ``total_vfs`` require FW echo 1 >/sys/bus/pci/rescan grep ^ /sys/bus/pci/devices/0000:01:00.0/sriov_* + * - ``num_doorbells`` + - driverinit + - This controls the number of channel doorbells used by the netdev. In all + cases, an additional doorbell is allocated and used for non-channel + communication (e.g. for PTP, HWS, etc.). Supported values are: + + - 0: No channel-specific doorbells, use the global one for everything. + - [1, max_num_channels]: Spread netdev channels equally across these + doorbells. The ``mlx5`` driver also implements the following driver-specific parameters. -- cgit v1.2.3 From 458bb855f274e227618acfa8c098b8e4894d9cd9 Mon Sep 17 00:00:00 2001 From: Yijie Yang Date: Wed, 17 Sep 2025 10:58:58 +0800 Subject: dt-bindings: arm: qcom: Document HAMOA-IOT-EVK board Document the device tree binding for the HAMOA-IOT-EVK board, which uses the Qualcomm X1E80100 SoC. The EVK consists of a carrier board and a modular System-on-Module (SoM). The SoM integrates the SoC, PMICs, and essential GPIOs, while the EVK carrier board provides additional peripherals such as UART and USB interfaces. Acked-by: Krzysztof Kozlowski Signed-off-by: Yijie Yang Link: https://lore.kernel.org/r/20250917-hamoa_initial-v12-1-4ed39d17dfc5@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 68cc458ca6bf..4f403b99c3fd 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1069,6 +1069,12 @@ properties: - qcom,x1e80100-qcp - const: qcom,x1e80100 + - items: + - enum: + - qcom,hamoa-iot-evk + - const: qcom,hamoa-iot-som + - const: qcom,x1e80100 + - items: - enum: - asus,zenbook-a14-ux3407qa -- cgit v1.2.3 From 1081eafa1bca16d3610bf44f515550d060526dd4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Eric=20Gon=C3=A7alves?= Date: Tue, 16 Sep 2025 18:04:08 +0000 Subject: dt-bindings: arm: qcom: sort sm8450 boards MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The bindings had samsung,r0q before sony,pdx*, which is out of alphabetical order, solve this issue by moving samsung,r0q before the pdx boards. Signed-off-by: Eric Gonçalves Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250916180409.157115-1-ghatto404@gmail.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 4f403b99c3fd..d89d1093cd15 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1005,9 +1005,9 @@ properties: - enum: - qcom,sm8450-hdk - qcom,sm8450-qrd + - samsung,r0q - sony,pdx223 - sony,pdx224 - - samsung,r0q - const: qcom,sm8450 - items: -- cgit v1.2.3 From 1b7d2e1742427527aac2b2d5cb92fb8f2f047cad Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 16 Sep 2025 13:13:26 -0400 Subject: dt-bindings: input: convert tca8418_keypad.txt to yaml format Convert tca8418_keypad.txt to yaml format. Signed-off-by: Frank Li Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250916171327.3773620-1-Frank.Li@nxp.com Signed-off-by: Dmitry Torokhov --- .../devicetree/bindings/input/tca8418_keypad.txt | 10 ---- .../devicetree/bindings/input/ti,tca8418.yaml | 61 ++++++++++++++++++++++ 2 files changed, 61 insertions(+), 10 deletions(-) delete mode 100644 Documentation/devicetree/bindings/input/tca8418_keypad.txt create mode 100644 Documentation/devicetree/bindings/input/ti,tca8418.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/tca8418_keypad.txt b/Documentation/devicetree/bindings/input/tca8418_keypad.txt deleted file mode 100644 index 255185009167..000000000000 --- a/Documentation/devicetree/bindings/input/tca8418_keypad.txt +++ /dev/null @@ -1,10 +0,0 @@ -This binding is based on the matrix-keymap binding with the following -changes: - -keypad,num-rows and keypad,num-columns are required. - -Required properties: -- compatible: "ti,tca8418" -- reg: the I2C address -- interrupts: IRQ line number, should trigger on falling edge -- linux,keymap: Keys definitions, see keypad-matrix. diff --git a/Documentation/devicetree/bindings/input/ti,tca8418.yaml b/Documentation/devicetree/bindings/input/ti,tca8418.yaml new file mode 100644 index 000000000000..624a1830d0b0 --- /dev/null +++ b/Documentation/devicetree/bindings/input/ti,tca8418.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/ti,tca8418.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI TCA8418 I2C/SMBus keypad scanner + +maintainers: + - Frank Li + +properties: + compatible: + enum: + - ti,tca8418 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +allOf: + - $ref: matrix-keymap.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + keypad@34 { + compatible = "ti,tca8418"; + reg = <0x34>; + interrupt-parent = <&gpio5>; + interrupts = <11 IRQ_TYPE_EDGE_FALLING>; + keypad,num-rows = <4>; + keypad,num-columns = <4>; + linux,keymap = < MATRIX_KEY(0x00, 0x01, BTN_0) + MATRIX_KEY(0x00, 0x00, BTN_1) + MATRIX_KEY(0x01, 0x01, BTN_2) + MATRIX_KEY(0x01, 0x00, BTN_3) + MATRIX_KEY(0x02, 0x00, BTN_4) + MATRIX_KEY(0x00, 0x03, BTN_5) + MATRIX_KEY(0x00, 0x02, BTN_6) + MATRIX_KEY(0x01, 0x03, BTN_7) + MATRIX_KEY(0x01, 0x02, BTN_8) + MATRIX_KEY(0x02, 0x02, BTN_9) + >; + }; + }; -- cgit v1.2.3 From 6e4a5154934f8c7283452651c4d398d34a46e952 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Wed, 10 Sep 2025 18:44:01 -0400 Subject: dt-bindings: touchscreen: resistive-adc-touch: change to unevaluatedProperties Change additionalProperties to unevaluatedProperties because it refs to touchscreen.yaml. Fix below CHECK_DTBS warnings: arch/arm/boot/dts/nxp/imx/imx6dl-skov-revc-lt6.dtb: touchscreen (resistive-adc-touch): 'touchscreen-y-plate-ohms' does not match any of the regexes: '^pinctrl-[0-9]+$' from schema $id: http://devicetree.org/schemas/input/touchscreen/resistive-adc-touch.yaml# Signed-off-by: Frank Li Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250910224402.994046-1-Frank.Li@nxp.com Signed-off-by: Dmitry Torokhov --- .../devicetree/bindings/input/touchscreen/resistive-adc-touch.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/touchscreen/resistive-adc-touch.yaml b/Documentation/devicetree/bindings/input/touchscreen/resistive-adc-touch.yaml index 7fc22a403d48..059d419f6c1c 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/resistive-adc-touch.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/resistive-adc-touch.yaml @@ -55,7 +55,7 @@ properties: touchscreen-min-pressure: true touchscreen-x-plate-ohms: true -additionalProperties: false +unevaluatedProperties: false required: - compatible -- cgit v1.2.3 From 542a495cbaa6dc57a310da62b501fdf318657cad Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Date: Tue, 16 Sep 2025 10:24:25 +0200 Subject: tcp: AccECN core MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This change implements Accurate ECN without negotiation and AccECN Option (that will be added by later changes). Based on AccECN specifications: https://tools.ietf.org/id/draft-ietf-tcpm-accurate-ecn-28.txt Accurate ECN allows feeding back the number of CE (congestion experienced) marks accurately to the sender in contrast to RFC3168 ECN that can only signal one marks-seen-yes/no per RTT. Congestion control algorithms can take advantage of the accurate ECN information to fine-tune their congestion response to avoid drastic rate reduction when only mild congestion is encountered. With Accurate ECN, tp->received_ce (r.cep in AccECN spec) keeps track of how many segments have arrived with a CE mark. Accurate ECN uses ACE field (ECE, CWR, AE) to communicate the value back to the sender which updates tp->delivered_ce (s.cep) based on the feedback. This signalling channel is lossy when ACE field overflow occurs. Conservative strategy is selected here to deal with the ACE overflow, however, some strategies using the AccECN option later in the overall patchset mitigate against false overflows detected. The ACE field values on the wire are offset by TCP_ACCECN_CEP_INIT_OFFSET. Delivered_ce/received_ce count the real CE marks rather than forcing all downstream users to adapt to the wire offset. This patch uses the first 1-byte hole and the last 4-byte hole of the tcp_sock_write_txrx for 'received_ce_pending' and 'received_ce'. Also, the group size of tcp_sock_write_txrx is increased from 91 + 4 to 95 + 4 due to the new u32 received_ce member. Below are the trimmed pahole outcomes before and after this patch. [BEFORE THIS PATCH] struct tcp_sock { [...] __cacheline_group_begin__tcp_sock_write_txrx[0]; /* 2521 0 */ u8 nonagle:4; /* 2521: 0 1 */ u8 rate_app_limited:1; /* 2521: 4 1 */ /* XXX 3 bits hole, try to pack */ /* XXX 2 bytes hole, try to pack */ [...] u32 delivered_ce; /* 2576 4 */ u32 app_limited; /* 2580 4 */ u32 rcv_wnd; /* 2684 4 */ struct tcp_options_received rx_opt; /* 2688 24 */ __cacheline_group_end__tcp_sock_write_txrx[0]; /* 2612 0 */ /* XXX 4 bytes hole, try to pack */ [...] /* size: 3200, cachelines: 50, members: 161 */ } [AFTER THIS PATCH] struct tcp_sock { [...] __cacheline_group_begin__tcp_sock_write_txrx[0]; /* 2521 0 */ u8 nonagle:4; /* 2521: 0 1 */ u8 rate_app_limited:1; /* 2521: 4 1 */ /* XXX 3 bits hole, try to pack */ /* Force alignment to the next boundary: */ u8 :0; u8 received_ce_pending:4;/* 2522: 0 1 */ u8 unused2:4; /* 2522: 4 1 */ /* XXX 1 byte hole, try to pack */ [...] u32 delivered_ce; /* 2576 4 */ u32 received_ce; /* 2580 4 */ u32 app_limited; /* 2584 4 */ u32 rcv_wnd; /* 2588 4 */ struct tcp_options_received rx_opt; /* 2592 24 */ __cacheline_group_end__tcp_sock_write_txrx[0]; /* 2616 0 */ [...] /* size: 3200, cachelines: 50, members: 164 */ } Signed-off-by: Ilpo Järvinen Co-developed-by: Olivier Tilmans Signed-off-by: Olivier Tilmans Co-developed-by: Chia-Yu Chang Signed-off-by: Chia-Yu Chang Reviewed-by: Eric Dumazet Link: https://patch.msgid.link/20250916082434.100722-2-chia-yu.chang@nokia-bell-labs.com Signed-off-by: Paolo Abeni --- Documentation/networking/net_cachelines/tcp_sock.rst | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/net_cachelines/tcp_sock.rst b/Documentation/networking/net_cachelines/tcp_sock.rst index 7bbda5944ee2..31313a9adccc 100644 --- a/Documentation/networking/net_cachelines/tcp_sock.rst +++ b/Documentation/networking/net_cachelines/tcp_sock.rst @@ -101,6 +101,8 @@ u32 prr_delivered u32 prr_out read_mostly read_mostly tcp_rate_skb_sent,tcp_newly_delivered(tx);tcp_ack,tcp_rate_gen,tcp_clean_rtx_queue(rx) u32 delivered read_mostly read_write tcp_rate_skb_sent, tcp_newly_delivered(tx);tcp_ack, tcp_rate_gen, tcp_clean_rtx_queue (rx) u32 delivered_ce read_mostly read_write tcp_rate_skb_sent(tx);tcp_rate_gen(rx) +u32 received_ce read_mostly read_write +u8:4 received_ce_pending read_mostly read_write u32 lost read_mostly tcp_ack u32 app_limited read_write read_mostly tcp_rate_check_app_limited,tcp_rate_skb_sent(tx);tcp_rate_gen(rx) u64 first_tx_mstamp read_write tcp_rate_skb_sent -- cgit v1.2.3 From 3cae34274c79e0c60ccd1c10516973af1aed2a7c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Date: Tue, 16 Sep 2025 10:24:26 +0200 Subject: tcp: accecn: AccECN negotiation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Accurate ECN negotiation parts based on the specification: https://tools.ietf.org/id/draft-ietf-tcpm-accurate-ecn-28.txt Accurate ECN is negotiated using ECE, CWR and AE flags in the TCP header. TCP falls back into using RFC3168 ECN if one of the ends supports only RFC3168-style ECN. The AccECN negotiation includes reflecting IP ECN field value seen in SYN and SYNACK back using the same bits as negotiation to allow responding to SYN CE marks and to detect ECN field mangling. CE marks should not occur currently because SYN=1 segments are sent with Non-ECT in IP ECN field (but proposal exists to remove this restriction). Reflecting SYN IP ECN field in SYNACK is relatively simple. Reflecting SYNACK IP ECN field in the final/third ACK of the handshake is more challenging. Linux TCP code is not well prepared for using the final/third ACK a signalling channel which makes things somewhat complicated here. tcp_ecn sysctl can be used to select the highest ECN variant (Accurate ECN, ECN, No ECN) that is attemped to be negotiated and requested for incoming connection and outgoing connection: TCP_ECN_IN_NOECN_OUT_NOECN, TCP_ECN_IN_ECN_OUT_ECN, TCP_ECN_IN_ECN_OUT_NOECN, TCP_ECN_IN_ACCECN_OUT_ACCECN, TCP_ECN_IN_ACCECN_OUT_ECN, and TCP_ECN_IN_ACCECN_OUT_NOECN. After this patch, the size of tcp_request_sock remains unchanged and no new holes are added. Below are the pahole outcomes before and after this patch: [BEFORE THIS PATCH] struct tcp_request_sock { [...] u32 rcv_nxt; /* 352 4 */ u8 syn_tos; /* 356 1 */ /* size: 360, cachelines: 6, members: 16 */ } [AFTER THIS PATCH] struct tcp_request_sock { [...] u32 rcv_nxt; /* 352 4 */ u8 syn_tos; /* 356 1 */ bool accecn_ok; /* 357 1 */ u8 syn_ect_snt:2; /* 358: 0 1 */ u8 syn_ect_rcv:2; /* 358: 2 1 */ u8 accecn_fail_mode:4; /* 358: 4 1 */ /* size: 360, cachelines: 6, members: 20 */ } After this patch, the size of tcp_sock remains unchanged and no new holes are added. Also, 4 bits of the existing 2-byte hole are exploited. Below are the pahole outcomes before and after this patch: [BEFORE THIS PATCH] struct tcp_sock { [...] u8 dup_ack_counter:2; /* 2761: 0 1 */ u8 tlp_retrans:1; /* 2761: 2 1 */ u8 unused:5; /* 2761: 3 1 */ u8 thin_lto:1; /* 2762: 0 1 */ u8 fastopen_connect:1; /* 2762: 1 1 */ u8 fastopen_no_cookie:1; /* 2762: 2 1 */ u8 fastopen_client_fail:2; /* 2762: 3 1 */ u8 frto:1; /* 2762: 5 1 */ /* XXX 2 bits hole, try to pack */ [...] u8 keepalive_probes; /* 2765 1 */ /* XXX 2 bytes hole, try to pack */ [...] /* size: 3200, cachelines: 50, members: 164 */ } [AFTER THIS PATCH] struct tcp_sock { [...] u8 dup_ack_counter:2; /* 2761: 0 1 */ u8 tlp_retrans:1; /* 2761: 2 1 */ u8 syn_ect_snt:2; /* 2761: 3 1 */ u8 syn_ect_rcv:2; /* 2761: 5 1 */ u8 thin_lto:1; /* 2761: 7 1 */ u8 fastopen_connect:1; /* 2762: 0 1 */ u8 fastopen_no_cookie:1; /* 2762: 1 1 */ u8 fastopen_client_fail:2; /* 2762: 2 1 */ u8 frto:1; /* 2762: 4 1 */ /* XXX 3 bits hole, try to pack */ [...] u8 keepalive_probes; /* 2765 1 */ u8 accecn_fail_mode:4; /* 2766: 0 1 */ /* XXX 4 bits hole, try to pack */ /* XXX 1 byte hole, try to pack */ [...] /* size: 3200, cachelines: 50, members: 166 */ } Signed-off-by: Ilpo Järvinen Co-developed-by: Olivier Tilmans Signed-off-by: Olivier Tilmans Co-developed-by: Chia-Yu Chang Signed-off-by: Chia-Yu Chang Acked-by: Paolo Abeni Reviewed-by: Eric Dumazet Link: https://patch.msgid.link/20250916082434.100722-3-chia-yu.chang@nokia-bell-labs.com Signed-off-by: Paolo Abeni --- Documentation/networking/ip-sysctl.rst | 36 +++++++++++++--------- .../networking/net_cachelines/tcp_sock.rst | 3 ++ 2 files changed, 25 insertions(+), 14 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/ip-sysctl.rst b/Documentation/networking/ip-sysctl.rst index 9f5891c9b07b..3d8eb54b84f9 100644 --- a/Documentation/networking/ip-sysctl.rst +++ b/Documentation/networking/ip-sysctl.rst @@ -443,20 +443,28 @@ tcp_early_retrans - INTEGER tcp_ecn - INTEGER Control use of Explicit Congestion Notification (ECN) by TCP. - ECN is used only when both ends of the TCP connection indicate - support for it. This feature is useful in avoiding losses due - to congestion by allowing supporting routers to signal - congestion before having to drop packets. - - Possible values are: - - = ===================================================== - 0 Disable ECN. Neither initiate nor accept ECN. - 1 Enable ECN when requested by incoming connections and - also request ECN on outgoing connection attempts. - 2 Enable ECN when requested by incoming connections - but do not request ECN on outgoing connections. - = ===================================================== + ECN is used only when both ends of the TCP connection indicate support + for it. This feature is useful in avoiding losses due to congestion by + allowing supporting routers to signal congestion before having to drop + packets. A host that supports ECN both sends ECN at the IP layer and + feeds back ECN at the TCP layer. The highest variant of ECN feedback + that both peers support is chosen by the ECN negotiation (Accurate ECN, + ECN, or no ECN). + + The highest negotiated variant for incoming connection requests + and the highest variant requested by outgoing connection + attempts: + + ===== ==================== ==================== + Value Incoming connections Outgoing connections + ===== ==================== ==================== + 0 No ECN No ECN + 1 ECN ECN + 2 ECN No ECN + 3 AccECN AccECN + 4 AccECN ECN + 5 AccECN No ECN + ===== ==================== ==================== Default: 2 diff --git a/Documentation/networking/net_cachelines/tcp_sock.rst b/Documentation/networking/net_cachelines/tcp_sock.rst index 31313a9adccc..4f71ece7c655 100644 --- a/Documentation/networking/net_cachelines/tcp_sock.rst +++ b/Documentation/networking/net_cachelines/tcp_sock.rst @@ -103,6 +103,9 @@ u32 delivered read_mostly read_w u32 delivered_ce read_mostly read_write tcp_rate_skb_sent(tx);tcp_rate_gen(rx) u32 received_ce read_mostly read_write u8:4 received_ce_pending read_mostly read_write +u8:2 syn_ect_snt write_mostly read_write +u8:2 syn_ect_rcv read_mostly read_write +u8:4 accecn_fail_mode u32 lost read_mostly tcp_ack u32 app_limited read_write read_mostly tcp_rate_check_app_limited,tcp_rate_skb_sent(tx);tcp_rate_gen(rx) u64 first_tx_mstamp read_write tcp_rate_skb_sent -- cgit v1.2.3 From 9a011277445583bab002fbf5043fab0ea03dc5dd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Date: Tue, 16 Sep 2025 10:24:27 +0200 Subject: tcp: accecn: add AccECN rx byte counters MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit These three byte counters track IP ECN field payload byte sums for all arriving (acceptable) packets for ECT0, ECT1, and CE. The AccECN option (added by a later patch in the series) echoes these counters back to sender side; therefore, it is placed within the group of tcp_sock_write_txrx. Below are the pahole outcomes before and after this patch, in which the group size of tcp_sock_write_txrx is increased from 95 + 4 to 107 + 4 and an extra 4-byte hole is created but will be exploited in later patches: [BEFORE THIS PATCH] struct tcp_sock { [...] u32 delivered_ce; /* 2576 4 */ u32 received_ce; /* 2580 4 */ u32 app_limited; /* 2584 4 */ u32 rcv_wnd; /* 2588 4 */ struct tcp_options_received rx_opt; /* 2592 24 */ __cacheline_group_end__tcp_sock_write_txrx[0]; /* 2616 0 */ [...] /* size: 3200, cachelines: 50, members: 166 */ } [AFTER THIS PATCH] struct tcp_sock { [...] u32 delivered_ce; /* 2576 4 */ u32 received_ce; /* 2580 4 */ u32 received_ecn_bytes[3];/* 2584 12 */ u32 app_limited; /* 2596 4 */ u32 rcv_wnd; /* 2600 4 */ struct tcp_options_received rx_opt; /* 2604 24 */ __cacheline_group_end__tcp_sock_write_txrx[0]; /* 2628 0 */ /* XXX 4 bytes hole, try to pack */ [...] /* size: 3200, cachelines: 50, members: 167 */ } Signed-off-by: Ilpo Järvinen Signed-off-by: Neal Cardwell Co-developed-by: Chia-Yu Chang Signed-off-by: Chia-Yu Chang Reviewed-by: Eric Dumazet Link: https://patch.msgid.link/20250916082434.100722-4-chia-yu.chang@nokia-bell-labs.com Signed-off-by: Paolo Abeni --- Documentation/networking/net_cachelines/tcp_sock.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/networking/net_cachelines/tcp_sock.rst b/Documentation/networking/net_cachelines/tcp_sock.rst index 4f71ece7c655..5a2b0af57364 100644 --- a/Documentation/networking/net_cachelines/tcp_sock.rst +++ b/Documentation/networking/net_cachelines/tcp_sock.rst @@ -102,6 +102,7 @@ u32 prr_out read_mostly read_m u32 delivered read_mostly read_write tcp_rate_skb_sent, tcp_newly_delivered(tx);tcp_ack, tcp_rate_gen, tcp_clean_rtx_queue (rx) u32 delivered_ce read_mostly read_write tcp_rate_skb_sent(tx);tcp_rate_gen(rx) u32 received_ce read_mostly read_write +u32[3] received_ecn_bytes read_mostly read_write u8:4 received_ce_pending read_mostly read_write u8:2 syn_ect_snt write_mostly read_write u8:2 syn_ect_rcv read_mostly read_write -- cgit v1.2.3 From b5e74132dfbe60329b3ff0e5c485039f2e31605c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Date: Tue, 16 Sep 2025 10:24:30 +0200 Subject: tcp: accecn: AccECN option MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Accurate ECN allows echoing back the sum of bytes for each IP ECN field value in the received packets using AccECN option. This change implements AccECN option tx & rx side processing without option send control related features that are added by a later change. Based on specification: https://tools.ietf.org/id/draft-ietf-tcpm-accurate-ecn-28.txt (Some features of the spec will be added in the later changes rather than in this one). A full-length AccECN option is always attempted but if it does not fit, the minimum length is selected based on the counters that have changed since the last update. The AccECN option (with 24-bit fields) often ends in odd sizes so the option write code tries to take advantage of some nop used to pad the other TCP options. The delivered_ecn_bytes pairs with received_ecn_bytes similar to how delivered_ce pairs with received_ce. In contrast to ACE field, however, the option is not always available to update delivered_ecn_bytes. For ACK w/o AccECN option, the delivered bytes calculated based on the cumulative ACK+SACK information are assigned to one of the counters using an estimation heuristic to select the most likely ECN byte counter. Any estimation error is corrected when the next AccECN option arrives. It may occur that the heuristic gets too confused when there are enough different byte counter deltas between ACKs with the AccECN option in which case the heuristic just gives up on updating the counters for a while. tcp_ecn_option sysctl can be used to select option sending mode for AccECN: TCP_ECN_OPTION_DISABLED, TCP_ECN_OPTION_MINIMUM, and TCP_ECN_OPTION_FULL. This patch increases the size of tcp_info struct, as there is no existing holes for new u32 variables. Below are the pahole outcomes before and after this patch: [BEFORE THIS PATCH] struct tcp_info { [...] __u32 tcpi_total_rto_time; /* 244 4 */ /* size: 248, cachelines: 4, members: 61 */ } [AFTER THIS PATCH] struct tcp_info { [...] __u32 tcpi_total_rto_time; /* 244 4 */ __u32 tcpi_received_ce; /* 248 4 */ __u32 tcpi_delivered_e1_bytes; /* 252 4 */ __u32 tcpi_delivered_e0_bytes; /* 256 4 */ __u32 tcpi_delivered_ce_bytes; /* 260 4 */ __u32 tcpi_received_e1_bytes; /* 264 4 */ __u32 tcpi_received_e0_bytes; /* 268 4 */ __u32 tcpi_received_ce_bytes; /* 272 4 */ /* size: 280, cachelines: 5, members: 68 */ } This patch uses the existing 1-byte holes in the tcp_sock_write_txrx group for new u8 members, but adds a 4-byte hole in tcp_sock_write_rx group after the new u32 delivered_ecn_bytes[3] member. Therefore, the group size of tcp_sock_write_rx is increased from 96 to 112. Below are the pahole outcomes before and after this patch: [BEFORE THIS PATCH] struct tcp_sock { [...] u8 received_ce_pending:4; /* 2522: 0 1 */ u8 unused2:4; /* 2522: 4 1 */ /* XXX 1 byte hole, try to pack */ [...] u32 rcv_rtt_last_tsecr; /* 2668 4 */ [...] __cacheline_group_end__tcp_sock_write_rx[0]; /* 2728 0 */ [...] /* size: 3200, cachelines: 50, members: 167 */ } [AFTER THIS PATCH] struct tcp_sock { [...] u8 received_ce_pending:4;/* 2522: 0 1 */ u8 unused2:4; /* 2522: 4 1 */ u8 accecn_minlen:2; /* 2523: 0 1 */ u8 est_ecnfield:2; /* 2523: 2 1 */ u8 unused3:4; /* 2523: 4 1 */ [...] u32 rcv_rtt_last_tsecr; /* 2668 4 */ u32 delivered_ecn_bytes[3];/* 2672 12 */ /* XXX 4 bytes hole, try to pack */ [...] __cacheline_group_end__tcp_sock_write_rx[0]; /* 2744 0 */ [...] /* size: 3200, cachelines: 50, members: 171 */ } Signed-off-by: Ilpo Järvinen Signed-off-by: Neal Cardwell Co-developed-by: Chia-Yu Chang Signed-off-by: Chia-Yu Chang Reviewed-by: Eric Dumazet Link: https://patch.msgid.link/20250916082434.100722-7-chia-yu.chang@nokia-bell-labs.com Signed-off-by: Paolo Abeni --- Documentation/networking/ip-sysctl.rst | 19 +++++++++++++++++++ Documentation/networking/net_cachelines/tcp_sock.rst | 3 +++ 2 files changed, 22 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/ip-sysctl.rst b/Documentation/networking/ip-sysctl.rst index 3d8eb54b84f9..1c206501b973 100644 --- a/Documentation/networking/ip-sysctl.rst +++ b/Documentation/networking/ip-sysctl.rst @@ -468,6 +468,25 @@ tcp_ecn - INTEGER Default: 2 +tcp_ecn_option - INTEGER + Control Accurate ECN (AccECN) option sending when AccECN has been + successfully negotiated during handshake. Send logic inhibits + sending AccECN options regarless of this setting when no AccECN + option has been seen for the reverse direction. + + Possible values are: + + = ============================================================ + 0 Never send AccECN option. This also disables sending AccECN + option in SYN/ACK during handshake. + 1 Send AccECN option sparingly according to the minimum option + rules outlined in draft-ietf-tcpm-accurate-ecn. + 2 Send AccECN option on every packet whenever it fits into TCP + option space. + = ============================================================ + + Default: 2 + tcp_ecn_fallback - BOOLEAN If the kernel detects that ECN connection misbehaves, enable fall back to non-ECN. Currently, this knob implements the fallback diff --git a/Documentation/networking/net_cachelines/tcp_sock.rst b/Documentation/networking/net_cachelines/tcp_sock.rst index 5a2b0af57364..b941151f8c0a 100644 --- a/Documentation/networking/net_cachelines/tcp_sock.rst +++ b/Documentation/networking/net_cachelines/tcp_sock.rst @@ -104,8 +104,11 @@ u32 delivered_ce read_mostly read_w u32 received_ce read_mostly read_write u32[3] received_ecn_bytes read_mostly read_write u8:4 received_ce_pending read_mostly read_write +u32[3] delivered_ecn_bytes read_write u8:2 syn_ect_snt write_mostly read_write u8:2 syn_ect_rcv read_mostly read_write +u8:2 accecn_minlen write_mostly read_write +u8:2 est_ecnfield read_write u8:4 accecn_fail_mode u32 lost read_mostly tcp_ack u32 app_limited read_write read_mostly tcp_rate_check_app_limited,tcp_rate_skb_sent(tx);tcp_rate_gen(rx) -- cgit v1.2.3 From aa55a7dde7ec506bb23448a5005ae3f4f809d022 Mon Sep 17 00:00:00 2001 From: Chia-Yu Chang Date: Tue, 16 Sep 2025 10:24:31 +0200 Subject: tcp: accecn: AccECN option send control MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of sending the option in every ACK, limit sending to those ACKs where the option is necessary: - Handshake - "Change-triggered ACK" + the ACK following it. The 2nd ACK is necessary to unambiguously indicate which of the ECN byte counters in increasing. The first ACK has two counters increasing due to the ecnfield edge. - ACKs with CE to allow CEP delta validations to take advantage of the option. - Force option to be sent every at least once per 2^22 bytes. The check is done using the bit edges of the byte counters (avoids need for extra variables). - AccECN option beacon to send a few times per RTT even if nothing in the ECN state requires that. The default is 3 times per RTT, and its period can be set via sysctl_tcp_ecn_option_beacon. Below are the pahole outcomes before and after this patch, in which the group size of tcp_sock_write_tx is increased from 89 to 97 due to the new u64 accecn_opt_tstamp member: [BEFORE THIS PATCH] struct tcp_sock { [...] u64 tcp_wstamp_ns; /* 2488 8 */ struct list_head tsorted_sent_queue; /* 2496 16 */ [...] __cacheline_group_end__tcp_sock_write_tx[0]; /* 2521 0 */ __cacheline_group_begin__tcp_sock_write_txrx[0]; /* 2521 0 */ u8 nonagle:4; /* 2521: 0 1 */ u8 rate_app_limited:1; /* 2521: 4 1 */ /* XXX 3 bits hole, try to pack */ /* Force alignment to the next boundary: */ u8 :0; u8 received_ce_pending:4;/* 2522: 0 1 */ u8 unused2:4; /* 2522: 4 1 */ u8 accecn_minlen:2; /* 2523: 0 1 */ u8 est_ecnfield:2; /* 2523: 2 1 */ u8 unused3:4; /* 2523: 4 1 */ [...] __cacheline_group_end__tcp_sock_write_txrx[0]; /* 2628 0 */ [...] /* size: 3200, cachelines: 50, members: 171 */ } [AFTER THIS PATCH] struct tcp_sock { [...] u64 tcp_wstamp_ns; /* 2488 8 */ u64 accecn_opt_tstamp; /* 2596 8 */ struct list_head tsorted_sent_queue; /* 2504 16 */ [...] __cacheline_group_end__tcp_sock_write_tx[0]; /* 2529 0 */ __cacheline_group_begin__tcp_sock_write_txrx[0]; /* 2529 0 */ u8 nonagle:4; /* 2529: 0 1 */ u8 rate_app_limited:1; /* 2529: 4 1 */ /* XXX 3 bits hole, try to pack */ /* Force alignment to the next boundary: */ u8 :0; u8 received_ce_pending:4;/* 2530: 0 1 */ u8 unused2:4; /* 2530: 4 1 */ u8 accecn_minlen:2; /* 2531: 0 1 */ u8 est_ecnfield:2; /* 2531: 2 1 */ u8 accecn_opt_demand:2; /* 2531: 4 1 */ u8 prev_ecnfield:2; /* 2531: 6 1 */ [...] __cacheline_group_end__tcp_sock_write_txrx[0]; /* 2636 0 */ [...] /* size: 3200, cachelines: 50, members: 173 */ } Signed-off-by: Chia-Yu Chang Co-developed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen Reviewed-by: Eric Dumazet Link: https://patch.msgid.link/20250916082434.100722-8-chia-yu.chang@nokia-bell-labs.com Signed-off-by: Paolo Abeni --- Documentation/networking/ip-sysctl.rst | 6 ++++++ Documentation/networking/net_cachelines/tcp_sock.rst | 3 +++ 2 files changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/ip-sysctl.rst b/Documentation/networking/ip-sysctl.rst index 1c206501b973..a06cb99d66dc 100644 --- a/Documentation/networking/ip-sysctl.rst +++ b/Documentation/networking/ip-sysctl.rst @@ -487,6 +487,12 @@ tcp_ecn_option - INTEGER Default: 2 +tcp_ecn_option_beacon - INTEGER + Control Accurate ECN (AccECN) option sending frequency per RTT and it + takes effect only when tcp_ecn_option is set to 2. + + Default: 3 (AccECN will be send at least 3 times per RTT) + tcp_ecn_fallback - BOOLEAN If the kernel detects that ECN connection misbehaves, enable fall back to non-ECN. Currently, this knob implements the fallback diff --git a/Documentation/networking/net_cachelines/tcp_sock.rst b/Documentation/networking/net_cachelines/tcp_sock.rst index b941151f8c0a..d4dc01800945 100644 --- a/Documentation/networking/net_cachelines/tcp_sock.rst +++ b/Documentation/networking/net_cachelines/tcp_sock.rst @@ -109,6 +109,9 @@ u8:2 syn_ect_snt write_mostly read_w u8:2 syn_ect_rcv read_mostly read_write u8:2 accecn_minlen write_mostly read_write u8:2 est_ecnfield read_write +u8:2 accecn_opt_demand read_mostly read_write +u8:2 prev_ecnfield read_write +u64 accecn_opt_tstamp read_write u8:4 accecn_fail_mode u32 lost read_mostly tcp_ack u32 app_limited read_write read_mostly tcp_rate_check_app_limited,tcp_rate_skb_sent(tx);tcp_rate_gen(rx) -- cgit v1.2.3 From 28f94ed138c347504c1b1b94291da8a9a398e0d7 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Sun, 14 Sep 2025 21:38:44 +0200 Subject: dt-bindings: arm: apple: Add t6020x compatibles This adds the following apple,t6020/t6021/t6022 platforms: - apple,j414s - MacBook Pro (14-inch, M2 Pro, 2023) - apple,j414c - MacBook Pro (14-inch, M2 Nax, 2023) - apple,j416s - MacBook Pro (16-inch, M2 Pro, 2023) - apple,j416c - MacBook Pro (16-inch, M2 Max, 2023) - apple,j474s - Mac mini (M2 Pro, 2023) - apple,j475c - Mac Studio (M2 Max, 2023) - apple,j475d - Mac Studio (M2 Ultra, 2023) - apple,j475d - Mac Pro (M2 Ultra, 2023) Acked-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) Reviewed-by: Neal Gompa Signed-off-by: Janne Grunau Reviewed-by: Sven Peter Signed-off-by: Sven Peter --- Documentation/devicetree/bindings/arm/apple.yaml | 39 +++++++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentation/devicetree/bindings/arm/apple.yaml index 7073535b7c5b..5c2629ec3d4c 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -96,7 +96,7 @@ description: | - MacBook Pro (13-inch, M2, 2022) - Mac mini (M2, 2023) - And devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs: + Devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs: - MacBook Pro (14-inch, M1 Pro, 2021) - MacBook Pro (14-inch, M1 Max, 2021) @@ -105,6 +105,17 @@ description: | - Mac Studio (M1 Max, 2022) - Mac Studio (M1 Ultra, 2022) + Devices based on the "M2 Pro", "M2 Max" and "M2 Ultra" SoCs: + + - MacBook Pro (14-inch, M2 Pro, 2023) + - MacBook Pro (14-inch, M2 Max, 2023) + - MacBook Pro (16-inch, M2 Pro, 2023) + - MacBook Pro (16-inch, M2 Max, 2023) + - Mac mini (M2 Pro, 2023) + - Mac Studio (M2 Max, 2023) + - Mac Studio (M2 Ultra, 2023) + - Mac Pro (M2 Ultra, 2023) + The compatible property should follow this format: compatible = "apple,", "apple,", "apple,arm-platform"; @@ -310,6 +321,32 @@ properties: - const: apple,t6002 - const: apple,arm-platform + - description: Apple M2 Pro SoC based platforms + items: + - enum: + - apple,j414s # MacBook Pro (14-inch, M2 Pro, 2023) + - apple,j416s # MacBook Pro (16-inch, M2 Pro, 2023) + - apple,j474s # Mac mini (M2 Pro, 2023) + - const: apple,t6020 + - const: apple,arm-platform + + - description: Apple M2 Max SoC based platforms + items: + - enum: + - apple,j414c # MacBook Pro (14-inch, M2 Max, 2023) + - apple,j416c # MacBook Pro (16-inch, M2 Max, 2023) + - apple,j475c # Mac Studio (M2 Max, 2023) + - const: apple,t6021 + - const: apple,arm-platform + + - description: Apple M2 Ultra SoC based platforms + items: + - enum: + - apple,j180d # Mac Pro (M2 Ultra, 2023) + - apple,j475d # Mac Studio (M2 Ultra, 2023) + - const: apple,t6022 + - const: apple,arm-platform + additionalProperties: true ... -- cgit v1.2.3 From 005a54722e9d493be58405a77f2a444e06f03be0 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 16 Sep 2025 16:14:18 -0700 Subject: eth: fbnic: add FW health reporter Add a health reporter to catch FW crashes. Dumping the reporter if FW has not crashed will create a snapshot of FW memory. Reviewed-by: Lee Trager Reviewed-by: Simon Horman Signed-off-by: Jakub Kicinski Link: https://patch.msgid.link/20250916231420.1693955-8-kuba@kernel.org Signed-off-by: Paolo Abeni --- .../networking/device_drivers/ethernet/meta/fbnic.rst | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst index fb6559fa4be4..62693566ff1f 100644 --- a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst +++ b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst @@ -69,6 +69,16 @@ On host boot the latest UEFI driver is always used, no explicit activation is required. Firmware activation is required to run new control firmware. cmrt firmware can only be activated by power cycling the NIC. +Health reporters +---------------- + +fw reporter +~~~~~~~~~~~ + +The ``fw`` health reporter tracks FW crashes. Dumping the reporter will +show the core dump of the most recent FW crash, and if no FW crash has +happened since power cycle - a snapshot of the FW memory. + Statistics ---------- -- cgit v1.2.3 From 6da8344f92dfc607069ed10ed5ba76b61e612691 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 16 Sep 2025 16:14:19 -0700 Subject: eth: fbnic: report FW uptime in health diagnose FW crashes are detected based on uptime going back, expose the uptime via devlink health diagnose. $ devlink -j health diagnose pci/0000:01:00.0 reporter fw {"last_heartbeat":{"fw_uptime":{"sec":201,"msec":76}}} $ devlink -j health diagnose pci/0000:01:00.0 reporter fw last_heartbeat: fw_uptime: sec: 201 msec: 76 Reviewed-by: Lee Trager Signed-off-by: Jakub Kicinski Reviewed-by: Simon Horman Link: https://patch.msgid.link/20250916231420.1693955-9-kuba@kernel.org Signed-off-by: Paolo Abeni --- Documentation/networking/device_drivers/ethernet/meta/fbnic.rst | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst index 62693566ff1f..8b7ae9975bf7 100644 --- a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst +++ b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst @@ -77,7 +77,9 @@ fw reporter The ``fw`` health reporter tracks FW crashes. Dumping the reporter will show the core dump of the most recent FW crash, and if no FW crash has -happened since power cycle - a snapshot of the FW memory. +happened since power cycle - a snapshot of the FW memory. Diagnose callback +shows FW uptime based on the most recently received heartbeat message +(the crashes are detected by checking if uptime goes down). Statistics ---------- -- cgit v1.2.3 From e6afcd60c26fca227c700825a94020209970c05e Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 16 Sep 2025 16:14:20 -0700 Subject: eth: fbnic: add OTP health reporter OTP memory ("fuses") are used for secure boot and anti-rollback protection. The OTP memory is ECC protected. Check for its health periodically to notice when the chip is starting to go bad. Signed-off-by: Jakub Kicinski Reviewed-by: Simon Horman Link: https://patch.msgid.link/20250916231420.1693955-10-kuba@kernel.org Signed-off-by: Paolo Abeni --- Documentation/networking/device_drivers/ethernet/meta/fbnic.rst | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst index 8b7ae9975bf7..1e82f90d9ad2 100644 --- a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst +++ b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst @@ -81,6 +81,13 @@ happened since power cycle - a snapshot of the FW memory. Diagnose callback shows FW uptime based on the most recently received heartbeat message (the crashes are detected by checking if uptime goes down). +otp reporter +~~~~~~~~~~~~ + +OTP memory ("fuses") are used for secure boot and anti-rollback +protection. The OTP memory is ECC protected, ECC errors indicate +either manufacturing defect or part deteriorating with age. + Statistics ---------- -- cgit v1.2.3 From a9266275fd7b309067fd132982035270fee6dc06 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 16 Sep 2025 17:09:28 -0700 Subject: psp: add documentation Add documentation of things which belong in the docs rather than commit messages. Reviewed-by: Willem de Bruijn Signed-off-by: Jakub Kicinski Signed-off-by: Daniel Zahka Reviewed-by: Eric Dumazet Link: https://patch.msgid.link/20250917000954.859376-2-daniel.zahka@gmail.com Signed-off-by: Paolo Abeni --- Documentation/networking/index.rst | 1 + Documentation/networking/psp.rst | 183 +++++++++++++++++++++++++++++++++++++ 2 files changed, 184 insertions(+) create mode 100644 Documentation/networking/psp.rst (limited to 'Documentation') diff --git a/Documentation/networking/index.rst b/Documentation/networking/index.rst index b7a4969e9bc9..c775cababc8c 100644 --- a/Documentation/networking/index.rst +++ b/Documentation/networking/index.rst @@ -101,6 +101,7 @@ Contents: ppp_generic proc_net_tcp pse-pd/index + psp radiotap-headers rds regulatory diff --git a/Documentation/networking/psp.rst b/Documentation/networking/psp.rst new file mode 100644 index 000000000000..4ac09e64e95a --- /dev/null +++ b/Documentation/networking/psp.rst @@ -0,0 +1,183 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +===================== +PSP Security Protocol +===================== + +Protocol +======== + +PSP Security Protocol (PSP) was defined at Google and published in: + +https://raw.githubusercontent.com/google/psp/main/doc/PSP_Arch_Spec.pdf + +This section briefly covers protocol aspects crucial for understanding +the kernel API. Refer to the protocol specification for further details. + +Note that the kernel implementation and documentation uses the term +"device key" in place of "master key", it is both less confusing +to an average developer and is less likely to run afoul any naming +guidelines. + +Derived Rx keys +--------------- + +PSP borrows some terms and mechanisms from IPsec. PSP was designed +with HW offloads in mind. The key feature of PSP is that Rx keys for every +connection do not have to be stored by the receiver but can be derived +from device key and information present in packet headers. +This makes it possible to implement receivers which require a constant +amount of memory regardless of the number of connections (``O(1)`` scaling). + +Tx keys have to be stored like with any other protocol, but Tx is much +less latency sensitive than Rx, and delays in fetching keys from slow +memory is less likely to cause packet drops. Preferably, the Tx keys +should be provided with the packet (e.g. as part of the descriptors). + +Key rotation +------------ + +The device key known only to the receiver is fundamental to the design. +Per specification this state cannot be directly accessible (it must be +impossible to read it out of the hardware of the receiver NIC). +Moreover, it has to be "rotated" periodically (usually daily). Rotation +means that new device key gets generated (by a random number generator +of the device), and used for all new connections. To avoid disrupting +old connections the old device key remains in the NIC. A phase bit +carried in the packet headers indicates which generation of device key +the packet has been encrypted with. + +User facing API +=============== + +PSP is designed primarily for hardware offloads. There is currently +no software fallback for systems which do not have PSP capable NICs. +There is also no standard (or otherwise defined) way of establishing +a PSP-secured connection or exchanging the symmetric keys. + +The expectation is that higher layer protocols will take care of +protocol and key negotiation. For example one may use TLS key exchange, +announce the PSP capability, and switch to PSP if both endpoints +are PSP-capable. + +All configuration of PSP is performed via the PSP netlink family. + +Device discovery +---------------- + +The PSP netlink family defines operations to retrieve information +about the PSP devices available on the system, configure them and +access PSP related statistics. + +Securing a connection +--------------------- + +PSP encryption is currently only supported for TCP connections. +Rx and Tx keys are allocated separately. First the ``rx-assoc`` +Netlink command needs to be issued, specifying a target TCP socket. +Kernel will allocate a new PSP Rx key from the NIC and associate it +with given socket. At this stage socket will accept both PSP-secured +and plain text TCP packets. + +Tx keys are installed using the ``tx-assoc`` Netlink command. +Once the Tx keys are installed, all data read from the socket will +be PSP-secured. In other words act of installing Tx keys has a secondary +effect on the Rx direction. + +There is an intermediate period after ``tx-assoc`` successfully +returns and before the TCP socket encounters it's first PSP +authenticated packet, where the TCP stack will allow certain nondata +packets, i.e. ACKs, FINs, and RSTs, to enter TCP receive processing +even if not PSP authenticated. During the ``tx-assoc`` call, the TCP +socket's ``rcv_nxt`` field is recorded. At this point, ACKs and RSTs +will be accepted with any sequence number, while FINs will only be +accepted at the latched value of ``rcv_nxt``. Once the TCP stack +encounters the first TCP packet containing PSP authenticated data, the +other end of the connection must have executed the ``tx-assoc`` +command, so any TCP packet, including those without data, will be +dropped before receive processing if it is not successfully +authenticated. This is summarized in the table below. The +aforementioned state of rejecting all non-PSP packets is labeled "PSP +Full". + ++----------------+------------+------------+-------------+-------------+ +| Event | Normal TCP | Rx PSP | Tx PSP | PSP Full | ++================+============+============+=============+=============+ +| Rx plain | accept | accept | drop | drop | +| (data) | | | | | ++----------------+------------+------------+-------------+-------------+ +| Rx plain | accept | accept | accept | drop | +| (ACK|FIN|RST) | | | | | ++----------------+------------+------------+-------------+-------------+ +| Rx PSP (good) | drop | accept | accept | accept | ++----------------+------------+------------+-------------+-------------+ +| Rx PSP (bad | drop | drop | drop | drop | +| crypt, !=SPI) | | | | | ++----------------+------------+------------+-------------+-------------+ +| Tx | plain text | plain text | encrypted | encrypted | +| | | | (excl. rtx) | (excl. rtx) | ++----------------+------------+------------+-------------+-------------+ + +To ensure that any data read from the socket after the ``tx-assoc`` +call returns success has been authenticated, the kernel will scan the +receive and ofo queues of the socket at ``tx-assoc`` time. If any +enqueued packet was received in clear text, the Tx association will +fail, and the application should retry installing the Tx key after +draining the socket (this should not be necessary if both endpoints +are well behaved). + +Because TCP sequence numbers are not integrity protected prior to +upgrading to PSP, it is possible that a MITM could offset sequence +numbers in a way that deletes a prefix of the PSP protected part of +the TCP stream. If userspace cares to mitigate this type of attack, a +special "start of PSP" message should be exchanged after ``tx-assoc``. + +Rotation notifications +---------------------- + +The rotations of device key happen asynchronously and are usually +performed by management daemons, not under application control. +The PSP netlink family will generate a notification whenever keys +are rotated. The applications are expected to re-establish connections +before keys are rotated again. + +Kernel implementation +===================== + +Driver notes +------------ + +Drivers are expected to start with no PSP enabled (``psp-versions-ena`` +in ``dev-get`` set to ``0``) whenever possible. The user space should +not depend on this behavior, as future extension may necessitate creation +of devices with PSP already enabled, nonetheless drivers should not enable +PSP by default. Enabling PSP should be the responsibility of the system +component which also takes care of key rotation. + +Note that ``psp-versions-ena`` is expected to be used only for enabling +receive processing. The device is not expected to reject transmit requests +after ``psp-versions-ena`` has been disabled. User may also disable +``psp-versions-ena`` while there are active associations, which will +break all PSP Rx processing. + +Drivers are expected to ensure that a device key is usable and secure +upon init, without explicit key rotation by the user space. It must be +possible to allocate working keys, and that no duplicate keys must be +generated. If the device allows the host to request the key for an +arbitrary SPI - driver should discard both device keys (rotate the +device key twice), to avoid potentially using a SPI+key which previous +OS instance already had access to. + +Drivers must use ``psp_skb_get_assoc_rcu()`` to check if PSP Tx offload +was requested for given skb. On Rx drivers should allocate and populate +the ``SKB_EXT_PSP`` skb extension, and set the skb->decrypted bit to 1. + +Kernel implementation notes +--------------------------- + +PSP implementation follows the TLS offload more closely than the IPsec +offload, with per-socket state, and the use of skb->decrypted to prevent +clear text leaks. + +PSP device is separate from netdev, to make it possible to "delegate" +PSP offload capabilities to software devices (e.g. ``veth``). -- cgit v1.2.3 From 00c94ca2b99e6610e483f92e531b319eeaed94aa Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 16 Sep 2025 17:09:29 -0700 Subject: psp: base PSP device support Add a netlink family for PSP and allow drivers to register support. The "PSP device" is its own object. This allows us to perform more flexible reference counting / lifetime control than if PSP information was part of net_device. In the future we should also be able to "delegate" PSP access to software devices, such as *vlan, veth or netkit more easily. Reviewed-by: Willem de Bruijn Signed-off-by: Jakub Kicinski Signed-off-by: Daniel Zahka Reviewed-by: Eric Dumazet Link: https://patch.msgid.link/20250917000954.859376-3-daniel.zahka@gmail.com Signed-off-by: Paolo Abeni --- Documentation/netlink/specs/psp.yaml | 96 ++++++++++++++++++++++++++++++++++++ 1 file changed, 96 insertions(+) create mode 100644 Documentation/netlink/specs/psp.yaml (limited to 'Documentation') diff --git a/Documentation/netlink/specs/psp.yaml b/Documentation/netlink/specs/psp.yaml new file mode 100644 index 000000000000..706f4baf8764 --- /dev/null +++ b/Documentation/netlink/specs/psp.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) +--- +name: psp + +doc: + PSP Security Protocol Generic Netlink family. + +definitions: + - + type: enum + name: version + entries: [hdr0-aes-gcm-128, hdr0-aes-gcm-256, + hdr0-aes-gmac-128, hdr0-aes-gmac-256] + +attribute-sets: + - + name: dev + attributes: + - + name: id + doc: PSP device ID. + type: u32 + checks: + min: 1 + - + name: ifindex + doc: ifindex of the main netdevice linked to the PSP device. + type: u32 + - + name: psp-versions-cap + doc: Bitmask of PSP versions supported by the device. + type: u32 + enum: version + enum-as-flags: true + - + name: psp-versions-ena + doc: Bitmask of currently enabled (accepted on Rx) PSP versions. + type: u32 + enum: version + enum-as-flags: true + +operations: + list: + - + name: dev-get + doc: Get / dump information about PSP capable devices on the system. + attribute-set: dev + do: + request: + attributes: + - id + reply: &dev-all + attributes: + - id + - ifindex + - psp-versions-cap + - psp-versions-ena + pre: psp-device-get-locked + post: psp-device-unlock + dump: + reply: *dev-all + - + name: dev-add-ntf + doc: Notification about device appearing. + notify: dev-get + mcgrp: mgmt + - + name: dev-del-ntf + doc: Notification about device disappearing. + notify: dev-get + mcgrp: mgmt + - + name: dev-set + doc: Set the configuration of a PSP device. + attribute-set: dev + do: + request: + attributes: + - id + - psp-versions-ena + reply: + attributes: [] + pre: psp-device-get-locked + post: psp-device-unlock + - + name: dev-change-ntf + doc: Notification about device configuration being changed. + notify: dev-get + mcgrp: mgmt + +mcast-groups: + list: + - + name: mgmt + +... -- cgit v1.2.3 From 117f02a49b7719b210d154a0d0e728001bf4af06 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 16 Sep 2025 17:09:32 -0700 Subject: psp: add op for rotation of device key Rotating the device key is a key part of the PSP protocol design. Some external daemon needs to do it once a day, or so. Add a netlink op to perform this operation. Add a notification group for informing users that key has been rotated and they should rekey (next rotation will cut them off). Reviewed-by: Willem de Bruijn Signed-off-by: Jakub Kicinski Signed-off-by: Daniel Zahka Reviewed-by: Eric Dumazet Link: https://patch.msgid.link/20250917000954.859376-6-daniel.zahka@gmail.com Signed-off-by: Paolo Abeni --- Documentation/netlink/specs/psp.yaml | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/psp.yaml b/Documentation/netlink/specs/psp.yaml index 706f4baf8764..054cc02b65ad 100644 --- a/Documentation/netlink/specs/psp.yaml +++ b/Documentation/netlink/specs/psp.yaml @@ -88,9 +88,30 @@ operations: notify: dev-get mcgrp: mgmt + - + name: key-rotate + doc: Rotate the device key. + attribute-set: dev + do: + request: + attributes: + - id + reply: + attributes: + - id + pre: psp-device-get-locked + post: psp-device-unlock + - + name: key-rotate-ntf + doc: Notification about device key getting rotated. + notify: key-rotate + mcgrp: use + mcast-groups: list: - name: mgmt + - + name: use ... -- cgit v1.2.3 From 6b46ca260e2290e3453d1355ab5b6d283d73d780 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 16 Sep 2025 17:09:35 -0700 Subject: net: psp: add socket security association code Add the ability to install PSP Rx and Tx crypto keys on TCP connections. Netlink ops are provided for both operations. Rx side combines allocating a new Rx key and installing it on the socket. Theoretically these are separate actions, but in practice they will always be used one after the other. We can add distinct "alloc" and "install" ops later. Reviewed-by: Willem de Bruijn Signed-off-by: Jakub Kicinski Co-developed-by: Daniel Zahka Signed-off-by: Daniel Zahka Reviewed-by: Eric Dumazet Link: https://patch.msgid.link/20250917000954.859376-9-daniel.zahka@gmail.com Signed-off-by: Paolo Abeni --- Documentation/netlink/specs/psp.yaml | 70 ++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/psp.yaml b/Documentation/netlink/specs/psp.yaml index 054cc02b65ad..944429e5c9a8 100644 --- a/Documentation/netlink/specs/psp.yaml +++ b/Documentation/netlink/specs/psp.yaml @@ -38,6 +38,44 @@ attribute-sets: type: u32 enum: version enum-as-flags: true + - + name: assoc + attributes: + - + name: dev-id + doc: PSP device ID. + type: u32 + checks: + min: 1 + - + name: version + doc: | + PSP versions (AEAD and protocol version) used by this association, + dictates the size of the key. + type: u32 + enum: version + - + name: rx-key + type: nest + nested-attributes: keys + - + name: tx-key + type: nest + nested-attributes: keys + - + name: sock-fd + doc: Sockets which should be bound to the association immediately. + type: u32 + - + name: keys + attributes: + - + name: key + type: binary + - + name: spi + doc: Security Parameters Index (SPI) of the association. + type: u32 operations: list: @@ -107,6 +145,38 @@ operations: notify: key-rotate mcgrp: use + - + name: rx-assoc + doc: Allocate a new Rx key + SPI pair, associate it with a socket. + attribute-set: assoc + do: + request: + attributes: + - dev-id + - version + - sock-fd + reply: + attributes: + - dev-id + - rx-key + pre: psp-assoc-device-get-locked + post: psp-device-unlock + - + name: tx-assoc + doc: Add a PSP Tx association. + attribute-set: assoc + do: + request: + attributes: + - dev-id + - version + - tx-key + - sock-fd + reply: + attributes: [] + pre: psp-assoc-device-get-locked + post: psp-device-unlock + mcast-groups: list: - -- cgit v1.2.3 From f8cc02321bfca71967db1620d684aa3abab59612 Mon Sep 17 00:00:00 2001 From: Xu Yang Date: Thu, 21 Aug 2025 19:01:49 +0800 Subject: dt-bindings: perf: fsl-imx-ddr: Add a compatible string fsl,imx94-ddr-pmu for i.MX94 i.MX94 has a DDR Performance Monitor Unit which is compatible with i.MX93. This will add a compatible for i.MX94. Reviewed-by: Peng Fan Reviewed-by: Frank Li Acked-by: Conor Dooley Signed-off-by: Xu Yang Signed-off-by: Will Deacon --- Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml index 8597ea625edb..d2e578d6b83b 100644 --- a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml +++ b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml @@ -33,6 +33,7 @@ properties: - items: - enum: - fsl,imx91-ddr-pmu + - fsl,imx94-ddr-pmu - fsl,imx95-ddr-pmu - const: fsl,imx93-ddr-pmu -- cgit v1.2.3 From 71396cfac97d0249fa7d8dcc8e649b6ba4c090e4 Mon Sep 17 00:00:00 2001 From: Ilkka Koskinen Date: Thu, 28 Aug 2025 15:35:19 -0700 Subject: perf/dwc_pcie: Support counting multiple lane events in parallel While Designware PCIe PMU allows to count only one time based event at a time, it allows to count all the lane events simultaneously. After the patch one is able to count a group of lane events: $ perf stat -e '{dwc_rootport/tx_memory_write,lane=1/,dwc_rootport/rx_memory_read,lane=0/}' dd if=/dev/nvme0n1 of=/dev/null bs=1M count=1 Earlier the events wouldn't have been counted successfully. Signed-off-by: Ilkka Koskinen Signed-off-by: Will Deacon --- Documentation/admin-guide/perf/dwc_pcie_pmu.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/perf/dwc_pcie_pmu.rst b/Documentation/admin-guide/perf/dwc_pcie_pmu.rst index cb376f335f40..167f9281fbf5 100644 --- a/Documentation/admin-guide/perf/dwc_pcie_pmu.rst +++ b/Documentation/admin-guide/perf/dwc_pcie_pmu.rst @@ -16,8 +16,8 @@ provides the following two features: - one 64-bit counter for Time Based Analysis (RX/TX data throughput and time spent in each low-power LTSSM state) and -- one 32-bit counter for Event Counting (error and non-error events for - a specified lane) +- one 32-bit counter per event for Event Counting (error and non-error + events for a specified lane) Note: There is no interrupt for counter overflow. -- cgit v1.2.3 From 00d7a1af5ab58d89c2f0af27485b2d710c862dfc Mon Sep 17 00:00:00 2001 From: James Clark Date: Mon, 1 Sep 2025 13:40:35 +0100 Subject: arm64/boot: Enable EL2 requirements for SPE_FEAT_FDS SPE data source filtering (optional from Armv8.8) requires that traps to the filter register PMSDSFR be disabled. Document the requirements and disable the traps if the feature is present. Tested-by: Leo Yan Reviewed-by: Leo Yan Signed-off-by: James Clark Signed-off-by: Will Deacon --- Documentation/arch/arm64/booting.rst | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'Documentation') diff --git a/Documentation/arch/arm64/booting.rst b/Documentation/arch/arm64/booting.rst index 2f666a7c303c..e4f953839f71 100644 --- a/Documentation/arch/arm64/booting.rst +++ b/Documentation/arch/arm64/booting.rst @@ -466,6 +466,17 @@ Before jumping into the kernel, the following conditions must be met: - HDFGWTR2_EL2.nPMICFILTR_EL0 (bit 3) must be initialised to 0b1. - HDFGWTR2_EL2.nPMUACR_EL1 (bit 4) must be initialised to 0b1. + For CPUs with SPE data source filtering (FEAT_SPE_FDS): + + - If EL3 is present: + + - MDCR_EL3.EnPMS3 (bit 42) must be initialised to 0b1. + + - If the kernel is entered at EL1 and EL2 is present: + + - HDFGRTR2_EL2.nPMSDSFR_EL1 (bit 19) must be initialised to 0b1. + - HDFGWTR2_EL2.nPMSDSFR_EL1 (bit 19) must be initialised to 0b1. + For CPUs with Memory Copy and Memory Set instructions (FEAT_MOPS): - If the kernel is entered at EL1 and EL2 is present: -- cgit v1.2.3 From e31c0eb10388e2af0502b77e61453efbc8a4f974 Mon Sep 17 00:00:00 2001 From: Yicong Yang Date: Thu, 14 Aug 2025 17:16:20 +0800 Subject: drivers/perf: hisi: Add support for HiSilicon NoC PMU Adds the support for HiSilicon NoC (Network on Chip) PMU which will be used to monitor the events on the system bus. The PMU device will be named after the SCL ID (either Super CPU cluster or Super IO cluster) and the index ID, just similar to other HiSilicon Uncore PMUs. Below PMU formats are provided besides the event: - ch: the transaction channel (data, request, response, etc) which can be used to filter the counting. - tt_en: tracetag filtering enable. Just as other HiSilicon Uncore PMUs the NoC PMU supports only counting the transactions with tracetag. The NoC PMU doesn't have an interrupt to indicate the overflow. However we have a 64 bit counter which is large enough and it's nearly impossible to overflow. Reviewed-by: Jonathan Cameron Signed-off-by: Yicong Yang Signed-off-by: Will Deacon --- Documentation/admin-guide/perf/hisi-pmu.rst | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/perf/hisi-pmu.rst b/Documentation/admin-guide/perf/hisi-pmu.rst index 48992a0b8e94..6f0ea4f641cc 100644 --- a/Documentation/admin-guide/perf/hisi-pmu.rst +++ b/Documentation/admin-guide/perf/hisi-pmu.rst @@ -112,6 +112,17 @@ uring channel. It is 2 bits. Some important codes are as follows: - 2'b00: default value, count the events which sent to the both uring and uring_ext channel; +6. ch: NoC PMU supports filtering the event counts of certain transaction +channel with this option. The current supported channels are as follows: + +- 3'b010: Request channel +- 3'b100: Snoop channel +- 3'b110: Response channel +- 3'b111: Data channel + +7. tt_en: NoC PMU supports counting only transactions that have tracetag set +if this option is set. See the 2nd list for more information about tracetag. + Users could configure IDs to count data come from specific CCL/ICL, by setting srcid_cmd & srcid_msk, and data desitined for specific CCL/ICL by setting tgtid_cmd & tgtid_msk. A set bit in srcid_msk/tgtid_msk means the PMU will not -- cgit v1.2.3 From d725668ed28b2434b548190472ac9bdc64a08e80 Mon Sep 17 00:00:00 2001 From: Thorsten Blum Date: Wed, 17 Sep 2025 00:29:44 +0200 Subject: docs: maintainer: Fix ambiguous subheading formatting Add a newline after both subheadings to avoid any ambiguous formatting, especially in htmldocs. Without the newline, subheadings are rendered as part of the following paragraphs, which can be confusing to read. Suggested-by: Randy Dunlap Signed-off-by: Thorsten Blum Reviewed-by: Bagas Sanjaya Reviewed-by: Randy Dunlap Tested-by: Randy Dunlap Signed-off-by: Jonathan Corbet Message-ID: <20250916222944.2547948-2-thorsten.blum@linux.dev> --- Documentation/maintainer/maintainer-entry-profile.rst | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/maintainer/maintainer-entry-profile.rst b/Documentation/maintainer/maintainer-entry-profile.rst index cda5d691e967..d36dd892a78a 100644 --- a/Documentation/maintainer/maintainer-entry-profile.rst +++ b/Documentation/maintainer/maintainer-entry-profile.rst @@ -59,6 +59,7 @@ week) that patches might be considered for merging and when patches need to wait for the next -rc. At a minimum: - Last -rc for new feature submissions: + New feature submissions targeting the next merge window should have their first posting for consideration before this point. Patches that are submitted after this point should be clear that they are targeting @@ -68,6 +69,7 @@ wait for the next -rc. At a minimum: submissions should appear before -rc5. - Last -rc to merge features: Deadline for merge decisions + Indicate to contributors the point at which an as yet un-applied patch set will need to wait for the NEXT+1 merge window. Of course there is no obligation to ever accept any given patchset, but if the review has not -- cgit v1.2.3 From a1d4416f8682d3c6d0545ad8a887d2a77f170808 Mon Sep 17 00:00:00 2001 From: Alex Tran Date: Mon, 1 Sep 2025 19:30:39 -0700 Subject: docs: filesystems: sysfs: remove top level sysfs net directory The net/ directory is not present as a top level sysfs directory in standard Linux systems. Network interfaces can be accessible via /sys/class/net instead. Signed-off-by: Alex Tran Signed-off-by: Jonathan Corbet Message-ID: <20250902023039.1351270-3-alex.t.tran@gmail.com> --- Documentation/filesystems/sysfs.rst | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/sysfs.rst b/Documentation/filesystems/sysfs.rst index 624e4f51212e..db153cda0786 100644 --- a/Documentation/filesystems/sysfs.rst +++ b/Documentation/filesystems/sysfs.rst @@ -299,7 +299,6 @@ The top level sysfs directory looks like:: hypervisor/ kernel/ module/ - net/ power/ devices/ contains a filesystem representation of the device tree. It maps -- cgit v1.2.3 From 63e6e9dde28a8e8967308a9dfb807edea3810aab Mon Sep 17 00:00:00 2001 From: Alex Tran Date: Mon, 1 Sep 2025 19:30:38 -0700 Subject: docs: filesystems: sysfs: clarify symlink destinations in dev and bus/devices descriptions Change sysfs bus/devices and dev directory descriptions to provide more verbose information about the specific symlink destination the devices point to. Signed-off-by: Alex Tran Signed-off-by: Jonathan Corbet Message-ID: <20250902023039.1351270-2-alex.t.tran@gmail.com> --- Documentation/filesystems/sysfs.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/sysfs.rst b/Documentation/filesystems/sysfs.rst index db153cda0786..f1a776a7ac66 100644 --- a/Documentation/filesystems/sysfs.rst +++ b/Documentation/filesystems/sysfs.rst @@ -312,7 +312,7 @@ kernel. Each bus's directory contains two subdirectories:: drivers/ devices/ contains symlinks for each device discovered in the system -that point to the device's directory under root/. +that point to the device's directory under /sys/devices. drivers/ contains a directory for each device driver that is loaded for devices on that particular bus (this assumes that drivers do not @@ -327,7 +327,7 @@ loaded system modules, for both builtin and loadable modules. dev/ contains two directories: char/ and block/. Inside these two directories there are symlinks named :. These symlinks -point to the sysfs directory for the given device. /sys/dev provides a +point to the directories under /sys/devices for each device. /sys/dev provides a quick way to lookup the sysfs interface for a device from the result of a stat(2) operation. -- cgit v1.2.3 From a3d13ec44aea30794c4764b3516b4b0396ce4814 Mon Sep 17 00:00:00 2001 From: Alex Tran Date: Mon, 1 Sep 2025 19:30:37 -0700 Subject: docs: filesystems: sysfs: add remaining top level sysfs directory descriptions Finish top level sysfs directory descriptions for block, class, firmware, hypervisor, kernel, and power. Did not write one for net directory. See commit bc3a88431672 ("docs: filesystems: sysfs: remove top level sysfs net directory") Signed-off-by: Alex Tran Signed-off-by: Jonathan Corbet Message-ID: <20250902023039.1351270-1-alex.t.tran@gmail.com> --- Documentation/filesystems/sysfs.rst | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/sysfs.rst b/Documentation/filesystems/sysfs.rst index f1a776a7ac66..354c5fb310b4 100644 --- a/Documentation/filesystems/sysfs.rst +++ b/Documentation/filesystems/sysfs.rst @@ -334,8 +334,22 @@ a stat(2) operation. More information on driver-model specific features can be found in Documentation/driver-api/driver-model/. +block/ contains symlinks to all the block devices discovered on the system. +These symlinks point to directories under /sys/devices. -TODO: Finish this section. +class/ contains a directory for each device class, grouped by functional type. +Each directory in class/ contains symlinks to devices in the /sys/devices directory. + +firmware/ contains system firmware data and configuration such as firmware tables, +ACPI information, and device tree data. + +hypervisor/ contains virtualization platform information and provides an interface to +the underlying hypervisor. It is only present when running on a virtual machine. + +kernel/ contains runtime kernel parameters, configuration settings, and status. + +power/ contains power management subsystem information including +sleep states, suspend/resume capabilities, and policies. Current Interfaces -- cgit v1.2.3 From 78494f9e3b52d339463962b462bda1604990e4fb Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 9 Sep 2025 13:37:41 +0700 Subject: Documentation: fbcon: Add boot options and attach/detach/unload section headings These last two enumerated sections headings are in normal paragraphs, making both sections merged into "Loading" section instead. Add the headings. Signed-off-by: Bagas Sanjaya Reviewed-by: Randy Dunlap Tested-by: Randy Dunlap Signed-off-by: Jonathan Corbet Message-ID: <20250909063744.30053-2-bagasdotme@gmail.com> --- Documentation/fb/fbcon.rst | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/fb/fbcon.rst b/Documentation/fb/fbcon.rst index 212f7003cfba..b9ddc145aa9f 100644 --- a/Documentation/fb/fbcon.rst +++ b/Documentation/fb/fbcon.rst @@ -74,6 +74,7 @@ Possible scenarios: over the console. C. Boot options +=============== The framebuffer console has several, largely unknown, boot options that can change its behavior. @@ -172,7 +173,8 @@ C. Boot options The value 'n' overrides the number of bootup logos. 0 disables the logo, and -1 gives the default which is the number of online CPUs. -C. Attaching, Detaching and Unloading +D. Attaching, Detaching and Unloading +===================================== Before going on to how to attach, detach and unload the framebuffer console, an illustration of the dependencies may help. -- cgit v1.2.3 From cfa51cfdb5100cecc3feb9ccdc08b17eeb711fe8 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 9 Sep 2025 13:37:42 +0700 Subject: Documentation: fbcon: Reindent 8th step of attach/detach/unload Properly indent 8th step text (as enumerated list item) to be inline with other steps. Signed-off-by: Bagas Sanjaya Reviewed-by: Randy Dunlap Tested-by: Randy Dunlap Signed-off-by: Jonathan Corbet Message-ID: <20250909063744.30053-3-bagasdotme@gmail.com> --- Documentation/fb/fbcon.rst | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/fb/fbcon.rst b/Documentation/fb/fbcon.rst index b9ddc145aa9f..3ed98b3ce647 100644 --- a/Documentation/fb/fbcon.rst +++ b/Documentation/fb/fbcon.rst @@ -251,11 +251,11 @@ restored properly. The following is one of the several methods that you can do: echo 1 > /sys/class/vtconsole/vtcon1/bind 8. Once fbcon is unbound, all drivers registered to the system will also -become unbound. This means that fbcon and individual framebuffer drivers -can be unloaded or reloaded at will. Reloading the drivers or fbcon will -automatically bind the console, fbcon and the drivers together. Unloading -all the drivers without unloading fbcon will make it impossible for the -console to bind fbcon. + become unbound. This means that fbcon and individual framebuffer drivers + can be unloaded or reloaded at will. Reloading the drivers or fbcon will + automatically bind the console, fbcon and the drivers together. Unloading + all the drivers without unloading fbcon will make it impossible for the + console to bind fbcon. Notes for vesafb users: ======================= -- cgit v1.2.3 From 4eb018bd15881504351c44f0d3d7287c88ef161f Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 9 Sep 2025 13:37:43 +0700 Subject: Documentation: fbcon: Use admonition directives Use reST syntax for admonitions (notes and custom admonition for gotcha). Signed-off-by: Bagas Sanjaya Reviewed-by: Randy Dunlap Tested-by: Randy Dunlap Signed-off-by: Jonathan Corbet Message-ID: <20250909063744.30053-4-bagasdotme@gmail.com> --- Documentation/fb/fbcon.rst | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) (limited to 'Documentation') diff --git a/Documentation/fb/fbcon.rst b/Documentation/fb/fbcon.rst index 3ed98b3ce647..a98a5cb0b0d8 100644 --- a/Documentation/fb/fbcon.rst +++ b/Documentation/fb/fbcon.rst @@ -39,11 +39,13 @@ Also, you will need to select at least one compiled-in font, but if you don't do anything, the kernel configuration tool will select one for you, usually an 8x16 font. -GOTCHA: A common bug report is enabling the framebuffer without enabling the -framebuffer console. Depending on the driver, you may get a blanked or -garbled display, but the system still boots to completion. If you are -fortunate to have a driver that does not alter the graphics chip, then you -will still get a VGA console. +.. admonition:: GOTCHA + + A common bug report is enabling the framebuffer without enabling the + framebuffer console. Depending on the driver, you may get a blanked or + garbled display, but the system still boots to completion. If you are + fortunate to have a driver that does not alter the graphics chip, then you + will still get a VGA console. B. Loading ========== @@ -117,9 +119,10 @@ C. Boot options outside the given range will still be controlled by the standard console driver. - NOTE: For x86 machines, the standard console is the VGA console which - is typically located on the same video card. Thus, the consoles that - are controlled by the VGA console will be garbled. + .. note:: + For x86 machines, the standard console is the VGA console which + is typically located on the same video card. Thus, the consoles that + are controlled by the VGA console will be garbled. 4. fbcon=rotate: @@ -141,10 +144,11 @@ C. Boot options Console rotation will only become available if Framebuffer Console Rotation support is compiled in your kernel. - NOTE: This is purely console rotation. Any other applications that - use the framebuffer will remain at their 'normal' orientation. - Actually, the underlying fb driver is totally ignorant of console - rotation. + .. note:: + This is purely console rotation. Any other applications that + use the framebuffer will remain at their 'normal' orientation. + Actually, the underlying fb driver is totally ignorant of console + rotation. 5. fbcon=margin: -- cgit v1.2.3 From 395107a7c91aafef8eb8ffee574b43cc7cce34be Mon Sep 17 00:00:00 2001 From: Marneni PoornaChandu Date: Thu, 18 Sep 2025 06:04:30 +0800 Subject: docs: driver-api: fix spelling of "buses". Replace incorrect plural form "busses" with "buses" in multiple documentation files under "Documentation/driver-api". Signed-off-by: Marneni PoornaChandu Signed-off-by: Jonathan Corbet Message-ID: <20250917220430.5815-1-Poornachandumarneni@gmail.com> --- Documentation/driver-api/device-io.rst | 4 ++-- Documentation/driver-api/driver-model/overview.rst | 2 +- Documentation/driver-api/driver-model/platform.rst | 2 +- Documentation/driver-api/eisa.rst | 6 +++--- Documentation/driver-api/i3c/protocol.rst | 4 ++-- Documentation/driver-api/ipmi.rst | 4 ++-- Documentation/driver-api/media/tx-rx.rst | 4 ++-- Documentation/driver-api/nvdimm/nvdimm.rst | 2 +- Documentation/driver-api/pm/devices.rst | 4 ++-- Documentation/driver-api/scsi.rst | 4 ++-- Documentation/driver-api/spi.rst | 2 +- Documentation/driver-api/usb/hotplug.rst | 2 +- Documentation/driver-api/usb/usb.rst | 4 ++-- 13 files changed, 22 insertions(+), 22 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/device-io.rst b/Documentation/driver-api/device-io.rst index 5c7e8194bef9..d1aaa961cac4 100644 --- a/Documentation/driver-api/device-io.rst +++ b/Documentation/driver-api/device-io.rst @@ -16,7 +16,7 @@ Bus-Independent Device Accesses Introduction ============ -Linux provides an API which abstracts performing IO across all busses +Linux provides an API which abstracts performing IO across all buses and devices, allowing device drivers to be written independently of bus type. @@ -71,7 +71,7 @@ can be compiler optimised, you can use __readb() and friends to indicate the relaxed ordering. Use this with care. While the basic functions are defined to be synchronous with respect to -each other and ordered with respect to each other the busses the devices +each other and ordered with respect to each other the buses the devices sit on may themselves have asynchronicity. In particular many authors are burned by the fact that PCI bus writes are posted asynchronously. A driver author must issue a read from the same device to ensure that diff --git a/Documentation/driver-api/driver-model/overview.rst b/Documentation/driver-api/driver-model/overview.rst index e98d0ab4a9b6..b3f447bf9f07 100644 --- a/Documentation/driver-api/driver-model/overview.rst +++ b/Documentation/driver-api/driver-model/overview.rst @@ -22,7 +22,7 @@ uniformity across the different bus types. The current driver model provides a common, uniform data model for describing a bus and the devices that can appear under the bus. The unified bus -model includes a set of common attributes which all busses carry, and a set +model includes a set of common attributes which all buses carry, and a set of common callbacks, such as device discovery during bus probing, bus shutdown, bus power management, etc. diff --git a/Documentation/driver-api/driver-model/platform.rst b/Documentation/driver-api/driver-model/platform.rst index 7beb8a9648c5..cf5ff48d3115 100644 --- a/Documentation/driver-api/driver-model/platform.rst +++ b/Documentation/driver-api/driver-model/platform.rst @@ -4,7 +4,7 @@ Platform Devices and Drivers See for the driver model interface to the platform bus: platform_device, and platform_driver. This pseudo-bus -is used to connect devices on busses with minimal infrastructure, +is used to connect devices on buses with minimal infrastructure, like those used to integrate peripherals on many system-on-chip processors, or some "legacy" PC interconnects; as opposed to large formally specified ones like PCI or USB. diff --git a/Documentation/driver-api/eisa.rst b/Documentation/driver-api/eisa.rst index b33ebe1ec9ed..3563e5f7e98d 100644 --- a/Documentation/driver-api/eisa.rst +++ b/Documentation/driver-api/eisa.rst @@ -8,9 +8,9 @@ This document groups random notes about porting EISA drivers to the new EISA/sysfs API. Starting from version 2.5.59, the EISA bus is almost given the same -status as other much more mainstream busses such as PCI or USB. This +status as other much more mainstream buses such as PCI or USB. This has been possible through sysfs, which defines a nice enough set of -abstractions to manage busses, devices and drivers. +abstractions to manage buses, devices and drivers. Although the new API is quite simple to use, converting existing drivers to the new infrastructure is not an easy task (mostly because @@ -205,7 +205,7 @@ Random notes Converting an EISA driver to the new API mostly involves *deleting* code (since probing is now in the core EISA code). Unfortunately, most drivers share their probing routine between ISA, and EISA. Special -care must be taken when ripping out the EISA code, so other busses +care must be taken when ripping out the EISA code, so other buses won't suffer from these surgical strikes... You *must not* expect any EISA device to be detected when returning diff --git a/Documentation/driver-api/i3c/protocol.rst b/Documentation/driver-api/i3c/protocol.rst index 23a0b93c62b1..fe338f8085db 100644 --- a/Documentation/driver-api/i3c/protocol.rst +++ b/Documentation/driver-api/i3c/protocol.rst @@ -165,8 +165,8 @@ The first thing attached to an HDR command is the HDR mode. There are currently for more details): * HDR-DDR: Double Data Rate mode -* HDR-TSP: Ternary Symbol Pure. Only usable on busses with no I2C devices -* HDR-TSL: Ternary Symbol Legacy. Usable on busses with I2C devices +* HDR-TSP: Ternary Symbol Pure. Only usable on buses with no I2C devices +* HDR-TSL: Ternary Symbol Legacy. Usable on buses with I2C devices When sending an HDR command, the whole bus has to enter HDR mode, which is done using a broadcast CCC command. diff --git a/Documentation/driver-api/ipmi.rst b/Documentation/driver-api/ipmi.rst index 2cc6c898ab90..f52ab2df2569 100644 --- a/Documentation/driver-api/ipmi.rst +++ b/Documentation/driver-api/ipmi.rst @@ -617,12 +617,12 @@ Note that the address you give here is the I2C address, not the IPMI address. So if you want your MC address to be 0x60, you put 0x30 here. See the I2C driver info for more details. -Command bridging to other IPMB busses through this interface does not +Command bridging to other IPMB buses through this interface does not work. The receive message queue is not implemented, by design. There is only one receive message queue on a BMC, and that is meant for the host drivers, not something on the IPMB bus. -A BMC may have multiple IPMB busses, which bus your device sits on +A BMC may have multiple IPMB buses, which bus your device sits on depends on how the system is wired. You can fetch the channels with "ipmitool channel info " where is the channel, with the channels being 0-7 and try the IPMB channels. diff --git a/Documentation/driver-api/media/tx-rx.rst b/Documentation/driver-api/media/tx-rx.rst index 0b8c9cde8ee4..22e1b13ecde9 100644 --- a/Documentation/driver-api/media/tx-rx.rst +++ b/Documentation/driver-api/media/tx-rx.rst @@ -12,7 +12,7 @@ CSI-2 receiver in an SoC. Bus types --------- -The following busses are the most common. This section discusses these two only. +The following buses are the most common. This section discusses these two only. MIPI CSI-2 ^^^^^^^^^^ @@ -36,7 +36,7 @@ Transmitter drivers Transmitter drivers generally need to provide the receiver drivers with the configuration of the transmitter. What is required depends on the type of the -bus. These are common for both busses. +bus. These are common for both buses. Media bus pixel code ^^^^^^^^^^^^^^^^^^^^ diff --git a/Documentation/driver-api/nvdimm/nvdimm.rst b/Documentation/driver-api/nvdimm/nvdimm.rst index c205efa4d45b..959ba1cc0263 100644 --- a/Documentation/driver-api/nvdimm/nvdimm.rst +++ b/Documentation/driver-api/nvdimm/nvdimm.rst @@ -230,7 +230,7 @@ LIBNVDIMM/LIBNDCTL: Bus A bus has a 1:1 relationship with an NFIT. The current expectation for ACPI based systems is that there is only ever one platform-global NFIT. That said, it is trivial to register multiple NFITs, the specification -does not preclude it. The infrastructure supports multiple busses and +does not preclude it. The infrastructure supports multiple buses and we use this capability to test multiple NFIT configurations in the unit test. diff --git a/Documentation/driver-api/pm/devices.rst b/Documentation/driver-api/pm/devices.rst index 8d86d5da4023..36d5c9c9fd11 100644 --- a/Documentation/driver-api/pm/devices.rst +++ b/Documentation/driver-api/pm/devices.rst @@ -255,7 +255,7 @@ get registered: a child can never be registered, probed or resumed before its parent; and can't be removed or suspended after that parent. The policy is that the device hierarchy should match hardware bus topology. -[Or at least the control bus, for devices which use multiple busses.] +[Or at least the control bus, for devices which use multiple buses.] In particular, this means that a device registration may fail if the parent of the device is suspending (i.e. has been chosen by the PM core as the next device to suspend) or has already suspended, as well as after all of the other @@ -493,7 +493,7 @@ states, like S3). Drivers must also be prepared to notice that the device has been removed while the system was powered down, whenever that's physically possible. -PCMCIA, MMC, USB, Firewire, SCSI, and even IDE are common examples of busses +PCMCIA, MMC, USB, Firewire, SCSI, and even IDE are common examples of buses where common Linux platforms will see such removal. Details of how drivers will notice and handle such removals are currently bus-specific, and often involve a separate thread. diff --git a/Documentation/driver-api/scsi.rst b/Documentation/driver-api/scsi.rst index bf2be96cc2d6..8bbdfb018c53 100644 --- a/Documentation/driver-api/scsi.rst +++ b/Documentation/driver-api/scsi.rst @@ -18,7 +18,7 @@ optical drives, test equipment, and medical devices) to a host computer. Although the old parallel (fast/wide/ultra) SCSI bus has largely fallen out of use, the SCSI command set is more widely used than ever to -communicate with devices over a number of different busses. +communicate with devices over a number of different buses. The `SCSI protocol `__ is a big-endian peer-to-peer packet based protocol. SCSI commands are 6, 10, 12, or 16 @@ -286,7 +286,7 @@ Parallel SCSI (SPI) transport class ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ The file drivers/scsi/scsi_transport_spi.c defines transport -attributes for traditional (fast/wide/ultra) SCSI busses. +attributes for traditional (fast/wide/ultra) SCSI buses. .. kernel-doc:: drivers/scsi/scsi_transport_spi.c :export: diff --git a/Documentation/driver-api/spi.rst b/Documentation/driver-api/spi.rst index f28887045049..74eca6735042 100644 --- a/Documentation/driver-api/spi.rst +++ b/Documentation/driver-api/spi.rst @@ -13,7 +13,7 @@ additional chipselect line is usually active-low (nCS); four signals are normally used for each peripheral, plus sometimes an interrupt. The SPI bus facilities listed here provide a generalized interface to -declare SPI busses and devices, manage them according to the standard +declare SPI buses and devices, manage them according to the standard Linux driver model, and perform input/output operations. At this time, only "master" side interfaces are supported, where Linux talks to SPI peripherals and does not implement such a peripheral itself. (Interfaces diff --git a/Documentation/driver-api/usb/hotplug.rst b/Documentation/driver-api/usb/hotplug.rst index c1e13107c50e..12260f704a01 100644 --- a/Documentation/driver-api/usb/hotplug.rst +++ b/Documentation/driver-api/usb/hotplug.rst @@ -5,7 +5,7 @@ Linux Hotplugging ================= -In hotpluggable busses like USB (and Cardbus PCI), end-users plug devices +In hotpluggable buses like USB (and Cardbus PCI), end-users plug devices into the bus with power on. In most cases, users expect the devices to become immediately usable. That means the system must do many things, including: diff --git a/Documentation/driver-api/usb/usb.rst b/Documentation/driver-api/usb/usb.rst index 976fb4221062..7f2f41e80c1c 100644 --- a/Documentation/driver-api/usb/usb.rst +++ b/Documentation/driver-api/usb/usb.rst @@ -13,7 +13,7 @@ structure, with the host as the root (the system's master), hubs as interior nodes, and peripherals as leaves (and slaves). Modern PCs support several such trees of USB devices, usually a few USB 3.0 (5 GBit/s) or USB 3.1 (10 GBit/s) and some legacy -USB 2.0 (480 MBit/s) busses just in case. +USB 2.0 (480 MBit/s) buses just in case. That master/slave asymmetry was designed-in for a number of reasons, one being ease of use. It is not physically possible to mistake upstream and @@ -42,7 +42,7 @@ two. One is intended for *general-purpose* drivers (exposed through driver frameworks), and the other is for drivers that are *part of the core*. Such core drivers include the *hub* driver (which manages trees of USB devices) and several different kinds of *host controller -drivers*, which control individual busses. +drivers*, which control individual buses. The device model seen by USB drivers is relatively complex. -- cgit v1.2.3 From 0bb8d67611b59740f47ad57658a8d2986c43f8c1 Mon Sep 17 00:00:00 2001 From: Kaison Deng Date: Mon, 15 Sep 2025 10:22:04 +0800 Subject: dt-bindings: arm: rockchip: Add Firefly ROC-RK3588-RT This documents Firefly ROC-RK3588-RT which is a SBC based on RK3588 SoC. Link: https://en.t-firefly.com/product/industry/rocrk3588rt Signed-off-by: Kaison Deng Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/27b2ce7950fdbf28c6c8404c3f8be3c1c35d6b3c.1757902513.git.dkx@t-chip.com.cn Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index f9ee77f17ad7..6aceaa8acbb2 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -258,6 +258,11 @@ properties: - const: firefly,roc-rk3576-pc - const: rockchip,rk3576 + - description: Firefly ROC-RK3588-RT + items: + - const: firefly,roc-rk3588-rt + - const: rockchip,rk3588 + - description: Firefly Station M2 items: - const: firefly,rk3566-roc-pc -- cgit v1.2.3 From 348b7ca8d3f7fdc7bc28ef219253cb31c218fdb0 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 16 Sep 2025 12:41:59 +0700 Subject: Documentation: trace: histogram: Fix histogram trigger subsection number order Section numbering in subsections of "Histogram Trigger Command" sections is inconsistent in order. In particular, "'hist' trigger examples" is erroneously numbered as 6.2, which is a leftover from b8df4a3634e08a ("tracing: Move hist trigger Documentation to histogram.txt"). Fix the order. Reviewed-by: Tom Zanussi Reviewed-by: Masami Hiramatsu (Google) Signed-off-by: Bagas Sanjaya Acked-by: Steven Rostedt (Google) Signed-off-by: Jonathan Corbet Message-ID: <20250916054202.582074-3-bagasdotme@gmail.com> --- Documentation/trace/histogram.rst | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) (limited to 'Documentation') diff --git a/Documentation/trace/histogram.rst b/Documentation/trace/histogram.rst index af6d2e15568e..d158dadaa424 100644 --- a/Documentation/trace/histogram.rst +++ b/Documentation/trace/histogram.rst @@ -186,8 +186,8 @@ Documentation written by Tom Zanussi The examples below provide a more concrete illustration of the concepts and typical usage patterns discussed above. -'special' event fields ------------------------- +2.1. 'special' event fields +--------------------------- There are a number of 'special event fields' available for use as keys or values in a hist trigger. These look like and behave as if @@ -204,16 +204,16 @@ Documentation written by Tom Zanussi common_cpu int the cpu on which the event occurred. ====================== ==== ======================================= -Extended error information --------------------------- +2.2. Extended error information +------------------------------- For some error conditions encountered when invoking a hist trigger command, extended error information is available via the tracing/error_log file. See Error Conditions in :file:`Documentation/trace/ftrace.rst` for details. -6.2 'hist' trigger examples ---------------------------- +2.3. 'hist' trigger examples +---------------------------- The first set of examples creates aggregations using the kmalloc event. The fields that can be used for the hist trigger are listed @@ -1608,8 +1608,8 @@ Extended error information Entries: 7 Dropped: 0 -2.2 Inter-event hist triggers ------------------------------ +2.4. Inter-event hist triggers +------------------------------ Inter-event hist triggers are hist triggers that combine values from one or more other events and create a histogram using that data. Data @@ -1685,8 +1685,8 @@ pseudo-file. These features are described in more detail in the following sections. -2.2.1 Histogram Variables -------------------------- +2.5. Histogram Variables +------------------------ Variables are simply named locations used for saving and retrieving values between matching events. A 'matching' event is defined as an @@ -1789,8 +1789,8 @@ or assigned to a variable and referenced in a subsequent expression:: Variables can even hold stacktraces, which are useful with synthetic events. -2.2.2 Synthetic Events ----------------------- +2.6. Synthetic Events +--------------------- Synthetic events are user-defined events generated from hist trigger variables or fields associated with one or more other events. Their @@ -1846,7 +1846,7 @@ the command that defined it with a '!':: At this point, there isn't yet an actual 'wakeup_latency' event instantiated in the event subsystem - for this to happen, a 'hist trigger action' needs to be instantiated and bound to actual fields -and variables defined on other events (see Section 2.2.3 below on +and variables defined on other events (see Section 2.7. below on how that is done using hist trigger 'onmatch' action). Once that is done, the 'wakeup_latency' synthetic event instance is created. @@ -2094,8 +2094,8 @@ histogram:: Entries: 7 Dropped: 0 -2.2.3 Hist trigger 'handlers' and 'actions' -------------------------------------------- +2.7. Hist trigger 'handlers' and 'actions' +------------------------------------------ A hist trigger 'action' is a function that's executed (in most cases conditionally) whenever a histogram entry is added or updated. @@ -2526,8 +2526,8 @@ The following commonly-used handler.action pairs are available: kworker/3:2-135 [003] d..3 49.823123: sched_switch: prev_comm=kworker/3:2 prev_pid=135 prev_prio=120 prev_state=T ==> next_comm=swapper/3 next_pid=0 next_prio=120 -0 [004] ..s7 49.823798: tcp_probe: src=10.0.0.10:54326 dest=23.215.104.193:80 mark=0x0 length=32 snd_nxt=0xe3ae2ff5 snd_una=0xe3ae2ecd snd_cwnd=10 ssthresh=2147483647 snd_wnd=28960 srtt=19604 rcv_wnd=29312 -3. User space creating a trigger --------------------------------- +2.8. User space creating a trigger +---------------------------------- Writing into /sys/kernel/tracing/trace_marker writes into the ftrace ring buffer. This can also act like an event, by writing into the trigger -- cgit v1.2.3 From f867a298ac71c097a22ea77c06f5814095c0d288 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 16 Sep 2025 12:42:00 +0700 Subject: Documentation: trace: histogram-design: Trim trailing vertices in diagram explanation text Diagram explanation text is supposed to be interleaved commentary between diagram parts that are spread out, but it outputs ugly in htmldocs due to trailing vertices as if both the explanation and the diagram are in the same literal code block. Trim trailing vertices. Reviewed-by: Tom Zanussi Reviewed-by: Masami Hiramatsu (Google) Signed-off-by: Bagas Sanjaya Acked-by: Steven Rostedt (Google) Signed-off-by: Jonathan Corbet Message-ID: <20250916054202.582074-4-bagasdotme@gmail.com> --- Documentation/trace/histogram-design.rst | 162 +++++++++++++++---------------- 1 file changed, 81 insertions(+), 81 deletions(-) (limited to 'Documentation') diff --git a/Documentation/trace/histogram-design.rst b/Documentation/trace/histogram-design.rst index 5765eb3e9efa..231a12bd7d46 100644 --- a/Documentation/trace/histogram-design.rst +++ b/Documentation/trace/histogram-design.rst @@ -142,30 +142,30 @@ elements for a couple hypothetical keys and values.:: +--------------+ | | n_keys = n_fields - n_vals | | -The hist_data n_vals and n_fields delineate the extent of the fields[] | | -array and separate keys from values for the rest of the code. | | - -Below is a run-time representation of the tracing_map part of the | | -histogram, with pointers from various parts of the fields[] array | | -to corresponding parts of the tracing_map. | | - -The tracing_map consists of an array of tracing_map_entrys and a set | | -of preallocated tracing_map_elts (abbreviated below as map_entry and | | -map_elt). The total number of map_entrys in the hist_data.map array = | | -map->max_elts (actually map->map_size but only max_elts of those are | | -used. This is a property required by the map_insert() algorithm). | | - -If a map_entry is unused, meaning no key has yet hashed into it, its | | -.key value is 0 and its .val pointer is NULL. Once a map_entry has | | -been claimed, the .key value contains the key's hash value and the | | -.val member points to a map_elt containing the full key and an entry | | -for each key or value in the map_elt.fields[] array. There is an | | -entry in the map_elt.fields[] array corresponding to each hist_field | | -in the histogram, and this is where the continually aggregated sums | | -corresponding to each histogram value are kept. | | - -The diagram attempts to show the relationship between the | | -hist_data.fields[] and the map_elt.fields[] with the links drawn | | +The hist_data n_vals and n_fields delineate the extent of the fields[] +array and separate keys from values for the rest of the code. + +Below is a run-time representation of the tracing_map part of the +histogram, with pointers from various parts of the fields[] array +to corresponding parts of the tracing_map. + +The tracing_map consists of an array of tracing_map_entrys and a set +of preallocated tracing_map_elts (abbreviated below as map_entry and +map_elt). The total number of map_entrys in the hist_data.map array = +map->max_elts (actually map->map_size but only max_elts of those are +used. This is a property required by the map_insert() algorithm). + +If a map_entry is unused, meaning no key has yet hashed into it, its +.key value is 0 and its .val pointer is NULL. Once a map_entry has +been claimed, the .key value contains the key's hash value and the +.val member points to a map_elt containing the full key and an entry +for each key or value in the map_elt.fields[] array. There is an +entry in the map_elt.fields[] array corresponding to each hist_field +in the histogram, and this is where the continually aggregated sums +corresponding to each histogram value are kept. + +The diagram attempts to show the relationship between the +hist_data.fields[] and the map_elt.fields[] with the links drawn between diagrams:: +-----------+ | | @@ -440,31 +440,31 @@ sched_waking histogram n_keys = n_fields - n_vals | | | | | | -This is very similar to the basic case. In the above diagram, we can | | | -see a new .flags member has been added to the struct hist_field | | | -struct, and a new entry added to hist_data.fields representing the ts0 | | | -variable. For a normal val hist_field, .flags is just 0 (modulo | | | -modifier flags), but if the value is defined as a variable, the .flags | | | -contains a set FL_VAR bit. | | | - -As you can see, the ts0 entry's .var.idx member contains the index | | | -into the tracing_map_elts' .vars[] array containing variable values. | | | -This idx is used whenever the value of the variable is set or read. | | | -The map_elt.vars idx assigned to the given variable is assigned and | | | -saved in .var.idx by create_tracing_map_fields() after it calls | | | -tracing_map_add_var(). | | | - -Below is a representation of the histogram at run-time, which | | | -populates the map, along with correspondence to the above hist_data and | | | -hist_field data structures. | | | - -The diagram attempts to show the relationship between the | | | -hist_data.fields[] and the map_elt.fields[] and map_elt.vars[] with | | | -the links drawn between diagrams. For each of the map_elts, you can | | | -see that the .fields[] members point to the .sum or .offset of a key | | | -or val and the .vars[] members point to the value of a variable. The | | | -arrows between the two diagrams show the linkages between those | | | -tracing_map members and the field definitions in the corresponding | | | +This is very similar to the basic case. In the above diagram, we can +see a new .flags member has been added to the struct hist_field +struct, and a new entry added to hist_data.fields representing the ts0 +variable. For a normal val hist_field, .flags is just 0 (modulo +modifier flags), but if the value is defined as a variable, the .flags +contains a set FL_VAR bit. + +As you can see, the ts0 entry's .var.idx member contains the index +into the tracing_map_elts' .vars[] array containing variable values. +This idx is used whenever the value of the variable is set or read. +The map_elt.vars idx assigned to the given variable is assigned and +saved in .var.idx by create_tracing_map_fields() after it calls +tracing_map_add_var(). + +Below is a representation of the histogram at run-time, which +populates the map, along with correspondence to the above hist_data and +hist_field data structures. + +The diagram attempts to show the relationship between the +hist_data.fields[] and the map_elt.fields[] and map_elt.vars[] with +the links drawn between diagrams. For each of the map_elts, you can +see that the .fields[] members point to the .sum or .offset of a key +or val and the .vars[] members point to the value of a variable. The +arrows between the two diagrams show the linkages between those +tracing_map members and the field definitions in the corresponding hist_data fields[] members.:: +-----------+ | | | @@ -565,40 +565,40 @@ hist_data fields[] members.:: | | | | +---------------+ | | -For each used map entry, there's a map_elt pointing to an array of | | -.vars containing the current value of the variables associated with | | -that histogram entry. So in the above, the timestamp associated with | | -pid 999 is 113345679876, and the timestamp variable in the same | | -.var.idx for pid 4444 is 213499240729. | | - -sched_switch histogram | | ----------------------- | | - -The sched_switch histogram paired with the above sched_waking | | -histogram is shown below. The most important aspect of the | | -sched_switch histogram is that it references a variable on the | | -sched_waking histogram above. | | - -The histogram diagram is very similar to the others so far displayed, | | -but it adds variable references. You can see the normal hitcount and | | -key fields along with a new wakeup_lat variable implemented in the | | -same way as the sched_waking ts0 variable, but in addition there's an | | -entry with the new FL_VAR_REF (short for HIST_FIELD_FL_VAR_REF) flag. | | - -Associated with the new var ref field are a couple of new hist_field | | -members, var.hist_data and var_ref_idx. For a variable reference, the | | -var.hist_data goes with the var.idx, which together uniquely identify | | -a particular variable on a particular histogram. The var_ref_idx is | | -just the index into the var_ref_vals[] array that caches the values of | | -each variable whenever a hist trigger is updated. Those resulting | | -values are then finally accessed by other code such as trace action | | -code that uses the var_ref_idx values to assign param values. | | - -The diagram below describes the situation for the sched_switch | | +For each used map entry, there's a map_elt pointing to an array of +.vars containing the current value of the variables associated with +that histogram entry. So in the above, the timestamp associated with +pid 999 is 113345679876, and the timestamp variable in the same +.var.idx for pid 4444 is 213499240729. + +sched_switch histogram +---------------------- + +The sched_switch histogram paired with the above sched_waking +histogram is shown below. The most important aspect of the +sched_switch histogram is that it references a variable on the +sched_waking histogram above. + +The histogram diagram is very similar to the others so far displayed, +but it adds variable references. You can see the normal hitcount and +key fields along with a new wakeup_lat variable implemented in the +same way as the sched_waking ts0 variable, but in addition there's an +entry with the new FL_VAR_REF (short for HIST_FIELD_FL_VAR_REF) flag. + +Associated with the new var ref field are a couple of new hist_field +members, var.hist_data and var_ref_idx. For a variable reference, the +var.hist_data goes with the var.idx, which together uniquely identify +a particular variable on a particular histogram. The var_ref_idx is +just the index into the var_ref_vals[] array that caches the values of +each variable whenever a hist trigger is updated. Those resulting +values are then finally accessed by other code such as trace action +code that uses the var_ref_idx values to assign param values. + +The diagram below describes the situation for the sched_switch histogram referred to before:: - # echo 'hist:keys=next_pid:wakeup_lat=common_timestamp.usecs-$ts0' >> | | - events/sched/sched_switch/trigger | | + # echo 'hist:keys=next_pid:wakeup_lat=common_timestamp.usecs-$ts0' >> + events/sched/sched_switch/trigger | | +------------------+ | | | hist_data | | | -- cgit v1.2.3 From 8c716e87ea33519920811338100d6d8a7fb32456 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 16 Sep 2025 12:42:01 +0700 Subject: Documentation: trace: historgram-design: Separate sched_waking histogram section heading and the following diagram Section heading for sched_waking histogram is shown as normal paragraph instead due to codeblock marker for the following diagram being in the same line as the section underline. Separate them. Fixes: daceabf1b494 ("tracing/doc: Fix ascii-art in histogram-design.rst") Reviewed-by: Tom Zanussi Reviewed-by: Masami Hiramatsu (Google) Signed-off-by: Bagas Sanjaya Acked-by: Steven Rostedt (Google) Signed-off-by: Jonathan Corbet Message-ID: <20250916054202.582074-5-bagasdotme@gmail.com> --- Documentation/trace/histogram-design.rst | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/trace/histogram-design.rst b/Documentation/trace/histogram-design.rst index 231a12bd7d46..4faff1669b77 100644 --- a/Documentation/trace/histogram-design.rst +++ b/Documentation/trace/histogram-design.rst @@ -380,7 +380,9 @@ entry, ts0, corresponding to the ts0 variable in the sched_waking trigger above. sched_waking histogram -----------------------:: +---------------------- + +.. code-block:: +------------------+ | hist_data |<-------------------------------------------------------+ -- cgit v1.2.3 From fa06220f3467bc7264809be58a8cbb0329ce6fcb Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 16 Sep 2025 12:42:02 +0700 Subject: Documentation: trace: histogram-design: Wrap introductory note in note:: directive Use Sphinx note:: directive for the introductory note at the beginning of docs, instead of aligned-text paragraph that renders as definition list. Reviewed-by: Tom Zanussi Reviewed-by: Masami Hiramatsu (Google) Signed-off-by: Bagas Sanjaya Acked-by: Steven Rostedt (Google) Signed-off-by: Jonathan Corbet Message-ID: <20250916054202.582074-6-bagasdotme@gmail.com> --- Documentation/trace/histogram-design.rst | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/trace/histogram-design.rst b/Documentation/trace/histogram-design.rst index 4faff1669b77..ae71b5bf97c6 100644 --- a/Documentation/trace/histogram-design.rst +++ b/Documentation/trace/histogram-design.rst @@ -11,13 +11,14 @@ histograms work and how the individual pieces map to the data structures used to implement them in trace_events_hist.c and tracing_map.c. -Note: All the ftrace histogram command examples assume the working - directory is the ftrace /tracing directory. For example:: +.. note:: + All the ftrace histogram command examples assume the working + directory is the ftrace /tracing directory. For example:: # cd /sys/kernel/tracing -Also, the histogram output displayed for those commands will be -generally be truncated - only enough to make the point is displayed. + Also, the histogram output displayed for those commands will be + generally be truncated - only enough to make the point is displayed. 'hist_debug' trace event files ============================== -- cgit v1.2.3 From b8874ea3d0fdb2c48b2261bb3b46c84908fa67bb Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 16 Sep 2025 12:42:03 +0700 Subject: Documentation: trace: histogram: Convert ftrace docs cross-reference In brief "Extended error information" section, details on error condition is referred to ftrace docs, which is written in :file: directive instead of a proper cross-reference. Convert it. Reviewed-by: Tom Zanussi Signed-off-by: Bagas Sanjaya Acked-by: Steven Rostedt (Google) Signed-off-by: Jonathan Corbet Message-ID: <20250916054202.582074-7-bagasdotme@gmail.com> --- Documentation/trace/histogram.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/trace/histogram.rst b/Documentation/trace/histogram.rst index d158dadaa424..340bcb5099e7 100644 --- a/Documentation/trace/histogram.rst +++ b/Documentation/trace/histogram.rst @@ -209,8 +209,8 @@ Documentation written by Tom Zanussi For some error conditions encountered when invoking a hist trigger command, extended error information is available via the - tracing/error_log file. See Error Conditions in - :file:`Documentation/trace/ftrace.rst` for details. + tracing/error_log file. See "Error conditions" section in + Documentation/trace/ftrace.rst for details. 2.3. 'hist' trigger examples ---------------------------- -- cgit v1.2.3 From 4b167146ec051dce3e770052ddfe4689f41cfdd3 Mon Sep 17 00:00:00 2001 From: Nick Chan Date: Mon, 15 Sep 2025 09:52:24 +0800 Subject: dt-bindings: spmi: Add Apple A11 and T2 compatible The SPMI bus found on Apple A11 and T2 SoCs are compatible with the existing driver for t8103's spmi so add their compatibles. Signed-off-by: Nick Chan Acked-by: Rob Herring (Arm) Signed-off-by: Sven Peter --- Documentation/devicetree/bindings/spmi/apple,spmi.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spmi/apple,spmi.yaml b/Documentation/devicetree/bindings/spmi/apple,spmi.yaml index dbf09ad0ecde..ba524f1eb704 100644 --- a/Documentation/devicetree/bindings/spmi/apple,spmi.yaml +++ b/Documentation/devicetree/bindings/spmi/apple,spmi.yaml @@ -18,7 +18,10 @@ properties: compatible: oneOf: - items: - - const: apple,t6020-spmi + - enum: + - apple,t6020-spmi + - apple,t8012-spmi + - apple,t8015-spmi - const: apple,t8103-spmi - items: - enum: -- cgit v1.2.3 From 7e52794b88f8bce684ffd7081279ac4236131ae1 Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Thu, 18 Sep 2025 17:36:06 +0200 Subject: dt-bindings: touchscreen: convert bu21013 bindings to json schema Convert Rohm BU21013 I2C touchscreen controller device tree binding to json-schema. Additional changes: - Replace -supply with avdd-supply to match example and existing DTS. - Add reset-gpios in the example because it is required. Signed-off-by: Dario Binacchi Reviewed-by: Krzysztof Kozlowski Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250918153630.2535208-1-dario.binacchi@amarulasolutions.com Signed-off-by: Dmitry Torokhov --- .../bindings/input/touchscreen/bu21013.txt | 43 ---------- .../bindings/input/touchscreen/rohm,bu21013.yaml | 95 ++++++++++++++++++++++ 2 files changed, 95 insertions(+), 43 deletions(-) delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/bu21013.txt create mode 100644 Documentation/devicetree/bindings/input/touchscreen/rohm,bu21013.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/touchscreen/bu21013.txt b/Documentation/devicetree/bindings/input/touchscreen/bu21013.txt deleted file mode 100644 index da4c9d8b99b1..000000000000 --- a/Documentation/devicetree/bindings/input/touchscreen/bu21013.txt +++ /dev/null @@ -1,43 +0,0 @@ -* Rohm BU21013 Touch Screen - -Required properties: - - compatible : "rohm,bu21013_tp" - - reg : I2C device address - - reset-gpios : GPIO pin enabling (selecting) chip (CS) - - interrupt-parent : the phandle for the gpio controller - - interrupts : (gpio) interrupt to which the chip is connected - -Optional properties: - - touch-gpios : GPIO pin registering a touch event - - -supply : Phandle to a regulator supply - - touchscreen-size-x : General touchscreen binding, see [1]. - - touchscreen-size-y : General touchscreen binding, see [1]. - - touchscreen-inverted-x : General touchscreen binding, see [1]. - - touchscreen-inverted-y : General touchscreen binding, see [1]. - - touchscreen-swapped-x-y : General touchscreen binding, see [1]. - -[1] All general touchscreen properties are described in - Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt. - -Deprecated properties: - - rohm,touch-max-x : Maximum outward permitted limit in the X axis - - rohm,touch-max-y : Maximum outward permitted limit in the Y axis - - rohm,flip-x : Flip touch coordinates on the X axis - - rohm,flip-y : Flip touch coordinates on the Y axis - -Example: - - i2c@80110000 { - bu21013_tp@5c { - compatible = "rohm,bu21013_tp"; - reg = <0x5c>; - interrupt-parent = <&gpio2>; - interrupts <&20 IRQ_TYPE_LEVEL_LOW>; - touch-gpio = <&gpio2 20 GPIO_ACTIVE_LOW>; - avdd-supply = <&ab8500_ldo_aux1_reg>; - - touchscreen-size-x = <384>; - touchscreen-size-y = <704>; - touchscreen-inverted-y; - }; - }; diff --git a/Documentation/devicetree/bindings/input/touchscreen/rohm,bu21013.yaml b/Documentation/devicetree/bindings/input/touchscreen/rohm,bu21013.yaml new file mode 100644 index 000000000000..adea2c4edf1f --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/rohm,bu21013.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/touchscreen/rohm,bu21013.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rohm BU21013 touchscreen + +description: + Rohm BU21013 I2C driven touchscreen controller. + +maintainers: + - Dario Binacchi + +allOf: + - $ref: touchscreen.yaml# + +properties: + compatible: + enum: + - rohm,bu21013_tp + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + reset-gpios: + maxItems: 1 + + touch-gpios: + maxItems: 1 + description: GPIO registering a touch event. + + avdd-supply: + description: Analogic power supply + + rohm,touch-max-x: + deprecated: true + description: Maximum value on the X axis. + $ref: /schemas/types.yaml#/definitions/uint32 + + rohm,touch-max-y: + deprecated: true + description: Maximum value on the Y axis. + $ref: /schemas/types.yaml#/definitions/uint32 + + rohm,flip-x: + deprecated: true + description: Flip touch coordinates on the X axis + type: boolean + + rohm,flip-y: + deprecated: true + description: Flip touch coordinates on the Y axis + type: boolean + + touchscreen-inverted-x: true + touchscreen-inverted-y: true + touchscreen-size-x: true + touchscreen-size-y: true + touchscreen-swapped-x-y: true + +additionalProperties: false + +required: + - compatible + - reg + - reset-gpios + - interrupts + +examples: + - | + #include + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + touchscreen@5c { + compatible = "rohm,bu21013_tp"; + reg = <0x5c>; + + interrupt-parent = <&gpio2>; + interrupts = <0x20 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; + touch-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>; + avdd-supply = <&ab8500_ldo_aux1_reg>; + + touchscreen-size-x = <384>; + touchscreen-size-y = <704>; + touchscreen-inverted-y; + }; + }; -- cgit v1.2.3 From 7ee0f793d00d586bf01017a0a24308659873975c Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Thu, 18 Sep 2025 17:36:09 +0200 Subject: dt-bindings: touchscreen: convert zet6223 bindings to json schema Convert Zeitec ZET6223 touchscreen controller device tree binding to json-schema. Signed-off-by: Dario Binacchi Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250918153630.2535208-4-dario.binacchi@amarulasolutions.com Signed-off-by: Dmitry Torokhov --- .../bindings/input/touchscreen/zeitec,zet6223.yaml | 62 ++++++++++++++++++++++ .../bindings/input/touchscreen/zet6223.txt | 30 ----------- 2 files changed, 62 insertions(+), 30 deletions(-) create mode 100644 Documentation/devicetree/bindings/input/touchscreen/zeitec,zet6223.yaml delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/zet6223.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/touchscreen/zeitec,zet6223.yaml b/Documentation/devicetree/bindings/input/touchscreen/zeitec,zet6223.yaml new file mode 100644 index 000000000000..d5e132ec0273 --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/zeitec,zet6223.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/touchscreen/zeitec,zet6223.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Zeitec ZET6223 touchscreen controller + +description: + Zeitec ZET6223 I2C driven touchscreen controller. + +maintainers: + - Dario Binacchi + +allOf: + - $ref: touchscreen.yaml# + +properties: + compatible: + enum: + - zeitec,zet6223 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vio-supply: + description: 1.8V or 3.3V VIO supply. + + vcc-supply: + description: 3.3V VCC supply. + + touchscreen-inverted-x: true + touchscreen-inverted-y: true + touchscreen-size-x: true + touchscreen-size-y: true + touchscreen-swapped-x-y: true + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + +examples: + - | + #include + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + touchscreen@76 { + compatible = "zeitec,zet6223"; + reg = <0x76>; + interrupt-parent = <&pio>; + interrupts = <6 11 IRQ_TYPE_EDGE_FALLING>; + }; + }; diff --git a/Documentation/devicetree/bindings/input/touchscreen/zet6223.txt b/Documentation/devicetree/bindings/input/touchscreen/zet6223.txt deleted file mode 100644 index 27d55a506f18..000000000000 --- a/Documentation/devicetree/bindings/input/touchscreen/zet6223.txt +++ /dev/null @@ -1,30 +0,0 @@ -Zeitec ZET6223 I2C touchscreen controller - -Required properties: -- compatible : "zeitec,zet6223" -- reg : I2C slave address of the chip (0x76) -- interrupts : interrupt specification for the zet6223 interrupt - -Optional properties: - -- vio-supply : Specification for VIO supply (1.8V or 3.3V, - depending on system interface needs). -- vcc-supply : Specification for 3.3V VCC supply. -- touchscreen-size-x : See touchscreen.txt -- touchscreen-size-y : See touchscreen.txt -- touchscreen-inverted-x : See touchscreen.txt -- touchscreen-inverted-y : See touchscreen.txt -- touchscreen-swapped-x-y : See touchscreen.txt - -Example: - -i2c@00000000 { - - zet6223: touchscreen@76 { - compatible = "zeitec,zet6223"; - reg = <0x76>; - interrupt-parent = <&pio>; - interrupts = <6 11 IRQ_TYPE_EDGE_FALLING> - }; - -}; -- cgit v1.2.3 From 8a760c454da263f4b5f0f557e26141b2a3186b40 Mon Sep 17 00:00:00 2001 From: Emilio Perez Date: Mon, 18 Aug 2025 03:31:21 +0100 Subject: Documentation: PCI: Fix typos The PCIe spec uses "Requester ID", not "requestor ID". Follow the spec to avoid confusion. Signed-off-by: Emilio Perez [bhelgaas: capitalize as a hint that the spec defines this] Signed-off-by: Bjorn Helgaas Link: https://patch.msgid.link/20250818023121.33427-1-emiliopeju@gmail.com --- Documentation/PCI/pcieaer-howto.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/PCI/pcieaer-howto.rst b/Documentation/PCI/pcieaer-howto.rst index d448efe572c8..3210c4792978 100644 --- a/Documentation/PCI/pcieaer-howto.rst +++ b/Documentation/PCI/pcieaer-howto.rst @@ -138,7 +138,7 @@ error message to the Root Port above it when it captures an error. The Root Port, upon receiving an error reporting message, internally processes and logs the error message in its AER Capability structure. Error information being logged includes storing -the error reporting agent's requestor ID into the Error Source +the error reporting agent's Requester ID into the Error Source Identification Registers and setting the error bits of the Root Error Status Register accordingly. If AER error reporting is enabled in the Root Error Command Register, the Root Port generates an interrupt when an -- cgit v1.2.3 From 1512231b6cc860ffbfbd85b295449dfb6977d357 Mon Sep 17 00:00:00 2001 From: Kumar Kartikeya Dwivedi Date: Wed, 17 Sep 2025 03:27:54 +0000 Subject: bpf: Enforce RCU protection for KF_RCU_PROTECTED Currently, KF_RCU_PROTECTED only applies to iterator APIs and that too in a convoluted fashion: the presence of this flag on the kfunc is used to set MEM_RCU in iterator type, and the lack of RCU protection results in an error only later, once next() or destroy() methods are invoked on the iterator. While there is no bug, this is certainly a bit unintuitive, and makes the enforcement of the flag iterator specific. In the interest of making this flag useful for other upcoming kfuncs, e.g. scx_bpf_cpu_curr() [0][1], add enforcement for invoking the kfunc in an RCU critical section in general. This would also mean that iterator APIs using KF_RCU_PROTECTED will error out earlier, instead of throwing an error for lack of RCU CS protection when next() or destroy() methods are invoked. In addition to this, if the kfuncs tagged KF_RCU_PROTECTED return a pointer value, ensure that this pointer value is only usable in an RCU critical section. There might be edge cases where the return value is special and doesn't need to imply MEM_RCU semantics, but in general, the assumption should hold for the majority of kfuncs, and we can revisit things if necessary later. [0]: https://lore.kernel.org/all/20250903212311.369697-3-christian.loehle@arm.com [1]: https://lore.kernel.org/all/20250909195709.92669-1-arighi@nvidia.com Tested-by: Andrea Righi Signed-off-by: Kumar Kartikeya Dwivedi Acked-by: Eduard Zingerman Link: https://lore.kernel.org/r/20250917032755.4068726-2-memxor@gmail.com Signed-off-by: Alexei Starovoitov --- Documentation/bpf/kfuncs.rst | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/bpf/kfuncs.rst b/Documentation/bpf/kfuncs.rst index ae468b781d31..e38941370b90 100644 --- a/Documentation/bpf/kfuncs.rst +++ b/Documentation/bpf/kfuncs.rst @@ -335,9 +335,26 @@ consider doing refcnt != 0 check, especially when returning a KF_ACQUIRE pointer. Note as well that a KF_ACQUIRE kfunc that is KF_RCU should very likely also be KF_RET_NULL. +2.4.8 KF_RCU_PROTECTED flag +--------------------------- + +The KF_RCU_PROTECTED flag is used to indicate that the kfunc must be invoked in +an RCU critical section. This is assumed by default in non-sleepable programs, +and must be explicitly ensured by calling ``bpf_rcu_read_lock`` for sleepable +ones. + +If the kfunc returns a pointer value, this flag also enforces that the returned +pointer is RCU protected, and can only be used while the RCU critical section is +active. + +The flag is distinct from the ``KF_RCU`` flag, which only ensures that its +arguments are at least RCU protected pointers. This may transitively imply that +RCU protection is ensured, but it does not work in cases of kfuncs which require +RCU protection but do not take RCU protected arguments. + .. _KF_deprecated_flag: -2.4.8 KF_DEPRECATED flag +2.4.9 KF_DEPRECATED flag ------------------------ The KF_DEPRECATED flag is used for kfuncs which are scheduled to be -- cgit v1.2.3 From f79671dc87b6cea78dbe429969eb5549fca1bcc1 Mon Sep 17 00:00:00 2001 From: Aleksa Paunovic Date: Thu, 24 Jul 2025 17:23:25 +0200 Subject: dt-bindings: riscv: Add xmipsexectl ISA extension description MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The xmipsexectl extension is described in the MIPS RV64 P8700/P8700-F Multiprocessing System Programmer’s Guide linked at [1]. Link: https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf Signed-off-by: Aleksa Paunovic Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250724-p8700-pause-v5-1-a6cbbe1c3412@htecgroup.com Signed-off-by: Paul Walmsley --- Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index ede6a58ccf53..de41a6f074d3 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -662,6 +662,12 @@ properties: Registers in the AX45MP datasheet. https://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf + # MIPS + - const: xmipsexectl + description: + The MIPS extension for execution control as documented in + https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf + # SiFive - const: xsfvqmaccdod description: -- cgit v1.2.3 From f9d3206506b4db2711eca0f6b3d9dc621cc1e650 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=2E=20Neusch=C3=A4fer?= Date: Thu, 18 Sep 2025 12:58:43 +0200 Subject: dt-bindings: arm: sunxi: Add Amediatech X96Q MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The X96Q is a set-top box with an H313 SoC, AXP305 PMIC, 1 or 2 GiB RAM, 8 or 16 GiB eMMC flash, 2x USB A, Micro-SD, HDMI, Ethernet, audio/video output, and infrared input. https://x96mini.com/products/x96q-tv-box-android-10-set-top-box Reviewed-by: Andre Przywara Acked-by: Rob Herring (Arm) Signed-off-by: J. Neuschäfer Link: https://patch.msgid.link/20250918-x96q-v2-1-51bd39928806@posteo.net Signed-off-by: Chen-Yu Tsai --- Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index 72ef861a0b68..9e4627f97d7e 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -971,6 +971,11 @@ properties: - const: hechuang,x96-mate - const: allwinner,sun50i-h616 + - description: X96Q + items: + - const: amediatech,x96q + - const: allwinner,sun50i-h616 + - description: X96Q Pro+ items: - const: amediatech,x96q-pro-plus -- cgit v1.2.3 From 107e169799057bc6a379ddb625cbe1e51cfc7d72 Mon Sep 17 00:00:00 2001 From: Eduard Zingerman Date: Thu, 18 Sep 2025 19:18:42 -0700 Subject: bpf: disable and remove registers chain based liveness Remove register chain based liveness tracking: - struct bpf_reg_state->{parent,live} fields are no longer needed; - REG_LIVE_WRITTEN marks are superseded by bpf_mark_stack_write() calls; - mark_reg_read() calls are superseded by bpf_mark_stack_read(); - log.c:print_liveness() is superseded by logging in liveness.c; - propagate_liveness() is superseded by bpf_update_live_stack(); - no need to establish register chains in is_state_visited() anymore; - fix a bunch of tests expecting "_w" suffixes in verifier log messages. Signed-off-by: Eduard Zingerman Link: https://lore.kernel.org/r/20250918-callchain-sensitive-liveness-v3-9-c3cd27bacc60@gmail.com Signed-off-by: Alexei Starovoitov --- Documentation/bpf/verifier.rst | 264 ----------------------------------------- 1 file changed, 264 deletions(-) (limited to 'Documentation') diff --git a/Documentation/bpf/verifier.rst b/Documentation/bpf/verifier.rst index 95e6f80a407e..510d15bc697b 100644 --- a/Documentation/bpf/verifier.rst +++ b/Documentation/bpf/verifier.rst @@ -347,270 +347,6 @@ However, only the value of register ``r1`` is important to successfully finish verification. The goal of the liveness tracking algorithm is to spot this fact and figure out that both states are actually equivalent. -Data structures -~~~~~~~~~~~~~~~ - -Liveness is tracked using the following data structures:: - - enum bpf_reg_liveness { - REG_LIVE_NONE = 0, - REG_LIVE_READ32 = 0x1, - REG_LIVE_READ64 = 0x2, - REG_LIVE_READ = REG_LIVE_READ32 | REG_LIVE_READ64, - REG_LIVE_WRITTEN = 0x4, - REG_LIVE_DONE = 0x8, - }; - - struct bpf_reg_state { - ... - struct bpf_reg_state *parent; - ... - enum bpf_reg_liveness live; - ... - }; - - struct bpf_stack_state { - struct bpf_reg_state spilled_ptr; - ... - }; - - struct bpf_func_state { - struct bpf_reg_state regs[MAX_BPF_REG]; - ... - struct bpf_stack_state *stack; - } - - struct bpf_verifier_state { - struct bpf_func_state *frame[MAX_CALL_FRAMES]; - struct bpf_verifier_state *parent; - ... - } - -* ``REG_LIVE_NONE`` is an initial value assigned to ``->live`` fields upon new - verifier state creation; - -* ``REG_LIVE_WRITTEN`` means that the value of the register (or stack slot) is - defined by some instruction verified between this verifier state's parent and - verifier state itself; - -* ``REG_LIVE_READ{32,64}`` means that the value of the register (or stack slot) - is read by a some child state of this verifier state; - -* ``REG_LIVE_DONE`` is a marker used by ``clean_verifier_state()`` to avoid - processing same verifier state multiple times and for some sanity checks; - -* ``->live`` field values are formed by combining ``enum bpf_reg_liveness`` - values using bitwise or. - -Register parentage chains -~~~~~~~~~~~~~~~~~~~~~~~~~ - -In order to propagate information between parent and child states, a *register -parentage chain* is established. Each register or stack slot is linked to a -corresponding register or stack slot in its parent state via a ``->parent`` -pointer. This link is established upon state creation in ``is_state_visited()`` -and might be modified by ``set_callee_state()`` called from -``__check_func_call()``. - -The rules for correspondence between registers / stack slots are as follows: - -* For the current stack frame, registers and stack slots of the new state are - linked to the registers and stack slots of the parent state with the same - indices. - -* For the outer stack frames, only callee saved registers (r6-r9) and stack - slots are linked to the registers and stack slots of the parent state with the - same indices. - -* When function call is processed a new ``struct bpf_func_state`` instance is - allocated, it encapsulates a new set of registers and stack slots. For this - new frame, parent links for r6-r9 and stack slots are set to nil, parent links - for r1-r5 are set to match caller r1-r5 parent links. - -This could be illustrated by the following diagram (arrows stand for -``->parent`` pointers):: - - ... ; Frame #0, some instructions - --- checkpoint #0 --- - 1 : r6 = 42 ; Frame #0 - --- checkpoint #1 --- - 2 : call foo() ; Frame #0 - ... ; Frame #1, instructions from foo() - --- checkpoint #2 --- - ... ; Frame #1, instructions from foo() - --- checkpoint #3 --- - exit ; Frame #1, return from foo() - 3 : r1 = r6 ; Frame #0 <- current state - - +-------------------------------+-------------------------------+ - | Frame #0 | Frame #1 | - Checkpoint +-------------------------------+-------------------------------+ - #0 | r0 | r1-r5 | r6-r9 | fp-8 ... | - +-------------------------------+ - ^ ^ ^ ^ - | | | | - Checkpoint +-------------------------------+ - #1 | r0 | r1-r5 | r6-r9 | fp-8 ... | - +-------------------------------+ - ^ ^ ^ - |_______|_______|_______________ - | | | - nil nil | | | nil nil - | | | | | | | - Checkpoint +-------------------------------+-------------------------------+ - #2 | r0 | r1-r5 | r6-r9 | fp-8 ... | r0 | r1-r5 | r6-r9 | fp-8 ... | - +-------------------------------+-------------------------------+ - ^ ^ ^ ^ ^ - nil nil | | | | | - | | | | | | | - Checkpoint +-------------------------------+-------------------------------+ - #3 | r0 | r1-r5 | r6-r9 | fp-8 ... | r0 | r1-r5 | r6-r9 | fp-8 ... | - +-------------------------------+-------------------------------+ - ^ ^ - nil nil | | - | | | | - Current +-------------------------------+ - state | r0 | r1-r5 | r6-r9 | fp-8 ... | - +-------------------------------+ - \ - r6 read mark is propagated via these links - all the way up to checkpoint #1. - The checkpoint #1 contains a write mark for r6 - because of instruction (1), thus read propagation - does not reach checkpoint #0 (see section below). - -Liveness marks tracking -~~~~~~~~~~~~~~~~~~~~~~~ - -For each processed instruction, the verifier tracks read and written registers -and stack slots. The main idea of the algorithm is that read marks propagate -back along the state parentage chain until they hit a write mark, which 'screens -off' earlier states from the read. The information about reads is propagated by -function ``mark_reg_read()`` which could be summarized as follows:: - - mark_reg_read(struct bpf_reg_state *state, ...): - parent = state->parent - while parent: - if state->live & REG_LIVE_WRITTEN: - break - if parent->live & REG_LIVE_READ64: - break - parent->live |= REG_LIVE_READ64 - state = parent - parent = state->parent - -Notes: - -* The read marks are applied to the **parent** state while write marks are - applied to the **current** state. The write mark on a register or stack slot - means that it is updated by some instruction in the straight-line code leading - from the parent state to the current state. - -* Details about REG_LIVE_READ32 are omitted. - -* Function ``propagate_liveness()`` (see section :ref:`read_marks_for_cache_hits`) - might override the first parent link. Please refer to the comments in the - ``propagate_liveness()`` and ``mark_reg_read()`` source code for further - details. - -Because stack writes could have different sizes ``REG_LIVE_WRITTEN`` marks are -applied conservatively: stack slots are marked as written only if write size -corresponds to the size of the register, e.g. see function ``save_register_state()``. - -Consider the following example:: - - 0: (*u64)(r10 - 8) = 0 ; define 8 bytes of fp-8 - --- checkpoint #0 --- - 1: (*u32)(r10 - 8) = 1 ; redefine lower 4 bytes - 2: r1 = (*u32)(r10 - 8) ; read lower 4 bytes defined at (1) - 3: r2 = (*u32)(r10 - 4) ; read upper 4 bytes defined at (0) - -As stated above, the write at (1) does not count as ``REG_LIVE_WRITTEN``. Should -it be otherwise, the algorithm above wouldn't be able to propagate the read mark -from (3) to checkpoint #0. - -Once the ``BPF_EXIT`` instruction is reached ``update_branch_counts()`` is -called to update the ``->branches`` counter for each verifier state in a chain -of parent verifier states. When the ``->branches`` counter reaches zero the -verifier state becomes a valid entry in a set of cached verifier states. - -Each entry of the verifier states cache is post-processed by a function -``clean_live_states()``. This function marks all registers and stack slots -without ``REG_LIVE_READ{32,64}`` marks as ``NOT_INIT`` or ``STACK_INVALID``. -Registers/stack slots marked in this way are ignored in function ``stacksafe()`` -called from ``states_equal()`` when a state cache entry is considered for -equivalence with a current state. - -Now it is possible to explain how the example from the beginning of the section -works:: - - 0: call bpf_get_prandom_u32() - 1: r1 = 0 - 2: if r0 == 0 goto +1 - 3: r0 = 1 - --- checkpoint[0] --- - 4: r0 = r1 - 5: exit - -* At instruction #2 branching point is reached and state ``{ r0 == 0, r1 == 0, pc == 4 }`` - is pushed to states processing queue (pc stands for program counter). - -* At instruction #4: - - * ``checkpoint[0]`` states cache entry is created: ``{ r0 == 1, r1 == 0, pc == 4 }``; - * ``checkpoint[0].r0`` is marked as written; - * ``checkpoint[0].r1`` is marked as read; - -* At instruction #5 exit is reached and ``checkpoint[0]`` can now be processed - by ``clean_live_states()``. After this processing ``checkpoint[0].r1`` has a - read mark and all other registers and stack slots are marked as ``NOT_INIT`` - or ``STACK_INVALID`` - -* The state ``{ r0 == 0, r1 == 0, pc == 4 }`` is popped from the states queue - and is compared against a cached state ``{ r1 == 0, pc == 4 }``, the states - are considered equivalent. - -.. _read_marks_for_cache_hits: - -Read marks propagation for cache hits -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -Another point is the handling of read marks when a previously verified state is -found in the states cache. Upon cache hit verifier must behave in the same way -as if the current state was verified to the program exit. This means that all -read marks, present on registers and stack slots of the cached state, must be -propagated over the parentage chain of the current state. Example below shows -why this is important. Function ``propagate_liveness()`` handles this case. - -Consider the following state parentage chain (S is a starting state, A-E are -derived states, -> arrows show which state is derived from which):: - - r1 read - <------------- A[r1] == 0 - C[r1] == 0 - S ---> A ---> B ---> exit E[r1] == 1 - | - ` ---> C ---> D - | - ` ---> E ^ - |___ suppose all these - ^ states are at insn #Y - | - suppose all these - states are at insn #X - -* Chain of states ``S -> A -> B -> exit`` is verified first. - -* While ``B -> exit`` is verified, register ``r1`` is read and this read mark is - propagated up to state ``A``. - -* When chain of states ``C -> D`` is verified the state ``D`` turns out to be - equivalent to state ``B``. - -* The read mark for ``r1`` has to be propagated to state ``C``, otherwise state - ``C`` might get mistakenly marked as equivalent to state ``E`` even though - values for register ``r1`` differ between ``C`` and ``E``. - Understanding eBPF verifier messages ==================================== -- cgit v1.2.3 From c9a9fc23228f447beefe473224207944521b14a1 Mon Sep 17 00:00:00 2001 From: Aleksa Paunovic Date: Thu, 24 Jul 2025 17:23:29 +0200 Subject: riscv: hwprobe: Document MIPS xmipsexectl vendor extension Document support for MIPS vendor extensions using the key "RISCV_HWPROBE_KEY_VENDOR_EXT_MIPS_0" and xmipsexectl vendor extension using the key "RISCV_HWPROBE_VENDOR_EXT_XMIPSEXECTL". Signed-off-by: Aleksa Paunovic Reviewed-by: Alexandre Ghiti Link: https://lore.kernel.org/r/20250724-p8700-pause-v5-5-a6cbbe1c3412@htecgroup.com Signed-off-by: Paul Walmsley --- Documentation/arch/riscv/hwprobe.rst | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst index 2aa9be272d5d..2f449c9b15bd 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -327,6 +327,15 @@ The following keys are defined: * :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED`: Misaligned vector accesses are not supported at all and will generate a misaligned address fault. +* :c:macro:`RISCV_HWPROBE_KEY_VENDOR_EXT_MIPS_0`: A bitmask containing the + mips vendor extensions that are compatible with the + :c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_IMA`: base system behavior. + + * MIPS + + * :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XMIPSEXECTL`: The xmipsexectl vendor + extension is supported in the MIPS ISA extensions spec. + * :c:macro:`RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0`: A bitmask containing the thead vendor extensions that are compatible with the :c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_IMA`: base system behavior. -- cgit v1.2.3 From 1f1cb5d60c76e4ebbdfc5aa673233b305589876d Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Fri, 19 Sep 2025 14:43:48 +0700 Subject: Documentation: cgroup-v2: Sync manual toctree MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Manually-arranged toctree comment in cgroup v2 documentation is a rather out-of-sync with actual contents: a few sections are missing and/or named differently. Sync the toctree. Signed-off-by: Bagas Sanjaya Acked-by: Michal Koutný Signed-off-by: Tejun Heo --- Documentation/admin-guide/cgroup-v2.rst | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/cgroup-v2.rst b/Documentation/admin-guide/cgroup-v2.rst index a1e3d431974c..0e6c67ac585a 100644 --- a/Documentation/admin-guide/cgroup-v2.rst +++ b/Documentation/admin-guide/cgroup-v2.rst @@ -15,6 +15,9 @@ v1 is available under :ref:`Documentation/admin-guide/cgroup-v1/index.rst Date: Thu, 7 Aug 2025 16:42:21 -0500 Subject: dt-bindings: watchdog: Drop duplicate moxa,moxart-watchdog.txt "moxa,moxart-watchdog" is already documented in faraday,ftwdt010.yaml, so drop the old text binding. Reviewed-by: Guenter Roeck Fixes: 289660a4af0e ("dt-bindings: watchdog: convert faraday,ftwdt010 to yaml") Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250807214222.4170236-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/watchdog/moxa,moxart-watchdog.txt | 15 --------------- 1 file changed, 15 deletions(-) delete mode 100644 Documentation/devicetree/bindings/watchdog/moxa,moxart-watchdog.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/watchdog/moxa,moxart-watchdog.txt b/Documentation/devicetree/bindings/watchdog/moxa,moxart-watchdog.txt deleted file mode 100644 index 1169857d1d12..000000000000 --- a/Documentation/devicetree/bindings/watchdog/moxa,moxart-watchdog.txt +++ /dev/null @@ -1,15 +0,0 @@ -MOXA ART Watchdog timer - -Required properties: - -- compatible : Must be "moxa,moxart-watchdog" -- reg : Should contain registers location and length -- clocks : Should contain phandle for the clock that drives the counter - -Example: - - watchdog: watchdog@98500000 { - compatible = "moxa,moxart-watchdog"; - reg = <0x98500000 0x10>; - clocks = <&coreclk>; - }; -- cgit v1.2.3 From 72289f57b071b35fa4fe48382ce30ea5c7d60ebc Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 13:13:46 -0500 Subject: dt-bindings: mailbox: Convert rockchip,rk3368-mailbox to DT schema Convert the rockchip,rk3368-mailbox binding to DT schema format. Add the missing 'clocks' and 'clock-names' properties. Document that it's one interrupt per mailbox channel (and there are 4 channels). Link: https://lore.kernel.org/r/20250812181348.62137-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/mailbox/rockchip,rk3368-mailbox.yaml | 56 ++++++++++++++++++++++ .../bindings/mailbox/rockchip-mailbox.txt | 32 ------------- 2 files changed, 56 insertions(+), 32 deletions(-) create mode 100644 Documentation/devicetree/bindings/mailbox/rockchip,rk3368-mailbox.yaml delete mode 100644 Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mailbox/rockchip,rk3368-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/rockchip,rk3368-mailbox.yaml new file mode 100644 index 000000000000..107bc96a8f3d --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/rockchip,rk3368-mailbox.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/rockchip,rk3368-mailbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3368 Mailbox Controller + +maintainers: + - Heiko Stuebner + +description: + The Rockchip mailbox is used by the Rockchip CPU cores to communicate + requests to MCU processor. + +properties: + compatible: + const: rockchip,rk3368-mailbox + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: pclk_mailbox + + interrupts: + description: One interrupt for each channel + maxItems: 4 + + '#mbox-cells': + const: 1 + +required: + - compatible + - reg + - interrupts + - '#mbox-cells' + +additionalProperties: false + +examples: + - | + #include + + mailbox@ff6b0000 { + compatible = "rockchip,rk3368-mailbox"; + reg = <0xff6b0000 0x1000>; + interrupts = , + , + , + ; + #mbox-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt b/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt deleted file mode 100644 index b6bb84acf5be..000000000000 --- a/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt +++ /dev/null @@ -1,32 +0,0 @@ -Rockchip mailbox - -The Rockchip mailbox is used by the Rockchip CPU cores to communicate -requests to MCU processor. - -Refer to ./mailbox.txt for generic information about mailbox device-tree -bindings. - -Required properties: - - - compatible: should be one of the following. - - "rockchip,rk3368-mbox" for rk3368 - - reg: physical base address of the controller and length of memory mapped - region. - - interrupts: The interrupt number to the cpu. The interrupt specifier format - depends on the interrupt controller. - - #mbox-cells: Common mailbox binding property to identify the number - of cells required for the mailbox specifier. Should be 1 - -Example: --------- - -/* RK3368 */ -mbox: mbox@ff6b0000 { - compatible = "rockchip,rk3368-mailbox"; - reg = <0x0 0xff6b0000 0x0 0x1000>, - interrupts = , - , - , - ; - #mbox-cells = <1>; -}; -- cgit v1.2.3 From cae18692965571a3ccf7582b6b661cebbcd0ccae Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 13:13:53 -0500 Subject: dt-bindings: mailbox: Convert marvell,armada-3700-rwtm-mailbox to DT schema Convert the Marvell Armada 3700 rWTM mailbox binding to DT schema format. It's a straightforward conversion. Link: https://lore.kernel.org/r/20250812181357.63395-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../mailbox/marvell,armada-3700-rwtm-mailbox.txt | 16 --------- .../mailbox/marvell,armada-3700-rwtm-mailbox.yaml | 42 ++++++++++++++++++++++ 2 files changed, 42 insertions(+), 16 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mailbox/marvell,armada-3700-rwtm-mailbox.txt create mode 100644 Documentation/devicetree/bindings/mailbox/marvell,armada-3700-rwtm-mailbox.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mailbox/marvell,armada-3700-rwtm-mailbox.txt b/Documentation/devicetree/bindings/mailbox/marvell,armada-3700-rwtm-mailbox.txt deleted file mode 100644 index 282ab81a4ea6..000000000000 --- a/Documentation/devicetree/bindings/mailbox/marvell,armada-3700-rwtm-mailbox.txt +++ /dev/null @@ -1,16 +0,0 @@ -* rWTM BIU Mailbox driver for Armada 37xx - -Required properties: -- compatible: must be "marvell,armada-3700-rwtm-mailbox" -- reg: physical base address of the mailbox and length of memory mapped - region -- interrupts: the IRQ line for the mailbox -- #mbox-cells: must be 1 - -Example: - rwtm: mailbox@b0000 { - compatible = "marvell,armada-3700-rwtm-mailbox"; - reg = <0xb0000 0x100>; - interrupts = ; - #mbox-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/mailbox/marvell,armada-3700-rwtm-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/marvell,armada-3700-rwtm-mailbox.yaml new file mode 100644 index 000000000000..0a07ed1b1beb --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/marvell,armada-3700-rwtm-mailbox.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/marvell,armada-3700-rwtm-mailbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 3700 rWTM Mailbox + +maintainers: + - Marek Behún + +properties: + compatible: + const: marvell,armada-3700-rwtm-mailbox + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + '#mbox-cells': + const: 1 + +required: + - compatible + - reg + - interrupts + - '#mbox-cells' + +additionalProperties: false + +examples: + - | + #include + + mailbox@b0000 { + compatible = "marvell,armada-3700-rwtm-mailbox"; + reg = <0xb0000 0x100>; + interrupts = ; + #mbox-cells = <1>; + }; -- cgit v1.2.3 From bc4f25b5b7c5a8b0f85b2840421590ad9260eda5 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 13:14:04 -0500 Subject: dt-bindings: mailbox: Convert brcm,iproc-pdc-mbox to DT schema Convert the Broadcom iProc PDC mailbox binding to DT schema format. It's a straightforward conversion. Link: https://lore.kernel.org/r/20250812181406.65390-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/mailbox/brcm,iproc-pdc-mbox.txt | 25 -------- .../bindings/mailbox/brcm,iproc-pdc-mbox.yaml | 66 ++++++++++++++++++++++ 2 files changed, 66 insertions(+), 25 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt create mode 100644 Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt b/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt deleted file mode 100644 index 9bcdf2087625..000000000000 --- a/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt +++ /dev/null @@ -1,25 +0,0 @@ -The PDC driver manages data transfer to and from various offload engines -on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is -one device tree entry per block. On some chips, the PDC functionality is -handled by the FA2 (Northstar Plus). - -Required properties: -- compatible : Should be "brcm,iproc-pdc-mbox" or "brcm,iproc-fa2-mbox" for - FA2/Northstar Plus. -- reg: Should contain PDC registers location and length. -- interrupts: Should contain the IRQ line for the PDC. -- #mbox-cells: 1 -- brcm,rx-status-len: Length of metadata preceding received frames, in bytes. - -Optional properties: -- brcm,use-bcm-hdr: present if a BCM header precedes each frame. - -Example: - pdc0: iproc-pdc0@612c0000 { - compatible = "brcm,iproc-pdc-mbox"; - reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */ - interrupts = ; - #mbox-cells = <1>; /* one cell per mailbox channel */ - brcm,rx-status-len = <32>; - brcm,use-bcm-hdr; - }; diff --git a/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.yaml b/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.yaml new file mode 100644 index 000000000000..5534ae07c9fa --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/brcm,iproc-pdc-mbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom iProc PDC mailbox + +maintainers: + - Ray Jui + - Scott Branden + +description: + The PDC driver manages data transfer to and from various offload engines on + some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is one + device tree entry per block. On some chips, the PDC functionality is handled + by the FA2 (Northstar Plus). + +properties: + compatible: + enum: + - brcm,iproc-pdc-mbox + - brcm,iproc-fa2-mbox + + reg: + maxItems: 1 + + dma-coherent: true + + interrupts: + maxItems: 1 + + '#mbox-cells': + const: 1 + + brcm,rx-status-len: + description: + Length of metadata preceding received frames, in bytes. + $ref: /schemas/types.yaml#/definitions/uint32 + + brcm,use-bcm-hdr: + type: boolean + description: + Present if a BCM header precedes each frame. + +required: + - compatible + - reg + - interrupts + - '#mbox-cells' + - brcm,rx-status-len + +additionalProperties: false + +examples: + - | + #include + + mailbox0@612c0000 { + compatible = "brcm,iproc-pdc-mbox"; + reg = <0x612c0000 0x445>; + interrupts = ; + #mbox-cells = <1>; + brcm,rx-status-len = <32>; + brcm,use-bcm-hdr; + }; -- cgit v1.2.3 From 930c78583d350bedcaa8fc2302e9d3c37a7f0700 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 13:14:13 -0500 Subject: dt-bindings: mailbox: Convert brcm,iproc-flexrm-mbox to DT schema Convert the Broadcom FlexRM Ring Manager binding to DT schema format. It's a straightforward conversion. Link: https://lore.kernel.org/r/20250812181415.66923-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/mailbox/brcm,iproc-flexrm-mbox.txt | 59 -------------------- .../bindings/mailbox/brcm,iproc-flexrm-mbox.yaml | 63 ++++++++++++++++++++++ 2 files changed, 63 insertions(+), 59 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt create mode 100644 Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt b/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt deleted file mode 100644 index bf0c998b8603..000000000000 --- a/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt +++ /dev/null @@ -1,59 +0,0 @@ -Broadcom FlexRM Ring Manager -============================ -The Broadcom FlexRM ring manager provides a set of rings which can be -used to submit work to offload engines. An SoC may have multiple FlexRM -hardware blocks. There is one device tree entry per FlexRM block. The -FlexRM driver will create a mailbox-controller instance for given FlexRM -hardware block where each mailbox channel is a separate FlexRM ring. - -Required properties: --------------------- -- compatible: Should be "brcm,iproc-flexrm-mbox" -- reg: Specifies base physical address and size of the FlexRM - ring registers -- msi-parent: Phandles (and potential Device IDs) to MSI controllers - The FlexRM engine will send MSIs (instead of wired - interrupts) to CPU. There is one MSI for each FlexRM ring. - Refer devicetree/bindings/interrupt-controller/msi.txt -- #mbox-cells: Specifies the number of cells needed to encode a mailbox - channel. This should be 3. - - The 1st cell is the mailbox channel number. - - The 2nd cell contains MSI completion threshold. This is the - number of completion messages for which FlexRM will inject - one MSI interrupt to CPU. - - The 3rd cell contains MSI timer value representing time for - which FlexRM will wait to accumulate N completion messages - where N is the value specified by 2nd cell above. If FlexRM - does not get required number of completion messages in time - specified by this cell then it will inject one MSI interrupt - to CPU provided at least one completion message is available. - -Optional properties: --------------------- -- dma-coherent: Present if DMA operations made by the FlexRM engine (such - as DMA descriptor access, access to buffers pointed by DMA - descriptors and read/write pointer updates to DDR) are - cache coherent with the CPU. - -Example: --------- -crypto_mbox: mbox@67000000 { - compatible = "brcm,iproc-flexrm-mbox"; - reg = <0x67000000 0x200000>; - msi-parent = <&gic_its 0x7f00>; - #mbox-cells = <3>; -}; - -crypto@672c0000 { - compatible = "brcm,spu2-v2-crypto"; - reg = <0x672c0000 0x1000>; - mboxes = <&crypto_mbox 0 0x1 0xffff>, - <&crypto_mbox 1 0x1 0xffff>, - <&crypto_mbox 16 0x1 0xffff>, - <&crypto_mbox 17 0x1 0xffff>, - <&crypto_mbox 30 0x1 0xffff>, - <&crypto_mbox 31 0x1 0xffff>; -}; diff --git a/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.yaml b/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.yaml new file mode 100644 index 000000000000..c801bd2e95f3 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/brcm,iproc-flexrm-mbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom FlexRM Ring Manager + +maintainers: + - Ray Jui + - Scott Branden + +description: + The Broadcom FlexRM ring manager provides a set of rings which can be used to + submit work to offload engines. An SoC may have multiple FlexRM hardware + blocks. There is one device tree entry per FlexRM block. The FlexRM driver + will create a mailbox-controller instance for given FlexRM hardware block + where each mailbox channel is a separate FlexRM ring. + +properties: + compatible: + const: brcm,iproc-flexrm-mbox + + reg: + maxItems: 1 + + msi-parent: + maxItems: 1 + + '#mbox-cells': + description: > + The 1st cell is the mailbox channel number. + + The 2nd cell contains MSI completion threshold. This is the number of + completion messages for which FlexRM will inject one MSI interrupt to CPU. + + The 3rd cell contains MSI timer value representing time for which FlexRM + will wait to accumulate N completion messages where N is the value + specified by 2nd cell above. If FlexRM does not get required number of + completion messages in time specified by this cell then it will inject one + MSI interrupt to CPU provided at least one completion message is + available. + const: 3 + + dma-coherent: true + +required: + - compatible + - reg + - msi-parent + - '#mbox-cells' + +additionalProperties: false + +examples: + - | + mailbox@67000000 { + compatible = "brcm,iproc-flexrm-mbox"; + reg = <0x67000000 0x200000>; + msi-parent = <&gic_its 0x7f00>; + #mbox-cells = <3>; + dma-coherent; + }; -- cgit v1.2.3 From 638f9174e4bf8036e9167f4ff6b937cc5b842da6 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 15:32:57 -0500 Subject: dt-bindings: watchdog: Convert marvell,armada-3700-wdt to DT schema Convert the Marvell Armada 3700 watchdog binding to DT schema format. It's a straight-forward conversion. Acked-by: Guenter Roeck Link: https://lore.kernel.org/r/20250812203301.726374-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/watchdog/armada-37xx-wdt.txt | 23 ------------ .../bindings/watchdog/marvell,armada-3700-wdt.yaml | 41 ++++++++++++++++++++++ 2 files changed, 41 insertions(+), 23 deletions(-) delete mode 100644 Documentation/devicetree/bindings/watchdog/armada-37xx-wdt.txt create mode 100644 Documentation/devicetree/bindings/watchdog/marvell,armada-3700-wdt.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/watchdog/armada-37xx-wdt.txt b/Documentation/devicetree/bindings/watchdog/armada-37xx-wdt.txt deleted file mode 100644 index a8d00c31a1d8..000000000000 --- a/Documentation/devicetree/bindings/watchdog/armada-37xx-wdt.txt +++ /dev/null @@ -1,23 +0,0 @@ -* Armada 37xx CPU Watchdog Timer Controller - -Required properties: -- compatible : must be "marvell,armada-3700-wdt" -- reg : base physical address of the controller and length of memory mapped - region. -- clocks : the clock feeding the watchdog timer. See clock-bindings.txt -- marvell,system-controller : reference to syscon node for the CPU Miscellaneous - Registers - -Example: - - cpu_misc: system-controller@d000 { - compatible = "marvell,armada-3700-cpu-misc", "syscon"; - reg = <0xd000 0x1000>; - }; - - wdt: watchdog@8300 { - compatible = "marvell,armada-3700-wdt"; - reg = <0x8300 0x40>; - marvell,system-controller = <&cpu_misc>; - clocks = <&xtalclk>; - }; diff --git a/Documentation/devicetree/bindings/watchdog/marvell,armada-3700-wdt.yaml b/Documentation/devicetree/bindings/watchdog/marvell,armada-3700-wdt.yaml new file mode 100644 index 000000000000..60d44d642fb5 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/marvell,armada-3700-wdt.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/marvell,armada-3700-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Armada 37xx CPU Watchdog Timer Controller + +maintainers: + - Marek Behún + +properties: + compatible: + const: marvell,armada-3700-wdt + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + marvell,system-controller: + description: Reference to syscon node for the CPU Miscellaneous Registers + $ref: /schemas/types.yaml#/definitions/phandle + +required: + - compatible + - reg + - clocks + - marvell,system-controller + +additionalProperties: false + +examples: + - | + watchdog@8300 { + compatible = "marvell,armada-3700-wdt"; + reg = <0x8300 0x40>; + marvell,system-controller = <&cpu_misc>; + clocks = <&xtalclk>; + }; -- cgit v1.2.3 From c72504a22e1c4d87b3addc73db2f6e51a4b78b88 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 22 Aug 2025 17:56:44 -0500 Subject: dt-bindings: thermal: Convert marvell,armada370-thermal to DT schema Convert the Marvell Armada 3xx/XP thermal binding to schema. Drop the AP80x and CP110 as they have long been deprecated and have been replaced by a new binding. Reviewed-by: Miquel Raynal Link: https://lore.kernel.org/r/20250822225645.766397-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/thermal/armada-thermal.txt | 42 ---------------------- .../thermal/marvell,armada370-thermal.yaml | 37 +++++++++++++++++++ 2 files changed, 37 insertions(+), 42 deletions(-) delete mode 100644 Documentation/devicetree/bindings/thermal/armada-thermal.txt create mode 100644 Documentation/devicetree/bindings/thermal/marvell,armada370-thermal.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/thermal/armada-thermal.txt b/Documentation/devicetree/bindings/thermal/armada-thermal.txt deleted file mode 100644 index ab8b8fccc7af..000000000000 --- a/Documentation/devicetree/bindings/thermal/armada-thermal.txt +++ /dev/null @@ -1,42 +0,0 @@ -* Marvell Armada 370/375/380/XP thermal management - -Required properties: - -- compatible: Should be set to one of the following: - * marvell,armada370-thermal - * marvell,armada375-thermal - * marvell,armada380-thermal - * marvell,armadaxp-thermal - * marvell,armada-ap806-thermal - * marvell,armada-ap807-thermal - * marvell,armada-cp110-thermal - -Note: these bindings are deprecated for AP806/CP110 and should instead -follow the rules described in: -Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt -Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt - -- reg: Device's register space. - Two entries are expected, see the examples below. The first one points - to the status register (4B). The second one points to the control - registers (8B). - Note: The compatibles marvell,armada370-thermal, - marvell,armada380-thermal, and marvell,armadaxp-thermal must point to - "control MSB/control 1", with size of 4 (deprecated binding), or point - to "control LSB/control 0" with size of 8 (current binding). All other - compatibles must point to "control LSB/control 0" with size of 8. - -Examples: - - /* Legacy bindings */ - thermal@d0018300 { - compatible = "marvell,armada370-thermal"; - reg = <0xd0018300 0x4 - 0xd0018304 0x4>; - }; - - ap_thermal: thermal@6f8084 { - compatible = "marvell,armada-ap806-thermal"; - reg = <0x6f808C 0x4>, - <0x6f8084 0x8>; - }; diff --git a/Documentation/devicetree/bindings/thermal/marvell,armada370-thermal.yaml b/Documentation/devicetree/bindings/thermal/marvell,armada370-thermal.yaml new file mode 100644 index 000000000000..337792859448 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/marvell,armada370-thermal.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/marvell,armada370-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 3xx/XP thermal management + +maintainers: + - Miquel Raynal + +properties: + compatible: + enum: + - marvell,armada370-thermal + - marvell,armada375-thermal + - marvell,armada380-thermal + - marvell,armadaxp-thermal + + reg: + items: + - description: status register (4B) + - description: control register (8B) + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + thermal@d0018300 { + compatible = "marvell,armada370-thermal"; + reg = <0xd0018300 0x4>, + <0xd0018304 0x8>; + }; -- cgit v1.2.3 From 047170ac08d6fa250209bed7c105d0443f1e0d81 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 22 Aug 2025 17:57:00 -0500 Subject: dt-binding: thermal: Convert marvell,armada-ap806-thermal to DT schema Convert the Marvell Armada AP80x/CP110 thermal binding to schema. It is a straight forward conversion. Reviewed-by: Miquel Raynal Link: https://lore.kernel.org/r/20250822225701.766947-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../arm/marvell/ap80x-system-controller.txt | 39 ------------------ .../arm/marvell/cp110-system-controller.txt | 43 -------------------- .../thermal/marvell,armada-ap806-thermal.yaml | 46 ++++++++++++++++++++++ 3 files changed, 46 insertions(+), 82 deletions(-) create mode 100644 Documentation/devicetree/bindings/thermal/marvell,armada-ap806-thermal.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt index c83245065d44..72de11bd2ef0 100644 --- a/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt +++ b/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt @@ -115,45 +115,6 @@ ap_syscon: system-controller@6f4000 { SYSTEM CONTROLLER 1 =================== -Thermal: --------- - -For common binding part and usage, refer to -Documentation/devicetree/bindings/thermal/thermal*.yaml - -The thermal IP can probe the temperature all around the processor. It -may feature several channels, each of them wired to one sensor. - -It is possible to setup an overheat interrupt by giving at least one -critical point to any subnode of the thermal-zone node. - -Required properties: -- compatible: must be one of: - * marvell,armada-ap806-thermal -- reg: register range associated with the thermal functions. - -Optional properties: -- interrupts: overheat interrupt handle. Should point to line 18 of the - SEI irqchip. See interrupt-controller/interrupts.txt -- #thermal-sensor-cells: shall be <1> when thermal-zones subnodes refer - to this IP and represents the channel ID. There is one sensor per - channel. O refers to the thermal IP internal channel, while positive - IDs refer to each CPU. - -Example: -ap_syscon1: system-controller@6f8000 { - compatible = "syscon", "simple-mfd"; - reg = <0x6f8000 0x1000>; - - ap_thermal: thermal-sensor@80 { - compatible = "marvell,armada-ap806-thermal"; - reg = <0x80 0x10>; - interrupt-parent = <&sei>; - interrupts = <18>; - #thermal-sensor-cells = <1>; - }; -}; - Cluster clocks: --------------- diff --git a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt index 9d5d70c98058..54ff9f218328 100644 --- a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt +++ b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt @@ -189,46 +189,3 @@ CP110_LABEL(syscon0): system-controller@440000 { }; }; - -SYSTEM CONTROLLER 1 -=================== - -Thermal: --------- - -The thermal IP can probe the temperature all around the processor. It -may feature several channels, each of them wired to one sensor. - -It is possible to setup an overheat interrupt by giving at least one -critical point to any subnode of the thermal-zone node. - -For common binding part and usage, refer to -Documentation/devicetree/bindings/thermal/thermal*.yaml - -Required properties: -- compatible: must be one of: - * marvell,armada-cp110-thermal -- reg: register range associated with the thermal functions. - -Optional properties: -- interrupts-extended: overheat interrupt handle. Should point to - a line of the ICU-SEI irqchip (116 is what is usually used by the - firmware). The ICU-SEI will redirect towards interrupt line #37 of the - AP SEI which is shared across all CPs. - See interrupt-controller/interrupts.txt -- #thermal-sensor-cells: shall be <1> when thermal-zones subnodes refer - to this IP and represents the channel ID. There is one sensor per - channel. O refers to the thermal IP internal channel. - -Example: -CP110_LABEL(syscon1): system-controller@6f8000 { - compatible = "syscon", "simple-mfd"; - reg = <0x6f8000 0x1000>; - - CP110_LABEL(thermal): thermal-sensor@70 { - compatible = "marvell,armada-cp110-thermal"; - reg = <0x70 0x10>; - interrupts-extended = <&CP110_LABEL(icu_sei) 116 IRQ_TYPE_LEVEL_HIGH>; - #thermal-sensor-cells = <1>; - }; -}; diff --git a/Documentation/devicetree/bindings/thermal/marvell,armada-ap806-thermal.yaml b/Documentation/devicetree/bindings/thermal/marvell,armada-ap806-thermal.yaml new file mode 100644 index 000000000000..2c370317a40e --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/marvell,armada-ap806-thermal.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/marvell,armada-ap806-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada AP80x/CP110 thermal management + +maintainers: + - Miquel Raynal + +properties: + compatible: + enum: + - marvell,armada-ap806-thermal + - marvell,armada-ap807-thermal + - marvell,armada-cp110-thermal + + reg: + maxItems: 1 + + interrupts: + description: + Overheat interrupt. The interrupt is connected thru a System Error + Interrupt (SEI) controller. + maxItems: 1 + + '#thermal-sensor-cells': + description: Cell represents the channel ID. There is one sensor per + channel. O refers to the thermal IP internal channel. + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + thermal-sensor@80 { + compatible = "marvell,armada-ap806-thermal"; + reg = <0x80 0x10>; + interrupts = <18>; + #thermal-sensor-cells = <1>; + }; -- cgit v1.2.3 From d27ce63a31c3c9b221287844c41088e499042199 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 28 Aug 2025 17:30:21 -0500 Subject: dt-bindings: edac: Convert apm,xgene-edac to DT schema Convert the APM XGene EDAC binding to DT schema. Add the missing "apm,xgene-edac-soc" compatible, and drop the unused "apm,xgene-edac-pmd-v2" compatible. Link: https://lore.kernel.org/r/20250828223023.2409337-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/edac/apm,xgene-edac.yaml | 203 +++++++++++++++++++++ .../devicetree/bindings/edac/apm-xgene-edac.txt | 112 ------------ 2 files changed, 203 insertions(+), 112 deletions(-) create mode 100644 Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml delete mode 100644 Documentation/devicetree/bindings/edac/apm-xgene-edac.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml b/Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml new file mode 100644 index 000000000000..9afc78254cc0 --- /dev/null +++ b/Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml @@ -0,0 +1,203 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/edac/apm,xgene-edac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: APM X-Gene SoC EDAC + +maintainers: + - Khuong Dinh + +description: > + EDAC node is defined to describe on-chip error detection and correction. + + The following error types are supported: + + memory controller - Memory controller + PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache + L3 - L3 cache controller + SoC - SoC IPs such as Ethernet, SATA, etc + +properties: + compatible: + const: apm,xgene-edac + + reg: + items: + - description: CPU bus (PCP) resource + + '#address-cells': + const: 2 + + '#size-cells': + const: 2 + + ranges: true + + interrupts: + description: Interrupt-specifier for MCU, PMD, L3, or SoC error IRQ(s). + items: + - description: MCU error IRQ + - description: PMD error IRQ + - description: L3 error IRQ + - description: SoC error IRQ + minItems: 1 + + regmap-csw: + description: Regmap of the CPU switch fabric (CSW) resource. + $ref: /schemas/types.yaml#/definitions/phandle + + regmap-mcba: + description: Regmap of the MCB-A (memory bridge) resource. + $ref: /schemas/types.yaml#/definitions/phandle + + regmap-mcbb: + description: Regmap of the MCB-B (memory bridge) resource. + $ref: /schemas/types.yaml#/definitions/phandle + + regmap-efuse: + description: Regmap of the PMD efuse resource. + $ref: /schemas/types.yaml#/definitions/phandle + + regmap-rb: + description: Regmap of the register bus resource (optional for compatibility). + $ref: /schemas/types.yaml#/definitions/phandle + +required: + - compatible + - regmap-csw + - regmap-mcba + - regmap-mcbb + - regmap-efuse + - reg + - interrupts + +# Child-node bindings +patternProperties: + '^edacmc@': + description: Memory controller subnode + type: object + additionalProperties: false + + properties: + compatible: + const: apm,xgene-edac-mc + + reg: + maxItems: 1 + + memory-controller: + description: Instance number of the memory controller. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 3 + + required: + - compatible + - reg + - memory-controller + + + '^edacpmd@': + description: PMD subnode + type: object + additionalProperties: false + + properties: + compatible: + const: apm,xgene-edac-pmd + + reg: + maxItems: 1 + + pmd-controller: + description: Instance number of the PMD controller. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 3 + + required: + - compatible + - reg + - pmd-controller + + '^edacl3@': + description: L3 subnode + type: object + additionalProperties: false + + properties: + compatible: + enum: + - apm,xgene-edac-l3 + - apm,xgene-edac-l3-v2 + + reg: + maxItems: 1 + + required: + - compatible + - reg + + '^edacsoc@': + description: SoC subnode + type: object + additionalProperties: false + + properties: + compatible: + enum: + - apm,xgene-edac-soc + - apm,xgene-edac-soc-v1 + + reg: + maxItems: 1 + + required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + edac@78800000 { + compatible = "apm,xgene-edac"; + reg = <0x0 0x78800000 0x0 0x100>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + interrupts = <0x0 0x20 0x4>, <0x0 0x21 0x4>, <0x0 0x27 0x4>; + + regmap-csw = <&csw>; + regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + regmap-efuse = <&efuse>; + regmap-rb = <&rb>; + + edacmc@7e800000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x7e800000 0x0 0x1000>; + memory-controller = <0>; + }; + + edacpmd@7c000000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x7c000000 0x0 0x200000>; + pmd-controller = <0>; + }; + + edacl3@7e600000 { + compatible = "apm,xgene-edac-l3"; + reg = <0x0 0x7e600000 0x0 0x1000>; + }; + + edacsoc@7e930000 { + compatible = "apm,xgene-edac-soc-v1"; + reg = <0x0 0x7e930000 0x0 0x1000>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/edac/apm-xgene-edac.txt b/Documentation/devicetree/bindings/edac/apm-xgene-edac.txt deleted file mode 100644 index 1006b0489464..000000000000 --- a/Documentation/devicetree/bindings/edac/apm-xgene-edac.txt +++ /dev/null @@ -1,112 +0,0 @@ -* APM X-Gene SoC EDAC node - -EDAC node is defined to describe on-chip error detection and correction. -The follow error types are supported: - - memory controller - Memory controller - PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache - L3 - L3 cache controller - SoC - SoC IP's such as Ethernet, SATA, and etc - -The following section describes the EDAC DT node binding. - -Required properties: -- compatible : Shall be "apm,xgene-edac". -- regmap-csw : Regmap of the CPU switch fabric (CSW) resource. -- regmap-mcba : Regmap of the MCB-A (memory bridge) resource. -- regmap-mcbb : Regmap of the MCB-B (memory bridge) resource. -- regmap-efuse : Regmap of the PMD efuse resource. -- regmap-rb : Regmap of the register bus resource. This property - is optional only for compatibility. If the RB - error conditions are not cleared, it will - continuously generate interrupt. -- reg : First resource shall be the CPU bus (PCP) resource. -- interrupts : Interrupt-specifier for MCU, PMD, L3, or SoC error - IRQ(s). - -Required properties for memory controller subnode: -- compatible : Shall be "apm,xgene-edac-mc". -- reg : First resource shall be the memory controller unit - (MCU) resource. -- memory-controller : Instance number of the memory controller. - -Required properties for PMD subnode: -- compatible : Shall be "apm,xgene-edac-pmd" or - "apm,xgene-edac-pmd-v2". -- reg : First resource shall be the PMD resource. -- pmd-controller : Instance number of the PMD controller. - -Required properties for L3 subnode: -- compatible : Shall be "apm,xgene-edac-l3" or - "apm,xgene-edac-l3-v2". -- reg : First resource shall be the L3 EDAC resource. - -Required properties for SoC subnode: -- compatible : Shall be "apm,xgene-edac-soc-v1" for revision 1 or - "apm,xgene-edac-l3-soc" for general value reporting - only. -- reg : First resource shall be the SoC EDAC resource. - -Example: - csw: csw@7e200000 { - compatible = "apm,xgene-csw", "syscon"; - reg = <0x0 0x7e200000 0x0 0x1000>; - }; - - mcba: mcba@7e700000 { - compatible = "apm,xgene-mcb", "syscon"; - reg = <0x0 0x7e700000 0x0 0x1000>; - }; - - mcbb: mcbb@7e720000 { - compatible = "apm,xgene-mcb", "syscon"; - reg = <0x0 0x7e720000 0x0 0x1000>; - }; - - efuse: efuse@1054a000 { - compatible = "apm,xgene-efuse", "syscon"; - reg = <0x0 0x1054a000 0x0 0x20>; - }; - - rb: rb@7e000000 { - compatible = "apm,xgene-rb", "syscon"; - reg = <0x0 0x7e000000 0x0 0x10>; - }; - - edac@78800000 { - compatible = "apm,xgene-edac"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - regmap-csw = <&csw>; - regmap-mcba = <&mcba>; - regmap-mcbb = <&mcbb>; - regmap-efuse = <&efuse>; - regmap-rb = <&rb>; - reg = <0x0 0x78800000 0x0 0x100>; - interrupts = <0x0 0x20 0x4>, - <0x0 0x21 0x4>, - <0x0 0x27 0x4>; - - edacmc@7e800000 { - compatible = "apm,xgene-edac-mc"; - reg = <0x0 0x7e800000 0x0 0x1000>; - memory-controller = <0>; - }; - - edacpmd@7c000000 { - compatible = "apm,xgene-edac-pmd"; - reg = <0x0 0x7c000000 0x0 0x200000>; - pmd-controller = <0>; - }; - - edacl3@7e600000 { - compatible = "apm,xgene-edac-l3"; - reg = <0x0 0x7e600000 0x0 0x1000>; - }; - - edacsoc@7e930000 { - compatible = "apm,xgene-edac-soc-v1"; - reg = <0x0 0x7e930000 0x0 0x1000>; - }; - }; -- cgit v1.2.3 From 9b4bacf5d998a9222cab8f9cd3b851ccba0d9351 Mon Sep 17 00:00:00 2001 From: Ariel D'Alessandro Date: Thu, 11 Sep 2025 12:09:54 -0300 Subject: dt-bindings: display: mediatek,od: Add mediatek,gce-client-reg property Currently, users of Mediatek OD (display overdrive) DT bindings set mediatek,gce-client-reg node property, which is missing from the DT schema. For example, device tree arch/arm64/boot/dts/mediatek/mt8173.dtsi is causing the following dtb check error: arch/arm64/boot/dts/mediatek/mt8173-elm.dtb: od@14023000 (mediatek,mt8173-disp-od): 'mediatek,gce-client-reg' does not match any of the regexes: '^pinctrl-[0-9]+$' This commit adds the missing node property in the DT schema and updates the example as well. Signed-off-by: Ariel D'Alessandro Link: https://lore.kernel.org/r/20250911151001.108744-6-ariel.dalessandro@collabora.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/display/mediatek/mediatek,od.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml index 71534febd49c..930c088a722a 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml @@ -60,6 +60,18 @@ properties: - port@0 - port@1 + mediatek,gce-client-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: describes how to locate the GCE client register + items: + - items: + - description: Phandle reference to a Mediatek GCE Mailbox + - description: + GCE subsys id mapping to a client defined in header + include/dt-bindings/gce/-gce.h. + - description: offset for the GCE register offset + - description: size of the GCE register offset + required: - compatible - reg @@ -70,6 +82,7 @@ additionalProperties: false examples: - | #include + #include soc { #address-cells = <2>; @@ -79,5 +92,6 @@ examples: compatible = "mediatek,mt8173-disp-od"; reg = <0 0x14023000 0 0x1000>; clocks = <&mmsys CLK_MM_DISP_OD>; + mediatek,gce-client-reg = <&gce SUBSYS_1402XXXX 0x3000 0x1000>; }; }; -- cgit v1.2.3 From 2ad572d3a5b340770672aee9aa3c4941d3df737d Mon Sep 17 00:00:00 2001 From: Ariel D'Alessandro Date: Thu, 11 Sep 2025 12:09:55 -0300 Subject: dt-bindings: display: mediatek,ufoe: Add mediatek,gce-client-reg property Currently, users of Mediatek UFOe (Unified Frame Optimization engine) DT bindings set mediatek,gce-client-reg node property, which is missing from the DT schema. For example, device tree arch/arm64/boot/dts/mediatek/mt8173.dtsi is causing the following dtb check error: arch/arm64/boot/dts/mediatek/mt8173-elm.dtb: ufoe@1401a000 (mediatek,mt8173-disp-ufoe): 'mediatek,gce-client-reg' does not match any of the regexes: '^pinctrl-[0-9]+$' This commit adds the missing node property in the DT schema and updates the example as well. Signed-off-by: Ariel D'Alessandro Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250911151001.108744-7-ariel.dalessandro@collabora.com Signed-off-by: Rob Herring (Arm) --- .../bindings/display/mediatek/mediatek,ufoe.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml index 61a5e22effbf..036a66ed42e7 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml @@ -64,6 +64,18 @@ properties: - port@0 - port@1 + mediatek,gce-client-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: describes how to locate the GCE client register + items: + - items: + - description: Phandle reference to a Mediatek GCE Mailbox + - description: + GCE subsys id mapping to a client defined in header + include/dt-bindings/gce/-gce.h. + - description: offset for the GCE register offset + - description: size of the GCE register offset + required: - compatible - reg @@ -77,7 +89,9 @@ examples: - | #include #include + #include #include + soc { #address-cells = <2>; #size-cells = <2>; @@ -88,5 +102,6 @@ examples: interrupts = ; power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_UFOE>; + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xa000 0x1000>; }; }; -- cgit v1.2.3 From 11f8652b7112ee2deba436045ef9b847cbb415a6 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 21 Aug 2025 13:06:40 -0500 Subject: dt-bindings: arm: Add Arm C1 cores and PMUs Add the newly introduced Arm C1-Nano/Pro/Premium/Ultra core and PMU compatible strings. These cores are part of the Lumex CSS. The new names are replacing the long lived Cortex-A/X branding going forward. Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 4 ++++ Documentation/devicetree/bindings/arm/pmu.yaml | 4 ++++ 2 files changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 41ad4ed0e74c..c1036dcfc912 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -123,6 +123,10 @@ properties: - arm,arm1176jzf-s - arm,arm11mpcore - arm,armv8 # Only for s/w models + - arm,c1-nano + - arm,c1-premium + - arm,c1-pro + - arm,c1-ultra - arm,cortex-a5 - arm,cortex-a7 - arm,cortex-a8 diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml index 9bb109e947dd..f47baaefcdac 100644 --- a/Documentation/devicetree/bindings/arm/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/pmu.yaml @@ -28,6 +28,10 @@ properties: - arm,arm1136-pmu - arm,arm1176-pmu - arm,arm11mpcore-pmu + - arm,c1-nano-pmu + - arm,c1-premium-pmu + - arm,c1-pro-pmu + - arm,c1-ultra-pmu - arm,cortex-a5-pmu - arm,cortex-a7-pmu - arm,cortex-a8-pmu -- cgit v1.2.3 From 537e189f2708864e21c9be7109e1f454b956370c Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 9 Sep 2025 09:21:59 -0500 Subject: dt-bindings: watchdog: Convert nuvoton,npcm-wdt to DT schema Convert the Nuvoton watchdog binding to DT schema format. It's a straight-forward conversion. Acked-by: Guenter Roeck Link: https://lore.kernel.org/r/20250909142201.3209482-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/watchdog/nuvoton,npcm-wdt.txt | 30 ----------- .../bindings/watchdog/nuvoton,npcm750-wdt.yaml | 60 ++++++++++++++++++++++ 2 files changed, 60 insertions(+), 30 deletions(-) delete mode 100644 Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt create mode 100644 Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt deleted file mode 100644 index 866a958b8a2b..000000000000 --- a/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt +++ /dev/null @@ -1,30 +0,0 @@ -Nuvoton NPCM Watchdog - -Nuvoton NPCM timer module provides five 24-bit timer counters, and a watchdog. -The watchdog supports a pre-timeout interrupt that fires 10ms before the -expiry. - -Required properties: -- compatible : "nuvoton,npcm750-wdt" for NPCM750 (Poleg), or - "nuvoton,wpcm450-wdt" for WPCM450 (Hermon), or - "nuvoton,npcm845-wdt" for NPCM845 (Arbel). -- reg : Offset and length of the register set for the device. -- interrupts : Contain the timer interrupt with flags for - falling edge. - -Required clocking property, have to be one of: -- clocks : phandle of timer reference clock. -- clock-frequency : The frequency in Hz of the clock that drives the NPCM7xx - timer (usually 25000000). - -Optional properties: -- timeout-sec : Contains the watchdog timeout in seconds - -Example: - -timer@f000801c { - compatible = "nuvoton,npcm750-wdt"; - interrupts = ; - reg = <0xf000801c 0x4>; - clocks = <&clk NPCM7XX_CLK_TIMER>; -}; diff --git a/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml new file mode 100644 index 000000000000..7aa30f5b5c49 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/nuvoton,npcm750-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton NPCM Watchdog + +maintainers: + - Joel Stanley + +description: + Nuvoton NPCM timer module provides five 24-bit timer counters, and a watchdog. + The watchdog supports a pre-timeout interrupt that fires 10ms before the + expiry. + +allOf: + - $ref: watchdog.yaml# + +properties: + compatible: + oneOf: + - enum: + - nuvoton,npcm750-wdt + - nuvoton,wpcm450-wdt + - items: + - enum: + - nuvoton,npcm845-wdt + - const: nuvoton,npcm750-wdt + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-frequency: + description: Frequency in Hz of the clock that drives the NPCM timer. + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include + #include + + watchdog@f000801c { + compatible = "nuvoton,npcm750-wdt"; + interrupts = ; + reg = <0xf000801c 0x4>; + clocks = <&clk NPCM7XX_CLK_TIMER>; + }; -- cgit v1.2.3 From 4e4a4f58bed19e1a3a5a7c3a18ce3b927b76fcd3 Mon Sep 17 00:00:00 2001 From: Chen Wang Date: Fri, 12 Sep 2025 10:35:32 +0800 Subject: dt-bindings: pci: Add Sophgo SG2042 PCIe host Add binding for Sophgo SG2042 PCIe host controller. Signed-off-by: Chen Wang Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/2755f145755b6096247c26852b63671a6fea4dbf.1757643388.git.unicorn_wang@outlook.com --- .../bindings/pci/sophgo,sg2042-pcie-host.yaml | 64 ++++++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml b/Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml new file mode 100644 index 000000000000..f8b7ca57fff1 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/sophgo,sg2042-pcie-host.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo SG2042 PCIe Host (Cadence PCIe Wrapper) + +description: + Sophgo SG2042 PCIe host controller is based on the Cadence PCIe core. + +maintainers: + - Chen Wang + +properties: + compatible: + const: sophgo,sg2042-pcie-host + + reg: + maxItems: 2 + + reg-names: + items: + - const: reg + - const: cfg + + vendor-id: + const: 0x1f1c + + device-id: + const: 0x2042 + + msi-parent: true + +allOf: + - $ref: cdns-pcie-host.yaml# + +required: + - compatible + - reg + - reg-names + +unevaluatedProperties: false + +examples: + - | + #include + + pcie@62000000 { + compatible = "sophgo,sg2042-pcie-host"; + device_type = "pci"; + reg = <0x62000000 0x00800000>, + <0x48000000 0x00001000>; + reg-names = "reg", "cfg"; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x81000000 0 0x00000000 0xde000000 0 0x00010000>, + <0x82000000 0 0xd0400000 0xd0400000 0 0x0d000000>; + bus-range = <0x00 0xff>; + vendor-id = <0x1f1c>; + device-id = <0x2042>; + cdns,no-bar-match-nbits = <48>; + msi-parent = <&msi>; + }; -- cgit v1.2.3 From b90d027afbdde5a0b640586f4cf91cc5cc97a5bc Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 9 Sep 2025 08:49:02 +0300 Subject: dt-bindings: input: maxtouch: add common touchscreen properties Since atmel,maxtouch describes touchscreens too, it should include common touchscreen properties. Signed-off-by: Svyatoslav Ryhel Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250909054903.11519-2-clamor95@gmail.com Signed-off-by: Dmitry Torokhov --- Documentation/devicetree/bindings/input/atmel,maxtouch.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/atmel,maxtouch.yaml b/Documentation/devicetree/bindings/input/atmel,maxtouch.yaml index c40799355ed7..d79b254f1cde 100644 --- a/Documentation/devicetree/bindings/input/atmel,maxtouch.yaml +++ b/Documentation/devicetree/bindings/input/atmel,maxtouch.yaml @@ -16,6 +16,7 @@ description: | allOf: - $ref: input.yaml# + - $ref: touchscreen/touchscreen.yaml# properties: compatible: @@ -95,7 +96,7 @@ required: - reg - interrupts -additionalProperties: false +unevaluatedProperties: false examples: - | -- cgit v1.2.3 From ae28e0b895bb4fa78390ac9ad799a3fcd0ec11d2 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 5 Aug 2025 18:25:00 -0500 Subject: dt-bindings: arm: marvell: Convert marvell,armada-370-xp boards to DT schema Convert Marvell Armada 370/XP based boards to DT schema format. Acked-by: Gregory CLEMENT Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/arm/marvell/98dx3236.txt | 23 ------- .../bindings/arm/marvell/armada-370-xp.txt | 24 ------- .../arm/marvell/marvell,armada-370-xp.yaml | 78 ++++++++++++++++++++++ 3 files changed, 78 insertions(+), 47 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/marvell/98dx3236.txt delete mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-370-xp.txt create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,armada-370-xp.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/marvell/98dx3236.txt b/Documentation/devicetree/bindings/arm/marvell/98dx3236.txt deleted file mode 100644 index 64e8c73fc5ab..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/98dx3236.txt +++ /dev/null @@ -1,23 +0,0 @@ -Marvell 98DX3236, 98DX3336 and 98DX4251 Platforms Device Tree Bindings ----------------------------------------------------------------------- - -Boards with a SoC of the Marvell 98DX3236, 98DX3336 and 98DX4251 families -shall have the following property: - -Required root node property: - -compatible: must contain "marvell,armadaxp-98dx3236" - -In addition, boards using the Marvell 98DX3336 SoC shall have the -following property: - -Required root node property: - -compatible: must contain "marvell,armadaxp-98dx3336" - -In addition, boards using the Marvell 98DX4251 SoC shall have the -following property: - -Required root node property: - -compatible: must contain "marvell,armadaxp-98dx4251" diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-370-xp.txt b/Documentation/devicetree/bindings/arm/marvell/armada-370-xp.txt deleted file mode 100644 index c6ed90ea6e17..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/armada-370-xp.txt +++ /dev/null @@ -1,24 +0,0 @@ -Marvell Armada 370 and Armada XP Platforms Device Tree Bindings ---------------------------------------------------------------- - -Boards with a SoC of the Marvell Armada 370 and Armada XP families -shall have the following property: - -Required root node property: - -compatible: must contain "marvell,armada-370-xp" - -In addition, boards using the Marvell Armada 370 SoC shall have the -following property: - -Required root node property: - -compatible: must contain "marvell,armada370" - -In addition, boards using the Marvell Armada XP SoC shall have the -following property: - -Required root node property: - -compatible: must contain "marvell,armadaxp" - diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,armada-370-xp.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,armada-370-xp.yaml new file mode 100644 index 000000000000..e65eadfbd097 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,armada-370-xp.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +--- +$id: http://devicetree.org/schemas/arm/marvell/marvell,armada-370-xp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 370 and Armada XP platforms + +maintainers: + - Andrew Lunn + - Gregory Clement + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - ctera,c200-v2 + - dlink,dns327l + - globalscale,mirabox + - netgear,readynas-102 + - netgear,readynas-104 + - marvell,a370-db + - marvell,a370-rd + - seagate,dart-2 + - seagate,dart-4 + - seagate,cumulus-max + - seagate,cumulus + - synology,ds213j + - const: marvell,armada370 + - const: marvell,armada-370-xp + + - items: + - enum: + - mikrotik,crs305-1g-4s + - mikrotik,crs326-24g-2s + - mikrotik,crs328-4c-20s-4s + - const: marvell,armadaxp-98dx3236 + - const: marvell,armada-370-xp + + - items: + - const: marvell,db-xc3-24g4xg + - const: marvell,armadaxp-98dx3336 + - const: marvell,armada-370-xp + + - items: + - const: marvell,db-dxbc2 + - const: marvell,armadaxp-98dx4251 + - const: marvell,armada-370-xp + + - items: + - enum: + - lenovo,ix4-300d + - linksys,mamba + - marvell,rd-axpwifiap + - netgear,readynas-2120 + - synology,ds414 + - const: marvell,armadaxp-mv78230 + - const: marvell,armadaxp + - const: marvell,armada-370-xp + + - items: + - const: plathome,openblocks-ax3-4 + - const: marvell,armadaxp-mv78260 + - const: marvell,armadaxp + - const: marvell,armada-370-xp + + - items: + - enum: + - marvell,axp-db + - marvell,axp-gp + - marvell,axp-matrix + - const: marvell,armadaxp-mv78460 + - const: marvell,armadaxp + - const: marvell,armada-370-xp + +additionalProperties: true -- cgit v1.2.3 From abd4ac56f4af01a60922ccdfcbaa6b7dac994a32 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 5 Aug 2025 18:25:12 -0500 Subject: dt-bindings: arm: marvell: Convert marvell,armada375 boards to DT schema Convert Marvell Armada-375 based boards to DT schema format. Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/arm/marvell/armada-375.txt | 9 --------- .../bindings/arm/marvell/marvell,armada375.yaml | 21 +++++++++++++++++++++ 2 files changed, 21 insertions(+), 9 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-375.txt create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,armada375.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-375.txt b/Documentation/devicetree/bindings/arm/marvell/armada-375.txt deleted file mode 100644 index 867d0b80cb8f..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/armada-375.txt +++ /dev/null @@ -1,9 +0,0 @@ -Marvell Armada 375 Platforms Device Tree Bindings -------------------------------------------------- - -Boards with a SoC of the Marvell Armada 375 family shall have the -following property: - -Required root node property: - -compatible: must contain "marvell,armada375" diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,armada375.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,armada375.yaml new file mode 100644 index 000000000000..81c33e46fecc --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,armada375.yaml @@ -0,0 +1,21 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell/marvell,armada375.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 375 Platform + +maintainers: + - Andrew Lunn + - Gregory Clement + +properties: + $nodename: + const: '/' + compatible: + items: + - const: marvell,a375-db + - const: marvell,armada375 + +additionalProperties: true -- cgit v1.2.3 From 3ef9017c373bba536d5e23d535d404525bdcfeb9 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 5 Aug 2025 18:25:17 -0500 Subject: dt-bindings: arm: marvell: Convert marvell,armada390 boards to DT schema Convert Marvell Armada-390 based boards to DT schema format. Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/arm/marvell/armada-39x.txt | 31 --------------------- .../bindings/arm/marvell/marvell,armada390.yaml | 32 ++++++++++++++++++++++ 2 files changed, 32 insertions(+), 31 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-39x.txt create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,armada390.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-39x.txt b/Documentation/devicetree/bindings/arm/marvell/armada-39x.txt deleted file mode 100644 index 89468664f6ea..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/armada-39x.txt +++ /dev/null @@ -1,31 +0,0 @@ -Marvell Armada 39x Platforms Device Tree Bindings -------------------------------------------------- - -Boards with a SoC of the Marvell Armada 39x family shall have the -following property: - -Required root node property: - - - compatible: must contain "marvell,armada390" - -In addition, boards using the Marvell Armada 395 SoC shall have the -following property before the common "marvell,armada390" one: - -Required root node property: - -compatible: must contain "marvell,armada395" - -Example: - -compatible = "marvell,a395-gp", "marvell,armada395", "marvell,armada390"; - -Boards using the Marvell Armada 398 SoC shall have the following -property before the common "marvell,armada390" one: - -Required root node property: - -compatible: must contain "marvell,armada398" - -Example: - -compatible = "marvell,a398-db", "marvell,armada398", "marvell,armada390"; diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,armada390.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,armada390.yaml new file mode 100644 index 000000000000..5ff6a5439525 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,armada390.yaml @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell/marvell,armada390.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 39x Platforms + +maintainers: + - Andrew Lunn + - Gregory Clement + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - const: marvell,a390-db + - const: marvell,armada390 + - items: + - enum: + - marvell,a398-db + - const: marvell,armada398 + - const: marvell,armada390 + - items: + - enum: + - marvell,a395-gp + - const: marvell,armada395 + - const: marvell,armada390 + +additionalProperties: true -- cgit v1.2.3 From 1c5f2ea8ce7f53f1c72980ac312ae1c0c29aa8a5 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 5 Aug 2025 18:25:25 -0500 Subject: dt-bindings: arm: marvell: Convert marvell,kirkwood boards to DT schema Convert Marvell Kirkwood based boards to DT schema format. Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/arm/marvell/kirkwood.txt | 27 --- .../bindings/arm/marvell/marvell,kirkwood.txt | 105 -------- .../bindings/arm/marvell/marvell,kirkwood.yaml | 266 +++++++++++++++++++++ 3 files changed, 266 insertions(+), 132 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/marvell/kirkwood.txt delete mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.txt create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/marvell/kirkwood.txt b/Documentation/devicetree/bindings/arm/marvell/kirkwood.txt deleted file mode 100644 index 98cce9a653eb..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/kirkwood.txt +++ /dev/null @@ -1,27 +0,0 @@ -Marvell Kirkwood Platforms Device Tree Bindings ------------------------------------------------ - -Boards with a SoC of the Marvell Kirkwood -shall have the following property: - -Required root node property: - -compatible: must contain "marvell,kirkwood"; - -In order to support the kirkwood cpufreq driver, there must be a node -cpus/cpu@0 with three clocks, "cpu_clk", "ddrclk" and "powersave", -where the "powersave" clock is a gating clock used to switch the CPU -between the "cpu_clk" and the "ddrclk". - -Example: - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "marvell,sheeva-88SV131"; - clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>; - clock-names = "cpu_clk", "ddrclk", "powersave"; - }; diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.txt deleted file mode 100644 index 7d28fe4bf654..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.txt +++ /dev/null @@ -1,105 +0,0 @@ -Marvell Kirkwood SoC Family Device Tree Bindings ------------------------------------------------- - -Boards with a SoC of the Marvell Kirkwook family, eg 88f6281 - -* Required root node properties: -compatible: must contain "marvell,kirkwood" - -In addition, the above compatible shall be extended with the specific -SoC. Currently known SoC compatibles are: - -"marvell,kirkwood-88f6192" -"marvell,kirkwood-88f6281" -"marvell,kirkwood-88f6282" -"marvell,kirkwood-88f6283" -"marvell,kirkwood-88f6702" -"marvell,kirkwood-98DX4122" - -And in addition, the compatible shall be extended with the specific -board. Currently known boards are: - -"buffalo,linkstation-lsqvl" -"buffalo,linkstation-lsvl" -"buffalo,linkstation-lswsxl" -"buffalo,linkstation-lswxl" -"buffalo,linkstation-lswvl" -"buffalo,lschlv2" -"buffalo,lsxhl" -"buffalo,lsxl" -"cloudengines,pogo02" -"cloudengines,pogoplugv4" -"dlink,dns-320" -"dlink,dns-320-a1" -"dlink,dns-325" -"dlink,dns-325-a1" -"dlink,dns-kirkwood" -"excito,b3" -"globalscale,dreamplug-003-ds2001" -"globalscale,guruplug" -"globalscale,guruplug-server-plus" -"globalscale,sheevaplug" -"globalscale,sheevaplug" -"globalscale,sheevaplug-esata" -"globalscale,sheevaplug-esata-rev13" -"iom,iconnect" -"iom,iconnect-1.1" -"iom,ix2-200" -"keymile,km_kirkwood" -"lacie,cloudbox" -"lacie,inetspace_v2" -"lacie,laplug" -"lacie,nas2big" -"lacie,netspace_lite_v2" -"lacie,netspace_max_v2" -"lacie,netspace_mini_v2" -"lacie,netspace_v2" -"marvell,db-88f6281-bp" -"marvell,db-88f6282-bp" -"marvell,mv88f6281gtw-ge" -"marvell,rd88f6281" -"marvell,rd88f6281" -"marvell,rd88f6281-a0" -"marvell,rd88f6281-a1" -"mpl,cec4" -"mpl,cec4-10" -"netgear,readynas" -"netgear,readynas" -"netgear,readynas-duo-v2" -"netgear,readynas-nv+-v2" -"plathome,openblocks-a6" -"plathome,openblocks-a7" -"raidsonic,ib-nas6210" -"raidsonic,ib-nas6210-b" -"raidsonic,ib-nas6220" -"raidsonic,ib-nas6220-b" -"raidsonic,ib-nas62x0" -"seagate,dockstar" -"seagate,goflexnet" -"synology,ds109" -"synology,ds110jv10" -"synology,ds110jv20" -"synology,ds110jv30" -"synology,ds111" -"synology,ds209" -"synology,ds210jv10" -"synology,ds210jv20" -"synology,ds212" -"synology,ds212jv10" -"synology,ds212jv20" -"synology,ds212pv10" -"synology,ds409" -"synology,ds409slim" -"synology,ds410j" -"synology,ds411" -"synology,ds411j" -"synology,ds411slim" -"synology,ds413jv10" -"synology,rs212" -"synology,rs409" -"synology,rs411" -"synology,rs812" -"usi,topkick" -"usi,topkick-1281P2" -"zyxel,nsa310" -"zyxel,nsa310a" diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.yaml new file mode 100644 index 000000000000..120784066833 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,kirkwood.yaml @@ -0,0 +1,266 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell/marvell,kirkwood.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Kirkwood SoC Family + +maintainers: + - Andrew Lunn + - Gregory Clement + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - qnap,ts219 + - qnap,ts419 + - synology,ds110 + - synology,ds111 + - synology,ds209 + - synology,ds409slim + - synology,ds411j + - synology,ds411slim + - synology,rs212 + - synology,rs409 + - const: marvell,kirkwood + + - items: + - const: synology,ds109 + - const: synology,ds110jv20 + - const: synology,ds110 + - const: marvell,kirkwood + + - items: + - const: synology,ds110jv10 + - const: synology,ds110jv30 + - const: marvell,kirkwood + + - items: + - const: synology,ds210jv10 + - const: synology,ds210jv20 + - const: synology,ds210jv30 + - const: synology,ds211j + - const: marvell,kirkwood + + - items: + - const: synology,ds212jv10 + - const: synology,ds212jv20 + - const: marvell,kirkwood + + - items: + - const: synology,ds212 + - const: synology,ds212pv10 + - const: synology,ds212pv10 + - const: synology,ds212pv20 + - const: synology,ds213airv10 + - const: synology,ds213v10 + - const: marvell,kirkwood + + - items: + - const: synology,ds409 + - const: synology,ds410j + - const: marvell,kirkwood + + - items: + - const: synology,ds411 + - const: synology,ds413jv10 + - const: marvell,kirkwood + + - items: + - const: synology,rs411 + - const: synology,rs812 + - const: marvell,kirkwood + + - items: + - enum: + - cloudengines,pogoplugv4 + - lacie,laplug + - lacie,netspace_lite_v2 + - lacie,netspace_mini_v2 + - marvell,rd88f6192 + - seagate,blackarmor-nas220 + - enum: + - marvell,kirkwood-88f6192 + - const: marvell,kirkwood + + - items: + - enum: + - buffalo,lswsxl + - buffalo,lswxl + - checkpoint,l-50 + - cloudengines,pogoe02 + - ctera,c200-v1 + - dlink,dir-665 + - endian,4i-edge-200 + - excito,b3 + - globalscale,sheevaplug + - hp,t5325 + - iom,ix2-200 + - lacie,inetspace_v2 + - lacie,netspace_v2 + - lacie,netspace_max_v2 + - marvell,db-88f6281-bp + - marvell,mv88f6281gtw-ge + - seagate,dockstar + - seagate,goflexnet + - zyxel,nsa310 + - zyxel,nsa320 + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - enum: + - buffalo,lschlv2 + - buffalo,lsxhl + - const: buffalo,lsxl + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: dlink,dns-320-a1 + - const: dlink,dns-320 + - const: dlink,dns-kirkwood + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: dlink,dns-325-a1 + - const: dlink,dns-325 + - const: dlink,dns-kirkwood + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: globalscale,dreamplug-003-ds2001 + - const: globalscale,dreamplug + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: globalscale,guruplug-server-plus + - const: globalscale,guruplug + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: globalscale,sheevaplug-esata-rev13 + - const: globalscale,sheevaplug-esata + - const: globalscale,sheevaplug + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: iom,iconnect-1.1 + - const: iom,iconnect + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: lacie,d2net_v2 + - const: lacie,netxbig + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + - items: + - enum: + - lacie,net2big_v2 + - lacie,net5big_v2 + - const: lacie,netxbig + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - enum: + - marvell,openrd-base + - marvell,openrd-client + - marvell,openrd-ultimate + - const: marvell,openrd + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - enum: + - marvell,rd88f6281-a + - marvell,rd88f6281-z0 + - const: marvell,rd88f6281 + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: mpl,cec4-10 + - const: mpl,cec4 + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: raidsonic,ib-nas6210-b + - const: raidsonic,ib-nas6220-b + - const: raidsonic,ib-nas6210 + - const: raidsonic,ib-nas6220 + - const: raidsonic,ib-nas62x0 + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - const: zyxel,nsa310a + - const: zyxel,nsa310 + - const: marvell,kirkwood-88f6281 + - const: marvell,kirkwood + + - items: + - enum: + - buffalo,lsqvl + - buffalo,lsvl + - buffalo,lswvl + - linksys,viper + - marvell,db-88f6282-bp + - zyxel,nsa325 + - const: marvell,kirkwood-88f6282 + - const: marvell,kirkwood + + - items: + - const: lacie,nas2big + - const: lacie,netxbig + - const: marvell,kirkwood-88f6282 + - const: marvell,kirkwood + + - items: + - enum: + - netgear,readynas-duo-v2 + - netgear,readynas-nv+-v2 + - const: netgear,readynas + - const: marvell,kirkwood-88f6282 + - const: marvell,kirkwood + + - items: + - const: usi,topkick-1281P2 + - const: usi,topkick + - const: marvell,kirkwood-88f6282 + - const: marvell,kirkwood + + - items: + - enum: + - plathome,openblocks-a6 + - plathome,openblocks-a7 + - const: marvell,kirkwood-88f6283 + - const: marvell,kirkwood + + - items: + - enum: + - lacie,cloudbox + - zyxel,nsa310s + - const: marvell,kirkwood-88f6702 + - const: marvell,kirkwood + + - items: + - enum: + - keymile,km_fixedeth + - keymile,km_kirkwood + - const: marvell,kirkwood-98DX4122 + - const: marvell,kirkwood + +additionalProperties: true -- cgit v1.2.3 From 573a8be749aed8d0744b78d6795cb2d7c20c14be Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 5 Aug 2025 18:25:31 -0500 Subject: dt-bindings: arm: marvell: Convert marvell,dove boards to DT schema Convert Marvell Dove based boards to DT schema format. Signed-off-by: Rob Herring (Arm) --- .../bindings/arm/marvell/marvell,dove.txt | 7 ----- .../bindings/arm/marvell/marvell,dove.yaml | 35 ++++++++++++++++++++++ 2 files changed, 35 insertions(+), 7 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,dove.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt deleted file mode 100644 index e10e8525eabd..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt +++ /dev/null @@ -1,7 +0,0 @@ -Marvell Dove Platforms Device Tree Bindings ------------------------------------------------ - -Boards with a Marvell Dove SoC shall have the following properties: - -Required root node property: -- compatible: must contain "marvell,dove"; diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,dove.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,dove.yaml new file mode 100644 index 000000000000..a37804fb30c4 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,dove.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell/marvell,dove.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Dove SoC + +maintainers: + - Andrew Lunn + - Gregory Clement + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - compulab,cm-a510 + - solidrun,cubox + - globalscale,d2plug + - globalscale,d3plug + - marvell,dove-db + - const: marvell,dove + - items: + - const: solidrun,cubox-es + - const: solidrun,cubox + - const: marvell,dove + - items: + - const: compulab,sbc-a510 + - const: compulab,cm-a510 + - const: marvell,dove + +additionalProperties: true -- cgit v1.2.3 From 3e2518d8b646afe159170422c1c8e072ba7c0798 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 5 Aug 2025 18:25:51 -0500 Subject: dt-bindings: arm: marvell: Convert marvell,orion5x boards to DT schema Convert Marvell Orion5x based boards to DT schema format. Signed-off-by: Rob Herring (Arm) --- .../bindings/arm/marvell/marvell,orion5x.txt | 25 --------------- .../bindings/arm/marvell/marvell,orion5x.yaml | 37 ++++++++++++++++++++++ 2 files changed, 37 insertions(+), 25 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt deleted file mode 100644 index 748a8f287462..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt +++ /dev/null @@ -1,25 +0,0 @@ -Marvell Orion SoC Family Device Tree Bindings ---------------------------------------------- - -Boards with a SoC of the Marvell Orion family, eg 88f5181 - -* Required root node properties: -compatible: must contain "marvell,orion5x" - -In addition, the above compatible shall be extended with the specific -SoC. Currently known SoC compatibles are: - -"marvell,orion5x-88f5181" -"marvell,orion5x-88f5182" - -And in addition, the compatible shall be extended with the specific -board. Currently known boards are: - -"buffalo,lsgl" -"buffalo,lswsgl" -"buffalo,lswtgl" -"lacie,ethernet-disk-mini-v2" -"lacie,d2-network" -"marvell,rd-88f5182-nas" -"maxtor,shared-storage-2" -"netgear,wnr854t" diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.yaml new file mode 100644 index 000000000000..c0417591b2be --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell/marvell,orion5x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Orion5x SoC Family + +maintainers: + - Andrew Lunn + - Gregory Clement + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - netgear,wnr854t + - const: marvell,orion5x-88f5181 + - const: marvell,orion5x + - items: + - enum: + - buffalo,kurobox-pro + - buffalo,lschl + - buffalo,lsgl + - buffalo,lswsgl + - buffalo,lswtgl + - lacie,ethernet-disk-mini-v2 + - lacie,d2-network + - marvell,rd-88f5182-nas + - maxtor,shared-storage-2 + - const: marvell,orion5x-88f5182 + - const: marvell,orion5x + +additionalProperties: true -- cgit v1.2.3 From b73b8146d7ff68e245525adb944a4c998d423d59 Mon Sep 17 00:00:00 2001 From: Alasdair McWilliam Date: Wed, 17 Sep 2025 10:55:42 +0100 Subject: rtnetlink: add needed_{head,tail}room attributes Various network interface types make use of needed_{head,tail}room values to efficiently reserve buffer space for additional encapsulation headers, such as VXLAN, Geneve, IPSec, etc. However, it is not currently possible to query these values in a generic way. Introduce ability to query the needed_{head,tail}room values of a network device via rtnetlink, such that applications that may wish to use these values can do so. For example, Cilium agent iterates over present devices based on user config (direct routing, vxlan, geneve, wireguard etc.) and in future will configure netkit in order to expose the needed_{head,tail}room into K8s pods. See b9ed315d3c4c ("netkit: Allow for configuring needed_{head,tail}room"). Suggested-by: Daniel Borkmann Signed-off-by: Alasdair McWilliam Reviewed-by: Daniel Borkmann Link: https://patch.msgid.link/20250917095543.14039-1-alasdair@mcwilliam.dev Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-link.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-link.yaml b/Documentation/netlink/specs/rt-link.yaml index 6ab31f86854d..2a23e9699c0b 100644 --- a/Documentation/netlink/specs/rt-link.yaml +++ b/Documentation/netlink/specs/rt-link.yaml @@ -1057,6 +1057,12 @@ attribute-sets: - name: netns-immutable type: u8 + - + name: headroom + type: u16 + - + name: tailroom + type: u16 - name: prop-list-link-attrs subset-of: link-attrs -- cgit v1.2.3 From ac28c7598611df3034c0f61d25da7b3377bbce87 Mon Sep 17 00:00:00 2001 From: Julien Massot Date: Tue, 26 Aug 2025 09:39:34 +0200 Subject: dt-bindings: clock: mediatek: Add power-domains property The mt8183-mfgcfg node uses a power domain in its device tree node. To prevent schema validation warnings, add the optional `power-domains` property to the binding schema for mediatek syscon clocks. Fixes: 1781f2c46180 ("arm64: dts: mediatek: mt8183: Add power-domains properity to mfgcfg") Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Julien Massot Acked-by: Rob Herring (Arm) Signed-off-by: Stephen Boyd --- .../devicetree/bindings/clock/mediatek,syscon.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/mediatek,syscon.yaml b/Documentation/devicetree/bindings/clock/mediatek,syscon.yaml index a86a64893c67..a52f90bfc9f9 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,syscon.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,syscon.yaml @@ -76,6 +76,9 @@ properties: - const: mediatek,mt2701-vdecsys - const: syscon + power-domains: + maxItems: 1 + reg: maxItems: 1 @@ -86,6 +89,18 @@ required: - compatible - '#clock-cells' +if: + properties: + compatible: + contains: + const: mediatek,mt8183-mfgcfg +then: + properties: + power-domains: true +else: + properties: + power-domains: false + additionalProperties: false examples: -- cgit v1.2.3 From 24723d7c09ddac90bdd9e9864f92eb43ed70a083 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Mon, 15 Sep 2025 13:15:18 +0200 Subject: dt-bindings: remoteproc: qcom,milos-pas: Document remoteprocs Document the bindings for the ADSP, CDSP, MPSS and WPSS PAS on the Milos (e.g. SM7635) SoC. Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250915-sm7635-remoteprocs-v5-1-96526cac59c6@fairphone.com Signed-off-by: Bjorn Andersson --- .../bindings/remoteproc/qcom,milos-pas.yaml | 198 +++++++++++++++++++++ 1 file changed, 198 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml new file mode 100644 index 000000000000..c47d97004b33 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml @@ -0,0 +1,198 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,milos-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Milos SoC Peripheral Authentication Service + +maintainers: + - Luca Weiss + +description: + Qualcomm Milos SoC Peripheral Authentication Service loads and boots firmware + on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,milos-adsp-pas + - qcom,milos-cdsp-pas + - qcom,milos-mpss-pas + - qcom,milos-wpss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + interrupts: + minItems: 6 + maxItems: 6 + + interrupt-names: + minItems: 6 + maxItems: 6 + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + + firmware-name: + minItems: 1 + items: + - description: Firmware name of the Hexagon core + - description: Firmware name of the Hexagon Devicetree + + memory-region: + minItems: 1 + items: + - description: Memory region for core Firmware authentication + - description: Memory region for Devicetree Firmware authentication + +required: + - compatible + - reg + - memory-region + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,milos-adsp-pas + - qcom,milos-cdsp-pas + then: + properties: + memory-region: + minItems: 2 + firmware-name: + minItems: 2 + else: + properties: + memory-region: + maxItems: 1 + firmware-name: + maxItems: 1 + + - if: + properties: + compatible: + contains: + enum: + - qcom,milos-adsp-pas + then: + properties: + power-domains: + items: + - description: LCX power domain + - description: LMX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + + - if: + properties: + compatible: + enum: + - qcom,milos-cdsp-pas + - qcom,milos-wpss-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MX power domain + power-domain-names: + items: + - const: cx + - const: mx + + - if: + properties: + compatible: + enum: + - qcom,milos-mpss-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MSS power domain + power-domain-names: + items: + - const: cx + - const: mss + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #include + + remoteproc@3000000 { + compatible = "qcom,milos-adsp-pas"; + reg = <0x03000000 0x10000>; + + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", + "fatal", + "ready", + "handover", + "stop-ack", + "shutdown-ack"; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + power-domains = <&rpmhpd RPMHPD_LCX>, + <&rpmhpd RPMHPD_LMX>; + power-domain-names = "lcx", + "lmx"; + + interconnects = <&lpass_ag_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + + memory-region = <&adspslpi_mem>, <&q6_adsp_dtb_mem>; + + firmware-name = "qcom/milos/vendor/device/adsp.mbn", + "qcom/milos/vendor/device/adsp_dtb.mbn"; + + qcom,qmp = <&aoss_qmp>; + + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + + /* ... */ + }; + }; -- cgit v1.2.3 From dd240e95f1bee671f58148dea25e3be7cb39b50d Mon Sep 17 00:00:00 2001 From: Laura Nao Date: Mon, 15 Sep 2025 17:19:29 +0200 Subject: dt-bindings: clock: mediatek: Describe MT8196 clock controllers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Introduce binding documentation for system clocks, functional clocks, and PEXTP0/1 and UFS reset controllers on MediaTek MT8196. This binding also includes a handle to the hardware voter, a fixed-function MCU designed to aggregate votes from the application processor and other remote processors to manage clocks and power domains. The HWV on MT8196/MT6991 is incomplete and requires software to manually enable power supplies, parent clocks, and FENC, as well as write to both the HWV MMIO and the controller registers. Because of these constraints, the HWV cannot be modeled using generic clock, power domain, or interconnect APIs. Instead, a custom phandle is exceptionally used to provide direct, syscon-like register access to drivers. Reviewed-by: Nícolas F. R. A. Prado Co-developed-by: AngeloGioacchino Del Regno Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski Signed-off-by: Laura Nao Signed-off-by: Stephen Boyd --- .../bindings/clock/mediatek,mt8196-clock.yaml | 112 +++++++++++++++++++++ .../bindings/clock/mediatek,mt8196-sys-clock.yaml | 107 ++++++++++++++++++++ 2 files changed, 219 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt8196-clock.yaml create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt8196-sys-clock.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8196-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8196-clock.yaml new file mode 100644 index 000000000000..bfdbd2e4a167 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8196-clock.yaml @@ -0,0 +1,112 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/mediatek,mt8196-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Functional Clock Controller for MT8196 + +maintainers: + - Guangjie Song + - Laura Nao + +description: | + The clock architecture in MediaTek SoCs is structured like below: + PLLs --> + dividers --> + muxes + --> + clock gate + + The device nodes provide clock gate control in different IP blocks. + +properties: + compatible: + items: + - enum: + - mediatek,mt8196-imp-iic-wrap-c + - mediatek,mt8196-imp-iic-wrap-e + - mediatek,mt8196-imp-iic-wrap-n + - mediatek,mt8196-imp-iic-wrap-w + - mediatek,mt8196-mdpsys0 + - mediatek,mt8196-mdpsys1 + - mediatek,mt8196-pericfg-ao + - mediatek,mt8196-pextp0cfg-ao + - mediatek,mt8196-pextp1cfg-ao + - mediatek,mt8196-ufscfg-ao + - mediatek,mt8196-vencsys + - mediatek,mt8196-vencsys-c1 + - mediatek,mt8196-vencsys-c2 + - mediatek,mt8196-vdecsys + - mediatek,mt8196-vdecsys-soc + - mediatek,mt8196-vdisp-ao + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + description: + Reset lines for PEXTP0/1 and UFS blocks. + + mediatek,hardware-voter: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + Phandle to the "Hardware Voter" (HWV), as named in the vendor + documentation for MT8196/MT6991. + + The HWV is a SoC-internal fixed-function MCU used to collect votes from + both the Application Processor and other remote processors within the SoC. + It is intended to transparently enable or disable hardware resources (such + as power domains or clocks) based on internal vote aggregation handled by + the MCU's internal state machine. + + However, in practice, this design is incomplete. While the HWV performs + some internal vote aggregation,software is still required to + - Manually enable power supplies externally, if present and if required + - Manually enable parent clocks via direct MMIO writes to clock controllers + - Enable the FENC after the clock has been ungated via direct MMIO + writes to clock controllers + + As such, the HWV behaves more like a hardware-managed clock reference + counter than a true voter. Furthermore, it is not a separate + controller. It merely serves as an alternative interface to the same + underlying clock or power controller. Actual control still requires + direct access to the controller's own MMIO register space, in + addition to writing to the HWV's MMIO region. + + For this reason, a custom phandle is used here - drivers need to directly + access the HWV MMIO region in a syscon-like fashion, due to how the + hardware is wired. This differs from true hardware voting systems, which + typically do not require custom phandles and rely instead on generic APIs + (clocks, power domains, interconnects). + + The name "hardware-voter" is retained to match vendor documentation, but + this should not be reused or misunderstood as a proper voting mechanism. + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + - | + pericfg_ao: clock-controller@16640000 { + compatible = "mediatek,mt8196-pericfg-ao", "syscon"; + reg = <0x16640000 0x1000>; + mediatek,hardware-voter = <&scp_hwv>; + #clock-cells = <1>; + }; + - | + pextp0cfg_ao: clock-controller@169b0000 { + compatible = "mediatek,mt8196-pextp0cfg-ao", "syscon"; + reg = <0x169b0000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8196-sys-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8196-sys-clock.yaml new file mode 100644 index 000000000000..660ab64f390d --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8196-sys-clock.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/mediatek,mt8196-sys-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek System Clock Controller for MT8196 + +maintainers: + - Guangjie Song + - Laura Nao + +description: | + The clock architecture in MediaTek SoCs is structured like below: + PLLs --> + dividers --> + muxes + --> + clock gate + + The apmixedsys, apmixedsys_gp2, vlpckgen, armpll, ccipll, mfgpll and ptppll + provide most of the PLLs which are generated from the SoC's 26MHZ crystal oscillator. + The topckgen, topckgen_gp2 and vlpckgen provide dividers and muxes which + provide the clock source to other IP blocks. + +properties: + compatible: + items: + - enum: + - mediatek,mt8196-apmixedsys + - mediatek,mt8196-armpll-b-pll-ctrl + - mediatek,mt8196-armpll-bl-pll-ctrl + - mediatek,mt8196-armpll-ll-pll-ctrl + - mediatek,mt8196-apmixedsys-gp2 + - mediatek,mt8196-ccipll-pll-ctrl + - mediatek,mt8196-mfgpll-pll-ctrl + - mediatek,mt8196-mfgpll-sc0-pll-ctrl + - mediatek,mt8196-mfgpll-sc1-pll-ctrl + - mediatek,mt8196-ptppll-pll-ctrl + - mediatek,mt8196-topckgen + - mediatek,mt8196-topckgen-gp2 + - mediatek,mt8196-vlpckgen + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + mediatek,hardware-voter: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + Phandle to the "Hardware Voter" (HWV), as named in the vendor + documentation for MT8196/MT6991. + + The HWV is a SoC-internal fixed-function MCU used to collect votes from + both the Application Processor and other remote processors within the SoC. + It is intended to transparently enable or disable hardware resources (such + as power domains or clocks) based on internal vote aggregation handled by + the MCU's internal state machine. + + However, in practice, this design is incomplete. While the HWV performs + some internal vote aggregation,software is still required to + - Manually enable power supplies externally, if present and if required + - Manually enable parent clocks via direct MMIO writes to clock controllers + - Enable the FENC after the clock has been ungated via direct MMIO + writes to clock controllers + + As such, the HWV behaves more like a hardware-managed clock reference + counter than a true voter. Furthermore, it is not a separate + controller. It merely serves as an alternative interface to the same + underlying clock or power controller. Actual control still requires + direct access to the controller's own MMIO register space, in + addition to writing to the HWV's MMIO region. + + For this reason, a custom phandle is used here - drivers need to directly + access the HWV MMIO region in a syscon-like fashion, due to how the + hardware is wired. This differs from true hardware voting systems, which + typically do not require custom phandles and rely instead on generic APIs + (clocks, power domains, interconnects). + + The name "hardware-voter" is retained to match vendor documentation, but + this should not be reused or misunderstood as a proper voting mechanism. + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + - | + apmixedsys_clk: syscon@10000800 { + compatible = "mediatek,mt8196-apmixedsys", "syscon"; + reg = <0x10000800 0x1000>; + #clock-cells = <1>; + }; + - | + topckgen: syscon@10000000 { + compatible = "mediatek,mt8196-topckgen", "syscon"; + reg = <0x10000000 0x800>; + mediatek,hardware-voter = <&scp_hwv>; + #clock-cells = <1>; + }; + -- cgit v1.2.3 From b52297f6eb82e46ae5ecc34d270e7ed96eca0594 Mon Sep 17 00:00:00 2001 From: Raphael Gallais-Pou Date: Fri, 12 Sep 2025 13:36:12 +0200 Subject: dt-bindings: clock: st: flexgen: remove deprecated compatibles st/stih407-clock.dtsi file has been removed in commit 65322c1daf51 ("clk: st: flexgen: remove unused compatible"). This file has three compatibles which are now dangling. Remove them from documentation. Signed-off-by: Raphael Gallais-Pou Reviewed-by: Brian Masney Reviewed-by: Patrice Chotard Acked-by: Rob Herring (Arm) Signed-off-by: Stephen Boyd --- Documentation/devicetree/bindings/clock/st/st,flexgen.txt | 3 --- 1 file changed, 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/st/st,flexgen.txt b/Documentation/devicetree/bindings/clock/st/st,flexgen.txt index c918075405ba..a9d1c19f30a3 100644 --- a/Documentation/devicetree/bindings/clock/st/st,flexgen.txt +++ b/Documentation/devicetree/bindings/clock/st/st,flexgen.txt @@ -64,12 +64,9 @@ Required properties: audio use case) "st,flexgen-video", "st,flexgen" (enable clock propagation on parent and activate synchronous mode) - "st,flexgen-stih407-a0" "st,flexgen-stih410-a0" - "st,flexgen-stih407-c0" "st,flexgen-stih410-c0" "st,flexgen-stih418-c0" - "st,flexgen-stih407-d0" "st,flexgen-stih410-d0" "st,flexgen-stih407-d2" "st,flexgen-stih418-d2" -- cgit v1.2.3 From 49f6c8b74d9a20c0dd16bd75c93b981a3d420a37 Mon Sep 17 00:00:00 2001 From: Gabriel Fernandez Date: Wed, 25 Jun 2025 11:07:24 +0200 Subject: dt-bindings: stm32: add STM32MP21 clocks and reset bindings Adds clock and reset binding entries for STM32MP21 SoC family. Signed-off-by: Nicolas Le Bayon Reviewed-by: Conor Dooley Signed-off-by: Gabriel Fernandez Signed-off-by: Stephen Boyd --- .../bindings/clock/st,stm32mp21-rcc.yaml | 199 +++++++++++++++++++++ 1 file changed, 199 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/st,stm32mp21-rcc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/st,stm32mp21-rcc.yaml b/Documentation/devicetree/bindings/clock/st,stm32mp21-rcc.yaml new file mode 100644 index 000000000000..4368063c6709 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/st,stm32mp21-rcc.yaml @@ -0,0 +1,199 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/st,stm32mp21-rcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STM32MP21 Reset Clock Controller + +maintainers: + - Gabriel Fernandez + +description: | + The RCC hardware block is both a reset and a clock controller. + RCC makes also power management (resume/suspend). + + See also: + include/dt-bindings/clock/st,stm32mp21-rcc.h + include/dt-bindings/reset/st,stm32mp21-rcc.h + +properties: + compatible: + enum: + - st,stm32mp21-rcc + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + clocks: + items: + - description: CK_SCMI_HSE High Speed External oscillator (8 to 48 MHz) + - description: CK_SCMI_HSI High Speed Internal oscillator (~ 64 MHz) + - description: CK_SCMI_MSI Low Power Internal oscillator (~ 4 MHz or ~ 16 MHz) + - description: CK_SCMI_LSE Low Speed External oscillator (32 KHz) + - description: CK_SCMI_LSI Low Speed Internal oscillator (~ 32 KHz) + - description: CK_SCMI_HSE_DIV2 CK_SCMI_HSE divided by 2 (could be gated) + - description: CK_SCMI_ICN_HS_MCU High Speed interconnect bus clock + - description: CK_SCMI_ICN_LS_MCU Low Speed interconnect bus clock + - description: CK_SCMI_ICN_SDMMC SDMMC interconnect bus clock + - description: CK_SCMI_ICN_DDR DDR interconnect bus clock + - description: CK_SCMI_ICN_DISPLAY Display interconnect bus clock + - description: CK_SCMI_ICN_HSL HSL interconnect bus clock + - description: CK_SCMI_ICN_NIC NIC interconnect bus clock + - description: CK_SCMI_FLEXGEN_07 flexgen clock 7 + - description: CK_SCMI_FLEXGEN_08 flexgen clock 8 + - description: CK_SCMI_FLEXGEN_09 flexgen clock 9 + - description: CK_SCMI_FLEXGEN_10 flexgen clock 10 + - description: CK_SCMI_FLEXGEN_11 flexgen clock 11 + - description: CK_SCMI_FLEXGEN_12 flexgen clock 12 + - description: CK_SCMI_FLEXGEN_13 flexgen clock 13 + - description: CK_SCMI_FLEXGEN_14 flexgen clock 14 + - description: CK_SCMI_FLEXGEN_16 flexgen clock 16 + - description: CK_SCMI_FLEXGEN_17 flexgen clock 17 + - description: CK_SCMI_FLEXGEN_18 flexgen clock 18 + - description: CK_SCMI_FLEXGEN_19 flexgen clock 19 + - description: CK_SCMI_FLEXGEN_20 flexgen clock 20 + - description: CK_SCMI_FLEXGEN_21 flexgen clock 21 + - description: CK_SCMI_FLEXGEN_22 flexgen clock 22 + - description: CK_SCMI_FLEXGEN_23 flexgen clock 23 + - description: CK_SCMI_FLEXGEN_24 flexgen clock 24 + - description: CK_SCMI_FLEXGEN_25 flexgen clock 25 + - description: CK_SCMI_FLEXGEN_26 flexgen clock 26 + - description: CK_SCMI_FLEXGEN_27 flexgen clock 27 + - description: CK_SCMI_FLEXGEN_29 flexgen clock 29 + - description: CK_SCMI_FLEXGEN_30 flexgen clock 30 + - description: CK_SCMI_FLEXGEN_31 flexgen clock 31 + - description: CK_SCMI_FLEXGEN_33 flexgen clock 33 + - description: CK_SCMI_FLEXGEN_36 flexgen clock 36 + - description: CK_SCMI_FLEXGEN_37 flexgen clock 37 + - description: CK_SCMI_FLEXGEN_38 flexgen clock 38 + - description: CK_SCMI_FLEXGEN_39 flexgen clock 39 + - description: CK_SCMI_FLEXGEN_40 flexgen clock 40 + - description: CK_SCMI_FLEXGEN_41 flexgen clock 41 + - description: CK_SCMI_FLEXGEN_42 flexgen clock 42 + - description: CK_SCMI_FLEXGEN_43 flexgen clock 43 + - description: CK_SCMI_FLEXGEN_44 flexgen clock 44 + - description: CK_SCMI_FLEXGEN_45 flexgen clock 45 + - description: CK_SCMI_FLEXGEN_46 flexgen clock 46 + - description: CK_SCMI_FLEXGEN_47 flexgen clock 47 + - description: CK_SCMI_FLEXGEN_48 flexgen clock 48 + - description: CK_SCMI_FLEXGEN_50 flexgen clock 50 + - description: CK_SCMI_FLEXGEN_51 flexgen clock 51 + - description: CK_SCMI_FLEXGEN_52 flexgen clock 52 + - description: CK_SCMI_FLEXGEN_53 flexgen clock 53 + - description: CK_SCMI_FLEXGEN_54 flexgen clock 54 + - description: CK_SCMI_FLEXGEN_55 flexgen clock 55 + - description: CK_SCMI_FLEXGEN_56 flexgen clock 56 + - description: CK_SCMI_FLEXGEN_57 flexgen clock 57 + - description: CK_SCMI_FLEXGEN_58 flexgen clock 58 + - description: CK_SCMI_FLEXGEN_61 flexgen clock 61 + - description: CK_SCMI_FLEXGEN_62 flexgen clock 62 + - description: CK_SCMI_FLEXGEN_63 flexgen clock 63 + - description: CK_SCMI_ICN_APB1 Peripheral bridge 1 + - description: CK_SCMI_ICN_APB2 Peripheral bridge 2 + - description: CK_SCMI_ICN_APB3 Peripheral bridge 3 + - description: CK_SCMI_ICN_APB4 Peripheral bridge 4 + - description: CK_SCMI_ICN_APB5 Peripheral bridge 5 + - description: CK_SCMI_ICN_APBDBG Peripheral bridge for debug + - description: CK_SCMI_TIMG1 Peripheral bridge for timer1 + - description: CK_SCMI_TIMG2 Peripheral bridge for timer2 + + access-controllers: + maxItems: 1 + +required: + - compatible + - reg + - '#clock-cells' + - '#reset-cells' + - clocks + +additionalProperties: false + +examples: + - | + #include + + clock-controller@44200000 { + compatible = "st,stm32mp21-rcc"; + reg = <0x44200000 0x10000>; + #clock-cells = <1>; + #reset-cells = <1>; + clocks = <&scmi_clk CK_SCMI_HSE>, + <&scmi_clk CK_SCMI_HSI>, + <&scmi_clk CK_SCMI_MSI>, + <&scmi_clk CK_SCMI_LSE>, + <&scmi_clk CK_SCMI_LSI>, + <&scmi_clk CK_SCMI_HSE_DIV2>, + <&scmi_clk CK_SCMI_ICN_HS_MCU>, + <&scmi_clk CK_SCMI_ICN_LS_MCU>, + <&scmi_clk CK_SCMI_ICN_SDMMC>, + <&scmi_clk CK_SCMI_ICN_DDR>, + <&scmi_clk CK_SCMI_ICN_DISPLAY>, + <&scmi_clk CK_SCMI_ICN_HSL>, + <&scmi_clk CK_SCMI_ICN_NIC>, + <&scmi_clk CK_SCMI_FLEXGEN_07>, + <&scmi_clk CK_SCMI_FLEXGEN_08>, + <&scmi_clk CK_SCMI_FLEXGEN_09>, + <&scmi_clk CK_SCMI_FLEXGEN_10>, + <&scmi_clk CK_SCMI_FLEXGEN_11>, + <&scmi_clk CK_SCMI_FLEXGEN_12>, + <&scmi_clk CK_SCMI_FLEXGEN_13>, + <&scmi_clk CK_SCMI_FLEXGEN_14>, + <&scmi_clk CK_SCMI_FLEXGEN_16>, + <&scmi_clk CK_SCMI_FLEXGEN_17>, + <&scmi_clk CK_SCMI_FLEXGEN_18>, + <&scmi_clk CK_SCMI_FLEXGEN_19>, + <&scmi_clk CK_SCMI_FLEXGEN_20>, + <&scmi_clk CK_SCMI_FLEXGEN_21>, + <&scmi_clk CK_SCMI_FLEXGEN_22>, + <&scmi_clk CK_SCMI_FLEXGEN_23>, + <&scmi_clk CK_SCMI_FLEXGEN_24>, + <&scmi_clk CK_SCMI_FLEXGEN_25>, + <&scmi_clk CK_SCMI_FLEXGEN_26>, + <&scmi_clk CK_SCMI_FLEXGEN_27>, + <&scmi_clk CK_SCMI_FLEXGEN_29>, + <&scmi_clk CK_SCMI_FLEXGEN_30>, + <&scmi_clk CK_SCMI_FLEXGEN_31>, + <&scmi_clk CK_SCMI_FLEXGEN_33>, + <&scmi_clk CK_SCMI_FLEXGEN_36>, + <&scmi_clk CK_SCMI_FLEXGEN_37>, + <&scmi_clk CK_SCMI_FLEXGEN_38>, + <&scmi_clk CK_SCMI_FLEXGEN_39>, + <&scmi_clk CK_SCMI_FLEXGEN_40>, + <&scmi_clk CK_SCMI_FLEXGEN_41>, + <&scmi_clk CK_SCMI_FLEXGEN_42>, + <&scmi_clk CK_SCMI_FLEXGEN_43>, + <&scmi_clk CK_SCMI_FLEXGEN_44>, + <&scmi_clk CK_SCMI_FLEXGEN_45>, + <&scmi_clk CK_SCMI_FLEXGEN_46>, + <&scmi_clk CK_SCMI_FLEXGEN_47>, + <&scmi_clk CK_SCMI_FLEXGEN_48>, + <&scmi_clk CK_SCMI_FLEXGEN_50>, + <&scmi_clk CK_SCMI_FLEXGEN_51>, + <&scmi_clk CK_SCMI_FLEXGEN_52>, + <&scmi_clk CK_SCMI_FLEXGEN_53>, + <&scmi_clk CK_SCMI_FLEXGEN_54>, + <&scmi_clk CK_SCMI_FLEXGEN_55>, + <&scmi_clk CK_SCMI_FLEXGEN_56>, + <&scmi_clk CK_SCMI_FLEXGEN_57>, + <&scmi_clk CK_SCMI_FLEXGEN_58>, + <&scmi_clk CK_SCMI_FLEXGEN_61>, + <&scmi_clk CK_SCMI_FLEXGEN_62>, + <&scmi_clk CK_SCMI_FLEXGEN_63>, + <&scmi_clk CK_SCMI_ICN_APB1>, + <&scmi_clk CK_SCMI_ICN_APB2>, + <&scmi_clk CK_SCMI_ICN_APB3>, + <&scmi_clk CK_SCMI_ICN_APB4>, + <&scmi_clk CK_SCMI_ICN_APB5>, + <&scmi_clk CK_SCMI_ICN_APBDBG>, + <&scmi_clk CK_SCMI_TIMG1>, + <&scmi_clk CK_SCMI_TIMG2>; + }; +... -- cgit v1.2.3 From 099760708aa37737663086ce28145f8d386564f3 Mon Sep 17 00:00:00 2001 From: Gabriel Fernandez Date: Wed, 25 Jun 2025 11:07:26 +0200 Subject: dt-bindings: stm32: cosmetic fixes for STM32MP25 clock and reset bindings - drop minItems from access-controllers - remove rcc label from example - fixes typos - remove double '::' from 'See also::' Acked-by: Conor Dooley Signed-off-by: Gabriel Fernandez Signed-off-by: Stephen Boyd --- .../devicetree/bindings/clock/st,stm32mp25-rcc.yaml | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml b/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml index 88e52f10d1ec..1e3b5d218bb0 100644 --- a/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml +++ b/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml @@ -11,9 +11,9 @@ maintainers: description: | The RCC hardware block is both a reset and a clock controller. - RCC makes also power management (resume/supend). + RCC makes also power management (resume/suspend). - See also:: + See also: include/dt-bindings/clock/st,stm32mp25-rcc.h include/dt-bindings/reset/st,stm32mp25-rcc.h @@ -38,7 +38,7 @@ properties: - description: CK_SCMI_MSI Low Power Internal oscillator (~ 4 MHz or ~ 16 MHz) - description: CK_SCMI_LSE Low Speed External oscillator (32 KHz) - description: CK_SCMI_LSI Low Speed Internal oscillator (~ 32 KHz) - - description: CK_SCMI_HSE_DIV2 CK_SCMI_HSE divided by 2 (coud be gated) + - description: CK_SCMI_HSE_DIV2 CK_SCMI_HSE divided by 2 (could be gated) - description: CK_SCMI_ICN_HS_MCU High Speed interconnect bus clock - description: CK_SCMI_ICN_LS_MCU Low Speed interconnect bus clock - description: CK_SCMI_ICN_SDMMC SDMMC interconnect bus clock @@ -108,15 +108,14 @@ properties: - description: CK_SCMI_ICN_APB2 Peripheral bridge 2 - description: CK_SCMI_ICN_APB3 Peripheral bridge 3 - description: CK_SCMI_ICN_APB4 Peripheral bridge 4 - - description: CK_SCMI_ICN_APBDBG Peripheral bridge for degub + - description: CK_SCMI_ICN_APBDBG Peripheral bridge for debug - description: CK_SCMI_TIMG1 Peripheral bridge for timer1 - description: CK_SCMI_TIMG2 Peripheral bridge for timer2 - description: CK_SCMI_PLL3 PLL3 clock - description: clk_dsi_txbyte DSI byte clock access-controllers: - minItems: 1 - maxItems: 2 + maxItems: 1 required: - compatible @@ -131,7 +130,7 @@ examples: - | #include - rcc: clock-controller@44200000 { + clock-controller@44200000 { compatible = "st,stm32mp25-rcc"; reg = <0x44200000 0x10000>; #clock-cells = <1>; -- cgit v1.2.3 From b92ef17f0c0b9ba8d913b092deee4d2914526007 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andr=C3=A9=20Draszik?= Date: Wed, 30 Jul 2025 10:31:34 +0100 Subject: dt-bindings: clock: samsung,s2mps11: add s2mpg10 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Samsung S2MPG10 clock controller is similar to the existing clock controllers supported by this binding. Register offsets / layout are slightly different, so it needs its own compatible. Acked-by: Stephen Boyd Acked-by: Rob Herring (Arm) Signed-off-by: André Draszik Signed-off-by: Stephen Boyd --- Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml b/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml index d5296e6053a1..91d455155a60 100644 --- a/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml @@ -25,6 +25,7 @@ description: | properties: compatible: enum: + - samsung,s2mpg10-clk - samsung,s2mps11-clk - samsung,s2mps13-clk # S2MPS13 and S2MPS15 - samsung,s2mps14-clk -- cgit v1.2.3 From 793e6b74806eea39da26f2fb7e4b640608d9598d Mon Sep 17 00:00:00 2001 From: Yao Zi Date: Fri, 19 Sep 2025 14:26:42 +0000 Subject: dt-bindings: clock: loongson2: Add Loongson-2K0300 compatible Document the clock controller shipped in Loongson-2K0300 SoC, which generates various clock signals for SoC peripherals. Differing from previous generations of SoCs, LS2K0300 requires a 120MHz external clock input. Signed-off-by: Yao Zi Reviewed-by: Krzysztof Kozlowski Reviewed-by: Yanteng Si Signed-off-by: Stephen Boyd --- .../devicetree/bindings/clock/loongson,ls2k-clk.yaml | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/loongson,ls2k-clk.yaml b/Documentation/devicetree/bindings/clock/loongson,ls2k-clk.yaml index 4f79cdb417ab..c07ad1f85857 100644 --- a/Documentation/devicetree/bindings/clock/loongson,ls2k-clk.yaml +++ b/Documentation/devicetree/bindings/clock/loongson,ls2k-clk.yaml @@ -16,6 +16,7 @@ description: | properties: compatible: enum: + - loongson,ls2k0300-clk - loongson,ls2k0500-clk - loongson,ls2k-clk # This is for Loongson-2K1000 - loongson,ls2k2000-clk @@ -24,8 +25,7 @@ properties: maxItems: 1 clocks: - items: - - description: 100m ref + maxItems: 1 clock-names: items: @@ -38,11 +38,23 @@ properties: ID in its "clocks" phandle cell. See include/dt-bindings/clock/loongson,ls2k-clk.h for the full list of Loongson-2 SoC clock IDs. +allOf: + - if: + properties: + compatible: + contains: + const: loongson,ls2k0300-clk + then: + properties: + clock-names: false + else: + required: + - clock-names + required: - compatible - reg - clocks - - clock-names - '#clock-cells' additionalProperties: false -- cgit v1.2.3 From 2ccd9fecd9163f168761d4398564c81554f636ef Mon Sep 17 00:00:00 2001 From: Johannes Weiner Date: Fri, 29 Aug 2025 17:15:27 +0100 Subject: mm: remove unused zpool layer With zswap using zsmalloc directly, there are no more in-tree users of this code. Remove it. With zpool gone, zsmalloc is now always a simple dependency and no longer something the user needs to configure. Hide CONFIG_ZSMALLOC from the user and have zswap and zram pull it in as needed. Link: https://lkml.kernel.org/r/20250829162212.208258-3-hannes@cmpxchg.org Signed-off-by: Johannes Weiner Acked-by: SeongJae Park Acked-by: Yosry Ahmed Cc: Chengming Zhou Cc: Nhat Pham Cc: Vitaly Wool Signed-off-by: Andrew Morton --- Documentation/admin-guide/mm/zswap.rst | 33 ++++++++-------------- Documentation/core-api/mm-api.rst | 1 - Documentation/driver-api/crypto/iaa/iaa-crypto.rst | 2 -- 3 files changed, 12 insertions(+), 24 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/mm/zswap.rst b/Documentation/admin-guide/mm/zswap.rst index fd3370aa43fe..283d77217c6f 100644 --- a/Documentation/admin-guide/mm/zswap.rst +++ b/Documentation/admin-guide/mm/zswap.rst @@ -53,26 +53,17 @@ Zswap receives pages for compression from the swap subsystem and is able to evict pages from its own compressed pool on an LRU basis and write them back to the backing swap device in the case that the compressed pool is full. -Zswap makes use of zpool for the managing the compressed memory pool. Each -allocation in zpool is not directly accessible by address. Rather, a handle is +Zswap makes use of zsmalloc for the managing the compressed memory pool. Each +allocation in zsmalloc is not directly accessible by address. Rather, a handle is returned by the allocation routine and that handle must be mapped before being accessed. The compressed memory pool grows on demand and shrinks as compressed -pages are freed. The pool is not preallocated. By default, a zpool -of type selected in ``CONFIG_ZSWAP_ZPOOL_DEFAULT`` Kconfig option is created, -but it can be overridden at boot time by setting the ``zpool`` attribute, -e.g. ``zswap.zpool=zsmalloc``. It can also be changed at runtime using the sysfs -``zpool`` attribute, e.g.:: - - echo zsmalloc > /sys/module/zswap/parameters/zpool - -The zsmalloc type zpool has a complex compressed page storage method, and it -can achieve great storage densities. +pages are freed. The pool is not preallocated. When a swap page is passed from swapout to zswap, zswap maintains a mapping -of the swap entry, a combination of the swap type and swap offset, to the zpool -handle that references that compressed swap page. This mapping is achieved -with a red-black tree per swap type. The swap offset is the search key for the -tree nodes. +of the swap entry, a combination of the swap type and swap offset, to the +zsmalloc handle that references that compressed swap page. This mapping is +achieved with a red-black tree per swap type. The swap offset is the search +key for the tree nodes. During a page fault on a PTE that is a swap entry, the swapin code calls the zswap load function to decompress the page into the page allocated by the page @@ -96,11 +87,11 @@ attribute, e.g.:: echo lzo > /sys/module/zswap/parameters/compressor -When the zpool and/or compressor parameter is changed at runtime, any existing -compressed pages are not modified; they are left in their own zpool. When a -request is made for a page in an old zpool, it is uncompressed using its -original compressor. Once all pages are removed from an old zpool, the zpool -and its compressor are freed. +When the compressor parameter is changed at runtime, any existing compressed +pages are not modified; they are left in their own pool. When a request is +made for a page in an old pool, it is uncompressed using its original +compressor. Once all pages are removed from an old pool, the pool and its +compressor are freed. Some of the pages in zswap are same-value filled pages (i.e. contents of the page have same value or repetitive pattern). These pages include zero-filled diff --git a/Documentation/core-api/mm-api.rst b/Documentation/core-api/mm-api.rst index 5063179cfc70..68193a4cfcf5 100644 --- a/Documentation/core-api/mm-api.rst +++ b/Documentation/core-api/mm-api.rst @@ -118,7 +118,6 @@ More Memory Management Functions .. kernel-doc:: mm/memremap.c .. kernel-doc:: mm/hugetlb.c .. kernel-doc:: mm/swap.c -.. kernel-doc:: mm/zpool.c .. kernel-doc:: mm/memcontrol.c .. #kernel-doc:: mm/memory-tiers.c (build warnings) .. kernel-doc:: mm/shmem.c diff --git a/Documentation/driver-api/crypto/iaa/iaa-crypto.rst b/Documentation/driver-api/crypto/iaa/iaa-crypto.rst index 8e50b900d51c..f815d4fd8372 100644 --- a/Documentation/driver-api/crypto/iaa/iaa-crypto.rst +++ b/Documentation/driver-api/crypto/iaa/iaa-crypto.rst @@ -476,7 +476,6 @@ Use the following commands to enable zswap:: # echo 0 > /sys/module/zswap/parameters/enabled # echo 50 > /sys/module/zswap/parameters/max_pool_percent # echo deflate-iaa > /sys/module/zswap/parameters/compressor - # echo zsmalloc > /sys/module/zswap/parameters/zpool # echo 1 > /sys/module/zswap/parameters/enabled # echo 100 > /proc/sys/vm/swappiness # echo never > /sys/kernel/mm/transparent_hugepage/enabled @@ -625,7 +624,6 @@ the 'fixed' compression mode:: echo 0 > /sys/module/zswap/parameters/enabled echo 50 > /sys/module/zswap/parameters/max_pool_percent echo deflate-iaa > /sys/module/zswap/parameters/compressor - echo zsmalloc > /sys/module/zswap/parameters/zpool echo 1 > /sys/module/zswap/parameters/enabled echo 100 > /proc/sys/vm/swappiness -- cgit v1.2.3 From 31d8edb535bd6b387c55650c245b09fcfeaef768 Mon Sep 17 00:00:00 2001 From: Yeoreum Yun Date: Tue, 16 Sep 2025 23:27:54 +0100 Subject: kasan/hw-tags: introduce kasan.write_only option Patch series "introduce kasan.write_only option in hw-tags", v8. Hardware tag based KASAN is implemented using the Memory Tagging Extension (MTE) feature. MTE is built on top of the ARMv8.0 virtual address tagging TBI (Top Byte Ignore) feature and allows software to access a 4-bit allocation tag for each 16-byte granule in the physical address space. A logical tag is derived from bits 59-56 of the virtual address used for the memory access. A CPU with MTE enabled will compare the logical tag against the allocation tag and potentially raise an tag check fault on mismatch, subject to system registers configuration. Since ARMv8.9, FEAT_MTE_STORE_ONLY can be used to restrict raise of tag check fault on store operation only. Using this feature (FEAT_MTE_STORE_ONLY), introduce KASAN write-only mode which restricts KASAN check write (store) operation only. This mode omits KASAN check for read (fetch/load) operation. Therefore, it might be used not only debugging purpose but also in normal environment. This patch (of 2): Since Armv8.9, FEATURE_MTE_STORE_ONLY feature is introduced to restrict raise of tag check fault on store operation only. Introduce KASAN write only mode based on this feature. KASAN write only mode restricts KASAN checks operation for write only and omits the checks for fetch/read operations when accessing memory. So it might be used not only debugging enviroment but also normal enviroment to check memory safty. This features can be controlled with "kasan.write_only" arguments. When "kasan.write_only=on", KASAN checks write operation only otherwise KASAN checks all operations. This changes the MTE_STORE_ONLY feature as BOOT_CPU_FEATURE like ARM64_MTE_ASYMM so that makes it initialise in kasan_init_hw_tags() with other function together. Link: https://lkml.kernel.org/r/20250916222755.466009-1-yeoreum.yun@arm.com Link: https://lkml.kernel.org/r/20250916222755.466009-2-yeoreum.yun@arm.com Signed-off-by: Yeoreum Yun Reviewed-by: Catalin Marinas Reviewed-by: Andrey Ryabinin Cc: Alexander Potapenko Cc: Andrey Konovalov Cc: Ard Biesheuvel Cc: Breno Leitao Cc: David Hildenbrand Cc: Dmitriy Vyukov Cc: D Scott Phillips Cc: Hardevsinh Palaniya Cc: James Morse Cc: John Hubbard Cc: Jonathan Corbet Cc: Kalesh Singh Cc: levi.yun Cc: Marc Zyngier Cc: Mark Brown Cc: Oliver Upton Cc: Pankaj Gupta Cc: Vincenzo Frascino Cc: Will Deacon Cc: Yang Shi Signed-off-by: Andrew Morton --- Documentation/dev-tools/kasan.rst | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/dev-tools/kasan.rst b/Documentation/dev-tools/kasan.rst index 0a1418ab72fd..a034700da7c4 100644 --- a/Documentation/dev-tools/kasan.rst +++ b/Documentation/dev-tools/kasan.rst @@ -143,6 +143,9 @@ disabling KASAN altogether or controlling its features: Asymmetric mode: a bad access is detected synchronously on reads and asynchronously on writes. +- ``kasan.write_only=off`` or ``kasan.write_only=on`` controls whether KASAN + checks the write (store) accesses only or all accesses (default: ``off``). + - ``kasan.vmalloc=off`` or ``=on`` disables or enables tagging of vmalloc allocations (default: ``on``). -- cgit v1.2.3 From 69e0a3b490030d8d9e628ea69bdb3ff0010a0bb7 Mon Sep 17 00:00:00 2001 From: Baolin Wang Date: Wed, 3 Sep 2025 16:54:24 +0800 Subject: mm: shmem: fix the strategy for the tmpfs 'huge=' options After commit acd7ccb284b8 ("mm: shmem: add large folio support for tmpfs"), we have extended tmpfs to allow any sized large folios, rather than just PMD-sized large folios. The strategy discussed previously was: : Considering that tmpfs already has the 'huge=' option to control the : PMD-sized large folios allocation, we can extend the 'huge=' option to : allow any sized large folios. The semantics of the 'huge=' mount option : are: : : huge=never: no any sized large folios : huge=always: any sized large folios : huge=within_size: like 'always' but respect the i_size : huge=advise: like 'always' if requested with madvise() : : Note: for tmpfs mmap() faults, due to the lack of a write size hint, still : allocate the PMD-sized huge folios if huge=always/within_size/advise is : set. : : Moreover, the 'deny' and 'force' testing options controlled by : '/sys/kernel/mm/transparent_hugepage/shmem_enabled', still retain the same : semantics. The 'deny' can disable any sized large folios for tmpfs, while : the 'force' can enable PMD sized large folios for tmpfs. This means that when tmpfs is mounted with 'huge=always' or 'huge=within_size', tmpfs will allow getting a highest order hint based on the size of write() and fallocate() paths. It will then try each allowable large order, rather than continually attempting to allocate PMD-sized large folios as before. However, this might break some user scenarios for those who want to use PMD-sized large folios, such as the i915 driver which did not supply a write size hint when allocating shmem [1]. Moreover, Hugh also complained that this will cause a regression in userspace with 'huge=always' or 'huge=within_size'. So, let's revisit the strategy for tmpfs large page allocation. A simple fix would be to always try PMD-sized large folios first, and if that fails, fall back to smaller large folios. This approach differs from the strategy for large folio allocation used by other file systems, however, tmpfs is somewhat different from other file systems, as quoted from David's opinion: : There were opinions in the past that tmpfs should just behave like any : other fs, and I think that's what we tried to satisfy here: use the write : size as an indication. : : I assume there will be workloads where either approach will be beneficial. : I also assume that workloads that use ordinary fs'es could benefit from : the same strategy (start with PMD), while others will clearly not. Link: https://lkml.kernel.org/r/10e7ac6cebe6535c137c064d5c5a235643eebb4a.1756888965.git.baolin.wang@linux.alibaba.com Link: https://lore.kernel.org/lkml/0d734549d5ed073c80b11601da3abdd5223e1889.1753689802.git.baolin.wang@linux.alibaba.com/ [1] Fixes: acd7ccb284b8 ("mm: shmem: add large folio support for tmpfs") Signed-off-by: Baolin Wang Cc: Barry Song Cc: David Hildenbrand Cc: Dev Jain Cc: Hugh Dickins Cc: Liam Howlett Cc: Lorenzo Stoakes Cc: Mariano Pache Cc: Matthew Wilcox (Oracle) Cc: Ryan Roberts Cc: Zi Yan Signed-off-by: Andrew Morton --- Documentation/admin-guide/mm/transhuge.rst | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/mm/transhuge.rst b/Documentation/admin-guide/mm/transhuge.rst index a16a04841b96..1654211cc6cf 100644 --- a/Documentation/admin-guide/mm/transhuge.rst +++ b/Documentation/admin-guide/mm/transhuge.rst @@ -419,6 +419,8 @@ option: ``huge=``. It can have following values: always Attempt to allocate huge pages every time we need a new page; + Always try PMD-sized huge pages first, and fall back to smaller-sized + huge pages if the PMD-sized huge page allocation fails; never Do not allocate huge pages. Note that ``madvise(..., MADV_COLLAPSE)`` @@ -426,7 +428,9 @@ never is specified everywhere; within_size - Only allocate huge page if it will be fully within i_size. + Only allocate huge page if it will be fully within i_size; + Always try PMD-sized huge pages first, and fall back to smaller-sized + huge pages if the PMD-sized huge page allocation fails; Also respect madvise() hints; advise -- cgit v1.2.3 From 87cc51571a7790f50151c4fdca10c43aa18a29ba Mon Sep 17 00:00:00 2001 From: Chris Li Date: Wed, 17 Sep 2025 00:00:46 +0800 Subject: docs/mm: add document for swap table Patch series "mm, swap: introduce swap table as swap cache (phase I)", v4. This is the first phase of the bigger series implementing basic infrastructures for the Swap Table idea proposed at the LSF/MM/BPF topic "Integrate swap cache, swap maps with swap allocator" [1]. To give credit where it is due, this is based on Chris Li's idea and a prototype of using cluster size atomic arrays to implement swap cache. This phase I contains 15 patches, introduces the swap table infrastructure and uses it as the swap cache backend. By doing so, we have up to ~5-20% performance gain in throughput, RPS or build time for benchmark and workload tests. The speed up is due to less contention on the swap cache access and shallower swap cache lookup path. The cluster size is much finer-grained than the 64M address space split, which is removed in this phase I. It also unifies and cleans up the swap code base. Each swap cluster will dynamically allocate the swap table, which is an atomic array to cover every swap slot in the cluster. It replaces the swap cache backed by XArray. In phase I, the static allocated swap_map still co-exists with the swap table. The memory usage is about the same as the original on average. A few exception test cases show about 1% higher in memory usage. In the following phases of the series, swap_map will merge into the swap table without additional memory allocation. It will result in net memory reduction compared to the original swap cache. Testing has shown that phase I has a significant performance improvement from 8c/1G ARM machine to 48c96t/128G x86_64 servers in many practical workloads. The full picture with a summary can be found at [2]. An older bigger series of 28 patches is posted at [3]. vm-scability test: ================== Test with: usemem --init-time -O -y -x -n 31 1G (4G memcg, PMEM as swap) Before: After: System time: 219.12s 158.16s (-27.82%) Sum Throughput: 4767.13 MB/s 6128.59 MB/s (+28.55%) Single process Throughput: 150.21 MB/s 196.52 MB/s (+30.83%) Free latency: 175047.58 us 131411.87 us (-24.92%) usemem --init-time -O -y -x -n 32 1536M (16G memory, global pressure, PMEM as swap) Before: After: System time: 356.16s 284.68s (-20.06%) Sum Throughput: 4648.35 MB/s 5453.52 MB/s (+17.32%) Single process Throughput: 141.63 MB/s 168.35 MB/s (+18.86%) Free latency: 499907.71 us 484977.03 us (-2.99%) This shows an improvement of more than 20% improvement in most readings. Build kernel test: ================== The following result matrix is from building kernel with defconfig on tmpfs with ZSWAP / ZRAM, using different memory pressure and setups. Measuring sys and real time in seconds, less is better (user time is almost identical as expected): -j / Mem | Sys before / after | Real before / after Using 16G ZRAM with memcg limit: 6 / 192M | 9686 / 9472 -2.21% | 2130 / 2096 -1.59% 12 / 256M | 6610 / 6451 -2.41% | 827 / 812 -1.81% 24 / 384M | 5938 / 5701 -3.37% | 414 / 405 -2.17% 48 / 768M | 4696 / 4409 -6.11% | 188 / 182 -3.19% With 64k folio: 24 / 512M | 4222 / 4162 -1.42% | 326 / 321 -1.53% 48 / 1G | 3688 / 3622 -1.79% | 151 / 149 -1.32% With ZSWAP with 3G memcg (using higher limit due to kmem account): 48 / 3G | 603 / 581 -3.65% | 81 / 80 -1.23% Testing extremely high global memory and schedule pressure: Using ZSWAP with 32G NVMEs in a 48c VM that has 4G memory, no memcg limit, system components take up about 1.5G already, using make -j48 to build defconfig: Before: sys time: 2069.53s real time: 135.76s After: sys time: 2021.13s (-2.34%) real time: 134.23s (-1.12%) On another 48c 4G memory VM, using 16G ZRAM as swap, testing make -j48 with same config: Before: sys time: 1756.96s real time: 111.01s After: sys time: 1715.90s (-2.34%) real time: 109.51s (-1.35%) All cases are more or less faster, and no regression even under extremely heavy global memory pressure. Redis / Valkey bench: ===================== The test machine is a ARM64 VM with 1536M memory 12 cores, Redis is set to use 2500M memory, and ZRAM swap size is set to 5G: Testing with: redis-benchmark -r 2000000 -n 2000000 -d 1024 -c 12 -P 32 -t get no BGSAVE with BGSAVE Before: 487576.06 RPS 280016.02 RPS After: 487541.76 RPS (-0.01%) 300155.32 RPS (+7.19%) Testing with: redis-benchmark -r 2500000 -n 2500000 -d 1024 -c 12 -P 32 -t get no BGSAVE with BGSAVE Before: 466789.59 RPS 281213.92 RPS After: 466402.89 RPS (-0.08%) 298411.84 RPS (+6.12%) With BGSAVE enabled, most Redis memory will have a swap count > 1 so swap cache is heavily in use. We can see a about 6% performance gain. No BGSAVE is very slightly slower (<0.1%) due to the higher memory pressure of the co-existence of swap_map and swap table. This will be optimzed into a net gain and up to 20% gain in BGSAVE case in the following phases. HDD swap is also ~40% faster with usemem because we removed an old contention workaround. This patch (of 15): Swap table is the new swap cache. [chrisl@kernel.org: move swap table document, redo swap table size sentence] Link: https://lkml.kernel.org/r/CACePvbXjaUyzB_9RSSSgR6BNvz+L9anvn0vcNf_J0jD7-4Yy6Q@mail.gmail.com Link: https://lkml.kernel.org/r/20250916160100.31545-1-ryncsn@gmail.com Link: https://lore.kernel.org/linux-mm/20250514201729.48420-1-ryncsn@gmail.com/ [3] Link: https://lkml.kernel.org/r/20250916160100.31545-2-ryncsn@gmail.com Link: https://lore.kernel.org/CAMgjq7BvQ0ZXvyLGp2YP96+i+6COCBBJCYmjXHGBnfisCAb8VA@mail.gmail.com [1] Link: https://github.com/ryncsn/linux/tree/kasong/devel/swap-table [2] Signed-off-by: Chris Li Signed-off-by: Kairui Song Suggested-by: Chris Li Cc: Baolin Wang Cc: Baoquan He Cc: Barry Song Cc: David Hildenbrand Cc: "Huang, Ying" Cc: Hugh Dickins Cc: Johannes Weiner Cc: Kemeng Shi Cc: Lorenzo Stoakes Cc: Matthew Wilcox (Oracle) Cc: Nhat Pham Cc: Yosry Ahmed Cc: Zi Yan Cc: kernel test robot Cc: SeongJae Park Signed-off-by: Andrew Morton --- Documentation/mm/index.rst | 1 + Documentation/mm/swap-table.rst | 69 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 70 insertions(+) create mode 100644 Documentation/mm/swap-table.rst (limited to 'Documentation') diff --git a/Documentation/mm/index.rst b/Documentation/mm/index.rst index fb45acba16ac..ba6a8872849b 100644 --- a/Documentation/mm/index.rst +++ b/Documentation/mm/index.rst @@ -20,6 +20,7 @@ see the :doc:`admin guide <../admin-guide/mm/index>`. highmem page_reclaim swap + swap-table page_cache shmfs oom diff --git a/Documentation/mm/swap-table.rst b/Documentation/mm/swap-table.rst new file mode 100644 index 000000000000..da10bb7a0dc3 --- /dev/null +++ b/Documentation/mm/swap-table.rst @@ -0,0 +1,69 @@ +.. SPDX-License-Identifier: GPL-2.0 + +:Author: Chris Li , Kairui Song + +========== +Swap Table +========== + +Swap table implements swap cache as a per-cluster swap cache value array. + +Swap Entry +---------- + +A swap entry contains the information required to serve the anonymous page +fault. + +Swap entry is encoded as two parts: swap type and swap offset. + +The swap type indicates which swap device to use. +The swap offset is the offset of the swap file to read the page data from. + +Swap Cache +---------- + +Swap cache is a map to look up folios using swap entry as the key. The result +value can have three possible types depending on which stage of this swap entry +was in. + +1. NULL: This swap entry is not used. + +2. folio: A folio has been allocated and bound to this swap entry. This is + the transient state of swap out or swap in. The folio data can be in + the folio or swap file, or both. + +3. shadow: The shadow contains the working set information of the swapped + out folio. This is the normal state for a swapped out page. + +Swap Table Internals +-------------------- + +The previous swap cache is implemented by XArray. The XArray is a tree +structure. Each lookup will go through multiple nodes. Can we do better? + +Notice that most of the time when we look up the swap cache, we are either +in a swap in or swap out path. We should already have the swap cluster, +which contains the swap entry. + +If we have a per-cluster array to store swap cache value in the cluster. +Swap cache lookup within the cluster can be a very simple array lookup. + +We give such a per-cluster swap cache value array a name: the swap table. + +A swap table is an array of pointers. Each pointer is the same size as a +PTE. The size of a swap table for one swap cluster typically matches a PTE +page table, which is one page on modern 64-bit systems. + +With swap table, swap cache lookup can achieve great locality, simpler, +and faster. + +Locking +------- + +Swap table modification requires taking the cluster lock. If a folio +is being added to or removed from the swap table, the folio must be +locked prior to the cluster lock. After adding or removing is done, the +folio shall be unlocked. + +Swap table lookup is protected by RCU and atomic read. If the lookup +returns a folio, the user must lock the folio before use. -- cgit v1.2.3 From b9e2f58ffb84afcbba7e66f96ca14f98e0e88f26 Mon Sep 17 00:00:00 2001 From: Suren Baghdasaryan Date: Mon, 15 Sep 2025 16:02:24 -0700 Subject: alloc_tag: mark inaccurate allocation counters in /proc/allocinfo output While rare, memory allocation profiling can contain inaccurate counters if slab object extension vector allocation fails. That allocation might succeed later but prior to that, slab allocations that would have used that object extension vector will not be accounted for. To indicate incorrect counters, "accurate:no" marker is appended to the call site line in the /proc/allocinfo output. Bump up /proc/allocinfo version to reflect the change in the file format and update documentation. Example output with invalid counters: allocinfo - version: 2.0 0 0 arch/x86/kernel/kdebugfs.c:105 func:create_setup_data_nodes 0 0 arch/x86/kernel/alternative.c:2090 func:alternatives_smp_module_add 0 0 arch/x86/kernel/alternative.c:127 func:__its_alloc accurate:no 0 0 arch/x86/kernel/fpu/regset.c:160 func:xstateregs_set 0 0 arch/x86/kernel/fpu/xstate.c:1590 func:fpstate_realloc 0 0 arch/x86/kernel/cpu/aperfmperf.c:379 func:arch_enable_hybrid_capacity_scale 0 0 arch/x86/kernel/cpu/amd_cache_disable.c:258 func:init_amd_l3_attrs 49152 48 arch/x86/kernel/cpu/mce/core.c:2709 func:mce_device_create accurate:no 32768 1 arch/x86/kernel/cpu/mce/genpool.c:132 func:mce_gen_pool_create 0 0 arch/x86/kernel/cpu/mce/amd.c:1341 func:mce_threshold_create_device [surenb@google.com: document new "accurate:no" marker] Fixes: 39d117e04d15 ("alloc_tag: mark inaccurate allocation counters in /proc/allocinfo output") [akpm@linux-foundation.org: simplification per Usama, reflow text] [akpm@linux-foundation.org: add newline to prevent docs warning, per Randy] Link: https://lkml.kernel.org/r/20250915230224.4115531-1-surenb@google.com Signed-off-by: Suren Baghdasaryan Suggested-by: Johannes Weiner Acked-by: Shakeel Butt Acked-by: Usama Arif Acked-by: Johannes Weiner Cc: David Rientjes Cc: David Wang <00107082@163.com> Cc: Kent Overstreet Cc: Pasha Tatashin Cc: Roman Gushchin Cc: Sourav Panda Cc: Vlastimil Babka Signed-off-by: Andrew Morton --- Documentation/filesystems/proc.rst | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/proc.rst b/Documentation/filesystems/proc.rst index 915a3e44bc12..6ffd04c736db 100644 --- a/Documentation/filesystems/proc.rst +++ b/Documentation/filesystems/proc.rst @@ -1009,6 +1009,19 @@ number, module (if originates from a loadable module) and the function calling the allocation. The number of bytes allocated and number of calls at each location are reported. The first line indicates the version of the file, the second line is the header listing fields in the file. +If file version is 2.0 or higher then each line may contain additional +: pairs representing extra information about the call site. +For example if the counters are not accurate, the line will be appended with +"accurate:no" pair. + +Supported markers in v2: +accurate:no + + Absolute values of the counters in this line are not accurate + because of the failure to allocate memory to track some of the + allocations made at this location. Deltas in these counters are + accurate, therefore counters can be used to track allocation size + and count changes. Example output. -- cgit v1.2.3 From 489c5d096e6bdae0742299861c2f6551b73a7823 Mon Sep 17 00:00:00 2001 From: SeongJae Park Date: Mon, 15 Sep 2025 20:23:37 -0700 Subject: Docs/mm/damon/maintainer-profile: update community meetup for reservation requirements DAMON community meetup was having two different kinds of meetups: reservation required ones and unrequired ones. Now the reservation unrequested one is gone, but the documentation on the maintainer-profile is not updated. Update. Link: https://lkml.kernel.org/r/20250916032339.115817-4-sj@kernel.org Signed-off-by: SeongJae Park Reviewed-by: Joshua Hahn Cc: David Hildenbrand Cc: Jonathan Corbet Cc: Liam Howlett Cc: Lorenzo Stoakes Cc: Michal Hocko Cc: Mike Rapoport Cc: Suren Baghdasaryan Cc: Vlastimil Babka Signed-off-by: Andrew Morton --- Documentation/mm/damon/maintainer-profile.rst | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/mm/damon/maintainer-profile.rst b/Documentation/mm/damon/maintainer-profile.rst index 5cd07905a193..58a3fb3c5762 100644 --- a/Documentation/mm/damon/maintainer-profile.rst +++ b/Documentation/mm/damon/maintainer-profile.rst @@ -89,18 +89,13 @@ the maintainer. Community meetup ---------------- -DAMON community is maintaining two bi-weekly meetup series for community -members who prefer synchronous conversations over mails. +DAMON community has a bi-weekly meetup series for members who prefer +synchronous conversations over mails. It is for discussions on specific topics +between a group of members including the maintainer. The maintainer shares the +available time slots, and attendees should reserve one of those at least 24 +hours before the time slot, by reaching out to the maintainer. -The first one is for any discussion between every community member. No -reservation is needed. - -The seconds one is for discussions on specific topics between restricted -members including the maintainer. The maintainer shares the available time -slots, and attendees should reserve one of those at least 24 hours before the -time slot, by reaching out to the maintainer. - -Schedules and available reservation time slots are available at the Google `doc +Schedules and reservation status are available at the Google `doc `_. There is also a public Google `calendar `_ -- cgit v1.2.3 From bff3026320adad29159758f4588cffc2cf5cb4b4 Mon Sep 17 00:00:00 2001 From: SeongJae Park Date: Mon, 15 Sep 2025 20:23:38 -0700 Subject: Docs/admin-guide/mm/damon/start: add --target_pid to DAMOS example command The example command doesn't work [1] on the latest DAMON user-space tool, since --damos_action option is updated to receive multiple arguments, and hence cannot know if the final argument is for deductible monitoring target or an argument for --damos_action option. Add --target_pid option to let damo understand it is for target pid. Link: https://lkml.kernel.org/r/20250916032339.115817-5-sj@kernel.org Link: https://github.com/damonitor/damo/pull/32 [2] Signed-off-by: SeongJae Park Cc: David Hildenbrand Cc: Jonathan Corbet Cc: Joshua Hahn Cc: Liam Howlett Cc: Lorenzo Stoakes Cc: Michal Hocko Cc: Mike Rapoport Cc: Suren Baghdasaryan Cc: Vlastimil Babka Signed-off-by: Andrew Morton --- Documentation/admin-guide/mm/damon/start.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/mm/damon/start.rst b/Documentation/admin-guide/mm/damon/start.rst index ede14b679d02..ec8c34b2d32f 100644 --- a/Documentation/admin-guide/mm/damon/start.rst +++ b/Documentation/admin-guide/mm/damon/start.rst @@ -175,4 +175,4 @@ Below command makes every memory region of size >=4K that has not accessed for $ sudo damo start --damos_access_rate 0 0 --damos_sz_region 4K max \ --damos_age 60s max --damos_action pageout \ - + --target_pid -- cgit v1.2.3 From ab588b78cdb8d677f70278587041a7366b0cff71 Mon Sep 17 00:00:00 2001 From: Akira Yokosawa Date: Sun, 21 Sep 2025 16:26:04 +0900 Subject: docs: dev-tools/lkmm: Fix typo of missing file extension Commit 1e9ddbb2cd34 ("docs: Pull LKMM documentation into dev-tools book") failed to add a file extension in lkmm/docs/herd-representation.rst for referencing its plane-text counterpart. Fix it. Fixes: 1e9ddbb2cd34 ("docs: Pull LKMM documentation into dev-tools book") Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202509192138.fx3H6NzG-lkp@intel.com/ Signed-off-by: Akira Yokosawa Signed-off-by: Jonathan Corbet Message-ID: --- Documentation/dev-tools/lkmm/docs/herd-representation.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/dev-tools/lkmm/docs/herd-representation.rst b/Documentation/dev-tools/lkmm/docs/herd-representation.rst index ebf4a2181cd7..f7b41f286eb9 100644 --- a/Documentation/dev-tools/lkmm/docs/herd-representation.rst +++ b/Documentation/dev-tools/lkmm/docs/herd-representation.rst @@ -3,7 +3,7 @@ herd-representation ------------------- -Literal include of ``tools/memory-model/Documentation/herd-representation``. +Literal include of ``tools/memory-model/Documentation/herd-representation.txt``. ------------------------------------------------------------------ -- cgit v1.2.3 From 22014a23009326ae63efb08575aada1de2c95bda Mon Sep 17 00:00:00 2001 From: Yash Suthar Date: Sun, 21 Sep 2025 00:38:56 +0530 Subject: Documentation/process: submitting-patches: fix typo in "were do" Fixes a typo in submitting-patches.rst: "were do" -> "where do" Signed-off-by: Yash Suthar Acked-by: Randy Dunlap Signed-off-by: Jonathan Corbet Message-ID: <20250920190856.7394-1-yashsuthar983@gmail.com> --- Documentation/process/submitting-patches.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/process/submitting-patches.rst b/Documentation/process/submitting-patches.rst index 5778cb9701e1..910e8fc9e3c8 100644 --- a/Documentation/process/submitting-patches.rst +++ b/Documentation/process/submitting-patches.rst @@ -343,7 +343,7 @@ https://en.wikipedia.org/wiki/Posting_style#Interleaved_style As is frequently quoted on the mailing list:: A: http://en.wikipedia.org/wiki/Top_post - Q: Were do I find info about this thing called top-posting? + Q: Where do I find info about this thing called top-posting? A: Because it messes up the order in which people normally read text. Q: Why is top-posting such a bad thing? A: Top-posting. -- cgit v1.2.3 From 2af8a8a47df36a202c65ce4af93fb8bc7b607210 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 20 Sep 2025 17:22:09 +0200 Subject: docs: remove cdomain.py This is not used anymore, as it was a logic we had to support pre Sphinx 3.x, as shown at: afde706afde2 ("Make the docs build "work" with Sphinx 3.x") Remove it. Fixes: b26717852db7 ("docs: conf.py: drop backward support for old Sphinx versions") Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Message-ID: <3b86d236c64af17924e4cfedbbfb8bc60059802f.1758381727.git.mchehab+huawei@kernel.org> --- Documentation/sphinx/cdomain.py | 247 ---------------------------------------- 1 file changed, 247 deletions(-) delete mode 100644 Documentation/sphinx/cdomain.py (limited to 'Documentation') diff --git a/Documentation/sphinx/cdomain.py b/Documentation/sphinx/cdomain.py deleted file mode 100644 index 3dc285dc70f5..000000000000 --- a/Documentation/sphinx/cdomain.py +++ /dev/null @@ -1,247 +0,0 @@ -# -*- coding: utf-8; mode: python -*- -# SPDX-License-Identifier: GPL-2.0 -# pylint: disable=W0141,C0113,C0103,C0325 -""" - cdomain - ~~~~~~~ - - Replacement for the sphinx c-domain. - - :copyright: Copyright (C) 2016 Markus Heiser - :license: GPL Version 2, June 1991 see Linux/COPYING for details. - - List of customizations: - - * Moved the *duplicate C object description* warnings for function - declarations in the nitpicky mode. See Sphinx documentation for - the config values for ``nitpick`` and ``nitpick_ignore``. - - * Add option 'name' to the "c:function:" directive. With option 'name' the - ref-name of a function can be modified. E.g.:: - - .. c:function:: int ioctl( int fd, int request ) - :name: VIDIOC_LOG_STATUS - - The func-name (e.g. ioctl) remains in the output but the ref-name changed - from 'ioctl' to 'VIDIOC_LOG_STATUS'. The function is referenced by:: - - * :c:func:`VIDIOC_LOG_STATUS` or - * :any:`VIDIOC_LOG_STATUS` (``:any:`` needs sphinx 1.3) - - * Handle signatures of function-like macros well. Don't try to deduce - arguments types of function-like macros. - -""" - -from docutils import nodes -from docutils.parsers.rst import directives - -import sphinx -from sphinx import addnodes -from sphinx.domains.c import c_funcptr_sig_re, c_sig_re -from sphinx.domains.c import CObject as Base_CObject -from sphinx.domains.c import CDomain as Base_CDomain -from itertools import chain -import re - -__version__ = '1.1' - -# Namespace to be prepended to the full name -namespace = None - -# -# Handle trivial newer c domain tags that are part of Sphinx 3.1 c domain tags -# - Store the namespace if ".. c:namespace::" tag is found -# -RE_namespace = re.compile(r'^\s*..\s*c:namespace::\s*(\S+)\s*$') - -def markup_namespace(match): - global namespace - - namespace = match.group(1) - - return "" - -# -# Handle c:macro for function-style declaration -# -RE_macro = re.compile(r'^\s*..\s*c:macro::\s*(\S+)\s+(\S.*)\s*$') -def markup_macro(match): - return ".. c:function:: " + match.group(1) + ' ' + match.group(2) - -# -# Handle newer c domain tags that are evaluated as .. c:type: for -# backward-compatibility with Sphinx < 3.0 -# -RE_ctype = re.compile(r'^\s*..\s*c:(struct|union|enum|enumerator|alias)::\s*(.*)$') - -def markup_ctype(match): - return ".. c:type:: " + match.group(2) - -# -# Handle newer c domain tags that are evaluated as :c:type: for -# backward-compatibility with Sphinx < 3.0 -# -RE_ctype_refs = re.compile(r':c:(var|struct|union|enum|enumerator)::`([^\`]+)`') -def markup_ctype_refs(match): - return ":c:type:`" + match.group(2) + '`' - -# -# Simply convert :c:expr: and :c:texpr: into a literal block. -# -RE_expr = re.compile(r':c:(expr|texpr):`([^\`]+)`') -def markup_c_expr(match): - return '\\ ``' + match.group(2) + '``\\ ' - -# -# Parse Sphinx 3.x C markups, replacing them by backward-compatible ones -# -def c_markups(app, docname, source): - result = "" - markup_func = { - RE_namespace: markup_namespace, - RE_expr: markup_c_expr, - RE_macro: markup_macro, - RE_ctype: markup_ctype, - RE_ctype_refs: markup_ctype_refs, - } - - lines = iter(source[0].splitlines(True)) - for n in lines: - match_iterators = [regex.finditer(n) for regex in markup_func] - matches = sorted(chain(*match_iterators), key=lambda m: m.start()) - for m in matches: - n = n[:m.start()] + markup_func[m.re](m) + n[m.end():] - - result = result + n - - source[0] = result - -# -# Now implements support for the cdomain namespacing logic -# - -def setup(app): - - # Handle easy Sphinx 3.1+ simple new tags: :c:expr and .. c:namespace:: - app.connect('source-read', c_markups) - app.add_domain(CDomain, override=True) - - return dict( - version = __version__, - parallel_read_safe = True, - parallel_write_safe = True - ) - -class CObject(Base_CObject): - - """ - Description of a C language object. - """ - option_spec = { - "name" : directives.unchanged - } - - def handle_func_like_macro(self, sig, signode): - """Handles signatures of function-like macros. - - If the objtype is 'function' and the signature ``sig`` is a - function-like macro, the name of the macro is returned. Otherwise - ``False`` is returned. """ - - global namespace - - if not self.objtype == 'function': - return False - - m = c_funcptr_sig_re.match(sig) - if m is None: - m = c_sig_re.match(sig) - if m is None: - raise ValueError('no match') - - rettype, fullname, arglist, _const = m.groups() - arglist = arglist.strip() - if rettype or not arglist: - return False - - arglist = arglist.replace('`', '').replace('\\ ', '') # remove markup - arglist = [a.strip() for a in arglist.split(",")] - - # has the first argument a type? - if len(arglist[0].split(" ")) > 1: - return False - - # This is a function-like macro, its arguments are typeless! - signode += addnodes.desc_name(fullname, fullname) - paramlist = addnodes.desc_parameterlist() - signode += paramlist - - for argname in arglist: - param = addnodes.desc_parameter('', '', noemph=True) - # separate by non-breaking space in the output - param += nodes.emphasis(argname, argname) - paramlist += param - - if namespace: - fullname = namespace + "." + fullname - - return fullname - - def handle_signature(self, sig, signode): - """Transform a C signature into RST nodes.""" - - global namespace - - fullname = self.handle_func_like_macro(sig, signode) - if not fullname: - fullname = super(CObject, self).handle_signature(sig, signode) - - if "name" in self.options: - if self.objtype == 'function': - fullname = self.options["name"] - else: - # FIXME: handle :name: value of other declaration types? - pass - else: - if namespace: - fullname = namespace + "." + fullname - - return fullname - - def add_target_and_index(self, name, sig, signode): - # for C API items we add a prefix since names are usually not qualified - # by a module name and so easily clash with e.g. section titles - targetname = 'c.' + name - if targetname not in self.state.document.ids: - signode['names'].append(targetname) - signode['ids'].append(targetname) - signode['first'] = (not self.names) - self.state.document.note_explicit_target(signode) - inv = self.env.domaindata['c']['objects'] - if (name in inv and self.env.config.nitpicky): - if self.objtype == 'function': - if ('c:func', name) not in self.env.config.nitpick_ignore: - self.state_machine.reporter.warning( - 'duplicate C object description of %s, ' % name + - 'other instance in ' + self.env.doc2path(inv[name][0]), - line=self.lineno) - inv[name] = (self.env.docname, self.objtype) - - indextext = self.get_index_text(name) - if indextext: - self.indexnode['entries'].append( - ('single', indextext, targetname, '', None)) - -class CDomain(Base_CDomain): - - """C language domain.""" - name = 'c' - label = 'C' - directives = { - 'function': CObject, - 'member': CObject, - 'macro': CObject, - 'type': CObject, - 'var': CObject, - } -- cgit v1.2.3 From 9cf5b8b69bfccf3d98d31f640244437a452daa80 Mon Sep 17 00:00:00 2001 From: Baojun Xu Date: Sat, 20 Sep 2025 14:20:44 +0800 Subject: ASoC: tas2781: Correct the wrong description and register address on tas2781 Correct the wrong description for TAS257X. Combined TAS5825 with TAS2563, as they use the same register address and number. Correct the register address and number for TAS5827. Fixes: 7095d688de38 ("ASoC: tas2781: Add tas2118, tas2x20, tas5825 support") Signed-off-by: Baojun Xu Acked-by: Mark Brown Signed-off-by: Takashi Iwai --- .../devicetree/bindings/sound/ti,tas2781.yaml | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/ti,tas2781.yaml b/Documentation/devicetree/bindings/sound/ti,tas2781.yaml index 011211112be4..bd00afa47d62 100644 --- a/Documentation/devicetree/bindings/sound/ti,tas2781.yaml +++ b/Documentation/devicetree/bindings/sound/ti,tas2781.yaml @@ -11,11 +11,13 @@ maintainers: - Shenghao Ding description: | - The TAS2118/TAS2X20/TAS257x is mono, digital input Class-D audio + The TAS2118/TAS2X20 is mono, digital input Class-D audio amplifier optimized for efficiently driving high peak power into small loudspeakers. - Integrated speaker voltage and current sense provides for - real time monitoring of loudspeaker behavior. + The TAS257x is mono, digital input Class-D audio amplifier optimized + for efficiently driving high peak power into small loudspeakers. + Integrated speaker voltage and current sense provides for real time + monitoring of loudspeaker behavior. The TAS2563/TAS2781 is a mono, digital input Class-D audio amplifier optimized for efficiently driving high peak power into small loudspeakers. An integrated on-chip DSP supports Texas @@ -25,9 +27,7 @@ description: | The TAS5825/TAS5827 is a stereo, digital input Class-D audio amplifier optimized for efficiently driving high peak power into small loudspeakers. An integrated on-chip DSP supports Texas - Instruments Smart Amp speaker protection algorithm. The - integrated speaker voltage and current sense provides for real time - monitoring of loudspeaker behavior. + Instruments Smart Amp speaker protection algorithm. Specifications about the audio amplifier can be found at: https://www.ti.com/lit/gpn/tas2120 @@ -131,6 +131,7 @@ allOf: contains: enum: - ti,tas2563 + - ti,tas5825 then: properties: reg: @@ -181,15 +182,14 @@ allOf: compatible: contains: enum: - - ti,tas5825 - ti,tas5827 then: properties: reg: - maxItems: 4 + maxItems: 6 items: - minimum: 0x4c - maximum: 0x4f + minimum: 0x60 + maximum: 0x65 additionalProperties: false -- cgit v1.2.3 From f8673e4069b2032bf9f854bae818a7bdbdca7520 Mon Sep 17 00:00:00 2001 From: Stefan Binding Date: Wed, 17 Sep 2025 16:37:11 +0100 Subject: ASoC: dt-bindings: cirrus,cs35l41: Document the cirrus,subsystem-id property Add new property: cirrus,subsystem-id This new property is used to uniquely identify the system if device tree is used, to allow the driver to select the correct firmware and tuning for the system. The DSP driver searches for a compatible firmware (and tuning) based on what it is able to read from the hardware. However, the SSID is based on the system, and cannot be read from the hardware, therefore it needs to be read from the Device Tree. On ACPI-based systems, it is able to read this from the ACPI _SUB property, and to maintain compatibility with the driver between ACPI and Device Tree systems we need an equivalent property. Signed-off-by: Stefan Binding Link: https://patch.msgid.link/20250917153722.94978-2-sbinding@opensource.cirrus.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml index 14dea1feefc5..e6cf2ebcd777 100644 --- a/Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml +++ b/Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml @@ -151,6 +151,12 @@ properties: minimum: 0 maximum: 5 + cirrus,subsystem-id: + $ref: /schemas/types.yaml#/definitions/string + description: + Subsystem ID. If this property is present, it sets the system name, + used to identify the firmware and tuning to load. + required: - compatible - reg -- cgit v1.2.3 From f145845d8348c9b6288df41cb7904fd9fde566dc Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 19 Sep 2025 17:35:31 -0500 Subject: dt-bindings: ata: apm,xgene-ahci: Add apm,xgene-ahci-v2 support The "apm,xgene-ahci-v2" compatible has been in use for a long time, but was undocumented. It doesn't require clocks or phys. Remove the "apm,xgene-ahci-pcie" compatible which isn't used anywhere while we're here. Signed-off-by: Rob Herring (Arm) Signed-off-by: Damien Le Moal --- .../devicetree/bindings/ata/apm,xgene-ahci.yaml | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ata/apm,xgene-ahci.yaml b/Documentation/devicetree/bindings/ata/apm,xgene-ahci.yaml index 7dc942808656..dc631381f9e1 100644 --- a/Documentation/devicetree/bindings/ata/apm,xgene-ahci.yaml +++ b/Documentation/devicetree/bindings/ata/apm,xgene-ahci.yaml @@ -9,14 +9,11 @@ title: APM X-Gene 6.0 Gb/s SATA host controller maintainers: - Rob Herring -allOf: - - $ref: ahci-common.yaml# - properties: compatible: enum: - apm,xgene-ahci - - apm,xgene-ahci-pcie + - apm,xgene-ahci-v2 reg: minItems: 4 @@ -35,12 +32,22 @@ properties: required: - compatible - - clocks - - phys - - phy-names unevaluatedProperties: false +allOf: + - $ref: ahci-common.yaml# + - if: + properties: + compatible: + contains: + const: apm,xgene-ahci + then: + required: + - clocks + - phys + - phy-names + examples: - | sata@1a400000 { -- cgit v1.2.3 From 6f2c65680c336a274b69b1fdcbfa2eeb8159bee8 Mon Sep 17 00:00:00 2001 From: Kajol Jain Date: Mon, 15 Sep 2025 15:59:43 +0530 Subject: docs: ABI: sysfs-bus-event_source-devices-vpa-dtl: Document sysfs event format entries for vpa_dtl pmu Details are added for the vpa_dtl pmu event and format attributes in the ABI documentation. Signed-off-by: Kajol Jain Tested-by: Tejas Manhas Tested-by: Venkat Rao Bagalkote Signed-off-by: Madhavan Srinivasan Link: https://patch.msgid.link/20250915102947.26681-4-atrajeev@linux.ibm.com --- .../testing/sysfs-bus-event_source-devices-vpa-dtl | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-bus-event_source-devices-vpa-dtl (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-vpa-dtl b/Documentation/ABI/testing/sysfs-bus-event_source-devices-vpa-dtl new file mode 100644 index 000000000000..7b7c789a5cf5 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-vpa-dtl @@ -0,0 +1,25 @@ +What: /sys/bus/event_source/devices/vpa_dtl/format +Date: February 2025 +Contact: Linux on PowerPC Developer List +Description: Read-only. Attribute group to describe the magic bits + that go into perf_event_attr.config for a particular pmu. + (See ABI/testing/sysfs-bus-event_source-devices-format). + + Each attribute under this group defines a bit range of the + perf_event_attr.config. Supported attribute are listed + below:: + + event = "config:0-7" - event ID + + For example:: + + dtl_cede = "event=0x1" + +What: /sys/bus/event_source/devices/vpa_dtl/events +Date: February 2025 +Contact: Linux on PowerPC Developer List +Description: (RO) Attribute group to describe performance monitoring events + for the Virtual Processor Dispatch Trace Log. Each attribute in + this group describes a single performance monitoring event + supported by vpa_dtl pmu. The name of the file is the name of + the event (See ABI/testing/sysfs-bus-event_source-devices-events). -- cgit v1.2.3 From 4a774b39e68fac7d6c7c9cffeb6a4ea4b6dc8b41 Mon Sep 17 00:00:00 2001 From: Athira Rajeev Date: Mon, 15 Sep 2025 15:59:47 +0530 Subject: powerpc/perf/vpa-dtl: Add documentation for VPA dispatch trace log PMU Documentation for vpa-dtl (Virtual Processor Area - Dispatch Trace Log) PMU interface. And how it can be used to collect the distrace trace log entries in perf data, how to process/report as part of perf report/perf script. Signed-off-by: Athira Rajeev Tested-by: Tejas Manhas Tested-by: Venkat Rao Bagalkote Signed-off-by: Madhavan Srinivasan Link: https://patch.msgid.link/20250915102947.26681-8-atrajeev@linux.ibm.com --- Documentation/arch/powerpc/index.rst | 1 + Documentation/arch/powerpc/vpa-dtl.rst | 156 +++++++++++++++++++++++++++++++++ 2 files changed, 157 insertions(+) create mode 100644 Documentation/arch/powerpc/vpa-dtl.rst (limited to 'Documentation') diff --git a/Documentation/arch/powerpc/index.rst b/Documentation/arch/powerpc/index.rst index 53fc9f89f3e4..1be2ee3f0361 100644 --- a/Documentation/arch/powerpc/index.rst +++ b/Documentation/arch/powerpc/index.rst @@ -37,6 +37,7 @@ powerpc vas-api vcpudispatch_stats vmemmap_dedup + vpa-dtl features diff --git a/Documentation/arch/powerpc/vpa-dtl.rst b/Documentation/arch/powerpc/vpa-dtl.rst new file mode 100644 index 000000000000..58d0022f993a --- /dev/null +++ b/Documentation/arch/powerpc/vpa-dtl.rst @@ -0,0 +1,156 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. _vpa-dtl: + +=================================== +DTL (Dispatch Trace Log) +=================================== + +Athira Rajeev, 19 April 2025 + +.. contents:: + :depth: 3 + + +Basic overview +============== + +The pseries Shared Processor Logical Partition(SPLPAR) machines can +retrieve a log of dispatch and preempt events from the hypervisor +using data from Disptach Trace Log(DTL) buffer. With this information, +user can retrieve when and why each dispatch & preempt has occurred. +The vpa-dtl PMU exposes the Virtual Processor Area(VPA) DTL counters +via perf. + +Infrastructure used +=================== + +The VPA DTL PMU counters do not interrupt on overflow or generate any +PMI interrupts. Therefore, hrtimer is used to poll the DTL data. The timer +nterval can be provided by user via sample_period field in nano seconds. +vpa dtl pmu has one hrtimer added per vpa-dtl pmu thread. DTL (Dispatch +Trace Log) contains information about dispatch/preempt, enqueue time etc. +We directly copy the DTL buffer data as part of auxiliary buffer and it +will be processed later. This will avoid time taken to create samples +in the kernel space. The PMU driver collecting Dispatch Trace Log (DTL) +entries makes use of AUX support in perf infrastructure. On the tools side, +this data is made available as PERF_RECORD_AUXTRACE records. + +To correlate each DTL entry with other events across CPU's, an auxtrace_queue +is created for each CPU. Each auxtrace queue has a array/list of auxtrace buffers. +All auxtrace queues is maintained in auxtrace heap. The queues are sorted +based on timestamp. When the different PERF_RECORD_XX records are processed, +compare the timestamp of perf record with timestamp of top element in the +auxtrace heap so that DTL events can be co-related with other events +Process the auxtrace queue if the timestamp of element from heap is +lower than timestamp from entry in perf record. Sometimes it could happen that +one buffer is only partially processed. if the timestamp of occurrence of +another event is more than currently processed element in the queue, it will +move on to next perf record. So keep track of position of buffer to continue +processing next time. Update the timestamp of the auxtrace heap with the timestamp +of last processed entry from the auxtrace buffer. + +This infrastructure ensures dispatch trace log entries can be correlated +and presented along with other events like sched. + +vpa-dtl PMU example usage +========================= + +.. code-block:: sh + + # ls /sys/devices/vpa_dtl/ + events format perf_event_mux_interval_ms power subsystem type uevent + + +To capture the DTL data using perf record: +.. code-block:: sh + + # ./perf record -a -e sched:\*,vpa_dtl/dtl_all/ -c 1000000000 sleep 1 + +The result can be interpreted using perf record. Snippet of perf report -D + +.. code-block:: sh + + # ./perf report -D + +There are different PERF_RECORD_XX records. In that records corresponding to +auxtrace buffers includes: + +1. PERF_RECORD_AUX + Conveys that new data is available in AUX area + +2. PERF_RECORD_AUXTRACE_INFO + Describes offset and size of auxtrace data in the buffers + +3. PERF_RECORD_AUXTRACE + This is the record that defines the auxtrace data which here in case of + vpa-dtl pmu is dispatch trace log data. + +Snippet from perf report -D showing the PERF_RECORD_AUXTRACE dump + +.. code-block:: sh + +0 0 0x39b10 [0x30]: PERF_RECORD_AUXTRACE size: 0x690 offset: 0 ref: 0 idx: 0 tid: -1 cpu: 0 +. +. ... VPA DTL PMU data: size 1680 bytes, entries is 35 +. 00000000: boot_tb: 21349649546353231, tb_freq: 512000000 +. 00000030: dispatch_reason:decrementer interrupt, preempt_reason:H_CEDE, enqueue_to_dispatch_time:7064, ready_to_enqueue_time:187, waiting_to_ready_time:6611773 +. 00000060: dispatch_reason:priv doorbell, preempt_reason:H_CEDE, enqueue_to_dispatch_time:146, ready_to_enqueue_time:0, waiting_to_ready_time:15359437 +. 00000090: dispatch_reason:decrementer interrupt, preempt_reason:H_CEDE, enqueue_to_dispatch_time:4868, ready_to_enqueue_time:232, waiting_to_ready_time:5100709 +. 000000c0: dispatch_reason:priv doorbell, preempt_reason:H_CEDE, enqueue_to_dispatch_time:179, ready_to_enqueue_time:0, waiting_to_ready_time:30714243 +. 000000f0: dispatch_reason:priv doorbell, preempt_reason:H_CEDE, enqueue_to_dispatch_time:197, ready_to_enqueue_time:0, waiting_to_ready_time:15350648 +. 00000120: dispatch_reason:priv doorbell, preempt_reason:H_CEDE, enqueue_to_dispatch_time:213, ready_to_enqueue_time:0, waiting_to_ready_time:15353446 +. 00000150: dispatch_reason:priv doorbell, preempt_reason:H_CEDE, enqueue_to_dispatch_time:212, ready_to_enqueue_time:0, waiting_to_ready_time:15355126 +. 00000180: dispatch_reason:decrementer interrupt, preempt_reason:H_CEDE, enqueue_to_dispatch_time:6368, ready_to_enqueue_time:164, waiting_to_ready_time:5104665 + +Above is representation of dtl entry of below format: + +struct dtl_entry { + u8 dispatch_reason; + u8 preempt_reason; + u16 processor_id; + u32 enqueue_to_dispatch_time; + u32 ready_to_enqueue_time; + u32 waiting_to_ready_time; + u64 timebase; + u64 fault_addr; + u64 srr0; + u64 srr1; + +}; + +First two fields represent the dispatch reason and preempt reason. The post +processing of PERF_RECORD_AUXTRACE records will translate to meaningful data +for user to consume. + +Visualize the dispatch trace log entries with perf report +========================================================= + +.. code-block:: sh + + # ./perf record -a -e sched:*,vpa_dtl/dtl_all/ -c 1000000000 sleep 1 + [ perf record: Woken up 1 times to write data ] + [ perf record: Captured and wrote 0.300 MB perf.data ] + + # ./perf report + # Samples: 321 of event 'vpa-dtl' + # Event count (approx.): 321 + # + # Children Self Command Shared Object Symbol + # ........ ........ ....... ................. .............................. + # + 100.00% 100.00% swapper [kernel.kallsyms] [k] plpar_hcall_norets_notrace + +Visualize the dispatch trace log entries with perf script +========================================================= + +.. code-block:: sh + + # ./perf script + migration/9 67 [009] 105373.359903: sched:sched_waking: comm=perf pid=13418 prio=120 target_cpu=009 + migration/9 67 [009] 105373.359904: sched:sched_migrate_task: comm=perf pid=13418 prio=120 orig_cpu=9 dest_cpu=10 + migration/9 67 [009] 105373.359907: sched:sched_stat_runtime: comm=migration/9 pid=67 runtime=4050 [ns] + migration/9 67 [009] 105373.359908: sched:sched_switch: prev_comm=migration/9 prev_pid=67 prev_prio=0 prev_state=S ==> next_comm=swapper/9 next_pid=0 next_prio=120 + :256 256 [016] 105373.359913: vpa-dtl: timebase: 21403600706628832 dispatch_reason:decrementer interrupt, preempt_reason:H_CEDE, enqueue_to_dispatch_time:4854, ready_to_enqueue_time:139, waiting_to_ready_time:511842115 c0000000000fcd28 plpar_hcall_norets_notrace+0x18 ([kernel.kallsyms]) + :256 256 [017] 105373.360012: vpa-dtl: timebase: 21403600706679454 dispatch_reason:priv doorbell, preempt_reason:H_CEDE, enqueue_to_dispatch_time:236, ready_to_enqueue_time:0, waiting_to_ready_time:133864583 c0000000000fcd28 plpar_hcall_norets_notrace+0x18 ([kernel.kallsyms]) + perf 13418 [010] 105373.360048: sched:sched_stat_runtime: comm=perf pid=13418 runtime=139748 [ns] + perf 13418 [010] 105373.360052: sched:sched_waking: comm=migration/10 pid=72 prio=0 target_cpu=010 -- cgit v1.2.3 From 0c33aa1804d101c11ba1992504f17a42233f0e11 Mon Sep 17 00:00:00 2001 From: Mark Rutland Date: Fri, 19 Sep 2025 15:58:29 +0100 Subject: arm64: errata: Apply workarounds for Neoverse-V3AE Neoverse-V3AE is also affected by erratum #3312417, as described in its Software Developer Errata Notice (SDEN) document: Neoverse V3AE (MP172) SDEN v9.0, erratum 3312417 https://developer.arm.com/documentation/SDEN-2615521/9-0/ Enable the workaround for Neoverse-V3AE, and document this. Signed-off-by: Mark Rutland Cc: James Morse Cc: Will Deacon Cc: Catalin Marinas Signed-off-by: Ryan Roberts Signed-off-by: Will Deacon --- Documentation/arch/arm64/silicon-errata.rst | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst index b18ef4064bc0..a7ec57060f64 100644 --- a/Documentation/arch/arm64/silicon-errata.rst +++ b/Documentation/arch/arm64/silicon-errata.rst @@ -200,6 +200,8 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | ARM | Neoverse-V3 | #3312417 | ARM64_ERRATUM_3194386 | +----------------+-----------------+-----------------+-----------------------------+ +| ARM | Neoverse-V3AE | #3312417 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ | ARM | MMU-500 | #841119,826419 | ARM_SMMU_MMU_500_CPRE_ERRATA| | | | #562869,1047329 | | +----------------+-----------------+-----------------+-----------------------------+ -- cgit v1.2.3 From bad11557eed2592c017a06752e58df49080b4a6a Mon Sep 17 00:00:00 2001 From: Koichi Okuno Date: Tue, 9 Sep 2025 12:02:50 +0900 Subject: perf: Fujitsu: Add the Uncore PMU driver This adds a new dynamic PMU to the Perf Events framework to program and control the Uncore PMUs in Fujitsu chips. This driver exports formatting and event information to sysfs so it can be used by the perf user space tools with the syntaxes: perf stat -e pci_iod0_pci0/ea-pci/ ls perf stat -e pci_iod0_pci0/event=0x80/ ls perf stat -e mac_iod0_mac0_ch0/ea-mac/ ls perf stat -e mac_iod0_mac0_ch0/event=0x80/ ls FUJITSU-MONAKA PMU Events Specification v1.1 URL: https://github.com/fujitsu/FUJITSU-MONAKA Reviewed-by: Yicong Yang Signed-off-by: Koichi Okuno Signed-off-by: Will Deacon --- .../admin-guide/perf/fujitsu_uncore_pmu.rst | 110 +++++++++++++++++++++ Documentation/admin-guide/perf/index.rst | 1 + 2 files changed, 111 insertions(+) create mode 100644 Documentation/admin-guide/perf/fujitsu_uncore_pmu.rst (limited to 'Documentation') diff --git a/Documentation/admin-guide/perf/fujitsu_uncore_pmu.rst b/Documentation/admin-guide/perf/fujitsu_uncore_pmu.rst new file mode 100644 index 000000000000..46595b788d3a --- /dev/null +++ b/Documentation/admin-guide/perf/fujitsu_uncore_pmu.rst @@ -0,0 +1,110 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +================================================ +Fujitsu Uncore Performance Monitoring Unit (PMU) +================================================ + +This driver supports the Uncore MAC PMUs and the Uncore PCI PMUs found +in Fujitsu chips. +Each MAC PMU on these chips is exposed as a uncore perf PMU with device name +mac_iod_mac_ch. +And each PCI PMU on these chips is exposed as a uncore perf PMU with device name +pci_iod_pci. + +The driver provides a description of its available events and configuration +options in sysfs, see /sys/bus/event_sources/devices/mac_iod_mac_ch/ +and /sys/bus/event_sources/devices/pci_iod_pci/. +This driver exports: +- formats, used by perf user space and other tools to configure events +- events, used by perf user space and other tools to create events + symbolically, e.g.: + perf stat -a -e mac_iod0_mac0_ch0/event=0x21/ ls + perf stat -a -e pci_iod0_pci0/event=0x24/ ls +- cpumask, used by perf user space and other tools to know on which CPUs + to open the events + +This driver supports the following events for MAC: +- cycles + This event counts MAC cycles at MAC frequency. +- read-count + This event counts the number of read requests to MAC. +- read-count-request + This event counts the number of read requests including retry to MAC. +- read-count-return + This event counts the number of responses to read requests to MAC. +- read-count-request-pftgt + This event counts the number of read requests including retry with PFTGT + flag. +- read-count-request-normal + This event counts the number of read requests including retry without PFTGT + flag. +- read-count-return-pftgt-hit + This event counts the number of responses to read requests which hit the + PFTGT buffer. +- read-count-return-pftgt-miss + This event counts the number of responses to read requests which miss the + PFTGT buffer. +- read-wait + This event counts outstanding read requests issued by DDR memory controller + per cycle. +- write-count + This event counts the number of write requests to MAC (including zero write, + full write, partial write, write cancel). +- write-count-write + This event counts the number of full write requests to MAC (not including + zero write). +- write-count-pwrite + This event counts the number of partial write requests to MAC. +- memory-read-count + This event counts the number of read requests from MAC to memory. +- memory-write-count + This event counts the number of full write requests from MAC to memory. +- memory-pwrite-count + This event counts the number of partial write requests from MAC to memory. +- ea-mac + This event counts energy consumption of MAC. +- ea-memory + This event counts energy consumption of memory. +- ea-memory-mac-write + This event counts the number of write requests from MAC to memory. +- ea-ha + This event counts energy consumption of HA. + + 'ea' is the abbreviation for 'Energy Analyzer'. + +Examples for use with perf:: + + perf stat -e mac_iod0_mac0_ch0/ea-mac/ ls + +And, this driver supports the following events for PCI: +- pci-port0-cycles + This event counts PCI cycles at PCI frequency in port0. +- pci-port0-read-count + This event counts read transactions for data transfer in port0. +- pci-port0-read-count-bus + This event counts read transactions for bus usage in port0. +- pci-port0-write-count + This event counts write transactions for data transfer in port0. +- pci-port0-write-count-bus + This event counts write transactions for bus usage in port0. +- pci-port1-cycles + This event counts PCI cycles at PCI frequency in port1. +- pci-port1-read-count + This event counts read transactions for data transfer in port1. +- pci-port1-read-count-bus + This event counts read transactions for bus usage in port1. +- pci-port1-write-count + This event counts write transactions for data transfer in port1. +- pci-port1-write-count-bus + This event counts write transactions for bus usage in port1. +- ea-pci + This event counts energy consumption of PCI. + + 'ea' is the abbreviation for 'Energy Analyzer'. + +Examples for use with perf:: + + perf stat -e pci_iod0_pci0/ea-pci/ ls + +Given that these are uncore PMUs the driver does not support sampling, therefore +"perf record" will not work. Per-task perf sessions are not supported. diff --git a/Documentation/admin-guide/perf/index.rst b/Documentation/admin-guide/perf/index.rst index 072b510385c4..47d9a3df6329 100644 --- a/Documentation/admin-guide/perf/index.rst +++ b/Documentation/admin-guide/perf/index.rst @@ -29,3 +29,4 @@ Performance monitor support cxl ampere_cspmu mrvl-pem-pmu + fujitsu_uncore_pmu -- cgit v1.2.3 From 272dd0e5e58d9c216771aa4a9dc1e36a662792da Mon Sep 17 00:00:00 2001 From: Yushan Wang Date: Fri, 29 Aug 2025 18:14:26 +0800 Subject: Documentation: hisi-pmu: Fix of minor format error The inline path of sysfs should be placed in literal blocks to make documentation look better. Acked-by: Jonathan Cameron Acked-by: Yicong Yang Signed-off-by: Yushan Wang Signed-off-by: Will Deacon --- Documentation/admin-guide/perf/hisi-pmu.rst | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/perf/hisi-pmu.rst b/Documentation/admin-guide/perf/hisi-pmu.rst index 6f0ea4f641cc..8df048c26498 100644 --- a/Documentation/admin-guide/perf/hisi-pmu.rst +++ b/Documentation/admin-guide/perf/hisi-pmu.rst @@ -18,9 +18,10 @@ HiSilicon SoC uncore PMU driver Each device PMU has separate registers for event counting, control and interrupt, and the PMU driver shall register perf PMU drivers like L3C, HHA and DDRC etc. The available events and configuration options shall -be described in the sysfs, see: +be described in the sysfs, see:: + +/sys/bus/event_source/devices/hisi_sccl{X}_ -/sys/bus/event_source/devices/hisi_sccl{X}_. The "perf list" command shall list the available events from sysfs. Each L3C, HHA and DDRC is registered as a separate PMU with perf. The PMU -- cgit v1.2.3 From 6d2f913fda5683fbd4c3580262e10386c1263dfb Mon Sep 17 00:00:00 2001 From: Yushan Wang Date: Fri, 29 Aug 2025 18:14:27 +0800 Subject: Documentation: hisi-pmu: Add introduction to HiSilicon V3 PMU Some of HiSilicon V3 PMU hardware is divided into parts to fulfill the job of monitoring specific parts of a device. Add description on that as well as the newly added ext option for L3C PMU. Acked-by: Jonathan Cameron Signed-off-by: Yushan Wang Reviewed-by: Yicong Yang Signed-off-by: Will Deacon --- Documentation/admin-guide/perf/hisi-pmu.rst | 33 +++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/perf/hisi-pmu.rst b/Documentation/admin-guide/perf/hisi-pmu.rst index 8df048c26498..c4c2cbbf88cb 100644 --- a/Documentation/admin-guide/perf/hisi-pmu.rst +++ b/Documentation/admin-guide/perf/hisi-pmu.rst @@ -124,6 +124,39 @@ channel with this option. The current supported channels are as follows: 7. tt_en: NoC PMU supports counting only transactions that have tracetag set if this option is set. See the 2nd list for more information about tracetag. +For HiSilicon uncore PMU v3 whose identifier is 0x40, some uncore PMUs are +further divided into parts for finer granularity of tracing, each part has its +own dedicated PMU, and all such PMUs together cover the monitoring job of events +on particular uncore device. Such PMUs are described in sysfs with name format +slightly changed:: + +/sys/bus/event_source/devices/hisi_sccl{X}_ + +Z is the sub-id, indicating different PMUs for part of hardware device. + +Usage of most PMUs with different sub-ids are identical. Specially, L3C PMU +provides ``ext`` option to allow exploration of even finer granual statistics +of L3C PMU. L3C PMU driver uses that as hint of termination when delivering +perf command to hardware: + +- ext=0: Default, could be used with event names. +- ext=1 and ext=2: Must be used with event codes, event names are not supported. + +An example of perf command could be:: + + $# perf stat -a -e hisi_sccl0_l3c1_0/rd_spipe/ sleep 5 + +or:: + + $# perf stat -a -e hisi_sccl0_l3c1_0/event=0x1,ext=1/ sleep 5 + +As above, ``hisi_sccl0_l3c1_0`` locates PMU of Super CPU CLuster 0, L3 cache 1 +pipe0. + +First command locates the first part of L3C since ``ext=0`` is implied by +default. Second command issues the counting on another part of L3C with the +event ``0x1``. + Users could configure IDs to count data come from specific CCL/ICL, by setting srcid_cmd & srcid_msk, and data desitined for specific CCL/ICL by setting tgtid_cmd & tgtid_msk. A set bit in srcid_msk/tgtid_msk means the PMU will not -- cgit v1.2.3 From 86bcd23df9cec9c2df520ae0982033e301d3c184 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Tue, 9 Sep 2025 07:39:52 +0700 Subject: KVM: x86: Fix hypercalls docs section number order Commit 4180bf1b655a79 ("KVM: X86: Implement "send IPI" hypercall") documents KVM_HC_SEND_IPI hypercall, yet its section number duplicates KVM_HC_CLOCK_PAIRING one (which both are 6th). Fix the numbering order so that the former should be 7th. Fixes: 4180bf1b655a ("KVM: X86: Implement "send IPI" hypercall") Signed-off-by: Bagas Sanjaya Reviewed-by: Randy Dunlap Link: https://lore.kernel.org/r/20250909003952.10314-1-bagasdotme@gmail.com Signed-off-by: Sean Christopherson --- Documentation/virt/kvm/x86/hypercalls.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/virt/kvm/x86/hypercalls.rst b/Documentation/virt/kvm/x86/hypercalls.rst index 10db7924720f..521ecf9a8a36 100644 --- a/Documentation/virt/kvm/x86/hypercalls.rst +++ b/Documentation/virt/kvm/x86/hypercalls.rst @@ -137,7 +137,7 @@ compute the CLOCK_REALTIME for its clock, at the same instant. Returns KVM_EOPNOTSUPP if the host does not use TSC clocksource, or if clock type is different than KVM_CLOCK_PAIRING_WALLCLOCK. -6. KVM_HC_SEND_IPI +7. KVM_HC_SEND_IPI ------------------ :Architecture: x86 @@ -158,7 +158,7 @@ corresponds to the APIC ID a2+1, and so on. Returns the number of CPUs to which the IPIs were delivered successfully. -7. KVM_HC_SCHED_YIELD +8. KVM_HC_SCHED_YIELD --------------------- :Architecture: x86 @@ -170,7 +170,7 @@ a0: destination APIC ID :Usage example: When sending a call-function IPI-many to vCPUs, yield if any of the IPI target vCPUs was preempted. -8. KVM_HC_MAP_GPA_RANGE +9. KVM_HC_MAP_GPA_RANGE ------------------------- :Architecture: x86 :Status: active -- cgit v1.2.3 From c9809f03c158f07eaa76c7dd3606fc0a184520f2 Mon Sep 17 00:00:00 2001 From: "Matthieu Baerts (NGI0)" Date: Fri, 19 Sep 2025 14:08:58 +0200 Subject: mptcp: pm: netlink: only add server-side attr when true This attribute is a boolean. No need to add it to set it to 'false'. Indeed, the default value when this attribute is not set is naturally 'false'. A few bytes can then be saved by not adding this attribute if the connection is not on the server side. This prepares the future deprecation of its attribute, in favour of a new flag. Reviewed-by: Geliang Tang Signed-off-by: Matthieu Baerts (NGI0) Link: https://patch.msgid.link/20250919-net-next-mptcp-server-side-flag-v1-1-a97a5d561a8b@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/mptcp_pm.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/mptcp_pm.yaml b/Documentation/netlink/specs/mptcp_pm.yaml index d1b4829b580a..fc47a2931014 100644 --- a/Documentation/netlink/specs/mptcp_pm.yaml +++ b/Documentation/netlink/specs/mptcp_pm.yaml @@ -28,13 +28,13 @@ definitions: traffic-patterns it can take a long time until the MPTCP_EVENT_ESTABLISHED is sent. Attributes: token, family, saddr4 | saddr6, daddr4 | daddr6, sport, - dport, server-side, [flags]. + dport, [server-side], [flags]. - name: established doc: >- A MPTCP connection is established (can start new subflows). Attributes: token, family, saddr4 | saddr6, daddr4 | daddr6, sport, - dport, server-side, [flags]. + dport, [server-side], [flags]. - name: closed doc: >- -- cgit v1.2.3 From c8bc168f5f3d152b378726f89e8561ccedcb5d5c Mon Sep 17 00:00:00 2001 From: "Matthieu Baerts (NGI0)" Date: Fri, 19 Sep 2025 14:09:00 +0200 Subject: mptcp: pm: netlink: deprecate server-side attribute Now that such info is in the 'flags' attribute, it is time to deprecate the dedicated 'server-side' attribute. It will be removed in a few versions. Reviewed-by: Geliang Tang Signed-off-by: Matthieu Baerts (NGI0) Link: https://patch.msgid.link/20250919-net-next-mptcp-server-side-flag-v1-3-a97a5d561a8b@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/mptcp_pm.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/mptcp_pm.yaml b/Documentation/netlink/specs/mptcp_pm.yaml index fc47a2931014..ba30a40b9dbf 100644 --- a/Documentation/netlink/specs/mptcp_pm.yaml +++ b/Documentation/netlink/specs/mptcp_pm.yaml @@ -266,6 +266,7 @@ attribute-sets: - name: server-side type: u8 + doc: "Deprecated: use 'flags'" operations: list: -- cgit v1.2.3 From f3f6b3664302e16ef1c6b91034a72df5564d6b8a Mon Sep 17 00:00:00 2001 From: Alexandre Courbot Date: Mon, 8 Sep 2025 22:25:55 +0900 Subject: gpu: nova-core: use Alignment for alignment-related operations Make use of the newly-available `Alignment` type and remove the corresponding TODO item. Signed-off-by: Alexandre Courbot Reviewed-by: Danilo Krummrich Acked-by: Alexandre Courbot Acked-by: Danilo Krummrich Signed-off-by: Miguel Ojeda --- Documentation/gpu/nova/core/todo.rst | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/gpu/nova/core/todo.rst b/Documentation/gpu/nova/core/todo.rst index 894a1e9c3741..8fdb5bced346 100644 --- a/Documentation/gpu/nova/core/todo.rst +++ b/Documentation/gpu/nova/core/todo.rst @@ -147,7 +147,6 @@ Numerical operations [NUMM] Nova uses integer operations that are not part of the standard library (or not implemented in an optimized way for the kernel). These include: -- Aligning up and down to a power of two, - The "Find Last Set Bit" (`fls` function of the C part of the kernel) operation. -- cgit v1.2.3 From 6bd5b7297c95e6982cf0aee192431156681a1cdd Mon Sep 17 00:00:00 2001 From: "Bastien Curutchet (Schneider Electric)" Date: Thu, 18 Sep 2025 10:33:50 +0200 Subject: dt-bindings: net: dsa: microchip: Group if clause under allOf tag Upcoming patch adds a new if/then clause. It requires to be grouped with the already existing if/then clause under an 'allOf:' tag. Move the if/then clause under the already existing 'allOf:' tag to prepare next patch. Acked-by: Rob Herring (Arm) Signed-off-by: Bastien Curutchet (Schneider Electric) Link: https://patch.msgid.link/20250918-ksz-strap-pins-v3-1-16662e881728@bootlin.com Signed-off-by: Jakub Kicinski --- .../devicetree/bindings/net/dsa/microchip,ksz.yaml | 68 +++++++++++----------- 1 file changed, 34 insertions(+), 34 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml index eb4607460db7..db8175b4ced6 100644 --- a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml +++ b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml @@ -10,9 +10,6 @@ maintainers: - Marek Vasut - Woojung Huh -allOf: - - $ref: /schemas/spi/spi-peripheral-props.yaml# - properties: # See Documentation/devicetree/bindings/net/dsa/dsa.yaml for a list of additional # required and optional properties. @@ -107,38 +104,41 @@ required: - compatible - reg -if: - not: - properties: - compatible: - enum: - - microchip,ksz8863 - - microchip,ksz8873 -then: - $ref: dsa.yaml#/$defs/ethernet-ports -else: - patternProperties: - "^(ethernet-)?ports$": +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + + - if: + not: + properties: + compatible: + enum: + - microchip,ksz8863 + - microchip,ksz8873 + then: + $ref: dsa.yaml#/$defs/ethernet-ports + else: patternProperties: - "^(ethernet-)?port@[0-2]$": - $ref: dsa-port.yaml# - unevaluatedProperties: false - properties: - microchip,rmii-clk-internal: - $ref: /schemas/types.yaml#/definitions/flag - description: - When ksz88x3 is acting as clock provier (via REFCLKO) it - can select between internal and external RMII reference - clock. Internal reference clock means that the clock for - the RMII of ksz88x3 is provided by the ksz88x3 internally - and the REFCLKI pin is unconnected. For the external - reference clock, the clock needs to be fed back to ksz88x3 - via REFCLKI. - If microchip,rmii-clk-internal is set, ksz88x3 will provide - rmii reference clock internally, otherwise reference clock - should be provided externally. - dependencies: - microchip,rmii-clk-internal: [ethernet] + "^(ethernet-)?ports$": + patternProperties: + "^(ethernet-)?port@[0-2]$": + $ref: dsa-port.yaml# + unevaluatedProperties: false + properties: + microchip,rmii-clk-internal: + $ref: /schemas/types.yaml#/definitions/flag + description: + When ksz88x3 is acting as clock provier (via REFCLKO) it + can select between internal and external RMII reference + clock. Internal reference clock means that the clock for + the RMII of ksz88x3 is provided by the ksz88x3 internally + and the REFCLKI pin is unconnected. For the external + reference clock, the clock needs to be fed back to ksz88x3 + via REFCLKI. + If microchip,rmii-clk-internal is set, ksz88x3 will provide + rmii reference clock internally, otherwise reference clock + should be provided externally. + dependencies: + microchip,rmii-clk-internal: [ethernet] unevaluatedProperties: false -- cgit v1.2.3 From e469b87e0fb0d1209edb6c291474b1a1afa45bd5 Mon Sep 17 00:00:00 2001 From: "Bastien Curutchet (Schneider Electric)" Date: Thu, 18 Sep 2025 10:33:51 +0200 Subject: dt-bindings: net: dsa: microchip: Add strap description to set SPI mode At reset, KSZ8463 uses a strap-based configuration to set SPI as interface bus. If the required pull-ups/pull-downs are missing (by mistake or by design to save power) the pins may float and the configuration can go wrong preventing any communication with the switch. Add a 'reset' pinmux state Add a KSZ8463 specific strap description that can be used by the driver to drive the strap pins during reset. Two GPIOs are used. Users must describe either both of them or none of them. Signed-off-by: Bastien Curutchet (Schneider Electric) Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250918-ksz-strap-pins-v3-2-16662e881728@bootlin.com Signed-off-by: Jakub Kicinski --- .../devicetree/bindings/net/dsa/microchip,ksz.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml index db8175b4ced6..a8c8009414ae 100644 --- a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml +++ b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml @@ -34,6 +34,13 @@ properties: - microchip,ksz8567 - microchip,lan9646 + pinctrl-names: + items: + - const: default + - const: reset + description: + Used during reset for strap configuration. + reset-gpios: description: Should be a gpio specifier for a reset line. @@ -139,6 +146,18 @@ allOf: should be provided externally. dependencies: microchip,rmii-clk-internal: [ethernet] + - if: + properties: + compatible: + contains: + const: microchip,ksz8463 + then: + properties: + straps-rxd-gpios: + description: + RXD0 and RXD1 pins, used to select SPI as bus interface. + minItems: 2 + maxItems: 2 unevaluatedProperties: false -- cgit v1.2.3 From 1b44d700023e77dd92821e7811db825e75a1a394 Mon Sep 17 00:00:00 2001 From: Eric Dumazet Date: Fri, 19 Sep 2025 20:48:52 +0000 Subject: tcp: move tcp->rcv_tstamp to tcp_sock_write_txrx group tcp_ack() writes this field, it belongs to tcp_sock_write_txrx. Signed-off-by: Eric Dumazet Reviewed-by: Kuniyuki Iwashima Link: https://patch.msgid.link/20250919204856.2977245-5-edumazet@google.com Signed-off-by: Jakub Kicinski --- Documentation/networking/net_cachelines/tcp_sock.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/networking/net_cachelines/tcp_sock.rst b/Documentation/networking/net_cachelines/tcp_sock.rst index d4dc01800945..429df29fba8b 100644 --- a/Documentation/networking/net_cachelines/tcp_sock.rst +++ b/Documentation/networking/net_cachelines/tcp_sock.rst @@ -26,7 +26,7 @@ u64 bytes_acked read_w u32 dsack_dups u32 snd_una read_mostly read_write tcp_wnd_end,tcp_urg_mode,tcp_minshall_check,tcp_cwnd_validate(tx);tcp_ack,tcp_may_update_window,tcp_clean_rtx_queue(write),tcp_ack_tstamp(rx) u32 snd_sml read_write tcp_minshall_check,tcp_minshall_update -u32 rcv_tstamp read_mostly tcp_ack +u32 rcv_tstamp read_write read_write tcp_ack void * tcp_clean_acked read_mostly tcp_ack u32 lsndtime read_write tcp_slow_start_after_idle_check,tcp_event_data_sent u32 last_oow_ack_time -- cgit v1.2.3 From 969904dcd77dbb0a773d66cddaa59eccc6415d03 Mon Sep 17 00:00:00 2001 From: Eric Dumazet Date: Fri, 19 Sep 2025 20:48:53 +0000 Subject: tcp: move recvmsg_inq to tcp_sock_read_txrx Fill a hole in tcp_sock_read_txrx, instead of possibly wasting a cache line. Note that tcp_recvmsg_locked() is also reading tp->repair, so this removes one cache line miss in tcp recvmsg(). Signed-off-by: Eric Dumazet Reviewed-by: Kuniyuki Iwashima Link: https://patch.msgid.link/20250919204856.2977245-6-edumazet@google.com Signed-off-by: Jakub Kicinski --- Documentation/networking/net_cachelines/tcp_sock.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/networking/net_cachelines/tcp_sock.rst b/Documentation/networking/net_cachelines/tcp_sock.rst index 429df29fba8b..c2138619b995 100644 --- a/Documentation/networking/net_cachelines/tcp_sock.rst +++ b/Documentation/networking/net_cachelines/tcp_sock.rst @@ -57,7 +57,7 @@ u8:1 is_sack_reneg read_m u8:2 fastopen_client_fail u8:4 nonagle read_write tcp_skb_entail,tcp_push_pending_frames u8:1 thin_lto -u8:1 recvmsg_inq +u8:1 recvmsg_inq read_mostly tcp_recvmsg u8:1 repair read_mostly tcp_write_xmit u8:1 frto u8 repair_queue -- cgit v1.2.3 From a105ea47a4e855d24ebf65f1c5fb907162e7b8cf Mon Sep 17 00:00:00 2001 From: Eric Dumazet Date: Fri, 19 Sep 2025 20:48:54 +0000 Subject: tcp: move tcp_clean_acked to tcp_sock_read_tx group tp->tcp_clean_acked is fetched in tx path when snd_una is updated. This field thus belongs to tcp_sock_read_tx group. Signed-off-by: Eric Dumazet Reviewed-by: Kuniyuki Iwashima Link: https://patch.msgid.link/20250919204856.2977245-7-edumazet@google.com Signed-off-by: Jakub Kicinski --- Documentation/networking/net_cachelines/tcp_sock.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/networking/net_cachelines/tcp_sock.rst b/Documentation/networking/net_cachelines/tcp_sock.rst index c2138619b995..26f32dbcf6ec 100644 --- a/Documentation/networking/net_cachelines/tcp_sock.rst +++ b/Documentation/networking/net_cachelines/tcp_sock.rst @@ -27,7 +27,7 @@ u32 dsack_dups u32 snd_una read_mostly read_write tcp_wnd_end,tcp_urg_mode,tcp_minshall_check,tcp_cwnd_validate(tx);tcp_ack,tcp_may_update_window,tcp_clean_rtx_queue(write),tcp_ack_tstamp(rx) u32 snd_sml read_write tcp_minshall_check,tcp_minshall_update u32 rcv_tstamp read_write read_write tcp_ack -void * tcp_clean_acked read_mostly tcp_ack +void * tcp_clean_acked read_mostly tcp_ack u32 lsndtime read_write tcp_slow_start_after_idle_check,tcp_event_data_sent u32 last_oow_ack_time u32 compressed_ack_rcv_nxt -- cgit v1.2.3 From bee278e18e641a4bc11513b0fa8f5eb2667b8a32 Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Thu, 18 Sep 2025 23:20:26 +0200 Subject: dt-bindings: embedded-controller: Add Lenovo Thinkpad T14s EC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add binding for the EC found in the Thinkpad T14s Gen6 Snapdragon, which is based on the Qualcomm X1 Elite. Some of the system LEDs and extra keys are only accessible via the EC. Reviewed-by: Bryan O'Donoghue Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250918-thinkpad-t14s-ec-v5-1-ac0bc6382c5c@collabora.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- .../lenovo,thinkpad-t14s-ec.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/embedded-controller/lenovo,thinkpad-t14s-ec.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/embedded-controller/lenovo,thinkpad-t14s-ec.yaml b/Documentation/devicetree/bindings/embedded-controller/lenovo,thinkpad-t14s-ec.yaml new file mode 100644 index 000000000000..c87ccb5b3086 --- /dev/null +++ b/Documentation/devicetree/bindings/embedded-controller/lenovo,thinkpad-t14s-ec.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/embedded-controller/lenovo,thinkpad-t14s-ec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lenovo Thinkpad T14s Embedded Controller + +maintainers: + - Sebastian Reichel + +description: + The Qualcomm Snapdragon-based Lenovo Thinkpad T14s has an Embedded Controller + (EC) which handles things such as keyboard backlight, LEDs or non-standard + keys. + +properties: + compatible: + const: lenovo,thinkpad-t14s-ec + + reg: + const: 0x28 + + interrupts: + maxItems: 1 + + wakeup-source: true + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - |+ + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + embedded-controller@28 { + compatible = "lenovo,thinkpad-t14s-ec"; + reg = <0x28>; + interrupts-extended = <&tlmm 66 IRQ_TYPE_LEVEL_LOW>; + wakeup-source; + }; + }; +... -- cgit v1.2.3 From ef0e000cd162a58dba10608ef6959f172d1bc5f4 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 11 Jun 2025 18:26:20 -0500 Subject: dt-bindings: timer: Convert faraday,fttmr010 to DT schema Convert the Faraday fttmr010 Timer binding to DT schema format. Adjust the compatible string values to match what's in use. The number of interrupts can also be anywhere from 1 to 8. The clock-names order was reversed compared to what's used. Signed-off-by: Rob Herring (Arm) Signed-off-by: Daniel Lezcano Reviewed-by: Linus Walleij Link: https://lore.kernel.org/r/20250611232621.1508116-1-robh@kernel.org --- .../devicetree/bindings/timer/faraday,fttmr010.txt | 38 --------- .../bindings/timer/faraday,fttmr010.yaml | 89 ++++++++++++++++++++++ 2 files changed, 89 insertions(+), 38 deletions(-) delete mode 100644 Documentation/devicetree/bindings/timer/faraday,fttmr010.txt create mode 100644 Documentation/devicetree/bindings/timer/faraday,fttmr010.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/timer/faraday,fttmr010.txt b/Documentation/devicetree/bindings/timer/faraday,fttmr010.txt deleted file mode 100644 index 3cb2f4c98d64..000000000000 --- a/Documentation/devicetree/bindings/timer/faraday,fttmr010.txt +++ /dev/null @@ -1,38 +0,0 @@ -Faraday Technology timer - -This timer is a generic IP block from Faraday Technology, embedded in the -Cortina Systems Gemini SoCs and other designs. - -Required properties: - -- compatible : Must be one of - "faraday,fttmr010" - "cortina,gemini-timer", "faraday,fttmr010" - "moxa,moxart-timer", "faraday,fttmr010" - "aspeed,ast2400-timer" - "aspeed,ast2500-timer" - "aspeed,ast2600-timer" - -- reg : Should contain registers location and length -- interrupts : Should contain the three timer interrupts usually with - flags for falling edge - -Optionally required properties: - -- clocks : a clock to provide the tick rate for "faraday,fttmr010" -- clock-names : should be "EXTCLK" and "PCLK" for the external tick timer - and peripheral clock respectively, for "faraday,fttmr010" -- syscon : a phandle to the global Gemini system controller if the compatible - type is "cortina,gemini-timer" - -Example: - -timer@43000000 { - compatible = "faraday,fttmr010"; - reg = <0x43000000 0x1000>; - interrupts = <14 IRQ_TYPE_EDGE_FALLING>, /* Timer 1 */ - <15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */ - <16 IRQ_TYPE_EDGE_FALLING>; /* Timer 3 */ - clocks = <&extclk>, <&pclk>; - clock-names = "EXTCLK", "PCLK"; -}; diff --git a/Documentation/devicetree/bindings/timer/faraday,fttmr010.yaml b/Documentation/devicetree/bindings/timer/faraday,fttmr010.yaml new file mode 100644 index 000000000000..39506323556c --- /dev/null +++ b/Documentation/devicetree/bindings/timer/faraday,fttmr010.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/faraday,fttmr010.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Faraday FTTMR010 timer + +maintainers: + - Joel Stanley + - Linus Walleij + +description: + This timer is a generic IP block from Faraday Technology, embedded in the + Cortina Systems Gemini SoCs and other designs. + +properties: + compatible: + oneOf: + - items: + - const: moxa,moxart-timer + - const: faraday,fttmr010 + - enum: + - aspeed,ast2400-timer + - aspeed,ast2500-timer + - aspeed,ast2600-timer + - cortina,gemini-timer + - faraday,fttmr010 + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 8 + description: One interrupt per timer + + clocks: + minItems: 1 + items: + - description: Peripheral clock + - description: External tick clock + + clock-names: + minItems: 1 + items: + - const: PCLK + - const: EXTCLK + + resets: + maxItems: 1 + + syscon: + description: System controller phandle for Gemini systems + $ref: /schemas/types.yaml#/definitions/phandle + +required: + - compatible + - reg + - interrupts + +allOf: + - if: + properties: + compatible: + contains: + const: cortina,gemini-timer + then: + required: + - syscon + else: + properties: + syscon: false + +additionalProperties: false + +examples: + - | + #include + + timer@43000000 { + compatible = "faraday,fttmr010"; + reg = <0x43000000 0x1000>; + interrupts = <14 IRQ_TYPE_EDGE_FALLING>, /* Timer 1 */ + <15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */ + <16 IRQ_TYPE_EDGE_FALLING>; /* Timer 3 */ + clocks = <&pclk>, <&extclk>; + clock-names = "PCLK", "EXTCLK"; + }; -- cgit v1.2.3 From bb7bf8b44de1b13b8b7b10ca166b545ff22edac9 Mon Sep 17 00:00:00 2001 From: Max Shevchenko Date: Wed, 2 Jul 2025 13:50:40 +0300 Subject: dt-bindings: timer: mediatek: add MT6572 Add a compatible string for timer on the MT6572 SoC. Signed-off-by: Max Shevchenko Signed-off-by: Daniel Lezcano Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250702-mt6572-v4-3-bde75b7ed445@proton.me --- Documentation/devicetree/bindings/timer/mediatek,timer.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/timer/mediatek,timer.yaml b/Documentation/devicetree/bindings/timer/mediatek,timer.yaml index f68fc7050c56..d5b574bfd2ca 100644 --- a/Documentation/devicetree/bindings/timer/mediatek,timer.yaml +++ b/Documentation/devicetree/bindings/timer/mediatek,timer.yaml @@ -26,6 +26,7 @@ properties: - items: - enum: - mediatek,mt2701-timer + - mediatek,mt6572-timer - mediatek,mt6580-timer - mediatek,mt6582-timer - mediatek,mt6589-timer -- cgit v1.2.3 From c1ff9e919addb8cf0414b08bd996f11a4a2e7297 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Fri, 23 May 2025 10:14:37 -0400 Subject: dt-bindings: timer: fsl,ftm-timer: use items for reg The original txt binding doc is: reg : Specifies base physical address and size of the register sets for the clock event device and clock source device. And existed dts provide two reg MMIO spaces. So change to use items to descript reg property. Update examples. Fixes: 8fc30d8f8e86 ("dt-bindings: timer: fsl,ftm-timer: Convert to dtschema") Signed-off-by: Frank Li Signed-off-by: Daniel Lezcano Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250523141437.533643-1-Frank.Li@nxp.com --- Documentation/devicetree/bindings/timer/fsl,ftm-timer.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/timer/fsl,ftm-timer.yaml b/Documentation/devicetree/bindings/timer/fsl,ftm-timer.yaml index 0e4a8ddc3de3..e3b61b62521e 100644 --- a/Documentation/devicetree/bindings/timer/fsl,ftm-timer.yaml +++ b/Documentation/devicetree/bindings/timer/fsl,ftm-timer.yaml @@ -14,7 +14,9 @@ properties: const: fsl,ftm-timer reg: - maxItems: 1 + items: + - description: clock event device + - description: clock source device interrupts: maxItems: 1 @@ -50,7 +52,8 @@ examples: ftm@400b8000 { compatible = "fsl,ftm-timer"; - reg = <0x400b8000 0x1000>; + reg = <0x400b8000 0x1000>, + <0x400b9000 0x1000>; interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>; clock-names = "ftm-evt", "ftm-src", "ftm-evt-counter-en", "ftm-src-counter-en"; clocks = <&clks VF610_CLK_FTM2>, <&clks VF610_CLK_FTM3>, -- cgit v1.2.3 From ffc5870fc4e0ea72bf73ad5ab1d648aa0b4f7cbf Mon Sep 17 00:00:00 2001 From: Frank Li Date: Wed, 28 May 2025 12:53:50 -0400 Subject: dt-bindings: timer: Add fsl,timrot.yaml Add fsl,timrot.yaml for i.MX23/i.MX28 timer. Also add a generic fallback compatible string "fsl,timrot" for legacy devices, which have existed for over 15 years. Signed-off-by: Frank Li Signed-off-by: Daniel Lezcano Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250528165351.691848-1-Frank.Li@nxp.com --- .../devicetree/bindings/timer/fsl,timrot.yaml | 48 ++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/fsl,timrot.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/timer/fsl,timrot.yaml b/Documentation/devicetree/bindings/timer/fsl,timrot.yaml new file mode 100644 index 000000000000..d181f274ef9f --- /dev/null +++ b/Documentation/devicetree/bindings/timer/fsl,timrot.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/fsl,timrot.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale MXS Timer + +maintainers: + - Frank Li + +properties: + compatible: + items: + - enum: + - fsl,imx23-timrot + - fsl,imx28-timrot + - const: fsl,timrot + + reg: + maxItems: 1 + + interrupts: + items: + - description: irq for timer0 + - description: irq for timer1 + - description: irq for timer2 + - description: irq for timer3 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + timer: timer@80068000 { + compatible = "fsl,imx28-timrot", "fsl,timrot"; + reg = <0x80068000 0x2000>; + interrupts = <48>, <49>, <50>, <51>; + clocks = <&clks 26>; + }; -- cgit v1.2.3 From 99d19715daf5553a28452a4ef95e9692277e2787 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 11 Jun 2025 13:07:58 +0200 Subject: dt-bindings: timer: mediatek,timer: Add MediaTek MT8196 compatible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a new compatible for the MediaTek MT8196 SoC, fully compatible with MT6765. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Daniel Lezcano Reviewed-by: Nícolas F. R. A. Prado Acked-by: Rob Herring (Arm) Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250611110800.458164-2-angelogioacchino.delregno@collabora.com --- Documentation/devicetree/bindings/timer/mediatek,timer.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/timer/mediatek,timer.yaml b/Documentation/devicetree/bindings/timer/mediatek,timer.yaml index d5b574bfd2ca..e3e38066c2cb 100644 --- a/Documentation/devicetree/bindings/timer/mediatek,timer.yaml +++ b/Documentation/devicetree/bindings/timer/mediatek,timer.yaml @@ -45,6 +45,7 @@ properties: - mediatek,mt8188-timer - mediatek,mt8192-timer - mediatek,mt8195-timer + - mediatek,mt8196-timer - mediatek,mt8365-systimer - const: mediatek,mt6765-timer -- cgit v1.2.3 From 5fa7d739f811bdffb5fc99696c2e821344fe0b88 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sun, 21 Sep 2025 10:09:17 +0300 Subject: regulator: dt-bindings: qcom,sdm845-refgen-regulator: document more platforms Document refgen block being present on SDM670, Lemans and QCS8300 platforms. It should be used to provide reference voltage to DSI controller. Signed-off-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250921-refgen-v1-1-9d93e64133ea@oss.qualcomm.com Signed-off-by: Mark Brown --- .../devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml index f02f97d4fdd2..40f9223d4c27 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml @@ -23,11 +23,14 @@ properties: - enum: - qcom,sc7180-refgen-regulator - qcom,sc8180x-refgen-regulator + - qcom,sdm670-refgen-regulator - qcom,sm8150-refgen-regulator - const: qcom,sdm845-refgen-regulator - items: - enum: + - qcom,qcs8300-refgen-regulator + - qcom,sa8775p-refgen-regulator - qcom,sc7280-refgen-regulator - qcom,sc8280xp-refgen-regulator - qcom,sm6350-refgen-regulator -- cgit v1.2.3 From e609438851928381e39b5393f17156955a84122a Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sun, 21 Sep 2025 10:09:17 +0300 Subject: regulator: dt-bindings: qcom,sdm845-refgen-regulator: document more platforms Document refgen block being present on SDM670, Lemans and QCS8300 platforms. It should be used to provide reference voltage to DSI controller. Signed-off-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250921-refgen-v1-1-9d93e64133ea@oss.qualcomm.com Signed-off-by: Mark Brown --- .../devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml index f02f97d4fdd2..40f9223d4c27 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml @@ -23,11 +23,14 @@ properties: - enum: - qcom,sc7180-refgen-regulator - qcom,sc8180x-refgen-regulator + - qcom,sdm670-refgen-regulator - qcom,sm8150-refgen-regulator - const: qcom,sdm845-refgen-regulator - items: - enum: + - qcom,qcs8300-refgen-regulator + - qcom,sa8775p-refgen-regulator - qcom,sc7280-refgen-regulator - qcom,sc8280xp-refgen-regulator - qcom,sm6350-refgen-regulator -- cgit v1.2.3 From adaf5b248ff38f98ea1b3696b9a793db270f8c3e Mon Sep 17 00:00:00 2001 From: Daniel Lezcano Date: Mon, 4 Aug 2025 17:23:37 +0200 Subject: dt: bindings: fsl,vf610-pit: Add compatible for s32g2 and s32g3 The Vybrid Family is a NXP (formerly Freescale) platform having a Programmable Interrupt Timer (PIT). This timer is an IP found also on the NXP Automotive platform S32G2 and S32G3. Add the compatible for those platforms to describe the timer. Signed-off-by: Daniel Lezcano Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250804152344.1109310-20-daniel.lezcano@linaro.org --- Documentation/devicetree/bindings/timer/fsl,vf610-pit.yaml | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/timer/fsl,vf610-pit.yaml b/Documentation/devicetree/bindings/timer/fsl,vf610-pit.yaml index bee2c35bd0e2..42e130654d58 100644 --- a/Documentation/devicetree/bindings/timer/fsl,vf610-pit.yaml +++ b/Documentation/devicetree/bindings/timer/fsl,vf610-pit.yaml @@ -15,8 +15,13 @@ description: properties: compatible: - enum: - - fsl,vf610-pit + oneOf: + - enum: + - fsl,vf610-pit + - nxp,s32g2-pit + - items: + - const: nxp,s32g3-pit + - const: nxp,s32g2-pit reg: maxItems: 1 -- cgit v1.2.3 From 3d18f80ce181ba27f37d0ec1c550b22acb01dd49 Mon Sep 17 00:00:00 2001 From: NeilBrown Date: Mon, 22 Sep 2025 14:29:52 +1000 Subject: VFS: rename kern_path_locked() and related functions. kern_path_locked() is now only used to prepare for removing an object from the filesystem (and that is the only credible reason for wanting a positive locked dentry). Thus it corresponds to kern_path_create() and so should have a corresponding name. Unfortunately the name "kern_path_create" is somewhat misleading as it doesn't actually create anything. The recently added simple_start_creating() provides a better pattern I believe. The "start" can be matched with "end" to bracket the creating or removing. So this patch changes names: kern_path_locked -> start_removing_path kern_path_create -> start_creating_path user_path_create -> start_creating_user_path user_path_locked_at -> start_removing_user_path_at done_path_create -> end_creating_path and also introduces end_removing_path() which is identical to end_creating_path(). __start_removing_path (which was __kern_path_locked) is enhanced to call mnt_want_write() for consistency with the start_creating_path(). Reviewed-by: Amir Goldstein Signed-off-by: NeilBrown Signed-off-by: Christian Brauner --- Documentation/filesystems/porting.rst | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/porting.rst b/Documentation/filesystems/porting.rst index 85f590254f07..e0494860be6b 100644 --- a/Documentation/filesystems/porting.rst +++ b/Documentation/filesystems/porting.rst @@ -1285,3 +1285,15 @@ rather than a VMA, as the VMA at this stage is not yet valid. The vm_area_desc provides the minimum required information for a filesystem to initialise state upon memory mapping of a file-backed region, and output parameters for the file system to set this state. + +--- + +**mandatory** + +Several functions are renamed: + +- kern_path_locked -> start_removing_path +- kern_path_create -> start_creating_path +- user_path_create -> start_creating_user_path +- user_path_locked_at -> start_removing_user_path_at +- done_path_create -> end_creating_path -- cgit v1.2.3 From 1ad38ef4dbccee28b9b50e315a2d4d9ca5f7ee09 Mon Sep 17 00:00:00 2001 From: Mao Jinlong Date: Sat, 16 Aug 2025 00:25:28 -0700 Subject: dt-bindings: arm: Add label in the coresight components Current name of coresight component's folder consists of prefix of the device and the id in the device list. When run 'ls' command, we can get the register address of the device. Take CTI for example, if we want to set the config for modem CTI, but we can't know which CTI is modem CTI from all current information. cti_sys0 -> ../../../devices/platform/soc@0/138f0000.cti/cti_sys0 cti_sys1 -> ../../../devices/platform/soc@0/13900000.cti/cti_sys1 Add label to show hardware context information of each coresight device. There will be a sysfs node label in each device folder. cat /sys/bus/coresight/devices/cti_sys0/label Signed-off-by: Mao Jinlong Reviewed-by: Krzysztof Kozlowski Reviewed-by: Mike Leach Signed-off-by: Suzuki K Poulose Link: https://lore.kernel.org/r/20250816072529.3716968-2-quic_jinlmao@quicinc.com --- Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml | 4 ++++ Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml | 4 ++++ Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml | 4 ++++ .../devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml | 4 ++++ .../devicetree/bindings/arm/arm,coresight-dynamic-replicator.yaml | 4 ++++ Documentation/devicetree/bindings/arm/arm,coresight-etb10.yaml | 4 ++++ Documentation/devicetree/bindings/arm/arm,coresight-etm.yaml | 4 ++++ .../devicetree/bindings/arm/arm,coresight-static-funnel.yaml | 4 ++++ .../devicetree/bindings/arm/arm,coresight-static-replicator.yaml | 4 ++++ Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml | 4 ++++ Documentation/devicetree/bindings/arm/arm,coresight-tpiu.yaml | 4 ++++ Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml | 4 ++++ Documentation/devicetree/bindings/arm/qcom,coresight-remote-etm.yaml | 4 ++++ Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml | 4 ++++ Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml | 4 ++++ 15 files changed, 60 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml index 2d5545a2b49c..2a91670ccb8c 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml @@ -98,6 +98,10 @@ properties: power-domains: maxItems: 1 + label: + description: + Description of a coresight device. + arm,cti-ctm-id: $ref: /schemas/types.yaml#/definitions/uint32 description: diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml index 08b89b62c505..ed091dc0c10a 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml @@ -39,6 +39,10 @@ properties: enum: - arm,coresight-dummy-sink + label: + description: + Description of a coresight device. + in-ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml index 742dc4e25d3b..78337be42b55 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml @@ -38,6 +38,10 @@ properties: enum: - arm,coresight-dummy-source + label: + description: + Description of a coresight device. + arm,static-trace-id: description: If dummy source needs static id support, use this to set trace id. $ref: /schemas/types.yaml#/definitions/uint32 diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml index 44a1041cb0fc..b74db15e5f8a 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml @@ -57,6 +57,10 @@ properties: power-domains: maxItems: 1 + label: + description: + Description of a coresight device. + in-ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-replicator.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-replicator.yaml index 03792e9bd97a..17ea936b796f 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-replicator.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-replicator.yaml @@ -54,6 +54,10 @@ properties: - const: apb_pclk - const: atclk + label: + description: + Description of a coresight device. + power-domains: maxItems: 1 diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-etb10.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-etb10.yaml index 90679788e0bf..892df7aca1ac 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-etb10.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-etb10.yaml @@ -54,6 +54,10 @@ properties: - const: apb_pclk - const: atclk + label: + description: + Description of a coresight device. + power-domains: maxItems: 1 diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-etm.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-etm.yaml index 01200f67504a..71f2e1ed27e5 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-etm.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-etm.yaml @@ -85,6 +85,10 @@ properties: CPU powers down the coresight component also powers down and loses its context. + label: + description: + Description of a coresight device. + arm,cp14: type: boolean description: diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-static-funnel.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-static-funnel.yaml index cc8c3baa79b4..9598a3d0a95b 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-static-funnel.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-static-funnel.yaml @@ -30,6 +30,10 @@ properties: power-domains: maxItems: 1 + label: + description: + Description of a coresight device. + in-ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml index 0c1017affbad..b81851b26c74 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml @@ -43,6 +43,10 @@ properties: - const: dbg_trc - const: dbg_apb + label: + description: + Description of a coresight device. + in-ports: $ref: /schemas/graph.yaml#/properties/ports additionalProperties: false diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml index 4787d7c6bac2..96dd5b5f771a 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml @@ -55,6 +55,10 @@ properties: - const: apb_pclk - const: atclk + label: + description: + Description of a coresight device. + iommus: maxItems: 1 diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-tpiu.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-tpiu.yaml index 61a0cdc27745..a207f6899e67 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-tpiu.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-tpiu.yaml @@ -54,6 +54,10 @@ properties: - const: apb_pclk - const: atclk + label: + description: + Description of a coresight device. + power-domains: maxItems: 1 diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml index 843b52eaf872..c969c16c21ef 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml @@ -39,6 +39,10 @@ properties: items: - const: apb + label: + description: + Description of a coresight device. + in-ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-remote-etm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-remote-etm.yaml index 4fd5752978cd..ffe613efeabe 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-remote-etm.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-remote-etm.yaml @@ -20,6 +20,10 @@ properties: compatible: const: qcom,coresight-remote-etm + label: + description: + Description of a coresight device. + out-ports: $ref: /schemas/graph.yaml#/properties/ports additionalProperties: false diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml index 5ed40f21b8eb..a48c9ac3eaa9 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml @@ -64,6 +64,10 @@ properties: items: - const: apb_pclk + label: + description: + Description of a coresight device. + in-ports: description: | Input connections from TPDM to TPDA diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml index 07d21a3617f5..4edc47483851 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml @@ -76,6 +76,10 @@ properties: minimum: 0 maximum: 32 + label: + description: + Description of a coresight device. + clocks: maxItems: 1 -- cgit v1.2.3 From 01f96b812526a2c8dcd5c0e510dda37e09ec8bcd Mon Sep 17 00:00:00 2001 From: Mao Jinlong Date: Sat, 16 Aug 2025 00:25:29 -0700 Subject: coresight: Add label sysfs node support For some coresight components like CTI and TPDM, there could be numerous of them. From the node name, we can only get the type and register address of the component. We can't identify the HW or the system the component belongs to. Add label sysfs node support for showing the intuitive name of the device. Signed-off-by: Mao Jinlong Reviewed-by: Mike Leach Signed-off-by: Suzuki K Poulose Link: https://lore.kernel.org/r/20250816072529.3716968-3-quic_jinlmao@quicinc.com --- Documentation/ABI/testing/sysfs-bus-coresight-devices-cti | 6 ++++++ Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-source | 6 ++++++ Documentation/ABI/testing/sysfs-bus-coresight-devices-etb10 | 6 ++++++ Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x | 6 ++++++ Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x | 6 ++++++ Documentation/ABI/testing/sysfs-bus-coresight-devices-funnel | 6 ++++++ Documentation/ABI/testing/sysfs-bus-coresight-devices-stm | 6 ++++++ Documentation/ABI/testing/sysfs-bus-coresight-devices-tmc | 6 ++++++ Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm | 6 ++++++ Documentation/ABI/testing/sysfs-bus-coresight-devices-trbe | 6 ++++++ 10 files changed, 60 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-cti b/Documentation/ABI/testing/sysfs-bus-coresight-devices-cti index a97b70f588da..a2aef7f5a6d7 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-cti +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-cti @@ -239,3 +239,9 @@ Date: March 2020 KernelVersion: 5.7 Contact: Mike Leach or Mathieu Poirier Description: (Write) Clear all channel / trigger programming. + +What: /sys/bus/coresight/devices//label +Date: Aug 2025 +KernelVersion 6.18 +Contact: Mao Jinlong +Description: (Read) Show hardware context information of device. diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-source b/Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-source index 0830661ef656..321e3ee1fc9d 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-source +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-source @@ -13,3 +13,9 @@ KernelVersion: 6.14 Contact: Mao Jinlong Description: (R) Show the trace ID that will appear in the trace stream coming from this trace entity. + +What: /sys/bus/coresight/devices/dummy_source/label +Date: Aug 2025 +KernelVersion 6.18 +Contact: Mao Jinlong +Description: (Read) Show hardware context information of device. diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etb10 b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etb10 index 9a383f6a74eb..f30526949687 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etb10 +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etb10 @@ -19,6 +19,12 @@ Description: (RW) Disables write access to the Trace RAM by stopping the into the Trace RAM following the trigger event is equal to the value stored in this register+1 (from ARM ETB-TRM). +What: /sys/bus/coresight/devices/.etb/label +Date: Aug 2025 +KernelVersion 6.18 +Contact: Mao Jinlong +Description: (Read) Show hardware context information of device. + What: /sys/bus/coresight/devices/.etb/mgmt/rdp Date: March 2016 KernelVersion: 4.7 diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x index 271b57c571aa..245c322c91f1 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x @@ -251,6 +251,12 @@ KernelVersion: 4.4 Contact: Mathieu Poirier Description: (RO) Holds the cpu number this tracer is affined to. +What: /sys/bus/coresight/devices/.[etm|ptm]/label +Date: Aug 2025 +KernelVersion 6.18 +Contact: Mao Jinlong +Description: (Read) Show hardware context information of device. + What: /sys/bus/coresight/devices/.[etm|ptm]/mgmt/etmccr Date: September 2015 KernelVersion: 4.4 diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x index a0425d70d009..6f19a6a5f2e1 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x @@ -329,6 +329,12 @@ Contact: Mathieu Poirier Description: (RW) Access the selected single show PE comparator control register. +What: /sys/bus/coresight/devices/etm/label +Date: Aug 2025 +KernelVersion 6.18 +Contact: Mao Jinlong +Description: (Read) Show hardware context information of device. + What: /sys/bus/coresight/devices/etm/mgmt/trcoslsr Date: April 2015 KernelVersion: 4.01 diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-funnel b/Documentation/ABI/testing/sysfs-bus-coresight-devices-funnel index d75acda5e1b3..86938e9bbcde 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-funnel +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-funnel @@ -10,3 +10,9 @@ Date: November 2014 KernelVersion: 3.19 Contact: Mathieu Poirier Description: (RW) Defines input port priority order. + +What: /sys/bus/coresight/devices/.funnel/label +Date: Aug 2025 +KernelVersion 6.18 +Contact: Mao Jinlong +Description: (Read) Show hardware context information of device. diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-stm b/Documentation/ABI/testing/sysfs-bus-coresight-devices-stm index 53e1f4815d64..848e2ffc1480 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-stm +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-stm @@ -51,3 +51,9 @@ KernelVersion: 4.7 Contact: Mathieu Poirier Description: (RW) Holds the trace ID that will appear in the trace stream coming from this trace entity. + +What: /sys/bus/coresight/devices/.stm/label +Date: Aug 2025 +KernelVersion 6.18 +Contact: Mao Jinlong +Description: (Read) Show hardware context information of device. diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tmc b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tmc index 339cec3b2f1a..55e298b9c4a4 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tmc +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tmc @@ -107,3 +107,9 @@ Contact: Anshuman Khandual Description: (RW) Current Coresight TMC-ETR buffer mode selected. But user could only provide a mode which is supported for a given ETR device. This file is available only for TMC ETR devices. + +What: /sys/bus/coresight/devices/.tmc/label +Date: Aug 2025 +KernelVersion 6.18 +Contact: Mao Jinlong +Description: (Read) Show hardware context information of device. diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm index a341b08ae70b..98f1c6545027 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm @@ -272,3 +272,9 @@ KernelVersion 6.15 Contact: Jinlong Mao (QUIC) , Tao Zhang (QUIC) Description: (RW) Set/Get the enablement of the individual lane. + +What: /sys/bus/coresight/devices//label +Date: Aug 2025 +KernelVersion 6.18 +Contact: Mao Jinlong +Description: (Read) Show hardware context information of device. diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-trbe b/Documentation/ABI/testing/sysfs-bus-coresight-devices-trbe index ad3bbc6fa751..8a4b749ed26e 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-trbe +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-trbe @@ -12,3 +12,9 @@ Contact: Anshuman Khandual Description: (Read) Shows if TRBE updates in the memory are with access and dirty flag updates as well. This value is fetched from the TRBIDR register. + +What: /sys/bus/coresight/devices/trbe/label +Date: Aug 2025 +KernelVersion 6.18 +Contact: Mao Jinlong +Description: (Read) Show hardware context information of device. -- cgit v1.2.3 From 0c1f3fe9a5f899ac95114e68959a35454af1523d Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Fri, 2 May 2025 16:22:45 -0400 Subject: Documentation: add initial documenation for user queues Add an initial documentation page for user mode queues. Reviewed-by: Rodrigo Siqueira Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/index.rst | 1 + Documentation/gpu/amdgpu/userq.rst | 203 +++++++++++++++++++++++++++++++++++++ 2 files changed, 204 insertions(+) create mode 100644 Documentation/gpu/amdgpu/userq.rst (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/index.rst b/Documentation/gpu/amdgpu/index.rst index bb2894b5edaf..45523e9860fc 100644 --- a/Documentation/gpu/amdgpu/index.rst +++ b/Documentation/gpu/amdgpu/index.rst @@ -12,6 +12,7 @@ Next (GCN), Radeon DNA (RDNA), and Compute DNA (CDNA) architectures. module-parameters gc/index display/index + userq flashing xgmi ras diff --git a/Documentation/gpu/amdgpu/userq.rst b/Documentation/gpu/amdgpu/userq.rst new file mode 100644 index 000000000000..ca3ea71f7888 --- /dev/null +++ b/Documentation/gpu/amdgpu/userq.rst @@ -0,0 +1,203 @@ +================== + User Mode Queues +================== + +Introduction +============ + +Similar to the KFD, GPU engine queues move into userspace. The idea is to let +user processes manage their submissions to the GPU engines directly, bypassing +IOCTL calls to the driver to submit work. This reduces overhead and also allows +the GPU to submit work to itself. Applications can set up work graphs of jobs +across multiple GPU engines without needing trips through the CPU. + +UMDs directly interface with firmware via per application shared memory areas. +The main vehicle for this is queue. A queue is a ring buffer with a read +pointer (rptr) and a write pointer (wptr). The UMD writes IP specific packets +into the queue and the firmware processes those packets, kicking off work on the +GPU engines. The CPU in the application (or another queue or device) updates +the wptr to tell the firmware how far into the ring buffer to process packets +and the rtpr provides feedback to the UMD on how far the firmware has progressed +in executing those packets. When the wptr and the rptr are equal, the queue is +idle. + +Theory of Operation +=================== + +The various engines on modern AMD GPUs support multiple queues per engine with a +scheduling firmware which handles dynamically scheduling user queues on the +available hardware queue slots. When the number of user queues outnumbers the +available hardware queue slots, the scheduling firmware dynamically maps and +unmaps queues based on priority and time quanta. The state of each user queue +is managed in the kernel driver in an MQD (Memory Queue Descriptor). This is a +buffer in GPU accessible memory that stores the state of a user queue. The +scheduling firmware uses the MQD to load the queue state into an HQD (Hardware +Queue Descriptor) when a user queue is mapped. Each user queue requires a +number of additional buffers which represent the ring buffer and any metadata +needed by the engine for runtime operation. On most engines this consists of +the ring buffer itself, a rptr buffer (where the firmware will shadow the rptr +to userspace), a wptr buffer (where the application will write the wptr for the +firmware to fetch it), and a doorbell. A doorbell is a piece of one of the +device's MMIO BARs which can be mapped to specific user queues. When the +application writes to the doorbell, it will signal the firmware to take some +action. Writing to the doorbell wakes the firmware and causes it to fetch the +wptr and start processing the packets in the queue. Each 4K page of the doorbell +BAR supports specific offset ranges for specific engines. The doorbell of a +queue must be mapped into the aperture aligned to the IP used by the queue +(e.g., GFX, VCN, SDMA, etc.). These doorbell apertures are set up via NBIO +registers. Doorbells are 32 bit or 64 bit (depending on the engine) chunks of +the doorbell BAR. A 4K doorbell page provides 512 64-bit doorbells for up to +512 user queues. A subset of each page is reserved for each IP type supported +on the device. The user can query the doorbell ranges for each IP via the INFO +IOCTL. See the IOCTL Interfaces section for more information. + +When an application wants to create a user queue, it allocates the necessary +buffers for the queue (ring buffer, wptr and rptr, context save areas, etc.). +These can be separate buffers or all part of one larger buffer. The application +would map the buffer(s) into its GPUVM and use the GPU virtual addresses of for +the areas of memory they want to use for the user queue. They would also +allocate a doorbell page for the doorbells used by the user queues. The +application would then populate the MQD in the USERQ IOCTL structure with the +GPU virtual addresses and doorbell index they want to use. The user can also +specify the attributes for the user queue (priority, whether the queue is secure +for protected content, etc.). The application would then call the USERQ +CREATE IOCTL to create the queue using the specified MQD details in the IOCTL. +The kernel driver then validates the MQD provided by the application and +translates the MQD into the engine specific MQD format for the IP. The IP +specific MQD would be allocated and the queue would be added to the run list +maintained by the scheduling firmware. Once the queue has been created, the +application can write packets directly into the queue, update the wptr, and +write to the doorbell offset to kick off work in the user queue. + +When the application is done with the user queue, it would call the USERQ +FREE IOCTL to destroy it. The kernel driver would preempt the queue and +remove it from the scheduling firmware's run list. Then the IP specific MQD +would be freed and the user queue state would be cleaned up. + +Some engines may require the aggregated doorbell too if the engine does not +support doorbells from unmapped queues. The aggregated doorbell is a special +page of doorbell space which wakes the scheduler. In cases where the engine may +be oversubscribed, some queues may not be mapped. If the doorbell is rung when +the queue is not mapped, the engine firmware may miss the request. Some +scheduling firmware may work around this by polling wptr shadows when the +hardware is oversubscribed, other engines may support doorbell updates from +unmapped queues. In the event that one of these options is not available, the +kernel driver will map a page of aggregated doorbell space into each GPUVM +space. The UMD will then update the doorbell and wptr as normal and then write +to the aggregated doorbell as well. + +Special Packets +--------------- + +In order to support legacy implicit synchronization, as well as mixed user and +kernel queues, we need a synchronization mechanism that is secure. Because +kernel queues or memory management tasks depend on kernel fences, we need a way +for user queues to update memory that the kernel can use for a fence, that can't +be messed with by a bad actor. To support this, we've added a protected fence +packet. This packet works by writing a monotonically increasing value to +a memory location that only privileged clients have write access to. User +queues only have read access. When this packet is executed, the memory location +is updated and other queues (kernel or user) can see the results. The +user application would submit this packet in their command stream. The actual +packet format varies from IP to IP (GFX/Compute, SDMA, VCN, etc.), but the +behavior is the same. The packet submission is handled in userspace. The +kernel driver sets up the privileged memory used for each user queue when it +sets the queues up when the application creates them. + + +Memory Management +================= + +It is assumed that all buffers mapped into the GPUVM space for the process are +valid when engines on the GPU are running. The kernel driver will only allow +user queues to run when all buffers are mapped. If there is a memory event that +requires buffer migration, the kernel driver will preempt the user queues, +migrate buffers to where they need to be, update the GPUVM page tables and +invaldidate the TLB, and then resume the user queues. + +Interaction with Kernel Queues +============================== + +Depending on the IP and the scheduling firmware, you can enable kernel queues +and user queues at the same time, however, you are limited by the HQD slots. +Kernel queues are always mapped so any work that goes into kernel queues will +take priority. This limits the available HQD slots for user queues. + +Not all IPs will support user queues on all GPUs. As such, UMDs will need to +support both user queues and kernel queues depending on the IP. For example, a +GPU may support user queues for GFX, compute, and SDMA, but not for VCN, JPEG, +and VPE. UMDs need to support both. The kernel driver provides a way to +determine if user queues and kernel queues are supported on a per IP basis. +UMDs can query this information via the INFO IOCTL and determine whether to use +kernel queues or user queues for each IP. + +Queue Resets +============ + +For most engines, queues can be reset individually. GFX, compute, and SDMA +queues can be reset individually. When a hung queue is detected, it can be +reset either via the scheduling firmware or MMIO. Since there are no kernel +fences for most user queues, they will usually only be detected when some other +event happens; e.g., a memory event which requires migration of buffers. When +the queues are preempted, if the queue is hung, the preemption will fail. +Driver will then look up the queues that failed to preempt and reset them and +record which queues are hung. + +On the UMD side, we will add a USERQ QUERY_STATUS IOCTL to query the queue +status. UMD will provide the queue id in the IOCTL and the kernel driver +will check if it has already recorded the queue as hung (e.g., due to failed +peemption) and report back the status. + +IOCTL Interfaces +================ + +GPU virtual addresses used for queues and related data (rptrs, wptrs, context +save areas, etc.) should be validated by the kernel mode driver to prevent the +user from specifying invalid GPU virtual addresses. If the user provides +invalid GPU virtual addresses or doorbell indicies, the IOCTL should return an +error message. These buffers should also be tracked in the kernel driver so +that if the user attempts to unmap the buffer(s) from the GPUVM, the umap call +would return an error. + +INFO +---- +There are several new INFO queries related to user queues in order to query the +size of user queue meta data needed for a user queue (e.g., context save areas +or shadow buffers), whether kernel or user queues or both are supported +for each IP type, and the offsets for each IP type in each doorbell page. + +USERQ +----- +The USERQ IOCTL is used for creating, freeing, and querying the status of user +queues. It supports 3 opcodes: + +1. CREATE - Create a user queue. The application provides an MQD-like structure + that defines the type of queue and associated metadata and flags for that + queue type. Returns the queue id. +2. FREE - Free a user queue. +3. QUERY_STATUS - Query that status of a queue. Used to check if the queue is + healthy or not. E.g., if the queue has been reset. (WIP) + +USERQ_SIGNAL +------------ +The USERQ_SIGNAL IOCTL is used to provide a list of sync objects to be signaled. + +USERQ_WAIT +---------- +The USERQ_WAIT IOCTL is used to provide a list of sync object to be waited on. + +Kernel and User Queues +====================== + +In order to properly validate and test performance, we have a driver option to +select what type of queues are enabled (kernel queues, user queues or both). +The user_queue driver parameter allows you to enable kernel queues only (0), +user queues and kernel queues (1), and user queues only (2). Enabling user +queues only will free up static queue assignments that would otherwise be used +by kernel queues for use by the scheduling firmware. Some kernel queues are +required for kernel driver operation and they will always be created. When the +kernel queues are not enabled, they are not registered with the drm scheduler +and the CS IOCTL will reject any incoming command submissions which target those +queue types. Kernel queues only mirrors the behavior on all existing GPUs. +Enabling both queues allows for backwards compatibility with old userspace while +still supporting user queues. -- cgit v1.2.3 From 7aada81cd75ad844c84fb1dcdce2d67ec41763f8 Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Sun, 14 Sep 2025 16:18:48 +0300 Subject: dt-bindings: mmc: samsung,exynos-dw-mshc: add specific compatible for exynos8890 Add samsung,exynos8890-dw-mshc-smu specific compatible to the bindings documentation. Since Samsung, as usual, likes reusing devices from older designs, use the samsung,exynos7-dw-mshc-smu compatible. Signed-off-by: Ivaylo Ivanov Acked-by: Rob Herring (Arm) Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml index e8bd49d46794..27c4060f2f91 100644 --- a/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml @@ -31,6 +31,7 @@ properties: - samsung,exynos5433-dw-mshc-smu - samsung,exynos7885-dw-mshc-smu - samsung,exynos850-dw-mshc-smu + - samsung,exynos8890-dw-mshc-smu - samsung,exynos8895-dw-mshc-smu - const: samsung,exynos7-dw-mshc-smu -- cgit v1.2.3 From 06f2969c6a1237f05f8ba4324b6ddc2570a808d0 Mon Sep 17 00:00:00 2001 From: Yang Weijiang Date: Fri, 19 Sep 2025 15:32:11 -0700 Subject: KVM: x86: Introduce KVM_{G,S}ET_ONE_REG uAPIs support Enable KVM_{G,S}ET_ONE_REG uAPIs so that userspace can access MSRs and other non-MSR registers through them, along with support for KVM_GET_REG_LIST to enumerate support for KVM-defined registers. This is in preparation for allowing userspace to read/write the guest SSP register, which is needed for the upcoming CET virtualization support. Currently, two types of registers are supported: KVM_X86_REG_TYPE_MSR and KVM_X86_REG_TYPE_KVM. All MSRs are in the former type; the latter type is added for registers that lack existing KVM uAPIs to access them. The "KVM" in the name is intended to be vague to give KVM flexibility to include other potential registers. More precise names like "SYNTHETIC" and "SYNTHETIC_MSR" were considered, but were deemed too confusing (e.g. can be conflated with synthetic guest-visible MSRs) and may put KVM into a corner (e.g. if KVM wants to change how a KVM-defined register is modeled internally). Enumerate only KVM-defined registers in KVM_GET_REG_LIST to avoid duplicating KVM_GET_MSR_INDEX_LIST, and so that KVM can return _only_ registers that are fully supported (KVM_GET_REG_LIST is vCPU-scoped, i.e. can be precise, whereas KVM_GET_MSR_INDEX_LIST is system-scoped). Suggested-by: Sean Christopherson Signed-off-by: Yang Weijiang Link: https://lore.kernel.org/all/20240219074733.122080-18-weijiang.yang@intel.com [1] Tested-by: Mathias Krause Tested-by: John Allen Tested-by: Rick Edgecombe Signed-off-by: Chao Gao Reviewed-by: Binbin Wu Reviewed-by: Xiaoyao Li Co-developed-by: Sean Christopherson Link: https://lore.kernel.org/r/20250919223258.1604852-5-seanjc@google.com Signed-off-by: Sean Christopherson --- Documentation/virt/kvm/api.rst | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index b3f2395a62d1..0e82fc5abd7b 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -2908,6 +2908,8 @@ such as set vcpu counter or reset vcpu, and they have the following id bit patte 0x9030 0000 0002 +x86 MSR registers have the following id bit patterns:: + 0x2030 0002 4.69 KVM_GET_ONE_REG -------------------- @@ -3588,7 +3590,7 @@ VCPU matching underlying host. --------------------- :Capability: basic -:Architectures: arm64, mips, riscv +:Architectures: arm64, mips, riscv, x86 (if KVM_CAP_ONE_REG) :Type: vcpu ioctl :Parameters: struct kvm_reg_list (in/out) :Returns: 0 on success; -1 on error @@ -3631,6 +3633,8 @@ Note that s390 does not support KVM_GET_REG_LIST for historical reasons - KVM_REG_S390_GBEA +Note, for x86, all MSRs enumerated by KVM_GET_MSR_INDEX_LIST are supported as +type KVM_X86_REG_TYPE_MSR, but are NOT enumerated via KVM_GET_REG_LIST. 4.85 KVM_ARM_SET_DEVICE_ADDR (deprecated) ----------------------------------------- -- cgit v1.2.3 From 9d6812d415358372aaaf1dfe95bc30d11e4e95db Mon Sep 17 00:00:00 2001 From: Yang Weijiang Date: Fri, 19 Sep 2025 15:32:20 -0700 Subject: KVM: x86: Enable guest SSP read/write interface with new uAPIs Add a KVM-defined ONE_REG register, KVM_REG_GUEST_SSP, to let userspace save and restore the guest's Shadow Stack Pointer (SSP). On both Intel and AMD, SSP is a hardware register that can only be accessed by software via dedicated ISA (e.g. RDSSP) or via VMCS/VMCB fields (used by hardware to context switch SSP at entry/exit). As a result, SSP doesn't fit in any of KVM's existing interfaces for saving/restoring state. Internally, treat SSP as a fake/synthetic MSR, as the semantics of writes to SSP follow that of several other Shadow Stack MSRs, e.g. the PLx_SSP MSRs. Use a translation layer to hide the KVM-internal MSR index so that the arbitrary index doesn't become ABI, e.g. so that KVM can rework its implementation as needed, so long as the ONE_REG ABI is maintained. Explicitly reject accesses to SSP if the vCPU doesn't have Shadow Stack support to avoid running afoul of ignore_msrs, which unfortunately applies to host-initiated accesses (which is a discussion for another day). I.e. ensure consistent behavior for KVM-defined registers irrespective of ignore_msrs. Link: https://lore.kernel.org/all/aca9d389-f11e-4811-90cf-d98e345a5cc2@intel.com Suggested-by: Sean Christopherson Signed-off-by: Yang Weijiang Tested-by: Mathias Krause Tested-by: John Allen Tested-by: Rick Edgecombe Signed-off-by: Chao Gao Reviewed-by: Binbin Wu Reviewed-by: Xiaoyao Li Link: https://lore.kernel.org/r/20250919223258.1604852-14-seanjc@google.com Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson --- Documentation/virt/kvm/api.rst | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index 0e82fc5abd7b..fac1774031ee 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -2911,6 +2911,14 @@ such as set vcpu counter or reset vcpu, and they have the following id bit patte x86 MSR registers have the following id bit patterns:: 0x2030 0002 +Following are the KVM-defined registers for x86: + +======================= ========= ============================================= + Encoding Register Description +======================= ========= ============================================= + 0x2030 0003 0000 0000 SSP Shadow Stack Pointer +======================= ========= ============================================= + 4.69 KVM_GET_ONE_REG -------------------- -- cgit v1.2.3 From 8d13f91d7fce4e842dfc7edbcba0690f7ed11c18 Mon Sep 17 00:00:00 2001 From: Yixun Lan Date: Wed, 17 Sep 2025 11:38:13 +0800 Subject: dt-bindings: i2c: spacemit: extend and validate all properties Extend the K1 I2C properties by including generic i2c-controller schema. and this will enable it to do the DT validation check later. Signed-off-by: Yixun Lan Reviewed-by: Troy Mitchell Tested-by: Alex Elder Acked-by: Conor Dooley Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml b/Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml index 3d6aefb0d0f1..226c600deae1 100644 --- a/Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml @@ -9,6 +9,9 @@ title: I2C controller embedded in SpacemiT's K1 SoC maintainers: - Troy Mitchell +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + properties: compatible: const: spacemit,k1-i2c -- cgit v1.2.3 From 8ab3bd59f9fc210a1a88b509f6931cf3f5ea229a Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Sun, 14 Sep 2025 16:16:20 +0300 Subject: dt-bindings: i2c: exynos5: add samsung,exynos8890-hsi2c compatible Add samsung,exynos8890-hsi2c compatible, reusing the 8895 support since it's compatible with exynos8890's i2c controllers. Signed-off-by: Ivaylo Ivanov Acked-by: Rob Herring (Arm) Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml index 6fc03281a8f8..32269239bae4 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml @@ -33,6 +33,10 @@ properties: - samsung,exynos7870-hsi2c - tesla,fsd-hsi2c - const: samsung,exynos7-hsi2c + - items: + - enum: + - samsung,exynos8890-hsi2c + - const: samsung,exynos8895-hsi2c - items: - enum: - google,gs101-hsi2c -- cgit v1.2.3 From 958e55f90a01451de77e22063d37b60388219b96 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 21 Aug 2025 10:32:06 +0200 Subject: dt-bindings: i2c: spacemit,k1-i2c: Minor whitespace cleanup in example The DTS code coding style expects exactly one space around '=' character. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Troy Mitchell Acked-by: Rob Herring (Arm) Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml b/Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml index 3d6aefb0d0f1..c1a3004df71d 100644 --- a/Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml @@ -53,7 +53,7 @@ examples: reg = <0xd4010800 0x38>; interrupt-parent = <&plic>; interrupts = <36>; - clocks =<&ccu 32>, <&ccu 84>; + clocks = <&ccu 32>, <&ccu 84>; clock-names = "func", "bus"; clock-frequency = <100000>; }; -- cgit v1.2.3 From 492263fd564c882a7170a58d3dffb4574de042d4 Mon Sep 17 00:00:00 2001 From: Anup Patel Date: Mon, 18 Aug 2025 09:38:57 +0530 Subject: dt-bindings: mailbox: Add bindings for RPMI shared memory transport Add device tree bindings for the common RISC-V Platform Management Interface (RPMI) shared memory transport as a mailbox controller. Reviewed-by: Conor Dooley Signed-off-by: Anup Patel Acked-by: Jassi Brar Link: https://lore.kernel.org/r/20250818040920.272664-2-apatel@ventanamicro.com Signed-off-by: Paul Walmsley --- .../bindings/mailbox/riscv,rpmi-shmem-mbox.yaml | 124 +++++++++++++++++++++ 1 file changed, 124 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/riscv,rpmi-shmem-mbox.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mailbox/riscv,rpmi-shmem-mbox.yaml b/Documentation/devicetree/bindings/mailbox/riscv,rpmi-shmem-mbox.yaml new file mode 100644 index 000000000000..3aabc52a0c03 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/riscv,rpmi-shmem-mbox.yaml @@ -0,0 +1,124 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/riscv,rpmi-shmem-mbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RISC-V Platform Management Interface (RPMI) shared memory mailbox + +maintainers: + - Anup Patel + +description: | + The RISC-V Platform Management Interface (RPMI) [1] defines a common shared + memory based RPMI transport. This RPMI shared memory transport integrates as + mailbox controller in the SBI implementation or supervisor software whereas + each RPMI service group is mailbox client in the SBI implementation and + supervisor software. + + =========================================== + References + =========================================== + + [1] RISC-V Platform Management Interface (RPMI) v1.0 (or higher) + https://github.com/riscv-non-isa/riscv-rpmi/releases + +properties: + compatible: + const: riscv,rpmi-shmem-mbox + + reg: + minItems: 2 + items: + - description: A2P request queue base address + - description: P2A acknowledgment queue base address + - description: P2A request queue base address + - description: A2P acknowledgment queue base address + - description: A2P doorbell address + + reg-names: + minItems: 2 + items: + - const: a2p-req + - const: p2a-ack + - enum: [ p2a-req, a2p-doorbell ] + - const: a2p-ack + - const: a2p-doorbell + + interrupts: + maxItems: 1 + description: + The RPMI shared memory transport supports P2A doorbell as a wired + interrupt and this property specifies the interrupt source. + + msi-parent: + description: + The RPMI shared memory transport supports P2A doorbell as a system MSI + and this property specifies the target MSI controller. + + riscv,slot-size: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 64 + description: + Power-of-2 RPMI slot size of the RPMI shared memory transport. + + riscv,a2p-doorbell-value: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0x1 + description: + Value written to the 32-bit A2P doorbell register. + + riscv,p2a-doorbell-sysmsi-index: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The RPMI shared memory transport supports P2A doorbell as a system MSI + and this property specifies system MSI index to be used for configuring + the P2A doorbell MSI. + + "#mbox-cells": + const: 1 + description: + The first cell specifies RPMI service group ID. + +required: + - compatible + - reg + - reg-names + - riscv,slot-size + - "#mbox-cells" + +anyOf: + - required: + - interrupts + - required: + - msi-parent + +additionalProperties: false + +examples: + - | + // Example 1 (RPMI shared memory with only 2 queues): + mailbox@10080000 { + compatible = "riscv,rpmi-shmem-mbox"; + reg = <0x10080000 0x10000>, + <0x10090000 0x10000>; + reg-names = "a2p-req", "p2a-ack"; + msi-parent = <&imsic_mlevel>; + riscv,slot-size = <64>; + #mbox-cells = <1>; + }; + - | + // Example 2 (RPMI shared memory with only 4 queues): + mailbox@10001000 { + compatible = "riscv,rpmi-shmem-mbox"; + reg = <0x10001000 0x800>, + <0x10001800 0x800>, + <0x10002000 0x800>, + <0x10002800 0x800>, + <0x10003000 0x4>; + reg-names = "a2p-req", "p2a-ack", "p2a-req", "a2p-ack", "a2p-doorbell"; + msi-parent = <&imsic_mlevel>; + riscv,slot-size = <64>; + riscv,a2p-doorbell-value = <0x00008000>; + #mbox-cells = <1>; + }; -- cgit v1.2.3 From 52aefc1e3c5fbdfdd216796fbe78443ae67e447f Mon Sep 17 00:00:00 2001 From: Julien Massot Date: Tue, 26 Aug 2025 09:39:35 +0200 Subject: ASoC: dt-binding: Convert mt8183-afe-pcm to dt-schema Convert the MediaTek MT8183 AFE PCM Device Tree binding from the old .txt format to dt-schema format to improve validation. While converting, also document all clock inputs and memory-region used by the AFE block. Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Signed-off-by: Julien Massot Link: https://patch.msgid.link/20250826-mtk-dtb-warnings-v3-2-20e89886a20e@collabora.com Signed-off-by: Mark Brown --- .../bindings/sound/mediatek,mt8183-audio.yaml | 228 +++++++++++++++++++++ .../devicetree/bindings/sound/mt8183-afe-pcm.txt | 42 ---- 2 files changed, 228 insertions(+), 42 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/mediatek,mt8183-audio.yaml delete mode 100644 Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt8183-audio.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt8183-audio.yaml new file mode 100644 index 000000000000..031b0fa7b4dc --- /dev/null +++ b/Documentation/devicetree/bindings/sound/mediatek,mt8183-audio.yaml @@ -0,0 +1,228 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/mediatek,mt8183-audio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek AFE PCM controller for mt8183 + +maintainers: + - Julien Massot + +properties: + compatible: + const: mediatek,mt8183-audio + + interrupts: + maxItems: 1 + + resets: + maxItems: 1 + + reset-names: + const: audiosys + + power-domains: + maxItems: 1 + + memory-region: + maxItems: 1 + + clocks: + items: + - description: AFE clock + - description: ADDA DAC clock + - description: ADDA DAC pre-distortion clock + - description: ADDA ADC clock + - description: ADDA6 ADC clock + - description: Audio low-jitter 22.5792m clock + - description: Audio low-jitter 24.576m clock + - description: Audio PLL1 tuner clock + - description: Audio PLL2 tuner clock + - description: I2S1 bit clock + - description: I2S2 bit clock + - description: I2S3 bit clock + - description: I2S4 bit clock + - description: Audio Time-Division Multiplexing interface clock + - description: Powerdown Audio test model clock + - description: Audio infra sys clock + - description: Audio infra 26M clock + - description: Mux for audio clock + - description: Mux for audio internal bus clock + - description: Mux main divider by 4 + - description: Primary audio mux + - description: Primary audio PLL + - description: Secondary audio mux + - description: Secondary audio PLL + - description: Primary audio en-generator clock + - description: Primary PLL divider by 4 for IEC + - description: Secondary audio en-generator clock + - description: Secondary PLL divider by 8 for IEC + - description: Mux selector for I2S port 0 + - description: Mux selector for I2S port 1 + - description: Mux selector for I2S port 2 + - description: Mux selector for I2S port 3 + - description: Mux selector for I2S port 4 + - description: Mux selector for I2S port 5 + - description: APLL1 and APLL2 divider for I2S port 0 + - description: APLL1 and APLL2 divider for I2S port 1 + - description: APLL1 and APLL2 divider for I2S port 2 + - description: APLL1 and APLL2 divider for I2S port 3 + - description: APLL1 and APLL2 divider for I2S port 4 + - description: APLL1 and APLL2 divider for IEC + - description: 26MHz clock for audio subsystem + + clock-names: + items: + - const: aud_afe_clk + - const: aud_dac_clk + - const: aud_dac_predis_clk + - const: aud_adc_clk + - const: aud_adc_adda6_clk + - const: aud_apll22m_clk + - const: aud_apll24m_clk + - const: aud_apll1_tuner_clk + - const: aud_apll2_tuner_clk + - const: aud_i2s1_bclk_sw + - const: aud_i2s2_bclk_sw + - const: aud_i2s3_bclk_sw + - const: aud_i2s4_bclk_sw + - const: aud_tdm_clk + - const: aud_tml_clk + - const: aud_infra_clk + - const: mtkaif_26m_clk + - const: top_mux_audio + - const: top_mux_aud_intbus + - const: top_syspll_d2_d4 + - const: top_mux_aud_1 + - const: top_apll1_ck + - const: top_mux_aud_2 + - const: top_apll2_ck + - const: top_mux_aud_eng1 + - const: top_apll1_d8 + - const: top_mux_aud_eng2 + - const: top_apll2_d8 + - const: top_i2s0_m_sel + - const: top_i2s1_m_sel + - const: top_i2s2_m_sel + - const: top_i2s3_m_sel + - const: top_i2s4_m_sel + - const: top_i2s5_m_sel + - const: top_apll12_div0 + - const: top_apll12_div1 + - const: top_apll12_div2 + - const: top_apll12_div3 + - const: top_apll12_div4 + - const: top_apll12_divb + - const: top_clk26m_clk + +required: + - compatible + - interrupts + - resets + - reset-names + - power-domains + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + audio-controller { + compatible = "mediatek,mt8183-audio"; + interrupts = ; + resets = <&watchdog MT8183_TOPRGU_AUDIO_SW_RST>; + reset-names = "audiosys"; + power-domains = <&spm MT8183_POWER_DOMAIN_AUDIO>; + clocks = <&audiosys CLK_AUDIO_AFE>, + <&audiosys CLK_AUDIO_DAC>, + <&audiosys CLK_AUDIO_DAC_PREDIS>, + <&audiosys CLK_AUDIO_ADC>, + <&audiosys CLK_AUDIO_PDN_ADDA6_ADC>, + <&audiosys CLK_AUDIO_22M>, + <&audiosys CLK_AUDIO_24M>, + <&audiosys CLK_AUDIO_APLL_TUNER>, + <&audiosys CLK_AUDIO_APLL2_TUNER>, + <&audiosys CLK_AUDIO_I2S1>, + <&audiosys CLK_AUDIO_I2S2>, + <&audiosys CLK_AUDIO_I2S3>, + <&audiosys CLK_AUDIO_I2S4>, + <&audiosys CLK_AUDIO_TDM>, + <&audiosys CLK_AUDIO_TML>, + <&infracfg CLK_INFRA_AUDIO>, + <&infracfg CLK_INFRA_AUDIO_26M_BCLK>, + <&topckgen CLK_TOP_MUX_AUDIO>, + <&topckgen CLK_TOP_MUX_AUD_INTBUS>, + <&topckgen CLK_TOP_SYSPLL_D2_D4>, + <&topckgen CLK_TOP_MUX_AUD_1>, + <&topckgen CLK_TOP_APLL1_CK>, + <&topckgen CLK_TOP_MUX_AUD_2>, + <&topckgen CLK_TOP_APLL2_CK>, + <&topckgen CLK_TOP_MUX_AUD_ENG1>, + <&topckgen CLK_TOP_APLL1_D8>, + <&topckgen CLK_TOP_MUX_AUD_ENG2>, + <&topckgen CLK_TOP_APLL2_D8>, + <&topckgen CLK_TOP_MUX_APLL_I2S0>, + <&topckgen CLK_TOP_MUX_APLL_I2S1>, + <&topckgen CLK_TOP_MUX_APLL_I2S2>, + <&topckgen CLK_TOP_MUX_APLL_I2S3>, + <&topckgen CLK_TOP_MUX_APLL_I2S4>, + <&topckgen CLK_TOP_MUX_APLL_I2S5>, + <&topckgen CLK_TOP_APLL12_DIV0>, + <&topckgen CLK_TOP_APLL12_DIV1>, + <&topckgen CLK_TOP_APLL12_DIV2>, + <&topckgen CLK_TOP_APLL12_DIV3>, + <&topckgen CLK_TOP_APLL12_DIV4>, + <&topckgen CLK_TOP_APLL12_DIVB>, + <&clk26m>; + clock-names = "aud_afe_clk", + "aud_dac_clk", + "aud_dac_predis_clk", + "aud_adc_clk", + "aud_adc_adda6_clk", + "aud_apll22m_clk", + "aud_apll24m_clk", + "aud_apll1_tuner_clk", + "aud_apll2_tuner_clk", + "aud_i2s1_bclk_sw", + "aud_i2s2_bclk_sw", + "aud_i2s3_bclk_sw", + "aud_i2s4_bclk_sw", + "aud_tdm_clk", + "aud_tml_clk", + "aud_infra_clk", + "mtkaif_26m_clk", + "top_mux_audio", + "top_mux_aud_intbus", + "top_syspll_d2_d4", + "top_mux_aud_1", + "top_apll1_ck", + "top_mux_aud_2", + "top_apll2_ck", + "top_mux_aud_eng1", + "top_apll1_d8", + "top_mux_aud_eng2", + "top_apll2_d8", + "top_i2s0_m_sel", + "top_i2s1_m_sel", + "top_i2s2_m_sel", + "top_i2s3_m_sel", + "top_i2s4_m_sel", + "top_i2s5_m_sel", + "top_apll12_div0", + "top_apll12_div1", + "top_apll12_div2", + "top_apll12_div3", + "top_apll12_div4", + "top_apll12_divb", + "top_clk26m_clk"; + }; + +... diff --git a/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt b/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt deleted file mode 100644 index 1f1cba4152ce..000000000000 --- a/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt +++ /dev/null @@ -1,42 +0,0 @@ -Mediatek AFE PCM controller for mt8183 - -Required properties: -- compatible = "mediatek,mt68183-audio"; -- reg: register location and size -- interrupts: should contain AFE interrupt -- resets: Must contain an entry for each entry in reset-names - See ../reset/reset.txt for details. -- reset-names: should have these reset names: - "audiosys"; -- power-domains: should define the power domain -- clocks: Must contain an entry for each entry in clock-names -- clock-names: should have these clock names: - "infra_sys_audio_clk", - "mtkaif_26m_clk", - "top_mux_audio", - "top_mux_aud_intbus", - "top_sys_pll3_d4", - "top_clk26m_clk"; - -Example: - - afe: mt8183-afe-pcm@11220000 { - compatible = "mediatek,mt8183-audio"; - reg = <0 0x11220000 0 0x1000>; - interrupts = ; - resets = <&watchdog MT8183_TOPRGU_AUDIO_SW_RST>; - reset-names = "audiosys"; - power-domains = <&scpsys MT8183_POWER_DOMAIN_AUDIO>; - clocks = <&infrasys CLK_INFRA_AUDIO>, - <&infrasys CLK_INFRA_AUDIO_26M_BCLK>, - <&topckgen CLK_TOP_MUX_AUDIO>, - <&topckgen CLK_TOP_MUX_AUD_INTBUS>, - <&topckgen CLK_TOP_SYSPLL_D2_D4>, - <&clk26m>; - clock-names = "infra_sys_audio_clk", - "mtkaif_26m_clk", - "top_mux_audio", - "top_mux_aud_intbus", - "top_sys_pll_d2_d4", - "top_clk26m_clk"; - }; -- cgit v1.2.3 From cf5be90ee4dfa3c38dc64fbcc4fb70fa0180b7b7 Mon Sep 17 00:00:00 2001 From: Julien Massot Date: Tue, 26 Aug 2025 09:39:38 +0200 Subject: ASoC: Convert MT8183 DA7219 sound card to DT schema Convert the Device Tree binding for MT8183-based boards using the DA7219 headset codec and optional MAX98357, RT1015 or RT1015P speaker amplifiers from the legacy .txt format to DT schema. This improves binding validation and removes DT schema warnings for boards using these audio components. Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Signed-off-by: Julien Massot Link: https://patch.msgid.link/20250826-mtk-dtb-warnings-v3-5-20e89886a20e@collabora.com Signed-off-by: Mark Brown --- .../bindings/sound/mediatek,mt8183_da7219.yaml | 49 ++++++++++++++++++++++ .../bindings/sound/mt8183-da7219-max98357.txt | 21 ---------- 2 files changed, 49 insertions(+), 21 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/mediatek,mt8183_da7219.yaml delete mode 100644 Documentation/devicetree/bindings/sound/mt8183-da7219-max98357.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt8183_da7219.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt8183_da7219.yaml new file mode 100644 index 000000000000..b526e8123182 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/mediatek,mt8183_da7219.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/mediatek,mt8183_da7219.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT8183 sound card with external codecs + +maintainers: + - Julien Massot + +description: + MediaTek MT8183 SoC-based sound cards with DA7219 as headset codec, + and MAX98357A, RT1015 or RT1015P as speaker amplifiers. Optionally includes HDMI codec. + +properties: + compatible: + enum: + - mediatek,mt8183_da7219_max98357 + - mediatek,mt8183_da7219_rt1015 + - mediatek,mt8183_da7219_rt1015p + + mediatek,headset-codec: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to the DA7219 headset codec. + + mediatek,platform: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to the MT8183 ASoC platform (e.g., AFE node). + + mediatek,hdmi-codec: + $ref: /schemas/types.yaml#/definitions/phandle + description: Optional phandle to the HDMI codec (e.g., IT6505). + +required: + - compatible + - mediatek,headset-codec + - mediatek,platform + +additionalProperties: false + +examples: + - | + sound { + compatible = "mediatek,mt8183_da7219_max98357"; + mediatek,headset-codec = <&da7219>; + mediatek,hdmi-codec = <&it6505dptx>; + mediatek,platform = <&afe>; + }; diff --git a/Documentation/devicetree/bindings/sound/mt8183-da7219-max98357.txt b/Documentation/devicetree/bindings/sound/mt8183-da7219-max98357.txt deleted file mode 100644 index f276dfc74b46..000000000000 --- a/Documentation/devicetree/bindings/sound/mt8183-da7219-max98357.txt +++ /dev/null @@ -1,21 +0,0 @@ -MT8183 with MT6358, DA7219, MAX98357, and RT1015 CODECS - -Required properties: -- compatible : "mediatek,mt8183_da7219_max98357" for MAX98357A codec - "mediatek,mt8183_da7219_rt1015" for RT1015 codec - "mediatek,mt8183_da7219_rt1015p" for RT1015P codec -- mediatek,headset-codec: the phandles of da7219 codecs -- mediatek,platform: the phandle of MT8183 ASoC platform - -Optional properties: -- mediatek,hdmi-codec: the phandles of HDMI codec - -Example: - - sound { - compatible = "mediatek,mt8183_da7219_max98357"; - mediatek,headset-codec = <&da7219>; - mediatek,hdmi-codec = <&it6505dptx>; - mediatek,platform = <&afe>; - }; - -- cgit v1.2.3 From 82fd5dc99d63f948c59ac3b08137ef49125938bc Mon Sep 17 00:00:00 2001 From: Julien Massot Date: Tue, 26 Aug 2025 09:39:39 +0200 Subject: ASoC: dt-binding: Convert MediaTek mt8183-mt6358 to DT schema Convert the existing text-based DT binding for MT8183 sound cards using MT6358 and various other codecs to a DT schema. Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Signed-off-by: Julien Massot Link: https://patch.msgid.link/20250826-mtk-dtb-warnings-v3-6-20e89886a20e@collabora.com Signed-off-by: Mark Brown --- .../sound/mediatek,mt8183_mt6358_ts3a227.yaml | 59 ++++++++++++++++++++++ .../sound/mt8183-mt6358-ts3a227-max98357.txt | 25 --------- 2 files changed, 59 insertions(+), 25 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/mediatek,mt8183_mt6358_ts3a227.yaml delete mode 100644 Documentation/devicetree/bindings/sound/mt8183-mt6358-ts3a227-max98357.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt8183_mt6358_ts3a227.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt8183_mt6358_ts3a227.yaml new file mode 100644 index 000000000000..43a6f9d40644 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/mediatek,mt8183_mt6358_ts3a227.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/mediatek,mt8183_mt6358_ts3a227.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT8183 sound card with MT6358, TS3A227, and MAX98357/RT1015 codecs + +maintainers: + - Julien Massot + +description: + MediaTek MT8183 SoC-based sound cards using the MT6358 codec, + with optional TS3A227 headset codec, EC codec (via Chrome EC), and HDMI audio. + Speaker amplifier can be one of MAX98357A/B, RT1015, or RT1015P. + +properties: + compatible: + enum: + - mediatek,mt8183_mt6358_ts3a227_max98357 + - mediatek,mt8183_mt6358_ts3a227_max98357b + - mediatek,mt8183_mt6358_ts3a227_rt1015 + - mediatek,mt8183_mt6358_ts3a227_rt1015p + + mediatek,platform: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to the MT8183 ASoC platform node (e.g., AFE). + + mediatek,headset-codec: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to the TS3A227 headset codec. + + mediatek,ec-codec: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + Optional phandle to a ChromeOS EC codec node. + See bindings in google,cros-ec-codec.yaml. + + mediatek,hdmi-codec: + $ref: /schemas/types.yaml#/definitions/phandle + description: Optional phandle to an HDMI audio codec node. + +required: + - compatible + - mediatek,platform + +additionalProperties: false + +examples: + - | + sound { + compatible = "mediatek,mt8183_mt6358_ts3a227_max98357"; + mediatek,headset-codec = <&ts3a227>; + mediatek,ec-codec = <&ec_codec>; + mediatek,hdmi-codec = <&it6505dptx>; + mediatek,platform = <&afe>; + }; + +... diff --git a/Documentation/devicetree/bindings/sound/mt8183-mt6358-ts3a227-max98357.txt b/Documentation/devicetree/bindings/sound/mt8183-mt6358-ts3a227-max98357.txt deleted file mode 100644 index ecd46ed8eb98..000000000000 --- a/Documentation/devicetree/bindings/sound/mt8183-mt6358-ts3a227-max98357.txt +++ /dev/null @@ -1,25 +0,0 @@ -MT8183 with MT6358, TS3A227, MAX98357, and RT1015 CODECS - -Required properties: -- compatible : "mediatek,mt8183_mt6358_ts3a227_max98357" for MAX98357A codec - "mediatek,mt8183_mt6358_ts3a227_max98357b" for MAX98357B codec - "mediatek,mt8183_mt6358_ts3a227_rt1015" for RT1015 codec - "mediatek,mt8183_mt6358_ts3a227_rt1015p" for RT1015P codec -- mediatek,platform: the phandle of MT8183 ASoC platform - -Optional properties: -- mediatek,headset-codec: the phandles of ts3a227 codecs -- mediatek,ec-codec: the phandle of EC codecs. - See google,cros-ec-codec.txt for more details. -- mediatek,hdmi-codec: the phandles of HDMI codec - -Example: - - sound { - compatible = "mediatek,mt8183_mt6358_ts3a227_max98357"; - mediatek,headset-codec = <&ts3a227>; - mediatek,ec-codec = <&ec_codec>; - mediatek,hdmi-codec = <&it6505dptx>; - mediatek,platform = <&afe>; - }; - -- cgit v1.2.3 From 45d78cd0bf2c40e74c31f70340484e20aae45b07 Mon Sep 17 00:00:00 2001 From: SungMin Park Date: Wed, 17 Sep 2025 12:43:11 +0530 Subject: dt-bindings: timer: exynos4210-mct: Add compatible for ARTPEC-9 SoC Add Axis ARTPEC-9 mct compatible to the bindings documentation. The design for the timer is reused from previous Samsung SoCs like exynos4210 and ARTPEC-8. Signed-off-by: SungMin Park Signed-off-by: Ravi Patel Signed-off-by: Daniel Lezcano Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250917071311.1404-1-ravi.patel@samsung.com --- Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml index 10578f544581..a4b229e0e78a 100644 --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml @@ -26,6 +26,7 @@ properties: - items: - enum: - axis,artpec8-mct + - axis,artpec9-mct - google,gs101-mct - samsung,exynos2200-mct-peris - samsung,exynos3250-mct @@ -131,6 +132,7 @@ allOf: contains: enum: - axis,artpec8-mct + - axis,artpec9-mct - google,gs101-mct - samsung,exynos2200-mct-peris - samsung,exynos5260-mct -- cgit v1.2.3 From bca9b6633fb92ff37247442d08f3889a2e87881c Mon Sep 17 00:00:00 2001 From: Cosmo Chou Date: Tue, 16 Sep 2025 17:50:25 +0800 Subject: dt-bindings: trivial-devices: add mps,mp5998 Add dt-bindings for MPS mp5998 hot-swap controller. Signed-off-by: Cosmo Chou Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250916095026.800164-1-chou.cosmo@gmail.com Signed-off-by: Guenter Roeck --- Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index edaba5cd8434..12cb7f64b988 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -315,6 +315,8 @@ properties: - mps,mp5920 # Monolithic Power Systems Inc. multi-phase hot-swap controller mp5990 - mps,mp5990 + # Monolithic Power Systems Inc. multi-phase hot-swap controller mp5998 + - mps,mp5998 # Monolithic Power Systems Inc. digital step-down converter mp9941 - mps,mp9941 # Temperature sensor with integrated fan control -- cgit v1.2.3 From bef3c793542b132ab1dc19076ce4f91594b5fbdc Mon Sep 17 00:00:00 2001 From: Cosmo Chou Date: Tue, 16 Sep 2025 17:50:26 +0800 Subject: hwmon: (pmbus/mp5990) add support for MP5998 Add support for the MPS MP5998 hot-swap controller. Like MP5990, MP5998 uses EFUSE_CFG (0xC4) bit 9 to indicate linear/direct data format. Signed-off-by: Cosmo Chou Link: https://lore.kernel.org/r/20250916095026.800164-2-chou.cosmo@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/mp5990.rst | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/hwmon/mp5990.rst b/Documentation/hwmon/mp5990.rst index 6f2f0c099d44..7fd536757ff2 100644 --- a/Documentation/hwmon/mp5990.rst +++ b/Documentation/hwmon/mp5990.rst @@ -9,9 +9,13 @@ Supported chips: Prefix: 'mp5990' - * Datasheet + Datasheet: Publicly available at the MPS website: https://www.monolithicpower.com/en/mp5990.html - Publicly available at the MPS website : https://www.monolithicpower.com/en/mp5990.html + * MPS MP5998 + + Prefix: 'mp5998' + + Datasheet: Not publicly available Author: @@ -21,7 +25,7 @@ Description ----------- This driver implements support for Monolithic Power Systems, Inc. (MPS) -MP5990 Hot-Swap Controller. +MP5990 and MP5998 Hot-Swap Controller. Device compliant with: @@ -53,7 +57,7 @@ The driver provides the following attributes for output voltage: **in2_alarm** -The driver provides the following attributes for output current: +The driver provides the following attributes for current: **curr1_input** @@ -63,6 +67,14 @@ The driver provides the following attributes for output current: **curr1_max** +**curr2_input** + +**curr2_label** + +**curr2_max** + +**curr2_max_alarm** + The driver provides the following attributes for input power: **power1_input** @@ -71,6 +83,16 @@ The driver provides the following attributes for input power: **power1_alarm** +The driver provides the following attributes for output power: + +**power2_input** + +**power2_label** + +**power2_max** + +**power2_max_alarm** + The driver provides the following attributes for temperature: **temp1_input** -- cgit v1.2.3 From 5d5ec7c81c372d33875e0176f9f6d68e3e813e32 Mon Sep 17 00:00:00 2001 From: Shane Fagan Date: Sun, 14 Sep 2025 09:41:14 +0200 Subject: hwmon: (asus-ec-sensors) add ROG STRIX X670E-E GAMING WIFI Add support for ROG STRIX X670E-E GAMING WIFI Signed-off-by: Shane Fagan Signed-off-by: Eugene Shalygin Link: https://lore.kernel.org/r/20250914074125.135656-1-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/asus_ec_sensors.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/asus_ec_sensors.rst index 6a9c5f30e016..836d41373848 100644 --- a/Documentation/hwmon/asus_ec_sensors.rst +++ b/Documentation/hwmon/asus_ec_sensors.rst @@ -33,6 +33,7 @@ Supported boards: * ROG STRIX X570-E GAMING WIFI II * ROG STRIX X570-F GAMING * ROG STRIX X570-I GAMING + * ROG STRIX X670E-E GAMING WIFI * ROG STRIX X670E-I GAMING WIFI * ROG STRIX X870-I GAMING WIFI * ROG STRIX Z390-F GAMING -- cgit v1.2.3 From 2c8ac03aad7a8dd649de9080503c68319afb43f9 Mon Sep 17 00:00:00 2001 From: Ben Copeland Date: Tue, 23 Sep 2025 21:26:55 +0200 Subject: hwmon: (asus-ec-sensors) add ROG STRIX X870E-E GAMING WIFI Add support for ROG STRIX X870E-E GAMING WIFI This board uses the same sensor configuration as the ProArt X870E-CREATOR WIFI motherboard. Signed-off-by: Ben Copeland Signed-off-by: Eugene Shalygin Link: https://lore.kernel.org/r/20250923192935.11339-2-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/asus_ec_sensors.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/asus_ec_sensors.rst index 836d41373848..5801bc4279c0 100644 --- a/Documentation/hwmon/asus_ec_sensors.rst +++ b/Documentation/hwmon/asus_ec_sensors.rst @@ -36,6 +36,7 @@ Supported boards: * ROG STRIX X670E-E GAMING WIFI * ROG STRIX X670E-I GAMING WIFI * ROG STRIX X870-I GAMING WIFI + * ROG STRIX X870E-E GAMING WIFI * ROG STRIX Z390-F GAMING * ROG STRIX Z490-F GAMING * ROG STRIX Z690-A GAMING WIFI D4 -- cgit v1.2.3 From 1c1658058c99bcfd3b2347e587a556986037f80a Mon Sep 17 00:00:00 2001 From: Armin Wolf Date: Wed, 17 Sep 2025 20:10:35 +0200 Subject: hwmon: (dell-smm) Add support for automatic fan mode Many machines treat fan state 3 as some sort of automatic mode, which is superior to the separate SMM calls for switching to automatic fan mode for two reasons: - the fan control mode can be controlled for each fan separately - the current fan control mode can be retrieved from the BIOS On some machines however, this special fan state does not exist. Fan state 3 acts like a regular fan state on such machines or does not exist at all. Such machines usually use separate SMM calls for enabling/disabling automatic fan control. Add support for it. If the machine supports separate SMM calls for changing the fan control mode, then the other interface is ignored. Signed-off-by: Armin Wolf Link: https://lore.kernel.org/r/20250917181036.10972-4-W_Armin@gmx.de Signed-off-by: Guenter Roeck --- Documentation/hwmon/dell-smm-hwmon.rst | 56 +++++++++++++++++++++------------- 1 file changed, 35 insertions(+), 21 deletions(-) (limited to 'Documentation') diff --git a/Documentation/hwmon/dell-smm-hwmon.rst b/Documentation/hwmon/dell-smm-hwmon.rst index 5a4edb6565cf..3e4e2d916ac5 100644 --- a/Documentation/hwmon/dell-smm-hwmon.rst +++ b/Documentation/hwmon/dell-smm-hwmon.rst @@ -38,7 +38,7 @@ fan[1-4]_min RO Minimal Fan speed in RPM fan[1-4]_max RO Maximal Fan speed in RPM fan[1-4]_target RO Expected Fan speed in RPM pwm[1-4] RW Control the fan PWM duty-cycle. -pwm1_enable WO Enable or disable automatic BIOS fan +pwm[1-4]_enable RW/WO Enable or disable automatic BIOS fan control (not supported on all laptops, see below for details). temp[1-10]_input RO Temperature reading in milli-degrees @@ -49,26 +49,40 @@ temp[1-10]_label RO Temperature sensor label. Due to the nature of the SMM interface, each pwmX attribute controls fan number X. -Disabling automatic BIOS fan control ------------------------------------- - -On some laptops the BIOS automatically sets fan speed every few -seconds. Therefore the fan speed set by mean of this driver is quickly -overwritten. - -There is experimental support for disabling automatic BIOS fan -control, at least on laptops where the corresponding SMM command is -known, by writing the value ``1`` in the attribute ``pwm1_enable`` -(writing ``2`` enables automatic BIOS control again). Even if you have -more than one fan, all of them are set to either enabled or disabled -automatic fan control at the same time and, notwithstanding the name, -``pwm1_enable`` sets automatic control for all fans. - -If ``pwm1_enable`` is not available, then it means that SMM codes for -enabling and disabling automatic BIOS fan control are not whitelisted -for your hardware. It is possible that codes that work for other -laptops actually work for yours as well, or that you have to discover -new codes. +Enabling/Disabling automatic BIOS fan control +--------------------------------------------- + +There exist two methods for enabling/disabling automatic BIOS fan control: + +1. Separate SMM commands to enable/disable automatic BIOS fan control for all fans. + +2. A special fan state that enables automatic BIOS fan control for a individual fan. + +The driver cannot reliably detect what method should be used on a given +device, so instead the following heuristic is used: + +- use fan state 3 for enabling BIOS fan control if the maximum fan state + setable by the user is smaller than 3 (default setting). + +- use separate SMM commands if device is whitelisted to support them. + +When using the first method, each fan will have a standard ``pwmX_enable`` +sysfs attribute. Writing ``1`` into this attribute will disable automatic +BIOS fan control for the associated fan and set it to maximum speed. Enabling +BIOS fan control again can be achieved by writing ``2`` into this attribute. +Reading this sysfs attributes returns the current setting as reported by +the underlying hardware. + +When using the second method however, only the ``pwm1_enable`` sysfs attribute +will be available to enable/disable automatic BIOS fan control globaly for all +fans available on a given device. Additionally, this sysfs attribute is write-only +as there exists no SMM command for reading the current fan control setting. + +If no ``pwmX_enable`` attributes are available, then it means that the driver +cannot use the first method and the SMM codes for enabling and disabling automatic +BIOS fan control are not whitelisted for your device. It is possible that codes +that work for other laptops actually work for yours as well, or that you have to +discover new codes. Check the list ``i8k_whitelist_fan_control`` in file ``drivers/hwmon/dell-smm-hwmon.c`` in the kernel tree: as a first -- cgit v1.2.3 From cf6f234d7dfbbb13197eb71e7716412d4e30988d Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Tue, 23 Sep 2025 16:37:34 +0200 Subject: dt-bindings: touchscreen: add debounce-delay-us property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for glitch delay configuration. A detected signal is valid only if it remains stable longer than the configured delay; otherwise, it is considered a glitch. This property was introduced for the i.MX6UL touchscreen controller (TSC), which provides a hardware deglitch filter with four thresholds depending on the IPG clock frequency. In this use case, the IPG clock rate is 66 MHz, resulting in thresholds of 124 µs, 62 µs, 31 µs, and 15 µs, which requires a property with microsecond-level resolution. Signed-off-by: Dario Binacchi Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250923143746.2857292-4-dario.binacchi@amarulasolutions.com Signed-off-by: Dmitry Torokhov --- Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml b/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml index 3e3572aa483a..7023e8c73a7b 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml @@ -206,6 +206,10 @@ properties: unevaluatedProperties: false + debounce-delay-us: + description: Minimum duration in microseconds a signal must remain stable + to be considered valid. + dependencies: touchscreen-size-x: [ touchscreen-size-y ] touchscreen-size-y: [ touchscreen-size-x ] -- cgit v1.2.3 From 3fccd1f9552dd073915b0a69d43cc03c582ce79b Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Tue, 23 Sep 2025 16:37:35 +0200 Subject: dt-bindings: touchscreen: fsl,imx6ul-tsc: support glitch thresold Support the debounce-delay-us property. Drivers must convert this value to IPG clock cycles and map it to one of the four discrete thresholds exposed by the TSC_DEBUG_MODE2 register: 0: 8191 IPG cycles 1: 4095 IPG cycles 2: 2047 IPG cycles 3: 1023 IPG cycles Signed-off-by: Dario Binacchi Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250923143746.2857292-5-dario.binacchi@amarulasolutions.com Signed-off-by: Dmitry Torokhov --- .../bindings/input/touchscreen/fsl,imx6ul-tsc.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml index 678756ad0f92..a99280aefcbe 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml @@ -62,6 +62,20 @@ properties: description: Number of data samples which are averaged for each read. enum: [ 1, 4, 8, 16, 32 ] + debounce-delay-us: + description: | + Minimum duration in microseconds a signal must remain stable + to be considered valid. + + Drivers must convert this value to IPG clock cycles and map + it to one of the four discrete thresholds exposed by the + TSC_DEBUG_MODE2 register: + + 0: 8191 IPG cycles + 1: 4095 IPG cycles + 2: 2047 IPG cycles + 3: 1023 IPG cycles + required: - compatible - reg -- cgit v1.2.3 From f9afce4f32e9a120fc902fa6c9e0b90ad799a6ec Mon Sep 17 00:00:00 2001 From: Kees Cook Date: Tue, 23 Sep 2025 14:34:18 -0700 Subject: kconfig: Add transitional symbol attribute for migration support During kernel option migrations (e.g. CONFIG_CFI_CLANG to CONFIG_CFI), existing .config files need to maintain backward compatibility while preventing deprecated options from appearing in newly generated configurations. This is challenging with existing Kconfig mechanisms because: 1. Simply removing old options breaks existing .config files. 2. Manually listing an option as "deprecated" leaves it needlessly visible and still writes them to new .config files. 3. Using any method to remove visibility (.e.g no 'prompt', 'if n', etc) prevents the option from being processed at all. Add a "transitional" attribute that creates symbols which are: - Processed during configuration (can influence other symbols' defaults) - Hidden from user menus (no prompts appear) - Omitted from newly written .config files (gets migrated) - Restricted to only having help sections (no defaults, selects, etc) making it truly just a "prior value pass-through" option. The transitional syntax requires a type argument and prevents type redefinition: config NEW_OPTION bool "New option" default OLD_OPTION config OLD_OPTION bool transitional help Transitional config for OLD_OPTION migration. This allows seamless migration: olddefconfig processes existing CONFIG_OLD_OPTION=y settings to enable CONFIG_NEW_OPTION=y, while CONFIG_OLD_OPTION is omitted from newly generated .config files. Added positive and negative testing via "testconfig" make target. Co-developed-by: Vegard Nossum Signed-off-by: Vegard Nossum Reviewed-by: Nathan Chancellor Tested-by: Nathan Chancellor Link: https://lore.kernel.org/r/20250923213422.1105654-2-kees@kernel.org Signed-off-by: Kees Cook --- Documentation/kbuild/kconfig-language.rst | 32 +++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'Documentation') diff --git a/Documentation/kbuild/kconfig-language.rst b/Documentation/kbuild/kconfig-language.rst index a91abb8f6840..abce88f15d7c 100644 --- a/Documentation/kbuild/kconfig-language.rst +++ b/Documentation/kbuild/kconfig-language.rst @@ -232,6 +232,38 @@ applicable everywhere (see syntax). enables the third modular state for all config symbols. At most one symbol may have the "modules" option set. +- transitional attribute: "transitional" + This declares the symbol as transitional, meaning it should be processed + during configuration but omitted from newly written .config files. + Transitional symbols are useful for backward compatibility during config + option migrations - they allow olddefconfig to process existing .config + files while ensuring the old option doesn't appear in new configurations. + + A transitional symbol: + - Has no prompt (is not visible to users in menus) + - Is processed normally during configuration (values are read and used) + - Can be referenced in default expressions of other symbols + - Is not written to new .config files + - Cannot have any other properties (it is a pass-through option) + + Example migration from OLD_NAME to NEW_NAME:: + + config NEW_NAME + bool "New option name" + default OLD_NAME + help + This replaces the old CONFIG_OLD_NAME option. + + config OLD_NAME + bool + transitional + help + Transitional config for OLD_NAME to NEW_NAME migration. + + With this setup, existing .config files with "CONFIG_OLD_NAME=y" will + result in "CONFIG_NEW_NAME=y" being set, while CONFIG_OLD_NAME will be + omitted from newly written .config files. + Menu dependencies ----------------- -- cgit v1.2.3 From 581b4da1f73c9e0caf9b7d0a46d1b5a0b36fbe20 Mon Sep 17 00:00:00 2001 From: Anup Patel Date: Mon, 18 Aug 2025 09:38:58 +0530 Subject: dt-bindings: mailbox: Add bindings for RISC-V SBI MPXY extension Add device tree bindings for the RISC-V SBI Message Proxy (MPXY) extension as a mailbox controller. Reviewed-by: Conor Dooley Signed-off-by: Anup Patel Acked-by: Jassi Brar Link: https://lore.kernel.org/r/20250818040920.272664-3-apatel@ventanamicro.com Signed-off-by: Paul Walmsley --- .../bindings/mailbox/riscv,sbi-mpxy-mbox.yaml | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/riscv,sbi-mpxy-mbox.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mailbox/riscv,sbi-mpxy-mbox.yaml b/Documentation/devicetree/bindings/mailbox/riscv,sbi-mpxy-mbox.yaml new file mode 100644 index 000000000000..061437a0b45a --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/riscv,sbi-mpxy-mbox.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/riscv,sbi-mpxy-mbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RISC-V SBI Message Proxy (MPXY) extension based mailbox + +maintainers: + - Anup Patel + +description: | + The RISC-V SBI Message Proxy (MPXY) extension [1] allows supervisor + software to send messages through the SBI implementation (M-mode + firmware or HS-mode hypervisor). The underlying message protocol + and message format used by the supervisor software could be some + other standard protocol compatible with the SBI MPXY extension + (such as RISC-V Platform Management Interface (RPMI) [2]). + + =========================================== + References + =========================================== + + [1] RISC-V Supervisor Binary Interface (SBI) v3.0 (or higher) + https://github.com/riscv-non-isa/riscv-sbi-doc/releases + + [2] RISC-V Platform Management Interface (RPMI) v1.0 (or higher) + https://github.com/riscv-non-isa/riscv-rpmi/releases + +properties: + compatible: + const: riscv,sbi-mpxy-mbox + + "#mbox-cells": + const: 2 + description: + The first cell specifies channel_id of the SBI MPXY channel, + the second cell specifies MSG_PROT_ID of the SBI MPXY channel + +required: + - compatible + - "#mbox-cells" + +additionalProperties: false + +examples: + - | + mailbox { + compatible = "riscv,sbi-mpxy-mbox"; + #mbox-cells = <2>; + }; -- cgit v1.2.3 From 1d7e08325090045b6b08ecda6f9eaa471d309880 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=2E=20Neusch=C3=A4fer?= Date: Tue, 23 Sep 2025 01:10:01 +0200 Subject: dt-bindings: net: ethernet-controller: Fix grammar in comment MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit "difference" is a noun, so "sufficient" is an adjective without "ly". Signed-off-by: J. Neuschäfer Reviewed-by: Andrew Lunn Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250923-dt-net-typo-v1-1-08e1bdd14c74@posteo.net Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/ethernet-controller.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml index 2c924d296a8f..e4b6e9c92994 100644 --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -279,7 +279,7 @@ additionalProperties: true # specified. # # One option is to make the clock traces on the PCB longer than the -# data traces. A sufficiently difference in length can provide the 2ns +# data traces. A sufficient difference in length can provide the 2ns # delay. If both the RX and TX delays are implemented in this manner, # 'rgmii' should be used, so indicating the PCB adds the delays. # -- cgit v1.2.3 From 25aab8f3ce56fd3cdf921c206ce42d1cdede5259 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 30 Aug 2025 12:36:03 +0200 Subject: dt-bindings: i2c: samsung,s3c2410-i2c: Drop S3C2410 Samsung S3C2410 SoC was removed from the Linux kernel in the commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January 2023. There are no in-kernel users of "samsung,s3c2410-i2c" compatible. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) Reviewed-by: Andi Shyti Signed-off-by: Andi Shyti Link: https://lore.kernel.org/r/20250830103601.82046-4-krzysztof.kozlowski@linaro.org --- Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml | 2 -- 1 file changed, 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml b/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml index 6ba7d793504c..a2ddc6803617 100644 --- a/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml @@ -13,7 +13,6 @@ properties: compatible: oneOf: - enum: - - samsung,s3c2410-i2c - samsung,s3c2440-i2c # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs: - samsung,s3c2440-hdmiphy-i2c @@ -93,7 +92,6 @@ allOf: compatible: contains: enum: - - samsung,s3c2410-i2c - samsung,s3c2440-i2c - samsung,s3c2440-hdmiphy-i2c then: -- cgit v1.2.3 From 217f92d91c9faeb6b78bd6205b3585944cbcb433 Mon Sep 17 00:00:00 2001 From: Igor Belwon Date: Sat, 20 Sep 2025 19:22:52 +0200 Subject: dt-bindings: i2c: i2c-mt65xx: Document MediaTek MT6878 I2C Document the I2C controllers found in the MediaTek MT6878 SoC, by adding a new compatible string for the controllers. Their design is compatible with the design from the MediaTek MT8188 SoC. Signed-off-by: Igor Belwon Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20250920-mt6878-i2c-bringup-v2-1-70a951f10be9@mentallysanemainliners.org Signed-off-by: Andi Shyti --- Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml index 23fe8ff76645..bd6811cbde70 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml @@ -50,6 +50,10 @@ properties: - enum: - mediatek,mt6795-i2c - const: mediatek,mt8173-i2c + - items: + - enum: + - mediatek,mt6878-i2c + - const: mediatek,mt8188-i2c - items: - enum: - mediatek,mt6893-i2c -- cgit v1.2.3 From 5de92bd0d7543f04e6f495103b69644f6e8e8d70 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Mon, 22 Sep 2025 19:41:37 +0700 Subject: Documentation: rxrpc: Demote three sections Three sections ("Socket Options", "Security", and "Example Client Usage") use title headings, which increase number of entries in the networking docs toctree by three, and also make the rest of sections headed under "Example Client Usage". Demote these sections back to section headings. Signed-off-by: Bagas Sanjaya Reviewed-by: Simon Horman Acked-by: David Howells Link: https://patch.msgid.link/20250922124137.5266-1-bagasdotme@gmail.com Signed-off-by: Jakub Kicinski --- Documentation/networking/rxrpc.rst | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/rxrpc.rst b/Documentation/networking/rxrpc.rst index d63e3e27dd06..8926dab8e2e6 100644 --- a/Documentation/networking/rxrpc.rst +++ b/Documentation/networking/rxrpc.rst @@ -437,8 +437,7 @@ message type supported. At run time this can be queried by means of the RXRPC_SUPPORTED_CMSG socket option (see below). -============== -SOCKET OPTIONS +Socket Options ============== AF_RXRPC sockets support a few socket options at the SOL_RXRPC level: @@ -495,8 +494,7 @@ AF_RXRPC sockets support a few socket options at the SOL_RXRPC level: the highest control message type supported. -======== -SECURITY +Security ======== Currently, only the kerberos 4 equivalent protocol has been implemented @@ -540,8 +538,7 @@ be found at: http://people.redhat.com/~dhowells/rxrpc/listen.c -==================== -EXAMPLE CLIENT USAGE +Example Client Usage ==================== A client would issue an operation by: -- cgit v1.2.3 From 91945660ac29341710b0914db200f6eacf251513 Mon Sep 17 00:00:00 2001 From: Ram Kumar Dwivedi Date: Wed, 17 Sep 2025 19:39:30 +0530 Subject: scsi: ufs: dt-bindings: Document gear and rate limit properties Add optional "limit-hs-gear" and "limit-rate" properties to the UFS controller common binding. These properties allow limiting the maximum HS gear and rate. This is useful in cases where the customer board may have signal integrity, clock configuration or layout issues that prevent reliable operation at higher gears. Such limitations are especially critical in those platforms, where stability is prioritized over peak performance. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Ram Kumar Dwivedi Reviewed-by: Alim Akhtar Signed-off-by: Martin K. Petersen --- Documentation/devicetree/bindings/ufs/ufs-common.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml index 31fe7f30ff5b..9f04f34d8c5a 100644 --- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml @@ -89,6 +89,22 @@ properties: msi-parent: true + limit-hs-gear: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 6 + default: 6 + description: + Restricts the maximum HS gear used in both TX and RX directions. + + limit-gear-rate: + $ref: /schemas/types.yaml#/definitions/string + enum: [rate-a, rate-b] + default: rate-b + description: + Restricts the UFS controller to rate-a or rate-b for both TX and + RX directions. + dependencies: freq-table-hz: [ clocks ] operating-points-v2: [ clocks, clock-names ] -- cgit v1.2.3 From 67c9b685c7f8f19b2f449fdd5fb6a0a0c39f429a Mon Sep 17 00:00:00 2001 From: Oleh Kuzhylnyi Date: Wed, 24 Sep 2025 21:42:47 -0700 Subject: dt-bindings: input: touchscreen: add hynitron cst816x series Add documentation for Hynitron CST816x series touchscreen bindings. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Oleh Kuzhylnyi Link: https://lore.kernel.org/r/20250921125939.249788-1-kuzhylol@gmail.com Signed-off-by: Dmitry Torokhov --- .../input/touchscreen/hynitron,cst816x.yaml | 65 ++++++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/input/touchscreen/hynitron,cst816x.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/touchscreen/hynitron,cst816x.yaml b/Documentation/devicetree/bindings/input/touchscreen/hynitron,cst816x.yaml new file mode 100644 index 000000000000..72d4da636881 --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/hynitron,cst816x.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/touchscreen/hynitron,cst816x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hynitron CST816x Series Capacitive Touch controller + +maintainers: + - Oleh Kuzhylnyi + +description: | + Bindings for CST816x high performance self-capacitance touch chip series + with single point gesture and real two-point operation. + +properties: + compatible: + enum: + - hynitron,cst816s + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + reset-gpios: + maxItems: 1 + + linux,keycodes: + minItems: 1 + items: + - description: Slide up gesture + - description: Slide down gesture + - description: Slide left gesture + - description: Slide right gesture + - description: Long press gesture + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + #include + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + touchscreen@15 { + compatible = "hynitron,cst816s"; + reg = <0x15>; + interrupt-parent = <&gpio0>; + interrupts = <4 IRQ_TYPE_EDGE_RISING>; + reset-gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + linux,keycodes = , , , , + ; + }; + }; + +... -- cgit v1.2.3 From 95e6b0af80525d14cb35fc664dd3ce5d5756dac1 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Tue, 9 Sep 2025 07:59:51 -0700 Subject: dt-bindings: input: pm8941-pwrkey: Document wakeup-source property The 'resin' keys (usually connected to a volume-down button) are generally not supposed to wake up the device from suspend, so explicitly document a wakeup-source property to enable this wakeup behavior. For 'pwrkey' the default stays that pressing the button does wake up the device from suspend. Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250909-resin-wakeup-v1-1-46159940e02b@lucaweiss.eu Signed-off-by: Dmitry Torokhov --- .../bindings/input/qcom,pm8941-pwrkey.yaml | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/qcom,pm8941-pwrkey.yaml b/Documentation/devicetree/bindings/input/qcom,pm8941-pwrkey.yaml index 72006a14fd41..f978cf965a4d 100644 --- a/Documentation/devicetree/bindings/input/qcom,pm8941-pwrkey.yaml +++ b/Documentation/devicetree/bindings/input/qcom,pm8941-pwrkey.yaml @@ -10,9 +10,6 @@ maintainers: - Courtney Cavin - Vinod Koul -allOf: - - $ref: input.yaml# - properties: compatible: enum: @@ -36,12 +33,30 @@ properties: configured for pull up. $ref: /schemas/types.yaml#/definitions/flag + wakeup-source: + description: + Button can wake-up the system. Only applicable for 'resin', 'pwrkey' + always wakes the system by default. + linux,code: description: The input key-code associated with the power key. Use the linux event codes defined in include/dt-bindings/input/linux-event-codes.h. When property is omitted KEY_POWER is assumed. +allOf: + - $ref: input.yaml# + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8941-pwrkey + - qcom,pmk8350-pwrkey + then: + properties: + wakeup-source: false + required: - compatible - interrupts -- cgit v1.2.3 From b9607ff0f86ad310f4a5e6ac985b1e89d78fd3ec Mon Sep 17 00:00:00 2001 From: Darshan Prajapati Date: Mon, 25 Aug 2025 18:54:22 +0530 Subject: dt-bindings: riscv: Add SiFive P550 CPU compatible Update Documentation for supporting SiFive P550 based CPU Signed-off-by: Darshan Prajapati Reviewed-by: Samuel Holland Signed-off-by: Pinkesh Vaghela Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250825132427.1618089-2-pinkesh.vaghela@einfochips.com Signed-off-by: Arnd Bergmann --- Documentation/devicetree/bindings/riscv/cpus.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index 1a0cf0702a45..153d0dac57fb 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -52,6 +52,7 @@ properties: - sifive,e5 - sifive,e7 - sifive,e71 + - sifive,p550 - sifive,rocket0 - sifive,s7 - sifive,u5 -- cgit v1.2.3 From 3e907d0faa798f612747cbeacb6185e9a4ee4db1 Mon Sep 17 00:00:00 2001 From: Pritesh Patel Date: Mon, 25 Aug 2025 18:54:24 +0530 Subject: dt-bindings: riscv: Add SiFive HiFive Premier P550 board Add DT binding documentation for the ESWIN EIC7700 SoC and HiFive Premier P550 Board Signed-off-by: Pritesh Patel Reviewed-by: Samuel Holland Signed-off-by: Pinkesh Vaghela Reviewed-by: Matthias Brugger Reviewed-by: Rob Herring (Arm) Acked-by: Min Lin Link: https://lore.kernel.org/r/20250825132427.1618089-4-pinkesh.vaghela@einfochips.com Signed-off-by: Arnd Bergmann --- Documentation/devicetree/bindings/riscv/eswin.yaml | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/riscv/eswin.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/riscv/eswin.yaml b/Documentation/devicetree/bindings/riscv/eswin.yaml new file mode 100644 index 000000000000..c603c45eef22 --- /dev/null +++ b/Documentation/devicetree/bindings/riscv/eswin.yaml @@ -0,0 +1,29 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/riscv/eswin.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ESWIN SoC-based boards + +maintainers: + - Min Lin + - Pinkesh Vaghela + - Pritesh Patel + +description: + ESWIN SoC-based boards + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - sifive,hifive-premier-p550 + - const: eswin,eic7700 + +additionalProperties: true + +... -- cgit v1.2.3 From 21b5a7ace6b2fc2fdee1eda4a802e0abfe192262 Mon Sep 17 00:00:00 2001 From: Darshan Prajapati Date: Mon, 25 Aug 2025 18:54:25 +0530 Subject: dt-bindings: interrupt-controller: Add ESWIN EIC7700 PLIC Add compatible string for ESWIN EIC7700 PLIC. Signed-off-by: Darshan Prajapati Reviewed-by: Samuel Holland Signed-off-by: Pinkesh Vaghela Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250825132427.1618089-5-pinkesh.vaghela@einfochips.com Signed-off-by: Arnd Bergmann --- .../devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml index 5b827bc24301..f683d696909b 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml @@ -59,6 +59,7 @@ properties: - items: - enum: - canaan,k210-plic + - eswin,eic7700-plic - sifive,fu540-c000-plic - spacemit,k1-plic - starfive,jh7100-plic -- cgit v1.2.3 From 3ed17349f18774c24505b0c21dfbd3cc4f126518 Mon Sep 17 00:00:00 2001 From: Daniel Lee Date: Wed, 24 Sep 2025 14:17:17 -0400 Subject: platform/x86: lg-laptop: Fix WMAB call in fan_mode_store() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When WMAB is called to set the fan mode, the new mode is read from either bits 0-1 or bits 4-5 (depending on the value of some other EC register). Thus when WMAB is called with bits 4-5 zeroed and called again with bits 0-1 zeroed, the second call undoes the effect of the first call. This causes writes to /sys/devices/platform/lg-laptop/fan_mode to have no effect (and causes reads to always report a status of zero). Fix this by calling WMAB once, with the mode set in bits 0,1 and 4,5. When the fan mode is returned from WMAB it always has this form, so there is no need to preserve the other bits. As a bonus, the driver now supports the "Performance" fan mode seen in the LG-provided Windows control app, which provides less aggressive CPU throttling but louder fan noise and shorter battery life. Also, correct the documentation to reflect that 0 corresponds to the default mode (what the Windows app calls "Optimal") and 1 corresponds to the silent mode. Fixes: dbf0c5a6b1f8 ("platform/x86: Add LG Gram laptop special features driver") Link: https://bugzilla.kernel.org/show_bug.cgi?id=204913#c4 Signed-off-by: Daniel Lee Link: https://patch.msgid.link/MN2PR06MB55989CB10E91C8DA00EE868DDC1CA@MN2PR06MB5598.namprd06.prod.outlook.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/admin-guide/laptops/lg-laptop.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/laptops/lg-laptop.rst b/Documentation/admin-guide/laptops/lg-laptop.rst index 67fd6932cef4..c4dd534f91ed 100644 --- a/Documentation/admin-guide/laptops/lg-laptop.rst +++ b/Documentation/admin-guide/laptops/lg-laptop.rst @@ -48,8 +48,8 @@ This value is reset to 100 when the kernel boots. Fan mode -------- -Writing 1/0 to /sys/devices/platform/lg-laptop/fan_mode disables/enables -the fan silent mode. +Writing 0/1/2 to /sys/devices/platform/lg-laptop/fan_mode sets fan mode to +Optimal/Silent/Performance respectively. USB charge -- cgit v1.2.3 From 3271f19bf7b9df665549666d789b9f126b4420c7 Mon Sep 17 00:00:00 2001 From: Richard Gobert Date: Tue, 23 Sep 2025 10:59:06 +0200 Subject: net: gso: restore ids of outer ip headers correctly Currently, NETIF_F_TSO_MANGLEID indicates that the inner-most ID can be mangled. Outer IDs can always be mangled. Make GSO preserve outer IDs by default, with NETIF_F_TSO_MANGLEID allowing both inner and outer IDs to be mangled. This commit also modifies a few drivers that use SKB_GSO_FIXEDID directly. Signed-off-by: Richard Gobert Reviewed-by: Edward Cree # for sfc Reviewed-by: Willem de Bruijn Link: https://patch.msgid.link/20250923085908.4687-4-richardbgobert@gmail.com Signed-off-by: Paolo Abeni --- Documentation/networking/segmentation-offloads.rst | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/segmentation-offloads.rst b/Documentation/networking/segmentation-offloads.rst index 085e8fab03fd..72f69b22b28c 100644 --- a/Documentation/networking/segmentation-offloads.rst +++ b/Documentation/networking/segmentation-offloads.rst @@ -43,10 +43,19 @@ also point to the TCP header of the packet. For IPv4 segmentation we support one of two types in terms of the IP ID. The default behavior is to increment the IP ID with every segment. If the GSO type SKB_GSO_TCP_FIXEDID is specified then we will not increment the IP -ID and all segments will use the same IP ID. If a device has -NETIF_F_TSO_MANGLEID set then the IP ID can be ignored when performing TSO -and we will either increment the IP ID for all frames, or leave it at a -static value based on driver preference. +ID and all segments will use the same IP ID. + +For encapsulated packets, SKB_GSO_TCP_FIXEDID refers only to the outer header. +SKB_GSO_TCP_FIXEDID_INNER can be used to specify the same for the inner header. +Any combination of these two GSO types is allowed. + +If a device has NETIF_F_TSO_MANGLEID set then the IP ID can be ignored when +performing TSO and we will either increment the IP ID for all frames, or leave +it at a static value based on driver preference. For encapsulated packets, +NETIF_F_TSO_MANGLEID is relevant for both outer and inner headers, unless the +DF bit is not set on the outer header, in which case the device driver must +guarantee that the IP ID field is incremented in the outer header with every +segment. UDP Fragmentation Offload @@ -124,10 +133,7 @@ Generic Receive Offload Generic receive offload is the complement to GSO. Ideally any frame assembled by GRO should be segmented to create an identical sequence of frames using GSO, and any sequence of frames segmented by GSO should be -able to be reassembled back to the original by GRO. The only exception to -this is IPv4 ID in the case that the DF bit is set for a given IP header. -If the value of the IPv4 ID is not sequentially incrementing it will be -altered so that it is when a frame assembled via GRO is segmented via GSO. +able to be reassembled back to the original by GRO. Partial Generic Segmentation Offload -- cgit v1.2.3 From 37fac070eb1e59db81a9b3b18340083878a0a2c9 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 24 Sep 2025 21:47:58 +0200 Subject: Documentation: kbuild: note CONFIG_DEBUG_EFI in reproducible builds CONFIG_EFI_DEBUG embeds absolute file paths into object files, which makes the resulting vmlinux specific to the build environment. Add a note about this in reproducible-builds.rst Signed-off-by: Masahiro Yamada Signed-off-by: Nicolas Schier Reviewed-by: Randy Dunlap Tested-by: Randy Dunlap Link: https://patch.msgid.link/20250924-kbuild-doc-config-debug-efi-in-reproducible-builds-v2-1-d2d6b9dcdb7d@kernel.org Signed-off-by: Nathan Chancellor --- Documentation/kbuild/reproducible-builds.rst | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/kbuild/reproducible-builds.rst b/Documentation/kbuild/reproducible-builds.rst index f2dcc39044e6..96d208e578cd 100644 --- a/Documentation/kbuild/reproducible-builds.rst +++ b/Documentation/kbuild/reproducible-builds.rst @@ -61,6 +61,9 @@ supported. The Reproducible Builds web site has more information about these `prefix-map options`_. +Some CONFIG options such as `CONFIG_DEBUG_EFI` embed absolute paths in +object files. Such options should be disabled. + Generated files in source packages ---------------------------------- -- cgit v1.2.3 From 64826db1e2e177b58dcbc7cf1e1379527be2185a Mon Sep 17 00:00:00 2001 From: Harrison Carter Date: Tue, 16 Sep 2025 16:11:01 +0100 Subject: dt-bindings: leds: as3645: Convert to DT schema Convert the ams,as3645a.txt to DT Schema format. Signed-off-by: Harrison Carter Reviewed-by: "Rob Herring (Arm)" Signed-off-by: Lee Jones --- .../devicetree/bindings/leds/ams,as3645a.txt | 85 -------------- .../devicetree/bindings/leds/ams,as3645a.yaml | 130 +++++++++++++++++++++ 2 files changed, 130 insertions(+), 85 deletions(-) delete mode 100644 Documentation/devicetree/bindings/leds/ams,as3645a.txt create mode 100644 Documentation/devicetree/bindings/leds/ams,as3645a.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/leds/ams,as3645a.txt b/Documentation/devicetree/bindings/leds/ams,as3645a.txt deleted file mode 100644 index 4af2987b25e9..000000000000 --- a/Documentation/devicetree/bindings/leds/ams,as3645a.txt +++ /dev/null @@ -1,85 +0,0 @@ -Analog devices AS3645A device tree bindings - -The AS3645A flash LED controller can drive two LEDs, one high current -flash LED and one indicator LED. The high current flash LED can be -used in torch mode as well. - -Ranges below noted as [a, b] are closed ranges between a and b, i.e. a -and b are included in the range. - -Please also see common.txt in the same directory. - - -Required properties -=================== - -compatible : Must be "ams,as3645a". -reg : The I2C address of the device. Typically 0x30. -#address-cells : 1 -#size-cells : 0 - - -Required properties of the flash child node (0) -=============================================== - -reg: 0 -flash-timeout-us: Flash timeout in microseconds. The value must be in - the range [100000, 850000] and divisible by 50000. -flash-max-microamp: Maximum flash current in microamperes. Has to be - in the range between [200000, 500000] and - divisible by 20000. -led-max-microamp: Maximum torch (assist) current in microamperes. The - value must be in the range between [20000, 160000] and - divisible by 20000. -ams,input-max-microamp: Maximum flash controller input current. The - value must be in the range [1250000, 2000000] - and divisible by 50000. - - -Optional properties of the flash child node -=========================================== - -function : See Documentation/devicetree/bindings/leds/common.txt. -color : See Documentation/devicetree/bindings/leds/common.txt. -label : See Documentation/devicetree/bindings/leds/common.txt (deprecated). - - -Required properties of the indicator child node (1) -=================================================== - -reg: 1 -led-max-microamp: Maximum indicator current. The allowed values are - 2500, 5000, 7500 and 10000. - -Optional properties of the indicator child node -=============================================== - -function : See Documentation/devicetree/bindings/leds/common.txt. -color : See Documentation/devicetree/bindings/leds/common.txt. -label : See Documentation/devicetree/bindings/leds/common.txt (deprecated). - - -Example -======= - -#include - - as3645a@30 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x30>; - compatible = "ams,as3645a"; - led@0 { - reg = <0x0>; - flash-timeout-us = <150000>; - flash-max-microamp = <320000>; - led-max-microamp = <60000>; - ams,input-max-microamp = <1750000>; - function = LED_FUNCTION_FLASH; - }; - led@1 { - reg = <0x1>; - led-max-microamp = <10000>; - function = LED_FUNCTION_INDICATOR; - }; - }; diff --git a/Documentation/devicetree/bindings/leds/ams,as3645a.yaml b/Documentation/devicetree/bindings/leds/ams,as3645a.yaml new file mode 100644 index 000000000000..250a4b275d8a --- /dev/null +++ b/Documentation/devicetree/bindings/leds/ams,as3645a.yaml @@ -0,0 +1,130 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/ams,as3645a.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AS3645A LED Controller + +maintainers: + - Sakari Ailus + +description: + The AS3645A flash LED controller can drive two LEDs, one + high current flash LED and one indicator LED. The high + current flash LED can be used in torch mode as well. + +properties: + compatible: + const: ams,as3645a + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + reg: + maxItems: 1 + + led@0: + description: led0 describes the 'flash' feature + type: object + $ref: common.yaml# + unevaluatedProperties: false + + properties: + reg: + const: 0 + + flash-timeout-us: + minimum: 100000 + maximum: 850000 + multipleOf: 50000 + + flash-max-microamp: + minimum: 200000 + maximum: 500000 + multipleOf: 20000 + + led-max-microamp: + minimum: 20000 + maximum: 160000 + multipleOf: 20000 + description: + Maximum current when in torch (assist) mode. + + ams,input-max-microamp: + minimum: 1250000 + maximum: 2000000 + multipleOf: 50000 + + required: + - reg + - flash-timeout-us + - flash-max-microamp + - led-max-microamp + - ams,input-max-microamp + + led@1: + description: led1 describes the 'indicator' feature + type: object + $ref: common.yaml# + unevaluatedProperties: false + + properties: + reg: + const: 1 + + led-max-microamp: + enum: + - 2500 + - 5000 + - 7500 + - 10000 + description: + Maximum indicator current. + + required: + - reg + - led-max-microamp + +required: + - compatible + - reg + - "#size-cells" + - "#address-cells" + +additionalProperties: false + +examples: + - | + #include + + i2c{ + #address-cells = <1>; + #size-cells = <0>; + + led-controller@30 { + compatible = "ams,as3645a"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x30>; + + led@0 { + reg = <0>; + flash-timeout-us = <150000>; + flash-max-microamp = <320000>; + led-max-microamp = <60000>; + ams,input-max-microamp = <1750000>; + function = LED_FUNCTION_FLASH; + }; + + led@1 { + reg = <1>; + led-max-microamp = <10000>; + function = LED_FUNCTION_INDICATOR; + }; + }; + }; +... -- cgit v1.2.3 From a084c3c4a2674f156031eb04e785986c2744aca8 Mon Sep 17 00:00:00 2001 From: Yicong Yang Date: Thu, 25 Sep 2025 11:31:23 +0800 Subject: drivers/perf: hisi: Add tt_core_deprecated for compatibility Previously tt_core is defined as config1:0-7 which may not cover all the CPUs sharing L3C on platforms with more than 8 CPUs in a L3C. In order to support such platforms extend tt_core to 16 bits, since no spare space in config1, tt_core was moved to config2:0-15. Though linux expects the users to retrieve the control encoding from sysfs first for each option, it's possible if user doesn't follow this and hardcoded tt_core in config1. So add an option tt_core_deprecated for config1:0-7 for backward compatibility. Signed-off-by: Yicong Yang Signed-off-by: Will Deacon --- Documentation/admin-guide/perf/hisi-pmu.rst | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/perf/hisi-pmu.rst b/Documentation/admin-guide/perf/hisi-pmu.rst index c4c2cbbf88cb..0017f8ddeb75 100644 --- a/Documentation/admin-guide/perf/hisi-pmu.rst +++ b/Documentation/admin-guide/perf/hisi-pmu.rst @@ -66,6 +66,10 @@ specified as a bitmap:: This will only count the operations from core/thread 0 and 1 in this cluster. +User should not use tt_core_deprecated to specify the core/thread filtering. +This option is provided for backward compatiblility and only support 8bit +which may not cover all the core/thread sharing L3C. + 2. Tracetag allow the user to chose to count only read, write or atomic operations via the tt_req parameeter in perf. The default value counts all operations. tt_req is 3bits, 3'b100 represents read operations, 3'b101 -- cgit v1.2.3 From 31c092baea5a1c5473d2183c2f2a36c76d083c59 Mon Sep 17 00:00:00 2001 From: Mohamad Kamal Date: Sun, 14 Sep 2025 10:40:10 +0200 Subject: hwmon: (asus-ec-sensors) add TUF GAMING X670E PLUS WIFI Add support for TUF GAMING X670E PLUS WIFI Signed-off-by: Mohamad Kamal Signed-off-by: Eugene Shalygin Link: https://lore.kernel.org/r/20250914084019.1108941-1-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/asus_ec_sensors.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/asus_ec_sensors.rst index 5801bc4279c0..a5a58c00c322 100644 --- a/Documentation/hwmon/asus_ec_sensors.rst +++ b/Documentation/hwmon/asus_ec_sensors.rst @@ -46,6 +46,7 @@ Supported boards: * ROG ZENITH II EXTREME * ROG ZENITH II EXTREME ALPHA * TUF GAMING X670E PLUS + * TUF GAMING X670E PLUS WIFI Authors: - Eugene Shalygin -- cgit v1.2.3 From 0f6eae86e626e0561d2f545a3183be2e12108410 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Fri, 12 Sep 2025 14:07:42 +0200 Subject: dt-bindings: hwmon: sl28cpld: add sa67mcu compatible The Kontron SMARC-sAM67 module features an on-board house keeping uC. It is designed to be compatible with the older sl28cpld implementation, but has different sensors, like voltage and temperature monitoring. Add a new compatible for that board. Signed-off-by: Michael Walle Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250912120745.2295115-5-mwalle@kernel.org Signed-off-by: Guenter Roeck --- Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml index 010333cb25c0..ec20625db454 100644 --- a/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml +++ b/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml @@ -16,6 +16,7 @@ description: | properties: compatible: enum: + - kontron,sa67mcu-hwmon - kontron,sl28cpld-fan reg: -- cgit v1.2.3 From 443b39c82c322c9f3c38bea0389fe927ba00b3b4 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Fri, 12 Sep 2025 14:07:44 +0200 Subject: hwmon: add SMARC-sAM67 support Add a new driver for the Kontron SMARC-sAM67 board management controller. It has two voltage sensors and one temperature sensor. Signed-off-by: Michael Walle Link: https://lore.kernel.org/r/20250912120745.2295115-7-mwalle@kernel.org [groeck: Added sa67 to index.rst] Signed-off-by: Guenter Roeck --- Documentation/hwmon/index.rst | 1 + Documentation/hwmon/sa67.rst | 41 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 42 insertions(+) create mode 100644 Documentation/hwmon/sa67.rst (limited to 'Documentation') diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index 1803a43f6216..51a5bdf75b08 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -214,6 +214,7 @@ Hardware Monitoring Kernel Drivers q54sj108a2 qnap-mcu-hwmon raspberrypi-hwmon + sa67 sbrmi sbtsi_temp sch5627 diff --git a/Documentation/hwmon/sa67.rst b/Documentation/hwmon/sa67.rst new file mode 100644 index 000000000000..029c7c169b7f --- /dev/null +++ b/Documentation/hwmon/sa67.rst @@ -0,0 +1,41 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +Kernel driver sa67mcu +===================== + +Supported chips: + + * Kontron sa67mcu + + Prefix: 'sa67mcu' + + Datasheet: not available + +Authors: Michael Walle + +Description +----------- + +The sa67mcu is a board management controller which also exposes a hardware +monitoring controller. + +The controller has two voltage and one temperature sensor. The values are +hold in two 8 bit registers to form one 16 bit value. Reading the lower byte +will also capture the high byte to make the access atomic. The unit of the +volatge sensors are 1mV and the unit of the temperature sensor is 0.1degC. + +Sysfs entries +------------- + +The following attributes are supported. + +======================= ======================================================== +in0_label "VDDIN" +in0_input Measured VDDIN voltage. + +in1_label "VDD_RTC" +in1_input Measured VDD_RTC voltage. + +temp1_input MCU temperature. Roughly the board temperature. +======================= ======================================================== + -- cgit v1.2.3 From fb8e659309f72e54ed011c6bfe98597b9236805d Mon Sep 17 00:00:00 2001 From: Sung-Chi Li Date: Thu, 11 Sep 2025 06:56:35 +0000 Subject: hwmon: (cros_ec) add PWM control over fans MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Newer EC firmware supports controlling fans through host commands, so adding corresponding implementations for controlling these fans in the driver for other kernel services and userspace to control them. The driver will first probe the supported host command versions (get and set of fan PWM values, get and set of fan control mode) to see if the connected EC fulfills the requirements of controlling the fan, then exposes corresponding sysfs nodes for userspace to control the fan with corresponding read and write implementations. As EC will automatically change the fan mode to auto when the device is suspended, the power management hooks are added as well to keep the fan control mode and fan PWM value consistent during suspend and resume. As we need to access the hwmon device in the power management hook, update the driver by storing the hwmon device in the driver data as well. Signed-off-by: Sung-Chi Li Acked-by: Thomas Weißschuh Link: https://lore.kernel.org/r/20250911-cros_ec_fan-v6-2-a1446cc098af@google.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/cros_ec_hwmon.rst | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/hwmon/cros_ec_hwmon.rst b/Documentation/hwmon/cros_ec_hwmon.rst index 47ecae983bdb..355557a08c9a 100644 --- a/Documentation/hwmon/cros_ec_hwmon.rst +++ b/Documentation/hwmon/cros_ec_hwmon.rst @@ -23,4 +23,7 @@ ChromeOS embedded controller used in Chromebooks and other devices. The channel labels exposed via hwmon are retrieved from the EC itself. -Fan and temperature readings are supported. +Fan and temperature readings are supported. PWM fan control is also supported if +the EC also supports setting fan PWM values and fan mode. Note that EC will +switch fan control mode back to auto when suspended. This driver will restore +the fan state to what they were before suspended when resumed. -- cgit v1.2.3 From 5798b62867b47b6ace287d31172ce748ad70d869 Mon Sep 17 00:00:00 2001 From: Sung-Chi Li Date: Thu, 11 Sep 2025 06:56:36 +0000 Subject: hwmon: (cros_ec) register fans into thermal framework cooling devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Register fans connected under EC as thermal cooling devices as well, so these fans can then work with the thermal framework. During the driver probing phase, we will also try to register each fan as a thermal cooling device based on previous probe result (whether the there are fans connected on that channel, and whether EC supports fan control). The basic get max state, get current state, and set current state methods are then implemented as well. Signed-off-by: Sung-Chi Li Acked-by: Thomas Weißschuh Link: https://lore.kernel.org/r/20250911-cros_ec_fan-v6-3-a1446cc098af@google.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/cros_ec_hwmon.rst | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/cros_ec_hwmon.rst b/Documentation/hwmon/cros_ec_hwmon.rst index 355557a08c9a..6db812708325 100644 --- a/Documentation/hwmon/cros_ec_hwmon.rst +++ b/Documentation/hwmon/cros_ec_hwmon.rst @@ -27,3 +27,5 @@ Fan and temperature readings are supported. PWM fan control is also supported if the EC also supports setting fan PWM values and fan mode. Note that EC will switch fan control mode back to auto when suspended. This driver will restore the fan state to what they were before suspended when resumed. +If a fan is controllable, this driver will register that fan as a cooling device +in the thermal framework as well. -- cgit v1.2.3 From 99510c324e531addd9f7b80a72dab7435ca66215 Mon Sep 17 00:00:00 2001 From: Lukas Bulwahn Date: Thu, 25 Sep 2025 09:36:34 +0200 Subject: Documentation/features: Update feature lists for 6.17-rc7 It seems that ./Documentation/features/scripts/features-refresh.sh was most recently used in December 2022, with the latest kernel release v6.1-rc7 at that time (see commit 7f2e60ff51ca ("Documentation/features: Update feature lists for 6.1") to update the feature lists in this subdirectory. All further changes to Documentation/features/ since then have probably been done manually, without checking for changes in other architectures and features, that missed to update this part of the documentation. Running ./Documentation/features/scripts/features-refresh.sh now showed seven changes of supported features in various architectures (one in arc, two in parisc, one in riscv, one in openrisc, and two in um), which were not reflected yet in the current documentation. To confirm the sanity of this script's suggested changes, I checked if the commit messages confirm that the features have in fact been added in the following commits: - commit f122668ddcce ("ARC: Add eBPF JIT support") - commit 4800a6215e33 ("parisc: Wire up eBPF JIT compiler") - commit a869b8c29f86 ("riscv: enable mseal sysmap for RV64") - commit 2f681ba4b352 ("um: move thread info into task") - commit 3f17fed21491 ("um: switch to regset API and depend on XSTATE") - commit 7ce8716e2769 ("openrisc: Add HAVE_REGS_AND_STACK_ACCESS_API support") - commit b5ff52be8913 ("parisc: Convert to generic clockevents") So, update all documents to the current state with features-refresh.sh. Signed-off-by: Lukas Bulwahn Signed-off-by: Jonathan Corbet Message-ID: <20250925073634.112142-1-lukas.bulwahn@redhat.com> --- Documentation/features/core/eBPF-JIT/arch-support.txt | 4 ++-- Documentation/features/core/mseal_sys_mappings/arch-support.txt | 2 +- Documentation/features/core/thread-info-in-task/arch-support.txt | 2 +- Documentation/features/core/tracehook/arch-support.txt | 2 +- Documentation/features/perf/kprobes-event/arch-support.txt | 2 +- Documentation/features/time/clockevents/arch-support.txt | 2 +- 6 files changed, 7 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/features/core/eBPF-JIT/arch-support.txt b/Documentation/features/core/eBPF-JIT/arch-support.txt index 7434b43c2ff8..83f77f55fc87 100644 --- a/Documentation/features/core/eBPF-JIT/arch-support.txt +++ b/Documentation/features/core/eBPF-JIT/arch-support.txt @@ -7,7 +7,7 @@ | arch |status| ----------------------- | alpha: | TODO | - | arc: | TODO | + | arc: | ok | | arm: | ok | | arm64: | ok | | csky: | TODO | @@ -18,7 +18,7 @@ | mips: | ok | | nios2: | TODO | | openrisc: | TODO | - | parisc: | TODO | + | parisc: | ok | | powerpc: | ok | | riscv: | ok | | s390: | ok | diff --git a/Documentation/features/core/mseal_sys_mappings/arch-support.txt b/Documentation/features/core/mseal_sys_mappings/arch-support.txt index a3c24233eb9b..fa85381acc43 100644 --- a/Documentation/features/core/mseal_sys_mappings/arch-support.txt +++ b/Documentation/features/core/mseal_sys_mappings/arch-support.txt @@ -20,7 +20,7 @@ | openrisc: | N/A | | parisc: | TODO | | powerpc: | TODO | - | riscv: | TODO | + | riscv: | ok | | s390: | ok | | sh: | N/A | | sparc: | TODO | diff --git a/Documentation/features/core/thread-info-in-task/arch-support.txt b/Documentation/features/core/thread-info-in-task/arch-support.txt index 2afeb6bf6e64..f3d744c76061 100644 --- a/Documentation/features/core/thread-info-in-task/arch-support.txt +++ b/Documentation/features/core/thread-info-in-task/arch-support.txt @@ -24,7 +24,7 @@ | s390: | ok | | sh: | TODO | | sparc: | TODO | - | um: | TODO | + | um: | ok | | x86: | ok | | xtensa: | TODO | ----------------------- diff --git a/Documentation/features/core/tracehook/arch-support.txt b/Documentation/features/core/tracehook/arch-support.txt index a72330e25542..4f36fcbfb6d5 100644 --- a/Documentation/features/core/tracehook/arch-support.txt +++ b/Documentation/features/core/tracehook/arch-support.txt @@ -24,7 +24,7 @@ | s390: | ok | | sh: | ok | | sparc: | ok | - | um: | TODO | + | um: | ok | | x86: | ok | | xtensa: | ok | ----------------------- diff --git a/Documentation/features/perf/kprobes-event/arch-support.txt b/Documentation/features/perf/kprobes-event/arch-support.txt index 713a69fcd697..75c05d348c01 100644 --- a/Documentation/features/perf/kprobes-event/arch-support.txt +++ b/Documentation/features/perf/kprobes-event/arch-support.txt @@ -17,7 +17,7 @@ | microblaze: | TODO | | mips: | ok | | nios2: | TODO | - | openrisc: | TODO | + | openrisc: | ok | | parisc: | ok | | powerpc: | ok | | riscv: | ok | diff --git a/Documentation/features/time/clockevents/arch-support.txt b/Documentation/features/time/clockevents/arch-support.txt index 4d4bfac52970..d6100b226de5 100644 --- a/Documentation/features/time/clockevents/arch-support.txt +++ b/Documentation/features/time/clockevents/arch-support.txt @@ -18,7 +18,7 @@ | mips: | ok | | nios2: | ok | | openrisc: | ok | - | parisc: | TODO | + | parisc: | ok | | powerpc: | ok | | riscv: | ok | | s390: | ok | -- cgit v1.2.3 From b0b255d6b86dd1f2618a1402d6cbdcec1be0c589 Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Thu, 25 Sep 2025 17:31:33 +0200 Subject: dt-bindings: touchscreen: convert eeti bindings to json schema Convert EETI touchscreen controller device tree binding to json-schema. Signed-off-by: Dario Binacchi Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250925153144.4082786-1-dario.binacchi@amarulasolutions.com Signed-off-by: Dmitry Torokhov --- .../bindings/input/touchscreen/eeti,exc3000.yaml | 16 ++++++++++-- .../devicetree/bindings/input/touchscreen/eeti.txt | 30 ---------------------- 2 files changed, 14 insertions(+), 32 deletions(-) delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/eeti.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/touchscreen/eeti,exc3000.yaml b/Documentation/devicetree/bindings/input/touchscreen/eeti,exc3000.yaml index d19b07d4cfd4..930c70104b3f 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/eeti,exc3000.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/eeti,exc3000.yaml @@ -16,12 +16,14 @@ properties: - const: eeti,exc80h60 - const: eeti,exc80h84 - const: eeti,egalax_ts # Do NOT use for new binding + - const: eeti,exc3000-i2c + deprecated: true - items: - enum: - eeti,exc81w32 - const: eeti,exc80h84 reg: - enum: [0x4, 0x2a] + enum: [0x4, 0xa, 0x2a] interrupts: maxItems: 1 reset-gpios: @@ -30,6 +32,12 @@ properties: maxItems: 1 vdd-supply: description: Power supply regulator for the chip + attn-gpios: + deprecated: true + maxItems: 1 + description: Phandle to a GPIO to check whether interrupt is still + latched. This is necessary for platforms that lack + support for level-triggered IRQs. touchscreen-size-x: true touchscreen-size-y: true touchscreen-inverted-x: true @@ -51,7 +59,9 @@ allOf: compatible: not: contains: - const: eeti,egalax_ts + enum: + - eeti,egalax_ts + - eeti,exc3000-i2c then: properties: reg: @@ -59,6 +69,8 @@ allOf: wakeup-gpios: false + attn-gpios: false + required: - touchscreen-size-x - touchscreen-size-y diff --git a/Documentation/devicetree/bindings/input/touchscreen/eeti.txt b/Documentation/devicetree/bindings/input/touchscreen/eeti.txt deleted file mode 100644 index 32b3712c916e..000000000000 --- a/Documentation/devicetree/bindings/input/touchscreen/eeti.txt +++ /dev/null @@ -1,30 +0,0 @@ -Bindings for EETI touchscreen controller - -Required properties: -- compatible: should be "eeti,exc3000-i2c" -- reg: I2C address of the chip. Should be set to <0xa> -- interrupts: interrupt to which the chip is connected - -Optional properties: -- attn-gpios: A handle to a GPIO to check whether interrupt is still - latched. This is necessary for platforms that lack - support for level-triggered IRQs. - -The following optional properties described in touchscreen.txt are -also supported: - -- touchscreen-inverted-x -- touchscreen-inverted-y -- touchscreen-swapped-x-y - -Example: - -i2c-master { - touchscreen@a { - compatible = "eeti,exc3000-i2c"; - reg = <0xa>; - interrupt-parent = <&gpio>; - interrupts = <123 IRQ_TYPE_EDGE_RISING>; - attn-gpios = <&gpio 123 GPIO_ACTIVE_HIGH>; - }; -}; -- cgit v1.2.3 From 6b4896e404c7053cf09a6f58fd09684262fab6dd Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Thu, 25 Sep 2025 17:31:34 +0200 Subject: dt-bindings: arm: bcm: raspberrypi,bcm2835-firmware: Add touchscreen child node Convert Raspberry Pi firmware 7" touchscreen controller device tree binding to json-schema. Signed-off-by: Dario Binacchi Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250925153144.4082786-2-dario.binacchi@amarulasolutions.com Signed-off-by: Dmitry Torokhov --- .../arm/bcm/raspberrypi,bcm2835-firmware.yaml | 28 ++++++++++++++++++++++ .../input/touchscreen/raspberrypi,firmware-ts.txt | 26 -------------------- 2 files changed, 28 insertions(+), 26 deletions(-) delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/raspberrypi,firmware-ts.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml index 1f84407a73e4..8349c0a854d9 100644 --- a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml @@ -103,6 +103,28 @@ properties: - compatible - "#pwm-cells" + touchscreen: + type: object + $ref: /schemas/input/touchscreen/touchscreen.yaml# + additionalProperties: false + + properties: + compatible: + const: raspberrypi,firmware-ts + + firmware: + deprecated: true + description: Phandle to RPi's firmware device node. + + touchscreen-size-x: true + touchscreen-size-y: true + touchscreen-inverted-x: true + touchscreen-inverted-y: true + touchscreen-swapped-x-y: true + + required: + - compatible + required: - compatible - mboxes @@ -135,5 +157,11 @@ examples: compatible = "raspberrypi,firmware-poe-pwm"; #pwm-cells = <2>; }; + + ts: touchscreen { + compatible = "raspberrypi,firmware-ts"; + touchscreen-size-x = <800>; + touchscreen-size-y = <480>; + }; }; ... diff --git a/Documentation/devicetree/bindings/input/touchscreen/raspberrypi,firmware-ts.txt b/Documentation/devicetree/bindings/input/touchscreen/raspberrypi,firmware-ts.txt deleted file mode 100644 index 2a1af240ccc3..000000000000 --- a/Documentation/devicetree/bindings/input/touchscreen/raspberrypi,firmware-ts.txt +++ /dev/null @@ -1,26 +0,0 @@ -Raspberry Pi firmware based 7" touchscreen -===================================== - -Required properties: - - compatible: "raspberrypi,firmware-ts" - -Optional properties: - - firmware: Reference to RPi's firmware device node - - touchscreen-size-x: See touchscreen.txt - - touchscreen-size-y: See touchscreen.txt - - touchscreen-inverted-x: See touchscreen.txt - - touchscreen-inverted-y: See touchscreen.txt - - touchscreen-swapped-x-y: See touchscreen.txt - -Example: - -firmware: firmware-rpi { - compatible = "raspberrypi,bcm2835-firmware"; - mboxes = <&mailbox>; - - ts: touchscreen { - compatible = "raspberrypi,firmware-ts"; - touchscreen-size-x = <800>; - touchscreen-size-y = <480>; - }; -}; -- cgit v1.2.3 From 2728e71ad67810fea8346fb800c647b66a25162d Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Thu, 25 Sep 2025 17:31:35 +0200 Subject: dt-bindings: touchscreen: remove touchscreen.txt With commit 1d6204e2f51f ("dt-bindings: touchscreen: Add touchscreen schema") touchscreen.txt is no longer needed, and since no other file refers to it, it can be safely removed. Signed-off-by: Dario Binacchi Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250925153144.4082786-3-dario.binacchi@amarulasolutions.com Signed-off-by: Dmitry Torokhov --- Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt | 1 - 1 file changed, 1 deletion(-) delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt b/Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt deleted file mode 100644 index e1adb902d503..000000000000 --- a/Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt +++ /dev/null @@ -1 +0,0 @@ -See touchscreen.yaml -- cgit v1.2.3 From 54e184f0f5f34b0cd18623117150b52444ab6433 Mon Sep 17 00:00:00 2001 From: Anup Patel Date: Mon, 18 Aug 2025 09:39:04 +0530 Subject: dt-bindings: clock: Add RPMI clock service message proxy bindings Add device tree bindings for the RPMI clock service group based message proxy implemented by the SBI implementation (machine mode firmware or hypervisor). The RPMI clock service group is defined by the RISC-V platform management interface (RPMI) specification. Reviewed-by: Conor Dooley Signed-off-by: Anup Patel Acked-by: Stephen Boyd Link: https://lore.kernel.org/r/20250818040920.272664-9-apatel@ventanamicro.com Signed-off-by: Paul Walmsley --- .../bindings/clock/riscv,rpmi-mpxy-clock.yaml | 64 ++++++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/riscv,rpmi-mpxy-clock.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/riscv,rpmi-mpxy-clock.yaml b/Documentation/devicetree/bindings/clock/riscv,rpmi-mpxy-clock.yaml new file mode 100644 index 000000000000..76f2a1b3d30d --- /dev/null +++ b/Documentation/devicetree/bindings/clock/riscv,rpmi-mpxy-clock.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/riscv,rpmi-mpxy-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RISC-V RPMI clock service group based message proxy + +maintainers: + - Anup Patel + +description: | + The RISC-V Platform Management Interface (RPMI) [1] defines a + messaging protocol which is modular and extensible. The supervisor + software can send/receive RPMI messages via SBI MPXY extension [2] + or some dedicated supervisor-mode RPMI transport. + + The RPMI specification [1] defines clock service group for accessing + system clocks managed by a platform microcontroller. The SBI implementation + (machine mode firmware or hypervisor) can implement an SBI MPXY channel + to allow RPMI clock service group access to the supervisor software. + + =========================================== + References + =========================================== + + [1] RISC-V Platform Management Interface (RPMI) v1.0 (or higher) + https://github.com/riscv-non-isa/riscv-rpmi/releases + + [2] RISC-V Supervisor Binary Interface (SBI) v3.0 (or higher) + https://github.com/riscv-non-isa/riscv-sbi-doc/releases + +properties: + compatible: + description: + Intended for use by the SBI implementation. + const: riscv,rpmi-mpxy-clock + + mboxes: + maxItems: 1 + description: + Mailbox channel of the underlying RPMI transport. + + riscv,sbi-mpxy-channel-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The SBI MPXY channel id to be used for providing RPMI access to + the supervisor software. + +required: + - compatible + - mboxes + - riscv,sbi-mpxy-channel-id + +additionalProperties: false + +examples: + - | + clock-service { + compatible = "riscv,rpmi-mpxy-clock"; + mboxes = <&rpmi_shmem_mbox 0x8>; + riscv,sbi-mpxy-channel-id = <0x1000>; + }; +... -- cgit v1.2.3 From b385830290b417c7708e2db7c0e34a0b3e7297bf Mon Sep 17 00:00:00 2001 From: Anup Patel Date: Mon, 18 Aug 2025 09:39:05 +0530 Subject: dt-bindings: clock: Add RPMI clock service controller bindings Add device tree bindings for the RPMI clock service group based controller for the supervisor software. The RPMI clock service group is defined by the RISC-V platform management interface (RPMI) specification. Reviewed-by: Conor Dooley Reviewed-by: Stephen Boyd Signed-off-by: Anup Patel Acked-by: Jassi Brar Link: https://lore.kernel.org/r/20250818040920.272664-10-apatel@ventanamicro.com Signed-off-by: Paul Walmsley --- .../bindings/clock/riscv,rpmi-clock.yaml | 64 ++++++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/riscv,rpmi-clock.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/riscv,rpmi-clock.yaml b/Documentation/devicetree/bindings/clock/riscv,rpmi-clock.yaml new file mode 100644 index 000000000000..5d62bf8215c8 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/riscv,rpmi-clock.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/riscv,rpmi-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RISC-V RPMI clock service group based clock controller + +maintainers: + - Anup Patel + +description: | + The RISC-V Platform Management Interface (RPMI) [1] defines a + messaging protocol which is modular and extensible. The supervisor + software can send/receive RPMI messages via SBI MPXY extension [2] + or some dedicated supervisor-mode RPMI transport. + + The RPMI specification [1] defines clock service group for accessing + system clocks managed by a platform microcontroller. The supervisor + software can access RPMI clock service group via SBI MPXY channel or + some dedicated supervisor-mode RPMI transport. + + =========================================== + References + =========================================== + + [1] RISC-V Platform Management Interface (RPMI) v1.0 (or higher) + https://github.com/riscv-non-isa/riscv-rpmi/releases + + [2] RISC-V Supervisor Binary Interface (SBI) v3.0 (or higher) + https://github.com/riscv-non-isa/riscv-sbi-doc/releases + +properties: + compatible: + description: + Intended for use by the supervisor software. + const: riscv,rpmi-clock + + mboxes: + maxItems: 1 + description: + Mailbox channel of the underlying RPMI transport or SBI message proxy channel. + + "#clock-cells": + const: 1 + description: + Platform specific CLOCK_ID as defined by the RISC-V Platform Management + Interface (RPMI) specification. + +required: + - compatible + - mboxes + - "#clock-cells" + +additionalProperties: false + +examples: + - | + clock-controller { + compatible = "riscv,rpmi-clock"; + mboxes = <&mpxy_mbox 0x1000 0x0>; + #clock-cells = <1>; + }; +... -- cgit v1.2.3 From 4ae50c82a5ab9071b928648da8723153004170bb Mon Sep 17 00:00:00 2001 From: Gaurav Kohli Date: Tue, 24 Jun 2025 12:19:44 +0530 Subject: dt-bindings: thermal: tsens: Add QCS615 compatible Add compatibility string for the thermal sensors on QCS615 platform. Acked-by: Rob Herring (Arm) Signed-off-by: Gaurav Kohli Link: https://lore.kernel.org/r/20250624064945.764245-2-quic_gkohli@quicinc.com Signed-off-by: Daniel Lezcano --- Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml index 94311ebd7652..f65dc829574c 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml @@ -54,6 +54,7 @@ properties: - qcom,msm8996-tsens - qcom,msm8998-tsens - qcom,qcm2290-tsens + - qcom,qcs615-tsens - qcom,sa8255p-tsens - qcom,sa8775p-tsens - qcom,sar2130p-tsens -- cgit v1.2.3 From aa0025154855b10b68ada4e60fd99623d51252cc Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Thu, 28 Aug 2025 08:51:00 +0300 Subject: dt-bindings: thermal: Document Tegra114 SOCTHERM Thermal Management System Document SOCTHERM Thermal Management System found in the Tegra 4 SoC. Signed-off-by: Svyatoslav Ryhel Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250828055104.8073-3-clamor95@gmail.com Signed-off-by: Daniel Lezcano --- Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml index cf47a1f3b384..25efedced584 100644 --- a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml +++ b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml @@ -18,6 +18,7 @@ description: The SOCTHERM IP block contains thermal sensors, support for properties: compatible: enum: + - nvidia,tegra114-soctherm - nvidia,tegra124-soctherm - nvidia,tegra132-soctherm - nvidia,tegra210-soctherm @@ -206,6 +207,7 @@ allOf: compatible: contains: enum: + - nvidia,tegra114-soctherm - nvidia,tegra124-soctherm - nvidia,tegra210-soctherm - nvidia,tegra210b01-soctherm -- cgit v1.2.3 From a3152e5c742ca2557c5cd0e5a9e6ca6b9a92df93 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Sun, 10 Aug 2025 15:21:22 +0300 Subject: dt-bindings: thermal: r9a08g045-tsu: Document the TSU unit The Renesas RZ/G3S SoC includes a Thermal Sensor Unit (TSU) block designed to measure the junction temperature. The temperature is measured using the RZ/G3S ADC, with a dedicated ADC channel directly connected to the TSU. Add documentation for it. Reviewed-by: Rob Herring (Arm) Reviewed-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea Tested-by: Wolfram Sang Link: https://lore.kernel.org/r/20250810122125.792966-2-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Daniel Lezcano --- .../bindings/thermal/renesas,r9a08g045-tsu.yaml | 93 ++++++++++++++++++++++ 1 file changed, 93 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/renesas,r9a08g045-tsu.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/thermal/renesas,r9a08g045-tsu.yaml b/Documentation/devicetree/bindings/thermal/renesas,r9a08g045-tsu.yaml new file mode 100644 index 000000000000..573e2b9d3752 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/renesas,r9a08g045-tsu.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/renesas,r9a08g045-tsu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/G3S Thermal Sensor Unit + +description: + The thermal sensor unit (TSU) measures the temperature(Tj) inside + the LSI. + +maintainers: + - Claudiu Beznea + +$ref: thermal-sensor.yaml# + +properties: + compatible: + const: renesas,r9a08g045-tsu + + reg: + maxItems: 1 + + clocks: + items: + - description: TSU module clock + + power-domains: + maxItems: 1 + + resets: + items: + - description: TSU module reset + + io-channels: + items: + - description: ADC channel which reports the TSU temperature + + io-channel-names: + items: + - const: tsu + + "#thermal-sensor-cells": + const: 0 + +required: + - compatible + - reg + - clocks + - power-domains + - resets + - io-channels + - io-channel-names + - '#thermal-sensor-cells' + +additionalProperties: false + +examples: + - | + #include + + tsu: thermal@10059000 { + compatible = "renesas,r9a08g045-tsu"; + reg = <0x10059000 0x1000>; + clocks = <&cpg CPG_MOD R9A08G045_TSU_PCLK>; + resets = <&cpg R9A08G045_TSU_PRESETN>; + power-domains = <&cpg>; + #thermal-sensor-cells = <0>; + io-channels = <&adc 8>; + io-channel-names = "tsu"; + }; + + thermal-zones { + cpu-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsu>; + + trips { + sensor_crit: sensor-crit { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + target: trip-point { + temperature = <100000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + }; -- cgit v1.2.3 From e881662aa06af65021c2fa255dd7530235a3d195 Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Wed, 20 Aug 2025 19:40:49 +0200 Subject: dt-bindings: thermal: rockchip: Tighten grf requirements Instead of having an optional rockchip,grf property, forbid using it on platforms without registers in a GRF being needed for thermal monitoring and make it mandatory on the platforms actually needing it. Signed-off-by: Sebastian Reichel Reviewed-by: Dragan Simic Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250820-thermal-rockchip-grf-warning-v2-3-c7e2d35017b8@kernel.org Signed-off-by: Daniel Lezcano --- .../devicetree/bindings/thermal/rockchip-thermal.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml index 573f447cc26e..9fa5c4c49d76 100644 --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml @@ -119,6 +119,21 @@ required: - resets allOf: + - if: + properties: + compatible: + contains: + enum: + - rockchip,px30-tsadc + - rockchip,rk3366-tsadc + - rockchip,rk3399-tsadc + - rockchip,rk3568-tsadc + then: + required: + - rockchip,grf + else: + properties: + rockchip,grf: false - if: not: properties: -- cgit v1.2.3 From caf41eb4575ddac61dd0f6d4a6108bb7ab9fc408 Mon Sep 17 00:00:00 2001 From: John Madieu Date: Wed, 17 Sep 2025 19:01:55 +0200 Subject: dt-bindings: thermal: r9a09g047-tsu: Document the TSU unit The Renesas RZ/G3E SoC includes a Thermal Sensor Unit (TSU) block designed to measure the junction temperature. The device provides real-time temperature measurements for thermal management, utilizing a single dedicated channel (channel 1) for temperature sensing. Reviewed-by: Rob Herring (Arm) Signed-off-by: John Madieu Link: https://lore.kernel.org/r/20250917170202.197929-2-john.madieu.xa@bp.renesas.com Signed-off-by: Daniel Lezcano --- .../bindings/thermal/renesas,r9a09g047-tsu.yaml | 87 ++++++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml b/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml new file mode 100644 index 000000000000..8d3f3c24f0f2 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/renesas,r9a09g047-tsu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/G3E Temperature Sensor Unit (TSU) + +maintainers: + - John Madieu + +description: + The Temperature Sensor Unit (TSU) is an integrated thermal sensor that + monitors the chip temperature on the Renesas RZ/G3E SoC. The TSU provides + real-time temperature measurements for thermal management. + +properties: + compatible: + const: renesas,r9a09g047-tsu + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + power-domains: + maxItems: 1 + + interrupts: + items: + - description: Conversion complete interrupt signal (pulse) + - description: Comparison result interrupt signal (level) + + interrupt-names: + items: + - const: adi + - const: adcmpi + + "#thermal-sensor-cells": + const: 0 + + renesas,tsu-trim: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to system controller + - description: offset of trim registers + description: + Phandle and offset to the system controller containing the TSU + calibration trim values. The offset points to the first trim register + (OTPTSU1TRMVAL0), with the second trim register (OTPTSU1TRMVAL1) located + at offset + 4. + +required: + - compatible + - reg + - clocks + - resets + - power-domains + - interrupts + - interrupt-names + - "#thermal-sensor-cells" + - renesas,tsu-trim + +additionalProperties: false + +examples: + - | + #include + #include + + thermal-sensor@14002000 { + compatible = "renesas,r9a09g047-tsu"; + reg = <0x14002000 0x1000>; + clocks = <&cpg CPG_MOD 0x10a>; + resets = <&cpg 0xf8>; + power-domains = <&cpg>; + interrupts = , + ; + interrupt-names = "adi", "adcmpi"; + #thermal-sensor-cells = <0>; + renesas,tsu-trim = <&sys 0x330>; + }; -- cgit v1.2.3 From a72ab2514b7c8e8203c551310166f4c72262ff43 Mon Sep 17 00:00:00 2001 From: Anup Patel Date: Mon, 18 Aug 2025 09:39:07 +0530 Subject: dt-bindings: Add RPMI system MSI message proxy bindings Add device tree bindings for the RPMI system MSI service group based message proxy implemented by the SBI implementation (machine mode firmware or hypervisor). The RPMI system MSI service group is defined by the RISC-V platform management interface (RPMI) specification. Reviewed-by: Atish Patra Reviewed-by: Conor Dooley Signed-off-by: Anup Patel Acked-by: Jassi Brar Link: https://lore.kernel.org/r/20250818040920.272664-12-apatel@ventanamicro.com Signed-off-by: Paul Walmsley --- .../riscv,rpmi-mpxy-system-msi.yaml | 67 ++++++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,rpmi-mpxy-system-msi.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/riscv,rpmi-mpxy-system-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/riscv,rpmi-mpxy-system-msi.yaml new file mode 100644 index 000000000000..1991f5c7446a --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/riscv,rpmi-mpxy-system-msi.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/riscv,rpmi-mpxy-system-msi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RISC-V RPMI system MSI service group based message proxy + +maintainers: + - Anup Patel + +description: | + The RISC-V Platform Management Interface (RPMI) [1] defines a + messaging protocol which is modular and extensible. The supervisor + software can send/receive RPMI messages via SBI MPXY extension [2] + or some dedicated supervisor-mode RPMI transport. + + The RPMI specification [1] defines system MSI service group which + allow application processors to receive MSIs upon system events + such as P2A doorbell, graceful shutdown/reboot request, CPU hotplug + event, memory hotplug event, etc from the platform microcontroller. + The SBI implementation (machine mode firmware or hypervisor) can + implement an SBI MPXY channel to allow RPMI system MSI service + group access to the supervisor software. + + =========================================== + References + =========================================== + + [1] RISC-V Platform Management Interface (RPMI) v1.0 (or higher) + https://github.com/riscv-non-isa/riscv-rpmi/releases + + [2] RISC-V Supervisor Binary Interface (SBI) v3.0 (or higher) + https://github.com/riscv-non-isa/riscv-sbi-doc/releases + +properties: + compatible: + description: + Intended for use by the SBI implementation. + const: riscv,rpmi-mpxy-system-msi + + mboxes: + maxItems: 1 + description: + Mailbox channel of the underlying RPMI transport. + + riscv,sbi-mpxy-channel-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The SBI MPXY channel id to be used for providing RPMI access to + the supervisor software. + +required: + - compatible + - mboxes + - riscv,sbi-mpxy-channel-id + +additionalProperties: false + +examples: + - | + interrupt-controller { + compatible = "riscv,rpmi-mpxy-system-msi"; + mboxes = <&rpmi_shmem_mbox 0x2>; + riscv,sbi-mpxy-channel-id = <0x2000>; + }; +... -- cgit v1.2.3 From 3e6cf38486005831e063fd0d943a46bc8434e732 Mon Sep 17 00:00:00 2001 From: Anup Patel Date: Mon, 18 Aug 2025 09:39:08 +0530 Subject: dt-bindings: Add RPMI system MSI interrupt controller bindings Add device tree bindings for the RPMI system MSI service group based interrupt controller for the supervisor software. The RPMI system MSI service group is defined by the RISC-V platform management interface (RPMI) specification. Reviewed-by: Atish Patra Reviewed-by: Conor Dooley Signed-off-by: Anup Patel Acked-by: Jassi Brar Link: https://lore.kernel.org/r/20250818040920.272664-13-apatel@ventanamicro.com Signed-off-by: Paul Walmsley --- .../riscv,rpmi-system-msi.yaml | 74 ++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,rpmi-system-msi.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/riscv,rpmi-system-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/riscv,rpmi-system-msi.yaml new file mode 100644 index 000000000000..b10a0532e586 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/riscv,rpmi-system-msi.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/riscv,rpmi-system-msi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RISC-V RPMI system MSI service group based interrupt controller + +maintainers: + - Anup Patel + +description: | + The RISC-V Platform Management Interface (RPMI) [1] defines a + messaging protocol which is modular and extensible. The supervisor + software can send/receive RPMI messages via SBI MPXY extension [2] + or some dedicated supervisor-mode RPMI transport. + + The RPMI specification [1] defines system MSI service group which + allow application processors to receive MSIs upon system events + such as P2A doorbell, graceful shutdown/reboot request, CPU hotplug + event, memory hotplug event, etc from the platform microcontroller. + The supervisor software can access RPMI system MSI service group via + SBI MPXY channel or some dedicated supervisor-mode RPMI transport. + + =========================================== + References + =========================================== + + [1] RISC-V Platform Management Interface (RPMI) v1.0 (or higher) + https://github.com/riscv-non-isa/riscv-rpmi/releases + + [2] RISC-V Supervisor Binary Interface (SBI) v3.0 (or higher) + https://github.com/riscv-non-isa/riscv-sbi-doc/releases + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + description: + Intended for use by the supervisor software. + const: riscv,rpmi-system-msi + + mboxes: + maxItems: 1 + description: + Mailbox channel of the underlying RPMI transport or SBI message proxy channel. + + msi-parent: true + + interrupt-controller: true + + "#interrupt-cells": + const: 1 + +required: + - compatible + - mboxes + - msi-parent + - interrupt-controller + - "#interrupt-cells" + +additionalProperties: false + +examples: + - | + interrupt-controller { + compatible = "riscv,rpmi-system-msi"; + mboxes = <&mpxy_mbox 0x2000 0x0>; + msi-parent = <&imsic_slevel>; + interrupt-controller; + #interrupt-cells = <1>; + }; +... -- cgit v1.2.3 From 76bb6969a8cfc5e00ca142fdad86ffd0a6ed9ecd Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 25 Sep 2025 15:22:19 -0400 Subject: dt-bindings: hwmon: (lm75) allow interrupt for ti,tmp75 Allow interrupt for ti,tmp75 because chip has open drain ALERT signal. Signed-off-by: Frank Li Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250925192219.303825-1-Frank.Li@nxp.com Signed-off-by: Guenter Roeck --- Documentation/devicetree/bindings/hwmon/lm75.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/lm75.yaml b/Documentation/devicetree/bindings/hwmon/lm75.yaml index ecdd09a032e5..0b9fda81e3ec 100644 --- a/Documentation/devicetree/bindings/hwmon/lm75.yaml +++ b/Documentation/devicetree/bindings/hwmon/lm75.yaml @@ -70,6 +70,7 @@ allOf: - ti,tmp100 - ti,tmp101 - ti,tmp112 + - ti,tmp75 then: properties: interrupts: false -- cgit v1.2.3 From 79428e60897916401c9ed326f6ada4d7c7c997a3 Mon Sep 17 00:00:00 2001 From: Manaf Meethalavalappu Pallikunhi Date: Sat, 20 Sep 2025 18:06:31 +0530 Subject: dt-bindings: thermal: qcom-tsens: Document the Glymur temperature Sensor Document the Temperature Sensor (TSENS) on Glymur Platform. Signed-off-by: Manaf Meethalavalappu Pallikunhi Signed-off-by: Pankaj Patil Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250920123631.281153-1-pankaj.patil@oss.qualcomm.com Signed-off-by: Daniel Lezcano --- Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml index f65dc829574c..78e2f6573b96 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml @@ -49,6 +49,7 @@ properties: - description: v2 of TSENS items: - enum: + - qcom,glymur-tsens - qcom,milos-tsens - qcom,msm8953-tsens - qcom,msm8996-tsens -- cgit v1.2.3 From cb0c5a60a6f7dd7f35fa5b46fd04dfb66b37fc1e Mon Sep 17 00:00:00 2001 From: Gopi Krishna Menon Date: Fri, 26 Sep 2025 10:06:12 +0530 Subject: docs: perf: Fujitsu: Fix htmldocs build warnings and errors Running "make htmldocs" generates the following build errors and warnings for fujitsu_uncore_pmu.rst: Documentation/admin-guide/perf/fujitsu_uncore_pmu.rst:20: ERROR: Unexpected indentation. Documentation/admin-guide/perf/fujitsu_uncore_pmu.rst:23: WARNING: Block quote ends without a blank line; unexpected unindent. Documentation/admin-guide/perf/fujitsu_uncore_pmu.rst:28: ERROR: Unexpected indentation. Documentation/admin-guide/perf/fujitsu_uncore_pmu.rst:29: WARNING: Block quote ends without a blank line; unexpected unindent. Documentation/admin-guide/perf/fujitsu_uncore_pmu.rst:81: ERROR: Unexpected indentation. Documentation/admin-guide/perf/fujitsu_uncore_pmu.rst:82: WARNING: Block quote ends without a blank line; unexpected unindent. Add blank line before bullet lists, block quotes to fix build errors, resolve warnings and properly render perf commands as code blocks. Signed-off-by: Gopi Krishna Menon Reviewed-by: Koichi Okuno Fixes: bad11557eed2 ("perf: Fujitsu: Add the Uncore PMU driver") Reviewed-by: Bagas Sanjaya Reviewed-by: Randy Dunlap Tested-by: Randy Dunlap Signed-off-by: Will Deacon --- Documentation/admin-guide/perf/fujitsu_uncore_pmu.rst | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/perf/fujitsu_uncore_pmu.rst b/Documentation/admin-guide/perf/fujitsu_uncore_pmu.rst index 46595b788d3a..2ec0249e37b6 100644 --- a/Documentation/admin-guide/perf/fujitsu_uncore_pmu.rst +++ b/Documentation/admin-guide/perf/fujitsu_uncore_pmu.rst @@ -15,15 +15,19 @@ The driver provides a description of its available events and configuration options in sysfs, see /sys/bus/event_sources/devices/mac_iod_mac_ch/ and /sys/bus/event_sources/devices/pci_iod_pci/. This driver exports: + - formats, used by perf user space and other tools to configure events - events, used by perf user space and other tools to create events - symbolically, e.g.: + symbolically, e.g.:: + perf stat -a -e mac_iod0_mac0_ch0/event=0x21/ ls perf stat -a -e pci_iod0_pci0/event=0x24/ ls + - cpumask, used by perf user space and other tools to know on which CPUs to open the events This driver supports the following events for MAC: + - cycles This event counts MAC cycles at MAC frequency. - read-count @@ -77,6 +81,7 @@ Examples for use with perf:: perf stat -e mac_iod0_mac0_ch0/ea-mac/ ls And, this driver supports the following events for PCI: + - pci-port0-cycles This event counts PCI cycles at PCI frequency in port0. - pci-port0-read-count -- cgit v1.2.3 From 927f3e85015285ff68789bd00aa66b071016b27f Mon Sep 17 00:00:00 2001 From: Brian Norris Date: Tue, 23 Sep 2025 15:06:26 -0700 Subject: PM: runtime: Documentation: ABI: Document time units for *_time Many .../power/... time-related attributes have an "_ms" suffix and also include language in their ABI description to make clear that their time is measured in milliseconds. However, 'runtime_suspended_time' and 'runtime_active_time' have neither, and it takes me a nontrivial amount of time to poke through the source to confirm that they are also measured in milliseconds. Update the doc with "millisecond" units. Signed-off-by: Brian Norris Reviewed-by: Dhruva Gole Link: https://patch.msgid.link/20250923150625.1.If11a14e33d578369db48d678395d0323bdb01915@changeid [ rjw: Subject edits, changelog tweak ] Signed-off-by: Rafael J. Wysocki --- Documentation/ABI/testing/sysfs-devices-power | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-devices-power b/Documentation/ABI/testing/sysfs-devices-power index e4ec5de9a5dd..9bf7c8a267c5 100644 --- a/Documentation/ABI/testing/sysfs-devices-power +++ b/Documentation/ABI/testing/sysfs-devices-power @@ -274,15 +274,15 @@ What: /sys/devices/.../power/runtime_active_time Date: Jul 2010 Contact: Arjan van de Ven Description: - Reports the total time that the device has been active. - Used for runtime PM statistics. + Reports the total time that the device has been active, in + milliseconds. Used for runtime PM statistics. What: /sys/devices/.../power/runtime_suspended_time Date: Jul 2010 Contact: Arjan van de Ven Description: - Reports total time that the device has been suspended. - Used for runtime PM statistics. + Reports total time that the device has been suspended, in + milliseconds. Used for runtime PM statistics. What: /sys/devices/.../power/runtime_usage Date: Apr 2010 -- cgit v1.2.3 From ad9a8291b13b985852ad617827a4c5265a8836f5 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 30 Apr 2025 13:27:35 -0500 Subject: dt-bindings: edac: Convert aspeed,ast2400-sdram-edac to DT schema Convert the ASpeed SDRAM EDAC binding to DT schema. It's a straight-forward conversion. Reviewed-by: Andrew Jeffery Reviewed-by: Stefan Schaeckeler Signed-off-by: Rob Herring (Arm) --- .../bindings/edac/aspeed,ast2400-sdram-edac.yaml | 48 ++++++++++++++++++++++ .../devicetree/bindings/edac/aspeed-sdram-edac.txt | 28 ------------- 2 files changed, 48 insertions(+), 28 deletions(-) create mode 100644 Documentation/devicetree/bindings/edac/aspeed,ast2400-sdram-edac.yaml delete mode 100644 Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/edac/aspeed,ast2400-sdram-edac.yaml b/Documentation/devicetree/bindings/edac/aspeed,ast2400-sdram-edac.yaml new file mode 100644 index 000000000000..09735826d707 --- /dev/null +++ b/Documentation/devicetree/bindings/edac/aspeed,ast2400-sdram-edac.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/edac/aspeed,ast2400-sdram-edac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Aspeed BMC SoC SDRAM EDAC controller + +maintainers: + - Stefan Schaeckeler + +description: > + The Aspeed BMC SoC supports DDR3 and DDR4 memory with and without ECC (error + correction check). + + The memory controller supports SECDED (single bit error correction, double bit + error detection) and single bit error auto scrubbing by reserving 8 bits for + every 64 bit word (effectively reducing available memory to 8/9). + + Note, the bootloader must configure ECC mode in the memory controller. + +properties: + compatible: + enum: + - aspeed,ast2400-sdram-edac + - aspeed,ast2500-sdram-edac + - aspeed,ast2600-sdram-edac + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + sdram@1e6e0000 { + compatible = "aspeed,ast2500-sdram-edac"; + reg = <0x1e6e0000 0x174>; + interrupts = <0>; + }; diff --git a/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt b/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt deleted file mode 100644 index 8ca9e0a049d8..000000000000 --- a/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt +++ /dev/null @@ -1,28 +0,0 @@ -Aspeed BMC SoC EDAC node - -The Aspeed BMC SoC supports DDR3 and DDR4 memory with and without ECC (error -correction check). - -The memory controller supports SECDED (single bit error correction, double bit -error detection) and single bit error auto scrubbing by reserving 8 bits for -every 64 bit word (effectively reducing available memory to 8/9). - -Note, the bootloader must configure ECC mode in the memory controller. - - -Required properties: -- compatible: should be one of - - "aspeed,ast2400-sdram-edac" - - "aspeed,ast2500-sdram-edac" - - "aspeed,ast2600-sdram-edac" -- reg: sdram controller register set should be <0x1e6e0000 0x174> -- interrupts: should be AVIC interrupt #0 - - -Example: - - edac: sdram@1e6e0000 { - compatible = "aspeed,ast2500-sdram-edac"; - reg = <0x1e6e0000 0x174>; - interrupts = <0>; - }; -- cgit v1.2.3 From b518ec73cc62fe3f921ea6c009628a40c927d92c Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Sun, 14 Sep 2025 16:14:52 +0300 Subject: dt-bindings: gpu: arm,mali-midgard: add exynos8890-mali compatible The exynos8890 uses the ARM Mali T880 GPU, document its compatible string with the appropriate fallback. Signed-off-by: Ivaylo Ivanov Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml index 48daba21a890..a7192622e120 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml @@ -53,8 +53,10 @@ properties: - enum: - rockchip,rk3399-mali - const: arm,mali-t860 - - # "arm,mali-t880" + - items: + - enum: + - samsung,exynos8890-mali + - const: arm,mali-t880 reg: maxItems: 1 -- cgit v1.2.3 From 60042a6ff2348fd2edca2f31e79fe80548d1a75d Mon Sep 17 00:00:00 2001 From: Frank Li Date: Mon, 15 Sep 2025 11:51:23 -0400 Subject: dt-bindings: display: simple: Add innolux,n133hse-ea1 and nlt,nl12880bc20-spwg-24 Add innolux,n133hse-ea1 13.3" TFT LCD panel and nlt,nl12880bc20-spwg-24 12.1" WXGA (1280 x 800) LVDS TFT LCD panel. Fix below CHECK_DTBS warnings: arch/arm/boot/dts/nxp/imx/imx6q-novena.dtb: /panel: failed to match any schema with compatible: ['innolux,n133hse-ea1'] arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-811x.dtb: /lvds0-panel: failed to match any schema with compatible: ['nlt,nl12880bc20-spwg-24'] Signed-off-by: Frank Li Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index 1ac1f0219079..42d9080e8b83 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -178,6 +178,8 @@ properties: - innolux,g121xce-l01 # InnoLux 15.6" FHD (1920x1080) TFT LCD panel - innolux,g156hce-l01 + # InnoLux 13.3" FHD (1920x1080) TFT LCD panel + - innolux,n133hse-ea1 # InnoLux 15.6" WXGA TFT LCD panel - innolux,n156bge-l21 # Innolux Corporation 7.0" WSVGA (1024x600) TFT LCD panel @@ -228,6 +230,8 @@ properties: - netron-dy,e231732 # Newhaven Display International 480 x 272 TFT LCD panel - newhaven,nhd-4.3-480272ef-atxl + # NLT Technologies, Ltd. 12.1" WXGA (1280 x 800) LVDS TFT LCD panel + - nlt,nl12880bc20-spwg-24 # NLT Technologies, Ltd. 15.6" WXGA (1366×768) LVDS TFT LCD panel - nlt,nl13676bc25-03f # New Vision Display 7.0" 800 RGB x 480 TFT LCD panel -- cgit v1.2.3 From c502ca1ea1b9a7ed4b9665bed48bc1d8887639b3 Mon Sep 17 00:00:00 2001 From: sheetal Date: Thu, 18 Sep 2025 15:50:08 +0530 Subject: dt-bindings: interrupt-controller: arm,gic: Add tegra264-agic Add nvidia,tegra264-agic to the arm,gic binding for tegra264 audio interrupt controller support. Signed-off-by: sheetal Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml index 7173c4b5a228..ee4c77dac201 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml @@ -59,6 +59,7 @@ properties: - nvidia,tegra186-agic - nvidia,tegra194-agic - nvidia,tegra234-agic + - nvidia,tegra264-agic - const: nvidia,tegra210-agic interrupt-controller: true -- cgit v1.2.3 From 4379fbb9b06c8c17dac63652cfc2a7ada96c5074 Mon Sep 17 00:00:00 2001 From: Pankaj Patil Date: Thu, 18 Sep 2025 19:32:49 +0530 Subject: dt-bindings: interrupt-controller: qcom,pdc: Document Glymur PDC Document compatible for the Power Domain Controller(PDC) block on Glymur.PDC acts as interrupt controller in SoC states where GIC is non-operational. Signed-off-by: Pankaj Patil Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml index f06b40f88778..38d0c2d57dd6 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml @@ -26,6 +26,7 @@ properties: compatible: items: - enum: + - qcom,glymur-pdc - qcom,qcs615-pdc - qcom,qcs8300-pdc - qcom,qdu1000-pdc -- cgit v1.2.3 From 069862313db33a2b68ebf9e92ac13b73ef12f2af Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:37 +0200 Subject: dt-bindings: display: mediatek: dpi: Allow specifying resets Even though the DPI IP has a reset bit on all MediaTek SoCs, it is optional, and has always been unused until MT8195; specifically: on older SoCs, like MT8173, the reset bit is located in MMSYS, and on newer SoCs, like MT8195, it is located in VDOSYS. For this reason, allow specifying the resets and reset-names on all MediaTek SoCs. Those properties are optional because there are multiple ways to reset this IP and the reset lines in MM/VDO are used only if the IP cannot perform warm-reset. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/display/mediatek/mediatek,dpi.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml index b659d79393a8..eb4f276e8dc4 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml @@ -102,6 +102,13 @@ properties: - port@0 - port@1 + resets: + maxItems: 1 + + reset-names: + items: + - const: dpi + required: - compatible - reg -- cgit v1.2.3 From c1f7800c9c70c67d5feea2d9acaac004086d41d2 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:42 +0200 Subject: dt-bindings: timer: mediatek: Add compatible for MT6795 GP Timer Add a compatible for the General Purpose Timer (GPT) found on the MediaTek Helio X10 MT6795 SoC which is fully compatible with the one found in MT6577. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger Acked-by: Rob Herring (Arm) Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/timer/mediatek,timer.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/timer/mediatek,timer.yaml b/Documentation/devicetree/bindings/timer/mediatek,timer.yaml index f68fc7050c56..42d81073a49d 100644 --- a/Documentation/devicetree/bindings/timer/mediatek,timer.yaml +++ b/Documentation/devicetree/bindings/timer/mediatek,timer.yaml @@ -29,6 +29,7 @@ properties: - mediatek,mt6580-timer - mediatek,mt6582-timer - mediatek,mt6589-timer + - mediatek,mt6795-timer - mediatek,mt7623-timer - mediatek,mt8127-timer - mediatek,mt8135-timer -- cgit v1.2.3 From 8d200dff1e8e0cb521dd48ba1d5424be400cd9bc Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:43 +0200 Subject: dt-bindings: pinctrl: mediatek,mt7622-pinctrl: Add missing pwm_ch7_2 The MT7622 SoC has a PWM channel 7-2 group for the pwm7 IP: add the missing pwm_ch7_2 group. Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml index 9acca85184fa..57b19031925d 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml @@ -204,7 +204,7 @@ patternProperties: pwm_ch2_2, pwm_ch3_0, pwm_ch3_1, pwm_ch3_2, pwm_ch4_0, pwm_ch4_1, pwm_ch4_2, pwm_ch4_3, pwm_ch5_0, pwm_ch5_1, pwm_ch5_2, pwm_ch6_0, pwm_ch6_1, pwm_ch6_2, pwm_ch6_3, - pwm_ch7_0, pwm_0, pwm_1] + pwm_ch7_0, pwm_ch7_2, pwm_0, pwm_1] - if: properties: function: -- cgit v1.2.3 From 8e0118a79bda64aad3ae72dd80c814c1978460ea Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:44 +0200 Subject: dt-bindings: pinctrl: mediatek,mt7622-pinctrl: Add missing base reg The pin controller for both MT7622 and MT7629 need both a "base" and an "eint" MMIO like the ones found on other MediaTek SoCs: while devicetrees have always been correct, the binding is not, as it only allows an "eint" reg. Add "base" to reg-names and increment maxItems for reg to two. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml index 57b19031925d..6b925c5099cc 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml @@ -19,10 +19,11 @@ properties: - mediatek,mt7629-pinctrl reg: - maxItems: 1 + maxItems: 2 reg-names: items: + - const: base - const: eint gpio-controller: true @@ -367,7 +368,8 @@ examples: pio: pinctrl@10211000 { compatible = "mediatek,mt7622-pinctrl"; - reg = <0 0x10211000 0 0x1000>; + reg = <0 0x10211000 0 0x1000>, + <0 0x10005000 0 0x1000>; gpio-controller; #gpio-cells = <2>; -- cgit v1.2.3 From 41663b33cda3a70c719f82f4f62c2f54b16fad5b Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:46 +0200 Subject: dt-bindings: regulator: mediatek,mt6332-regulator: Add missing compatible This binding had no compatible and for this reason would not be applied to anything: add the missing "mediatek,mt6332-regulator" compatible. Fixes: e22943e32e1f regulator: ("Add bindings for MT6332 regulator") Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml index 2eb512c29a0d..475f18d4f261 100644 --- a/Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml @@ -15,6 +15,10 @@ description: | buck- and ldo-. MT6332 regulators node should be sub node of the MT6397 MFD node. +properties: + compatible: + const: mediatek,mt6332-regulator + patternProperties: "^buck-v(dram|dvfs2|pa|rf18a|rf18b|sbst)$": type: object @@ -36,6 +40,9 @@ patternProperties: unevaluatedProperties: false +required: + - compatible + additionalProperties: false examples: -- cgit v1.2.3 From e29e64fb9c58ce92cb8316cd6a939bd3e49b7f63 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:47 +0200 Subject: dt-bindings: regulator: mediatek,mt6331: Fix various regulator names This binding was never applied to anything because it misses the compatible, hence any mistake in it got unnoticed. Before adding the compatible to let it apply, fix the names and the node names of various regulators. Fixes: 6385e21692bb ("regulator: Add bindings for MT6331 regulator") Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Signed-off-by: Rob Herring (Arm) --- .../bindings/regulator/mediatek,mt6331-regulator.yaml | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml index 79e5198e1c73..6006a973b865 100644 --- a/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml @@ -26,23 +26,23 @@ patternProperties: unevaluatedProperties: false - "^ldo-v(avdd32aud|auxa32)$": + "^ldo-(avdd32aud|vauxa32)$": type: object $ref: regulator.yaml# properties: regulator-name: - pattern: "^v(avdd32aud|auxa32)$" + pattern: "^(avdd32_aud|vauxa32)$" unevaluatedProperties: false - "^ldo-v(dig18|emc33|ibr|mc|mch|mipi|rtc|sram|usb10)$": + "^ldo-v(dig18|emc33|ibr|mc|mch|mipi|rtc|sim1|sim2|sram|usb10)$": type: object $ref: regulator.yaml# properties: regulator-name: - pattern: "^v(dig18|emc33|ibr|mc|mch|mipi|rtc|sram|usb10)$" + pattern: "^v(dig18|emc33|ibr|mc|mch|mipi|rtc|sim1|sim2|sram|usb)$" unevaluatedProperties: false @@ -52,7 +52,7 @@ patternProperties: properties: regulator-name: - pattern: "^vcam(a|af|d|io)$" + pattern: "^vcam(a|_af|d|io)$" unevaluatedProperties: false @@ -75,7 +75,7 @@ patternProperties: properties: regulator-name: - pattern: "^vgp[12]$" + pattern: "^vgp[1234]$" required: - regulator-name -- cgit v1.2.3 From 1a8493e06b854b05263071a5db77488cb9c07972 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:48 +0200 Subject: dt-bindings: regulator: mediatek,mt6331: Add missing compatible This binding had no compatible and for this reason would not be applied to anything: add the missing "mediatek,mt6331-regulator" comaptible. Fixes: 6385e21692bb ("regulator: Add bindings for MT6331 regulator") Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml index 6006a973b865..c654acf13768 100644 --- a/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml @@ -15,6 +15,10 @@ description: | buck- and ldo-. MT6331 regulators node should be sub node of the MT6397 MFD node. +properties: + compatible: + const: mediatek,mt6331-regulator + patternProperties: "^buck-v(core2|io18|dvfs11|dvfs12|dvfs13|dvfs14)$": type: object @@ -82,6 +86,9 @@ patternProperties: unevaluatedProperties: false +required: + - compatible + additionalProperties: false examples: -- cgit v1.2.3 From a31c2f8e2b6af2e45d5e8016e5055b2b00b4d6c5 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:39 +0200 Subject: dt-bindings: mailbox: mediatek,gce-mailbox: Make clock-names optional The GCE Mailbox needs only one clock and the clock-names can be used only by the driver (which, for instance, does not use it), and this is true for all of the currently supported MediaTek SoCs. Stop requiring to specify clock-names on all non-MT8195 GCEs. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger Acked-by: Rob Herring (Arm) Reviewed-by: Chen-Yu Tsai Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml index 73d6db34d64a..587126d03fc6 100644 --- a/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml @@ -60,17 +60,6 @@ required: - interrupts - clocks -allOf: - - if: - not: - properties: - compatible: - contains: - const: mediatek,mt8195-gce - then: - required: - - clock-names - additionalProperties: false examples: -- cgit v1.2.3 From 37020f865aa3c4049266cb34cf83ef299184ae80 Mon Sep 17 00:00:00 2001 From: Julien Massot Date: Tue, 26 Aug 2025 09:39:36 +0200 Subject: dt-bindings: arm: mediatek: Support mt8183-audiosys variant Update the mediatek,audsys binding to support the mt8183-audiosys compatible, which uses a different audio controller (mediatek,mt8183-audio.yaml) compared to the legacy mt2701-audio controller. Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Signed-off-by: Julien Massot Signed-off-by: Rob Herring (Arm) --- .../bindings/arm/mediatek/mediatek,audsys.yaml | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml index 45d4a6620041..f3a761cbd0fd 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml @@ -23,6 +23,7 @@ properties: - mediatek,mt7622-audsys - mediatek,mt8167-audsys - mediatek,mt8173-audsys + - mediatek,mt8183-audiosys - mediatek,mt8183-audsys - mediatek,mt8186-audsys - mediatek,mt8192-audsys @@ -41,13 +42,26 @@ properties: const: 1 audio-controller: - $ref: /schemas/sound/mediatek,mt2701-audio.yaml# type: object required: - compatible - '#clock-cells' +if: + properties: + compatible: + contains: + const: mediatek,mt8183-audiosys +then: + properties: + audio-controller: + $ref: /schemas/sound/mediatek,mt8183-audio.yaml# +else: + properties: + audio-controller: + $ref: /schemas/sound/mediatek,mt2701-audio.yaml# + additionalProperties: false examples: -- cgit v1.2.3 From 49ceb031b6c139e17e069b25506a4c283fd22595 Mon Sep 17 00:00:00 2001 From: Ariel D'Alessandro Date: Thu, 11 Sep 2025 12:09:51 -0300 Subject: dt-bindings: media: Convert MediaTek mt8173-vpu bindings to DT schema Convert the existing text-based DT bindings for Mediatek MT8173 Video Processor Unit to a DT schema. Signed-off-by: Ariel D'Alessandro Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski [robh: update MAINTAINERS and mediatek-mdp.txt references] Signed-off-by: Rob Herring (Arm) --- .../bindings/media/mediatek,mt8173-vpu.yaml | 74 ++++++++++++++++++++++ .../devicetree/bindings/media/mediatek-mdp.txt | 3 +- .../devicetree/bindings/media/mediatek-vpu.txt | 31 --------- 3 files changed, 76 insertions(+), 32 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8173-vpu.yaml delete mode 100644 Documentation/devicetree/bindings/media/mediatek-vpu.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8173-vpu.yaml b/Documentation/devicetree/bindings/media/mediatek,mt8173-vpu.yaml new file mode 100644 index 000000000000..8a47761f1e6b --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mt8173-vpu.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mt8173-vpu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek MT8173 Video Processor Unit + +maintainers: + - Ariel D'Alessandro + +description: + Video Processor Unit is a HW video controller. It controls HW Codec including + H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color + convert). + +properties: + compatible: + const: mediatek,mt8173-vpu + + reg: + maxItems: 2 + + reg-names: + items: + - const: tcm + - const: cfg_reg + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: main + + memory-region: + maxItems: 1 + +required: + - compatible + - reg + - reg-names + - interrupts + - clocks + - clock-names + - memory-region + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + vpu: vpu@10020000 { + compatible = "mediatek,mt8173-vpu"; + reg = <0 0x10020000 0 0x30000>, + <0 0x10050000 0 0x100>; + reg-names = "tcm", "cfg_reg"; + interrupts = ; + clocks = <&topckgen CLK_TOP_SCP_SEL>; + clock-names = "main"; + memory-region = <&vpu_dma_reserved>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/media/mediatek-mdp.txt b/Documentation/devicetree/bindings/media/mediatek-mdp.txt index 53ef26e2c857..253a93eabb5e 100644 --- a/Documentation/devicetree/bindings/media/mediatek-mdp.txt +++ b/Documentation/devicetree/bindings/media/mediatek-mdp.txt @@ -5,7 +5,8 @@ Media Data Path is used for scaling and color space conversion. Required properties (controller node): - compatible: "mediatek,mt8173-mdp" - mediatek,vpu: the node of video processor unit, see - Documentation/devicetree/bindings/media/mediatek-vpu.txt for details. + Documentation/devicetree/bindings/media/mediatek,mt8173-vpu.yaml for + details. Required properties (all function blocks, child node): - compatible: Should be one of diff --git a/Documentation/devicetree/bindings/media/mediatek-vpu.txt b/Documentation/devicetree/bindings/media/mediatek-vpu.txt deleted file mode 100644 index 2a5bac37f9a2..000000000000 --- a/Documentation/devicetree/bindings/media/mediatek-vpu.txt +++ /dev/null @@ -1,31 +0,0 @@ -* Mediatek Video Processor Unit - -Video Processor Unit is a HW video controller. It controls HW Codec including -H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color convert). - -Required properties: - - compatible: "mediatek,mt8173-vpu" - - reg: Must contain an entry for each entry in reg-names. - - reg-names: Must include the following entries: - "tcm": tcm base - "cfg_reg": Main configuration registers base - - interrupts: interrupt number to the cpu. - - clocks : clock name from clock manager - - clock-names: must be main. It is the main clock of VPU - -Optional properties: - - memory-region: phandle to a node describing memory (see - Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) - to be used for VPU extended memory; if not present, VPU may be located - anywhere in the memory - -Example: - vpu: vpu@10020000 { - compatible = "mediatek,mt8173-vpu"; - reg = <0 0x10020000 0 0x30000>, - <0 0x10050000 0 0x100>; - reg-names = "tcm", "cfg_reg"; - interrupts = ; - clocks = <&topckgen TOP_SCP_SEL>; - clock-names = "main"; - }; -- cgit v1.2.3 From d0b5a39acd079bccaebbb0d94bfd4649359951c2 Mon Sep 17 00:00:00 2001 From: Ariel D'Alessandro Date: Thu, 11 Sep 2025 12:09:57 -0300 Subject: dt-bindings: pinctrl: mt65xx: Allow gpio-line-names Current, the DT bindings for MediaTek's MT65xx Pin controller is missing the gpio-line-names property, add it to the associated schema. Signed-off-by: Ariel D'Alessandro Acked-by: Rob Herring (Arm) Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Linus Walleij Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml index b9680b896f12..aa71398cf522 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml @@ -43,6 +43,8 @@ properties: the amount of cells must be specified as 2. See the below mentioned gpio binding representation for description of particular cells. + gpio-line-names: true + mediatek,pctl-regmap: $ref: /schemas/types.yaml#/definitions/phandle-array items: -- cgit v1.2.3 From 18b26b15178386eb82bca4b23b03e96ca9317d36 Mon Sep 17 00:00:00 2001 From: Ariel D'Alessandro Date: Thu, 11 Sep 2025 12:10:00 -0300 Subject: dt-bindings: soc: mediatek: pwrap: Add power-domains property Currently, the DT bindings for Mediatek PMIC Wrapper is missing the power-domains property, which is used in the MT8173 E1 evaluation board as it needs USB power domain. Signed-off-by: Ariel D'Alessandro Acked-by: Rob Herring (Arm) Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml index 4737e5f45d54..54c0cd64d309 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml @@ -98,6 +98,9 @@ properties: - const: pwrap - const: pwrap-bridge + power-domains: + maxItems: 1 + pmic: type: object @@ -126,6 +129,18 @@ allOf: clock-names: minItems: 4 + - if: + properties: + compatible: + contains: + const: mediatek,mt8173-pwrap + then: + properties: + power-domains: true + else: + properties: + power-domains: false + additionalProperties: false examples: -- cgit v1.2.3 From 4fea3336ef57295b989a6b2db4a6946a06e4c787 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 23 Sep 2025 16:41:18 -0400 Subject: dt-bindings: trivial-devices: Add compatible string synaptics,synaptics_i2c Add compatible string synaptics,synaptics_i2c for synaptics touch pad. It match existed driver drivers/input/mouse/synaptics_i2c.c. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Frank Li Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++ Documentation/devicetree/bindings/vendor-prefixes.yaml | 3 +++ 2 files changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index f3dd18681aa6..8db4596c616b 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -395,6 +395,8 @@ properties: - sparkfun,qwiic-joystick # Sierra Wireless mangOH Green SPI IoT interface - swir,mangoh-iotport-spi + # Synaptics I2C touchpad + - synaptics,synaptics_i2c # Ambient Light Sensor with SMBUS/Two Wire Serial Interface - taos,tsl2550 # Digital PWM System Controller PMBus diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 0f5273123650..699560820fdf 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1552,6 +1552,9 @@ patternProperties: description: Sierra Wireless "^syna,.*": description: Synaptics Inc. + "^synaptics,.*": + description: Synaptics Inc. + deprecated: true "^synology,.*": description: Synology, Inc. "^synopsys,.*": -- cgit v1.2.3 From 86eedc669a56e5607c253253d7b466a5b8d70fc8 Mon Sep 17 00:00:00 2001 From: Markus Heidelberg Date: Fri, 26 Sep 2025 12:57:47 +0200 Subject: docs: dt: fix grammar and spelling Signed-off-by: Markus Heidelberg Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/of_unittest.rst | 4 ++-- Documentation/devicetree/overlay-notes.rst | 6 +++--- Documentation/devicetree/usage-model.rst | 6 +++--- 3 files changed, 8 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/of_unittest.rst b/Documentation/devicetree/of_unittest.rst index a6c05962add3..8b557acd29d1 100644 --- a/Documentation/devicetree/of_unittest.rst +++ b/Documentation/devicetree/of_unittest.rst @@ -56,7 +56,7 @@ drivers/of/unittest.c. See the content of the folder:: for the Device Tree Source Include files (.dtsi) included in testcases.dts. -When the kernel is build with CONFIG_OF_UNITTEST enabled, then the following make +When the kernel is built with CONFIG_OF_UNITTEST enabled, then the following make rule:: $(obj)/%.dtb: $(src)/%.dts FORCE @@ -133,7 +133,7 @@ via the following kernel symbols:: __dtb_testcases_end - address marking the end of test data blob Secondly, it calls of_fdt_unflatten_tree() to unflatten the flattened -blob. And finally, if the machine's device tree (i.e live tree) is present, +blob. And finally, if the machine's device tree (i.e. live tree) is present, then it attaches the unflattened test data tree to the live tree, else it attaches itself as a live device tree. diff --git a/Documentation/devicetree/overlay-notes.rst b/Documentation/devicetree/overlay-notes.rst index 35e79242af9a..ba401ef850e7 100644 --- a/Documentation/devicetree/overlay-notes.rst +++ b/Documentation/devicetree/overlay-notes.rst @@ -14,11 +14,11 @@ How overlays work A Devicetree's overlay purpose is to modify the kernel's live tree, and have the modification affecting the state of the kernel in a way that is reflecting the changes. -Since the kernel mainly deals with devices, any new device node that result +Since the kernel mainly deals with devices, any new device node that results in an active device should have it created while if the device node is either disabled or removed all together, the affected device should be deregistered. -Lets take an example where we have a foo board with the following base tree:: +Let's take an example where we have a foo board with the following base tree:: ---- foo.dts --------------------------------------------------------------- /* FOO platform */ @@ -111,7 +111,7 @@ The API is quite easy to use. 1) Call of_overlay_fdt_apply() to create and apply an overlay changeset. The return value is an error or a cookie identifying this overlay. -2) Call of_overlay_remove() to remove and cleanup the overlay changeset +2) Call of_overlay_remove() to remove and clean up the overlay changeset previously created via the call to of_overlay_fdt_apply(). Removal of an overlay changeset that is stacked by another will not be permitted. diff --git a/Documentation/devicetree/usage-model.rst b/Documentation/devicetree/usage-model.rst index 0717426856b2..c6146c96ac56 100644 --- a/Documentation/devicetree/usage-model.rst +++ b/Documentation/devicetree/usage-model.rst @@ -46,7 +46,7 @@ The DT was originally created by Open Firmware as part of the communication method for passing data from Open Firmware to a client program (like to an operating system). An operating system used the Device Tree to discover the topology of the hardware at runtime, and -thereby support a majority of available hardware without hard coded +thereby supported a majority of available hardware without hard coded information (assuming drivers were available for all devices). Since Open Firmware is commonly used on PowerPC and SPARC platforms, @@ -128,7 +128,7 @@ successor, the BeagleBoard xM board might look like, respectively:: compatible = "ti,omap3-beagleboard-xm", "ti,omap3450", "ti,omap3"; Where "ti,omap3-beagleboard-xm" specifies the exact model, it also -claims that it compatible with the OMAP 3450 SoC, and the omap3 family +claims that it is compatible with the OMAP 3450 SoC, and the omap3 family of SoCs in general. You'll notice that the list is sorted from most specific (exact board) to least specific (SoC family). @@ -205,7 +205,7 @@ platform-specific configuration data. During early boot, the architecture setup code calls of_scan_flat_dt() several times with different helper callbacks to parse device tree -data before paging is setup. The of_scan_flat_dt() code scans through +data before paging is set up. The of_scan_flat_dt() code scans through the device tree and uses the helpers to extract information required during early boot. Typically the early_init_dt_scan_chosen() helper is used to parse the chosen node including kernel parameters, -- cgit v1.2.3 From d6f57d8c5a5aede34c72382cdbd5b35616e171e6 Mon Sep 17 00:00:00 2001 From: Markus Heidelberg Date: Fri, 26 Sep 2025 12:57:48 +0200 Subject: dt-bindings: fix spelling, typos, grammar, duplicated words Signed-off-by: Markus Heidelberg Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml | 2 +- Documentation/devicetree/bindings/example-schema.yaml | 2 +- Documentation/devicetree/bindings/gpio/gpio.txt | 12 ++++++------ Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml | 2 +- Documentation/devicetree/bindings/leds/common.yaml | 2 +- Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml | 2 +- Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml | 2 +- Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml | 2 +- .../devicetree/bindings/mmc/mmc-controller-common.yaml | 4 ++-- .../devicetree/bindings/net/amlogic,meson-dwmac.yaml | 2 +- .../devicetree/bindings/net/ethernet-controller.yaml | 2 +- Documentation/devicetree/bindings/net/ethernet-phy.yaml | 2 +- Documentation/devicetree/bindings/net/micrel-ksz90x1.txt | 4 ++-- Documentation/devicetree/bindings/net/micrel.txt | 2 +- Documentation/devicetree/bindings/submitting-patches.rst | 2 +- 15 files changed, 22 insertions(+), 22 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml index 89298b39903f..4cdca5320544 100644 --- a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml +++ b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml @@ -140,7 +140,7 @@ patternProperties: the connection between the motherboard and any tiles. Sometimes the compatible is placed directly under this node, sometimes it is placed in a subnode named "motherboard-bus". Sometimes the compatible includes - "arm,vexpress,v2?-p1" sometimes (on software models) is is just + "arm,vexpress,v2?-p1" sometimes (on software models) it is just "simple-bus". If the compatible is placed in the "motherboard-bus" node, it is stricter and always has two compatibles. type: object diff --git a/Documentation/devicetree/bindings/example-schema.yaml b/Documentation/devicetree/bindings/example-schema.yaml index c731d5045e80..b04f3cc4312c 100644 --- a/Documentation/devicetree/bindings/example-schema.yaml +++ b/Documentation/devicetree/bindings/example-schema.yaml @@ -223,7 +223,7 @@ required: # # For multiple 'if' schema, group them under an 'allOf'. # -# If the conditionals become too unweldy, then it may be better to just split +# If the conditionals become too unwieldy, then it may be better to just split # the binding into separate schema documents. allOf: - if: diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt index d82c32217fff..b37dbb1edc62 100644 --- a/Documentation/devicetree/bindings/gpio/gpio.txt +++ b/Documentation/devicetree/bindings/gpio/gpio.txt @@ -35,8 +35,8 @@ and bit-banged data signals: <&gpio1 15 0>; In the above example, &gpio1 uses 2 cells to specify a gpio. The first cell is -a local offset to the GPIO line and the second cell represent consumer flags, -such as if the consumer desire the line to be active low (inverted) or open +a local offset to the GPIO line and the second cell represents consumer flags, +such as if the consumer desires the line to be active low (inverted) or open drain. This is the recommended practice. The exact meaning of each specifier cell is controller specific, and must be @@ -59,7 +59,7 @@ GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller. Optional standard bitfield specifiers for the last cell: - Bit 0: 0 means active high, 1 means active low -- Bit 1: 0 mean push-pull wiring, see: +- Bit 1: 0 means push-pull wiring, see: https://en.wikipedia.org/wiki/Push-pull_output 1 means single-ended wiring, see: https://en.wikipedia.org/wiki/Single-ended_triode @@ -176,7 +176,7 @@ example of a name from an SoC's reference manual) would not be desirable. In either case placeholders are discouraged: rather use the "" (blank string) if the use of the GPIO line is undefined in your design. Ideally, -try to add comments to the dts file describing the naming the convention +try to add comments to the dts file describing the naming convention you have chosen, and specifying from where the names are derived. The names are assigned starting from line offset 0, from left to right, @@ -304,7 +304,7 @@ pins 50..69. It is also possible to use pin groups for gpio ranges when pin groups are the easiest and most convenient mapping. -Both both and must set to 0 when using named pin groups +Both and must be set to 0 when using named pin groups names. The property gpio-ranges-group-names must contain exactly one string for each @@ -313,7 +313,7 @@ range. Elements of gpio-ranges-group-names must contain the name of a pin group defined in the respective pin controller. The number of pins/GPIO lines in the range is the number of pins in that pin group. The number of pins of that -group is defined int the implementation and not in the device tree. +group is defined in the implementation and not in the device tree. If numerical and named pin groups are mixed, the string corresponding to a numerical pin range in gpio-ranges-group-names must be empty. diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml index 75750c64157c..f49ed8ac4776 100644 --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml @@ -52,7 +52,7 @@ description: |+ As above, The Multimedia HW will go through SMI and M4U while it access EMI. SMI is a bridge between m4u and the Multimedia HW. It contain smi local arbiter and smi common. It will control whether the Multimedia - HW should go though the m4u for translation or bypass it and talk + HW should go through the m4u for translation or bypass it and talk directly with EMI. And also SMI help control the power domain and clocks for each local arbiter. diff --git a/Documentation/devicetree/bindings/leds/common.yaml b/Documentation/devicetree/bindings/leds/common.yaml index 3e8319e44339..274f83288a92 100644 --- a/Documentation/devicetree/bindings/leds/common.yaml +++ b/Documentation/devicetree/bindings/leds/common.yaml @@ -62,7 +62,7 @@ properties: default-state: description: The initial state of the LED. If the LED is already on or off and the - default-state property is set the to same value, then no glitch should be + default-state property is set to the same value, then no glitch should be produced where the LED momentarily turns off (or on). The "keep" setting will keep the LED at whatever its current state is, without producing a glitch. diff --git a/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml b/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml index ae149eb8593d..ca72786b0e0d 100644 --- a/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml @@ -26,7 +26,7 @@ properties: '#gpio-cells': description: The first cell is the pin number. - The second cell is is used to specify flags. + The second cell is used to specify flags. See ../gpio/gpio.txt for more information. const: 2 diff --git a/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml b/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml index 5167d6eb904a..885e33276b1b 100644 --- a/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml @@ -26,7 +26,7 @@ properties: '#gpio-cells': description: The first cell is the pin number. - The second cell is is used to specify flags. + The second cell is used to specify flags. See ../gpio/gpio.txt for more information. const: 2 diff --git a/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml b/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml index eca430edf608..2b5b54aa6c73 100644 --- a/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml @@ -28,7 +28,7 @@ properties: '#gpio-cells': description: The first cell is the pin number. - The second cell is is used to specify flags. + The second cell is used to specify flags. See ../gpio/gpio.txt for more information. const: 2 diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml index 9a7235439759..1e601da0339a 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml @@ -57,7 +57,7 @@ properties: # latter case. We choose to use the XOR logic for GPIO CD and WP # lines. This means, the two properties are "superimposed," for # example leaving the GPIO_ACTIVE_LOW flag clear and specifying the - # respective *-inverted property property results in a + # respective *-inverted property results in a # double-inversion and actually means the "normal" line polarity is # in effect. wp-inverted: @@ -264,7 +264,7 @@ properties: mmc-pwrseq-simple.yaml. But now it\'s reused as a tunable delay waiting for I/O signalling and card power supply to be stable, regardless of whether pwrseq-simple is used. Default to 10ms if - no available. + not available. default: 10 supports-cqe: diff --git a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml index 0cd78d71768c..5c91716d1f21 100644 --- a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml @@ -149,7 +149,7 @@ properties: - description: The first register range should be the one of the DWMAC controller - description: - The second range is is for the Amlogic specific configuration + The second range is for the Amlogic specific configuration (for example the PRG_ETHERNET register range on Meson8b and newer) interrupts: diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml index 66b1cfbbfe22..341f4938c956 100644 --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -222,7 +222,7 @@ properties: reg: maxItems: 1 description: - This define the LED index in the PHY or the MAC. It's really + This defines the LED index in the PHY or the MAC. It's really driver dependent and required for ports that define multiple LED for the same port. diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index 71e2cd32580f..2ec2d9fda7e3 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -266,7 +266,7 @@ properties: reg: maxItems: 1 description: - This define the LED index in the PHY or the MAC. It's really + This defines the LED index in the PHY or the MAC. It's really driver dependent and required for ports that define multiple LED for the same port. diff --git a/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt b/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt index 2681168777a1..6f7b907d5a04 100644 --- a/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt +++ b/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt @@ -13,7 +13,7 @@ KSZ9021: All skew control options are specified in picoseconds. The minimum value is 0, the maximum value is 3000, and it can be specified in 200ps - steps, *but* these values are in not fact what you get because this chip's + steps, *but* these values are in no way what you get because this chip's skew values actually increase in 120ps steps, starting from -840ps. The incorrect values came from an error in the original KSZ9021 datasheet before it was corrected in revision 1.2 (Feb 2014), but it is too late to @@ -153,7 +153,7 @@ KSZ9031: - micrel,force-master: Boolean, force phy to master mode. Only set this option if the phy reference clock provided at CLK125_NDO pin is used as MAC reference - clock because the clock jitter in slave mode is to high (errata#2). + clock because the clock jitter in slave mode is too high (errata#2). Attention: The link partner must be configurable as slave otherwise no link will be established. diff --git a/Documentation/devicetree/bindings/net/micrel.txt b/Documentation/devicetree/bindings/net/micrel.txt index a407dd1b4614..01622ce58112 100644 --- a/Documentation/devicetree/bindings/net/micrel.txt +++ b/Documentation/devicetree/bindings/net/micrel.txt @@ -26,7 +26,7 @@ Optional properties: Setting the RMII Reference Clock Select bit enables 25 MHz rather than 50 MHz clock mode. - Note that this option in only needed for certain PHY revisions with a + Note that this option is only needed for certain PHY revisions with a non-standard, inverted function of this configuration bit. Specifically, a clock reference ("rmii-ref" below) is always needed to actually select a mode. diff --git a/Documentation/devicetree/bindings/submitting-patches.rst b/Documentation/devicetree/bindings/submitting-patches.rst index 46d0b036c97e..5f24570f72e9 100644 --- a/Documentation/devicetree/bindings/submitting-patches.rst +++ b/Documentation/devicetree/bindings/submitting-patches.rst @@ -95,7 +95,7 @@ II. For kernel maintainers For subsystem bindings (anything affecting more than a single device), getting a devicetree maintainer to review it is required. - 3) For a series going though multiple trees, the binding patch should be + 3) For a series going through multiple trees, the binding patch should be kept with the driver using the binding. 4) The DTS files should however never be applied via driver subsystem tree, -- cgit v1.2.3 From 74459b0dacced28542b631abf89bc24456c7f789 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 23 Sep 2025 16:55:48 -0400 Subject: dt-bindings: display: bridge: convert megachips-stdpxxxx-ge-b850v3-fw.txt to yaml Convert megachips-stdpxxxx-ge-b850v3-fw.txt to yaml format. Additional changes: - Only keep one example. Signed-off-by: Frank Li Signed-off-by: Rob Herring (Arm) --- .../bridge/megachips,stdp2690-ge-b850v3-fw.yaml | 111 +++++++++++++++++++++ .../bridge/megachips-stdpxxxx-ge-b850v3-fw.txt | 91 ----------------- 2 files changed, 111 insertions(+), 91 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/bridge/megachips,stdp2690-ge-b850v3-fw.yaml delete mode 100644 Documentation/devicetree/bindings/display/bridge/megachips-stdpxxxx-ge-b850v3-fw.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/bridge/megachips,stdp2690-ge-b850v3-fw.yaml b/Documentation/devicetree/bindings/display/bridge/megachips,stdp2690-ge-b850v3-fw.yaml new file mode 100644 index 000000000000..dfa6ff6f115e --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/megachips,stdp2690-ge-b850v3-fw.yaml @@ -0,0 +1,111 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/megachips,stdp2690-ge-b850v3-fw.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GE B850v3 video bridge + +maintainers: + - Frank Li + +description: | + STDP4028-ge-b850v3-fw bridges (LVDS-DP) + STDP2690-ge-b850v3-fw bridges (DP-DP++) + + The video processing pipeline on the second output on the GE B850v3: + + Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output + + Each bridge has a dedicated flash containing firmware for supporting the custom + design. The result is that, in this design, neither the STDP4028 nor the + STDP2690 behave as the stock bridges would. The compatible strings include the + suffix "-ge-b850v3-fw" to make it clear that the driver is for the bridges with + the firmware specific for the GE B850v3. + + The hardware do not provide control over the video processing pipeline, as the + two bridges behaves as a single one. The only interfaces exposed by the + hardware are EDID, HPD, and interrupts. + +properties: + compatible: + enum: + - megachips,stdp4028-ge-b850v3-fw + - megachips,stdp2690-ge-b850v3-fw + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + properties: + port@0: + description: sink port + $ref: /schemas/graph.yaml#/properties/port + + port@1: + description: source port + $ref: /schemas/graph.yaml#/properties/port + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - ports + +allOf: + - if: + properties: + compatible: + contains: + const: megachips,stdp4028-ge-b850v3-fw + then: + required: + - interrupts + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + bridge@73 { + compatible = "megachips,stdp4028-ge-b850v3-fw"; + reg = <0x73>; + interrupt-parent = <&gpio2>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + endpoint { + remote-endpoint = <&lvds0_out>; + }; + + }; + + port@1 { + reg = <1>; + + endpoint { + remote-endpoint = <&stdp2690_in>; + }; + }; + }; + }; + }; + diff --git a/Documentation/devicetree/bindings/display/bridge/megachips-stdpxxxx-ge-b850v3-fw.txt b/Documentation/devicetree/bindings/display/bridge/megachips-stdpxxxx-ge-b850v3-fw.txt deleted file mode 100644 index 09e0a21f705e..000000000000 --- a/Documentation/devicetree/bindings/display/bridge/megachips-stdpxxxx-ge-b850v3-fw.txt +++ /dev/null @@ -1,91 +0,0 @@ -Drivers for the second video output of the GE B850v3: - STDP4028-ge-b850v3-fw bridges (LVDS-DP) - STDP2690-ge-b850v3-fw bridges (DP-DP++) - -The video processing pipeline on the second output on the GE B850v3: - - Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output - -Each bridge has a dedicated flash containing firmware for supporting the custom -design. The result is that, in this design, neither the STDP4028 nor the -STDP2690 behave as the stock bridges would. The compatible strings include the -suffix "-ge-b850v3-fw" to make it clear that the driver is for the bridges with -the firmware specific for the GE B850v3. - -The hardware do not provide control over the video processing pipeline, as the -two bridges behaves as a single one. The only interfaces exposed by the -hardware are EDID, HPD, and interrupts. - -stdp4028-ge-b850v3-fw required properties: - - compatible : "megachips,stdp4028-ge-b850v3-fw" - - reg : I2C bus address - - interrupts : one interrupt should be described here, as in - <0 IRQ_TYPE_LEVEL_HIGH> - - ports : One input port(reg = <0>) and one output port(reg = <1>) - -stdp2690-ge-b850v3-fw required properties: - compatible : "megachips,stdp2690-ge-b850v3-fw" - - reg : I2C bus address - - ports : One input port(reg = <0>) and one output port(reg = <1>) - -Example: - -&mux2_i2c2 { - clock-frequency = <100000>; - - stdp4028@73 { - compatible = "megachips,stdp4028-ge-b850v3-fw"; - #address-cells = <1>; - #size-cells = <0>; - - reg = <0x73>; - - interrupt-parent = <&gpio2>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - stdp4028_in: endpoint { - remote-endpoint = <&lvds0_out>; - }; - }; - port@1 { - reg = <1>; - stdp4028_out: endpoint { - remote-endpoint = <&stdp2690_in>; - }; - }; - }; - }; - - stdp2690@72 { - compatible = "megachips,stdp2690-ge-b850v3-fw"; - #address-cells = <1>; - #size-cells = <0>; - - reg = <0x72>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - stdp2690_in: endpoint { - remote-endpoint = <&stdp4028_out>; - }; - }; - - port@1 { - reg = <1>; - stdp2690_out: endpoint { - /* Connector for external display */ - }; - }; - }; - }; -}; -- cgit v1.2.3 From 33b6c8ed1ddd6118fbc150269cd2201462fbd7e6 Mon Sep 17 00:00:00 2001 From: Kael D'Alcamo Date: Wed, 24 Sep 2025 16:09:22 +0200 Subject: dt-bindings: vendor-prefixes: update regex for properties without a prefix Update vendor-prefixes.yaml to allow property names without a prefix to contain '#' character in all positions Signed-off-by: Kael D'Alcamo Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 699560820fdf..6ce9de649f4b 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1862,7 +1862,7 @@ patternProperties: # Normal property name match without a comma # These should catch all node/property names without a prefix - "^[a-zA-Z0-9#_][a-zA-Z0-9+\\-._@]{0,63}$": true + "^[a-zA-Z0-9#_][a-zA-Z0-9#+\\-._@]{0,63}$": true "^[a-zA-Z0-9+\\-._]*@[0-9a-zA-Z,]*$": true "^#.*": true -- cgit v1.2.3 From 532a94352fca6b51f49d1cd9f0e4250ade49b8b2 Mon Sep 17 00:00:00 2001 From: Kael D'Alcamo Date: Wed, 24 Sep 2025 16:09:20 +0200 Subject: dt-bindings: rng: sparc_sun_oracle_rng: convert to DT schema Convert the Devicetree binding documentation for: * SUNW,n2-rng * SUNW,vf-rng * SUNW,kt-rng * ORCL,m4-rng * ORCL,m7-rng from plain text to YAML. Signed-off-by: Kael D'Alcamo Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/rng/SUNW,n2-rng.yaml | 50 ++++++++++++++++++++++ .../bindings/rng/sparc_sun_oracle_rng.txt | 30 ------------- 2 files changed, 50 insertions(+), 30 deletions(-) create mode 100644 Documentation/devicetree/bindings/rng/SUNW,n2-rng.yaml delete mode 100644 Documentation/devicetree/bindings/rng/sparc_sun_oracle_rng.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/rng/SUNW,n2-rng.yaml b/Documentation/devicetree/bindings/rng/SUNW,n2-rng.yaml new file mode 100644 index 000000000000..6eafc532dc76 --- /dev/null +++ b/Documentation/devicetree/bindings/rng/SUNW,n2-rng.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/SUNW,n2-rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SUN UltraSPARC HWRNG + +maintainers: + - David S. Miller + +properties: + compatible: + enum: + - SUNW,n2-rng # for Niagara 2 Platform (SUN UltraSPARC T2 CPU) + - SUNW,vf-rng # for Victoria Falls Platform (SUN UltraSPARC T2 Plus CPU) + # for Rainbow/Yosemite Falls Platform (SUN SPARC T3/T4), + # (UltraSPARC KT/Niagara 3 - development names) + # more recent systems (after Oracle acquisition of SUN) + - SUNW,kt-rng + - ORCL,m4-rng # for SPARC T5/M5 + - ORCL,m7-rng # for SPARC T7/M7 + + reg: + maxItems: 1 + + "rng-#units": + description: Number of RNG units + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + +required: + - compatible + - reg + +additionalProperties: false + +# PS: see as well prtconfs.git by DaveM +examples: + - | + bus { + #address-cells = <1>; + #size-cells = <0>; + + rng@e { + compatible = "ORCL,m4-rng"; + reg = <0xe>; + rng-#units = <2>; + }; + }; diff --git a/Documentation/devicetree/bindings/rng/sparc_sun_oracle_rng.txt b/Documentation/devicetree/bindings/rng/sparc_sun_oracle_rng.txt deleted file mode 100644 index b0b211194c71..000000000000 --- a/Documentation/devicetree/bindings/rng/sparc_sun_oracle_rng.txt +++ /dev/null @@ -1,30 +0,0 @@ -HWRNG support for the n2_rng driver - -Required properties: -- reg : base address to sample from -- compatible : should contain one of the following - RNG versions: - - 'SUNW,n2-rng' for Niagara 2 Platform (SUN UltraSPARC T2 CPU) - - 'SUNW,vf-rng' for Victoria Falls Platform (SUN UltraSPARC T2 Plus CPU) - - 'SUNW,kt-rng' for Rainbow/Yosemite Falls Platform (SUN SPARC T3/T4), (UltraSPARC KT/Niagara 3 - development names) - more recent systems (after Oracle acquisition of SUN) - - 'ORCL,m4-rng' for SPARC T5/M5 - - 'ORCL,m7-rng' for SPARC T7/M7 - -Examples: -/* linux LDOM on SPARC T5-2 */ -Node 0xf029a4f4 - .node: f029a4f4 - rng-#units: 00000002 - compatible: 'ORCL,m4-rng' - reg: 0000000e - name: 'random-number-generator' - -/* solaris on SPARC M7-8 */ -Node 0xf028c08c - rng-#units: 00000003 - compatible: 'ORCL,m7-rng' - reg: 0000000e - name: 'random-number-generator' - -PS: see as well prtconfs.git by DaveM -- cgit v1.2.3 From 267bca002c504b6c656c23dc973a34ddaededbce Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Thu, 25 Sep 2025 15:19:49 +0200 Subject: dt-bindings: net: sparx5: correct LAN969x register space windows LAN969x needs only 2 register space windows as GCB is already covered by the "devices" register space window, so expect only 2 "reg" and "reg-names" properties. Fixes: 41c6439fdc2b ("dt-bindings: net: add compatible strings for lan969x targets") Signed-off-by: Robert Marko Acked-by: Conor Dooley Link: https://patch.msgid.link/20250925132109.583984-1-robert.marko@sartura.hr Signed-off-by: Jakub Kicinski --- .../bindings/net/microchip,sparx5-switch.yaml | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml index 082982c59a55..5caa3779660d 100644 --- a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml +++ b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml @@ -55,12 +55,14 @@ properties: - const: microchip,lan9691-switch reg: + minItems: 2 items: - description: cpu target - description: devices target - description: general control block target reg-names: + minItems: 2 items: - const: cpu - const: devices @@ -168,6 +170,26 @@ required: - interrupt-names - ethernet-ports +allOf: + - if: + properties: + compatible: + contains: + enum: + - microchip,lan9691-switch + then: + properties: + reg: + minItems: 2 + reg-names: + minItems: 2 + else: + properties: + reg: + minItems: 3 + reg-names: + minItems: 3 + additionalProperties: false examples: -- cgit v1.2.3 From 96a17ed17b369109b662b40345df961b412c1cd3 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Fri, 19 Sep 2025 19:53:25 +0530 Subject: dt-bindings: PCI: qcom,pcie-x1e80100: Set clocks minItems for the fifth Glymur PCIe Controller On the Qualcomm Glymur platform, the fifth PCIe host is compatible with the DWC controller present on the X1E80100 platform, but does not have cnoc_sf_axi clock. Hence, set minItems of clocks and clock-names to six. Signed-off-by: Qiang Yu Signed-off-by: Pankaj Patil Signed-off-by: Bjorn Helgaas Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250919142325.1090059-1-pankaj.patil@oss.qualcomm.com --- Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml index 257068a18264..61581ffbfb24 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml @@ -32,10 +32,11 @@ properties: - const: mhi # MHI registers clocks: - minItems: 7 + minItems: 6 maxItems: 7 clock-names: + minItems: 6 items: - const: aux # Auxiliary clock - const: cfg # Configuration clock -- cgit v1.2.3 From d1a7be736ca9b89c32023185fa95c0df02f6db27 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 24 Sep 2025 17:35:49 -0500 Subject: dt-bindings: gpu: Convert nvidia,gk20a to DT schema Convert the NVIDIA GPU binding to DT schema format. Add undocumented "interconnects" and "interconnect-names" properties for gp10b and gv11b. Drop all but one example. Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/gpu/nvidia,gk20a.txt | 115 -------------- .../devicetree/bindings/gpu/nvidia,gk20a.yaml | 171 +++++++++++++++++++++ 2 files changed, 171 insertions(+), 115 deletions(-) delete mode 100644 Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt create mode 100644 Documentation/devicetree/bindings/gpu/nvidia,gk20a.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt deleted file mode 100644 index cc6ce5221a38..000000000000 --- a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt +++ /dev/null @@ -1,115 +0,0 @@ -NVIDIA Tegra Graphics Processing Units - -Required properties: -- compatible: "nvidia," - Currently recognized values: - - nvidia,gk20a - - nvidia,gm20b - - nvidia,gp10b - - nvidia,gv11b -- reg: Physical base address and length of the controller's registers. - Must contain two entries: - - first entry for bar0 - - second entry for bar1 -- interrupts: Must contain an entry for each entry in interrupt-names. - See ../interrupt-controller/interrupts.txt for details. -- interrupt-names: Must include the following entries: - - stall - - nonstall -- vdd-supply: regulator for supply voltage. Only required for GPUs not using - power domains. -- clocks: Must contain an entry for each entry in clock-names. - See ../clocks/clock-bindings.txt for details. -- clock-names: Must include the following entries: - - gpu - - pwr -If the compatible string is "nvidia,gm20b", then the following clock -is also required: - - ref -If the compatible string is "nvidia,gv11b", then the following clock is also -required: - - fuse -- resets: Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names: Must include the following entries: - - gpu -- power-domains: GPUs that make use of power domains can define this property - instead of vdd-supply. Currently "nvidia,gp10b" makes use of this. - -Optional properties: -- iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details. - -Example for GK20A: - - gpu@57000000 { - compatible = "nvidia,gk20a"; - reg = <0x0 0x57000000 0x0 0x01000000>, - <0x0 0x58000000 0x0 0x01000000>; - interrupts = , - ; - interrupt-names = "stall", "nonstall"; - vdd-supply = <&vdd_gpu>; - clocks = <&tegra_car TEGRA124_CLK_GPU>, - <&tegra_car TEGRA124_CLK_PLL_P_OUT5>; - clock-names = "gpu", "pwr"; - resets = <&tegra_car 184>; - reset-names = "gpu"; - iommus = <&mc TEGRA_SWGROUP_GPU>; - }; - -Example for GM20B: - - gpu@57000000 { - compatible = "nvidia,gm20b"; - reg = <0x0 0x57000000 0x0 0x01000000>, - <0x0 0x58000000 0x0 0x01000000>; - interrupts = , - ; - interrupt-names = "stall", "nonstall"; - clocks = <&tegra_car TEGRA210_CLK_GPU>, - <&tegra_car TEGRA210_CLK_PLL_P_OUT5>, - <&tegra_car TEGRA210_CLK_PLL_G_REF>; - clock-names = "gpu", "pwr", "ref"; - resets = <&tegra_car 184>; - reset-names = "gpu"; - iommus = <&mc TEGRA_SWGROUP_GPU>; - }; - -Example for GP10B: - - gpu@17000000 { - compatible = "nvidia,gp10b"; - reg = <0x0 0x17000000 0x0 0x1000000>, - <0x0 0x18000000 0x0 0x1000000>; - interrupts = ; - interrupt-names = "stall", "nonstall"; - clocks = <&bpmp TEGRA186_CLK_GPCCLK>, - <&bpmp TEGRA186_CLK_GPU>; - clock-names = "gpu", "pwr"; - resets = <&bpmp TEGRA186_RESET_GPU>; - reset-names = "gpu"; - power-domains = <&bpmp TEGRA186_POWER_DOMAIN_GPU>; - iommus = <&smmu TEGRA186_SID_GPU>; - }; - -Example for GV11B: - - gpu@17000000 { - compatible = "nvidia,gv11b"; - reg = <0x17000000 0x1000000>, - <0x18000000 0x1000000>; - interrupts = , - ; - interrupt-names = "stall", "nonstall"; - clocks = <&bpmp TEGRA194_CLK_GPCCLK>, - <&bpmp TEGRA194_CLK_GPU_PWR>, - <&bpmp TEGRA194_CLK_FUSE>; - clock-names = "gpu", "pwr", "fuse"; - resets = <&bpmp TEGRA194_RESET_GPU>; - reset-names = "gpu"; - dma-coherent; - - power-domains = <&bpmp TEGRA194_POWER_DOMAIN_GPU>; - iommus = <&smmu TEGRA194_SID_GPU>; - }; diff --git a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.yaml b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.yaml new file mode 100644 index 000000000000..4d856a8b674c --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.yaml @@ -0,0 +1,171 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/nvidia,gk20a.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra Graphics Processing Units + +maintainers: + - Alexandre Courbot + - Jon Hunter + - Thierry Reding + +properties: + compatible: + enum: + - nvidia,gk20a + - nvidia,gm20b + - nvidia,gp10b + - nvidia,gv11b + + reg: + items: + - description: Bar0 register window + - description: Bar1 register window + + interrupts: + items: + - description: Stall interrupt + - description: Nonstall interrupt + + interrupt-names: + items: + - const: stall + - const: nonstall + + vdd-supply: + description: + Regulator for GPU supply voltage + + clocks: + minItems: 2 + items: + - description: GPU clock + - description: Power clock + - description: Reference or fuse clock + + clock-names: + minItems: 2 + items: + - const: gpu + - const: pwr + - enum: [ ref, fuse ] + + resets: + maxItems: 1 + + reset-names: + items: + - const: gpu + + power-domains: + maxItems: 1 + + interconnects: + minItems: 4 + maxItems: 12 + + interconnect-names: + minItems: 4 + maxItems: 12 + + iommus: + maxItems: 1 + + dma-coherent: true + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - resets + - reset-names + +allOf: + - if: + properties: + compatible: + contains: + enum: + - nvidia,gp10b + - nvidia,gv11b + then: + required: + - power-domains + else: + properties: + interconnects: false + interconnect-names: false + + required: + - vdd-supply + - if: + properties: + compatible: + contains: + enum: + - nvidia,gp10b + then: + properties: + interconnects: + maxItems: 4 + + interconnect-names: + items: + - const: dma-mem + - const: write-0 + - const: read-1 + - const: write-1 + - if: + properties: + compatible: + contains: + enum: + - nvidia,gv11b + then: + properties: + interconnects: + minItems: 12 + + interconnect-names: + items: + - const: dma-mem + - const: read-0-hp + - const: write-0 + - const: read-1 + - const: read-1-hp + - const: write-1 + - const: read-2 + - const: read-2-hp + - const: write-2 + - const: read-3 + - const: read-3-hp + - const: write-3 + +additionalProperties: false + +examples: + - | + #include + #include + #include + + gpu@57000000 { + compatible = "nvidia,gk20a"; + reg = <0x57000000 0x01000000>, + <0x58000000 0x01000000>; + interrupts = , + ; + interrupt-names = "stall", "nonstall"; + vdd-supply = <&vdd_gpu>; + clocks = <&tegra_car TEGRA124_CLK_GPU>, + <&tegra_car TEGRA124_CLK_PLL_P_OUT5>; + clock-names = "gpu", "pwr"; + resets = <&tegra_car 184>; + reset-names = "gpu"; + iommus = <&mc TEGRA_SWGROUP_GPU>; + }; -- cgit v1.2.3 From 0e41b0af4743761a5994b9a538146ea2adea72e6 Mon Sep 17 00:00:00 2001 From: Christophe Leroy Date: Wed, 24 Sep 2025 17:06:47 +0200 Subject: net: wan: framer: Add version sysfs attribute for the Lantiq PEF2256 framer Lantiq PEF2256 framer has some little differences in behaviour depending on its version. Add a sysfs attribute to allow user applications to know the version. Signed-off-by: Christophe Leroy Link: https://patch.msgid.link/77a27941d6924b1009df0162ed9f0fa07ed6e431.1758726302.git.christophe.leroy@csgroup.eu Signed-off-by: Jakub Kicinski --- Documentation/ABI/testing/sysfs-driver-framer-pef2256 | 8 ++++++++ 1 file changed, 8 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-framer-pef2256 (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-driver-framer-pef2256 b/Documentation/ABI/testing/sysfs-driver-framer-pef2256 new file mode 100644 index 000000000000..29f97783bf07 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-driver-framer-pef2256 @@ -0,0 +1,8 @@ +What: /sys/bus/platform/devices/xxx/version +Date: Sep 2025 +Contact: netdev@vger.kernel.org +Description: Reports the version of the PEF2256 framer + + Access: Read + + Valid values: Represented as string -- cgit v1.2.3 From 8d5868f8c1b27e99b35d200b5ed2dfe12586e936 Mon Sep 17 00:00:00 2001 From: Jonas Rebmann Date: Wed, 24 Sep 2025 10:34:12 +0200 Subject: dt-bindings: net: dsa: nxp,sja1105: Add reset-gpios property Both the nxp,sja1105 and the nxp,sja1110 series feature an active-low reset pin, rendering reset-gpios a valid property for all of the nxp,sja1105 family. Acked-by: Vladimir Oltean Reviewed-by: Rob Herring (Arm) Reviewed-by: Frank Li Signed-off-by: Jonas Rebmann Link: https://patch.msgid.link/20250924-imx8mp-prt8ml-v3-1-f498d7f71a94@pengutronix.de Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml b/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml index 9432565f4f5d..e9dd914b0734 100644 --- a/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml +++ b/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml @@ -32,6 +32,15 @@ properties: reg: maxItems: 1 + reset-gpios: + description: + A GPIO connected to the active-low RST_N pin of the SJA1105. Note that + reset of this chip is performed via SPI and the RST_N pin must be wired + to satisfy the power-up sequence documented in "SJA1105PQRS Application + Hints" (AH1704) sec. 2.4.4. Connecting the SJA1105 RST_N pin to a GPIO is + therefore discouraged. + maxItems: 1 + spi-cpha: true spi-cpol: true -- cgit v1.2.3 From 84a27b5a4cedd0b19381e27e8026614ddf3e900f Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Wed, 24 Sep 2025 09:06:23 +0700 Subject: net: dns_resolver: Use reST bullet list for features list Features overview list uses an asterisk in parentheses (``(*)``) as bullet list marker, which isn't supported by Sphinx as proper bullet. Replace it with just asterisk. Reviewed-by: Simon Horman Signed-off-by: Bagas Sanjaya Link: https://patch.msgid.link/20250924020626.17073-2-bagasdotme@gmail.com Signed-off-by: Jakub Kicinski --- Documentation/networking/dns_resolver.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/dns_resolver.rst b/Documentation/networking/dns_resolver.rst index c0364f7070af..5cec37bedf99 100644 --- a/Documentation/networking/dns_resolver.rst +++ b/Documentation/networking/dns_resolver.rst @@ -25,11 +25,11 @@ These routines must be supported by userspace tools dns.upcall, cifs.upcall and request-key. It is under development and does not yet provide the full feature set. The features it does support include: - (*) Implements the dns_resolver key_type to contact userspace. + * Implements the dns_resolver key_type to contact userspace. It does not yet support the following AFS features: - (*) Dns query support for AFSDB resource record. + * DNS query support for AFSDB resource record. This code is extracted from the CIFS filesystem. -- cgit v1.2.3 From 1b1fe672337bb7549f637853c1c9536872d3d19c Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Wed, 24 Sep 2025 09:06:24 +0700 Subject: net: dns_resolver: Move dns_query() explanation out of code block Documentation for dns_query() is placed in the function's literal code block snippet instead. Move it out of there. Signed-off-by: Bagas Sanjaya Reviewed-by: Simon Horman Link: https://patch.msgid.link/20250924020626.17073-3-bagasdotme@gmail.com Signed-off-by: Jakub Kicinski --- Documentation/networking/dns_resolver.rst | 44 +++++++++++++++---------------- 1 file changed, 21 insertions(+), 23 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/dns_resolver.rst b/Documentation/networking/dns_resolver.rst index 5cec37bedf99..fbbd2c4635cb 100644 --- a/Documentation/networking/dns_resolver.rst +++ b/Documentation/networking/dns_resolver.rst @@ -64,44 +64,42 @@ before the more general line given above as the first match is the one taken:: Usage ===== -To make use of this facility, one of the following functions that are -implemented in the module can be called after doing:: +To make use of this facility, first ``dns_resolver.h`` must be included:: #include - :: +Then queries may be made by calling:: int dns_query(const char *type, const char *name, size_t namelen, const char *options, char **_result, time_t *_expiry); - This is the basic access function. It looks for a cached DNS query and if - it doesn't find it, it upcalls to userspace to make a new DNS query, which - may then be cached. The key description is constructed as a string of the - form:: +This is the basic access function. It looks for a cached DNS query and if +it doesn't find it, it upcalls to userspace to make a new DNS query, which +may then be cached. The key description is constructed as a string of the +form:: [:] - where optionally specifies the particular upcall program to invoke, - and thus the type of query to do, and specifies the string to be - looked up. The default query type is a straight hostname to IP address - set lookup. +where optionally specifies the particular upcall program to invoke, +and thus the type of query, and specifies the string to be looked up. +The default query type is a straight hostname to IP address set lookup. - The name parameter is not required to be a NUL-terminated string, and its - length should be given by the namelen argument. +The name parameter is not required to be a NUL-terminated string, and its +length should be given by the namelen argument. - The options parameter may be NULL or it may be a set of options - appropriate to the query type. +The options parameter may be NULL or it may be a set of options +appropriate to the query type. - The return value is a string appropriate to the query type. For instance, - for the default query type it is just a list of comma-separated IPv4 and - IPv6 addresses. The caller must free the result. +The return value is a string appropriate to the query type. For instance, +for the default query type it is just a list of comma-separated IPv4 and +IPv6 addresses. The caller must free the result. - The length of the result string is returned on success, and a negative - error code is returned otherwise. -EKEYREJECTED will be returned if the - DNS lookup failed. +The length of the result string is returned on success, and a negative +error code is returned otherwise. -EKEYREJECTED will be returned if the +DNS lookup failed. - If _expiry is non-NULL, the expiry time (TTL) of the result will be - returned also. +If _expiry is non-NULL, the expiry time (TTL) of the result will be +returned also. The kernel maintains an internal keyring in which it caches looked up keys. This can be cleared by any process that has the CAP_SYS_ADMIN capability by -- cgit v1.2.3 From ffa8f0791955dec12af2a09a1655a41e3fff783a Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Wed, 24 Sep 2025 09:06:25 +0700 Subject: net: dns_resolver: Fix request-key cross-reference Link to "Key Request Service" docs uses file:// scheme instead due to angled brackets markup. Fix it to proper cross-reference. Reviewed-by: Simon Horman Signed-off-by: Bagas Sanjaya Link: https://patch.msgid.link/20250924020626.17073-4-bagasdotme@gmail.com Signed-off-by: Jakub Kicinski --- Documentation/networking/dns_resolver.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/dns_resolver.rst b/Documentation/networking/dns_resolver.rst index fbbd2c4635cb..52f298834db6 100644 --- a/Documentation/networking/dns_resolver.rst +++ b/Documentation/networking/dns_resolver.rst @@ -140,8 +140,8 @@ the key will be discarded and recreated when the data it holds has expired. dns_query() returns a copy of the value attached to the key, or an error if that is indicated instead. -See for further -information about request-key function. +See Documentation/security/keys/request-key.rst for further information about +request-key function. Debugging -- cgit v1.2.3 From cc2f08129925b437bf28f7f7822f20dac083a87c Mon Sep 17 00:00:00 2001 From: Vadim Fedorenko Date: Wed, 24 Sep 2025 12:40:33 +0000 Subject: ethtool: add FEC bins histogram report IEEE 802.3ck-2022 defines counters for FEC bins and 802.3df-2024 clarifies it a bit further. Implement reporting interface through as addition to FEC stats available in ethtool. Drivers can leave bin counter uninitialized if per-lane values are provided. In this case the core will recalculate summ for the bin. Signed-off-by: Vadim Fedorenko Reviewed-by: Aleksandr Loktionov Link: https://patch.msgid.link/20250924124037.1508846-2-vadim.fedorenko@linux.dev Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/ethtool.yaml | 29 ++++++++++++++++++++++++++++ Documentation/networking/ethtool-netlink.rst | 5 +++++ 2 files changed, 34 insertions(+) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netlink/specs/ethtool.yaml index 7a7594713f1f..6a0fb1974513 100644 --- a/Documentation/netlink/specs/ethtool.yaml +++ b/Documentation/netlink/specs/ethtool.yaml @@ -1219,6 +1219,30 @@ attribute-sets: name: udp-ports type: nest nested-attributes: tunnel-udp + - + name: fec-hist + attr-cnt-name: --ethtool-a-fec-hist-cnt + attributes: + - + name: pad + type: pad + - + name: bin-low + type: u32 + doc: Low bound of FEC bin (inclusive) + - + name: bin-high + type: u32 + doc: High bound of FEC bin (inclusive) + - + name: bin-val + type: uint + doc: Error count in the bin (optional if per-lane values exist) + - + name: bin-val-per-lane + type: binary + sub-type: u64 + doc: An array of per-lane error counters in the bin (optional) - name: fec-stat attr-cnt-name: __ethtool-a-fec-stat-cnt @@ -1242,6 +1266,11 @@ attribute-sets: name: corr-bits type: binary sub-type: u64 + - + name: hist + type: nest + multi-attr: True + nested-attributes: fec-hist - name: fec attr-cnt-name: __ethtool-a-fec-cnt diff --git a/Documentation/networking/ethtool-netlink.rst b/Documentation/networking/ethtool-netlink.rst index ab20c644af24..b270886c5f5d 100644 --- a/Documentation/networking/ethtool-netlink.rst +++ b/Documentation/networking/ethtool-netlink.rst @@ -1541,6 +1541,11 @@ Drivers fill in the statistics in the following structure: .. kernel-doc:: include/linux/ethtool.h :identifiers: ethtool_fec_stats +Statistics may have FEC bins histogram attribute ``ETHTOOL_A_FEC_STAT_HIST`` +as defined in IEEE 802.3ck-2022 and 802.3df-2024. Nested attributes will have +the range of FEC errors in the bin (inclusive) and the amount of error events +in the bin. + FEC_SET ======= -- cgit v1.2.3 From 9665aa15ef8bdf1fa596f9ff8162e9c5e00ac036 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Tue, 23 Sep 2025 18:00:23 +0200 Subject: dt-bindings: net: cdns,macb: allow tsu_clk without tx_clk MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Allow providing tsu_clk without a tx_clk as both are optional. This is about relaxing unneeded constraints. It so happened that in the past HW that needed a tsu_clk always needed a tx_clk. Fixes: 4e5b6de1f46d ("dt-bindings: net: cdns,macb: Convert to json-schema") Reviewed-by: Krzysztof Kozlowski Acked-by: Nicolas Ferre Signed-off-by: Théo Lebrun Link: https://patch.msgid.link/20250923-macb-fixes-v6-1-772d655cdeb6@bootlin.com Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/cdns,macb.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml index 559d0f733e7e..6e20d67e7628 100644 --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml @@ -85,7 +85,7 @@ properties: items: - enum: [ ether_clk, hclk, pclk ] - enum: [ hclk, pclk ] - - const: tx_clk + - enum: [ tx_clk, tsu_clk ] - enum: [ rx_clk, tsu_clk ] - const: tsu_clk -- cgit v1.2.3 From 05b7e10687c69e0c28e62b9a74ce78b3e7463806 Mon Sep 17 00:00:00 2001 From: Crystal Wood Date: Sat, 6 Sep 2025 21:23:25 -0500 Subject: tools/rtla: Add remaining support for osnoise actions The basic functionality came with the consolidation; now hook up the command line options, and add documentation and tests. Cc: John Kacur Cc: Costa Shulyupin Link: https://lore.kernel.org/20250907022325.243930-8-crwood@redhat.com Reviewed-by: Tomas Glozar Signed-off-by: Crystal Wood Signed-off-by: Steven Rostedt (Google) --- Documentation/tools/rtla/common_options.rst | 61 ++++++++++++++++++ .../tools/rtla/common_osnoise_options.rst | 8 +++ .../tools/rtla/common_timerlat_options.rst | 74 +++------------------- Documentation/tools/rtla/rtla-hwnoise.rst | 2 + Documentation/tools/rtla/rtla-osnoise-hist.rst | 2 + Documentation/tools/rtla/rtla-osnoise-top.rst | 2 + Documentation/tools/rtla/rtla-timerlat-hist.rst | 2 + Documentation/tools/rtla/rtla-timerlat-top.rst | 2 + 8 files changed, 89 insertions(+), 64 deletions(-) (limited to 'Documentation') diff --git a/Documentation/tools/rtla/common_options.rst b/Documentation/tools/rtla/common_options.rst index 2dc1575210aa..77ef35d3f831 100644 --- a/Documentation/tools/rtla/common_options.rst +++ b/Documentation/tools/rtla/common_options.rst @@ -53,6 +53,67 @@ **--trace-buffer-size** *kB* Set the per-cpu trace buffer size in kB for the tracing output. +**--on-threshold** *action* + + Defines an action to be executed when tracing is stopped on a latency threshold + specified by |threshold|. + + Multiple --on-threshold actions may be specified, and they will be executed in + the order they are provided. If any action fails, subsequent actions in the list + will not be executed. + + Supported actions are: + + - *trace[,file=]* + + Saves trace output, optionally taking a filename. Alternative to -t/--trace. + Note that nlike -t/--trace, specifying this multiple times will result in + the trace being saved multiple times. + + - *signal,num=,pid=* + + Sends signal to process. "parent" might be specified in place of pid to target + the parent process of rtla. + + - *shell,command=* + + Execute shell command. + + - *continue* + + Continue tracing after actions are executed instead of stopping. + + Example: + + $ rtla |tool| |thresharg| 20 --on-threshold trace + --on-threshold shell,command="grep ipi_send |tracer|\_trace.txt" + --on-threshold signal,num=2,pid=parent + + This will save a trace with the default filename "|tracer|\_trace.txt", print its + lines that contain the text "ipi_send" on standard output, and send signal 2 + (SIGINT) to the parent process. + + Performance Considerations: + + |actionsperf| + +**--on-end** *action* + + Defines an action to be executed at the end of tracing. + + Multiple --on-end actions can be specified, and they will be executed in the order + they are provided. If any action fails, subsequent actions in the list will not be + executed. + + See the documentation for **--on-threshold** for the list of supported actions, with + the exception that *continue* has no effect. + + Example: + + $ rtla |tool| -d 5s --on-end trace + + This runs rtla with the default options, and saves trace output at the end. + **-h**, **--help** Print help menu. diff --git a/Documentation/tools/rtla/common_osnoise_options.rst b/Documentation/tools/rtla/common_osnoise_options.rst index d73de2d58f5f..bd3c4f499193 100644 --- a/Documentation/tools/rtla/common_osnoise_options.rst +++ b/Documentation/tools/rtla/common_osnoise_options.rst @@ -1,3 +1,11 @@ +.. |threshold| replace:: **-a/--auto**, **-s/--stop**, or **-S/--stop-total** +.. |thresharg| replace:: -s +.. |tracer| replace:: osnoise + +.. |actionsperf| replace:: + Due to implementational limitations, actions might be delayed + up to one second after tracing is stopped. + **-a**, **--auto** *us* Set the automatic trace mode. This mode sets some commonly used options diff --git a/Documentation/tools/rtla/common_timerlat_options.rst b/Documentation/tools/rtla/common_timerlat_options.rst index 7854368f1827..1f5d024b53aa 100644 --- a/Documentation/tools/rtla/common_timerlat_options.rst +++ b/Documentation/tools/rtla/common_timerlat_options.rst @@ -1,3 +1,13 @@ +.. |threshold| replace:: **-a/--auto**, **-i/--irq**, or **-T/--thread** +.. |thresharg| replace:: -T +.. |tracer| replace:: timerlat + +.. |actionsperf| replace:: + For time-sensitive actions, it is recommended to run **rtla timerlat** with BPF + support and RT priority. Note that due to implementational limitations, actions + might be delayed up to one second after tracing is stopped if BPF mode is not + available or disabled. + **-a**, **--auto** *us* Set the automatic trace mode. This mode sets some commonly used options @@ -55,67 +65,3 @@ Set timerlat to run without workload, waiting for the user to dispatch a per-cpu task that waits for a new period on the tracing/osnoise/per_cpu/cpu$ID/timerlat_fd. See linux/tools/rtla/sample/timerlat_load.py for an example of user-load code. - -**--on-threshold** *action* - - Defines an action to be executed when tracing is stopped on a latency threshold - specified by **-i/--irq** or **-T/--thread**. - - Multiple --on-threshold actions may be specified, and they will be executed in - the order they are provided. If any action fails, subsequent actions in the list - will not be executed. - - Supported actions are: - - - *trace[,file=]* - - Saves trace output, optionally taking a filename. Alternative to -t/--trace. - Note that nlike -t/--trace, specifying this multiple times will result in - the trace being saved multiple times. - - - *signal,num=,pid=* - - Sends signal to process. "parent" might be specified in place of pid to target - the parent process of rtla. - - - *shell,command=* - - Execute shell command. - - - *continue* - - Continue tracing after actions are executed instead of stopping. - - Example: - - $ rtla timerlat -T 20 --on-threshold trace - --on-threshold shell,command="grep ipi_send timerlat_trace.txt" - --on-threshold signal,num=2,pid=parent - - This will save a trace with the default filename "timerlat_trace.txt", print its - lines that contain the text "ipi_send" on standard output, and send signal 2 - (SIGINT) to the parent process. - - Performance Considerations: - - For time-sensitive actions, it is recommended to run **rtla timerlat** with BPF - support and RT priority. Note that due to implementational limitations, actions - might be delayed up to one second after tracing is stopped if BPF mode is not - available or disabled. - -**--on-end** *action* - - Defines an action to be executed at the end of **rtla timerlat** tracing. - - Multiple --on-end actions can be specified, and they will be executed in the order - they are provided. If any action fails, subsequent actions in the list will not be - executed. - - See the documentation for **--on-threshold** for the list of supported actions, with - the exception that *continue* has no effect. - - Example: - - $ rtla timerlat -d 5s --on-end trace - - This runs rtla timerlat with default options and save trace output at the end. diff --git a/Documentation/tools/rtla/rtla-hwnoise.rst b/Documentation/tools/rtla/rtla-hwnoise.rst index fb1c52bbc00b..3a7163c02ac8 100644 --- a/Documentation/tools/rtla/rtla-hwnoise.rst +++ b/Documentation/tools/rtla/rtla-hwnoise.rst @@ -1,5 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0 +.. |tool| replace:: hwnoise + ============ rtla-hwnoise ============ diff --git a/Documentation/tools/rtla/rtla-osnoise-hist.rst b/Documentation/tools/rtla/rtla-osnoise-hist.rst index f2e79d22c4c4..1fc60ef26106 100644 --- a/Documentation/tools/rtla/rtla-osnoise-hist.rst +++ b/Documentation/tools/rtla/rtla-osnoise-hist.rst @@ -1,3 +1,5 @@ +.. |tool| replace:: osnoise hist + =================== rtla-osnoise-hist =================== diff --git a/Documentation/tools/rtla/rtla-osnoise-top.rst b/Documentation/tools/rtla/rtla-osnoise-top.rst index 5d75d1394516..b1cbd7bcd4ae 100644 --- a/Documentation/tools/rtla/rtla-osnoise-top.rst +++ b/Documentation/tools/rtla/rtla-osnoise-top.rst @@ -1,3 +1,5 @@ +.. |tool| replace:: osnoise top + =================== rtla-osnoise-top =================== diff --git a/Documentation/tools/rtla/rtla-timerlat-hist.rst b/Documentation/tools/rtla/rtla-timerlat-hist.rst index b2d8726271b3..4923a362129b 100644 --- a/Documentation/tools/rtla/rtla-timerlat-hist.rst +++ b/Documentation/tools/rtla/rtla-timerlat-hist.rst @@ -1,3 +1,5 @@ +.. |tool| replace:: timerlat hist + ===================== rtla-timerlat-hist ===================== diff --git a/Documentation/tools/rtla/rtla-timerlat-top.rst b/Documentation/tools/rtla/rtla-timerlat-top.rst index ab6cb60c9083..50968cdd2095 100644 --- a/Documentation/tools/rtla/rtla-timerlat-top.rst +++ b/Documentation/tools/rtla/rtla-timerlat-top.rst @@ -1,3 +1,5 @@ +.. |tool| replace:: timerlat top + ==================== rtla-timerlat-top ==================== -- cgit v1.2.3 From e835faaed2f80ee8652f59a54703edceab04f0d9 Mon Sep 17 00:00:00 2001 From: Akiva Goldberger Date: Thu, 25 Sep 2025 13:45:30 +0300 Subject: net/mlx5: Expose uar access and odp page fault counters Add three counters to vnic health reporter: bar_uar_access, odp_local_triggered_page_fault, and odp_remote_triggered_page_fault. - bar_uar_access number of WRITE or READ access operations to the UAR on the PCIe BAR. - odp_local_triggered_page_fault number of locally-triggered page-faults due to ODP. - odp_remote_triggered_page_fault number of remotly-triggered page-faults due to ODP. Example access: $ devlink health diagnose pci/0000:08:00.0 reporter vnic vNIC env counters: total_error_queues: 0 send_queue_priority_update_flow: 0 comp_eq_overrun: 0 async_eq_overrun: 0 cq_overrun: 0 invalid_command: 0 quota_exceeded_command: 0 nic_receive_steering_discard: 0 icm_consumption: 1032 bar_uar_access: 1279 odp_local_triggered_page_fault: 20 odp_remote_triggered_page_fault: 34 Signed-off-by: Akiva Goldberger Reviewed-by: Moshe Shemesh Signed-off-by: Tariq Toukan Reviewed-by: Simon Horman Link: https://patch.msgid.link/1758797130-829564-1-git-send-email-tariqt@nvidia.com Signed-off-by: Jakub Kicinski --- Documentation/networking/devlink/mlx5.rst | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/devlink/mlx5.rst b/Documentation/networking/devlink/mlx5.rst index 41c9b716699e..0e5f9c76e514 100644 --- a/Documentation/networking/devlink/mlx5.rst +++ b/Documentation/networking/devlink/mlx5.rst @@ -385,6 +385,12 @@ Description of the vnic counters: amount of Interconnect Host Memory (ICM) consumed by the vnic in granularity of 4KB. ICM is host memory allocated by SW upon HCA request and is used for storing data structures that control HCA operation. +- bar_uar_access + number of WRITE or READ access operations to the UAR on the PCIe BAR. +- odp_local_triggered_page_fault + number of locally-triggered page-faults due to ODP. +- odp_remote_triggered_page_fault + number of remotly-triggered page-faults due to ODP. User commands examples: -- cgit v1.2.3 From ec67ef0a501d7dc915d84c0ada4ab3697adfa1d9 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 11 Jun 2025 13:08:00 +0200 Subject: dt-bindings: i2c: i2c-mt65xx: Add MediaTek MT8196/6991 compatibles Add support for the MediaTek MT8196 Chromebook SoC and for its close relative, the MediaTek Dimensity 9400 MT6991 SoC. Those chips' multiple I2C controller instances are compatible with the ones found in the MT8188 SoC. Signed-off-by: AngeloGioacchino Del Regno Acked-by: Conor Dooley [wsa: rebased] Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml index bd6811cbde70..3562ce0c0f7e 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml @@ -53,6 +53,8 @@ properties: - items: - enum: - mediatek,mt6878-i2c + - mediatek,mt6991-i2c + - mediatek,mt8196-i2c - const: mediatek,mt8188-i2c - items: - enum: -- cgit v1.2.3 From cb3005d4c490fe2489accd5408592683d705b455 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Fri, 8 Aug 2025 16:09:56 +0300 Subject: i2c: i801: Add support for Intel Wildcat Lake-U Add SMBus IDs on Intel Wildcat Lake-U. Signed-off-by: Jarkko Nikula Signed-off-by: Wolfram Sang --- Documentation/i2c/busses/i2c-i801.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/i2c/busses/i2c-i801.rst b/Documentation/i2c/busses/i2c-i801.rst index 47e8ac5b7099..36c563ad3f06 100644 --- a/Documentation/i2c/busses/i2c-i801.rst +++ b/Documentation/i2c/busses/i2c-i801.rst @@ -50,6 +50,7 @@ Supported adapters: * Intel Birch Stream (SOC) * Intel Arrow Lake (SOC) * Intel Panther Lake (SOC) + * Intel Wildcat Lake (SOC) Datasheets: Publicly available at the Intel website -- cgit v1.2.3 From 298ced6c3b3c116987554364998e9d8cb94e0126 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Sat, 20 Sep 2025 07:16:51 +0700 Subject: crypto: doc - Add explicit title heading to API docs Documentation for crypto programming interfaces lack explicit title. As such, all its sections become entries in the toctree index. Add the title heading to tidy up toctree. Signed-off-by: Bagas Sanjaya Reviewed-by: Randy Dunlap Tested-by: Randy Dunlap Signed-off-by: Herbert Xu --- Documentation/crypto/api-aead.rst | 3 +++ Documentation/crypto/api-akcipher.rst | 3 +++ Documentation/crypto/api-digest.rst | 3 +++ Documentation/crypto/api-kpp.rst | 3 +++ Documentation/crypto/api-rng.rst | 3 +++ Documentation/crypto/api-sig.rst | 3 +++ Documentation/crypto/api-skcipher.rst | 3 +++ 7 files changed, 21 insertions(+) (limited to 'Documentation') diff --git a/Documentation/crypto/api-aead.rst b/Documentation/crypto/api-aead.rst index d15256f1ae36..78d073319f96 100644 --- a/Documentation/crypto/api-aead.rst +++ b/Documentation/crypto/api-aead.rst @@ -1,3 +1,6 @@ +Authenticated Encryption With Associated Data (AEAD) +==================================================== + Authenticated Encryption With Associated Data (AEAD) Algorithm Definitions -------------------------------------------------------------------------- diff --git a/Documentation/crypto/api-akcipher.rst b/Documentation/crypto/api-akcipher.rst index ca1ecdd4a7d3..a31f5aef7667 100644 --- a/Documentation/crypto/api-akcipher.rst +++ b/Documentation/crypto/api-akcipher.rst @@ -1,3 +1,6 @@ +Asymmetric Cipher +================= + Asymmetric Cipher Algorithm Definitions --------------------------------------- diff --git a/Documentation/crypto/api-digest.rst b/Documentation/crypto/api-digest.rst index 7a1e670d6ce1..02a2bcc26a64 100644 --- a/Documentation/crypto/api-digest.rst +++ b/Documentation/crypto/api-digest.rst @@ -1,3 +1,6 @@ +Message Digest +============== + Message Digest Algorithm Definitions ------------------------------------ diff --git a/Documentation/crypto/api-kpp.rst b/Documentation/crypto/api-kpp.rst index 7d86ab906bdf..5794e2d10c95 100644 --- a/Documentation/crypto/api-kpp.rst +++ b/Documentation/crypto/api-kpp.rst @@ -1,3 +1,6 @@ +Key-agreement Protocol Primitives (KPP) +======================================= + Key-agreement Protocol Primitives (KPP) Cipher Algorithm Definitions -------------------------------------------------------------------- diff --git a/Documentation/crypto/api-rng.rst b/Documentation/crypto/api-rng.rst index 10ba7436cee4..23a94c0b272e 100644 --- a/Documentation/crypto/api-rng.rst +++ b/Documentation/crypto/api-rng.rst @@ -1,3 +1,6 @@ +Random Number Generator (RNG) +============================= + Random Number Algorithm Definitions ----------------------------------- diff --git a/Documentation/crypto/api-sig.rst b/Documentation/crypto/api-sig.rst index aaec18e26d54..4d8aba8aee8e 100644 --- a/Documentation/crypto/api-sig.rst +++ b/Documentation/crypto/api-sig.rst @@ -1,3 +1,6 @@ +Asymmetric Signature +==================== + Asymmetric Signature Algorithm Definitions ------------------------------------------ diff --git a/Documentation/crypto/api-skcipher.rst b/Documentation/crypto/api-skcipher.rst index 04d6cc5357c8..4b7c8160790a 100644 --- a/Documentation/crypto/api-skcipher.rst +++ b/Documentation/crypto/api-skcipher.rst @@ -1,3 +1,6 @@ +Symmetric Key Cipher +==================== + Block Cipher Algorithm Definitions ---------------------------------- -- cgit v1.2.3 From 166c83f7789ed02dc1f25bc7bed4a1beb25343aa Mon Sep 17 00:00:00 2001 From: Kael D'Alcamo Date: Sun, 21 Sep 2025 18:11:34 +0200 Subject: dt-bindings: rng: hisi-rng: convert to DT schema Convert the Devicetree binding documentation for hisilicon,hip04-rng and hisilicon,hip05-rng from plain text to YAML. Signed-off-by: Kael D'Alcamo Reviewed-by: Rob Herring (Arm) Signed-off-by: Herbert Xu --- Documentation/devicetree/bindings/rng/hisi-rng.txt | 12 -------- .../devicetree/bindings/rng/hisi-rng.yaml | 32 ++++++++++++++++++++++ 2 files changed, 32 insertions(+), 12 deletions(-) delete mode 100644 Documentation/devicetree/bindings/rng/hisi-rng.txt create mode 100644 Documentation/devicetree/bindings/rng/hisi-rng.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/rng/hisi-rng.txt b/Documentation/devicetree/bindings/rng/hisi-rng.txt deleted file mode 100644 index d04d55a6c2f5..000000000000 --- a/Documentation/devicetree/bindings/rng/hisi-rng.txt +++ /dev/null @@ -1,12 +0,0 @@ -Hisilicon Random Number Generator - -Required properties: -- compatible : Should be "hisilicon,hip04-rng" or "hisilicon,hip05-rng" -- reg : Offset and length of the register set of this block - -Example: - -rng@d1010000 { - compatible = "hisilicon,hip05-rng"; - reg = <0xd1010000 0x100>; -}; diff --git a/Documentation/devicetree/bindings/rng/hisi-rng.yaml b/Documentation/devicetree/bindings/rng/hisi-rng.yaml new file mode 100644 index 000000000000..5406b2596f42 --- /dev/null +++ b/Documentation/devicetree/bindings/rng/hisi-rng.yaml @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/hisi-rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon Random Number Generator + +maintainers: + - Kefeng Wang + +properties: + compatible: + enum: + - hisilicon,hip04-rng + - hisilicon,hip05-rng + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + rng@d1010000 { + compatible = "hisilicon,hip05-rng"; + reg = <0xd1010000 0x100>; + }; -- cgit v1.2.3 From 9fbad55d6f9db98ab9f1d48ac5e5f8f72fbac0cc Mon Sep 17 00:00:00 2001 From: Griffin Kroah-Hartman Date: Sat, 27 Sep 2025 21:11:55 -0700 Subject: dt-bindings: input: Add Awinic AW86927 Add bindings for the Awinic AW86927 haptic chip which can be found in smartphones. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Griffin Kroah-Hartman Link: https://lore.kernel.org/r/20250925-aw86927-v3-1-1fc6265b42de@fairphone.com Signed-off-by: Dmitry Torokhov --- .../devicetree/bindings/input/awinic,aw86927.yaml | 48 ++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/input/awinic,aw86927.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/input/awinic,aw86927.yaml b/Documentation/devicetree/bindings/input/awinic,aw86927.yaml new file mode 100644 index 000000000000..b7252916bd72 --- /dev/null +++ b/Documentation/devicetree/bindings/input/awinic,aw86927.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/awinic,aw86927.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Awinic AW86927 LRA Haptic IC + +maintainers: + - Griffin Kroah-Hartman + +properties: + compatible: + const: awinic,aw86927 + + reg: + maxItems: 1 + + reset-gpios: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - reset-gpios + - interrupts + +additionalProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + vibrator@5a { + compatible = "awinic,aw86927"; + reg = <0x5a>; + interrupts-extended = <&tlmm 101 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&tlmm 100 GPIO_ACTIVE_LOW>; + }; + }; -- cgit v1.2.3 From a767d3583d4e800d6a2d0378d7e57513bb4d4bba Mon Sep 17 00:00:00 2001 From: Cryolitia PukNgae Date: Sun, 28 Sep 2025 11:08:02 +0800 Subject: ALSA: doc: improved docs about quirk_flags in snd-usb-audio Just briefly described about the option's change and its new usage. Signed-off-by: Cryolitia PukNgae Signed-off-by: Takashi Iwai --- Documentation/sound/alsa-configuration.rst | 108 ++++++++++++++++++++--------- 1 file changed, 75 insertions(+), 33 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sound/alsa-configuration.rst b/Documentation/sound/alsa-configuration.rst index a2fb8ed251dd..0a4eaa7d66dd 100644 --- a/Documentation/sound/alsa-configuration.rst +++ b/Documentation/sound/alsa-configuration.rst @@ -2297,39 +2297,81 @@ skip_validation of the unit descriptor instead of a driver probe error, so that we can check its details. quirk_flags - Contains the bit flags for various device specific workarounds. - Applied to the corresponding card index. - - * bit 0: Skip reading sample rate for devices - * bit 1: Create Media Controller API entries - * bit 2: Allow alignment on audio sub-slot at transfer - * bit 3: Add length specifier to transfers - * bit 4: Start playback stream at first in implement feedback mode - * bit 5: Skip clock selector setup - * bit 6: Ignore errors from clock source search - * bit 7: Indicates ITF-USB DSD based DACs - * bit 8: Add a delay of 20ms at each control message handling - * bit 9: Add a delay of 1-2ms at each control message handling - * bit 10: Add a delay of 5-6ms at each control message handling - * bit 11: Add a delay of 50ms at each interface setup - * bit 12: Perform sample rate validations at probe - * bit 13: Disable runtime PM autosuspend - * bit 14: Ignore errors for mixer access - * bit 15: Support generic DSD raw U32_BE format - * bit 16: Set up the interface at first like UAC1 - * bit 17: Apply the generic implicit feedback sync mode - * bit 18: Don't apply implicit feedback sync mode - * bit 19: Don't closed interface during setting sample rate - * bit 20: Force an interface reset whenever stopping & restarting - a stream - * bit 21: Do not set PCM rate (frequency) when only one rate is - available for the given endpoint. - * bit 22: Set the fixed resolution 16 for Mic Capture Volume - * bit 23: Set the fixed resolution 384 for Mic Capture Volume - * bit 24: Set minimum volume control value as mute for devices - where the lowest playback value represents muted state instead - of minimum audible volume - * bit 25: Be similar to bit 24 but for capture streams + The option provides a refined and flexible control for applying quirk + flags. It allows to specify the quirk flags for each device, and can + be modified dynamically via sysfs. + The old usage accepts an array of integers, each of which applies quirk + flags on the device in the order of probing. + E.g., ``quirk_flags=0x01,0x02`` applies get_sample_rate to the first + device, and share_media_device to the second device. + The new usage accepts a string in the format of + ``VID1:PID1:FLAGS1;VID2:PID2:FLAGS2;...``, where ``VIDx`` and ``PIDx`` + specify the device, and ``FLAGSx`` specify the flags to be applied. + ``VIDx`` and ``PIDx`` are 4-digit hexadecimal numbers, and can be + specified as ``*`` to match any value. ``FLAGSx`` can be a set of + flags given by name, separated by ``|``, or a hexadecimal number + representing the bit flags. The available flag names are listed below. + An exclamation mark can be prefixed to a flag name to negate the flag. + For example, ``1234:abcd:mixer_playback_min_mute|!ignore_ctl_error;*:*:0x01;`` + applies the ``mixer_playback_min_mute`` flag and clears the + ``ignore_ctl_error`` flag for the device 1234:abcd, and applies the + ``skip_sample_rate`` flag for all devices. + + * bit 0: ``get_sample_rate`` + Skip reading sample rate for devices + * bit 1: ``share_media_device`` + Create Media Controller API entries + * bit 2: ``align_transfer`` + Allow alignment on audio sub-slot at transfer + * bit 3: ``tx_length`` + Add length specifier to transfers + * bit 4: ``playback_first`` + Start playback stream at first in implement feedback mode + * bit 5: ``skip_clock_selector`` + Skip clock selector setup + * bit 6: ``ignore_clock_source`` + Ignore errors from clock source search + * bit 7: ``itf_usb_dsd_dac`` + Indicates ITF-USB DSD-based DACs + * bit 8: ``ctl_msg_delay`` + Add a delay of 20ms at each control message handling + * bit 9: ``ctl_msg_delay_1m`` + Add a delay of 1-2ms at each control message handling + * bit 10: ``ctl_msg_delay_5m`` + Add a delay of 5-6ms at each control message handling + * bit 11: ``iface_delay`` + Add a delay of 50ms at each interface setup + * bit 12: ``validate_rates`` + Perform sample rate validations at probe + * bit 13: ``disable_autosuspend`` + Disable runtime PM autosuspend + * bit 14: ``ignore_ctl_error`` + Ignore errors for mixer access + * bit 15: ``dsd_raw`` + Support generic DSD raw U32_BE format + * bit 16: ``set_iface_first`` + Set up the interface at first like UAC1 + * bit 17: ``generic_implicit_fb`` + Apply the generic implicit feedback sync mode + * bit 18: ``skip_implicit_fb`` + Don't apply implicit feedback sync mode + * bit 19: ``iface_skip_close`` + Don't close interface during setting sample rate + * bit 20: ``force_iface_reset`` + Force an interface reset whenever stopping & restarting a stream + * bit 21: ``fixed_rate`` + Do not set PCM rate (frequency) when only one rate is available + for the given endpoint + * bit 22: ``mic_res_16`` + Set the fixed resolution 16 for Mic Capture Volume + * bit 23: ``mic_res_384`` + Set the fixed resolution 384 for Mic Capture Volume + * bit 24: ``mixer_playback_min_mute`` + Set minimum volume control value as mute for devices where the + lowest playback value represents muted state instead of minimum + audible volume + * bit 25: ``mixer_capture_min_mute`` + Similar to bit 24 but for capture streams This module supports multiple devices, autoprobe and hotplugging. -- cgit v1.2.3 From 064a97a29e3ba0e5d75b3b8ad5b762962aaad8ab Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Fri, 12 Sep 2025 14:07:43 +0200 Subject: dt-bindings: watchdog: add SMARC-sAM67 support The SMARC-sAM67 board has an on-board uC which has the same register interface as the older CPLD implementation on the SMARC-sAL28 board. Although the MCU emulates the same behavior, be prepared for any quirks and add a board specific compatible. Signed-off-by: Michael Walle Acked-by: Krzysztof Kozlowski Reviewed-by: Guenter Roeck Signed-off-by: Guenter Roeck Signed-off-by: Wim Van Sebroeck --- .../devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml b/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml index 179272f74de5..b5b624e85468 100644 --- a/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml @@ -18,7 +18,12 @@ allOf: properties: compatible: - const: kontron,sl28cpld-wdt + oneOf: + - items: + - enum: + - kontron,sa67mcu-wdt + - const: kontron,sl28cpld-wdt + - const: kontron,sl28cpld-wdt reg: maxItems: 1 -- cgit v1.2.3 From 129b91fc329604e05f794dc1a18a6da3eb518b4e Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 26 Sep 2025 16:47:37 -0500 Subject: dt-bindings: arm: altera: Drop socfpga-sdram-edac.txt The contents of arm/altera/socfpga-sdram-edac.txt are already covered by edac/altr,socfpga-ecc-manager.yaml except for the "altr,sdram-edac" compatible string. Add the compatible and drop the old .txt binding doc. Acked-by: Matthew Gerlach Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/arm/altera/socfpga-sdram-edac.txt | 15 --------------- .../bindings/edac/altr,socfpga-ecc-manager.yaml | 1 + 2 files changed, 1 insertion(+), 15 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt deleted file mode 100644 index f5ad0ff69fae..000000000000 --- a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt +++ /dev/null @@ -1,15 +0,0 @@ -Altera SOCFPGA SDRAM Error Detection & Correction [EDAC] -The EDAC accesses a range of registers in the SDRAM controller. - -Required properties: -- compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10" -- altr,sdr-syscon : phandle of the sdr module -- interrupts : Should contain the SDRAM ECC IRQ in the - appropriate format for the IRQ controller. - -Example: - sdramedac { - compatible = "altr,sdram-edac"; - altr,sdr-syscon = <&sdr>; - interrupts = <0 39 4>; - }; diff --git a/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml b/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml index ec4634c5fa89..3d787dea0f14 100644 --- a/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml +++ b/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml @@ -53,6 +53,7 @@ properties: properties: compatible: enum: + - altr,sdram-edac - altr,sdram-edac-a10 - altr,sdram-edac-s10 -- cgit v1.2.3 From 12bfcb84dc0852c97baff9ac1c0292a9db90c367 Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Fri, 19 Sep 2025 03:52:00 -0400 Subject: dt-bindings: mtd: Add realtek,rtl9301-ecc Add a dtschema for the ECC engine on the Realtek RTL93xx SoCs. The engine supports BCH6 and BCH12 parity for 512 byte blocks. The hardware can make use of interrupts but this is not yet supported by the driver. From the known datasheets it is connected to the LXB (lexra bus) and propably depends on its clock. Provide an optional clock property that can describe the relation. Signed-off-by: Markus Stockhausen Reviewed-by: Rob Herring (Arm) Signed-off-by: Miquel Raynal --- .../bindings/mtd/realtek,rtl9301-ecc.yaml | 41 ++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/realtek,rtl9301-ecc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mtd/realtek,rtl9301-ecc.yaml b/Documentation/devicetree/bindings/mtd/realtek,rtl9301-ecc.yaml new file mode 100644 index 000000000000..55b35c3db0ff --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/realtek,rtl9301-ecc.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/realtek,rtl9301-ecc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek SoCs NAND ECC engine + +maintainers: + - Markus Stockhausen + +properties: + compatible: + const: realtek,rtl9301-ecc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <1>; + #size-cells = <1>; + + ecc0: ecc@1a600 { + compatible = "realtek,rtl9301-ecc"; + reg = <0x1a600 0x54>; + }; + }; -- cgit v1.2.3 From 29be241d11748dbcd9981587a85afa734942c885 Mon Sep 17 00:00:00 2001 From: Markus Heidelberg Date: Fri, 26 Sep 2025 15:15:20 +0200 Subject: docs: networking: phy: clarify abbreviation "PAL" It is suddenly used in the text without introduction, so the meaning might have been unclear to readers. Signed-off-by: Markus Heidelberg Reviewed-by: Andrew Lunn Link: https://patch.msgid.link/20250926131520.222346-1-m.heidelberg@cab.de Signed-off-by: Jakub Kicinski --- Documentation/networking/phy.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/networking/phy.rst b/Documentation/networking/phy.rst index 7f159043ad5a..b0f2ef83735d 100644 --- a/Documentation/networking/phy.rst +++ b/Documentation/networking/phy.rst @@ -20,7 +20,7 @@ sometimes quite different) ethernet controllers connected to the same management bus, it is difficult to ensure safe use of the bus. Since the PHYs are devices, and the management busses through which they are -accessed are, in fact, busses, the PHY Abstraction Layer treats them as such. +accessed are, in fact, busses, the PHY Abstraction Layer (PAL) treats them as such. In doing so, it has these goals: #. Increase code-reuse -- cgit v1.2.3 From f2c61db29f277b9c80de92102fc532cc247495cd Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Mon, 29 Sep 2025 13:43:52 -0700 Subject: Remove bcachefs core code bcachefs was marked 'externally maintained' in 6.17 but the code remained to make the transition smoother. It's now a DKMS module, making the in-kernel code stale, so remove it to avoid any version confusion. Link: https://lore.kernel.org/linux-bcachefs/yokpt2d2g2lluyomtqrdvmkl3amv3kgnipmenobkpgx537kay7@xgcgjviv3n7x/T/ Signed-off-by: Linus Torvalds --- Documentation/filesystems/bcachefs/CodingStyle.rst | 186 --------------------- .../filesystems/bcachefs/SubmittingPatches.rst | 105 ------------ Documentation/filesystems/bcachefs/casefolding.rst | 108 ------------ Documentation/filesystems/bcachefs/errorcodes.rst | 30 ---- .../filesystems/bcachefs/future/idle_work.rst | 78 --------- Documentation/filesystems/bcachefs/index.rst | 38 ----- Documentation/filesystems/index.rst | 1 - 7 files changed, 546 deletions(-) delete mode 100644 Documentation/filesystems/bcachefs/CodingStyle.rst delete mode 100644 Documentation/filesystems/bcachefs/SubmittingPatches.rst delete mode 100644 Documentation/filesystems/bcachefs/casefolding.rst delete mode 100644 Documentation/filesystems/bcachefs/errorcodes.rst delete mode 100644 Documentation/filesystems/bcachefs/future/idle_work.rst delete mode 100644 Documentation/filesystems/bcachefs/index.rst (limited to 'Documentation') diff --git a/Documentation/filesystems/bcachefs/CodingStyle.rst b/Documentation/filesystems/bcachefs/CodingStyle.rst deleted file mode 100644 index b29562a6bf55..000000000000 --- a/Documentation/filesystems/bcachefs/CodingStyle.rst +++ /dev/null @@ -1,186 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -bcachefs coding style -===================== - -Good development is like gardening, and codebases are our gardens. Tend to them -every day; look for little things that are out of place or in need of tidying. -A little weeding here and there goes a long way; don't wait until things have -spiraled out of control. - -Things don't always have to be perfect - nitpicking often does more harm than -good. But appreciate beauty when you see it - and let people know. - -The code that you are afraid to touch is the code most in need of refactoring. - -A little organizing here and there goes a long way. - -Put real thought into how you organize things. - -Good code is readable code, where the structure is simple and leaves nowhere -for bugs to hide. - -Assertions are one of our most important tools for writing reliable code. If in -the course of writing a patchset you encounter a condition that shouldn't -happen (and will have unpredictable or undefined behaviour if it does), or -you're not sure if it can happen and not sure how to handle it yet - make it a -BUG_ON(). Don't leave undefined or unspecified behavior lurking in the codebase. - -By the time you finish the patchset, you should understand better which -assertions need to be handled and turned into checks with error paths, and -which should be logically impossible. Leave the BUG_ON()s in for the ones which -are logically impossible. (Or, make them debug mode assertions if they're -expensive - but don't turn everything into a debug mode assertion, so that -we're not stuck debugging undefined behaviour should it turn out that you were -wrong). - -Assertions are documentation that can't go out of date. Good assertions are -wonderful. - -Good assertions drastically and dramatically reduce the amount of testing -required to shake out bugs. - -Good assertions are based on state, not logic. To write good assertions, you -have to think about what the invariants on your state are. - -Good invariants and assertions will hold everywhere in your codebase. This -means that you can run them in only a few places in the checked in version, but -should you need to debug something that caused the assertion to fail, you can -quickly shotgun them everywhere to find the codepath that broke the invariant. - -A good assertion checks something that the compiler could check for us, and -elide - if we were working in a language with embedded correctness proofs that -the compiler could check. This is something that exists today, but it'll likely -still be a few decades before it comes to systems programming languages. But we -can still incorporate that kind of thinking into our code and document the -invariants with runtime checks - much like the way people working in -dynamically typed languages may add type annotations, gradually making their -code statically typed. - -Looking for ways to make your assertions simpler - and higher level - will -often nudge you towards making the entire system simpler and more robust. - -Good code is code where you can poke around and see what it's doing - -introspection. We can't debug anything if we can't see what's going on. - -Whenever we're debugging, and the solution isn't immediately obvious, if the -issue is that we don't know where the issue is because we can't see what's -going on - fix that first. - -We have the tools to make anything visible at runtime, efficiently - RCU and -percpu data structures among them. Don't let things stay hidden. - -The most important tool for introspection is the humble pretty printer - in -bcachefs, this means `*_to_text()` functions, which output to printbufs. - -Pretty printers are wonderful, because they compose and you can use them -everywhere. Having functions to print whatever object you're working with will -make your error messages much easier to write (therefore they will actually -exist) and much more informative. And they can be used from sysfs/debugfs, as -well as tracepoints. - -Runtime info and debugging tools should come with clear descriptions and -labels, and good structure - we don't want files with a list of bare integers, -like in procfs. Part of the job of the debugging tools is to educate users and -new developers as to how the system works. - -Error messages should, whenever possible, tell you everything you need to debug -the issue. It's worth putting effort into them. - -Tracepoints shouldn't be the first thing you reach for. They're an important -tool, but always look for more immediate ways to make things visible. When we -have to rely on tracing, we have to know which tracepoints we're looking for, -and then we have to run the troublesome workload, and then we have to sift -through logs. This is a lot of steps to go through when a user is hitting -something, and if it's intermittent it may not even be possible. - -The humble counter is an incredibly useful tool. They're cheap and simple to -use, and many complicated internal operations with lots of things that can -behave weirdly (anything involving memory reclaim, for example) become -shockingly easy to debug once you have counters on every distinct codepath. - -Persistent counters are even better. - -When debugging, try to get the most out of every bug you come across; don't -rush to fix the initial issue. Look for things that will make related bugs -easier the next time around - introspection, new assertions, better error -messages, new debug tools, and do those first. Look for ways to make the system -better behaved; often one bug will uncover several other bugs through -downstream effects. - -Fix all that first, and then the original bug last - even if that means keeping -a user waiting. They'll thank you in the long run, and when they understand -what you're doing you'll be amazed at how patient they're happy to be. Users -like to help - otherwise they wouldn't be reporting the bug in the first place. - -Talk to your users. Don't isolate yourself. - -Users notice all sorts of interesting things, and by just talking to them and -interacting with them you can benefit from their experience. - -Spend time doing support and helpdesk stuff. Don't just write code - code isn't -finished until it's being used trouble free. - -This will also motivate you to make your debugging tools as good as possible, -and perhaps even your documentation, too. Like anything else in life, the more -time you spend at it the better you'll get, and you the developer are the -person most able to improve the tools to make debugging quick and easy. - -Be wary of how you take on and commit to big projects. Don't let development -become product-manager focused. Often time an idea is a good one but needs to -wait for its proper time - but you won't know if it's the proper time for an -idea until you start writing code. - -Expect to throw a lot of things away, or leave them half finished for later. -Nobody writes all perfect code that all gets shipped, and you'll be much more -productive in the long run if you notice this early and shift to something -else. The experience gained and lessons learned will be valuable for all the -other work you do. - -But don't be afraid to tackle projects that require significant rework of -existing code. Sometimes these can be the best projects, because they can lead -us to make existing code more general, more flexible, more multipurpose and -perhaps more robust. Just don't hesitate to abandon the idea if it looks like -it's going to make a mess of things. - -Complicated features can often be done as a series of refactorings, with the -final change that actually implements the feature as a quite small patch at the -end. It's wonderful when this happens, especially when those refactorings are -things that improve the codebase in their own right. When that happens there's -much less risk of wasted effort if the feature you were going for doesn't work -out. - -Always strive to work incrementally. Always strive to turn the big projects -into little bite sized projects that can prove their own merits. - -Instead of always tackling those big projects, look for little things that -will be useful, and make the big projects easier. - -The question of what's likely to be useful is where junior developers most -often go astray - doing something because it seems like it'll be useful often -leads to overengineering. Knowing what's useful comes from many years of -experience, or talking with people who have that experience - or from simply -reading lots of code and looking for common patterns and issues. Don't be -afraid to throw things away and do something simpler. - -Talk about your ideas with your fellow developers; often times the best things -come from relaxed conversations where people aren't afraid to say "what if?". - -Don't neglect your tools. - -The most important tools (besides the compiler and our text editor) are the -tools we use for testing. The shortest possible edit/test/debug cycle is -essential for working productively. We learn, gain experience, and discover the -errors in our thinking by running our code and seeing what happens. If your -time is being wasted because your tools are bad or too slow - don't accept it, -fix it. - -Put effort into your documentation, commit messages, and code comments - but -don't go overboard. A good commit message is wonderful - but if the information -was important enough to go in a commit message, ask yourself if it would be -even better as a code comment. - -A good code comment is wonderful, but even better is the comment that didn't -need to exist because the code was so straightforward as to be obvious; -organized into small clean and tidy modules, with clear and descriptive names -for functions and variables, where every line of code has a clear purpose. diff --git a/Documentation/filesystems/bcachefs/SubmittingPatches.rst b/Documentation/filesystems/bcachefs/SubmittingPatches.rst deleted file mode 100644 index 18c79d548391..000000000000 --- a/Documentation/filesystems/bcachefs/SubmittingPatches.rst +++ /dev/null @@ -1,105 +0,0 @@ -Submitting patches to bcachefs -============================== - -Here are suggestions for submitting patches to bcachefs subsystem. - -Submission checklist --------------------- - -Patches must be tested before being submitted, either with the xfstests suite -[0]_, or the full bcachefs test suite in ktest [1]_, depending on what's being -touched. Note that ktest wraps xfstests and will be an easier method to running -it for most users; it includes single-command wrappers for all the mainstream -in-kernel local filesystems. - -Patches will undergo more testing after being merged (including -lockdep/kasan/preempt/etc. variants), these are not generally required to be -run by the submitter - but do put some thought into what you're changing and -which tests might be relevant, e.g. are you dealing with tricky memory layout -work? kasan, are you doing locking work? then lockdep; and ktest includes -single-command variants for the debug build types you'll most likely need. - -The exception to this rule is incomplete WIP/RFC patches: if you're working on -something nontrivial, it's encouraged to send out a WIP patch to let people -know what you're doing and make sure you're on the right track. Just make sure -it includes a brief note as to what's done and what's incomplete, to avoid -confusion. - -Rigorous checkpatch.pl adherence is not required (many of its warnings are -considered out of date), but try not to deviate too much without reason. - -Focus on writing code that reads well and is organized well; code should be -aesthetically pleasing. - -CI --- - -Instead of running your tests locally, when running the full test suite it's -preferable to let a server farm do it in parallel, and then have the results -in a nice test dashboard (which can tell you which failures are new, and -presents results in a git log view, avoiding the need for most bisecting). - -That exists [2]_, and community members may request an account. If you work for -a big tech company, you'll need to help out with server costs to get access - -but the CI is not restricted to running bcachefs tests: it runs any ktest test -(which generally makes it easy to wrap other tests that can run in qemu). - -Other things to think about ---------------------------- - -- How will we debug this code? Is there sufficient introspection to diagnose - when something starts acting wonky on a user machine? - - We don't necessarily need every single field of every data structure visible - with introspection, but having the important fields of all the core data - types wired up makes debugging drastically easier - a bit of thoughtful - foresight greatly reduces the need to have people build custom kernels with - debug patches. - - More broadly, think about all the debug tooling that might be needed. - -- Does it make the codebase more or less of a mess? Can we also try to do some - organizing, too? - -- Do new tests need to be written? New assertions? How do we know and verify - that the code is correct, and what happens if something goes wrong? - - We don't yet have automated code coverage analysis or easy fault injection - - but for now, pretend we did and ask what they might tell us. - - Assertions are hugely important, given that we don't yet have a systems - language that can do ergonomic embedded correctness proofs. Hitting an assert - in testing is much better than wandering off into undefined behaviour la-la - land - use them. Use them judiciously, and not as a replacement for proper - error handling, but use them. - -- Does it need to be performance tested? Should we add new performance counters? - - bcachefs has a set of persistent runtime counters which can be viewed with - the 'bcachefs fs top' command; this should give users a basic idea of what - their filesystem is currently doing. If you're doing a new feature or looking - at old code, think if anything should be added. - -- If it's a new on disk format feature - have upgrades and downgrades been - tested? (Automated tests exists but aren't in the CI, due to the hassle of - disk image management; coordinate to have them run.) - -Mailing list, IRC ------------------ - -Patches should hit the list [3]_, but much discussion and code review happens -on IRC as well [4]_; many people appreciate the more conversational approach -and quicker feedback. - -Additionally, we have a lively user community doing excellent QA work, which -exists primarily on IRC. Please make use of that resource; user feedback is -important for any nontrivial feature, and documenting it in commit messages -would be a good idea. - -.. rubric:: References - -.. [0] git://git.kernel.org/pub/scm/fs/xfs/xfstests-dev.git -.. [1] https://evilpiepirate.org/git/ktest.git/ -.. [2] https://evilpiepirate.org/~testdashboard/ci/ -.. [3] linux-bcachefs@vger.kernel.org -.. [4] irc.oftc.net#bcache, #bcachefs-dev diff --git a/Documentation/filesystems/bcachefs/casefolding.rst b/Documentation/filesystems/bcachefs/casefolding.rst deleted file mode 100644 index 871a38f557e8..000000000000 --- a/Documentation/filesystems/bcachefs/casefolding.rst +++ /dev/null @@ -1,108 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -Casefolding -=========== - -bcachefs has support for case-insensitive file and directory -lookups using the regular `chattr +F` (`S_CASEFOLD`, `FS_CASEFOLD_FL`) -casefolding attributes. - -The main usecase for casefolding is compatibility with software written -against other filesystems that rely on casefolded lookups -(eg. NTFS and Wine/Proton). -Taking advantage of file-system level casefolding can lead to great -loading time gains in many applications and games. - -Casefolding support requires a kernel with the `CONFIG_UNICODE` enabled. -Once a directory has been flagged for casefolding, a feature bit -is enabled on the superblock which marks the filesystem as using -casefolding. -When the feature bit for casefolding is enabled, it is no longer possible -to mount that filesystem on kernels without `CONFIG_UNICODE` enabled. - -On the lookup/query side: casefolding is implemented by allocating a new -string of `BCH_NAME_MAX` length using the `utf8_casefold` function to -casefold the query string. - -On the dirent side: casefolding is implemented by ensuring the `bkey`'s -hash is made from the casefolded string and storing the cached casefolded -name with the regular name in the dirent. - -The structure looks like this: - -* Regular: [dirent data][regular name][nul][nul]... -* Casefolded: [dirent data][reg len][cf len][regular name][casefolded name][nul][nul]... - -(Do note, the number of NULs here is merely for illustration; their count can -vary per-key, and they may not even be present if the key is aligned to -`sizeof(u64)`.) - -This is efficient as it means that for all file lookups that require casefolding, -it has identical performance to a regular lookup: -a hash comparison and a `memcmp` of the name. - -Rationale ---------- - -Several designs were considered for this system: -One was to introduce a dirent_v2, however that would be painful especially as -the hash system only has support for a single key type. This would also need -`BCH_NAME_MAX` to change between versions, and a new feature bit. - -Another option was to store without the two lengths, and just take the length of -the regular name and casefolded name contiguously / 2 as the length. This would -assume that the regular length == casefolded length, but that could potentially -not be true, if the uppercase unicode glyph had a different UTF-8 encoding than -the lowercase unicode glyph. -It would be possible to disregard the casefold cache for those cases, but it was -decided to simply encode the two string lengths in the key to avoid random -performance issues if this edgecase was ever hit. - -The option settled on was to use a free-bit in d_type to mark a dirent as having -a casefold cache, and then treat the first 4 bytes the name block as lengths. -You can see this in the `d_cf_name_block` member of union in `bch_dirent`. - -The feature bit was used to allow casefolding support to be enabled for the majority -of users, but some allow users who have no need for the feature to still use bcachefs as -`CONFIG_UNICODE` can increase the kernel side a significant amount due to the tables used, -which may be decider between using bcachefs for eg. embedded platforms. - -Other filesystems like ext4 and f2fs have a super-block level option for casefolding -encoding, but bcachefs currently does not provide this. ext4 and f2fs do not expose -any encodings than a single UTF-8 version. When future encodings are desirable, -they will be added trivially using the opts mechanism. - -dentry/dcache considerations ----------------------------- - -Currently, in casefolded directories, bcachefs (like other filesystems) will not cache -negative dentry's. - -This is because currently doing so presents a problem in the following scenario: - - - Lookup file "blAH" in a casefolded directory - - Creation of file "BLAH" in a casefolded directory - - Lookup file "blAH" in a casefolded directory - -This would fail if negative dentry's were cached. - -This is slightly suboptimal, but could be fixed in future with some vfs work. - - -References ----------- - -(from Peter Anvin, on the list) - -It is worth noting that Microsoft has basically declared their -"recommended" case folding (upcase) table to be permanently frozen (for -new filesystem instances in the case where they use an on-disk -translation table created at format time.) As far as I know they have -never supported anything other than 1:1 conversion of BMP code points, -nor normalization. - -The exFAT specification enumerates the full recommended upcase table, -although in a somewhat annoying format (basically a hex dump of -compressed data): - -https://learn.microsoft.com/en-us/windows/win32/fileio/exfat-specification diff --git a/Documentation/filesystems/bcachefs/errorcodes.rst b/Documentation/filesystems/bcachefs/errorcodes.rst deleted file mode 100644 index 2cccaa0ba7cd..000000000000 --- a/Documentation/filesystems/bcachefs/errorcodes.rst +++ /dev/null @@ -1,30 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -bcachefs private error codes ----------------------------- - -In bcachefs, as a hard rule we do not throw or directly use standard error -codes (-EINVAL, -EBUSY, etc.). Instead, we define private error codes as needed -in fs/bcachefs/errcode.h. - -This gives us much better error messages and makes debugging much easier. Any -direct uses of standard error codes you see in the source code are simply old -code that has yet to be converted - feel free to clean it up! - -Private error codes may subtype another error code, this allows for grouping of -related errors that should be handled similarly (e.g. transaction restart -errors), as well as specifying which standard error code should be returned at -the bcachefs module boundary. - -At the module boundary, we use bch2_err_class() to convert to a standard error -code; this also emits a trace event so that the original error code be -recovered even if it wasn't logged. - -Do not reuse error codes! Generally speaking, a private error code should only -be thrown in one place. That means that when we see it in a log message we can -see, unambiguously, exactly which file and line number it was returned from. - -Try to give error codes names that are as reasonably descriptive of the error -as possible. Frequently, the error will be logged at a place far removed from -where the error was generated; good names for error codes mean much more -descriptive and useful error messages. diff --git a/Documentation/filesystems/bcachefs/future/idle_work.rst b/Documentation/filesystems/bcachefs/future/idle_work.rst deleted file mode 100644 index 59a332509dcd..000000000000 --- a/Documentation/filesystems/bcachefs/future/idle_work.rst +++ /dev/null @@ -1,78 +0,0 @@ -Idle/background work classes design doc: - -Right now, our behaviour at idle isn't ideal, it was designed for servers that -would be under sustained load, to keep pending work at a "medium" level, to -let work build up so we can process it in more efficient batches, while also -giving headroom for bursts in load. - -But for desktops or mobile - scenarios where work is less sustained and power -usage is more important - we want to operate differently, with a "rush to -idle" so the system can go to sleep. We don't want to be dribbling out -background work while the system should be idle. - -The complicating factor is that there are a number of background tasks, which -form a heirarchy (or a digraph, depending on how you divide it up) - one -background task may generate work for another. - -Thus proper idle detection needs to model this heirarchy. - -- Foreground writes -- Page cache writeback -- Copygc, rebalance -- Journal reclaim - -When we implement idle detection and rush to idle, we need to be careful not -to disturb too much the existing behaviour that works reasonably well when the -system is under sustained load (or perhaps improve it in the case of -rebalance, which currently does not actively attempt to let work batch up). - -SUSTAINED LOAD REGIME ---------------------- - -When the system is under continuous load, we want these jobs to run -continuously - this is perhaps best modelled with a P/D controller, where -they'll be trying to keep a target value (i.e. fragmented disk space, -available journal space) roughly in the middle of some range. - -The goal under sustained load is to balance our ability to handle load spikes -without running out of x resource (free disk space, free space in the -journal), while also letting some work accumululate to be batched (or become -unnecessary). - -For example, we don't want to run copygc too aggressively, because then it -will be evacuating buckets that would have become empty (been overwritten or -deleted) anyways, and we don't want to wait until we're almost out of free -space because then the system will behave unpredicably - suddenly we're doing -a lot more work to service each write and the system becomes much slower. - -IDLE REGIME ------------ - -When the system becomes idle, we should start flushing our pending work -quicker so the system can go to sleep. - -Note that the definition of "idle" depends on where in the heirarchy a task -is - a task should start flushing work more quickly when the task above it has -stopped generating new work. - -e.g. rebalance should start flushing more quickly when page cache writeback is -idle, and journal reclaim should only start flushing more quickly when both -copygc and rebalance are idle. - -It's important to let work accumulate when more work is still incoming and we -still have room, because flushing is always more efficient if we let it batch -up. New writes may overwrite data before rebalance moves it, and tasks may be -generating more updates for the btree nodes that journal reclaim needs to flush. - -On idle, how much work we do at each interval should be proportional to the -length of time we have been idle for. If we're idle only for a short duration, -we shouldn't flush everything right away; the system might wake up and start -generating new work soon, and flushing immediately might end up doing a lot of -work that would have been unnecessary if we'd allowed things to batch more. - -To summarize, we will need: - - - A list of classes for background tasks that generate work, which will - include one "foreground" class. - - Tracking for each class - "Am I doing work, or have I gone to sleep?" - - And each class should check the class above it when deciding how much work to issue. diff --git a/Documentation/filesystems/bcachefs/index.rst b/Documentation/filesystems/bcachefs/index.rst deleted file mode 100644 index e5c4c2120b93..000000000000 --- a/Documentation/filesystems/bcachefs/index.rst +++ /dev/null @@ -1,38 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -====================== -bcachefs Documentation -====================== - -Subsystem-specific development process notes --------------------------------------------- - -Development notes specific to bcachefs. These are intended to supplement -:doc:`general kernel development handbook `. - -.. toctree:: - :maxdepth: 1 - :numbered: - - CodingStyle - SubmittingPatches - -Filesystem implementation -------------------------- - -Documentation for filesystem features and their implementation details. -At this moment, only a few of these are described here. - -.. toctree:: - :maxdepth: 1 - :numbered: - - casefolding - errorcodes - -Future design -------------- -.. toctree:: - :maxdepth: 1 - - future/idle_work diff --git a/Documentation/filesystems/index.rst b/Documentation/filesystems/index.rst index 11a599387266..622187a96bdc 100644 --- a/Documentation/filesystems/index.rst +++ b/Documentation/filesystems/index.rst @@ -72,7 +72,6 @@ Documentation for filesystem implementations. afs autofs autofs-mount-control - bcachefs/index befs bfs btrfs -- cgit v1.2.3 From a680581f6a131fd8c62d284ed4a24d4bc1cc553e Mon Sep 17 00:00:00 2001 From: Ivan Vecera Date: Sat, 27 Sep 2025 10:49:10 +0200 Subject: dpll: add phase-offset-avg-factor device attribute to netlink spec Add dpll device level attribute DPLL_A_PHASE_OFFSET_AVG_FACTOR to allow control over a calculation of reported phase offset value. Attribute is present, if the driver provides such capability, otherwise attribute shall not be present. Signed-off-by: Ivan Vecera Reviewed-by: Vadim Fedorenko Link: https://patch.msgid.link/20250927084912.2343597-2-ivecera@redhat.com Signed-off-by: Jakub Kicinski --- Documentation/driver-api/dpll.rst | 18 +++++++++++++++++- Documentation/netlink/specs/dpll.yaml | 6 ++++++ 2 files changed, 23 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/dpll.rst b/Documentation/driver-api/dpll.rst index eca72d9b9ed8..be1fc643b645 100644 --- a/Documentation/driver-api/dpll.rst +++ b/Documentation/driver-api/dpll.rst @@ -179,7 +179,23 @@ Phase offset measurement and adjustment Device may provide ability to measure a phase difference between signals on a pin and its parent dpll device. If pin-dpll phase offset measurement is supported, it shall be provided with ``DPLL_A_PIN_PHASE_OFFSET`` -attribute for each parent dpll device. +attribute for each parent dpll device. The reported phase offset may be +computed as the average of prior values and the current measurement, using +the following formula: + +.. math:: + curr\_avg = prev\_avg * \frac{2^N-1}{2^N} + new\_val * \frac{1}{2^N} + +where `curr_avg` is the current reported phase offset, `prev_avg` is the +previously reported value, `new_val` is the current measurement, and `N` is +the averaging factor. Configured averaging factor value is provided with +``DPLL_A_PHASE_OFFSET_AVG_FACTOR`` attribute of a device and value change can +be requested with the same attribute with ``DPLL_CMD_DEVICE_SET`` command. + + ================================== ====================================== + ``DPLL_A_PHASE_OFFSET_AVG_FACTOR`` attr configured value of phase offset + averaging factor + ================================== ====================================== Device may also provide ability to adjust a signal phase on a pin. If pin phase adjustment is supported, minimal and maximal values that pin diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/specs/dpll.yaml index 5decee61a2c4..cafb4ec20447 100644 --- a/Documentation/netlink/specs/dpll.yaml +++ b/Documentation/netlink/specs/dpll.yaml @@ -315,6 +315,10 @@ attribute-sets: If enabled, dpll device shall monitor and notify all currently available inputs for changes of their phase offset against the dpll device. + - + name: phase-offset-avg-factor + type: u32 + doc: Averaging factor applied to calculation of reported phase offset. - name: pin enum-name: dpll_a_pin @@ -523,6 +527,7 @@ operations: - clock-id - type - phase-offset-monitor + - phase-offset-avg-factor dump: reply: *dev-attrs @@ -540,6 +545,7 @@ operations: attributes: - id - phase-offset-monitor + - phase-offset-avg-factor - name: device-create-ntf doc: Notification about device appearing -- cgit v1.2.3 From 7bd80ed89d72285515db673803b021469ba71ee8 Mon Sep 17 00:00:00 2001 From: Oleksij Rempel Date: Wed, 24 Sep 2025 14:02:41 +0200 Subject: Documentation: net: add flow control guide and document ethtool API Introduce a new document, flow_control.rst, to provide a comprehensive guide on Ethernet Flow Control in Linux. The guide explains how flow control works, how autonegotiation resolves pause capabilities, and how to configure it using ethtool and Netlink. In parallel, document the pause and pause-stat attributes in the ethtool.yaml netlink spec. This enables the ynl tool to generate kernel-doc comments for the corresponding enums in the UAPI header, making the C interface self-documenting. Finally, replace the legacy flow control section in phy.rst with a reference to the new document and add pointers in the relevant C source files. Signed-off-by: Oleksij Rempel Link: https://patch.msgid.link/20250924120241.724850-1-o.rempel@pengutronix.de Signed-off-by: Paolo Abeni --- Documentation/netlink/specs/ethtool.yaml | 27 +++ Documentation/networking/flow_control.rst | 373 ++++++++++++++++++++++++++++++ Documentation/networking/index.rst | 1 + Documentation/networking/phy.rst | 12 +- 4 files changed, 403 insertions(+), 10 deletions(-) create mode 100644 Documentation/networking/flow_control.rst (limited to 'Documentation') diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netlink/specs/ethtool.yaml index 6a0fb1974513..e4852505294f 100644 --- a/Documentation/netlink/specs/ethtool.yaml +++ b/Documentation/netlink/specs/ethtool.yaml @@ -864,7 +864,9 @@ attribute-sets: - name: pause-stat + doc: Statistics counters for link-wide PAUSE frames (IEEE 802.3 Annex 31B). attr-cnt-name: __ethtool-a-pause-stat-cnt + enum-name: ethtool-a-pause-stat attributes: - name: unspec @@ -875,13 +877,17 @@ attribute-sets: type: pad - name: tx-frames + doc: Number of PAUSE frames transmitted. type: u64 - name: rx-frames + doc: Number of PAUSE frames received. type: u64 - name: pause + doc: Parameters for link-wide PAUSE (IEEE 802.3 Annex 31B). attr-cnt-name: __ethtool-a-pause-cnt + enum-name: ethtool-a-pause attributes: - name: unspec @@ -893,19 +899,40 @@ attribute-sets: nested-attributes: header - name: autoneg + doc: | + Acts as a mode selector for the driver. + On GET: indicates the driver's behavior. If true, the driver will + respect the negotiated outcome; if false, the driver will use a + forced configuration. + On SET: if true, the driver configures the PHY's advertisement based + on the rx and tx attributes. If false, the driver forces the MAC + into the state defined by the rx and tx attributes. type: u8 - name: rx + doc: | + Enable receiving PAUSE frames (pausing local TX). + On GET: reflects the currently preferred configuration state. type: u8 - name: tx + doc: | + Enable transmitting PAUSE frames (pausing peer TX). + On GET: reflects the currently preferred configuration state. type: u8 - name: stats + doc: | + Contains the pause statistics counters. The source of these + statistics is determined by stats-src. type: nest nested-attributes: pause-stat - name: stats-src + doc: | + Selects the source of the MAC statistics, values from + enum ethtool_mac_stats_src. This allows requesting statistics + from the individual components of the MAC Merge layer. type: u32 - name: eee diff --git a/Documentation/networking/flow_control.rst b/Documentation/networking/flow_control.rst new file mode 100644 index 000000000000..48646d54513f --- /dev/null +++ b/Documentation/networking/flow_control.rst @@ -0,0 +1,373 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. _ethernet-flow-control: + +===================== +Ethernet Flow Control +===================== + +This document is a practical guide to Ethernet Flow Control in Linux, covering +what it is, how it works, and how to configure it. + +What is Flow Control? +===================== + +Flow control is a mechanism to prevent a fast sender from overwhelming a +slow receiver with data, which would cause buffer overruns and dropped packets. +The receiver can signal the sender to temporarily stop transmitting, giving it +time to process its backlog. + +Standards references +==================== + +Ethernet flow control mechanisms are specified across consolidated IEEE base +standards; some originated as amendments: + +- Collision-based flow control is part of CSMA/CD in **IEEE 802.3** + (half-duplex). +- Link-wide PAUSE is defined in **IEEE 802.3 Annex 31B** + (originally **802.3x**). +- Priority-based Flow Control (PFC) is defined in **IEEE 802.1Q Clause 36** + (originally **802.1Qbb**). + +In the remainder of this document, the consolidated clause numbers are used. + +How It Works: The Mechanisms +============================ + +The method used for flow control depends on the link's duplex mode. + +.. note:: + The user-visible ``ethtool`` pause API described in this document controls + **link-wide PAUSE** (IEEE 802.3 Annex 31B) only. It does not control the + collision-based behavior that exists on half-duplex links. + +1. Half-Duplex: Collision-Based Flow Control +-------------------------------------------- +On half-duplex links, a device cannot send and receive simultaneously, so PAUSE +frames are not used. Flow control is achieved by leveraging the CSMA/CD +(Carrier Sense Multiple Access with Collision Detection) protocol itself. + +* **How it works**: To inhibit incoming data, a receiving device can force a + collision on the line. When the sending station detects this collision, it + terminates its transmission, sends a "jam" signal, and then executes the + "Collision backoff and retransmission" procedure as defined in IEEE 802.3, + Section 4.2.3.2.5. This algorithm makes the sender wait for a random + period before attempting to retransmit. By repeatedly forcing collisions, + the receiver can effectively throttle the sender's transmission rate. + +.. note:: + While this mechanism is part of the IEEE standard, there is currently no + generic kernel API to configure or control it. Drivers should not enable + this feature until a standardized interface is available. + +.. warning:: + On shared-medium networks (e.g. 10BASE2, or twisted-pair networks using a + hub rather than a switch) forcing collisions inhibits traffic **across the + entire shared segment**, not just a single point-to-point link. Enabling + such behavior is generally undesirable. + +2. Full-Duplex: Link-wide PAUSE (IEEE 802.3 Annex 31B) +------------------------------------------------------ +On full-duplex links, devices can send and receive at the same time. Flow +control is achieved by sending a special **PAUSE frame**, defined by IEEE +802.3 Annex 31B. This mechanism pauses all traffic on the link and is therefore +called *link-wide PAUSE*. + +* **What it is**: A standard Ethernet frame with a globally reserved + destination MAC address (``01-80-C2-00-00-01``). This address is in a range + that standard IEEE 802.1D-compliant bridges do not forward. However, some + unmanaged or misconfigured bridges have been reported to forward these + frames, which can disrupt flow control across a network. + +* **How it works**: The frame contains a MAC Control opcode for PAUSE + (``0x0001``) and a ``pause_time`` value, telling the sender how long to + wait before sending more data frames. This time is specified in units of + "pause quantum", where one quantum is the time it takes to transmit 512 bits. + For example, one pause quantum is 51.2 microseconds on a 10 Mbit/s link, + and 512 nanoseconds on a 1 Gbit/s link. A ``pause_time`` of zero indicates + that the transmitter can resume transmission, even if a previous non-zero + pause time has not yet elapsed. + +* **Who uses it**: Any full-duplex link, from 10 Mbit/s to multi-gigabit speeds. + +3. Full-Duplex: Priority-based Flow Control (PFC) (IEEE 802.1Q Clause 36) +------------------------------------------------------------------------- +Priority-based Flow Control is an enhancement to the standard PAUSE mechanism +that allows flow control to be applied independently to different classes of +traffic, identified by their priority level. + +* **What it is**: PFC allows a receiver to pause traffic for one or more of the + 8 standard priority levels without stopping traffic for other priorities. + This is critical in data center environments for protocols that cannot + tolerate packet loss due to congestion (e.g., Fibre Channel over Ethernet + or RoCE). + +* **How it works**: PFC uses a specific PAUSE frame format. It shares the same + globally reserved destination MAC address (``01-80-C2-00-00-01``) as legacy + PAUSE frames but uses a unique opcode (``0x0101``). The frame payload + contains two key fields: + + - **``priority_enable_vector``**: An 8-bit mask where each bit corresponds to + one of the 8 priorities. If a bit is set to 1, it means the pause time + for that priority is active. + - **``time_vector``**: A list of eight 2-octet fields, one for each priority. + Each field specifies the ``pause_time`` for its corresponding priority, + measured in units of ``pause_quanta`` (the time to transmit 512 bits). + +.. note:: + When PFC is enabled for at least one priority on a port, the standard + **link-wide PAUSE** (IEEE 802.3 Annex 31B) must be disabled for that port. + The two mechanisms are mutually exclusive (IEEE 802.1Q Clause 36). + +Configuring Flow Control +======================== + +Link-wide PAUSE and Priority-based Flow Control are configured with different +tools. + +Configuring Link-wide PAUSE with ``ethtool`` (IEEE 802.3 Annex 31B) +------------------------------------------------------------------- +Use ``ethtool -a `` to view and ``ethtool -A `` to change +the link-wide PAUSE settings. + +.. code-block:: bash + + # View current link-wide PAUSE settings + ethtool -a eth0 + + # Enable RX and TX pause, with autonegotiation + ethtool -A eth0 autoneg on rx on tx on + +**Key Configuration Concepts**: + +* **Pause Autoneg vs Generic Autoneg**: ``ethtool -A ... autoneg {on,off}`` + controls **Pause Autoneg** (Annex 31B) only. It is independent from the + **Generic link autonegotiation** configured with ``ethtool -s``. A device can + have Generic autoneg **on** while Pause Autoneg is **off**, and vice versa. + +* **If Pause Autoneg is off** (``-A ... autoneg off``): the device will **not** + advertise pause in the PHY. The MAC PAUSE state is **forced** according to + ``rx``/``tx`` and does not depend on partner capabilities or resolution. + Ensure the peer is configured complementarily for PAUSE to be effective. + +* **If generic autoneg is off** but **Pause Autoneg is on**, the pause policy + is **remembered** by the kernel and applied later when Generic autoneg is + enabled again. + +* **Autonegotiation Mode**: The PHY will *advertise* the ``rx`` and ``tx`` + capabilities. The final active state is determined by what both sides of the + link agree on. See the "PHY (Physical Layer Transceiver)" section below, + especially the *Resolution* subsection, for details of the negotiation rules. + +* **Forced Mode**: This mode is necessary when autonegotiation is not used or + not possible. This includes links where one or both partners have + autonegotiation disabled, or in setups without a PHY (e.g., direct + MAC-to-MAC connections). The driver bypasses PHY advertisement and + directly forces the MAC into the specified ``rx``/``tx`` state. The + configuration on both sides of the link must be complementary. For + example, if one side is set to ``tx on`` ``rx off``, the link partner must be + set to ``tx off`` ``rx on`` for flow control to function correctly. + +Configuring PFC with ``dcb`` (IEEE 802.1Q Clause 36) +---------------------------------------------------- +PFC is part of the Data Center Bridging (DCB) subsystem and is managed with the +``dcb`` tool (iproute2). Some deployments use ``dcbtool`` (lldpad) instead; this +document shows ``dcb(8)`` examples. + +**Viewing PFC Settings**: + +.. code-block:: text + + $ dcb pfc show dev eth0 + pfc-cap 8 macsec-bypass off delay 4096 + prio-pfc 0:off 1:off 2:off 3:off 4:off 5:off 6:on 7:on + +This shows the PFC state (on/off) for each priority (0-7). + +**Changing PFC Settings**: + +.. code-block:: bash + + # Enable PFC on priorities 6 and 7, leaving others as they are + $ dcb pfc set dev eth0 prio-pfc 6:on 7:on + + # Disable PFC for all priorities except 6 and 7 + $ dcb pfc set dev eth0 prio-pfc all:off 6:on 7:on + +Monitoring Flow Control +======================= + +The standard way to check if flow control is actively being used is to view the +pause-related statistics. + +**Monitoring Link-wide PAUSE**: +Use ``ethtool --include-statistics -a ``. + +.. code-block:: text + + $ ethtool --include-statistics -a eth0 + Pause parameters for eth0: + ... + Statistics: + tx_pause_frames: 0 + rx_pause_frames: 0 + +**Monitoring PFC**: +PFC statistics (sent and received frames per priority) are available +through the ``dcb`` tool. + +.. code-block:: text + + $ dcb pfc show dev eth0 requests indications + requests 0:0 1:0 2:0 3:1024 4:2048 5:0 6:0 7:0 + indications 0:0 1:0 2:0 3:512 4:4096 5:0 6:0 7:0 + +The ``requests`` counters track transmitted PFC frames (TX), and the +``indications`` counters track received PFC frames (RX). + +Link-wide PAUSE Autonegotiation Details +======================================= + +The autonegotiation process for link-wide PAUSE is managed by the PHY and +involves advertising capabilities and resolving the outcome. + +* Terminology (link-wide PAUSE): + + - **Symmetric pause**: both directions are paused when requested (TX+RX + enabled). + - **Asymmetric pause**: only one direction is paused (e.g., RX-only or + TX-only). + + In IEEE 802.3 advertisement/resolution, symmetric/asymmetric are encoded + using two bits (Pause/Asym) and resolved per the standard truth tables + below. + +* **Advertisement**: The PHY advertises the MAC's flow control capabilities. + This is done using two bits in the advertisement register: "Symmetric + Pause" (Pause) and "Asymmetric Pause" (Asym). These bits should be + interpreted as a combined value, not as independent flags. The kernel + converts the user's ``rx`` and ``tx`` settings into this two-bit value as + follows: + + .. code-block:: text + + tx rx | Pause Asym + -------+------------- + 0 0 | 0 0 + 0 1 | 1 1 + 1 0 | 0 1 + 1 1 | 1 0 + +* **Resolution**: After negotiation, the PHY reports the link partner's + advertised Pause and Asym bits. The final flow control mode is determined + by the combination of the local and partner advertisements, according to + the IEEE 802.3 standard: + + .. code-block:: text + + Local Device | Link Partner | Result + Pause Asym | Pause Asym | + -------------------+--------------------+--------- + 0 X | 0 X | Disabled + 0 1 | 1 0 | Disabled + 0 1 | 1 1 | TX only + 1 0 | 0 X | Disabled + 1 X | 1 X | TX + RX + 1 1 | 0 1 | RX only + + It is important to note that the advertised bits reflect the *current + configuration* of the MAC, which may not represent its full hardware + capabilities. + +Kernel Policy: "Set and Trust" +============================== + +The ethtool pause API is defined as a **wish policy** for +IEEE 802.3 link-wide PAUSE only. A user request is always accepted +as the preferred configuration, but it may not be possible to apply +it in all link states. + +Key constraints: + +- Link-wide PAUSE is not valid on half-duplex links. +- Link-wide PAUSE cannot be used together with Priority-based Flow Control + (PFC, IEEE 802.1Q Clause 36). +- If autonegotiation is active and the link is currently down, the future + mode is not yet known. + +Because of these constraints, the kernel stores the requested setting +and applies it only when the link is in a compatible state. + +Implications for userspace: + +1. Set once (the "wish"): the requested Rx/Tx PAUSE policy is + remembered even if it cannot be applied immediately. +2. Applied conditionally: when the link comes up, the kernel enables + PAUSE only if the active mode allows it. + +Component Roles in Flow Control +=============================== + +The configuration of flow control involves several components, each with a +distinct role. + +The MAC (Media Access Controller) +--------------------------------- +The MAC is the hardware component that actually sends and receives PAUSE +frames. Its capabilities define the upper limit of what the driver can support. +For link-wide PAUSE, MACs can vary in their support for symmetric (both +directions) or asymmetric (independent TX/RX) flow control. + +For PFC, the MAC must be capable of generating and interpreting the +priority-based PAUSE frames and managing separate pause states for each +traffic class. + +Many MACs also implement automatic PAUSE frame transmission based on the fill +level of their internal RX FIFO. This is typically configured with two +thresholds: + +* **FLOW_ON (High Water Mark)**: When the RX FIFO usage reaches this + threshold, the MAC automatically transmits a PAUSE frame to stop the sender. + +* **FLOW_OFF (Low Water Mark)**: When the RX FIFO usage drops below this + threshold, the MAC transmits a PAUSE frame with a quantum of zero to tell + the sender it can resume transmission. + +The PHY (Physical Layer Transceiver) +------------------------------------ +The PHY's role is distinct for each flow control mechanism: + +* **Link-wide PAUSE**: During the autonegotiation process, the PHY is + responsible for advertising the device's flow control capabilities. See the + "Link-wide PAUSE Autonegotiation Details" section for more information. + +* **Half-Duplex Collision-Based Flow Control**: The PHY is fundamental to the + CSMA/CD process. It performs carrier sensing (checking if the line is idle) + and collision detection, which is the mechanism leveraged to throttle the + sender. + +* **Priority-based Flow Control (PFC)**: The PHY is not directly involved in + negotiating PFC capabilities. Its role is to establish the physical link. + PFC negotiation happens at a higher layer via the Data Center Bridging + Capability Exchange Protocol (DCBX). + +User Space Interface +==================== +The primary user space tools are ``ethtool`` for link-wide PAUSE and ``dcb`` for +PFC. They communicate with the kernel to configure the network device driver +and underlying hardware. + +**Link-wide PAUSE Netlink Interface (``ethtool``)** + +See the ethtool Netlink spec (``Documentation/netlink/specs/ethtool.yaml``) +for the authoritative definition of the Pause control and Pause statistics +attributes. The generated UAPI is in +``include/uapi/linux/ethtool_netlink_generated.h``. + +**PFC Netlink Interface (``dcb``)** + +The authoritative definitions for DCB/PFC netlink attributes and commands are in +``include/uapi/linux/dcbnl.h``. See also the ``dcb(8)`` manual page and the DCB +subsystem documentation for userspace configuration details. + diff --git a/Documentation/networking/index.rst b/Documentation/networking/index.rst index c775cababc8c..52aafdc85f6a 100644 --- a/Documentation/networking/index.rst +++ b/Documentation/networking/index.rst @@ -55,6 +55,7 @@ Contents: eql fib_trie filter + flow_control generic-hdlc generic_netlink ../netlink/specs/index diff --git a/Documentation/networking/phy.rst b/Documentation/networking/phy.rst index b0f2ef83735d..40cc0a988d60 100644 --- a/Documentation/networking/phy.rst +++ b/Documentation/networking/phy.rst @@ -343,16 +343,8 @@ Some of the interface modes are described below: Pause frames / flow control =========================== -The PHY does not participate directly in flow control/pause frames except by -making sure that the SUPPORTED_Pause and SUPPORTED_AsymPause bits are set in -MII_ADVERTISE to indicate towards the link partner that the Ethernet MAC -controller supports such a thing. Since flow control/pause frames generation -involves the Ethernet MAC driver, it is recommended that this driver takes care -of properly indicating advertisement and support for such features by setting -the SUPPORTED_Pause and SUPPORTED_AsymPause bits accordingly. This can be done -either before or after phy_connect() and/or as a result of implementing the -ethtool::set_pauseparam feature. - +For detailed link-wide PAUSE and PFC behavior and configuration, see +flow_control.rst. Keeping Close Tabs on the PAL ============================= -- cgit v1.2.3 From 1a98f5699bd57c9b3f66ec54cc38571d5e42ffb1 Mon Sep 17 00:00:00 2001 From: Paolo Abeni Date: Tue, 30 Sep 2025 15:45:06 +0200 Subject: Revert "Documentation: net: add flow control guide and document ethtool API" This reverts commit 7bd80ed89d72285515db673803b021469ba71ee8. I should not have merged it to begin with due to pending review and changes to be addressed. Link: https://patch.msgid.link/c6f3af12df9b7998920a02027fc8893ce82afc4c.1759239721.git.pabeni@redhat.com Signed-off-by: Paolo Abeni --- Documentation/netlink/specs/ethtool.yaml | 27 --- Documentation/networking/flow_control.rst | 373 ------------------------------ Documentation/networking/index.rst | 1 - Documentation/networking/phy.rst | 12 +- 4 files changed, 10 insertions(+), 403 deletions(-) delete mode 100644 Documentation/networking/flow_control.rst (limited to 'Documentation') diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netlink/specs/ethtool.yaml index e4852505294f..6a0fb1974513 100644 --- a/Documentation/netlink/specs/ethtool.yaml +++ b/Documentation/netlink/specs/ethtool.yaml @@ -864,9 +864,7 @@ attribute-sets: - name: pause-stat - doc: Statistics counters for link-wide PAUSE frames (IEEE 802.3 Annex 31B). attr-cnt-name: __ethtool-a-pause-stat-cnt - enum-name: ethtool-a-pause-stat attributes: - name: unspec @@ -877,17 +875,13 @@ attribute-sets: type: pad - name: tx-frames - doc: Number of PAUSE frames transmitted. type: u64 - name: rx-frames - doc: Number of PAUSE frames received. type: u64 - name: pause - doc: Parameters for link-wide PAUSE (IEEE 802.3 Annex 31B). attr-cnt-name: __ethtool-a-pause-cnt - enum-name: ethtool-a-pause attributes: - name: unspec @@ -899,40 +893,19 @@ attribute-sets: nested-attributes: header - name: autoneg - doc: | - Acts as a mode selector for the driver. - On GET: indicates the driver's behavior. If true, the driver will - respect the negotiated outcome; if false, the driver will use a - forced configuration. - On SET: if true, the driver configures the PHY's advertisement based - on the rx and tx attributes. If false, the driver forces the MAC - into the state defined by the rx and tx attributes. type: u8 - name: rx - doc: | - Enable receiving PAUSE frames (pausing local TX). - On GET: reflects the currently preferred configuration state. type: u8 - name: tx - doc: | - Enable transmitting PAUSE frames (pausing peer TX). - On GET: reflects the currently preferred configuration state. type: u8 - name: stats - doc: | - Contains the pause statistics counters. The source of these - statistics is determined by stats-src. type: nest nested-attributes: pause-stat - name: stats-src - doc: | - Selects the source of the MAC statistics, values from - enum ethtool_mac_stats_src. This allows requesting statistics - from the individual components of the MAC Merge layer. type: u32 - name: eee diff --git a/Documentation/networking/flow_control.rst b/Documentation/networking/flow_control.rst deleted file mode 100644 index 48646d54513f..000000000000 --- a/Documentation/networking/flow_control.rst +++ /dev/null @@ -1,373 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -.. _ethernet-flow-control: - -===================== -Ethernet Flow Control -===================== - -This document is a practical guide to Ethernet Flow Control in Linux, covering -what it is, how it works, and how to configure it. - -What is Flow Control? -===================== - -Flow control is a mechanism to prevent a fast sender from overwhelming a -slow receiver with data, which would cause buffer overruns and dropped packets. -The receiver can signal the sender to temporarily stop transmitting, giving it -time to process its backlog. - -Standards references -==================== - -Ethernet flow control mechanisms are specified across consolidated IEEE base -standards; some originated as amendments: - -- Collision-based flow control is part of CSMA/CD in **IEEE 802.3** - (half-duplex). -- Link-wide PAUSE is defined in **IEEE 802.3 Annex 31B** - (originally **802.3x**). -- Priority-based Flow Control (PFC) is defined in **IEEE 802.1Q Clause 36** - (originally **802.1Qbb**). - -In the remainder of this document, the consolidated clause numbers are used. - -How It Works: The Mechanisms -============================ - -The method used for flow control depends on the link's duplex mode. - -.. note:: - The user-visible ``ethtool`` pause API described in this document controls - **link-wide PAUSE** (IEEE 802.3 Annex 31B) only. It does not control the - collision-based behavior that exists on half-duplex links. - -1. Half-Duplex: Collision-Based Flow Control --------------------------------------------- -On half-duplex links, a device cannot send and receive simultaneously, so PAUSE -frames are not used. Flow control is achieved by leveraging the CSMA/CD -(Carrier Sense Multiple Access with Collision Detection) protocol itself. - -* **How it works**: To inhibit incoming data, a receiving device can force a - collision on the line. When the sending station detects this collision, it - terminates its transmission, sends a "jam" signal, and then executes the - "Collision backoff and retransmission" procedure as defined in IEEE 802.3, - Section 4.2.3.2.5. This algorithm makes the sender wait for a random - period before attempting to retransmit. By repeatedly forcing collisions, - the receiver can effectively throttle the sender's transmission rate. - -.. note:: - While this mechanism is part of the IEEE standard, there is currently no - generic kernel API to configure or control it. Drivers should not enable - this feature until a standardized interface is available. - -.. warning:: - On shared-medium networks (e.g. 10BASE2, or twisted-pair networks using a - hub rather than a switch) forcing collisions inhibits traffic **across the - entire shared segment**, not just a single point-to-point link. Enabling - such behavior is generally undesirable. - -2. Full-Duplex: Link-wide PAUSE (IEEE 802.3 Annex 31B) ------------------------------------------------------- -On full-duplex links, devices can send and receive at the same time. Flow -control is achieved by sending a special **PAUSE frame**, defined by IEEE -802.3 Annex 31B. This mechanism pauses all traffic on the link and is therefore -called *link-wide PAUSE*. - -* **What it is**: A standard Ethernet frame with a globally reserved - destination MAC address (``01-80-C2-00-00-01``). This address is in a range - that standard IEEE 802.1D-compliant bridges do not forward. However, some - unmanaged or misconfigured bridges have been reported to forward these - frames, which can disrupt flow control across a network. - -* **How it works**: The frame contains a MAC Control opcode for PAUSE - (``0x0001``) and a ``pause_time`` value, telling the sender how long to - wait before sending more data frames. This time is specified in units of - "pause quantum", where one quantum is the time it takes to transmit 512 bits. - For example, one pause quantum is 51.2 microseconds on a 10 Mbit/s link, - and 512 nanoseconds on a 1 Gbit/s link. A ``pause_time`` of zero indicates - that the transmitter can resume transmission, even if a previous non-zero - pause time has not yet elapsed. - -* **Who uses it**: Any full-duplex link, from 10 Mbit/s to multi-gigabit speeds. - -3. Full-Duplex: Priority-based Flow Control (PFC) (IEEE 802.1Q Clause 36) -------------------------------------------------------------------------- -Priority-based Flow Control is an enhancement to the standard PAUSE mechanism -that allows flow control to be applied independently to different classes of -traffic, identified by their priority level. - -* **What it is**: PFC allows a receiver to pause traffic for one or more of the - 8 standard priority levels without stopping traffic for other priorities. - This is critical in data center environments for protocols that cannot - tolerate packet loss due to congestion (e.g., Fibre Channel over Ethernet - or RoCE). - -* **How it works**: PFC uses a specific PAUSE frame format. It shares the same - globally reserved destination MAC address (``01-80-C2-00-00-01``) as legacy - PAUSE frames but uses a unique opcode (``0x0101``). The frame payload - contains two key fields: - - - **``priority_enable_vector``**: An 8-bit mask where each bit corresponds to - one of the 8 priorities. If a bit is set to 1, it means the pause time - for that priority is active. - - **``time_vector``**: A list of eight 2-octet fields, one for each priority. - Each field specifies the ``pause_time`` for its corresponding priority, - measured in units of ``pause_quanta`` (the time to transmit 512 bits). - -.. note:: - When PFC is enabled for at least one priority on a port, the standard - **link-wide PAUSE** (IEEE 802.3 Annex 31B) must be disabled for that port. - The two mechanisms are mutually exclusive (IEEE 802.1Q Clause 36). - -Configuring Flow Control -======================== - -Link-wide PAUSE and Priority-based Flow Control are configured with different -tools. - -Configuring Link-wide PAUSE with ``ethtool`` (IEEE 802.3 Annex 31B) -------------------------------------------------------------------- -Use ``ethtool -a `` to view and ``ethtool -A `` to change -the link-wide PAUSE settings. - -.. code-block:: bash - - # View current link-wide PAUSE settings - ethtool -a eth0 - - # Enable RX and TX pause, with autonegotiation - ethtool -A eth0 autoneg on rx on tx on - -**Key Configuration Concepts**: - -* **Pause Autoneg vs Generic Autoneg**: ``ethtool -A ... autoneg {on,off}`` - controls **Pause Autoneg** (Annex 31B) only. It is independent from the - **Generic link autonegotiation** configured with ``ethtool -s``. A device can - have Generic autoneg **on** while Pause Autoneg is **off**, and vice versa. - -* **If Pause Autoneg is off** (``-A ... autoneg off``): the device will **not** - advertise pause in the PHY. The MAC PAUSE state is **forced** according to - ``rx``/``tx`` and does not depend on partner capabilities or resolution. - Ensure the peer is configured complementarily for PAUSE to be effective. - -* **If generic autoneg is off** but **Pause Autoneg is on**, the pause policy - is **remembered** by the kernel and applied later when Generic autoneg is - enabled again. - -* **Autonegotiation Mode**: The PHY will *advertise* the ``rx`` and ``tx`` - capabilities. The final active state is determined by what both sides of the - link agree on. See the "PHY (Physical Layer Transceiver)" section below, - especially the *Resolution* subsection, for details of the negotiation rules. - -* **Forced Mode**: This mode is necessary when autonegotiation is not used or - not possible. This includes links where one or both partners have - autonegotiation disabled, or in setups without a PHY (e.g., direct - MAC-to-MAC connections). The driver bypasses PHY advertisement and - directly forces the MAC into the specified ``rx``/``tx`` state. The - configuration on both sides of the link must be complementary. For - example, if one side is set to ``tx on`` ``rx off``, the link partner must be - set to ``tx off`` ``rx on`` for flow control to function correctly. - -Configuring PFC with ``dcb`` (IEEE 802.1Q Clause 36) ----------------------------------------------------- -PFC is part of the Data Center Bridging (DCB) subsystem and is managed with the -``dcb`` tool (iproute2). Some deployments use ``dcbtool`` (lldpad) instead; this -document shows ``dcb(8)`` examples. - -**Viewing PFC Settings**: - -.. code-block:: text - - $ dcb pfc show dev eth0 - pfc-cap 8 macsec-bypass off delay 4096 - prio-pfc 0:off 1:off 2:off 3:off 4:off 5:off 6:on 7:on - -This shows the PFC state (on/off) for each priority (0-7). - -**Changing PFC Settings**: - -.. code-block:: bash - - # Enable PFC on priorities 6 and 7, leaving others as they are - $ dcb pfc set dev eth0 prio-pfc 6:on 7:on - - # Disable PFC for all priorities except 6 and 7 - $ dcb pfc set dev eth0 prio-pfc all:off 6:on 7:on - -Monitoring Flow Control -======================= - -The standard way to check if flow control is actively being used is to view the -pause-related statistics. - -**Monitoring Link-wide PAUSE**: -Use ``ethtool --include-statistics -a ``. - -.. code-block:: text - - $ ethtool --include-statistics -a eth0 - Pause parameters for eth0: - ... - Statistics: - tx_pause_frames: 0 - rx_pause_frames: 0 - -**Monitoring PFC**: -PFC statistics (sent and received frames per priority) are available -through the ``dcb`` tool. - -.. code-block:: text - - $ dcb pfc show dev eth0 requests indications - requests 0:0 1:0 2:0 3:1024 4:2048 5:0 6:0 7:0 - indications 0:0 1:0 2:0 3:512 4:4096 5:0 6:0 7:0 - -The ``requests`` counters track transmitted PFC frames (TX), and the -``indications`` counters track received PFC frames (RX). - -Link-wide PAUSE Autonegotiation Details -======================================= - -The autonegotiation process for link-wide PAUSE is managed by the PHY and -involves advertising capabilities and resolving the outcome. - -* Terminology (link-wide PAUSE): - - - **Symmetric pause**: both directions are paused when requested (TX+RX - enabled). - - **Asymmetric pause**: only one direction is paused (e.g., RX-only or - TX-only). - - In IEEE 802.3 advertisement/resolution, symmetric/asymmetric are encoded - using two bits (Pause/Asym) and resolved per the standard truth tables - below. - -* **Advertisement**: The PHY advertises the MAC's flow control capabilities. - This is done using two bits in the advertisement register: "Symmetric - Pause" (Pause) and "Asymmetric Pause" (Asym). These bits should be - interpreted as a combined value, not as independent flags. The kernel - converts the user's ``rx`` and ``tx`` settings into this two-bit value as - follows: - - .. code-block:: text - - tx rx | Pause Asym - -------+------------- - 0 0 | 0 0 - 0 1 | 1 1 - 1 0 | 0 1 - 1 1 | 1 0 - -* **Resolution**: After negotiation, the PHY reports the link partner's - advertised Pause and Asym bits. The final flow control mode is determined - by the combination of the local and partner advertisements, according to - the IEEE 802.3 standard: - - .. code-block:: text - - Local Device | Link Partner | Result - Pause Asym | Pause Asym | - -------------------+--------------------+--------- - 0 X | 0 X | Disabled - 0 1 | 1 0 | Disabled - 0 1 | 1 1 | TX only - 1 0 | 0 X | Disabled - 1 X | 1 X | TX + RX - 1 1 | 0 1 | RX only - - It is important to note that the advertised bits reflect the *current - configuration* of the MAC, which may not represent its full hardware - capabilities. - -Kernel Policy: "Set and Trust" -============================== - -The ethtool pause API is defined as a **wish policy** for -IEEE 802.3 link-wide PAUSE only. A user request is always accepted -as the preferred configuration, but it may not be possible to apply -it in all link states. - -Key constraints: - -- Link-wide PAUSE is not valid on half-duplex links. -- Link-wide PAUSE cannot be used together with Priority-based Flow Control - (PFC, IEEE 802.1Q Clause 36). -- If autonegotiation is active and the link is currently down, the future - mode is not yet known. - -Because of these constraints, the kernel stores the requested setting -and applies it only when the link is in a compatible state. - -Implications for userspace: - -1. Set once (the "wish"): the requested Rx/Tx PAUSE policy is - remembered even if it cannot be applied immediately. -2. Applied conditionally: when the link comes up, the kernel enables - PAUSE only if the active mode allows it. - -Component Roles in Flow Control -=============================== - -The configuration of flow control involves several components, each with a -distinct role. - -The MAC (Media Access Controller) ---------------------------------- -The MAC is the hardware component that actually sends and receives PAUSE -frames. Its capabilities define the upper limit of what the driver can support. -For link-wide PAUSE, MACs can vary in their support for symmetric (both -directions) or asymmetric (independent TX/RX) flow control. - -For PFC, the MAC must be capable of generating and interpreting the -priority-based PAUSE frames and managing separate pause states for each -traffic class. - -Many MACs also implement automatic PAUSE frame transmission based on the fill -level of their internal RX FIFO. This is typically configured with two -thresholds: - -* **FLOW_ON (High Water Mark)**: When the RX FIFO usage reaches this - threshold, the MAC automatically transmits a PAUSE frame to stop the sender. - -* **FLOW_OFF (Low Water Mark)**: When the RX FIFO usage drops below this - threshold, the MAC transmits a PAUSE frame with a quantum of zero to tell - the sender it can resume transmission. - -The PHY (Physical Layer Transceiver) ------------------------------------- -The PHY's role is distinct for each flow control mechanism: - -* **Link-wide PAUSE**: During the autonegotiation process, the PHY is - responsible for advertising the device's flow control capabilities. See the - "Link-wide PAUSE Autonegotiation Details" section for more information. - -* **Half-Duplex Collision-Based Flow Control**: The PHY is fundamental to the - CSMA/CD process. It performs carrier sensing (checking if the line is idle) - and collision detection, which is the mechanism leveraged to throttle the - sender. - -* **Priority-based Flow Control (PFC)**: The PHY is not directly involved in - negotiating PFC capabilities. Its role is to establish the physical link. - PFC negotiation happens at a higher layer via the Data Center Bridging - Capability Exchange Protocol (DCBX). - -User Space Interface -==================== -The primary user space tools are ``ethtool`` for link-wide PAUSE and ``dcb`` for -PFC. They communicate with the kernel to configure the network device driver -and underlying hardware. - -**Link-wide PAUSE Netlink Interface (``ethtool``)** - -See the ethtool Netlink spec (``Documentation/netlink/specs/ethtool.yaml``) -for the authoritative definition of the Pause control and Pause statistics -attributes. The generated UAPI is in -``include/uapi/linux/ethtool_netlink_generated.h``. - -**PFC Netlink Interface (``dcb``)** - -The authoritative definitions for DCB/PFC netlink attributes and commands are in -``include/uapi/linux/dcbnl.h``. See also the ``dcb(8)`` manual page and the DCB -subsystem documentation for userspace configuration details. - diff --git a/Documentation/networking/index.rst b/Documentation/networking/index.rst index 52aafdc85f6a..c775cababc8c 100644 --- a/Documentation/networking/index.rst +++ b/Documentation/networking/index.rst @@ -55,7 +55,6 @@ Contents: eql fib_trie filter - flow_control generic-hdlc generic_netlink ../netlink/specs/index diff --git a/Documentation/networking/phy.rst b/Documentation/networking/phy.rst index 40cc0a988d60..b0f2ef83735d 100644 --- a/Documentation/networking/phy.rst +++ b/Documentation/networking/phy.rst @@ -343,8 +343,16 @@ Some of the interface modes are described below: Pause frames / flow control =========================== -For detailed link-wide PAUSE and PFC behavior and configuration, see -flow_control.rst. +The PHY does not participate directly in flow control/pause frames except by +making sure that the SUPPORTED_Pause and SUPPORTED_AsymPause bits are set in +MII_ADVERTISE to indicate towards the link partner that the Ethernet MAC +controller supports such a thing. Since flow control/pause frames generation +involves the Ethernet MAC driver, it is recommended that this driver takes care +of properly indicating advertisement and support for such features by setting +the SUPPORTED_Pause and SUPPORTED_AsymPause bits accordingly. This can be done +either before or after phy_connect() and/or as a result of implementing the +ethtool::set_pauseparam feature. + Keeping Close Tabs on the PAL ============================= -- cgit v1.2.3 From d9fcb34f8b3bf793fadb591aafc76f27ecb48ff0 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Fri, 26 Sep 2025 03:15:58 +0800 Subject: dt-bindings: net: sun8i-emac: Add A523 GMAC200 compatible The Allwinner A523 SoC family has a second Ethernet controller, called the GMAC200 in the BSP and T527 datasheet, and referred to as GMAC1 for numbering. This controller, according to BSP sources, is fully compatible with a slightly newer version of the Synopsys DWMAC core. The glue layer around the controller is the same as found around older DWMAC cores on Allwinner SoCs. The only slight difference is that since this is the second controller on the SoC, the register for the clock delay controls is at a different offset. Last, the integration includes a dedicated clock gate for the memory bus and the whole thing is put in a separately controllable power domain. Add a compatible string entry for it, and work in the requirements for a second clock and a power domain. Reviewed-by: Rob Herring (Arm) Acked-by: Conor Dooley Signed-off-by: Chen-Yu Tsai Link: https://patch.msgid.link/20250925191600.3306595-2-wens@kernel.org Signed-off-by: Paolo Abeni --- .../bindings/net/allwinner,sun8i-a83t-emac.yaml | 95 +++++++++++++++++++++- 1 file changed, 93 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml index 2ac709a4c472..fc62fb2a68ac 100644 --- a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml +++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml @@ -10,6 +10,21 @@ maintainers: - Chen-Yu Tsai - Maxime Ripard +# We need a select here so we don't match all nodes with 'snps,dwmac' +select: + properties: + compatible: + contains: + enum: + - allwinner,sun8i-a83t-emac + - allwinner,sun8i-h3-emac + - allwinner,sun8i-r40-gmac + - allwinner,sun8i-v3s-emac + - allwinner,sun50i-a64-emac + - allwinner,sun55i-a523-gmac200 + required: + - compatible + properties: compatible: oneOf: @@ -26,6 +41,9 @@ properties: - allwinner,sun50i-h616-emac0 - allwinner,sun55i-a523-gmac0 - const: allwinner,sun50i-a64-emac + - items: + - const: allwinner,sun55i-a523-gmac200 + - const: snps,dwmac-4.20a reg: maxItems: 1 @@ -37,14 +55,21 @@ properties: const: macirq clocks: - maxItems: 1 + minItems: 1 + maxItems: 2 clock-names: - const: stmmaceth + minItems: 1 + items: + - const: stmmaceth + - const: mbus phy-supply: description: PHY regulator + power-domains: + maxItems: 1 + syscon: $ref: /schemas/types.yaml#/definitions/phandle description: @@ -191,6 +216,42 @@ allOf: - mdio-parent-bus - mdio@1 + - if: + properties: + compatible: + contains: + const: allwinner,sun55i-a523-gmac200 + then: + properties: + clocks: + minItems: 2 + clock-names: + minItems: 2 + tx-internal-delay-ps: + default: 0 + minimum: 0 + maximum: 700 + multipleOf: 100 + description: + External RGMII PHY TX clock delay chain value in ps. + rx-internal-delay-ps: + default: 0 + minimum: 0 + maximum: 3100 + multipleOf: 100 + description: + External RGMII PHY TX clock delay chain value in ps. + required: + - power-domains + else: + properties: + clocks: + maxItems: 1 + clock-names: + maxItems: 1 + power-domains: false + + unevaluatedProperties: false examples: @@ -323,4 +384,34 @@ examples: }; }; + - | + ethernet@4510000 { + compatible = "allwinner,sun55i-a523-gmac200", + "snps,dwmac-4.20a"; + reg = <0x04510000 0x10000>; + clocks = <&ccu 117>, <&ccu 79>; + clock-names = "stmmaceth", "mbus"; + resets = <&ccu 43>; + reset-names = "stmmaceth"; + interrupts = <0 47 4>; + interrupt-names = "macirq"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins>; + power-domains = <&pck600 4>; + syscon = <&syscon>; + phy-handle = <&ext_rgmii_phy_1>; + phy-mode = "rgmii-id"; + snps,fixed-burst; + snps,axi-config = <&gmac1_stmmac_axi_setup>; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + ext_rgmii_phy_1: ethernet-phy@1 { + reg = <1>; + }; + }; + }; ... -- cgit v1.2.3 From 9d602da0c9919f36d55b051951c1fd4f3dc24593 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 30 Jul 2025 19:34:22 +0200 Subject: dt-bindings: mfd: qnap,ts433-mcu: Add qnap,ts233-mcu compatible The same MCU is used on other devices of the series with a slightly different set of features, like the number of LEDs. Add a compatible for the MCU used in the TS233 variant. Signed-off-by: Heiko Stuebner Acked-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250730173423.1878599-2-heiko@sntech.de Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml b/Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml index 877078ac172f..fe9e06cfb933 100644 --- a/Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml +++ b/Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml @@ -16,6 +16,7 @@ description: properties: compatible: enum: + - qnap,ts233-mcu - qnap,ts433-mcu patternProperties: -- cgit v1.2.3 From 597b398bc27c84f3998c2169ad7ce74e8404533a Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 30 Jul 2025 19:22:47 +0200 Subject: dt-bindings: mfd: qnap,ts433-mcu: Allow nvmem-layout child node The MCU has an eeprom memory connected internally, that for example contains some mac-addresses for the soc gmac controllers. Therefore allow defining the nvmem-layout for the eeprom. Signed-off-by: Heiko Stuebner Acked-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250730172248.1875122-2-heiko@sntech.de Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml b/Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml index fe9e06cfb933..5454d9403cad 100644 --- a/Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml +++ b/Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml @@ -19,6 +19,9 @@ properties: - qnap,ts233-mcu - qnap,ts433-mcu + nvmem-layout: + $ref: /schemas/nvmem/layouts/nvmem-layout.yaml + patternProperties: "^fan-[0-9]+$": $ref: /schemas/hwmon/fan-common.yaml# -- cgit v1.2.3 From 58091331b59eebc9bf725178be87021d20e4ec2d Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 7 Aug 2025 08:29:08 -0500 Subject: dt-bindings: mfd: aspeed-lpc: Add missing "clocks" property on lpc-snoop node The ASpeed lpc-snoop nodes have a "clocks" property which isn't documented. It looks like all the LPC child devices have the same clock source. Perhaps it is the parent device that should have the clock, but it's too late for that. The driver for lpc-snoop requires a clock to be present. Signed-off-by: "Rob Herring (Arm)" Acked-by: Andrew Jeffery Link: https://lore.kernel.org/r/20250807132909.3291770-1-robh@kernel.org Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml b/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml index d88854e60b7f..f329223cec07 100644 --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml @@ -137,6 +137,9 @@ patternProperties: reg: maxItems: 1 + clocks: + maxItems: 1 + interrupts: maxItems: 1 -- cgit v1.2.3 From c1c8ed81e200126b711ee5b012e1fa9a0da2cbe1 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Tue, 12 Aug 2025 15:33:18 -0500 Subject: dt-bindings: mfd: syscon: Add "marvell,armada-3700-usb2-host-device-misc" compatible Add the "marvell,armada-3700-usb2-host-device-misc" compatible which is already in use. Signed-off-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250812203319.729300-1-robh@kernel.org Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/syscon.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 27672adeb1fe..1f381d159af8 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -79,6 +79,7 @@ select: - marvell,armada-3700-cpu-misc - marvell,armada-3700-nb-pm - marvell,armada-3700-avs + - marvell,armada-3700-usb2-host-device-misc - marvell,armada-3700-usb2-host-misc - marvell,dove-global-config - mediatek,mt2701-pctl-a-syscfg @@ -185,6 +186,7 @@ properties: - marvell,armada-3700-cpu-misc - marvell,armada-3700-nb-pm - marvell,armada-3700-avs + - marvell,armada-3700-usb2-host-device-misc - marvell,armada-3700-usb2-host-misc - marvell,dove-global-config - mediatek,mt2701-pctl-a-syscfg -- cgit v1.2.3 From 3d6a17fccc2832d8bc84420a634330941509d6e1 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 25 Aug 2025 10:12:02 +0200 Subject: dt-bindings: mfd: Move embedded controllers to own directory Move several embedded controller bindings (like ChromeOS EC, Gateworks System Controller and Kontron sl28cpld Board Management) to new subdirectory "embedded-controller" matching their purpose. An embedded controller (EC) is a discrete component that contains a microcontroller (i.e. a small CPU running a small firmware without operating system) mounted into a larger computer system running a fully fledged operating system that needs to utilize the embedded controller as part of its operation. So far the EC bindings were split between "mfd" and "platform" directory. MFD name comes from Linux, not hardware, and "platform" is a bit too generic. Rename Gateworks GSC and Huawei Gaokun filenames to match compatible, as preferred for bindings. Acked-by: Michael Walle # for sl28cpld Reviewed-by: Linus Walleij Signed-off-by: Krzysztof Kozlowski Acked-by: Mark Brown Reviewed-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250825081201.9775-2-krzysztof.kozlowski@linaro.org Signed-off-by: Lee Jones --- .../embedded-controller/acer,aspire1-ec.yaml | 60 ++++ .../embedded-controller/google,cros-ec.yaml | 326 +++++++++++++++++++++ .../bindings/embedded-controller/gw,gsc.yaml | 193 ++++++++++++ .../embedded-controller/huawei,gaokun3-ec.yaml | 124 ++++++++ .../embedded-controller/kontron,sl28cpld.yaml | 153 ++++++++++ .../embedded-controller/lenovo,yoga-c630-ec.yaml | 83 ++++++ .../embedded-controller/microsoft,surface-sam.yaml | 47 +++ .../bindings/gpio/kontron,sl28cpld-gpio.yaml | 2 +- .../bindings/hwmon/kontron,sl28cpld-hwmon.yaml | 2 +- .../kontron,sl28cpld-intc.yaml | 2 +- .../devicetree/bindings/mfd/gateworks-gsc.yaml | 193 ------------ .../devicetree/bindings/mfd/google,cros-ec.yaml | 326 --------------------- .../devicetree/bindings/mfd/kontron,sl28cpld.yaml | 153 ---------- .../bindings/platform/acer,aspire1-ec.yaml | 60 ---- .../bindings/platform/huawei,gaokun-ec.yaml | 124 -------- .../bindings/platform/lenovo,yoga-c630-ec.yaml | 83 ------ .../bindings/platform/microsoft,surface-sam.yaml | 47 --- .../bindings/pwm/google,cros-ec-pwm.yaml | 2 +- .../bindings/pwm/kontron,sl28cpld-pwm.yaml | 2 +- .../devicetree/bindings/remoteproc/mtk,scp.yaml | 4 +- .../bindings/sound/google,cros-ec-codec.yaml | 2 +- .../bindings/watchdog/kontron,sl28cpld-wdt.yaml | 2 +- 22 files changed, 995 insertions(+), 995 deletions(-) create mode 100644 Documentation/devicetree/bindings/embedded-controller/acer,aspire1-ec.yaml create mode 100644 Documentation/devicetree/bindings/embedded-controller/google,cros-ec.yaml create mode 100644 Documentation/devicetree/bindings/embedded-controller/gw,gsc.yaml create mode 100644 Documentation/devicetree/bindings/embedded-controller/huawei,gaokun3-ec.yaml create mode 100644 Documentation/devicetree/bindings/embedded-controller/kontron,sl28cpld.yaml create mode 100644 Documentation/devicetree/bindings/embedded-controller/lenovo,yoga-c630-ec.yaml create mode 100644 Documentation/devicetree/bindings/embedded-controller/microsoft,surface-sam.yaml delete mode 100644 Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml delete mode 100644 Documentation/devicetree/bindings/mfd/google,cros-ec.yaml delete mode 100644 Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml delete mode 100644 Documentation/devicetree/bindings/platform/acer,aspire1-ec.yaml delete mode 100644 Documentation/devicetree/bindings/platform/huawei,gaokun-ec.yaml delete mode 100644 Documentation/devicetree/bindings/platform/lenovo,yoga-c630-ec.yaml delete mode 100644 Documentation/devicetree/bindings/platform/microsoft,surface-sam.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/embedded-controller/acer,aspire1-ec.yaml b/Documentation/devicetree/bindings/embedded-controller/acer,aspire1-ec.yaml new file mode 100644 index 000000000000..01ee61768527 --- /dev/null +++ b/Documentation/devicetree/bindings/embedded-controller/acer,aspire1-ec.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/embedded-controller/acer,aspire1-ec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Acer Aspire 1 Embedded Controller + +maintainers: + - Nikita Travkin + +description: + The Acer Aspire 1 laptop uses an embedded controller to control battery + and charging as well as to provide a set of misc features such as the + laptop lid status and HPD events for the USB Type-C DP alt mode. + +properties: + compatible: + const: acer,aspire1-ec + + reg: + const: 0x76 + + interrupts: + maxItems: 1 + + connector: + $ref: /schemas/connector/usb-connector.yaml# + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + embedded-controller@76 { + compatible = "acer,aspire1-ec"; + reg = <0x76>; + + interrupts-extended = <&tlmm 30 IRQ_TYPE_LEVEL_LOW>; + + connector { + compatible = "usb-c-connector"; + + port { + ec_dp_in: endpoint { + remote-endpoint = <&mdss_dp_out>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/embedded-controller/google,cros-ec.yaml b/Documentation/devicetree/bindings/embedded-controller/google,cros-ec.yaml new file mode 100644 index 000000000000..3ab5737c9a8f --- /dev/null +++ b/Documentation/devicetree/bindings/embedded-controller/google,cros-ec.yaml @@ -0,0 +1,326 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/embedded-controller/google,cros-ec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ChromeOS Embedded Controller + +maintainers: + - Benson Leung + - Guenter Roeck + +description: + Google's ChromeOS EC is a microcontroller which talks to the AP and + implements various functions such as keyboard and battery charging. + The EC can be connected through various interfaces (I2C, SPI, and others) + and the compatible string specifies which interface is being used. + +properties: + compatible: + oneOf: + - description: + For implementations of the EC connected through I2C. + const: google,cros-ec-i2c + - description: + For implementations of the EC connected through SPI. + const: google,cros-ec-spi + - description: + For implementations of the FPMCU connected through SPI. + items: + - const: google,cros-ec-fp + - const: google,cros-ec-spi + - description: + For implementations of the EC connected through RPMSG. + const: google,cros-ec-rpmsg + - description: + For implementations of the EC connected through UART. + const: google,cros-ec-uart + + controller-data: true + + google,cros-ec-spi-pre-delay: + description: + This property specifies the delay in usecs between the + assertion of the CS and the first clock pulse. + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0 + + google,cros-ec-spi-msg-delay: + description: + This property specifies the delay in usecs between messages. + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0 + + google,has-vbc-nvram: + description: + Some implementations of the EC include a small nvram space used to + store verified boot context data. This boolean flag is used to specify + whether this nvram is present or not. + type: boolean + + mediatek,rpmsg-name: + description: + Must be defined if the cros-ec is a rpmsg device for a Mediatek + ARM Cortex M4 Co-processor. Contains the name of the rpmsg + device. Used to match the subnode to the rpmsg device announced by + the SCP. + $ref: /schemas/types.yaml#/definitions/string + + spi-max-frequency: true + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + reset-gpios: + maxItems: 1 + + boot0-gpios: + maxItems: 1 + description: Assert for bootloader mode. + + vdd-supply: true + + wakeup-source: + description: Button can wake-up the system. + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + '#gpio-cells': + const: 2 + + gpio-controller: true + + typec: + $ref: /schemas/chrome/google,cros-ec-typec.yaml# + + ec-pwm: + $ref: /schemas/pwm/google,cros-ec-pwm.yaml# + deprecated: true + + pwm: + $ref: /schemas/pwm/google,cros-ec-pwm.yaml# + + keyboard-controller: + $ref: /schemas/input/google,cros-ec-keyb.yaml# + + proximity: + $ref: /schemas/iio/proximity/google,cros-ec-mkbp-proximity.yaml# + + codecs: + type: object + additionalProperties: false + + properties: + '#address-cells': + const: 2 + + '#size-cells': + const: 1 + + patternProperties: + "^ec-codec@[a-f0-9]+$": + type: object + $ref: /schemas/sound/google,cros-ec-codec.yaml# + + required: + - "#address-cells" + - "#size-cells" + + cbas: + type: object + + description: + This device is used to signal when a detachable base is attached + to a Chrome OS tablet. This device cannot be detected at runtime. + + properties: + compatible: + const: google,cros-cbas + + required: + - compatible + + additionalProperties: false + +patternProperties: + "^i2c-tunnel[0-9]*$": + type: object + $ref: /schemas/i2c/google,cros-ec-i2c-tunnel.yaml# + + "^regulator@[0-9]+$": + type: object + $ref: /schemas/regulator/google,cros-ec-regulator.yaml# + + "^extcon[0-9]*$": + type: object + $ref: /schemas/extcon/extcon-usbc-cros-ec.yaml# + +required: + - compatible + +allOf: + - if: + properties: + compatible: + not: + contains: + const: google,cros-ec-spi + then: + properties: + controller-data: false + google,cros-ec-spi-pre-delay: false + google,cros-ec-spi-msg-delay: false + spi-max-frequency: false + else: + $ref: /schemas/spi/spi-peripheral-props.yaml + + - if: + properties: + compatible: + not: + contains: + const: google,cros-ec-rpmsg + then: + properties: + mediatek,rpmsg-name: false + + - if: + properties: + compatible: + not: + contains: + enum: + - google,cros-ec-rpmsg + - google,cros-ec-uart + then: + required: + - reg + - interrupts + + - if: + properties: + compatible: + contains: + const: google,cros-ec-fp + then: + properties: + '#address-cells': false + '#size-cells': false + typec: false + ec-pwm: false + kbd-led-backlight: false + keyboard-controller: false + proximity: false + codecs: false + cbas: false + + patternProperties: + "^i2c-tunnel[0-9]*$": false + "^regulator@[0-9]+$": false + "^extcon[0-9]*$": false + + # Using additionalProperties: false here and + # listing true properties doesn't work + + required: + - reset-gpios + - boot0-gpios + - vdd-supply + else: + properties: + reset-gpios: false + boot0-gpios: false + vdd-supply: false + +additionalProperties: false + +examples: + # Example for I2C + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + cros-ec@1e { + compatible = "google,cros-ec-i2c"; + reg = <0x1e>; + interrupts = <6 0>; + interrupt-parent = <&gpio0>; + }; + }; + + # Example for SPI + - | + #include + #include + + spi { + #address-cells = <1>; + #size-cells = <0>; + + cros-ec@0 { + compatible = "google,cros-ec-spi"; + reg = <0x0>; + google,cros-ec-spi-msg-delay = <30>; + google,cros-ec-spi-pre-delay = <10>; + interrupts = <99 0>; + interrupt-parent = <&gpio7>; + spi-max-frequency = <5000000>; + #gpio-cells = <2>; + gpio-controller; + + proximity { + compatible = "google,cros-ec-mkbp-proximity"; + }; + + cbas { + compatible = "google,cros-cbas"; + }; + }; + }; + + # Example for RPMSG + - | + scp0 { + cros-ec { + compatible = "google,cros-ec-rpmsg"; + }; + }; + + # Example for FPMCU + - | + spi { + #address-cells = <0x1>; + #size-cells = <0x0>; + + ec@0 { + compatible = "google,cros-ec-fp", "google,cros-ec-spi"; + reg = <0x0>; + interrupt-parent = <&gpio_controller>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency = <3000000>; + reset-gpios = <&gpio_controller 5 GPIO_ACTIVE_LOW>; + boot0-gpios = <&gpio_controller 10 GPIO_ACTIVE_HIGH>; + vdd-supply = <&pp3300_fp_mcu>; + }; + }; + + # Example for UART + - | + serial { + cros-ec { + compatible = "google,cros-ec-uart"; + }; + }; +... diff --git a/Documentation/devicetree/bindings/embedded-controller/gw,gsc.yaml b/Documentation/devicetree/bindings/embedded-controller/gw,gsc.yaml new file mode 100644 index 000000000000..82d4b2dadbae --- /dev/null +++ b/Documentation/devicetree/bindings/embedded-controller/gw,gsc.yaml @@ -0,0 +1,193 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/embedded-controller/gw,gsc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Gateworks System Controller + +description: | + The Gateworks System Controller (GSC) is a device present across various + Gateworks product families that provides a set of system related features + such as the following (refer to the board hardware user manuals to see what + features are present) + - Watchdog Timer + - GPIO + - Pushbutton controller + - Hardware monitor with ADC's for temperature and voltage rails and + fan controller + +maintainers: + - Tim Harvey + +properties: + $nodename: + pattern: "gsc@[0-9a-f]{1,2}" + compatible: + const: gw,gsc + + reg: + description: I2C device address + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + adc: + type: object + additionalProperties: false + description: Optional hardware monitoring module + + properties: + compatible: + const: gw,gsc-adc + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + patternProperties: + "^channel@[0-9a-f]+$": + type: object + additionalProperties: false + description: | + Properties for a single ADC which can report cooked values + (i.e. temperature sensor based on thermister), raw values + (i.e. voltage rail with a pre-scaling resistor divider). + + properties: + reg: + description: Register of the ADC + maxItems: 1 + + label: + description: Name of the ADC input + + gw,mode: + description: | + conversion mode: + 0 - temperature, in C*10 + 1 - pre-scaled 24-bit voltage value + 2 - scaled voltage based on an optional resistor divider + and optional offset + 3 - pre-scaled 16-bit voltage value + 4 - fan tach input to report RPM's + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3, 4] + + gw,voltage-divider-ohms: + description: Values of resistors for divider on raw ADC input + maxItems: 2 + items: + minimum: 1000 + maximum: 1000000 + + gw,voltage-offset-microvolt: + description: | + A positive voltage offset to apply to a raw ADC + (i.e. to compensate for a diode drop). + minimum: 0 + maximum: 1000000 + + required: + - gw,mode + - reg + - label + + required: + - compatible + - "#address-cells" + - "#size-cells" + +patternProperties: + "^fan-controller@[0-9a-f]+$": + type: object + additionalProperties: false + description: Optional fan controller + + properties: + compatible: + const: gw,gsc-fan + + reg: + description: The fan controller base address + maxItems: 1 + + required: + - compatible + - reg + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - "#interrupt-cells" + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + #include + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + gsc@20 { + compatible = "gw,gsc"; + reg = <0x20>; + interrupt-parent = <&gpio1>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + adc { + compatible = "gw,gsc-adc"; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { /* A0: Board Temperature */ + reg = <0x00>; + label = "temp"; + gw,mode = <0>; + }; + + channel@2 { /* A1: Input Voltage (raw ADC) */ + reg = <0x02>; + label = "vdd_vin"; + gw,mode = <1>; + gw,voltage-divider-ohms = <22100 1000>; + gw,voltage-offset-microvolt = <800000>; + }; + + channel@b { /* A2: Battery voltage */ + reg = <0x0b>; + label = "vdd_bat"; + gw,mode = <1>; + }; + }; + + fan-controller@2c { + compatible = "gw,gsc-fan"; + reg = <0x2c>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/embedded-controller/huawei,gaokun3-ec.yaml b/Documentation/devicetree/bindings/embedded-controller/huawei,gaokun3-ec.yaml new file mode 100644 index 000000000000..cd9e65b6c2ea --- /dev/null +++ b/Documentation/devicetree/bindings/embedded-controller/huawei,gaokun3-ec.yaml @@ -0,0 +1,124 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/embedded-controller/huawei,gaokun3-ec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Huawei Matebook E Go Embedded Controller + +maintainers: + - Pengyu Luo + +description: + Different from other Qualcomm Snapdragon sc8180x and sc8280xp-based + machines, the Huawei Matebook E Go tablets use embedded controllers + while others use a system called PMIC GLink which handles battery, + UCSI, USB Type-C DP Alt Mode. In addition, Huawei's implementation + also handles additional features, such as charging thresholds, FN + lock, smart charging, tablet lid status, thermal sensors, and more. + +properties: + compatible: + enum: + - huawei,gaokun3-ec + + reg: + const: 0x38 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + interrupts: + maxItems: 1 + +patternProperties: + '^connector@[01]$': + $ref: /schemas/connector/usb-connector.yaml# + + properties: + reg: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + embedded-controller@38 { + compatible = "huawei,gaokun3-ec"; + reg = <0x38>; + + interrupts-extended = <&tlmm 107 IRQ_TYPE_LEVEL_LOW>; + + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + ucsi0_ss_in: endpoint { + remote-endpoint = <&usb_0_qmpphy_out>; + }; + }; + + port@1 { + reg = <1>; + + ucsi0_sbu: endpoint { + remote-endpoint = <&usb0_sbu_mux>; + }; + }; + }; + }; + + connector@1 { + compatible = "usb-c-connector"; + reg = <1>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + ucsi1_ss_in: endpoint { + remote-endpoint = <&usb_1_qmpphy_out>; + }; + }; + + port@1 { + reg = <1>; + + ucsi1_sbu: endpoint { + remote-endpoint = <&usb1_sbu_mux>; + }; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/embedded-controller/kontron,sl28cpld.yaml b/Documentation/devicetree/bindings/embedded-controller/kontron,sl28cpld.yaml new file mode 100644 index 000000000000..0b752f3baaa9 --- /dev/null +++ b/Documentation/devicetree/bindings/embedded-controller/kontron,sl28cpld.yaml @@ -0,0 +1,153 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/embedded-controller/kontron,sl28cpld.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Kontron's sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + The board management controller may contain different IP blocks like + watchdog, fan monitoring, PWM controller, interrupt controller and a + GPIO controller. + +properties: + compatible: + const: kontron,sl28cpld + + reg: + description: + I2C device address. + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + "#interrupt-cells": + const: 2 + + interrupts: + maxItems: 1 + + interrupt-controller: true + +patternProperties: + "^gpio(@[0-9a-f]+)?$": + $ref: /schemas/gpio/kontron,sl28cpld-gpio.yaml + + "^hwmon(@[0-9a-f]+)?$": + $ref: /schemas/hwmon/kontron,sl28cpld-hwmon.yaml + + "^interrupt-controller(@[0-9a-f]+)?$": + $ref: /schemas/interrupt-controller/kontron,sl28cpld-intc.yaml + + "^pwm(@[0-9a-f]+)?$": + $ref: /schemas/pwm/kontron,sl28cpld-pwm.yaml + + "^watchdog(@[0-9a-f]+)?$": + $ref: /schemas/watchdog/kontron,sl28cpld-wdt.yaml + +required: + - "#address-cells" + - "#size-cells" + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + sl28cpld@4a { + compatible = "kontron,sl28cpld"; + reg = <0x4a>; + #address-cells = <1>; + #size-cells = <0>; + + watchdog@4 { + compatible = "kontron,sl28cpld-wdt"; + reg = <0x4>; + kontron,assert-wdt-timeout-pin; + }; + + hwmon@b { + compatible = "kontron,sl28cpld-fan"; + reg = <0xb>; + }; + + pwm@c { + compatible = "kontron,sl28cpld-pwm"; + reg = <0xc>; + #pwm-cells = <2>; + }; + + pwm@e { + compatible = "kontron,sl28cpld-pwm"; + reg = <0xe>; + #pwm-cells = <2>; + }; + + gpio@10 { + compatible = "kontron,sl28cpld-gpio"; + reg = <0x10>; + interrupts-extended = <&gpio2 6 + IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "a", "b", "c"; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio@15 { + compatible = "kontron,sl28cpld-gpio"; + reg = <0x15>; + interrupts-extended = <&gpio2 6 + IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio@1a { + compatible = "kontron,sl28cpld-gpo"; + reg = <0x1a>; + + gpio-controller; + #gpio-cells = <2>; + }; + + gpio@1b { + compatible = "kontron,sl28cpld-gpi"; + reg = <0x1b>; + + gpio-controller; + #gpio-cells = <2>; + }; + + interrupt-controller@1c { + compatible = "kontron,sl28cpld-intc"; + reg = <0x1c>; + interrupts-extended = <&gpio2 6 + IRQ_TYPE_EDGE_FALLING>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/embedded-controller/lenovo,yoga-c630-ec.yaml b/Documentation/devicetree/bindings/embedded-controller/lenovo,yoga-c630-ec.yaml new file mode 100644 index 000000000000..a029b38e8dc0 --- /dev/null +++ b/Documentation/devicetree/bindings/embedded-controller/lenovo,yoga-c630-ec.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/embedded-controller/lenovo,yoga-c630-ec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lenovo Yoga C630 Embedded Controller. + +maintainers: + - Bjorn Andersson + +description: + The Qualcomm Snapdragon-based Lenovo Yoga C630 has an Embedded Controller + (EC) which handles things such as battery and USB Type-C. This binding + describes the interface, on an I2C bus, to this EC. + +properties: + compatible: + const: lenovo,yoga-c630-ec + + reg: + const: 0x70 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + interrupts: + maxItems: 1 + +patternProperties: + '^connector@[01]$': + $ref: /schemas/connector/usb-connector.yaml# + + properties: + reg: + maxItems: 1 + + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - |+ + #include + i2c1 { + clock-frequency = <400000>; + + #address-cells = <1>; + #size-cells = <0>; + + embedded-controller@70 { + compatible = "lenovo,yoga-c630-ec"; + reg = <0x70>; + + interrupts-extended = <&tlmm 20 IRQ_TYPE_LEVEL_HIGH>; + + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "source"; + data-role = "host"; + }; + + connector@1 { + compatible = "usb-c-connector"; + reg = <1>; + power-role = "source"; + data-role = "host"; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/embedded-controller/microsoft,surface-sam.yaml b/Documentation/devicetree/bindings/embedded-controller/microsoft,surface-sam.yaml new file mode 100644 index 000000000000..9202cfca0b35 --- /dev/null +++ b/Documentation/devicetree/bindings/embedded-controller/microsoft,surface-sam.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/embedded-controller/microsoft,surface-sam.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Surface System Aggregator Module (SAM, SSAM) + +maintainers: + - Konrad Dybcio + +description: | + Surface devices use a standardized embedded controller to let the + operating system interface with various hardware functions. The + specific functionalities are modeled as subdevices and matched on + five levels: domain, category, target, instance and function. + +properties: + compatible: + const: microsoft,surface-sam + + interrupts: + maxItems: 1 + + current-speed: true + +required: + - compatible + - interrupts + +additionalProperties: false + +examples: + - | + #include + uart { + embedded-controller { + compatible = "microsoft,surface-sam"; + + interrupts-extended = <&tlmm 91 IRQ_TYPE_EDGE_RISING>; + + pinctrl-0 = <&ssam_state>; + pinctrl-names = "default"; + + current-speed = <4000000>; + }; + }; diff --git a/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml b/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml index b032471831e7..02663d67eac7 100644 --- a/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml @@ -11,7 +11,7 @@ maintainers: description: | This module is part of the sl28cpld multi-function device. For more - details see ../mfd/kontron,sl28cpld.yaml. + details see ../embedded-controller/kontron,sl28cpld.yaml. There are three flavors of the GPIO controller, one full featured input/output with interrupt support (kontron,sl28cpld-gpio), one diff --git a/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml index 010333cb25c0..5803a1770cad 100644 --- a/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml +++ b/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml @@ -11,7 +11,7 @@ maintainers: description: | This module is part of the sl28cpld multi-function device. For more - details see ../mfd/kontron,sl28cpld.yaml. + details see ../embedded-controller/kontron,sl28cpld.yaml. properties: compatible: diff --git a/Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml index e8dfa6507f64..87df07beda59 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml @@ -11,7 +11,7 @@ maintainers: description: | This module is part of the sl28cpld multi-function device. For more - details see ../mfd/kontron,sl28cpld.yaml. + details see ../embedded-controller/kontron,sl28cpld.yaml. The following interrupts are available. All types and levels are fixed and handled by the board management controller. diff --git a/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml b/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml deleted file mode 100644 index dc379f3ebf24..000000000000 --- a/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml +++ /dev/null @@ -1,193 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/mfd/gateworks-gsc.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Gateworks System Controller - -description: | - The Gateworks System Controller (GSC) is a device present across various - Gateworks product families that provides a set of system related features - such as the following (refer to the board hardware user manuals to see what - features are present) - - Watchdog Timer - - GPIO - - Pushbutton controller - - Hardware monitor with ADC's for temperature and voltage rails and - fan controller - -maintainers: - - Tim Harvey - -properties: - $nodename: - pattern: "gsc@[0-9a-f]{1,2}" - compatible: - const: gw,gsc - - reg: - description: I2C device address - maxItems: 1 - - interrupts: - maxItems: 1 - - interrupt-controller: true - - "#interrupt-cells": - const: 1 - - "#address-cells": - const: 1 - - "#size-cells": - const: 0 - - adc: - type: object - additionalProperties: false - description: Optional hardware monitoring module - - properties: - compatible: - const: gw,gsc-adc - - "#address-cells": - const: 1 - - "#size-cells": - const: 0 - - patternProperties: - "^channel@[0-9a-f]+$": - type: object - additionalProperties: false - description: | - Properties for a single ADC which can report cooked values - (i.e. temperature sensor based on thermister), raw values - (i.e. voltage rail with a pre-scaling resistor divider). - - properties: - reg: - description: Register of the ADC - maxItems: 1 - - label: - description: Name of the ADC input - - gw,mode: - description: | - conversion mode: - 0 - temperature, in C*10 - 1 - pre-scaled 24-bit voltage value - 2 - scaled voltage based on an optional resistor divider - and optional offset - 3 - pre-scaled 16-bit voltage value - 4 - fan tach input to report RPM's - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1, 2, 3, 4] - - gw,voltage-divider-ohms: - description: Values of resistors for divider on raw ADC input - maxItems: 2 - items: - minimum: 1000 - maximum: 1000000 - - gw,voltage-offset-microvolt: - description: | - A positive voltage offset to apply to a raw ADC - (i.e. to compensate for a diode drop). - minimum: 0 - maximum: 1000000 - - required: - - gw,mode - - reg - - label - - required: - - compatible - - "#address-cells" - - "#size-cells" - -patternProperties: - "^fan-controller@[0-9a-f]+$": - type: object - additionalProperties: false - description: Optional fan controller - - properties: - compatible: - const: gw,gsc-fan - - reg: - description: The fan controller base address - maxItems: 1 - - required: - - compatible - - reg - -required: - - compatible - - reg - - interrupts - - interrupt-controller - - "#interrupt-cells" - - "#address-cells" - - "#size-cells" - -additionalProperties: false - -examples: - - | - #include - #include - i2c { - #address-cells = <1>; - #size-cells = <0>; - - gsc@20 { - compatible = "gw,gsc"; - reg = <0x20>; - interrupt-parent = <&gpio1>; - interrupts = <4 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - adc { - compatible = "gw,gsc-adc"; - #address-cells = <1>; - #size-cells = <0>; - - channel@0 { /* A0: Board Temperature */ - reg = <0x00>; - label = "temp"; - gw,mode = <0>; - }; - - channel@2 { /* A1: Input Voltage (raw ADC) */ - reg = <0x02>; - label = "vdd_vin"; - gw,mode = <1>; - gw,voltage-divider-ohms = <22100 1000>; - gw,voltage-offset-microvolt = <800000>; - }; - - channel@b { /* A2: Battery voltage */ - reg = <0x0b>; - label = "vdd_bat"; - gw,mode = <1>; - }; - }; - - fan-controller@2c { - compatible = "gw,gsc-fan"; - reg = <0x2c>; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml deleted file mode 100644 index 50f457090066..000000000000 --- a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml +++ /dev/null @@ -1,326 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/mfd/google,cros-ec.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: ChromeOS Embedded Controller - -maintainers: - - Benson Leung - - Guenter Roeck - -description: - Google's ChromeOS EC is a microcontroller which talks to the AP and - implements various functions such as keyboard and battery charging. - The EC can be connected through various interfaces (I2C, SPI, and others) - and the compatible string specifies which interface is being used. - -properties: - compatible: - oneOf: - - description: - For implementations of the EC connected through I2C. - const: google,cros-ec-i2c - - description: - For implementations of the EC connected through SPI. - const: google,cros-ec-spi - - description: - For implementations of the FPMCU connected through SPI. - items: - - const: google,cros-ec-fp - - const: google,cros-ec-spi - - description: - For implementations of the EC connected through RPMSG. - const: google,cros-ec-rpmsg - - description: - For implementations of the EC connected through UART. - const: google,cros-ec-uart - - controller-data: true - - google,cros-ec-spi-pre-delay: - description: - This property specifies the delay in usecs between the - assertion of the CS and the first clock pulse. - $ref: /schemas/types.yaml#/definitions/uint32 - default: 0 - - google,cros-ec-spi-msg-delay: - description: - This property specifies the delay in usecs between messages. - $ref: /schemas/types.yaml#/definitions/uint32 - default: 0 - - google,has-vbc-nvram: - description: - Some implementations of the EC include a small nvram space used to - store verified boot context data. This boolean flag is used to specify - whether this nvram is present or not. - type: boolean - - mediatek,rpmsg-name: - description: - Must be defined if the cros-ec is a rpmsg device for a Mediatek - ARM Cortex M4 Co-processor. Contains the name of the rpmsg - device. Used to match the subnode to the rpmsg device announced by - the SCP. - $ref: /schemas/types.yaml#/definitions/string - - spi-max-frequency: true - - reg: - maxItems: 1 - - interrupts: - maxItems: 1 - - reset-gpios: - maxItems: 1 - - boot0-gpios: - maxItems: 1 - description: Assert for bootloader mode. - - vdd-supply: true - - wakeup-source: - description: Button can wake-up the system. - - '#address-cells': - const: 1 - - '#size-cells': - const: 0 - - '#gpio-cells': - const: 2 - - gpio-controller: true - - typec: - $ref: /schemas/chrome/google,cros-ec-typec.yaml# - - ec-pwm: - $ref: /schemas/pwm/google,cros-ec-pwm.yaml# - deprecated: true - - pwm: - $ref: /schemas/pwm/google,cros-ec-pwm.yaml# - - keyboard-controller: - $ref: /schemas/input/google,cros-ec-keyb.yaml# - - proximity: - $ref: /schemas/iio/proximity/google,cros-ec-mkbp-proximity.yaml# - - codecs: - type: object - additionalProperties: false - - properties: - '#address-cells': - const: 2 - - '#size-cells': - const: 1 - - patternProperties: - "^ec-codec@[a-f0-9]+$": - type: object - $ref: /schemas/sound/google,cros-ec-codec.yaml# - - required: - - "#address-cells" - - "#size-cells" - - cbas: - type: object - - description: - This device is used to signal when a detachable base is attached - to a Chrome OS tablet. This device cannot be detected at runtime. - - properties: - compatible: - const: google,cros-cbas - - required: - - compatible - - additionalProperties: false - -patternProperties: - "^i2c-tunnel[0-9]*$": - type: object - $ref: /schemas/i2c/google,cros-ec-i2c-tunnel.yaml# - - "^regulator@[0-9]+$": - type: object - $ref: /schemas/regulator/google,cros-ec-regulator.yaml# - - "^extcon[0-9]*$": - type: object - $ref: /schemas/extcon/extcon-usbc-cros-ec.yaml# - -required: - - compatible - -allOf: - - if: - properties: - compatible: - not: - contains: - const: google,cros-ec-spi - then: - properties: - controller-data: false - google,cros-ec-spi-pre-delay: false - google,cros-ec-spi-msg-delay: false - spi-max-frequency: false - else: - $ref: /schemas/spi/spi-peripheral-props.yaml - - - if: - properties: - compatible: - not: - contains: - const: google,cros-ec-rpmsg - then: - properties: - mediatek,rpmsg-name: false - - - if: - properties: - compatible: - not: - contains: - enum: - - google,cros-ec-rpmsg - - google,cros-ec-uart - then: - required: - - reg - - interrupts - - - if: - properties: - compatible: - contains: - const: google,cros-ec-fp - then: - properties: - '#address-cells': false - '#size-cells': false - typec: false - ec-pwm: false - kbd-led-backlight: false - keyboard-controller: false - proximity: false - codecs: false - cbas: false - - patternProperties: - "^i2c-tunnel[0-9]*$": false - "^regulator@[0-9]+$": false - "^extcon[0-9]*$": false - - # Using additionalProperties: false here and - # listing true properties doesn't work - - required: - - reset-gpios - - boot0-gpios - - vdd-supply - else: - properties: - reset-gpios: false - boot0-gpios: false - vdd-supply: false - -additionalProperties: false - -examples: - # Example for I2C - - | - #include - #include - - i2c { - #address-cells = <1>; - #size-cells = <0>; - - cros-ec@1e { - compatible = "google,cros-ec-i2c"; - reg = <0x1e>; - interrupts = <6 0>; - interrupt-parent = <&gpio0>; - }; - }; - - # Example for SPI - - | - #include - #include - - spi { - #address-cells = <1>; - #size-cells = <0>; - - cros-ec@0 { - compatible = "google,cros-ec-spi"; - reg = <0x0>; - google,cros-ec-spi-msg-delay = <30>; - google,cros-ec-spi-pre-delay = <10>; - interrupts = <99 0>; - interrupt-parent = <&gpio7>; - spi-max-frequency = <5000000>; - #gpio-cells = <2>; - gpio-controller; - - proximity { - compatible = "google,cros-ec-mkbp-proximity"; - }; - - cbas { - compatible = "google,cros-cbas"; - }; - }; - }; - - # Example for RPMSG - - | - scp0 { - cros-ec { - compatible = "google,cros-ec-rpmsg"; - }; - }; - - # Example for FPMCU - - | - spi { - #address-cells = <0x1>; - #size-cells = <0x0>; - - ec@0 { - compatible = "google,cros-ec-fp", "google,cros-ec-spi"; - reg = <0x0>; - interrupt-parent = <&gpio_controller>; - interrupts = <4 IRQ_TYPE_LEVEL_LOW>; - spi-max-frequency = <3000000>; - reset-gpios = <&gpio_controller 5 GPIO_ACTIVE_LOW>; - boot0-gpios = <&gpio_controller 10 GPIO_ACTIVE_HIGH>; - vdd-supply = <&pp3300_fp_mcu>; - }; - }; - - # Example for UART - - | - serial { - cros-ec { - compatible = "google,cros-ec-uart"; - }; - }; -... diff --git a/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml b/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml deleted file mode 100644 index 37207a97e06c..000000000000 --- a/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml +++ /dev/null @@ -1,153 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/mfd/kontron,sl28cpld.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Kontron's sl28cpld board management controller - -maintainers: - - Michael Walle - -description: | - The board management controller may contain different IP blocks like - watchdog, fan monitoring, PWM controller, interrupt controller and a - GPIO controller. - -properties: - compatible: - const: kontron,sl28cpld - - reg: - description: - I2C device address. - maxItems: 1 - - "#address-cells": - const: 1 - - "#size-cells": - const: 0 - - "#interrupt-cells": - const: 2 - - interrupts: - maxItems: 1 - - interrupt-controller: true - -patternProperties: - "^gpio(@[0-9a-f]+)?$": - $ref: /schemas/gpio/kontron,sl28cpld-gpio.yaml - - "^hwmon(@[0-9a-f]+)?$": - $ref: /schemas/hwmon/kontron,sl28cpld-hwmon.yaml - - "^interrupt-controller(@[0-9a-f]+)?$": - $ref: /schemas/interrupt-controller/kontron,sl28cpld-intc.yaml - - "^pwm(@[0-9a-f]+)?$": - $ref: /schemas/pwm/kontron,sl28cpld-pwm.yaml - - "^watchdog(@[0-9a-f]+)?$": - $ref: /schemas/watchdog/kontron,sl28cpld-wdt.yaml - -required: - - "#address-cells" - - "#size-cells" - - compatible - - reg - -additionalProperties: false - -examples: - - | - #include - i2c { - #address-cells = <1>; - #size-cells = <0>; - - sl28cpld@4a { - compatible = "kontron,sl28cpld"; - reg = <0x4a>; - #address-cells = <1>; - #size-cells = <0>; - - watchdog@4 { - compatible = "kontron,sl28cpld-wdt"; - reg = <0x4>; - kontron,assert-wdt-timeout-pin; - }; - - hwmon@b { - compatible = "kontron,sl28cpld-fan"; - reg = <0xb>; - }; - - pwm@c { - compatible = "kontron,sl28cpld-pwm"; - reg = <0xc>; - #pwm-cells = <2>; - }; - - pwm@e { - compatible = "kontron,sl28cpld-pwm"; - reg = <0xe>; - #pwm-cells = <2>; - }; - - gpio@10 { - compatible = "kontron,sl28cpld-gpio"; - reg = <0x10>; - interrupts-extended = <&gpio2 6 - IRQ_TYPE_EDGE_FALLING>; - - gpio-controller; - #gpio-cells = <2>; - gpio-line-names = "a", "b", "c"; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio@15 { - compatible = "kontron,sl28cpld-gpio"; - reg = <0x15>; - interrupts-extended = <&gpio2 6 - IRQ_TYPE_EDGE_FALLING>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio@1a { - compatible = "kontron,sl28cpld-gpo"; - reg = <0x1a>; - - gpio-controller; - #gpio-cells = <2>; - }; - - gpio@1b { - compatible = "kontron,sl28cpld-gpi"; - reg = <0x1b>; - - gpio-controller; - #gpio-cells = <2>; - }; - - interrupt-controller@1c { - compatible = "kontron,sl28cpld-intc"; - reg = <0x1c>; - interrupts-extended = <&gpio2 6 - IRQ_TYPE_EDGE_FALLING>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/platform/acer,aspire1-ec.yaml b/Documentation/devicetree/bindings/platform/acer,aspire1-ec.yaml deleted file mode 100644 index 7cb0134134ff..000000000000 --- a/Documentation/devicetree/bindings/platform/acer,aspire1-ec.yaml +++ /dev/null @@ -1,60 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/platform/acer,aspire1-ec.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Acer Aspire 1 Embedded Controller - -maintainers: - - Nikita Travkin - -description: - The Acer Aspire 1 laptop uses an embedded controller to control battery - and charging as well as to provide a set of misc features such as the - laptop lid status and HPD events for the USB Type-C DP alt mode. - -properties: - compatible: - const: acer,aspire1-ec - - reg: - const: 0x76 - - interrupts: - maxItems: 1 - - connector: - $ref: /schemas/connector/usb-connector.yaml# - -required: - - compatible - - reg - - interrupts - -additionalProperties: false - -examples: - - | - #include - i2c { - #address-cells = <1>; - #size-cells = <0>; - - embedded-controller@76 { - compatible = "acer,aspire1-ec"; - reg = <0x76>; - - interrupts-extended = <&tlmm 30 IRQ_TYPE_LEVEL_LOW>; - - connector { - compatible = "usb-c-connector"; - - port { - ec_dp_in: endpoint { - remote-endpoint = <&mdss_dp_out>; - }; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/platform/huawei,gaokun-ec.yaml b/Documentation/devicetree/bindings/platform/huawei,gaokun-ec.yaml deleted file mode 100644 index 4a03b0ee3149..000000000000 --- a/Documentation/devicetree/bindings/platform/huawei,gaokun-ec.yaml +++ /dev/null @@ -1,124 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/platform/huawei,gaokun-ec.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Huawei Matebook E Go Embedded Controller - -maintainers: - - Pengyu Luo - -description: - Different from other Qualcomm Snapdragon sc8180x and sc8280xp-based - machines, the Huawei Matebook E Go tablets use embedded controllers - while others use a system called PMIC GLink which handles battery, - UCSI, USB Type-C DP Alt Mode. In addition, Huawei's implementation - also handles additional features, such as charging thresholds, FN - lock, smart charging, tablet lid status, thermal sensors, and more. - -properties: - compatible: - enum: - - huawei,gaokun3-ec - - reg: - const: 0x38 - - '#address-cells': - const: 1 - - '#size-cells': - const: 0 - - interrupts: - maxItems: 1 - -patternProperties: - '^connector@[01]$': - $ref: /schemas/connector/usb-connector.yaml# - - properties: - reg: - maxItems: 1 - -required: - - compatible - - reg - - interrupts - -additionalProperties: false - -examples: - - | - #include - i2c { - #address-cells = <1>; - #size-cells = <0>; - - embedded-controller@38 { - compatible = "huawei,gaokun3-ec"; - reg = <0x38>; - - interrupts-extended = <&tlmm 107 IRQ_TYPE_LEVEL_LOW>; - - #address-cells = <1>; - #size-cells = <0>; - - connector@0 { - compatible = "usb-c-connector"; - reg = <0>; - power-role = "dual"; - data-role = "dual"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - ucsi0_ss_in: endpoint { - remote-endpoint = <&usb_0_qmpphy_out>; - }; - }; - - port@1 { - reg = <1>; - - ucsi0_sbu: endpoint { - remote-endpoint = <&usb0_sbu_mux>; - }; - }; - }; - }; - - connector@1 { - compatible = "usb-c-connector"; - reg = <1>; - power-role = "dual"; - data-role = "dual"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - ucsi1_ss_in: endpoint { - remote-endpoint = <&usb_1_qmpphy_out>; - }; - }; - - port@1 { - reg = <1>; - - ucsi1_sbu: endpoint { - remote-endpoint = <&usb1_sbu_mux>; - }; - }; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/platform/lenovo,yoga-c630-ec.yaml b/Documentation/devicetree/bindings/platform/lenovo,yoga-c630-ec.yaml deleted file mode 100644 index 3180ce1a22d4..000000000000 --- a/Documentation/devicetree/bindings/platform/lenovo,yoga-c630-ec.yaml +++ /dev/null @@ -1,83 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/platform/lenovo,yoga-c630-ec.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Lenovo Yoga C630 Embedded Controller. - -maintainers: - - Bjorn Andersson - -description: - The Qualcomm Snapdragon-based Lenovo Yoga C630 has an Embedded Controller - (EC) which handles things such as battery and USB Type-C. This binding - describes the interface, on an I2C bus, to this EC. - -properties: - compatible: - const: lenovo,yoga-c630-ec - - reg: - const: 0x70 - - '#address-cells': - const: 1 - - '#size-cells': - const: 0 - - interrupts: - maxItems: 1 - -patternProperties: - '^connector@[01]$': - $ref: /schemas/connector/usb-connector.yaml# - - properties: - reg: - maxItems: 1 - - unevaluatedProperties: false - -required: - - compatible - - reg - - interrupts - -additionalProperties: false - -examples: - - |+ - #include - i2c1 { - clock-frequency = <400000>; - - #address-cells = <1>; - #size-cells = <0>; - - embedded-controller@70 { - compatible = "lenovo,yoga-c630-ec"; - reg = <0x70>; - - interrupts-extended = <&tlmm 20 IRQ_TYPE_LEVEL_HIGH>; - - #address-cells = <1>; - #size-cells = <0>; - - connector@0 { - compatible = "usb-c-connector"; - reg = <0>; - power-role = "source"; - data-role = "host"; - }; - - connector@1 { - compatible = "usb-c-connector"; - reg = <1>; - power-role = "source"; - data-role = "host"; - }; - }; - }; -... diff --git a/Documentation/devicetree/bindings/platform/microsoft,surface-sam.yaml b/Documentation/devicetree/bindings/platform/microsoft,surface-sam.yaml deleted file mode 100644 index b33d26f15b2a..000000000000 --- a/Documentation/devicetree/bindings/platform/microsoft,surface-sam.yaml +++ /dev/null @@ -1,47 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/platform/microsoft,surface-sam.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Surface System Aggregator Module (SAM, SSAM) - -maintainers: - - Konrad Dybcio - -description: | - Surface devices use a standardized embedded controller to let the - operating system interface with various hardware functions. The - specific functionalities are modeled as subdevices and matched on - five levels: domain, category, target, instance and function. - -properties: - compatible: - const: microsoft,surface-sam - - interrupts: - maxItems: 1 - - current-speed: true - -required: - - compatible - - interrupts - -additionalProperties: false - -examples: - - | - #include - uart { - embedded-controller { - compatible = "microsoft,surface-sam"; - - interrupts-extended = <&tlmm 91 IRQ_TYPE_EDGE_RISING>; - - pinctrl-0 = <&ssam_state>; - pinctrl-names = "default"; - - current-speed = <4000000>; - }; - }; diff --git a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml index f7bc84b05a87..8f5a468cfb91 100644 --- a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml @@ -14,7 +14,7 @@ description: | Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller (EC) and controlled via a host-command interface. An EC PWM node should be only found as a sub-node of the EC node (see - Documentation/devicetree/bindings/mfd/google,cros-ec.yaml). + Documentation/devicetree/bindings/embedded-controller/google,cros-ec.yaml). allOf: - $ref: pwm.yaml# diff --git a/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml b/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml index 981cfec53f37..19a9d2e15a96 100644 --- a/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml @@ -11,7 +11,7 @@ maintainers: description: | This module is part of the sl28cpld multi-function device. For more - details see ../mfd/kontron,sl28cpld.yaml. + details see ../embedded-controller/kontron,sl28cpld.yaml. The controller supports one PWM channel and supports only four distinct frequencies (250Hz, 500Hz, 1kHz, 2kHz). diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml index adc6b3f36fde..179c98b33b4d 100644 --- a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml @@ -58,7 +58,7 @@ properties: maxItems: 1 cros-ec-rpmsg: - $ref: /schemas/mfd/google,cros-ec.yaml + $ref: /schemas/embedded-controller/google,cros-ec.yaml description: This subnode represents the rpmsg device. The properties of this node are defined by the individual bindings for @@ -126,7 +126,7 @@ patternProperties: maxItems: 1 cros-ec-rpmsg: - $ref: /schemas/mfd/google,cros-ec.yaml + $ref: /schemas/embedded-controller/google,cros-ec.yaml description: This subnode represents the rpmsg device. The properties of this node are defined by the individual bindings for diff --git a/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml b/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml index 1434f4433738..dd51e8c5b8c2 100644 --- a/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml +++ b/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml @@ -15,7 +15,7 @@ description: | Embedded Controller (EC) and is controlled via a host-command interface. An EC codec node should only be found inside the "codecs" subnode of a cros-ec node. - (see Documentation/devicetree/bindings/mfd/google,cros-ec.yaml). + (see Documentation/devicetree/bindings/embedded-controller/google,cros-ec.yaml). allOf: - $ref: dai-common.yaml# diff --git a/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml b/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml index 179272f74de5..872a8471ef65 100644 --- a/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml @@ -11,7 +11,7 @@ maintainers: description: | This module is part of the sl28cpld multi-function device. For more - details see ../mfd/kontron,sl28cpld.yaml. + details see ../embedded-controller/kontron,sl28cpld.yaml. allOf: - $ref: watchdog.yaml# -- cgit v1.2.3 From a598ae45f48d7d5a17f8290f2f5bd46046fd0b9b Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Fri, 22 Aug 2025 15:15:26 +0200 Subject: dt-bindings: mfd: sl28cpld: Add sa67mcu compatible The Kontron SMARC-sAM67 module features an on-board house keeping uC. It's designed to be compatible with the older on-board CPLD used on the SMARC-sAL28 board. To be prepared for any board specific quirks, add a specific compatible. Signed-off-by: Michael Walle Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250822131531.1366437-3-mwalle@kernel.org Signed-off-by: Lee Jones --- .../devicetree/bindings/embedded-controller/kontron,sl28cpld.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/embedded-controller/kontron,sl28cpld.yaml b/Documentation/devicetree/bindings/embedded-controller/kontron,sl28cpld.yaml index 0b752f3baaa9..a77e67f6cb82 100644 --- a/Documentation/devicetree/bindings/embedded-controller/kontron,sl28cpld.yaml +++ b/Documentation/devicetree/bindings/embedded-controller/kontron,sl28cpld.yaml @@ -16,7 +16,12 @@ description: | properties: compatible: - const: kontron,sl28cpld + oneOf: + - items: + - enum: + - kontron,sa67mcu + - const: kontron,sl28cpld + - const: kontron,sl28cpld reg: description: -- cgit v1.2.3 From 8566de1cf6892647c034c576caec772e6cf2c952 Mon Sep 17 00:00:00 2001 From: Alex Elder Date: Mon, 25 Aug 2025 12:20:50 -0500 Subject: dt-bindings: mfd: Add support the SpacemiT P1 PMIC Enable the SpacemiT P1, which is an I2C-controlled PMIC. Initially only the RTC and regulators will be supported. Signed-off-by: Alex Elder Reviewed-by: "Rob Herring (Arm)" Acked-by: Troy Mitchell Link: https://lore.kernel.org/r/20250825172057.163883-2-elder@riscstar.com Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/spacemit,p1.yaml | 86 ++++++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/spacemit,p1.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/spacemit,p1.yaml b/Documentation/devicetree/bindings/mfd/spacemit,p1.yaml new file mode 100644 index 000000000000..c6593ac6ef6a --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/spacemit,p1.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/spacemit,p1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SpacemiT P1 Power Management Integrated Circuit + +maintainers: + - Troy Mitchell + +description: + P1 is an I2C-controlled PMIC produced by SpacemiT. It implements six + constant-on-time buck converters and twelve low-dropout regulators. + It also contains a load switch, watchdog timer, real-time clock, eight + 12-bit ADC channels, and six GPIOs. Additional details are available + in the "Power Stone/P1" section at the following link. + https://developer.spacemit.com/documentation + +properties: + compatible: + const: spacemit,p1 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vin-supply: + description: Input supply phandle. + + regulators: + type: object + + patternProperties: + "^(buck[1-6]|aldo[1-4]|dldo[1-7])$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@41 { + compatible = "spacemit,p1"; + reg = <0x41>; + interrupts = <64>; + + regulators { + buck1 { + regulator-name = "buck1"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3450000>; + regulator-ramp-delay = <5000>; + regulator-always-on; + }; + + aldo1 { + regulator-name = "aldo1"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-boot-on; + }; + + dldo1 { + regulator-name = "dldo1"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-boot-on; + }; + }; + }; + }; -- cgit v1.2.3 From 8a498184e2e8aac24db0faf295b7d0fb62dfe90d Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Mon, 1 Sep 2025 12:04:13 +0100 Subject: dt-bindings: mfd: syscon: Document the control-scb syscon on PolarFire SoC The "control-scb" region, contains the "tvs" temperature and voltage sensors and the control/status registers for the system controller's mailbox. The mailbox has a dedicated node, so there's no need for a child node describing it, looking the syscon up by compatible is sufficient. Acked-by: Krzysztof Kozlowski Signed-off-by: Conor Dooley Link: https://lore.kernel.org/r/20250901-shorten-yahoo-223aeaecd290@spud Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/syscon.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 1f381d159af8..657c38175fba 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -91,6 +91,7 @@ select: - mediatek,mt8173-pctl-a-syscfg - mediatek,mt8365-syscfg - microchip,lan966x-cpu-syscon + - microchip,mpfs-control-scb - microchip,mpfs-sysreg-scb - microchip,sam9x60-sfr - microchip,sama7d65-ddr3phy @@ -199,6 +200,7 @@ properties: - mediatek,mt8365-infracfg-nao - mediatek,mt8365-syscfg - microchip,lan966x-cpu-syscon + - microchip,mpfs-control-scb - microchip,mpfs-sysreg-scb - microchip,sam9x60-sfr - microchip,sama7d65-ddr3phy -- cgit v1.2.3 From 1160f9f88be2a911a8d7a27a896b24360a1763c9 Mon Sep 17 00:00:00 2001 From: Alexander Kurz Date: Fri, 29 Aug 2025 20:15:15 +0000 Subject: dt-bindings: mfd: fsl,mc13xxx: Convert txt to DT schema Convert the txt mc13xxx bindings to DT schema attempting to keep most information. The nodes codec and touchscreen are not part of the new schema since it was only briefly mentioned before. Following the convention, rename led-control to fsl,led-control. Signed-off-by: Alexander Kurz Reviewed-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250829201517.15374-6-akurz@blala.de Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/fsl,mc13xxx.yaml | 218 +++++++++++++++++++++ Documentation/devicetree/bindings/mfd/mc13xxx.txt | 156 --------------- 2 files changed, 218 insertions(+), 156 deletions(-) create mode 100644 Documentation/devicetree/bindings/mfd/fsl,mc13xxx.yaml delete mode 100644 Documentation/devicetree/bindings/mfd/mc13xxx.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/fsl,mc13xxx.yaml b/Documentation/devicetree/bindings/mfd/fsl,mc13xxx.yaml new file mode 100644 index 000000000000..007c2e3eee91 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/fsl,mc13xxx.yaml @@ -0,0 +1,218 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/fsl,mc13xxx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale MC13xxx Power Management Integrated Circuits (PMIC) + +maintainers: + - Alexander Kurz + +description: > + The MC13xxx PMIC series consists of the three models MC13783, MC13892 + and MC34708 and provide regulators and other features like RTC, ADC, + LED, touchscreen, codec and input buttons. + + Link to datasheets + https://www.nxp.com/docs/en/data-sheet/MC13783.pdf + https://www.nxp.com/docs/en/data-sheet/MC13892.pdf + https://www.nxp.com/docs/en/data-sheet/MC34708.pdf + +properties: + compatible: + enum: + - fsl,mc13783 + - fsl,mc13892 + - fsl,mc34708 + + reg: + description: I2C slave address or SPI chip select number. + maxItems: 1 + + spi-max-frequency: true + + spi-cs-high: true + + system-power-controller: true + + interrupts: + maxItems: 1 + + leds: + type: object + $ref: /schemas/leds/common.yaml# + + properties: + reg: + description: | + One of + MC13783 LED IDs + 0: Main display + 1: AUX display + 2: Keypad + 3: Red 1 + 4: Green 1 + 5: Blue 1 + 6: Red 2 + 7: Green 2 + 8: Blue 2 + 9: Red 3 + 10: Green 3 + 11: Blue 3 + + MC13892 LED IDs + 0: Main display + 1: AUX display + 2: Keypad + 3: Red + 4: Green + 5: Blue + + MC34708 LED IDs + 0: Charger Red + 1: Charger Green + maxItems: 1 + + led-control: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + Setting for LED-Control register array length depends on model, + mc13783: 6, mc13892: 4, mc34708: 1 + + regulators: + type: object + + additionalProperties: + type: object + + description: | + List of child nodes specifying the regulators, depending on chip variant. + Each child node is defined using the standard binding for regulators and + the optional regulator properties defined below. + + fsl,mc13xxx-uses-adc: + type: boolean + description: Indicate the ADC is being used + + fsl,mc13xxx-uses-codec: + type: boolean + description: Indicate the Audio Codec is being used + + fsl,mc13xxx-uses-rtc: + type: boolean + description: Indicate the RTC is being used + + fsl,mc13xxx-uses-touch: + type: boolean + description: Indicate the touchscreen controller is being used + +required: + - compatible + - reg + +allOf: + - if: + properties: + compatible: + contains: + const: fsl,mc13783 + then: + properties: + leds: + properties: + led-control: + minItems: 6 + maxItems: 6 + regulators: + patternProperties: + "^gpo[1-4]|pwgt[12]spi|sw[12][ab]|sw3|vaudio|vcam|vdig|vesim|vgen|viohi|violo|vmmc[12]|vrf[12]|vrfbg|vrfcp|vrfdig|vrfref|vsim|vvib$": + type: object + $ref: /schemas/regulator/regulator.yaml# + + unevaluatedProperties: false + + - if: + properties: + compatible: + contains: + const: fsl,mc13892 + then: + properties: + leds: + properties: + led-control: + minItems: 4 + maxItems: 4 + regulators: + patternProperties: + "^gpo[1-4]|pwgt[12]spi|sw[1-4]|swbst|vaudio|vcam|vcoincell|vdig|vgen[1-3]|viohi|vpll|vsd|vusb|vusb2|vvideo$": + type: object + $ref: /schemas/regulator/regulator.yaml# + + unevaluatedProperties: false + + - if: + properties: + compatible: + contains: + const: fsl,mc34708 + then: + properties: + leds: + properties: + led-control: + minItems: 1 + maxItems: 1 + +additionalProperties: false + +examples: + - | + #include + #include + #include + + spi { + #address-cells = <1>; + #size-cells = <0>; + + pmic: mc13892@0 { + compatible = "fsl,mc13892"; + reg = <0>; + spi-max-frequency = <1000000>; + spi-cs-high; + interrupt-parent = <&gpio0>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + fsl,mc13xxx-uses-rtc; + fsl,mc13xxx-uses-adc; + + leds { + #address-cells = <1>; + #size-cells = <0>; + led-control = <0x000 0x000 0x0e0 0x000>; + + sysled@3 { + reg = <3>; + label = "system:red:live"; + linux,default-trigger = "heartbeat"; + }; + }; + + regulators { + sw1_reg: sw1 { + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1375000>; + regulator-boot-on; + regulator-always-on; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1850000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/mc13xxx.txt b/Documentation/devicetree/bindings/mfd/mc13xxx.txt deleted file mode 100644 index 8261ea73278a..000000000000 --- a/Documentation/devicetree/bindings/mfd/mc13xxx.txt +++ /dev/null @@ -1,156 +0,0 @@ -* Freescale MC13783/MC13892 Power Management Integrated Circuit (PMIC) - -Required properties: -- compatible : Should be "fsl,mc13783" or "fsl,mc13892" - -Optional properties: -- fsl,mc13xxx-uses-adc : Indicate the ADC is being used -- fsl,mc13xxx-uses-codec : Indicate the Audio Codec is being used -- fsl,mc13xxx-uses-rtc : Indicate the RTC is being used -- fsl,mc13xxx-uses-touch : Indicate the touchscreen controller is being used - -Sub-nodes: -- codec: Contain the Audio Codec node. - - adc-port: Contain PMIC SSI port number used for ADC. - - dac-port: Contain PMIC SSI port number used for DAC. -- leds : Contain the led nodes and initial register values in property - "led-control". Number of register depends of used IC, for MC13783 is 6, - for MC13892 is 4, for MC34708 is 1. See datasheet for bits definitions of - these registers. - - #address-cells: Must be 1. - - #size-cells: Must be 0. - Each led node should contain "reg", which used as LED ID (described below). - Optional properties "label" and "linux,default-trigger" is described in - Documentation/devicetree/bindings/leds/common.txt. -- regulators : Contain the regulator nodes. The regulators are bound using - their names as listed below with their registers and bits for enabling. - -MC13783 LED IDs: - 0 : Main display - 1 : AUX display - 2 : Keypad - 3 : Red 1 - 4 : Green 1 - 5 : Blue 1 - 6 : Red 2 - 7 : Green 2 - 8 : Blue 2 - 9 : Red 3 - 10 : Green 3 - 11 : Blue 3 - -MC13892 LED IDs: - 0 : Main display - 1 : AUX display - 2 : Keypad - 3 : Red - 4 : Green - 5 : Blue - -MC34708 LED IDs: - 0 : Charger Red - 1 : Charger Green - -MC13783 regulators: - sw1a : regulator SW1A (register 24, bit 0) - sw1b : regulator SW1B (register 25, bit 0) - sw2a : regulator SW2A (register 26, bit 0) - sw2b : regulator SW2B (register 27, bit 0) - sw3 : regulator SW3 (register 29, bit 20) - vaudio : regulator VAUDIO (register 32, bit 0) - viohi : regulator VIOHI (register 32, bit 3) - violo : regulator VIOLO (register 32, bit 6) - vdig : regulator VDIG (register 32, bit 9) - vgen : regulator VGEN (register 32, bit 12) - vrfdig : regulator VRFDIG (register 32, bit 15) - vrfref : regulator VRFREF (register 32, bit 18) - vrfcp : regulator VRFCP (register 32, bit 21) - vsim : regulator VSIM (register 33, bit 0) - vesim : regulator VESIM (register 33, bit 3) - vcam : regulator VCAM (register 33, bit 6) - vrfbg : regulator VRFBG (register 33, bit 9) - vvib : regulator VVIB (register 33, bit 11) - vrf1 : regulator VRF1 (register 33, bit 12) - vrf2 : regulator VRF2 (register 33, bit 15) - vmmc1 : regulator VMMC1 (register 33, bit 18) - vmmc2 : regulator VMMC2 (register 33, bit 21) - gpo1 : regulator GPO1 (register 34, bit 6) - gpo2 : regulator GPO2 (register 34, bit 8) - gpo3 : regulator GPO3 (register 34, bit 10) - gpo4 : regulator GPO4 (register 34, bit 12) - pwgt1spi : regulator PWGT1SPI (register 34, bit 15) - pwgt2spi : regulator PWGT2SPI (register 34, bit 16) - -MC13892 regulators: - vcoincell : regulator VCOINCELL (register 13, bit 23) - sw1 : regulator SW1 (register 24, bit 0) - sw2 : regulator SW2 (register 25, bit 0) - sw3 : regulator SW3 (register 26, bit 0) - sw4 : regulator SW4 (register 27, bit 0) - swbst : regulator SWBST (register 29, bit 20) - vgen1 : regulator VGEN1 (register 32, bit 0) - viohi : regulator VIOHI (register 32, bit 3) - vdig : regulator VDIG (register 32, bit 9) - vgen2 : regulator VGEN2 (register 32, bit 12) - vpll : regulator VPLL (register 32, bit 15) - vusb2 : regulator VUSB2 (register 32, bit 18) - vgen3 : regulator VGEN3 (register 33, bit 0) - vcam : regulator VCAM (register 33, bit 6) - vvideo : regulator VVIDEO (register 33, bit 12) - vaudio : regulator VAUDIO (register 33, bit 15) - vsd : regulator VSD (register 33, bit 18) - gpo1 : regulator GPO1 (register 34, bit 6) - gpo2 : regulator GPO2 (register 34, bit 8) - gpo3 : regulator GPO3 (register 34, bit 10) - gpo4 : regulator GPO4 (register 34, bit 12) - pwgt1spi : regulator PWGT1SPI (register 34, bit 15) - pwgt2spi : regulator PWGT2SPI (register 34, bit 16) - vusb : regulator VUSB (register 50, bit 3) - - The bindings details of individual regulator device can be found in: - Documentation/devicetree/bindings/regulator/regulator.txt - -Examples: - -ecspi@70010000 { /* ECSPI1 */ - cs-gpios = <&gpio4 24 0>, /* GPIO4_24 */ - <&gpio4 25 0>; /* GPIO4_25 */ - - pmic: mc13892@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mc13892"; - spi-max-frequency = <6000000>; - reg = <0>; - interrupt-parent = <&gpio0>; - interrupts = <8>; - - leds { - #address-cells = <1>; - #size-cells = <0>; - led-control = <0x000 0x000 0x0e0 0x000>; - - sysled@3 { - reg = <3>; - label = "system:red:live"; - linux,default-trigger = "heartbeat"; - }; - }; - - regulators { - sw1_reg: mc13892__sw1 { - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <1375000>; - regulator-boot-on; - regulator-always-on; - }; - - sw2_reg: mc13892__sw2 { - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1850000>; - regulator-boot-on; - regulator-always-on; - }; - }; - }; -}; -- cgit v1.2.3 From 5872dcccc5ade97bc27aafe13e361bb8e7c73da1 Mon Sep 17 00:00:00 2001 From: Alexander Kurz Date: Fri, 29 Aug 2025 20:15:16 +0000 Subject: dt-bindings: mfd: fsl,mc13xxx: Add buttons node Add a buttons node and properties describing the "ONOFD" (MC13783) and "PWRON" (MC13892/MC34708) buttons available in the fsl,mc13xxx PMIC ICs. Signed-off-by: Alexander Kurz Reviewed-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250829201517.15374-7-akurz@blala.de Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/fsl,mc13xxx.yaml | 70 ++++++++++++++++++++++ 1 file changed, 70 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/fsl,mc13xxx.yaml b/Documentation/devicetree/bindings/mfd/fsl,mc13xxx.yaml index 007c2e3eee91..d2886f2686a8 100644 --- a/Documentation/devicetree/bindings/mfd/fsl,mc13xxx.yaml +++ b/Documentation/devicetree/bindings/mfd/fsl,mc13xxx.yaml @@ -39,6 +39,58 @@ properties: interrupts: maxItems: 1 + buttons: + type: object + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + patternProperties: + "^onkey@[0-2]$": + $ref: /schemas/input/input.yaml# + unevaluatedProperties: false + type: object + + properties: + reg: + description: | + One of + MC13783 BUTTON IDs: + 0: ONOFD1 + 1: ONOFD2 + 2: ONOFD3 + + MC13892 BUTTON IDs: + 0: PWRON1 + 1: PWRON2 + 2: PWRON3 + + MC34708 BUTTON IDs: + 0: PWRON1 + 1: PWRON2 + maximum: 2 + + debounce-delay-ms: + enum: [0, 30, 150, 750] + default: 30 + description: + Sets the debouncing delay in milliseconds. + + active-low: + description: Set active when pin is pulled low. + + linux,code: true + + fsl,enable-reset: + description: + Setting of the global reset option. + type: boolean + + unevaluatedProperties: false + leds: type: object $ref: /schemas/leds/common.yaml# @@ -159,6 +211,12 @@ allOf: const: fsl,mc34708 then: properties: + buttons: + patternProperties: + "^onkey@[0-2]$": + properties: + reg: + maximum: 1 leds: properties: led-control: @@ -187,6 +245,18 @@ examples: fsl,mc13xxx-uses-rtc; fsl,mc13xxx-uses-adc; + buttons { + #address-cells = <1>; + #size-cells = <0>; + + onkey@0 { + reg = <0>; + debounce-delay-ms = <30>; + active-low; + fsl,enable-reset; + }; + }; + leds { #address-cells = <1>; #size-cells = <0>; -- cgit v1.2.3 From 99e2f00cf418c2e12fc934ae2ba790870e98fd67 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 29 Aug 2025 18:04:49 -0500 Subject: dt-bindings: mfd: Convert aspeed,ast2400-p2a-ctrl to DT schema Convert the aspeed,ast2x00-p2a-ctrl binding to DT schema format. The schema is simple enough to just add it to the parent aspeed,ast2x00-scu binding. Signed-off-by: "Rob Herring (Arm)" Acked-by: Andrew Jeffery Link: https://lore.kernel.org/r/20250829230450.1496151-1-robh@kernel.org Signed-off-by: Lee Jones --- .../bindings/mfd/aspeed,ast2x00-scu.yaml | 33 +++++++++++++++- .../devicetree/bindings/misc/aspeed-p2a-ctrl.txt | 46 ---------------------- 2 files changed, 32 insertions(+), 47 deletions(-) delete mode 100644 Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml index 5eccd10d95ce..5adb7f6aca45 100644 --- a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml +++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml @@ -48,8 +48,34 @@ properties: patternProperties: '^p2a-control@[0-9a-f]+$': - description: See Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt + description: > + PCI-to-AHB Bridge Control + + The bridge is available on platforms with the VGA enabled on the Aspeed + device. In this case, the host has access to a 64KiB window into all of + the BMC's memory. The BMC can disable this bridge. If the bridge is + enabled, the host has read access to all the regions of memory, however + the host only has read and write access depending on a register + controlled by the BMC. type: object + additionalProperties: false + + properties: + compatible: + enum: + - aspeed,ast2400-p2a-ctrl + - aspeed,ast2500-p2a-ctrl + reg: + maxItems: 1 + + memory-region: + maxItems: 1 + description: + A reserved_memory region to be used for the PCI to AHB mapping + + required: + - compatible + - reg '^pinctrl(@[0-9a-f]+)?$': type: object @@ -123,6 +149,11 @@ examples: #size-cells = <1>; ranges = <0x0 0x1e6e2000 0x1000>; + p2a-control@2c { + compatible = "aspeed,ast2400-p2a-ctrl"; + reg = <0x2c 0x4>; + }; + silicon-id@7c { compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id"; reg = <0x7c 0x4>, <0x150 0x8>; diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt deleted file mode 100644 index f2e2e28b317c..000000000000 --- a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt +++ /dev/null @@ -1,46 +0,0 @@ -====================================================================== -Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control Driver -====================================================================== - -The bridge is available on platforms with the VGA enabled on the Aspeed device. -In this case, the host has access to a 64KiB window into all of the BMC's -memory. The BMC can disable this bridge. If the bridge is enabled, the host -has read access to all the regions of memory, however the host only has read -and write access depending on a register controlled by the BMC. - -Required properties: -=================== - - - compatible: must be one of: - - "aspeed,ast2400-p2a-ctrl" - - "aspeed,ast2500-p2a-ctrl" - -Optional properties: -=================== - -- reg: A hint for the memory regions associated with the P2A controller -- memory-region: A phandle to a reserved_memory region to be used for the PCI - to AHB mapping - -The p2a-control node should be the child of a syscon node with the required -property: - -- compatible : Should be one of the following: - "aspeed,ast2400-scu", "syscon", "simple-mfd" - "aspeed,ast2500-scu", "syscon", "simple-mfd" - -Example -=================== - -g4 Example ----------- - -syscon: scu@1e6e2000 { - compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd"; - reg = <0x1e6e2000 0x1a8>; - - p2a: p2a-control { - compatible = "aspeed,ast2400-p2a-ctrl"; - memory-region = <&reserved_memory>; - }; -}; -- cgit v1.2.3 From b445c14ac7eb39447a364c142aa85b6487b30c67 Mon Sep 17 00:00:00 2001 From: Ryan Chen Date: Sun, 31 Aug 2025 10:14:36 +0800 Subject: dt-bindings: mfd: aspeed: Add AST2700 SCU compatibles Add SCU interrupt controller compatible strings for the AST2700 SoC: scu-ic0 to 3. This extends the MFD binding to support AST2700-based platforms. Signed-off-by: Ryan Chen Acked-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250831021438.976893-3-ryan_chen@aspeedtech.com Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml index 5adb7f6aca45..da1887d7a8fe 100644 --- a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml +++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml @@ -101,6 +101,10 @@ patternProperties: - aspeed,ast2500-scu-ic - aspeed,ast2600-scu-ic0 - aspeed,ast2600-scu-ic1 + - aspeed,ast2700-scu-ic0 + - aspeed,ast2700-scu-ic1 + - aspeed,ast2700-scu-ic2 + - aspeed,ast2700-scu-ic3 '^silicon-id@[0-9a-f]+$': description: Unique hardware silicon identifiers within the SoC -- cgit v1.2.3 From 59863239e09f435e4dd3393637adc4d657772de5 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Fri, 12 Sep 2025 14:07:40 +0200 Subject: dt-bindings: mfd: tps6594: Allow gpio-line-names Setting the signal names in the device tree was already possible, but it will lead to a warning. Allow the gpio-line-names property to fix that. Signed-off-by: Michael Walle Acked-by: "Rob Herring (Arm)" Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/ti,tps6594.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/ti,tps6594.yaml b/Documentation/devicetree/bindings/mfd/ti,tps6594.yaml index a48cb00afe43..ca17fbdea691 100644 --- a/Documentation/devicetree/bindings/mfd/ti,tps6594.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,tps6594.yaml @@ -41,6 +41,7 @@ properties: system-power-controller: true gpio-controller: true + gpio-line-names: true '#gpio-cells': const: 2 -- cgit v1.2.3 From 354f31e9d2a3e4799d3d057a9e1c9f7ae7348bba Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Fri, 12 Sep 2025 14:07:43 +0200 Subject: dt-bindings: watchdog: Add SMARC-sAM67 support The SMARC-sAM67 board has an on-board uC which has the same register interface as the older CPLD implementation on the SMARC-sAL28 board. Although the MCU emulates the same behavior, be prepared for any quirks and add a board specific compatible. Signed-off-by: Michael Walle Acked-by: Krzysztof Kozlowski Reviewed-by: Guenter Roeck Signed-off-by: Lee Jones --- .../devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml b/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml index 872a8471ef65..0821ba0e84a3 100644 --- a/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml @@ -18,7 +18,12 @@ allOf: properties: compatible: - const: kontron,sl28cpld-wdt + oneOf: + - items: + - enum: + - kontron,sa67mcu-wdt + - const: kontron,sl28cpld-wdt + - const: kontron,sl28cpld-wdt reg: maxItems: 1 -- cgit v1.2.3 From 02dde2c4c32e8c8404a890d6092a66dbe0f36564 Mon Sep 17 00:00:00 2001 From: Jihed Chaibi Date: Sun, 14 Sep 2025 21:25:14 +0200 Subject: dt-bindings: mfd: twl: Add missing sub-nodes for TWL4030 & TWL603x MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Update the main TI TWL-family binding to be self-contained and to fix pre-existing validation errors. To ensure future patches are bisectable, child nodes whose bindings are in other patches (audio, keypad, usb, etc.) are now defined using a flexible 'additionalProperties: true' pattern. This removes hard dependencies between the MFD and subsystem bindings. The complete dtbs_check for this binding is clean except for two warnings originating from pre-existing bugs in the OMAP DTS files, for which fixes have already been submitted separately [1][2]. Reviewed-by: Rob Herring Acked-by: Uwe Kleine-König Signed-off-by: Jihed Chaibi Reviewed-by: Andreas Kemnade Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/ti,twl.yaml | 319 ++++++++++++++++++--- .../devicetree/bindings/mfd/twl4030-power.txt | 48 ---- .../devicetree/bindings/pwm/ti,twl-pwm.txt | 17 -- .../devicetree/bindings/pwm/ti,twl-pwmled.txt | 17 -- 4 files changed, 273 insertions(+), 128 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mfd/twl4030-power.txt delete mode 100644 Documentation/devicetree/bindings/pwm/ti,twl-pwm.txt delete mode 100644 Documentation/devicetree/bindings/pwm/ti,twl-pwmled.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/ti,twl.yaml b/Documentation/devicetree/bindings/mfd/ti,twl.yaml index f162ab60c09b..776b04e182cb 100644 --- a/Documentation/devicetree/bindings/mfd/ti,twl.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,twl.yaml @@ -11,9 +11,9 @@ maintainers: description: | The TWLs are Integrated Power Management Chips. - Some version might contain much more analog function like + Some versions might contain much more analog functions like USB transceiver or Audio amplifier. - These chips are connected to an i2c bus. + These chips are connected to an I2C bus. allOf: - if: @@ -49,33 +49,14 @@ allOf: ti,retain-on-reset: false properties: - madc: - type: object - $ref: /schemas/iio/adc/ti,twl4030-madc.yaml - unevaluatedProperties: false - charger: - type: object $ref: /schemas/power/supply/twl4030-charger.yaml unevaluatedProperties: false - pwrbutton: - type: object - additionalProperties: false - properties: - compatible: - const: ti,twl4030-pwrbutton - interrupts: - items: - - items: - const: 8 - - watchdog: - type: object - additionalProperties: false - properties: - compatible: - const: ti,twl4030-wdt + gpadc: false + + usb-comparator: false + - if: properties: compatible: @@ -106,15 +87,30 @@ allOf: properties: charger: - type: object - properties: - compatible: - const: ti,twl6030-charger + $ref: /schemas/power/supply/ti,twl6030-charger.yaml + unevaluatedProperties: false + gpadc: - type: object properties: compatible: const: ti,twl6030-gpadc + + pwrbutton: false + + madc: false + + watchdog: false + + audio: false + + keypad: false + + twl4030-usb: false + + gpio: false + + power: false + - if: properties: compatible: @@ -142,23 +138,36 @@ allOf: properties: charger: - type: object - properties: - compatible: - items: - - const: ti,twl6032-charger - - const: ti,twl6030-charger + $ref: /schemas/power/supply/ti,twl6030-charger.yaml + unevaluatedProperties: false + gpadc: - type: object properties: compatible: const: ti,twl6032-gpadc + pwrbutton: false + + madc: false + + watchdog: false + + audio: false + + keypad: false + + twl4030-usb: false + + gpio: false + + power: false + properties: compatible: - description: - TWL4030 for integrated power-management/audio CODEC device used in OMAP3 - based boards + description: > + TWL4030 for integrated power-management/audio CODEC device used in + OMAP3 based boards. + TWL6030/32 for integrated power-management used in OMAP4 based boards enum: - ti,twl4030 @@ -181,28 +190,221 @@ properties: "#clock-cells": const: 1 + clocks: + maxItems: 1 + + clock-names: + const: fck + charger: type: object - additionalProperties: true + properties: compatible: true + required: - compatible rtc: type: object additionalProperties: false + properties: compatible: const: ti,twl4030-rtc interrupts: maxItems: 1 + madc: + type: object + $ref: /schemas/iio/adc/ti,twl4030-madc.yaml + unevaluatedProperties: false + + pwrbutton: + type: object + additionalProperties: false + + properties: + compatible: + const: ti,twl4030-pwrbutton + interrupts: + items: + - items: + const: 8 + + watchdog: + type: object + additionalProperties: false + + properties: + compatible: + const: ti,twl4030-wdt + + audio: + type: object + additionalProperties: true + + properties: + compatible: + const: ti,twl4030-audio + + required: + - compatible + + keypad: + type: object + additionalProperties: true + + properties: + compatible: + const: ti,twl4030-keypad + + required: + - compatible + + twl4030-usb: + type: object + additionalProperties: true + + properties: + compatible: + const: ti,twl4030-usb + + required: + - compatible + + gpio: + type: object + additionalProperties: true + + properties: + compatible: + const: ti,twl4030-gpio + + required: + - compatible + + power: + type: object + additionalProperties: false + description: > + The power management module inside the TWL4030 provides several + facilities to control the power resources, including power scripts. + + For now, the binding only supports the complete shutdown of the + system after poweroff. + + Board-specific compatible strings may be used for platform-specific + power configurations. + + A board-specific compatible string (e.g., ti,twl4030-power-omap3-evm) + may be paired with a generic fallback (generally for power saving mode). + + properties: + compatible: + oneOf: + # Case 1: A single compatible string is provided. + - enum: + - ti,twl4030-power + - ti,twl4030-power-reset + - ti,twl4030-power-idle + - ti,twl4030-power-idle-osc-off + - ti,twl4030-power-omap3-sdp + - ti,twl4030-power-omap3-ldp + - ti,twl4030-power-omap3-evm + + # Case 2: The specific, valid fallback for 'idle-osc-off'. + - items: + - const: ti,twl4030-power-idle-osc-off + - const: ti,twl4030-power-idle + + # Case 3: The specific, valid fallback for 'omap3-evm'. + - items: + - const: ti,twl4030-power-omap3-evm + - const: ti,twl4030-power-idle + + ti,system-power-controller: + type: boolean + deprecated: true + description: > + DEPRECATED. The standard 'system-power-controller' + property on the parent node should be used instead. + + ti,use_poweroff: + type: boolean + deprecated: true + description: DEPRECATED, to be removed. + + required: + - compatible + + gpadc: + type: object + $ref: /schemas/iio/adc/ti,twl6030-gpadc.yaml + unevaluatedProperties: false + + properties: + compatible: true + + usb-comparator: + type: object + additionalProperties: true + + properties: + compatible: + const: ti,twl6030-usb + + required: + - compatible + + pwm: + type: object + $ref: /schemas/pwm/pwm.yaml# + unevaluatedProperties: false + description: + PWM controllers (PWM1 and PWM2 on TWL4030, PWM0 and PWM1 on TWL6030/32). + + properties: + compatible: + enum: + - ti,twl4030-pwm + - ti,twl6030-pwm + + '#pwm-cells': + const: 2 + + required: + - compatible + - '#pwm-cells' + + pwmled: + type: object + $ref: /schemas/pwm/pwm.yaml# + unevaluatedProperties: false + description: > + PWM controllers connected to LED terminals (PWMA and PWMB on TWL4030. + + LED PWM on TWL6030/32, mainly used as charging indicator LED). + + properties: + compatible: + enum: + - ti,twl4030-pwmled + - ti,twl6030-pwmled + + '#pwm-cells': + const: 2 + + required: + - compatible + - '#pwm-cells' + patternProperties: "^regulator-": type: object unevaluatedProperties: false $ref: /schemas/regulator/regulator.yaml + properties: compatible: true regulator-initial-mode: @@ -211,12 +413,13 @@ patternProperties: # with low power consumption with low load current capability - 0x0e # Active mode, the regulator can deliver its nominal output # voltage with full-load current capability + ti,retain-on-reset: - description: - Does not turn off the supplies during warm - reset. Could be needed for VMMC, as TWL6030 - reset sequence for this signal does not comply - with the SD specification. + description: > + Does not turn off the supplies during warm reset. + + Could be needed for VMMC, as TWL6030 reset sequence for + this signal does not comply with the SD specification. type: boolean unevaluatedProperties: false @@ -271,6 +474,16 @@ examples: compatible = "ti,twl6030-vmmc"; ti,retain-on-reset; }; + + pwm { + compatible = "ti,twl6030-pwm"; + #pwm-cells = <2>; + }; + + pwmled { + compatible = "ti,twl6030-pwmled"; + #pwm-cells = <2>; + }; }; }; @@ -325,6 +538,20 @@ examples: watchdog { compatible = "ti,twl4030-wdt"; }; + + power { + compatible = "ti,twl4030-power"; + }; + + pwm { + compatible = "ti,twl4030-pwm"; + #pwm-cells = <2>; + }; + + pwmled { + compatible = "ti,twl4030-pwmled"; + #pwm-cells = <2>; + }; }; }; ... diff --git a/Documentation/devicetree/bindings/mfd/twl4030-power.txt b/Documentation/devicetree/bindings/mfd/twl4030-power.txt deleted file mode 100644 index 3d19963312ce..000000000000 --- a/Documentation/devicetree/bindings/mfd/twl4030-power.txt +++ /dev/null @@ -1,48 +0,0 @@ -Texas Instruments TWL family (twl4030) reset and power management module - -The power management module inside the TWL family provides several facilities -to control the power resources, including power scripts. For now, the -binding only supports the complete shutdown of the system after poweroff. - -Required properties: -- compatible : must be one of the following - "ti,twl4030-power" - "ti,twl4030-power-reset" - "ti,twl4030-power-idle" - "ti,twl4030-power-idle-osc-off" - -The use of ti,twl4030-power-reset is recommended at least on -3530 that needs a special configuration for warm reset to work. - -When using ti,twl4030-power-idle, the TI recommended configuration -for idle modes is loaded to the tlw4030 PMIC. - -When using ti,twl4030-power-idle-osc-off, the TI recommended -configuration is used with the external oscillator being shut -down during off-idle. Note that this does not work on all boards -depending on how the external oscillator is wired. - -Optional properties: - -- ti,system-power-controller: This indicates that TWL4030 is the - power supply master of the system. With this flag, the chip will - initiate an ACTIVE-to-OFF or SLEEP-to-OFF transition when the - system poweroffs. - -- ti,use_poweroff: Deprecated name for ti,system-power-controller - -Example: -&i2c1 { - clock-frequency = <2600000>; - - twl: twl@48 { - reg = <0x48>; - interrupts = <7>; /* SYS_NIRQ cascaded to intc */ - interrupt-parent = <&intc>; - - twl_power: power { - compatible = "ti,twl4030-power"; - ti,use_poweroff; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/pwm/ti,twl-pwm.txt b/Documentation/devicetree/bindings/pwm/ti,twl-pwm.txt deleted file mode 100644 index d97ca1964e94..000000000000 --- a/Documentation/devicetree/bindings/pwm/ti,twl-pwm.txt +++ /dev/null @@ -1,17 +0,0 @@ -Texas Instruments TWL series PWM drivers - -Supported PWMs: -On TWL4030 series: PWM1 and PWM2 -On TWL6030 series: PWM0 and PWM1 - -Required properties: -- compatible: "ti,twl4030-pwm" or "ti,twl6030-pwm" -- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of - the cells format. - -Example: - -twl_pwm: pwm { - compatible = "ti,twl6030-pwm"; - #pwm-cells = <2>; -}; diff --git a/Documentation/devicetree/bindings/pwm/ti,twl-pwmled.txt b/Documentation/devicetree/bindings/pwm/ti,twl-pwmled.txt deleted file mode 100644 index 31ca1b032ef0..000000000000 --- a/Documentation/devicetree/bindings/pwm/ti,twl-pwmled.txt +++ /dev/null @@ -1,17 +0,0 @@ -Texas Instruments TWL series PWM drivers connected to LED terminals - -Supported PWMs: -On TWL4030 series: PWMA and PWMB (connected to LEDA and LEDB terminals) -On TWL6030 series: LED PWM (mainly used as charging indicator LED) - -Required properties: -- compatible: "ti,twl4030-pwmled" or "ti,twl6030-pwmled" -- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of - the cells format. - -Example: - -twl_pwmled: pwmled { - compatible = "ti,twl6030-pwmled"; - #pwm-cells = <2>; -}; -- cgit v1.2.3 From 950c6451a5c38d375993c3b9da427e2e69b01c30 Mon Sep 17 00:00:00 2001 From: "Rafael J. Wysocki" Date: Fri, 26 Sep 2025 12:31:47 +0200 Subject: cpufreq: Drop unused symbol CPUFREQ_ETERNAL Drop CPUFREQ_ETERNAL that has no users any more along with all references to it in the documentation. No functional impact. Reviewed-by: Mario Limonciello (AMD) Reviewed-by: Jie Zhan Signed-off-by: Rafael J. Wysocki Acked-by: Viresh Kumar Reviewed-by: Qais Yousef --- Documentation/admin-guide/pm/cpufreq.rst | 4 ---- Documentation/cpu-freq/cpu-drivers.rst | 3 +-- Documentation/translations/zh_CN/cpu-freq/cpu-drivers.rst | 3 +-- Documentation/translations/zh_TW/cpu-freq/cpu-drivers.rst | 3 +-- 4 files changed, 3 insertions(+), 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/pm/cpufreq.rst b/Documentation/admin-guide/pm/cpufreq.rst index cacb9f0307dd..738d7b4dc33a 100644 --- a/Documentation/admin-guide/pm/cpufreq.rst +++ b/Documentation/admin-guide/pm/cpufreq.rst @@ -274,10 +274,6 @@ are the following: The time it takes to switch the CPUs belonging to this policy from one P-state to another, in nanoseconds. - If unknown or if known to be so high that the scaling driver does not - work with the `ondemand`_ governor, -1 (:c:macro:`CPUFREQ_ETERNAL`) - will be returned by reads from this attribute. - ``related_cpus`` List of all (online and offline) CPUs belonging to this policy. diff --git a/Documentation/cpu-freq/cpu-drivers.rst b/Documentation/cpu-freq/cpu-drivers.rst index d84ededb66f9..c5635ac3de54 100644 --- a/Documentation/cpu-freq/cpu-drivers.rst +++ b/Documentation/cpu-freq/cpu-drivers.rst @@ -109,8 +109,7 @@ Then, the driver must fill in the following values: +-----------------------------------+--------------------------------------+ |policy->cpuinfo.transition_latency | the time it takes on this CPU to | | | switch between two frequencies in | -| | nanoseconds (if appropriate, else | -| | specify CPUFREQ_ETERNAL) | +| | nanoseconds | +-----------------------------------+--------------------------------------+ |policy->cur | The current operating frequency of | | | this CPU (if appropriate) | diff --git a/Documentation/translations/zh_CN/cpu-freq/cpu-drivers.rst b/Documentation/translations/zh_CN/cpu-freq/cpu-drivers.rst index 2ca92042767b..8238f4c6e4f5 100644 --- a/Documentation/translations/zh_CN/cpu-freq/cpu-drivers.rst +++ b/Documentation/translations/zh_CN/cpu-freq/cpu-drivers.rst @@ -112,8 +112,7 @@ CPUfreq核心层注册一个cpufreq_driver结构体。 | | | +-----------------------------------+--------------------------------------+ |policy->cpuinfo.transition_latency | CPU在两个频率之间切换所需的时间，以 | -| | 纳秒为单位（如不适用，设定为 | -| | CPUFREQ_ETERNAL） | +| | 纳秒为单位 | | | | +-----------------------------------+--------------------------------------+ |policy->cur | 该CPU当前的工作频率(如适用) | diff --git a/Documentation/translations/zh_TW/cpu-freq/cpu-drivers.rst b/Documentation/translations/zh_TW/cpu-freq/cpu-drivers.rst index add3de2d4523..5435c3928d4b 100644 --- a/Documentation/translations/zh_TW/cpu-freq/cpu-drivers.rst +++ b/Documentation/translations/zh_TW/cpu-freq/cpu-drivers.rst @@ -112,8 +112,7 @@ CPUfreq核心層註冊一個cpufreq_driver結構體。 | | | +-----------------------------------+--------------------------------------+ |policy->cpuinfo.transition_latency | CPU在兩個頻率之間切換所需的時間，以 | -| | 納秒爲單位（如不適用，設定爲 | -| | CPUFREQ_ETERNAL） | +| | 納秒爲單位 | | | | +-----------------------------------+--------------------------------------+ |policy->cur | 該CPU當前的工作頻率(如適用) | -- cgit v1.2.3 From f9a68cf7b9afeb1780527f840995fc4292a2202a Mon Sep 17 00:00:00 2001 From: Akiyoshi Kurita Date: Tue, 30 Sep 2025 22:45:47 +0900 Subject: dt-bindings: mmc: Correct typo "upto" to "up to" The word "upto" is a typo for "up to". Correct this typo in the mmc-controller-common binding documentation. Signed-off-by: Akiyoshi Kurita Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml index 1e601da0339a..9a369c8e9cb8 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml @@ -85,7 +85,7 @@ properties: - for eMMC, the maximum supported frequency is 200MHz, - for SD/SDIO cards the SDR104 mode has a max supported frequency of 208MHz, - - some mmc host controllers do support a max frequency upto + - some mmc host controllers do support a max frequency up to 384MHz. So, lets keep the maximum supported value here. -- cgit v1.2.3 From b8ef623f18da24ee9e1cf9bef66dacd2e8574902 Mon Sep 17 00:00:00 2001 From: Christian Bruel Date: Wed, 20 Aug 2025 09:54:05 +0200 Subject: dt-bindings: PCI: Add STM32MP25 PCIe Endpoint bindings STM32MP25 PCIe Controller is based on the DesignWare core configured as endpoint mode from the SYSCFG register. Signed-off-by: Christian Bruel Signed-off-by: Manivannan Sadhasivam Signed-off-by: Bjorn Helgaas Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250820075411.1178729-6-christian.bruel@foss.st.com --- .../devicetree/bindings/pci/st,stm32-pcie-ep.yaml | 73 ++++++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/st,stm32-pcie-ep.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/st,stm32-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/st,stm32-pcie-ep.yaml new file mode 100644 index 000000000000..b076ada4f332 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/st,stm32-pcie-ep.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/st,stm32-pcie-ep.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32MP25 PCIe Endpoint + +maintainers: + - Christian Bruel + +description: + PCIe endpoint controller based on the Synopsys DesignWare PCIe core. + +allOf: + - $ref: /schemas/pci/snps,dw-pcie-ep.yaml# + - $ref: /schemas/pci/st,stm32-pcie-common.yaml# + +properties: + compatible: + const: st,stm32mp25-pcie-ep + + reg: + items: + - description: Data Bus Interface (DBI) registers. + - description: Data Bus Interface (DBI) shadow registers. + - description: Internal Address Translation Unit (iATU) registers. + - description: PCIe configuration registers. + + reg-names: + items: + - const: dbi + - const: dbi2 + - const: atu + - const: addr_space + + reset-gpios: + description: GPIO controlled connection to PERST# signal + maxItems: 1 + + phys: + maxItems: 1 + +required: + - phys + - reset-gpios + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + + pcie-ep@48400000 { + compatible = "st,stm32mp25-pcie-ep"; + reg = <0x48400000 0x400000>, + <0x48500000 0x100000>, + <0x48700000 0x80000>, + <0x10000000 0x10000000>; + reg-names = "dbi", "dbi2", "atu", "addr_space"; + clocks = <&rcc CK_BUS_PCIE>; + phys = <&combophy PHY_TYPE_PCIE>; + resets = <&rcc PCIE_R>; + pinctrl-names = "default", "init"; + pinctrl-0 = <&pcie_pins_a>; + pinctrl-1 = <&pcie_init_pins_a>; + reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>; + access-controllers = <&rifsc 68>; + power-domains = <&CLUSTER_PD>; + }; -- cgit v1.2.3 From 7a6e249f90fd8d3fcaa8c497bc72c8e61b988bf0 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Mon, 22 Sep 2025 17:36:16 +0700 Subject: Documentation: fb: Split toctree Framebuffer docs toctree consists of driver-independent docs (e.g. API docs) and driver-specific docs. The latter has much more entries. Group the docs into separate toctrees. Reviewed-by: Randy Dunlap Tested-by: Randy Dunlap Signed-off-by: Bagas Sanjaya Signed-off-by: Helge Deller --- Documentation/fb/index.rst | 80 ++++++++++++++++++++++++++-------------------- 1 file changed, 45 insertions(+), 35 deletions(-) (limited to 'Documentation') diff --git a/Documentation/fb/index.rst b/Documentation/fb/index.rst index 33e3c49f8856..e2f7488b6e2e 100644 --- a/Documentation/fb/index.rst +++ b/Documentation/fb/index.rst @@ -4,42 +4,52 @@ Frame Buffer ============ +General information +=================== + +.. toctree:: + :maxdepth: 1 + + api + cmap_xfbdev + deferred_io + fbcon + framebuffer + internals + modedb + +Driver documentation +==================== + .. toctree:: - :maxdepth: 1 - - api - arkfb - aty128fb - cirrusfb - cmap_xfbdev - deferred_io - efifb - ep93xx-fb - fbcon - framebuffer - gxfb - intel810 - internals - lxfb - matroxfb - metronomefb - modedb - pvr2fb - pxafb - s3fb - sa1100fb - sh7760fb - sisfb - sm501 - sm712fb - sstfb - tgafb - tridentfb - udlfb - uvesafb - vesafb - viafb - vt8623fb + :maxdepth: 1 + + arkfb + aty128fb + cirrusfb + efifb + ep93xx-fb + gxfb + intel810 + lxfb + matroxfb + metronomefb + pvr2fb + pxafb + s3fb + sa1100fb + sh7760fb + sisfb + sm501 + sm712fb + sstfb + tgafb + tridentfb + udlfb + uvesafb + vesafb + viafb + vt8623fb .. only:: subproject and html -- cgit v1.2.3 From 9070fbcb9af5dd351628d030973a143f9e1b0ed4 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Mon, 22 Sep 2025 17:36:14 +0700 Subject: Documentation: fb: ep93xx: Demote section headings Section headings are formatted the same as title heading, thus increasing number of entries in framebuffer toctree. Demote them. Reviewed-by: Randy Dunlap Tested-by: Randy Dunlap Signed-off-by: Bagas Sanjaya Signed-off-by: Helge Deller --- Documentation/fb/ep93xx-fb.rst | 4 ---- 1 file changed, 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/fb/ep93xx-fb.rst b/Documentation/fb/ep93xx-fb.rst index 1dd67f4688c7..93b3494f5309 100644 --- a/Documentation/fb/ep93xx-fb.rst +++ b/Documentation/fb/ep93xx-fb.rst @@ -41,7 +41,6 @@ your board initialisation function:: ep93xx_register_fb(&some_board_fb_info); -===================== Video Attribute Flags ===================== @@ -79,7 +78,6 @@ EP93XXFB_USE_SDCSN2 Use SDCSn[2] for the framebuffer. EP93XXFB_USE_SDCSN3 Use SDCSn[3] for the framebuffer. =============================== ====================================== -================== Platform callbacks ================== @@ -101,7 +99,6 @@ obtained as follows:: /* Board specific framebuffer setup */ } -====================== Setting the video mode ====================== @@ -119,7 +116,6 @@ set when the module is installed:: modprobe ep93xx-fb video=320x240 -============== Screenpage bug ============== -- cgit v1.2.3 From 9d079868ae4b519ab925296337050fd1f2a20720 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Mon, 22 Sep 2025 17:36:15 +0700 Subject: Documentation: fb: Retitle driver docs Many framebuffer driver docs are copied from vesafb docs as their template, including "What is " title. Such title implies the introductory section, however, and not the whole docs. Retitle them. Reviewed-by: Randy Dunlap Tested-by: Randy Dunlap Signed-off-by: Bagas Sanjaya Signed-off-by: Helge Deller --- Documentation/fb/aty128fb.rst | 8 +++----- Documentation/fb/efifb.rst | 6 +++--- Documentation/fb/gxfb.rst | 8 +++----- Documentation/fb/lxfb.rst | 9 +++------ Documentation/fb/matroxfb.rst | 9 +++------ Documentation/fb/pvr2fb.rst | 6 +++--- Documentation/fb/sa1100fb.rst | 9 +++------ Documentation/fb/sisfb.rst | 6 +++--- Documentation/fb/sm712fb.rst | 6 +++--- Documentation/fb/tgafb.rst | 6 +++--- Documentation/fb/udlfb.rst | 6 +++--- Documentation/fb/vesafb.rst | 6 +++--- 12 files changed, 36 insertions(+), 49 deletions(-) (limited to 'Documentation') diff --git a/Documentation/fb/aty128fb.rst b/Documentation/fb/aty128fb.rst index 3f107718f933..0da8070a5521 100644 --- a/Documentation/fb/aty128fb.rst +++ b/Documentation/fb/aty128fb.rst @@ -1,8 +1,6 @@ -================= -What is aty128fb? -================= - -.. [This file is cloned from VesaFB/matroxfb] +========================================= +aty128fb - ATI Rage128 framebuffer driver +========================================= This is a driver for a graphic framebuffer for ATI Rage128 based devices on Intel and PPC boxes. diff --git a/Documentation/fb/efifb.rst b/Documentation/fb/efifb.rst index 6badff64756f..3d4aab406dee 100644 --- a/Documentation/fb/efifb.rst +++ b/Documentation/fb/efifb.rst @@ -1,6 +1,6 @@ -============== -What is efifb? -============== +=================================== +efifb - Generic EFI platform driver +=================================== This is a generic EFI platform driver for systems with UEFI firmware. The system must be booted via the EFI stub for this to be usable. efifb supports diff --git a/Documentation/fb/gxfb.rst b/Documentation/fb/gxfb.rst index 5738709bccbb..3fda485606bd 100644 --- a/Documentation/fb/gxfb.rst +++ b/Documentation/fb/gxfb.rst @@ -1,8 +1,6 @@ -============= -What is gxfb? -============= - -.. [This file is cloned from VesaFB/aty128fb] +======================================= +gxfb - AMD Geode GX2 framebuffer driver +======================================= This is a graphics framebuffer driver for AMD Geode GX2 based processors. diff --git a/Documentation/fb/lxfb.rst b/Documentation/fb/lxfb.rst index 863e6b98fbae..0a176ab376e3 100644 --- a/Documentation/fb/lxfb.rst +++ b/Documentation/fb/lxfb.rst @@ -1,9 +1,6 @@ -============= -What is lxfb? -============= - -.. [This file is cloned from VesaFB/aty128fb] - +====================================== +lxfb - AMD Geode LX framebuffer driver +====================================== This is a graphics framebuffer driver for AMD Geode LX based processors. diff --git a/Documentation/fb/matroxfb.rst b/Documentation/fb/matroxfb.rst index 6158c49c8571..8ac7534a2e61 100644 --- a/Documentation/fb/matroxfb.rst +++ b/Documentation/fb/matroxfb.rst @@ -1,9 +1,6 @@ -================= -What is matroxfb? -================= - -.. [This file is cloned from VesaFB. Thanks go to Gerd Knorr] - +================================================ +matroxfb - Framebuffer driver for Matrox devices +================================================ This is a driver for a graphic framebuffer for Matrox devices on Alpha, Intel and PPC boxes. diff --git a/Documentation/fb/pvr2fb.rst b/Documentation/fb/pvr2fb.rst index fcf2c21c8fcf..315ce085a585 100644 --- a/Documentation/fb/pvr2fb.rst +++ b/Documentation/fb/pvr2fb.rst @@ -1,6 +1,6 @@ -=============== -What is pvr2fb? -=============== +=============================================== +pvr2fb - PowerVR 2 graphics frame buffer driver +=============================================== This is a driver for PowerVR 2 based graphics frame buffers, such as the one found in the Dreamcast. diff --git a/Documentation/fb/sa1100fb.rst b/Documentation/fb/sa1100fb.rst index 67e2650e017d..c5ca019b361a 100644 --- a/Documentation/fb/sa1100fb.rst +++ b/Documentation/fb/sa1100fb.rst @@ -1,9 +1,6 @@ -================= -What is sa1100fb? -================= - -.. [This file is cloned from VesaFB/matroxfb] - +================================================= +sa1100fb - SA-1100 LCD graphic framebuffer driver +================================================= This is a driver for a graphic framebuffer for the SA-1100 LCD controller. diff --git a/Documentation/fb/sisfb.rst b/Documentation/fb/sisfb.rst index 8f4e502ea12e..9982f5ee0560 100644 --- a/Documentation/fb/sisfb.rst +++ b/Documentation/fb/sisfb.rst @@ -1,6 +1,6 @@ -============== -What is sisfb? -============== +===================================== +sisfb - SiS framebuffer device driver +===================================== sisfb is a framebuffer device driver for SiS (Silicon Integrated Systems) graphics chips. Supported are: diff --git a/Documentation/fb/sm712fb.rst b/Documentation/fb/sm712fb.rst index 8e000f80b5bc..abbc6efae25f 100644 --- a/Documentation/fb/sm712fb.rst +++ b/Documentation/fb/sm712fb.rst @@ -1,6 +1,6 @@ -================ -What is sm712fb? -================ +========================================================== +sm712fb - Silicon Motion SM712 graphics framebuffer driver +========================================================== This is a graphics framebuffer driver for Silicon Motion SM712 based processors. diff --git a/Documentation/fb/tgafb.rst b/Documentation/fb/tgafb.rst index 0c50d2134aa4..f0944da1ea5e 100644 --- a/Documentation/fb/tgafb.rst +++ b/Documentation/fb/tgafb.rst @@ -1,6 +1,6 @@ -============== -What is tgafb? -============== +======================================= +tgafb - TGA graphics framebuffer driver +======================================= This is a driver for DECChip 21030 based graphics framebuffers, a.k.a. TGA cards, which are usually found in older Digital Alpha systems. The diff --git a/Documentation/fb/udlfb.rst b/Documentation/fb/udlfb.rst index 99cfbb7a1922..9e75ac6b07c3 100644 --- a/Documentation/fb/udlfb.rst +++ b/Documentation/fb/udlfb.rst @@ -1,6 +1,6 @@ -============== -What is udlfb? -============== +================================== +udlfb - DisplayLink USB 2.0 driver +================================== This is a driver for DisplayLink USB 2.0 era graphics chips. diff --git a/Documentation/fb/vesafb.rst b/Documentation/fb/vesafb.rst index f890a4f5623b..d8241e38bb28 100644 --- a/Documentation/fb/vesafb.rst +++ b/Documentation/fb/vesafb.rst @@ -1,6 +1,6 @@ -=============== -What is vesafb? -=============== +=========================================== +vesafb - Generic graphic framebuffer driver +=========================================== This is a generic driver for a graphic framebuffer on intel boxes. -- cgit v1.2.3 From 989ed3cad2fdb7921bf0f9f0f730e1bb065946c2 Mon Sep 17 00:00:00 2001 From: Gopi Krishna Menon Date: Fri, 3 Oct 2025 23:06:00 +0530 Subject: docs/zh_TW: Fix malformed table Running "make htmldocs" generate the following build error in zh_TW/cpu-freq/cpu-drivers.rst: Documentation/translations/zh_TW/cpu-freq/cpu-drivers.rst:109: ERROR: Malformed table. Fix the table formatting to resolve the error. Signed-off-by: Gopi Krishna Menon Signed-off-by: Rafael J. Wysocki --- Documentation/translations/zh_TW/cpu-freq/cpu-drivers.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/translations/zh_TW/cpu-freq/cpu-drivers.rst b/Documentation/translations/zh_TW/cpu-freq/cpu-drivers.rst index 5435c3928d4b..7f751a7add56 100644 --- a/Documentation/translations/zh_TW/cpu-freq/cpu-drivers.rst +++ b/Documentation/translations/zh_TW/cpu-freq/cpu-drivers.rst @@ -112,7 +112,7 @@ CPUfreq核心層註冊一個cpufreq_driver結構體。 | | | +-----------------------------------+--------------------------------------+ |policy->cpuinfo.transition_latency | CPU在兩個頻率之間切換所需的時間，以 | -| | 納秒爲單位 | +| | 納秒爲單位 | | | | +-----------------------------------+--------------------------------------+ |policy->cur | 該CPU當前的工作頻率(如適用) | -- cgit v1.2.3 From 7e8f305a081e22ce81aab7f7b9ce01437cbd38b3 Mon Sep 17 00:00:00 2001 From: Gopi Krishna Menon Date: Fri, 3 Oct 2025 23:05:59 +0530 Subject: docs/zh_CN: Fix malformed table Running "make htmldocs" generates the following build error in zh_CN/cpu-freq/cpu-drivers.rst: Documentation/translations/zh_CN/cpu-freq/cpu-drivers.rst:109: ERROR: Malformed table. Fix the table formatting to resolve the error. Signed-off-by: Gopi Krishna Menon Signed-off-by: Rafael J. Wysocki --- Documentation/translations/zh_CN/cpu-freq/cpu-drivers.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/translations/zh_CN/cpu-freq/cpu-drivers.rst b/Documentation/translations/zh_CN/cpu-freq/cpu-drivers.rst index 8238f4c6e4f5..2d5e84d8e58d 100644 --- a/Documentation/translations/zh_CN/cpu-freq/cpu-drivers.rst +++ b/Documentation/translations/zh_CN/cpu-freq/cpu-drivers.rst @@ -112,7 +112,7 @@ CPUfreq核心层注册一个cpufreq_driver结构体。 | | | +-----------------------------------+--------------------------------------+ |policy->cpuinfo.transition_latency | CPU在两个频率之间切换所需的时间，以 | -| | 纳秒为单位 | +| | 纳秒为单位 | | | | +-----------------------------------+--------------------------------------+ |policy->cur | 该CPU当前的工作频率(如适用) | -- cgit v1.2.3 From a089461a5994204558096eff4e4e518614755463 Mon Sep 17 00:00:00 2001 From: Anshuman Khandual Date: Mon, 29 Sep 2025 13:00:45 +0100 Subject: Documentation/mm: drop pxx_mkdevmap() descriptions from page table helpers Remove pxx_mkdevmap() descriptions, as these helper functions have already been dropped (including DEBUG_VM_PGTABLE test) via the commit d438d2734170 ("mm: remove devmap related functions and page table bits"). Link: https://lkml.kernel.org/r/20250929120045.1109707-1-anshuman.khandual@arm.com Signed-off-by: Anshuman Khandual Acked-by: David Hildenbrand Reviewed-by: Dev Jain Cc: Lorenzo Stoakes Cc: Alistair Popple Signed-off-by: Andrew Morton --- Documentation/mm/arch_pgtable_helpers.rst | 6 ------ 1 file changed, 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/mm/arch_pgtable_helpers.rst b/Documentation/mm/arch_pgtable_helpers.rst index ba2f658bc241..2447b8a4b08c 100644 --- a/Documentation/mm/arch_pgtable_helpers.rst +++ b/Documentation/mm/arch_pgtable_helpers.rst @@ -52,8 +52,6 @@ PTE Page Table Helpers +---------------------------+--------------------------------------------------+ | pte_mkspecial | Creates a special PTE | +---------------------------+--------------------------------------------------+ -| pte_mkdevmap | Creates a ZONE_DEVICE mapped PTE | -+---------------------------+--------------------------------------------------+ | pte_mksoft_dirty | Creates a soft dirty PTE | +---------------------------+--------------------------------------------------+ | pte_clear_soft_dirty | Clears a soft dirty PTE | @@ -124,8 +122,6 @@ PMD Page Table Helpers +---------------------------+--------------------------------------------------+ | pmd_mkspecial | Creates a special PMD | +---------------------------+--------------------------------------------------+ -| pmd_mkdevmap | Creates a ZONE_DEVICE mapped PMD | -+---------------------------+--------------------------------------------------+ | pmd_mksoft_dirty | Creates a soft dirty PMD | +---------------------------+--------------------------------------------------+ | pmd_clear_soft_dirty | Clears a soft dirty PMD | @@ -185,8 +181,6 @@ PUD Page Table Helpers +---------------------------+--------------------------------------------------+ | pud_wrprotect | Creates a write protected PUD | +---------------------------+--------------------------------------------------+ -| pud_mkdevmap | Creates a ZONE_DEVICE mapped PUD | -+---------------------------+--------------------------------------------------+ | pud_mkinvalid | Invalidates a present PUD; do not call for | | | non-present PUD [1] | +---------------------------+--------------------------------------------------+ -- cgit v1.2.3 From 0395a5e8fd07645df6743fd2a6883708196d9d75 Mon Sep 17 00:00:00 2001 From: Jonas Jelonek Date: Sat, 27 Sep 2025 10:19:24 +0000 Subject: dt-bindings: i2c: realtek,rtl9301-i2c: fix wording and typos Fix wording of binding description to use plural because there is not only a single RTL9300 SoC. RTL9300 describes a whole family of Realtek SoCs. Add missing word 'of' in description of reg property. Change 'SDA pin' to 'SDA line number' because the property must contain the SDA (channel) number ranging from 0-7 instead of a real pin number. Signed-off-by: Jonas Jelonek Reviewed-by: Rob Herring (Arm) Reviewed-by: Chris Packham Tested-by: Chris Packham # On RTL9302C based board Tested-by: Markus Stockhausen Signed-off-by: Andi Shyti Link: https://lore.kernel.org/r/20250927101931.71575-3-jelonek.jonas@gmail.com --- Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml b/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml index 69ac5db8b914..274e2ab8b612 100644 --- a/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml @@ -10,7 +10,7 @@ maintainers: - Chris Packham description: - The RTL9300 SoC has two I2C controllers. Each of these has an SCL line (which + RTL9300 SoCs have two I2C controllers. Each of these has an SCL line (which if not-used for SCL can be a GPIO). There are 8 common SDA lines that can be assigned to either I2C controller. @@ -27,7 +27,7 @@ properties: reg: items: - - description: Register offset and size this I2C controller. + - description: Register offset and size of this I2C controller. "#address-cells": const: 1 @@ -42,7 +42,7 @@ patternProperties: properties: reg: - description: The SDA pin associated with the I2C bus. + description: The SDA line number associated with the I2C bus. maxItems: 1 required: -- cgit v1.2.3 From 99fd09e01db2c6fc4c6ffe851b337f64ff93e1b5 Mon Sep 17 00:00:00 2001 From: Jonas Jelonek Date: Sat, 27 Sep 2025 10:19:30 +0000 Subject: dt-bindings: i2c: realtek,rtl9301-i2c: extend for RTL9310 support Adjust the regex for child-node address to account for the fact that RTL9310 supports 12 instead of only 8 SDA lines. Also, narrow this per variant. Add a vendor-specific property to explicitly specify the SCL line number of the defined I2C controller/master. This is required, in particular for RTL9310, to operate on the correct SCL for each controller. Require this property to be specified for RTL9310. Add compatibles for known SoC variants RTL9311, RTL9312 and RTL9313. Signed-off-by: Jonas Jelonek Reviewed-by: Rob Herring (Arm) Reviewed-by: Chris Packham Tested-by: Markus Stockhausen Signed-off-by: Andi Shyti Link: https://lore.kernel.org/r/20250927101931.71575-9-jelonek.jonas@gmail.com --- .../bindings/i2c/realtek,rtl9301-i2c.yaml | 39 ++++++++++++++++++++-- 1 file changed, 37 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml b/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml index 274e2ab8b612..17ce39c19ab1 100644 --- a/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml @@ -13,6 +13,8 @@ description: RTL9300 SoCs have two I2C controllers. Each of these has an SCL line (which if not-used for SCL can be a GPIO). There are 8 common SDA lines that can be assigned to either I2C controller. + RTL9310 SoCs have equal capabilities but support 12 common SDA lines which + can be assigned to either I2C controller. properties: compatible: @@ -23,7 +25,15 @@ properties: - realtek,rtl9302c-i2c - realtek,rtl9303-i2c - const: realtek,rtl9301-i2c - - const: realtek,rtl9301-i2c + - items: + - enum: + - realtek,rtl9311-i2c + - realtek,rtl9312-i2c + - realtek,rtl9313-i2c + - const: realtek,rtl9310-i2c + - enum: + - realtek,rtl9301-i2c + - realtek,rtl9310-i2c reg: items: @@ -35,8 +45,14 @@ properties: "#size-cells": const: 0 + realtek,scl: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The SCL line number of this I2C controller. + enum: [ 0, 1 ] + patternProperties: - '^i2c@[0-7]$': + '^i2c@[0-9ab]$': $ref: /schemas/i2c/i2c-controller.yaml unevaluatedProperties: false @@ -48,6 +64,25 @@ patternProperties: required: - reg + +allOf: + - if: + properties: + compatible: + contains: + const: realtek,rtl9310-i2c + then: + required: + - realtek,scl + - if: + properties: + compatible: + contains: + const: realtek,rtl9301-i2c + then: + patternProperties: + '^i2c@[89ab]$': false + required: - compatible - reg -- cgit v1.2.3 From 7a6399e327f4d5607d984c336c9c6e1cfcd9194a Mon Sep 17 00:00:00 2001 From: Bhanu Seshu Kumar Valluri Date: Wed, 1 Oct 2025 14:37:57 +0530 Subject: ALSA: emu10k1: Fix typo in docs interally => internally Signed-off-by: Bhanu Seshu Kumar Valluri Signed-off-by: Takashi Iwai --- Documentation/sound/cards/emu-mixer.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/sound/cards/emu-mixer.rst b/Documentation/sound/cards/emu-mixer.rst index d87a6338d3d8..edcedada4c96 100644 --- a/Documentation/sound/cards/emu-mixer.rst +++ b/Documentation/sound/cards/emu-mixer.rst @@ -66,7 +66,7 @@ FX-bus name='Clock Source',index=0 --------------------------- -This control allows switching the word clock between interally generated +This control allows switching the word clock between internally generated 44.1 or 48 kHz, or a number of external sources. Note: the sources for the 1616 CardBus card are unclear. Please report your -- cgit v1.2.3 From a6b4f791cdc56655b2dee8ac793f5b28dc4e542d Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 24 Sep 2025 17:28:46 -0500 Subject: dt-bindings: rtc: Convert apm,xgene-rtc to DT schema Convert the APM XGene RTC binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250924222848.2949235-1-robh@kernel.org Signed-off-by: Alexandre Belloni --- .../devicetree/bindings/rtc/apm,xgene-rtc.yaml | 45 ++++++++++++++++++++++ .../devicetree/bindings/rtc/xgene-rtc.txt | 28 -------------- 2 files changed, 45 insertions(+), 28 deletions(-) create mode 100644 Documentation/devicetree/bindings/rtc/apm,xgene-rtc.yaml delete mode 100644 Documentation/devicetree/bindings/rtc/xgene-rtc.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/rtc/apm,xgene-rtc.yaml b/Documentation/devicetree/bindings/rtc/apm,xgene-rtc.yaml new file mode 100644 index 000000000000..b8f46536fd5a --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/apm,xgene-rtc.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/apm,xgene-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: APM X-Gene Real Time Clock + +maintainers: + - Khuong Dinh + +properties: + compatible: + const: apm,xgene-rtc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + '#clock-cells': + const: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - '#clock-cells' + - clocks + +additionalProperties: false + +examples: + - | + rtc@10510000 { + compatible = "apm,xgene-rtc"; + reg = <0x10510000 0x400>; + interrupts = <0x0 0x46 0x4>; + #clock-cells = <1>; + clocks = <&rtcclk 0>; + }; diff --git a/Documentation/devicetree/bindings/rtc/xgene-rtc.txt b/Documentation/devicetree/bindings/rtc/xgene-rtc.txt deleted file mode 100644 index fd195c358446..000000000000 --- a/Documentation/devicetree/bindings/rtc/xgene-rtc.txt +++ /dev/null @@ -1,28 +0,0 @@ -* APM X-Gene Real Time Clock - -RTC controller for the APM X-Gene Real Time Clock - -Required properties: -- compatible : Should be "apm,xgene-rtc" -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: IRQ line for the RTC. -- #clock-cells: Should be 1. -- clocks: Reference to the clock entry. - -Example: - -rtcclk: rtcclk { - compatible = "fixed-clock"; - #clock-cells = <1>; - clock-frequency = <100000000>; - clock-output-names = "rtcclk"; -}; - -rtc: rtc@10510000 { - compatible = "apm,xgene-rtc"; - reg = <0x0 0x10510000 0x0 0x400>; - interrupts = <0x0 0x46 0x4>; - #clock-cells = <1>; - clocks = <&rtcclk 0>; -}; -- cgit v1.2.3 From 451bb96328981808463405d436bd58de16dd967d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Thu, 18 Sep 2025 14:19:28 +0200 Subject: vfio: Dump migration features under debugfs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit A debugfs directory was recently added for VFIO devices. Add a new "features" file under the migration sub-directory to expose which features the device supports. Signed-off-by: Cédric Le Goater Link: https://lore.kernel.org/r/20250918121928.1921871-1-clg@redhat.com Signed-off-by: Alex Williamson --- Documentation/ABI/testing/debugfs-vfio | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/debugfs-vfio b/Documentation/ABI/testing/debugfs-vfio index 90f7c262f591..70ec2d454686 100644 --- a/Documentation/ABI/testing/debugfs-vfio +++ b/Documentation/ABI/testing/debugfs-vfio @@ -23,3 +23,9 @@ Contact: Longfang Liu Description: Read the live migration status of the vfio device. The contents of the state file reflects the migration state relative to those defined in the vfio_device_mig_state enum + +What: /sys/kernel/debug/vfio//migration/features +Date: Oct 2025 +KernelVersion: 6.18 +Contact: Cédric Le Goater +Description: Read the migration features of the vfio device. -- cgit v1.2.3 From 526ce9eb455e03a6dcdbf9a6c57c777c06d1ddf2 Mon Sep 17 00:00:00 2001 From: Sibi Sankar Date: Wed, 24 Sep 2025 20:18:31 +0530 Subject: dt-bindings: mailbox: qcom: Document Glymur CPUCP mailbox controller binding Document CPU Control Processor (CPUCP) mailbox controller for Qualcomm Glymur SoCs. It is software compatible with X1E80100 CPUCP mailbox controller hence fallback to it. Signed-off-by: Sibi Sankar Acked-by: Rob Herring (Arm) Signed-off-by: Jassi Brar --- Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml index f7342d04beec..9122c3d2dc30 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml @@ -15,8 +15,13 @@ description: properties: compatible: - items: - - const: qcom,x1e80100-cpucp-mbox + oneOf: + - items: + - enum: + - qcom,glymur-cpucp-mbox + - const: qcom,x1e80100-cpucp-mbox + - enum: + - qcom,x1e80100-cpucp-mbox reg: items: -- cgit v1.2.3 From 426f4e9414df5d51e7bc6519edb82bccf07ce52f Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:39 +0200 Subject: dt-bindings: mailbox: mediatek,gce-mailbox: Make clock-names optional The GCE Mailbox needs only one clock and the clock-names can be used only by the driver (which, for instance, does not use it), and this is true for all of the currently supported MediaTek SoCs. Stop requiring to specify clock-names on all non-MT8195 GCEs. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Acked-by: Rob Herring (Arm) Reviewed-by: Matthias Brugger Signed-off-by: Jassi Brar --- .../devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml index 73d6db34d64a..587126d03fc6 100644 --- a/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml @@ -60,17 +60,6 @@ required: - interrupts - clocks -allOf: - - if: - not: - properties: - compatible: - contains: - const: mediatek,mt8195-gce - then: - required: - - clock-names - additionalProperties: false examples: -- cgit v1.2.3 From d3e35a151a84ee607c817c08692dfd71568b3e0c Mon Sep 17 00:00:00 2001 From: Nicolas Frattaroli Date: Fri, 3 Oct 2025 22:15:05 +0200 Subject: dt-bindings: mailbox: Add MT8196 GPUEB Mailbox The MediaTek MT8196 SoC includes an embedded MCU referred to as "GPUEB", acting as glue logic to control power and frequency of the Mali GPU. This MCU runs special-purpose firmware for this use, and the main application processor communicates with it through a mailbox. Add a binding that describes this mailbox. Reviewed-by: AngeloGioacchino Del Regno Acked-by: Conor Dooley Reviewed-by: Rob Herring (Arm) Signed-off-by: Nicolas Frattaroli Signed-off-by: Jassi Brar --- .../mailbox/mediatek,mt8196-gpueb-mbox.yaml | 64 ++++++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpueb-mbox.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpueb-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpueb-mbox.yaml new file mode 100644 index 000000000000..ab5b780cb83a --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpueb-mbox.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/mediatek,mt8196-gpueb-mbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MFlexGraphics GPUEB Mailbox Controller + +maintainers: + - Nicolas Frattaroli + +properties: + compatible: + enum: + - mediatek,mt8196-gpueb-mbox + + reg: + items: + - description: mailbox data registers + - description: mailbox control registers + + reg-names: + items: + - const: data + - const: ctl + + clocks: + items: + - description: main clock of the GPUEB MCU + + interrupts: + items: + - description: fires when a new message is received + + "#mbox-cells": + const: 1 + description: + The number of the mailbox channel. + +required: + - compatible + - reg + - reg-names + - clocks + - interrupts + - "#mbox-cells" + +additionalProperties: false + +examples: + - | + #include + #include + #include + + mailbox@4b09fd80 { + compatible = "mediatek,mt8196-gpueb-mbox"; + reg = <0x4b09fd80 0x280>, + <0x4b170000 0x7c>; + reg-names = "data", "ctl"; + clocks = <&topckgen CLK_TOP_MFG_EB>; + interrupts = ; + #mbox-cells = <1>; + }; -- cgit v1.2.3 From eb4faf6343889fcd7edba3deeae49fc5a06531fd Mon Sep 17 00:00:00 2001 From: Kael D'Alcamo Date: Wed, 8 Oct 2025 22:04:27 +0200 Subject: dt-bindings: i2c: hisilicon,hix5hd2: convert to DT schema Convert the Devicetree binding documentation for hisilicon,hix5hd2-i2c from plain text to DT binding schema. Signed-off-by: Kael D'Alcamo Reviewed-by: Krzysztof Kozlowski Signed-off-by: Wolfram Sang --- .../bindings/i2c/hisilicon,hix5hd2-i2c.yaml | 51 ++++++++++++++++++++++ .../devicetree/bindings/i2c/i2c-hix5hd2.txt | 24 ---------- 2 files changed, 51 insertions(+), 24 deletions(-) create mode 100644 Documentation/devicetree/bindings/i2c/hisilicon,hix5hd2-i2c.yaml delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-hix5hd2.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/hisilicon,hix5hd2-i2c.yaml b/Documentation/devicetree/bindings/i2c/hisilicon,hix5hd2-i2c.yaml new file mode 100644 index 000000000000..3faa7954e411 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/hisilicon,hix5hd2-i2c.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/hisilicon,hix5hd2-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# +title: I2C for HiSilicon hix5hd2 chipset platform + +maintainers: + - Wei Yan + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + enum: + - hisilicon,hix5hd2-i2c + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-frequency: + description: Desired I2C bus frequency in Hz + default: 100000 + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + #include + + i2c@f8b10000 { + compatible = "hisilicon,hix5hd2-i2c"; + reg = <0xf8b10000 0x1000>; + interrupts = <0 38 4>; + clocks = <&clock HIX5HD2_I2C0_RST>; + #address-cells = <1>; + #size-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/i2c/i2c-hix5hd2.txt b/Documentation/devicetree/bindings/i2c/i2c-hix5hd2.txt deleted file mode 100644 index f98b37401e6e..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-hix5hd2.txt +++ /dev/null @@ -1,24 +0,0 @@ -I2C for Hisilicon hix5hd2 chipset platform - -Required properties: -- compatible: Must be "hisilicon,hix5hd2-i2c" -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: interrupt number to the cpu. -- #address-cells = <1>; -- #size-cells = <0>; -- clocks: phandles to input clocks. - -Optional properties: -- clock-frequency: Desired I2C bus frequency in Hz, otherwise defaults to 100000 -- Child nodes conforming to i2c bus binding - -Examples: -I2C0@f8b10000 { - compatible = "hisilicon,hix5hd2-i2c"; - reg = <0xf8b10000 0x1000>; - interrupts = <0 38 4>; - clocks = <&clock HIX5HD2_I2C0_RST>; - #address-cells = <1>; - #size-cells = <0>; -} -- cgit v1.2.3 From f7045387a6816d51d462447af4522785e1c7251c Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 9 Oct 2025 20:37:43 +0200 Subject: dt-bindings: bus: allwinner,sun50i-a64-de2: don't check node names Node names are already and properly checked by the core schema. No need to do it again. Signed-off-by: Wolfram Sang [robh: Also drop [A-F] in unit address] Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml b/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml index 9845a187bdf6..232252e8825e 100644 --- a/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml +++ b/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml @@ -44,7 +44,7 @@ properties: patternProperties: # All other properties should be child nodes with unit-address and 'reg' - "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-fA-F]+$": + "@[0-9a-f]+$": type: object additionalProperties: true properties: -- cgit v1.2.3 From ce740955b238761ec1d8cf0590d7e6802d3a813a Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 9 Oct 2025 20:34:53 +0200 Subject: dt-bindings: bus: renesas-bsc: allow additional properties Allow additional properties to enable devices attached to the bus. Fixes warnings like these: arch/arm/boot/dts/renesas/sh73a0-kzm9g.dtb: bus@fec10000 (renesas,bsc-sh73a0): Unevaluated properties are not allowed ('ethernet@10000000' was unexpected) arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dtb: bus@fec10000 (renesas,bsc-r8a73a4): Unevaluated properties are not allowed ('ethernet@8000000', 'flash@0' were unexpected) Reviewed-by: Geert Uytterhoeven Signed-off-by: Wolfram Sang Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/bus/renesas,bsc.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/bus/renesas,bsc.yaml b/Documentation/devicetree/bindings/bus/renesas,bsc.yaml index f53a37785413..ff3c78317d28 100644 --- a/Documentation/devicetree/bindings/bus/renesas,bsc.yaml +++ b/Documentation/devicetree/bindings/bus/renesas,bsc.yaml @@ -41,6 +41,18 @@ properties: interrupts: maxItems: 1 +patternProperties: + # All other properties should be child nodes with unit-address and 'reg' + "@[0-9a-f]+$": + type: object + additionalProperties: true + properties: + reg: + maxItems: 1 + + required: + - reg + required: - reg -- cgit v1.2.3