From 4570355f8eaa476164cfb7ca959fdbf0cebbc9eb Mon Sep 17 00:00:00 2001 From: Zhi Wang Date: Thu, 27 Feb 2025 01:35:53 +0000 Subject: drm/nouveau/nvkm: factor out current GSP RPC command policies There can be multiple cases of handling the GSP RPC messages, which are the reply of GSP RPC commands according to the requirement of the callers and the nature of the GSP RPC commands. The current supported reply policies are "callers don't care" and "receive the entire message" according to the requirement of the callers. To introduce a new policy, factor out the current RPC command reply polices. Also, centralize the handling of the reply in a single function. Factor out NVKM_GSP_RPC_REPLY_NOWAIT as "callers don't care" and NVKM_GSP_RPC_REPLY_RECV as "receive the entire message". Introduce a kernel doc to document the policies. Factor out r535_gsp_rpc_handle_reply(). No functional change is intended for small GSP RPC commands. For large GSP commands, the caller decides the policy of how to handle the returned GSP RPC message. Cc: Ben Skeggs Cc: Alexandre Courbot Signed-off-by: Zhi Wang Signed-off-by: Danilo Krummrich Link: https://patchwork.freedesktop.org/patch/msgid/20250227013554.8269-2-zhiw@nvidia.com --- Documentation/gpu/nouveau.rst | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/gpu/nouveau.rst b/Documentation/gpu/nouveau.rst index 0f34131ccc27..b8c801e0068c 100644 --- a/Documentation/gpu/nouveau.rst +++ b/Documentation/gpu/nouveau.rst @@ -27,3 +27,6 @@ GSP Support .. kernel-doc:: drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c :doc: GSP message queue element + +.. kernel-doc:: drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h + :doc: GSP message handling policy -- cgit v1.2.3 From 4da1fb61e02a783fdd7eb725ea03d897b8ef19ea Mon Sep 17 00:00:00 2001 From: Lucas De Marchi Date: Fri, 7 Mar 2025 17:14:28 -0800 Subject: drm/gpusvm: Fix kernel-doc MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Due to wrong `.. kernel-doc` directive in Documentation/gpu/rfc/gpusvm.rst the documentation was actually not parsing anything from drivers/gpu/drm/drm_gpusvm.c. This fixes the kernel-doc include and all warnings/errors created when doing so. Cc: Simona Vetter Cc: Dave Airlie Cc: Christian König Cc: dri-devel@lists.freedesktop.org Cc: Matthew Brost Cc: Thomas Hellström Reported-by: Stephen Rothwell Closes: https://lore.kernel.org/intel-xe/20250307195239.57abcd2d@canb.auug.org.au/ Fixes: 99624bdff867 ("drm/gpusvm: Add support for GPU Shared Virtual Memory") Reviewed-by: Matthew Brost Link: https://patchwork.freedesktop.org/patch/msgid/20250307-fix-svm-kerneldoc-v2-1-03c74b199620@intel.com Signed-off-by: Lucas De Marchi --- Documentation/gpu/rfc/gpusvm.rst | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/gpu/rfc/gpusvm.rst b/Documentation/gpu/rfc/gpusvm.rst index 073e46065d9c..bcf66a8137a6 100644 --- a/Documentation/gpu/rfc/gpusvm.rst +++ b/Documentation/gpu/rfc/gpusvm.rst @@ -67,14 +67,19 @@ Agreed upon design principles Overview of baseline design =========================== -Baseline design is simple as possible to get a working basline in which can be -built upon. - -.. kernel-doc:: drivers/gpu/drm/xe/drm_gpusvm.c +.. kernel-doc:: drivers/gpu/drm/drm_gpusvm.c :doc: Overview + +.. kernel-doc:: drivers/gpu/drm/drm_gpusvm.c :doc: Locking - :doc: Migrataion + +.. kernel-doc:: drivers/gpu/drm/drm_gpusvm.c + :doc: Migration + +.. kernel-doc:: drivers/gpu/drm/drm_gpusvm.c :doc: Partial Unmapping of Ranges + +.. kernel-doc:: drivers/gpu/drm/drm_gpusvm.c :doc: Examples Possible future design features -- cgit v1.2.3 From 9e75b6ef407fee5d4ed8021cd7ddd9d6a8f7b0e8 Mon Sep 17 00:00:00 2001 From: Anusha Srivatsa Date: Tue, 4 Mar 2025 16:05:37 -0500 Subject: Documentation: Update the todo Update the Documentation to be more precise. v2: Update for clarity v3: Further details in Todo Cc: Thomas Zimmermann Signed-off-by: Anusha Srivatsa Acked-by: Thomas Zimmermann Link: https://patchwork.freedesktop.org/patch/640856/?series=144073&rev=5 --- Documentation/gpu/todo.rst | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst index 256d0d1cb216..c57777a24e03 100644 --- a/Documentation/gpu/todo.rst +++ b/Documentation/gpu/todo.rst @@ -441,14 +441,15 @@ Contact: Thomas Zimmermann Level: Intermediate -Request memory regions in all drivers -------------------------------------- +Request memory regions in all fbdev drivers +-------------------------------------------- -Go through all drivers and add code to request the memory regions that the -driver uses. This requires adding calls to request_mem_region(), +Old/ancient fbdev drivers do not request their memory properly. +Go through these drivers and add code to request the memory regions +that the driver uses. This requires adding calls to request_mem_region(), pci_request_region() or similar functions. Use helpers for managed cleanup -where possible. - +where possible. Problematic areas include hardware that has exclusive ranges +like VGA. VGA16fb does not request the range as it is expected. Drivers are pretty bad at doing this and there used to be conflicts among DRM and fbdev drivers. Still, it's the correct thing to do. -- cgit v1.2.3 From 27b6bce72c7721449d924ef987aa835daf015f26 Mon Sep 17 00:00:00 2001 From: Vignesh Raman Date: Mon, 17 Feb 2025 11:07:12 +0530 Subject: drm/ci: enable lockdep detection We have enabled PROVE_LOCKING (which enables LOCKDEP) in drm-ci. This will output warnings when kernel locking errors are encountered and will continue executing tests. To detect if lockdep has been triggered, check the debug_locks value in /proc/lockdep_stats after the tests have run. When debug_locks is 0, it indicates that lockdep has detected issues and turned itself off. Check this value, and if lockdep is detected, exit with an error and configure it as a warning in GitLab CI. GitLab CI ignores exit codes other than 1 by default. Pass the correct exit code with variable FF_USE_NEW_BASH_EVAL_STRATEGY set to true or exit on failure. Also update the documentation. Acked-by: Helen Koike Reviewed-by: Daniel Stone Link: https://patchwork.freedesktop.org/patch/msgid/20250217053719.442644-4-vignesh.raman@collabora.com Signed-off-by: Vignesh Raman --- Documentation/gpu/automated_testing.rst | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/gpu/automated_testing.rst b/Documentation/gpu/automated_testing.rst index 6d7c6086034d..62aa3ede02a5 100644 --- a/Documentation/gpu/automated_testing.rst +++ b/Documentation/gpu/automated_testing.rst @@ -115,6 +115,10 @@ created (eg. https://gitlab.freedesktop.org/janedoe/linux/-/pipelines) 5. The various jobs will be run and when the pipeline is finished, all jobs should be green unless a regression has been found. +6. Warnings in the pipeline indicate that lockdep +(see Documentation/locking/lockdep-design.rst) issues have been detected +during the tests. + How to update test expectations =============================== -- cgit v1.2.3 From 36cb24049b911ed83d34441cd2e9adebfc999da8 Mon Sep 17 00:00:00 2001 From: Antonin Godard Date: Tue, 11 Mar 2025 17:40:05 +0100 Subject: dt-bindings: display: simple: Add POWERTIP PH128800T004-ZZA01 panel Add POWERTIP PH128800T004-ZZA01 10.1" LCD-TFT LVDS panel compatible string. Signed-off-by: Antonin Godard Acked-by: "Rob Herring (Arm)" Link: https://patchwork.freedesktop.org/patch/msgid/20250311-add-powertip-ph128800t004-v1-1-7f95e6984cea@bootlin.com Signed-off-by: Louis Chauvet --- Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index b0de4fd6f3d4..b5c8eb4fa2d1 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -246,6 +246,8 @@ properties: - osddisplays,osd070t1718-19ts # One Stop Displays OSD101T2045-53TS 10.1" 1920x1200 panel - osddisplays,osd101t2045-53ts + # POWERTIP PH128800T004-ZZA01 10.1" WXGA TFT LCD panel + - powertip,ph128800t004-zza01 # POWERTIP PH128800T006-ZHC01 10.1" WXGA TFT LCD panel - powertip,ph128800t006-zhc01 # POWERTIP PH800480T013-IDF2 7.0" WVGA TFT LCD panel -- cgit v1.2.3 From 4ca8d6f898a85070934490071e429e97bc4e219b Mon Sep 17 00:00:00 2001 From: Gabriel Gonzales Date: Tue, 11 Mar 2025 08:33:47 +0800 Subject: dt-bindings: arm: qcom: Add Xiaomi Redmi Note 8 Document the Xiaomi Redmi Note 8 (codenamed ginkgo), which is based off the SM6125 SoC. Signed-off-by: Gabriel Gonzales Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250311003353.8250-2-semfault@disroot.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 618a87693ac1..52f7b217bd08 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1020,6 +1020,7 @@ properties: - items: - enum: - sony,pdx201 + - xiaomi,ginkgo - xiaomi,laurel-sprout - const: qcom,sm6125 -- cgit v1.2.3 From b5c68869d2f42f864773778b74cccb316d8359fe Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Wed, 12 Mar 2025 14:39:16 +0100 Subject: drm/display: hdmi: Create documentation section We have had documentation for the public functions in the HDMI helpers, but those were never referenced anywhere and thus not compiled as part of the doc. Let's add a section. Reviewed-by: Dmitry Baryshkov Link: https://patchwork.freedesktop.org/patch/msgid/20250312-drm-hdmi-state-docs-v2-1-6352a5d68d5b@kernel.org Signed-off-by: Maxime Ripard --- Documentation/gpu/drm-kms-helpers.rst | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'Documentation') diff --git a/Documentation/gpu/drm-kms-helpers.rst b/Documentation/gpu/drm-kms-helpers.rst index b4ee25af1702..5139705089f2 100644 --- a/Documentation/gpu/drm-kms-helpers.rst +++ b/Documentation/gpu/drm-kms-helpers.rst @@ -233,6 +233,21 @@ Panel Self Refresh Helper Reference .. kernel-doc:: drivers/gpu/drm/drm_self_refresh_helper.c :export: +HDMI Atomic State Helpers +========================= + +Overview +-------- + +.. kernel-doc:: drivers/gpu/drm/display/drm_hdmi_state_helper.c + :doc: hdmi helpers + +Functions Reference +------------------- + +.. kernel-doc:: drivers/gpu/drm/display/drm_hdmi_state_helper.c + :export: + HDCP Helper Functions Reference =============================== -- cgit v1.2.3 From 26cc0304d1352a4b1db7d2807cd276ab31e4da05 Mon Sep 17 00:00:00 2001 From: Abel Vesa Date: Fri, 14 Mar 2025 16:03:23 +0200 Subject: dt-bindings: arm: qcom: Document Lenovo ThinkPad T14s Gen 6 LCD and OLED Due to the difference in how the panel backlight is being handled between the OLED variant and LCD one, it is required to have two separate DTBs. So document the compatible string for both the OLED and LCD variants. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Abel Vesa Link: https://lore.kernel.org/r/20250314140325.4143779-2-abel.vesa@linaro.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 52f7b217bd08..08c329b1e919 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1124,7 +1124,9 @@ properties: - items: - enum: - - lenovo,thinkpad-t14s + - lenovo,thinkpad-t14s-lcd + - lenovo,thinkpad-t14s-oled + - const: lenovo,thinkpad-t14s - const: qcom,x1e78100 - const: qcom,x1e80100 -- cgit v1.2.3 From 28f79ac609de2797cccdd5fa6c4d5ec8bcef92b4 Mon Sep 17 00:00:00 2001 From: Raag Jadav Date: Wed, 12 Mar 2025 14:29:09 +0530 Subject: drm/xe/hwmon: expose fan speed Add hwmon support for fan1_input, fan2_input and fan3_input attributes, which will expose fan speed of respective channels in RPM when supported by hardware. With this in place we can monitor fan speed using lm-sensors tool. v2: Rely on platform checks instead of mailbox error (Aravind, Rodrigo) v3: Introduce has_fan_control flag (Rodrigo) Signed-off-by: Raag Jadav Reviewed-by: Andi Shyti Link: https://patchwork.freedesktop.org/patch/msgid/20250312085909.755073-1-raag.jadav@intel.com Signed-off-by: Rodrigo Vivi --- .../ABI/testing/sysfs-driver-intel-xe-hwmon | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon index 9bce281314df..adbb9bce15a5 100644 --- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon +++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon @@ -124,3 +124,27 @@ Contact: intel-xe@lists.freedesktop.org Description: RO. VRAM temperature in millidegree Celsius. Only supported for particular Intel Xe graphics platforms. + +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon/fan1_input +Date: March 2025 +KernelVersion: 6.14 +Contact: intel-xe@lists.freedesktop.org +Description: RO. Fan 1 speed in RPM. + + Only supported for particular Intel Xe graphics platforms. + +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon/fan2_input +Date: March 2025 +KernelVersion: 6.14 +Contact: intel-xe@lists.freedesktop.org +Description: RO. Fan 2 speed in RPM. + + Only supported for particular Intel Xe graphics platforms. + +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon/fan3_input +Date: March 2025 +KernelVersion: 6.14 +Contact: intel-xe@lists.freedesktop.org +Description: RO. Fan 3 speed in RPM. + + Only supported for particular Intel Xe graphics platforms. -- cgit v1.2.3 From 79462faa2b2aa89db029af5e61df11b5bb6ef4e3 Mon Sep 17 00:00:00 2001 From: Binbin Wu Date: Sat, 22 Feb 2025 09:42:23 +0800 Subject: KVM: TDX: Handle TDG.VP.VMCALL Convert TDG.VP.VMCALL to KVM_EXIT_SYSTEM_EVENT with a new type KVM_SYSTEM_EVENT_TDX_FATAL and forward it to userspace for handling. TD guest can use TDG.VP.VMCALL to report the fatal error it has experienced. This hypercall is special because TD guest is requesting a termination with the error information, KVM needs to forward the hypercall to userspace anyway, KVM doesn't do parsing or conversion, it just dumps the 16 general-purpose registers to userspace and let userspace decide what to do. Signed-off-by: Binbin Wu Message-ID: <20250222014225.897298-8-binbin.wu@linux.intel.com> Signed-off-by: Paolo Bonzini --- Documentation/virt/kvm/api.rst | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index 2b52eb77e29c..8dd3151fb9e4 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -6823,6 +6823,7 @@ should put the acknowledged interrupt vector into the 'epr' field. #define KVM_SYSTEM_EVENT_WAKEUP 4 #define KVM_SYSTEM_EVENT_SUSPEND 5 #define KVM_SYSTEM_EVENT_SEV_TERM 6 + #define KVM_SYSTEM_EVENT_TDX_FATAL 7 __u32 type; __u32 ndata; __u64 data[16]; @@ -6849,6 +6850,11 @@ Valid values for 'type' are: reset/shutdown of the VM. - KVM_SYSTEM_EVENT_SEV_TERM -- an AMD SEV guest requested termination. The guest physical address of the guest's GHCB is stored in `data[0]`. + - KVM_SYSTEM_EVENT_TDX_FATAL -- a TDX guest reported a fatal error state. + KVM doesn't do any parsing or conversion, it just dumps 16 general-purpose + registers to userspace, in ascending order of the 4-bit indices for x86-64 + general-purpose registers in instruction encoding, as defined in the Intel + SDM. - KVM_SYSTEM_EVENT_WAKEUP -- the exiting vCPU is in a suspended state and KVM has recognized a wakeup event. Userspace may honor this event by marking the exiting vCPU as runnable, or deny it and call KVM_RUN again. -- cgit v1.2.3 From c9c1e20b4c7d60fa084b3257525d21a49fe651a1 Mon Sep 17 00:00:00 2001 From: Yan Zhao Date: Mon, 24 Feb 2025 15:09:45 +0800 Subject: KVM: x86: Introduce Intel specific quirk KVM_X86_QUIRK_IGNORE_GUEST_PAT Introduce an Intel specific quirk KVM_X86_QUIRK_IGNORE_GUEST_PAT to have KVM ignore guest PAT when this quirk is enabled. On AMD platforms, KVM always honors guest PAT. On Intel however there are two issues. First, KVM *cannot* honor guest PAT if CPU feature self-snoop is not supported. Second, UC access on certain Intel platforms can be very slow[1] and honoring guest PAT on those platforms may break some old guests that accidentally specify video RAM as UC. Those old guests may never expect the slowness since KVM always forces WB previously. See [2]. So, introduce a quirk that KVM can enable by default on all Intel platforms to avoid breaking old unmodifiable guests. Newer userspace can disable this quirk if it wishes KVM to honor guest PAT; disabling the quirk will fail if self-snoop is not supported, i.e. if KVM cannot obey the wish. The quirk is a no-op on AMD and also if any assigned devices have non-coherent DMA. This is not an issue, as KVM_X86_QUIRK_CD_NW_CLEARED is another example of a quirk that is sometimes automatically disabled. Suggested-by: Paolo Bonzini Suggested-by: Sean Christopherson Cc: Kevin Tian Signed-off-by: Yan Zhao Link: https://lore.kernel.org/all/Ztl9NWCOupNfVaCA@yzhao56-desk.sh.intel.com # [1] Link: https://lore.kernel.org/all/87jzfutmfc.fsf@redhat.com # [2] Message-ID: <20250224070946.31482-1-yan.y.zhao@intel.com> [Use supported_quirks/inapplicable_quirks to support both AMD and no-self-snoop cases, as well as to remove the shadow_memtype_mask check from kvm_mmu_may_ignore_guest_pat(). - Paolo] Signed-off-by: Paolo Bonzini --- Documentation/virt/kvm/api.rst | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'Documentation') diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index 8dd3151fb9e4..0a6cef2ea5d8 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -8160,6 +8160,28 @@ KVM_X86_QUIRK_STUFF_FEATURE_MSRS By default, at vCPU creation, KVM sets the and 0x489), as KVM does now allow them to be set by userspace (KVM sets them based on guest CPUID, for safety purposes). + +KVM_X86_QUIRK_IGNORE_GUEST_PAT By default, on Intel platforms, KVM ignores + guest PAT and forces the effective memory + type to WB in EPT. The quirk is not available + on Intel platforms which are incapable of + safely honoring guest PAT (i.e., without CPU + self-snoop, KVM always ignores guest PAT and + forces effective memory type to WB). It is + also ignored on AMD platforms or, on Intel, + when a VM has non-coherent DMA devices + assigned; KVM always honors guest PAT in + such case. The quirk is needed to avoid + slowdowns on certain Intel Xeon platforms + (e.g. ICX, SPR) where self-snoop feature is + supported but UC is slow enough to cause + issues with some older guests that use + UC instead of WC to map the video RAM. + Userspace can disable the quirk to honor + guest PAT if it knows that there is no such + guest software, for example if it does not + expose a bochs graphics device (which is + known to have had a buggy driver). =================================== ============================================ 7.32 KVM_CAP_MAX_VCPU_ID -- cgit v1.2.3 From 52f52ea79a4c8c21d5aa00a5453da000ad37c67f Mon Sep 17 00:00:00 2001 From: Isaku Yamahata Date: Thu, 27 Feb 2025 09:20:21 +0800 Subject: Documentation/virt/kvm: Document on Trust Domain Extensions (TDX) Add documentation to Intel Trusted Domain Extensions (TDX) support. Signed-off-by: Isaku Yamahata Signed-off-by: Binbin Wu Message-ID: <20250227012021.1778144-21-binbin.wu@linux.intel.com> Signed-off-by: Paolo Bonzini --- Documentation/virt/kvm/api.rst | 13 +- Documentation/virt/kvm/x86/index.rst | 1 + Documentation/virt/kvm/x86/intel-tdx.rst | 255 +++++++++++++++++++++++++++++++ 3 files changed, 265 insertions(+), 4 deletions(-) create mode 100644 Documentation/virt/kvm/x86/intel-tdx.rst (limited to 'Documentation') diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index 0a6cef2ea5d8..56ac997ad439 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -1407,6 +1407,9 @@ the memory region are automatically reflected into the guest. For example, an mmap() that affects the region will be made visible immediately. Another example is madvise(MADV_DROP). +For TDX guest, deleting/moving memory region loses guest memory contents. +Read only region isn't supported. Only as-id 0 is supported. + Note: On arm64, a write generated by the page-table walker (to update the Access and Dirty flags, for example) never results in a KVM_EXIT_MMIO exit when the slot has the KVM_MEM_READONLY flag. This @@ -4764,7 +4767,7 @@ H_GET_CPU_CHARACTERISTICS hypercall. :Capability: basic :Architectures: x86 -:Type: vm +:Type: vm ioctl, vcpu ioctl :Parameters: an opaque platform specific structure (in/out) :Returns: 0 on success; -1 on error @@ -4772,9 +4775,11 @@ If the platform supports creating encrypted VMs then this ioctl can be used for issuing platform-specific memory encryption commands to manage those encrypted VMs. -Currently, this ioctl is used for issuing Secure Encrypted Virtualization -(SEV) commands on AMD Processors. The SEV commands are defined in -Documentation/virt/kvm/x86/amd-memory-encryption.rst. +Currently, this ioctl is used for issuing both Secure Encrypted Virtualization +(SEV) commands on AMD Processors and Trusted Domain Extensions (TDX) commands +on Intel Processors. The detailed commands are defined in +Documentation/virt/kvm/x86/amd-memory-encryption.rst and +Documentation/virt/kvm/x86/intel-tdx.rst. 4.111 KVM_MEMORY_ENCRYPT_REG_REGION ----------------------------------- diff --git a/Documentation/virt/kvm/x86/index.rst b/Documentation/virt/kvm/x86/index.rst index 9ece6b8dc817..851e99174762 100644 --- a/Documentation/virt/kvm/x86/index.rst +++ b/Documentation/virt/kvm/x86/index.rst @@ -11,6 +11,7 @@ KVM for x86 systems cpuid errata hypercalls + intel-tdx mmu msr nested-vmx diff --git a/Documentation/virt/kvm/x86/intel-tdx.rst b/Documentation/virt/kvm/x86/intel-tdx.rst new file mode 100644 index 000000000000..de41d4c01e5c --- /dev/null +++ b/Documentation/virt/kvm/x86/intel-tdx.rst @@ -0,0 +1,255 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=================================== +Intel Trust Domain Extensions (TDX) +=================================== + +Overview +======== +Intel's Trust Domain Extensions (TDX) protect confidential guest VMs from the +host and physical attacks. A CPU-attested software module called 'the TDX +module' runs inside a new CPU isolated range to provide the functionalities to +manage and run protected VMs, a.k.a, TDX guests or TDs. + +Please refer to [1] for the whitepaper, specifications and other resources. + +This documentation describes TDX-specific KVM ABIs. The TDX module needs to be +initialized before it can be used by KVM to run any TDX guests. The host +core-kernel provides the support of initializing the TDX module, which is +described in the Documentation/arch/x86/tdx.rst. + +API description +=============== + +KVM_MEMORY_ENCRYPT_OP +--------------------- +:Type: vm ioctl, vcpu ioctl + +For TDX operations, KVM_MEMORY_ENCRYPT_OP is re-purposed to be generic +ioctl with TDX specific sub-ioctl() commands. + +:: + + /* Trust Domain Extensions sub-ioctl() commands. */ + enum kvm_tdx_cmd_id { + KVM_TDX_CAPABILITIES = 0, + KVM_TDX_INIT_VM, + KVM_TDX_INIT_VCPU, + KVM_TDX_INIT_MEM_REGION, + KVM_TDX_FINALIZE_VM, + KVM_TDX_GET_CPUID, + + KVM_TDX_CMD_NR_MAX, + }; + + struct kvm_tdx_cmd { + /* enum kvm_tdx_cmd_id */ + __u32 id; + /* flags for sub-command. If sub-command doesn't use this, set zero. */ + __u32 flags; + /* + * data for each sub-command. An immediate or a pointer to the actual + * data in process virtual address. If sub-command doesn't use it, + * set zero. + */ + __u64 data; + /* + * Auxiliary error code. The sub-command may return TDX SEAMCALL + * status code in addition to -Exxx. + */ + __u64 hw_error; + }; + +KVM_TDX_CAPABILITIES +-------------------- +:Type: vm ioctl +:Returns: 0 on success, <0 on error + +Return the TDX capabilities that current KVM supports with the specific TDX +module loaded in the system. It reports what features/capabilities are allowed +to be configured to the TDX guest. + +- id: KVM_TDX_CAPABILITIES +- flags: must be 0 +- data: pointer to struct kvm_tdx_capabilities +- hw_error: must be 0 + +:: + + struct kvm_tdx_capabilities { + __u64 supported_attrs; + __u64 supported_xfam; + __u64 reserved[254]; + + /* Configurable CPUID bits for userspace */ + struct kvm_cpuid2 cpuid; + }; + + +KVM_TDX_INIT_VM +--------------- +:Type: vm ioctl +:Returns: 0 on success, <0 on error + +Perform TDX specific VM initialization. This needs to be called after +KVM_CREATE_VM and before creating any VCPUs. + +- id: KVM_TDX_INIT_VM +- flags: must be 0 +- data: pointer to struct kvm_tdx_init_vm +- hw_error: must be 0 + +:: + + struct kvm_tdx_init_vm { + __u64 attributes; + __u64 xfam; + __u64 mrconfigid[6]; /* sha384 digest */ + __u64 mrowner[6]; /* sha384 digest */ + __u64 mrownerconfig[6]; /* sha384 digest */ + + /* The total space for TD_PARAMS before the CPUIDs is 256 bytes */ + __u64 reserved[12]; + + /* + * Call KVM_TDX_INIT_VM before vcpu creation, thus before + * KVM_SET_CPUID2. + * This configuration supersedes KVM_SET_CPUID2s for VCPUs because the + * TDX module directly virtualizes those CPUIDs without VMM. The user + * space VMM, e.g. qemu, should make KVM_SET_CPUID2 consistent with + * those values. If it doesn't, KVM may have wrong idea of vCPUIDs of + * the guest, and KVM may wrongly emulate CPUIDs or MSRs that the TDX + * module doesn't virtualize. + */ + struct kvm_cpuid2 cpuid; + }; + + +KVM_TDX_INIT_VCPU +----------------- +:Type: vcpu ioctl +:Returns: 0 on success, <0 on error + +Perform TDX specific VCPU initialization. + +- id: KVM_TDX_INIT_VCPU +- flags: must be 0 +- data: initial value of the guest TD VCPU RCX +- hw_error: must be 0 + +KVM_TDX_INIT_MEM_REGION +----------------------- +:Type: vcpu ioctl +:Returns: 0 on success, <0 on error + +Initialize @nr_pages TDX guest private memory starting from @gpa with userspace +provided data from @source_addr. + +Note, before calling this sub command, memory attribute of the range +[gpa, gpa + nr_pages] needs to be private. Userspace can use +KVM_SET_MEMORY_ATTRIBUTES to set the attribute. + +If KVM_TDX_MEASURE_MEMORY_REGION flag is specified, it also extends measurement. + +- id: KVM_TDX_INIT_MEM_REGION +- flags: currently only KVM_TDX_MEASURE_MEMORY_REGION is defined +- data: pointer to struct kvm_tdx_init_mem_region +- hw_error: must be 0 + +:: + + #define KVM_TDX_MEASURE_MEMORY_REGION (1UL << 0) + + struct kvm_tdx_init_mem_region { + __u64 source_addr; + __u64 gpa; + __u64 nr_pages; + }; + + +KVM_TDX_FINALIZE_VM +------------------- +:Type: vm ioctl +:Returns: 0 on success, <0 on error + +Complete measurement of the initial TD contents and mark it ready to run. + +- id: KVM_TDX_FINALIZE_VM +- flags: must be 0 +- data: must be 0 +- hw_error: must be 0 + + +KVM_TDX_GET_CPUID +----------------- +:Type: vcpu ioctl +:Returns: 0 on success, <0 on error + +Get the CPUID values that the TDX module virtualizes for the TD guest. +When it returns -E2BIG, the user space should allocate a larger buffer and +retry. The minimum buffer size is updated in the nent field of the +struct kvm_cpuid2. + +- id: KVM_TDX_GET_CPUID +- flags: must be 0 +- data: pointer to struct kvm_cpuid2 (in/out) +- hw_error: must be 0 (out) + +:: + + struct kvm_cpuid2 { + __u32 nent; + __u32 padding; + struct kvm_cpuid_entry2 entries[0]; + }; + + struct kvm_cpuid_entry2 { + __u32 function; + __u32 index; + __u32 flags; + __u32 eax; + __u32 ebx; + __u32 ecx; + __u32 edx; + __u32 padding[3]; + }; + +KVM TDX creation flow +===================== +In addition to the standard KVM flow, new TDX ioctls need to be called. The +control flow is as follows: + +#. Check system wide capability + + * KVM_CAP_VM_TYPES: Check if VM type is supported and if KVM_X86_TDX_VM + is supported. + +#. Create VM + + * KVM_CREATE_VM + * KVM_TDX_CAPABILITIES: Query TDX capabilities for creating TDX guests. + * KVM_CHECK_EXTENSION(KVM_CAP_MAX_VCPUS): Query maximum VCPUs the TD can + support at VM level (TDX has its own limitation on this). + * KVM_SET_TSC_KHZ: Configure TD's TSC frequency if a different TSC frequency + than host is desired. This is Optional. + * KVM_TDX_INIT_VM: Pass TDX specific VM parameters. + +#. Create VCPU + + * KVM_CREATE_VCPU + * KVM_TDX_INIT_VCPU: Pass TDX specific VCPU parameters. + * KVM_SET_CPUID2: Configure TD's CPUIDs. + * KVM_SET_MSRS: Configure TD's MSRs. + +#. Initialize initial guest memory + + * Prepare content of initial guest memory. + * KVM_TDX_INIT_MEM_REGION: Add initial guest memory. + * KVM_TDX_FINALIZE_VM: Finalize the measurement of the TDX guest. + +#. Run VCPU + +References +========== + +.. [1] https://www.intel.com/content/www/us/en/developer/tools/trust-domain-extensions/documentation.html -- cgit v1.2.3 From 880d851a7fe1bbb6d78ec59087f7cdba46292c36 Mon Sep 17 00:00:00 2001 From: Pranav Tyagi Date: Tue, 18 Mar 2025 11:12:50 +0700 Subject: Documentation: vgaarbiter: Fix grammar Correct grammar issues: - Fix "co-exist" subject-verb agreement - Correct plural form of "server" in context of more than one legacy devices - Use passive mood for intro sentence of libpciaccess section Signed-off-by: Pranav Tyagi Reviewed-by: Bagas Sanjaya Link: https://lore.kernel.org/r/20250220164946.18007-1-pranav.tyagi03@gmail.com [Bagas: massage commit message] Signed-off-by: Bagas Sanjaya Link: https://patchwork.freedesktop.org/patch/msgid/20250318041249.20786-2-bagasdotme@gmail.com Signed-off-by: Maxime Ripard --- Documentation/gpu/vgaarbiter.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/gpu/vgaarbiter.rst b/Documentation/gpu/vgaarbiter.rst index bde3c0afb059..d1e953712cc2 100644 --- a/Documentation/gpu/vgaarbiter.rst +++ b/Documentation/gpu/vgaarbiter.rst @@ -11,9 +11,9 @@ Section 7, Legacy Devices. The Resource Access Control (RAC) module inside the X server [0] existed for the legacy VGA arbitration task (besides other bus management tasks) when more -than one legacy device co-exists on the same machine. But the problem happens +than one legacy device co-exist on the same machine. But the problem happens when these devices are trying to be accessed by different userspace clients -(e.g. two server in parallel). Their address assignments conflict. Moreover, +(e.g. two servers in parallel). Their address assignments conflict. Moreover, ideally, being a userspace application, it is not the role of the X server to control bus resources. Therefore an arbitration scheme outside of the X server is needed to control the sharing of these resources. This document introduces @@ -106,7 +106,7 @@ In-kernel interface libpciaccess ------------ -To use the vga arbiter char device it was implemented an API inside the +To use the vga arbiter char device, an API was implemented inside the libpciaccess library. One field was added to struct pci_device (each device on the system):: -- cgit v1.2.3 From 4110ad034fb7438eb16e73e2f949bedfabfc9d66 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Tue, 4 Feb 2025 14:14:14 +0100 Subject: firmware: turris-mox-rwtm: Drop ECDSA signatures via debugfs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Drop the debugfs implementation of the ECDSA message signing, in preparation for a new implementation via the keyctl() syscall. Signed-off-by: Marek Behún Signed-off-by: Arnd Bergmann --- Documentation/ABI/testing/debugfs-turris-mox-rwtm | 14 -------------- Documentation/ABI/testing/sysfs-firmware-turris-mox-rwtm | 9 --------- 2 files changed, 23 deletions(-) delete mode 100644 Documentation/ABI/testing/debugfs-turris-mox-rwtm (limited to 'Documentation') diff --git a/Documentation/ABI/testing/debugfs-turris-mox-rwtm b/Documentation/ABI/testing/debugfs-turris-mox-rwtm deleted file mode 100644 index 813987d5de4e..000000000000 --- a/Documentation/ABI/testing/debugfs-turris-mox-rwtm +++ /dev/null @@ -1,14 +0,0 @@ -What: /sys/kernel/debug/turris-mox-rwtm/do_sign -Date: Jun 2020 -KernelVersion: 5.8 -Contact: Marek Behún -Description: - - ======= =========================================================== - (Write) Message to sign with the ECDSA private key stored in - device's OTP. The message must be exactly 64 bytes - (since this is intended for SHA-512 hashes). - (Read) The resulting signature, 136 bytes. This contains the - R and S values of the ECDSA signature, both in - big-endian format. - ======= =========================================================== diff --git a/Documentation/ABI/testing/sysfs-firmware-turris-mox-rwtm b/Documentation/ABI/testing/sysfs-firmware-turris-mox-rwtm index ea5e5b489bc7..26741cb84504 100644 --- a/Documentation/ABI/testing/sysfs-firmware-turris-mox-rwtm +++ b/Documentation/ABI/testing/sysfs-firmware-turris-mox-rwtm @@ -12,15 +12,6 @@ Contact: Marek Behún Description: (Read) MAC addresses burned into eFuses of this Turris Mox board. Format: %pM -What: /sys/firmware/turris-mox-rwtm/pubkey -Date: August 2019 -KernelVersion: 5.4 -Contact: Marek Behún -Description: (Read) ECDSA public key (in pubkey hex compressed form) computed - as pair to the ECDSA private key burned into eFuses of this - Turris Mox Board. - Format: string - What: /sys/firmware/turris-mox-rwtm/ram_size Date: August 2019 KernelVersion: 5.4 -- cgit v1.2.3 From 38712c5281ac5f6f27058b825ca62ae69f2e2451 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ma=C3=ADra=20Canal?= Date: Mon, 17 Mar 2025 22:01:10 -0300 Subject: dt-bindings: gpu: v3d: Add per-compatible register restrictions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In order to enforce per-SoC register rules, add per-compatible restrictions. For example, V3D 3.3 (used in brcm,7268-v3d) has a cache controller (GCA), which is not present in other V3D generations. Declaring these differences helps ensure the DTB accurately reflect the hardware design. The example was using an incorrect order for the register names. This commit corrects that by enforcing the order established in the register items description. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Maíra Canal Link: https://patchwork.freedesktop.org/patch/msgid/20250317-v3d-gpu-reset-fixes-v6-2-f3ee7717ed17@igalia.com --- .../devicetree/bindings/gpu/brcm,bcm-v3d.yaml | 86 ++++++++++++++++++---- 1 file changed, 73 insertions(+), 13 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml index dc078ceeca9a..6a1a09031983 100644 --- a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml +++ b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml @@ -22,20 +22,12 @@ properties: - brcm,7278-v3d reg: - items: - - description: hub register (required) - - description: core0 register (required) - - description: GCA cache controller register (if GCA controller present) - - description: bridge register (if no external reset controller) minItems: 2 + maxItems: 4 reg-names: - items: - - const: hub - - const: core0 - - enum: [ bridge, gca ] - - enum: [ bridge, gca ] minItems: 2 + maxItems: 4 interrupts: items: @@ -58,6 +50,74 @@ required: - reg-names - interrupts +allOf: + - if: + properties: + compatible: + contains: + const: brcm,2711-v3d + then: + properties: + reg: + items: + - description: hub register + - description: core0 register + reg-names: + items: + - const: hub + - const: core0 + - if: + properties: + compatible: + contains: + const: brcm,2712-v3d + then: + properties: + reg: + items: + - description: hub register + - description: core0 register + reg-names: + items: + - const: hub + - const: core0 + - if: + properties: + compatible: + contains: + const: brcm,7268-v3d + then: + properties: + reg: + items: + - description: hub register + - description: core0 register + - description: GCA cache controller register + - description: bridge register + reg-names: + items: + - const: hub + - const: core0 + - const: gca + - const: bridge + - if: + properties: + compatible: + contains: + const: brcm,7278-v3d + then: + properties: + reg: + items: + - description: hub register + - description: core0 register + - description: bridge register + reg-names: + items: + - const: hub + - const: core0 + - const: bridge + additionalProperties: false examples: @@ -66,9 +126,9 @@ examples: compatible = "brcm,7268-v3d"; reg = <0xf1200000 0x4000>, <0xf1208000 0x4000>, - <0xf1204000 0x100>, - <0xf1204100 0x100>; - reg-names = "hub", "core0", "bridge", "gca"; + <0xf1204100 0x100>, + <0xf1204000 0x100>; + reg-names = "hub", "core0", "gca", "bridge"; interrupts = <0 78 4>, <0 77 4>; }; -- cgit v1.2.3 From e29671ae9714d2c37cd5165a2e928cc2fdd829c1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ma=C3=ADra=20Canal?= Date: Mon, 17 Mar 2025 22:01:11 -0300 Subject: dt-bindings: gpu: v3d: Add SMS register to BCM2712 compatible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit V3D 7.1 exposes a new register block, called V3D_SMS. As BCM2712 has a V3D 7.1 core, add a new register item to its compatible. Similar to the GCA, which is specific for V3D 3.3, SMS should only be added for V3D 7.1 variants (such as brcm,2712-v3d). Acked-by: Krzysztof Kozlowski Signed-off-by: Maíra Canal Link: https://patchwork.freedesktop.org/patch/msgid/20250317-v3d-gpu-reset-fixes-v6-3-f3ee7717ed17@igalia.com --- Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml index 6a1a09031983..dd2cc63c9a51 100644 --- a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml +++ b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml @@ -77,10 +77,12 @@ allOf: items: - description: hub register - description: core0 register + - description: SMS state manager register reg-names: items: - const: hub - const: core0 + - const: sms - if: properties: compatible: -- cgit v1.2.3 From b1cd1d738e8d98296a01768ba217f2f2ea5dd7b8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ma=C3=ADra=20Canal?= Date: Mon, 17 Mar 2025 22:01:12 -0300 Subject: dt-bindings: gpu: v3d: Add V3D driver maintainer as DT maintainer MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As established in commit 89d04995f76c ("MAINTAINERS: Drop Emma Anholt from all M lines."), Emma is no longer active in the Linux kernel and dropped the V3D maintainership. Therefore, remove Emma as one of the DT maintainers and add the current V3D driver maintainer. Acked-by: Emma Anholt Acked-by: Rob Herring (Arm) Signed-off-by: Maíra Canal Link: https://patchwork.freedesktop.org/patch/msgid/20250317-v3d-gpu-reset-fixes-v6-4-f3ee7717ed17@igalia.com --- Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml index dd2cc63c9a51..43c6d2d72456 100644 --- a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml +++ b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Broadcom V3D GPU maintainers: - - Eric Anholt + - Maíra Canal - Nicolas Saenz Julienne properties: -- cgit v1.2.3 From 94fcd39ca255758335ace05f70365f2126190ee0 Mon Sep 17 00:00:00 2001 From: Raj Kumar Bhagat Date: Fri, 21 Mar 2025 16:22:38 +0530 Subject: dt-bindings: net: wireless: describe the ath12k AHB module for IPQ5332 Add device-tree bindings for the ATH12K module found in the IPQ5332 device. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Raj Kumar Bhagat Link: https://patch.msgid.link/20250321-ath12k-ahb-v12-1-bb389ed76ae5@quicinc.com Signed-off-by: Jeff Johnson --- .../bindings/net/wireless/qcom,ipq5332-wifi.yaml | 315 +++++++++++++++++++++ 1 file changed, 315 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml new file mode 100644 index 000000000000..363a0ecb6ad9 --- /dev/null +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml @@ -0,0 +1,315 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/wireless/qcom,ipq5332-wifi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies ath12k wireless devices (AHB) + +maintainers: + - Jeff Johnson + +description: + Qualcomm Technologies IEEE 802.11be AHB devices. + +properties: + compatible: + enum: + - qcom,ipq5332-wifi + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock used for copy engine + + clock-names: + items: + - const: xo + + interrupts: + items: + - description: Fatal interrupt + - description: Ready interrupt + - description: Spawn acknowledge interrupt + - description: Stop acknowledge interrupt + - description: misc-pulse1 interrupt events + - description: misc-latch interrupt events + - description: sw exception interrupt events + - description: interrupt event for ring CE0 + - description: interrupt event for ring CE1 + - description: interrupt event for ring CE2 + - description: interrupt event for ring CE3 + - description: interrupt event for ring CE4 + - description: interrupt event for ring CE5 + - description: interrupt event for ring CE6 + - description: interrupt event for ring CE7 + - description: interrupt event for ring CE8 + - description: interrupt event for ring CE9 + - description: interrupt event for ring CE10 + - description: interrupt event for ring CE11 + - description: interrupt event for ring host2wbm-desc-feed + - description: interrupt event for ring host2reo-re-injection + - description: interrupt event for ring host2reo-command + - description: interrupt event for ring host2rxdma-monitor-ring1 + - description: interrupt event for ring reo2ost-exception + - description: interrupt event for ring wbm2host-rx-release + - description: interrupt event for ring reo2host-status + - description: interrupt event for ring reo2host-destination-ring4 + - description: interrupt event for ring reo2host-destination-ring3 + - description: interrupt event for ring reo2host-destination-ring2 + - description: interrupt event for ring reo2host-destination-ring1 + - description: interrupt event for ring rxdma2host-monitor-destination-mac3 + - description: interrupt event for ring rxdma2host-monitor-destination-mac2 + - description: interrupt event for ring rxdma2host-monitor-destination-mac1 + - description: interrupt event for ring host2rxdma-host-buf-ring-mac3 + - description: interrupt event for ring host2rxdma-host-buf-ring-mac2 + - description: interrupt event for ring host2rxdma-host-buf-ring-mac1 + - description: interrupt event for ring host2tcl-input-ring4 + - description: interrupt event for ring host2tcl-input-ring3 + - description: interrupt event for ring host2tcl-input-ring2 + - description: interrupt event for ring host2tcl-input-ring1 + - description: interrupt event for ring wbm2host-tx-completions-ring4 + - description: interrupt event for ring wbm2host-tx-completions-ring3 + - description: interrupt event for ring wbm2host-tx-completions-ring2 + - description: interrupt event for ring wbm2host-tx-completions-ring1 + - description: interrupt event for ring host2tx-monitor-ring1 + - description: interrupt event for ring txmon2host-monitor-destination-mac3 + - description: interrupt event for ring txmon2host-monitor-destination-mac2 + - description: interrupt event for ring txmon2host-monitor-destination-mac1 + - description: interrupt event for umac-reset + + interrupt-names: + items: + - const: fatal + - const: ready + - const: spawn + - const: stop-ack + - const: misc-pulse1 + - const: misc-latch + - const: sw-exception + - const: ce0 + - const: ce1 + - const: ce2 + - const: ce3 + - const: ce4 + - const: ce5 + - const: ce6 + - const: ce7 + - const: ce8 + - const: ce9 + - const: ce10 + - const: ce11 + - const: host2wbm-desc-feed + - const: host2reo-re-injection + - const: host2reo-command + - const: host2rxdma-monitor-ring1 + - const: reo2ost-exception + - const: wbm2host-rx-release + - const: reo2host-status + - const: reo2host-destination-ring4 + - const: reo2host-destination-ring3 + - const: reo2host-destination-ring2 + - const: reo2host-destination-ring1 + - const: rxdma2host-monitor-destination-mac3 + - const: rxdma2host-monitor-destination-mac2 + - const: rxdma2host-monitor-destination-mac1 + - const: host2rxdma-host-buf-ring-mac3 + - const: host2rxdma-host-buf-ring-mac2 + - const: host2rxdma-host-buf-ring-mac1 + - const: host2tcl-input-ring4 + - const: host2tcl-input-ring3 + - const: host2tcl-input-ring2 + - const: host2tcl-input-ring1 + - const: wbm2host-tx-completions-ring4 + - const: wbm2host-tx-completions-ring3 + - const: wbm2host-tx-completions-ring2 + - const: wbm2host-tx-completions-ring1 + - const: host2tx-monitor-ring1 + - const: txmon2host-monitor-destination-mac3 + - const: txmon2host-monitor-destination-mac2 + - const: txmon2host-monitor-destination-mac1 + - const: umac-reset + + memory-region: + description: + Memory regions used by the ath12k firmware. + items: + - description: Q6 memory region + - description: m3 dump memory region + - description: Q6 caldata memory region + - description: Multi Link Operation (MLO) Global memory region + + memory-region-names: + items: + - const: q6-region + - const: m3-dump + - const: q6-caldb + - const: mlo-global-mem + + qcom,calibration-variant: + $ref: /schemas/types.yaml#/definitions/string + description: + String to uniquely identify variant of the calibration data for designs + with colliding bus and device ids + + qcom,rproc: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the Qualcomm Hexagon DSP(q6 remote processor), which is utilized + for offloading WiFi processing tasks, this q6 remote processor operates in + conjunction with WiFi. + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: States used by the AP to signal the remote processor + items: + - description: Shutdown WCSS pd + - description: Stop WCSS pd + - description: Spawn WCSS pd + + qcom,smem-state-names: + description: + Names of the states used by the AP to signal the remote processor + items: + - const: shutdown + - const: stop + - const: spawn + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + - memory-region + - memory-region-names + - qcom,rproc + - qcom,smem-states + - qcom,smem-state-names + +additionalProperties: false + +examples: + - | + #include + #include + + wifi0: wifi@c000000 { + compatible = "qcom,ipq5332-wifi"; + reg = <0x0c000000 0x1000000>; + clocks = <&gcc GCC_XO_CLK>; + clock-names = "xo"; + interrupts-extended = <&wcss_smp2p_in 8 IRQ_TYPE_NONE>, + <&wcss_smp2p_in 9 IRQ_TYPE_NONE>, + <&wcss_smp2p_in 12 IRQ_TYPE_NONE>, + <&wcss_smp2p_in 11 IRQ_TYPE_NONE>, + <&intc GIC_SPI 559 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 560 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 561 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 422 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 423 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 424 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 425 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 426 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 427 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 428 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 429 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 430 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 431 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 432 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 433 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 491 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 495 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 493 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 544 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 457 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 497 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 454 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 453 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 452 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 451 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 488 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 488 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 484 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 554 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 554 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 549 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 507 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 500 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 499 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 498 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 450 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 449 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 448 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 447 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 543 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 486 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 486 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 482 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 419 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "fatal", + "ready", + "spawn", + "stop-ack", + "misc-pulse1", + "misc-latch", + "sw-exception", + "ce0", + "ce1", + "ce2", + "ce3", + "ce4", + "ce5", + "ce6", + "ce7", + "ce8", + "ce9", + "ce10", + "ce11", + "host2wbm-desc-feed", + "host2reo-re-injection", + "host2reo-command", + "host2rxdma-monitor-ring1", + "reo2ost-exception", + "wbm2host-rx-release", + "reo2host-status", + "reo2host-destination-ring4", + "reo2host-destination-ring3", + "reo2host-destination-ring2", + "reo2host-destination-ring1", + "rxdma2host-monitor-destination-mac3", + "rxdma2host-monitor-destination-mac2", + "rxdma2host-monitor-destination-mac1", + "host2rxdma-host-buf-ring-mac3", + "host2rxdma-host-buf-ring-mac2", + "host2rxdma-host-buf-ring-mac1", + "host2tcl-input-ring4", + "host2tcl-input-ring3", + "host2tcl-input-ring2", + "host2tcl-input-ring1", + "wbm2host-tx-completions-ring4", + "wbm2host-tx-completions-ring3", + "wbm2host-tx-completions-ring2", + "wbm2host-tx-completions-ring1", + "host2tx-monitor-ring1", + "txmon2host-monitor-destination-mac3", + "txmon2host-monitor-destination-mac2", + "txmon2host-monitor-destination-mac1", + "umac-reset"; + + memory-region = <&q6_region>, <&m3_dump>, <&q6_caldb>, <&mlo_mem>; + memory-region-names = "q6-region", "m3-dump", "q6-caldb", "mlo-global-mem"; + qcom,calibration-variant = "RDP441_1"; + qcom,rproc = <&q6v5_wcss>; + qcom,smem-states = <&wcss_smp2p_out 8>, + <&wcss_smp2p_out 9>, + <&wcss_smp2p_out 10>; + qcom,smem-state-names = "shutdown", + "stop", + "spawn"; + }; -- cgit v1.2.3 From a6ad0ff60f488242dd460724f2c16de2b7ecf358 Mon Sep 17 00:00:00 2001 From: Niravkumar L Rabara Date: Mon, 10 Feb 2025 15:46:03 +0800 Subject: dt-bindings: intel: document Agilex5 NAND daughter board Agilex5 devkit supports a separate NAND daughter board. Document Agilex5 NAND daughter board compatible. Signed-off-by: Niravkumar L Rabara Acked-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- Documentation/devicetree/bindings/arm/intel,socfpga.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml index 2ee0c740eb56..c75cd7d29f1a 100644 --- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml +++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml @@ -25,6 +25,7 @@ properties: items: - enum: - intel,socfpga-agilex5-socdk + - intel,socfpga-agilex5-socdk-nand - const: intel,socfpga-agilex5 additionalProperties: true -- cgit v1.2.3 From dd72b1ad9876f5dc807dac3237bbeadb74e05b87 Mon Sep 17 00:00:00 2001 From: Mahesh Rao Date: Tue, 4 Feb 2025 20:58:05 +0800 Subject: dt-bindings: fpga: stratix10: Convert to json-schema Convert intel,stratix10-soc fpga manager devicetree binding file from freeform format to json-schema. Reviewed-by: Rob Herring (Arm) Signed-off-by: Mahesh Rao Signed-off-by: Dinh Nguyen --- .../fpga/intel,stratix10-soc-fpga-mgr.yaml | 36 ++++++++++++++++++++++ .../bindings/fpga/intel-stratix10-soc-fpga-mgr.txt | 18 ----------- 2 files changed, 36 insertions(+), 18 deletions(-) create mode 100644 Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml delete mode 100644 Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml new file mode 100644 index 000000000000..6e536d6b28a9 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fpga/intel,stratix10-soc-fpga-mgr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel Stratix10 SoC FPGA Manager + +maintainers: + - Mahesh Rao + - Adrian Ng Ho Yin + - Niravkumar L Rabara + +description: + The Intel Stratix10 SoC consists of a 64-bit quad-core ARM Cortex A53 hard + processor system (HPS) and a Secure Device Manager (SDM). The Stratix10 + SoC FPGA Manager driver is used to configure/reconfigure the FPGA fabric + on the die.The driver communicates with SDM/ATF via the stratix10-svc + platform driver for performing its operations. + +properties: + compatible: + enum: + - intel,stratix10-soc-fpga-mgr + - intel,agilex-soc-fpga-mgr + +required: + - compatible + +additionalProperties: false + +examples: + - | + fpga-mgr { + compatible = "intel,stratix10-soc-fpga-mgr"; + }; diff --git a/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt deleted file mode 100644 index 0f874137ca46..000000000000 --- a/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt +++ /dev/null @@ -1,18 +0,0 @@ -Intel Stratix10 SoC FPGA Manager - -Required properties: -The fpga_mgr node has the following mandatory property, must be located under -firmware/svc node. - -- compatible : should contain "intel,stratix10-soc-fpga-mgr" or - "intel,agilex-soc-fpga-mgr" - -Example: - - firmware { - svc { - fpga_mgr: fpga-mgr { - compatible = "intel,stratix10-soc-fpga-mgr"; - }; - }; - }; -- cgit v1.2.3 From fbfb6498706241547c238d045182f4039a1df233 Mon Sep 17 00:00:00 2001 From: Mahesh Rao Date: Tue, 4 Feb 2025 20:58:06 +0800 Subject: dt-bindings: firmware: stratix10: Convert to json-schema Convert intel,stratix10-svc service layer devicetree binding file from freeform format to json-schema. Also added DT binding for optional stratix10-soc FPGA manager child node. Signed-off-by: Mahesh Rao Acked-by: Conor Dooley Signed-off-by: Dinh Nguyen --- .../bindings/firmware/intel,stratix10-svc.txt | 57 ------------- .../bindings/firmware/intel,stratix10-svc.yaml | 93 ++++++++++++++++++++++ 2 files changed, 93 insertions(+), 57 deletions(-) delete mode 100644 Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt create mode 100644 Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt deleted file mode 100644 index 6eff1afd8daf..000000000000 --- a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.txt +++ /dev/null @@ -1,57 +0,0 @@ -Intel Service Layer Driver for Stratix10 SoC -============================================ -Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard -processor system (HPS) and Secure Device Manager (SDM). When the FPGA is -configured from HPS, there needs to be a way for HPS to notify SDM the -location and size of the configuration data. Then SDM will get the -configuration data from that location and perform the FPGA configuration. - -To meet the whole system security needs and support virtual machine requesting -communication with SDM, only the secure world of software (EL3, Exception -Layer 3) can interface with SDM. All software entities running on other -exception layers must channel through the EL3 software whenever it needs -service from SDM. - -Intel Stratix10 service layer driver, running at privileged exception level -(EL1, Exception Layer 1), interfaces with the service providers and provides -the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer -driver also manages secure monitor call (SMC) to communicate with secure monitor -code running in EL3. - -Required properties: -------------------- -The svc node has the following mandatory properties, must be located under -the firmware node. - -- compatible: "intel,stratix10-svc" or "intel,agilex-svc" -- method: smc or hvc - smc - Secure Monitor Call - hvc - Hypervisor Call -- memory-region: - phandle to the reserved memory node. See - Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt - for details - -Example: -------- - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - service_reserved: svcbuffer@0 { - compatible = "shared-dma-pool"; - reg = <0x0 0x0 0x0 0x1000000>; - alignment = <0x1000>; - no-map; - }; - }; - - firmware { - svc { - compatible = "intel,stratix10-svc"; - method = "smc"; - memory-region = <&service_reserved>; - }; - }; diff --git a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml new file mode 100644 index 000000000000..fac1e955852e --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/intel,stratix10-svc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel Service Layer Driver for Stratix10 SoC + +maintainers: + - Dinh Nguyen + - Mahesh Rao + +description: > + Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard + processor system (HPS) and Secure Device Manager (SDM). When the FPGA is + configured from HPS, there needs to be a way for HPS to notify SDM the + location and size of the configuration data. Then SDM will get the + configuration data from that location and perform the FPGA configuration. + + To meet the whole system security needs and support virtual machine requesting + communication with SDM, only the secure world of software (EL3, Exception + Layer 3) can interface with SDM. All software entities running on other + exception layers must channel through the EL3 software whenever it needs + service from SDM. + + Intel Stratix10 service layer driver, running at privileged exception level + (EL1, Exception Layer 1), interfaces with the service providers and provides + the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer + driver also manages secure monitor call (SMC) to communicate with secure monitor + code running in EL3. + +properties: + compatible: + enum: + - intel,stratix10-svc + - intel,agilex-svc + + method: + description: | + Supervisory call method to be used to communicate with the + secure service layer. + Permitted values are: + - "smc" : SMC #0, following the SMCCC + - "hvc" : HVC #0, following the SMCCC + + $ref: /schemas/types.yaml#/definitions/string-array + enum: + - smc + - hvc + + memory-region: + maxItems: 1 + description: + reserved memory region for the service layer driver to + communicate with the secure device manager. + + fpga-mgr: + $ref: /schemas/fpga/intel,stratix10-soc-fpga-mgr.yaml + description: Optional child node for fpga manager to perform fabric configuration. + +required: + - compatible + - method + - memory-region + +additionalProperties: false + +examples: + - | + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + + service_reserved: svcbuffer@0 { + compatible = "shared-dma-pool"; + reg = <0x0 0x0 0x0 0x1000000>; + alignment = <0x1000>; + no-map; + }; + }; + + firmware { + svc { + compatible = "intel,stratix10-svc"; + method = "smc"; + memory-region = <&service_reserved>; + + fpga-mgr { + compatible = "intel,stratix10-soc-fpga-mgr"; + }; + }; + }; + -- cgit v1.2.3 From 9e8a6b1902562294dbb66896b1f0c896ae10da9b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Mon, 3 Feb 2025 17:46:36 +0100 Subject: dt-bindings: altera: Add compatible for Terasic's DE10-nano MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Terasic DE10-nano development board features a Cyclone5 FPGA, USB, HDMI output and an Arduino compatible header. Signed-off-by: Uwe Kleine-König Acked-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- Documentation/devicetree/bindings/arm/altera.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml index 8c7575455422..30c44a0e6407 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -47,6 +47,7 @@ properties: - novtech,chameleon96 - samtec,vining - terasic,de0-atlas + - terasic,de10-nano - terasic,socfpga-cyclone5-sockit - const: altr,socfpga-cyclone5 - const: altr,socfpga -- cgit v1.2.3 From 1822532477cb5f007313de4c70079c09aaa270d5 Mon Sep 17 00:00:00 2001 From: Christopher Obbard Date: Tue, 25 Mar 2025 19:21:26 +0000 Subject: dt-bindings: display: panel: samsung,atna40yk20: document ATNA40YK20 The Samsung ATNA40YK20 panel is a 14" AMOLED eDP panel. It is similar to the ATNA33XC20 except that it is larger and has a different resolution. Signed-off-by: Christopher Obbard Acked-by: Krzysztof Kozlowski Signed-off-by: Douglas Anderson Link: https://lore.kernel.org/r/20250325-wip-obbardc-qcom-t14s-oled-panel-v2-1-e9bc7c9d30cc@linaro.org --- Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml b/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml index 684c2896d238..31f0c0f038e4 100644 --- a/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml +++ b/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml @@ -19,6 +19,8 @@ properties: - const: samsung,atna33xc20 - items: - enum: + # Samsung 14" WQXGA+ (2880×1800 pixels) eDP AMOLED panel + - samsung,atna40yk20 # Samsung 14.5" WQXGA+ (2880x1800 pixels) eDP AMOLED panel - samsung,atna45af01 # Samsung 14.5" 3K (2944x1840 pixels) eDP AMOLED panel -- cgit v1.2.3 From fe19245d3efd5bf714623e83f2056bc46d9339b1 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Thu, 27 Mar 2025 10:06:31 +0000 Subject: ASoC: dt-bindings: wcd93xx: add bindings for audio mux controlling hp On some platforms to minimise pop and click during switching between CTIA and OMTP headset an additional HiFi mux is used. Most common case is that this switch is switched on by default, but on some platforms this needs a regulator enable. Move to using mux-controls so that both the gpio and regulators can be driven correctly, rather than adding regulator handing in the codec. This patch adds required bindings to add such mux controls. Signed-off-by: Srinivas Kandagatla Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250327100633.11530-5-srinivas.kandagatla@linaro.org Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml b/Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml index 10531350c336..ab1c6285dbf8 100644 --- a/Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml @@ -23,9 +23,15 @@ properties: - qcom,wcd9380-codec - qcom,wcd9385-codec + mux-controls: + description: A reference to the audio mux switch for + switching CTIA/OMTP Headset types + maxItems: 1 + us-euro-gpios: description: GPIO spec for swapping gnd and mic segments maxItems: 1 + deprecated: true required: - compatible -- cgit v1.2.3 From d1ecbcc3d82d65655685d3a05b3faf79e836d94a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 24 Mar 2025 13:51:31 +0100 Subject: ASoC: dt-bindings: maxim,max98925: Fix include placement in DTS example Coding style and common logic dictates that headers should not be included in device nodes. No functional impact. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250324125131.81867-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/sound/maxim,max98925.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/maxim,max98925.yaml b/Documentation/devicetree/bindings/sound/maxim,max98925.yaml index 32fd86204a7a..121e8d2d44da 100644 --- a/Documentation/devicetree/bindings/sound/maxim,max98925.yaml +++ b/Documentation/devicetree/bindings/sound/maxim,max98925.yaml @@ -77,11 +77,11 @@ additionalProperties: false examples: - | + #include i2c { #address-cells = <1>; #size-cells = <0>; - #include audio-codec@3a { compatible = "maxim,max98927"; reg = <0x3a>; -- cgit v1.2.3 From 5a4c3ce480031c4654ea8ee6c5cb4621819973f3 Mon Sep 17 00:00:00 2001 From: Shengjiu Wang Date: Fri, 28 Mar 2025 10:13:39 +0800 Subject: ASoC: dt-bindings: fsl,mqs: Reference common DAI properties Reference the dai-common.yaml schema to allow '#sound-dai-cells' and "sound-name-prefix' to be used. Signed-off-by: Shengjiu Wang Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250328021339.1593635-1-shengjiu.wang@nxp.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/sound/fsl,mqs.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/fsl,mqs.yaml b/Documentation/devicetree/bindings/sound/fsl,mqs.yaml index 8c22e8348b14..d1ac84e518a0 100644 --- a/Documentation/devicetree/bindings/sound/fsl,mqs.yaml +++ b/Documentation/devicetree/bindings/sound/fsl,mqs.yaml @@ -28,6 +28,9 @@ properties: - fsl,imx95-aonmix-mqs - fsl,imx95-netcmix-mqs + "#sound-dai-cells": + const: 0 + clocks: minItems: 1 maxItems: 2 @@ -55,6 +58,7 @@ required: - clock-names allOf: + - $ref: dai-common.yaml# - if: properties: compatible: @@ -86,7 +90,7 @@ allOf: required: - gpr -additionalProperties: false +unevaluatedProperties: false examples: - | -- cgit v1.2.3 From d58b4eb7c03cabb10d4eebc89d7596e06376e54d Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Mon, 24 Mar 2025 10:40:13 +0100 Subject: spi: dt-bindings: st,stm32mp25-ospi: Make "resets" a required property On STM32MP2x SoC's family, OSPI is child of Octo Memory Manager which must have asccess to OSPI's reset to ensure its initialization. Make "resets" a required property. Fixes: bed97e35786a ("dt-bindings: spi: Add STM32 OSPI controller") Signed-off-by: Patrice Chotard Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250324-upstream_ospi_required_resets-v2-1-85a48afcedec@foss.st.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml b/Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml index 5f276f27dc4c..272bc308726b 100644 --- a/Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml +++ b/Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml @@ -68,6 +68,7 @@ required: - compatible - reg - clocks + - resets - interrupts - st,syscfg-dlyb -- cgit v1.2.3 From d348ebc658cdf41b922671e472a6192c2338adb4 Mon Sep 17 00:00:00 2001 From: Abhinaba Rakshit Date: Tue, 18 Mar 2025 15:13:23 +0530 Subject: dt-bindings: crypto: qcom-qce: document QCS615 crypto engine Document the crypto engine on the QCS615 platform. Acked-by: Rob Herring (Arm) Signed-off-by: Abhinaba Rakshit Signed-off-by: Herbert Xu --- Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml index 3f35122f7873..e009cb712fb8 100644 --- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml @@ -45,6 +45,7 @@ properties: - items: - enum: + - qcom,qcs615-qce - qcom,qcs8300-qce - qcom,sa8775p-qce - qcom,sc7280-qce -- cgit v1.2.3 From 82922fca2fd26a05ce5ce72ce913ab503c2b4ada Mon Sep 17 00:00:00 2001 From: Nathan Lynch Date: Thu, 10 Oct 2024 12:52:07 -0500 Subject: Documentation: dmaengine: Correct reference to glReadPixels() The author very likely meant "glReadPixels()" instead of "glReadpielx()", which does not appear in the OpenGL API. https://registry.khronos.org/OpenGL-Refpages/gl4/html/glReadPixels.xhtml Signed-off-by: Nathan Lynch Link: https://lore.kernel.org/r/20241010-doc-dmaengine-glreadpixels-v1-1-8202e5834b13@amd.com Signed-off-by: Vinod Koul --- Documentation/driver-api/dmaengine/provider.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst index 3085f8b460fa..48ad4fd6e277 100644 --- a/Documentation/driver-api/dmaengine/provider.rst +++ b/Documentation/driver-api/dmaengine/provider.rst @@ -172,8 +172,8 @@ Currently, the types available are: - It's usually used for copying pixel data between host memory and memory-mapped GPU device memory, such as found on modern PCI video graphics cards. The most immediate example is the OpenGL API function - ``glReadPielx()``, which might require a verbatim copy of a huge framebuffer - from local device memory onto host memory. + ``glReadPixels()``, which might require a verbatim copy of a huge + framebuffer from local device memory onto host memory. - DMA_XOR -- cgit v1.2.3 From 5741909697a31cfb08e45d56b4211959fb791487 Mon Sep 17 00:00:00 2001 From: NeilBrown Date: Wed, 19 Mar 2025 14:01:32 +1100 Subject: VFS: improve interface for lookup_one functions The family of functions: lookup_one() lookup_one_unlocked() lookup_one_positive_unlocked() appear designed to be used by external clients of the filesystem rather than by filesystems acting on themselves as the lookup_one_len family are used. They are used by: btrfs/ioctl - which is a user-space interface rather than an internal activity exportfs - i.e. from nfsd or the open_by_handle_at interface overlayfs - at access the underlying filesystems smb/server - for file service They should be used by nfsd (more than just the exportfs path) and cachefs but aren't. It would help if the documentation didn't claim they should "not be called by generic code". Also the path component name is passed as "name" and "len" which are (confusingly?) separate by the "base". In some cases the len in simply "strlen" and so passing a qstr using QSTR() would make the calling clearer. Other callers do pass separate name and len which are stored in a struct. Sometimes these are already stored in a qstr, other times it easily could be. So this patch changes these three functions to receive a 'struct qstr *', and improves the documentation. QSTR_LEN() is added to make it easy to pass a QSTR containing a known len. [brauner@kernel.org: take a struct qstr pointer] Signed-off-by: NeilBrown Link: https://lore.kernel.org/r/20250319031545.2999807-2-neil@brown.name Signed-off-by: Christian Brauner --- Documentation/filesystems/porting.rst | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/porting.rst b/Documentation/filesystems/porting.rst index 767b2927c762..57dcba6de743 100644 --- a/Documentation/filesystems/porting.rst +++ b/Documentation/filesystems/porting.rst @@ -1203,3 +1203,12 @@ should use d_drop();d_splice_alias() and return the result of the latter. If a positive dentry cannot be returned for some reason, in-kernel clients such as cachefiles, nfsd, smb/server may not perform ideally but will fail-safe. + +--- + +** mandatory** + +lookup_one(), lookup_one_unlocked(), lookup_one_positive_unlocked() now +take a qstr instead of a name and len. These, not the "one_len" +versions, should be used whenever accessing a filesystem from outside +that filesysmtem, through a mount point - which will have a mnt_idmap. -- cgit v1.2.3 From 6b0dfabb35550cb7b0808585dea6c24971d685d3 Mon Sep 17 00:00:00 2001 From: "Matthew Wilcox (Oracle)" Date: Wed, 2 Apr 2025 16:00:03 +0100 Subject: fs: Remove aops->writepage All callers and implementations are now removed, so remove the operation and update the documentation to match. Signed-off-by: "Matthew Wilcox (Oracle)" Link: https://lore.kernel.org/r/20250402150005.2309458-10-willy@infradead.org Signed-off-by: Christian Brauner --- Documentation/admin-guide/cgroup-v2.rst | 2 +- Documentation/filesystems/fscrypt.rst | 2 +- Documentation/filesystems/locking.rst | 54 ++------------------------------- Documentation/filesystems/vfs.rst | 39 ++++++------------------ 4 files changed, 13 insertions(+), 84 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/cgroup-v2.rst b/Documentation/admin-guide/cgroup-v2.rst index 1a16ce68a4d7..9e7de8e70048 100644 --- a/Documentation/admin-guide/cgroup-v2.rst +++ b/Documentation/admin-guide/cgroup-v2.rst @@ -3019,7 +3019,7 @@ Filesystem Support for Writeback -------------------------------- A filesystem can support cgroup writeback by updating -address_space_operations->writepage[s]() to annotate bio's using the +address_space_operations->writepages() to annotate bio's using the following two functions. wbc_init_bio(@wbc, @bio) diff --git a/Documentation/filesystems/fscrypt.rst b/Documentation/filesystems/fscrypt.rst index e80329908549..3d22e2db732d 100644 --- a/Documentation/filesystems/fscrypt.rst +++ b/Documentation/filesystems/fscrypt.rst @@ -1409,7 +1409,7 @@ read the ciphertext into the page cache and decrypt it in-place. The folio lock must be held until decryption has finished, to prevent the folio from becoming visible to userspace prematurely. -For the write path (->writepage()) of regular files, filesystems +For the write path (->writepages()) of regular files, filesystems cannot encrypt data in-place in the page cache, since the cached plaintext must be preserved. Instead, filesystems must encrypt into a temporary buffer or "bounce page", then write out the temporary diff --git a/Documentation/filesystems/locking.rst b/Documentation/filesystems/locking.rst index 0ec0bb6eb0fb..2e567e341c3b 100644 --- a/Documentation/filesystems/locking.rst +++ b/Documentation/filesystems/locking.rst @@ -249,7 +249,6 @@ address_space_operations ======================== prototypes:: - int (*writepage)(struct page *page, struct writeback_control *wbc); int (*read_folio)(struct file *, struct folio *); int (*writepages)(struct address_space *, struct writeback_control *); bool (*dirty_folio)(struct address_space *, struct folio *folio); @@ -280,7 +279,6 @@ locking rules: ====================== ======================== ========= =============== ops folio locked i_rwsem invalidate_lock ====================== ======================== ========= =============== -writepage: yes, unlocks (see below) read_folio: yes, unlocks shared writepages: dirty_folio: maybe @@ -309,54 +307,6 @@ completion. ->readahead() unlocks the folios that I/O is attempted on like ->read_folio(). -->writepage() is used for two purposes: for "memory cleansing" and for -"sync". These are quite different operations and the behaviour may differ -depending upon the mode. - -If writepage is called for sync (wbc->sync_mode != WBC_SYNC_NONE) then -it *must* start I/O against the page, even if that would involve -blocking on in-progress I/O. - -If writepage is called for memory cleansing (sync_mode == -WBC_SYNC_NONE) then its role is to get as much writeout underway as -possible. So writepage should try to avoid blocking against -currently-in-progress I/O. - -If the filesystem is not called for "sync" and it determines that it -would need to block against in-progress I/O to be able to start new I/O -against the page the filesystem should redirty the page with -redirty_page_for_writepage(), then unlock the page and return zero. -This may also be done to avoid internal deadlocks, but rarely. - -If the filesystem is called for sync then it must wait on any -in-progress I/O and then start new I/O. - -The filesystem should unlock the page synchronously, before returning to the -caller, unless ->writepage() returns special WRITEPAGE_ACTIVATE -value. WRITEPAGE_ACTIVATE means that page cannot really be written out -currently, and VM should stop calling ->writepage() on this page for some -time. VM does this by moving page to the head of the active list, hence the -name. - -Unless the filesystem is going to redirty_page_for_writepage(), unlock the page -and return zero, writepage *must* run set_page_writeback() against the page, -followed by unlocking it. Once set_page_writeback() has been run against the -page, write I/O can be submitted and the write I/O completion handler must run -end_page_writeback() once the I/O is complete. If no I/O is submitted, the -filesystem must run end_page_writeback() against the page before returning from -writepage. - -That is: after 2.5.12, pages which are under writeout are *not* locked. Note, -if the filesystem needs the page to be locked during writeout, that is ok, too, -the page is allowed to be unlocked at any point in time between the calls to -set_page_writeback() and end_page_writeback(). - -Note, failure to run either redirty_page_for_writepage() or the combination of -set_page_writeback()/end_page_writeback() on a page submitted to writepage -will leave the page itself marked clean but it will be tagged as dirty in the -radix tree. This incoherency can lead to all sorts of hard-to-debug problems -in the filesystem like having dirty inodes at umount and losing written data. - ->writepages() is used for periodic writeback and for syscall-initiated sync operations. The address_space should start I/O against at least ``*nr_to_write`` pages. ``*nr_to_write`` must be decremented for each page @@ -364,8 +314,8 @@ which is written. The address_space implementation may write more (or less) pages than ``*nr_to_write`` asks for, but it should try to be reasonably close. If nr_to_write is NULL, all dirty pages must be written. -writepages should _only_ write pages which are present on -mapping->io_pages. +writepages should _only_ write pages which are present in +mapping->i_pages. ->dirty_folio() is called from various places in the kernel when the target folio is marked as needing writeback. The folio cannot be diff --git a/Documentation/filesystems/vfs.rst b/Documentation/filesystems/vfs.rst index ae79c30b6c0c..bf051c7da6b8 100644 --- a/Documentation/filesystems/vfs.rst +++ b/Documentation/filesystems/vfs.rst @@ -716,9 +716,8 @@ page lookup by address, and keeping track of pages tagged as Dirty or Writeback. The first can be used independently to the others. The VM can try to -either write dirty pages in order to clean them, or release clean pages -in order to reuse them. To do this it can call the ->writepage method -on dirty pages, and ->release_folio on clean folios with the private +release clean pages in order to reuse them. To do this it can call +->release_folio on clean folios with the private flag set. Clean pages without PagePrivate and with no external references will be released without notice being given to the address_space. @@ -731,8 +730,8 @@ maintains information about the PG_Dirty and PG_Writeback status of each page, so that pages with either of these flags can be found quickly. The Dirty tag is primarily used by mpage_writepages - the default -->writepages method. It uses the tag to find dirty pages to call -->writepage on. If mpage_writepages is not used (i.e. the address +->writepages method. It uses the tag to find dirty pages to +write back. If mpage_writepages is not used (i.e. the address provides its own ->writepages) , the PAGECACHE_TAG_DIRTY tag is almost unused. write_inode_now and sync_inode do use it (through __sync_single_inode) to check if ->writepages has been successful in @@ -756,23 +755,23 @@ pages, however the address_space has finer control of write sizes. The read process essentially only requires 'read_folio'. The write process is more complicated and uses write_begin/write_end or -dirty_folio to write data into the address_space, and writepage and +dirty_folio to write data into the address_space, and writepages to writeback data to storage. Adding and removing pages to/from an address_space is protected by the inode's i_mutex. When data is written to a page, the PG_Dirty flag should be set. It -typically remains set until writepage asks for it to be written. This +typically remains set until writepages asks for it to be written. This should clear PG_Dirty and set PG_Writeback. It can be actually written at any point after PG_Dirty is clear. Once it is known to be safe, PG_Writeback is cleared. Writeback makes use of a writeback_control structure to direct the -operations. This gives the writepage and writepages operations some +operations. This gives the writepages operation some information about the nature of and reason for the writeback request, and the constraints under which it is being done. It is also used to -return information back to the caller about the result of a writepage or +return information back to the caller about the result of a writepages request. @@ -819,7 +818,6 @@ cache in your filesystem. The following members are defined: .. code-block:: c struct address_space_operations { - int (*writepage)(struct page *page, struct writeback_control *wbc); int (*read_folio)(struct file *, struct folio *); int (*writepages)(struct address_space *, struct writeback_control *); bool (*dirty_folio)(struct address_space *, struct folio *); @@ -848,25 +846,6 @@ cache in your filesystem. The following members are defined: int (*swap_rw)(struct kiocb *iocb, struct iov_iter *iter); }; -``writepage`` - called by the VM to write a dirty page to backing store. This - may happen for data integrity reasons (i.e. 'sync'), or to free - up memory (flush). The difference can be seen in - wbc->sync_mode. The PG_Dirty flag has been cleared and - PageLocked is true. writepage should start writeout, should set - PG_Writeback, and should make sure the page is unlocked, either - synchronously or asynchronously when the write operation - completes. - - If wbc->sync_mode is WB_SYNC_NONE, ->writepage doesn't have to - try too hard if there are problems, and may choose to write out - other pages from the mapping if that is easier (e.g. due to - internal dependencies). If it chooses not to start writeout, it - should return AOP_WRITEPAGE_ACTIVATE so that the VM will not - keep calling ->writepage on that page. - - See the file "Locking" for more details. - ``read_folio`` Called by the page cache to read a folio from the backing store. The 'file' argument supplies authentication information to network @@ -909,7 +888,7 @@ cache in your filesystem. The following members are defined: given and that many pages should be written if possible. If no ->writepages is given, then mpage_writepages is used instead. This will choose pages from the address space that are tagged as - DIRTY and will pass them to ->writepage. + DIRTY and will write them back. ``dirty_folio`` called by the VM to mark a folio as dirty. This is particularly -- cgit v1.2.3 From 418556fa576ebbd644c7258a97b33203956ea232 Mon Sep 17 00:00:00 2001 From: David Disseldorp Date: Wed, 2 Apr 2025 14:39:50 +1100 Subject: docs: initramfs: update compression and mtime descriptions Update the document to reflect that initramfs didn't replace initrd following kernel 2.5.x. The initramfs buffer format now supports many compression types in addition to gzip, so include them in the grammar section. c_mtime use is dependent on CONFIG_INITRAMFS_PRESERVE_MTIME. Signed-off-by: David Disseldorp Link: https://lore.kernel.org/r/20250402033949.852-2-ddiss@suse.de Reviewed-by: Randy Dunlap Signed-off-by: Christian Brauner --- .../driver-api/early-userspace/buffer-format.rst | 34 +++++++++++++--------- 1 file changed, 21 insertions(+), 13 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/early-userspace/buffer-format.rst b/Documentation/driver-api/early-userspace/buffer-format.rst index 7f74e301fdf3..726bfa2fe70d 100644 --- a/Documentation/driver-api/early-userspace/buffer-format.rst +++ b/Documentation/driver-api/early-userspace/buffer-format.rst @@ -4,20 +4,18 @@ initramfs buffer format Al Viro, H. Peter Anvin -Last revision: 2002-01-13 - -Starting with kernel 2.5.x, the old "initial ramdisk" protocol is -getting {replaced/complemented} with the new "initial ramfs" -(initramfs) protocol. The initramfs contents is passed using the same -memory buffer protocol used by the initrd protocol, but the contents +With kernel 2.5.x, the old "initial ramdisk" protocol was complemented +with an "initial ramfs" protocol. The initramfs content is passed +using the same memory buffer protocol used by initrd, but the content is different. The initramfs buffer contains an archive which is -expanded into a ramfs filesystem; this document details the format of -the initramfs buffer format. +expanded into a ramfs filesystem; this document details the initramfs +buffer format. The initramfs buffer format is based around the "newc" or "crc" CPIO formats, and can be created with the cpio(1) utility. The cpio -archive can be compressed using gzip(1). One valid version of an -initramfs buffer is thus a single .cpio.gz file. +archive can be compressed using gzip(1), or any other algorithm provided +via CONFIG_DECOMPRESS_*. One valid version of an initramfs buffer is +thus a single .cpio.gz file. The full format of the initramfs buffer is defined by the following grammar, where:: @@ -25,12 +23,20 @@ grammar, where:: * is used to indicate "0 or more occurrences of" (|) indicates alternatives + indicates concatenation - GZIP() indicates the gzip(1) of the operand + GZIP() indicates gzip compression of the operand + BZIP2() indicates bzip2 compression of the operand + LZMA() indicates lzma compression of the operand + XZ() indicates xz compression of the operand + LZO() indicates lzo compression of the operand + LZ4() indicates lz4 compression of the operand + ZSTD() indicates zstd compression of the operand ALGN(n) means padding with null bytes to an n-byte boundary - initramfs := ("\0" | cpio_archive | cpio_gzip_archive)* + initramfs := ("\0" | cpio_archive | cpio_compressed_archive)* - cpio_gzip_archive := GZIP(cpio_archive) + cpio_compressed_archive := (GZIP(cpio_archive) | BZIP2(cpio_archive) + | LZMA(cpio_archive) | XZ(cpio_archive) | LZO(cpio_archive) + | LZ4(cpio_archive) | ZSTD(cpio_archive)) cpio_archive := cpio_file* + ( | cpio_trailer) @@ -75,6 +81,8 @@ c_chksum 8 bytes Checksum of data field if c_magic is 070702; The c_mode field matches the contents of st_mode returned by stat(2) on Linux, and encodes the file type and file permissions. +c_mtime is ignored unless CONFIG_INITRAMFS_PRESERVE_MTIME=y is set. + The c_filesize should be zero for any file which is not a regular file or symlink. -- cgit v1.2.3 From 9773c540441c6ae15aefb49e67142e94369dbbc0 Mon Sep 17 00:00:00 2001 From: Caleb James DeLisle Date: Sun, 30 Mar 2025 17:02:58 +0000 Subject: dt-bindings: interrupt-controller: Add EcoNet EN751221 INTC Document the device tree binding for the interrupt controller in the EcoNet EN751221 MIPS SoC. Signed-off-by: Caleb James DeLisle Signed-off-by: Thomas Gleixner Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/all/20250330170306.2584136-3-cjd@cjdns.fr --- .../interrupt-controller/econet,en751221-intc.yaml | 78 ++++++++++++++++++++++ 1 file changed, 78 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/econet,en751221-intc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/econet,en751221-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/econet,en751221-intc.yaml new file mode 100644 index 000000000000..5536319c49c3 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/econet,en751221-intc.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/econet,en751221-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: EcoNet EN751221 Interrupt Controller + +maintainers: + - Caleb James DeLisle + +description: + The EcoNet EN751221 Interrupt Controller is a simple interrupt controller + designed for the MIPS 34Kc MT SMP processor with 2 VPEs. Each interrupt can + be routed to either VPE but not both, so to support per-CPU interrupts, a + secondary IRQ number is allocated to control masking/unmasking on VPE#1. For + lack of a better term we call these "shadow interrupts". The assignment of + shadow interrupts is defined by the SoC integrator when wiring the interrupt + lines, so they are configurable in the device tree. + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + const: econet,en751221-intc + + reg: + maxItems: 1 + + "#interrupt-cells": + const: 1 + + interrupt-controller: true + + interrupts: + maxItems: 1 + description: Interrupt line connecting this controller to its parent. + + econet,shadow-interrupts: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + description: + An array of interrupt number pairs where each pair represents a shadow + interrupt relationship. The first number in each pair is the primary IRQ, + and the second is its shadow IRQ used for VPE#1 control. For example, + <8 3> means IRQ 8 is shadowed by IRQ 3, so IRQ 3 cannot be mapped, but + when VPE#1 requests IRQ 8, it will manipulate the IRQ 3 mask bit. + minItems: 1 + maxItems: 20 + items: + items: + - description: primary per-CPU IRQ + - description: shadow IRQ number + +required: + - compatible + - reg + - interrupt-controller + - "#interrupt-cells" + - interrupts + +additionalProperties: false + +examples: + - | + interrupt-controller@1fb40000 { + compatible = "econet,en751221-intc"; + reg = <0x1fb40000 0x100>; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&cpuintc>; + interrupts = <2>; + + econet,shadow-interrupts = <7 2>, <8 3>, <13 12>, <30 29>; + }; +... -- cgit v1.2.3 From f4271a891dca46ecf6813273ed63e502862f45da Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 24 Mar 2025 13:53:26 +0100 Subject: dt-bindings: gpio: Correct indentation and style in DTS example DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. While re-indenting, drop unused labels. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Sander Vanheule Reviewed-by: Manikandan Muralidharan Reviewed-by: Rob Herring (Arm) Reviewed-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart Link: https://lore.kernel.org/r/20250324125326.82270-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bartosz Golaszewski --- .../bindings/gpio/atmel,at91rm9200-gpio.yaml | 16 ++--- .../bindings/gpio/fairchild,74hc595.yaml | 22 +++---- .../devicetree/bindings/gpio/gpio-mxs.yaml | 70 +++++++++++----------- .../devicetree/bindings/gpio/nxp,pcf8575.yaml | 26 ++++---- .../bindings/gpio/realtek,otto-gpio.yaml | 8 +-- .../devicetree/bindings/gpio/renesas,em-gio.yaml | 20 +++---- .../bindings/gpio/renesas,rcar-gpio.yaml | 24 ++++---- .../devicetree/bindings/gpio/sifive,gpio.yaml | 6 +- .../bindings/gpio/toshiba,gpio-visconti.yaml | 24 ++++---- .../devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml | 48 +++++++-------- 10 files changed, 132 insertions(+), 132 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml b/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml index 3dd70933ed8e..d810043b56b6 100644 --- a/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml @@ -69,13 +69,13 @@ examples: #include gpio@fffff400 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffff400 0x200>; - interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff400 0x200>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; }; ... diff --git a/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml b/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml index 0e5c22929bde..ab35bcf98101 100644 --- a/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml +++ b/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml @@ -71,15 +71,15 @@ unevaluatedProperties: false examples: - | spi { - #address-cells = <1>; - #size-cells = <0>; - - gpio5: gpio5@0 { - compatible = "fairchild,74hc595"; - reg = <0>; - gpio-controller; - #gpio-cells = <2>; - registers-number = <4>; - spi-max-frequency = <100000>; - }; + #address-cells = <1>; + #size-cells = <0>; + + gpio5@0 { + compatible = "fairchild,74hc595"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + registers-number = <4>; + spi-max-frequency = <100000>; + }; }; diff --git a/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml b/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml index 8ff54369d16c..b58e08c8ecd8 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml @@ -84,52 +84,52 @@ examples: reg = <0x80018000 0x2000>; gpio@0 { - compatible = "fsl,imx28-gpio"; - reg = <0>; - interrupts = <127>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; + compatible = "fsl,imx28-gpio"; + reg = <0>; + interrupts = <127>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; }; gpio@1 { - compatible = "fsl,imx28-gpio"; - reg = <1>; - interrupts = <126>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; + compatible = "fsl,imx28-gpio"; + reg = <1>; + interrupts = <126>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; }; gpio@2 { - compatible = "fsl,imx28-gpio"; - reg = <2>; - interrupts = <125>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; + compatible = "fsl,imx28-gpio"; + reg = <2>; + interrupts = <125>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; }; gpio@3 { - compatible = "fsl,imx28-gpio"; - reg = <3>; - interrupts = <124>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; + compatible = "fsl,imx28-gpio"; + reg = <3>; + interrupts = <124>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; }; gpio@4 { - compatible = "fsl,imx28-gpio"; - reg = <4>; - interrupts = <123>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; + compatible = "fsl,imx28-gpio"; + reg = <4>; + interrupts = <123>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; }; }; diff --git a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml index 8bca574bb66d..5a6ecaa7b44b 100644 --- a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml +++ b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml @@ -128,17 +128,17 @@ additionalProperties: false examples: - | i2c { - #address-cells = <1>; - #size-cells = <0>; - - pcf8575: gpio@20 { - compatible = "nxp,pcf8575"; - reg = <0x20>; - interrupt-parent = <&irqpin2>; - interrupts = <3 0>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; + #address-cells = <1>; + #size-cells = <0>; + + gpio@20 { + compatible = "nxp,pcf8575"; + reg = <0x20>; + interrupt-parent = <&irqpin2>; + interrupts = <3 0>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; }; diff --git a/Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml b/Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml index 39fd959c45d2..728099c65824 100644 --- a/Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml @@ -81,7 +81,7 @@ dependencies: examples: - | - gpio@3500 { + gpio@3500 { compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio"; reg = <0x3500 0x1c>; gpio-controller; @@ -91,9 +91,9 @@ examples: #interrupt-cells = <2>; interrupt-parent = <&rtlintc>; interrupts = <23>; - }; + }; - | - gpio@3300 { + gpio@3300 { compatible = "realtek,rtl9300-gpio", "realtek,otto-gpio"; reg = <0x3300 0x1c>, <0x3338 0x8>; gpio-controller; @@ -103,6 +103,6 @@ examples: #interrupt-cells = <2>; interrupt-parent = <&rtlintc>; interrupts = <13>; - }; + }; ... diff --git a/Documentation/devicetree/bindings/gpio/renesas,em-gio.yaml b/Documentation/devicetree/bindings/gpio/renesas,em-gio.yaml index 8bdef812c87c..49fb8f613ead 100644 --- a/Documentation/devicetree/bindings/gpio/renesas,em-gio.yaml +++ b/Documentation/devicetree/bindings/gpio/renesas,em-gio.yaml @@ -57,14 +57,14 @@ examples: - | #include gpio0: gpio@e0050000 { - compatible = "renesas,em-gio"; - reg = <0xe0050000 0x2c>, <0xe0050040 0x20>; - interrupts = , - ; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 0 32>; - ngpios = <32>; - interrupt-controller; - #interrupt-cells = <2>; + compatible = "renesas,em-gio"; + reg = <0xe0050000 0x2c>, <0xe0050040 0x20>; + interrupts = , + ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pfc 0 0 32>; + ngpios = <32>; + interrupt-controller; + #interrupt-cells = <2>; }; diff --git a/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml b/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml index cc7a950a6030..d32e103a64aa 100644 --- a/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml @@ -138,16 +138,16 @@ examples: #include #include gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a77470", "renesas,rcar-gen2-gpio"; - reg = <0xe6053000 0x50>; - interrupts = ; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; - resets = <&cpg 909>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 96 30>; - gpio-reserved-ranges = <17 10>; - interrupt-controller; - #interrupt-cells = <2>; + compatible = "renesas,gpio-r8a77470", "renesas,rcar-gen2-gpio"; + reg = <0xe6053000 0x50>; + interrupts = ; + clocks = <&cpg CPG_MOD 909>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 909>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pfc 0 96 30>; + gpio-reserved-ranges = <17 10>; + interrupt-controller; + #interrupt-cells = <2>; }; diff --git a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml index fc095646adea..4bdc201b719e 100644 --- a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml @@ -76,8 +76,8 @@ additionalProperties: false examples: - | - #include - gpio@10060000 { + #include + gpio@10060000 { compatible = "sifive,fu540-c000-gpio", "sifive,gpio0"; interrupt-parent = <&plic>; interrupts = <7>, <8>, <9>, <10>, <11>, <12>, <13>, <14>, <15>, <16>, @@ -88,6 +88,6 @@ examples: #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - }; + }; ... diff --git a/Documentation/devicetree/bindings/gpio/toshiba,gpio-visconti.yaml b/Documentation/devicetree/bindings/gpio/toshiba,gpio-visconti.yaml index b085450b527f..712063417bc8 100644 --- a/Documentation/devicetree/bindings/gpio/toshiba,gpio-visconti.yaml +++ b/Documentation/devicetree/bindings/gpio/toshiba,gpio-visconti.yaml @@ -48,22 +48,22 @@ additionalProperties: false examples: - | - #include - #include + #include + #include - soc { + soc { #address-cells = <2>; #size-cells = <2>; gpio: gpio@28020000 { - compatible = "toshiba,gpio-tmpv7708"; - reg = <0 0x28020000 0 0x1000>; - #gpio-cells = <0x2>; - gpio-ranges = <&pmux 0 0 32>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <2>; - interrupt-parent = <&gic>; + compatible = "toshiba,gpio-tmpv7708"; + reg = <0 0x28020000 0 0x1000>; + #gpio-cells = <0x2>; + gpio-ranges = <&pmux 0 0 32>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; }; - }; + }; ... diff --git a/Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml b/Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml index d3d8a2e143ed..8fbf12ca067e 100644 --- a/Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml +++ b/Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml @@ -126,29 +126,29 @@ examples: - | #include - gpio@a0020000 { - compatible = "xlnx,xps-gpio-1.00.a"; - reg = <0xa0020000 0x10000>; - #gpio-cells = <2>; - #interrupt-cells = <0x2>; - clocks = <&zynqmp_clk 71>; - gpio-controller; - interrupt-controller; - interrupt-names = "ip2intc_irpt"; - interrupt-parent = <&gic>; - interrupts = <0 89 4>; - xlnx,all-inputs = <0x0>; - xlnx,all-inputs-2 = <0x0>; - xlnx,all-outputs = <0x0>; - xlnx,all-outputs-2 = <0x0>; - xlnx,dout-default = <0x0>; - xlnx,dout-default-2 = <0x0>; - xlnx,gpio-width = <0x20>; - xlnx,gpio2-width = <0x20>; - xlnx,interrupt-present = <0x1>; - xlnx,is-dual = <0x1>; - xlnx,tri-default = <0xFFFFFFFF>; - xlnx,tri-default-2 = <0xFFFFFFFF>; - }; + gpio@a0020000 { + compatible = "xlnx,xps-gpio-1.00.a"; + reg = <0xa0020000 0x10000>; + #gpio-cells = <2>; + #interrupt-cells = <0x2>; + clocks = <&zynqmp_clk 71>; + gpio-controller; + interrupt-controller; + interrupt-names = "ip2intc_irpt"; + interrupt-parent = <&gic>; + interrupts = <0 89 4>; + xlnx,all-inputs = <0x0>; + xlnx,all-inputs-2 = <0x0>; + xlnx,all-outputs = <0x0>; + xlnx,all-outputs-2 = <0x0>; + xlnx,dout-default = <0x0>; + xlnx,dout-default-2 = <0x0>; + xlnx,gpio-width = <0x20>; + xlnx,gpio2-width = <0x20>; + xlnx,interrupt-present = <0x1>; + xlnx,is-dual = <0x1>; + xlnx,tri-default = <0xFFFFFFFF>; + xlnx,tri-default-2 = <0xFFFFFFFF>; + }; ... -- cgit v1.2.3 From ac7d33f3899762b5d0c90a51a96ea11b6d7660ba Mon Sep 17 00:00:00 2001 From: Emanuele Ghidoli Date: Mon, 31 Mar 2025 09:26:44 +0200 Subject: dt-bindings: gpio: pca95xx: add Toradex ecgpiol16 The Toradex ecgpiol16 is a 16-bit I2C I/O expander implemented using a small MCU. Its register interface and behavior are compatible with the PCAL6416. Signed-off-by: Emanuele Ghidoli Signed-off-by: Francesco Dolcini Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250331072644.17921-1-francesco@dolcini.it Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml index 7b1eb08fa055..4d3f52f8d1b8 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml @@ -16,6 +16,9 @@ description: |+ properties: compatible: oneOf: + - items: + - const: toradex,ecgpiol16 + - const: nxp,pcal6416 - items: - const: diodes,pi4ioe5v6534q - const: nxp,pcal6534 @@ -132,6 +135,7 @@ allOf: - maxim,max7325 - maxim,max7326 - maxim,max7327 + - toradex,ecgpiol16 then: properties: reset-gpios: false -- cgit v1.2.3 From 30e7573babdcd46542364a2505d34112e62d5a22 Mon Sep 17 00:00:00 2001 From: Michal Wilczynski Date: Mon, 3 Mar 2025 16:25:10 +0100 Subject: dt-bindings: reset: Add T-HEAD TH1520 SoC Reset Controller Add a YAML schema for the T-HEAD TH1520 SoC reset controller. This controller manages resets for subsystems such as the GPU within the TH1520 SoC. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Michal Wilczynski Link: https://lore.kernel.org/r/20250303152511.494405-2-m.wilczynski@samsung.com Signed-off-by: Philipp Zabel --- .../bindings/reset/thead,th1520-reset.yaml | 44 ++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/thead,th1520-reset.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/reset/thead,th1520-reset.yaml b/Documentation/devicetree/bindings/reset/thead,th1520-reset.yaml new file mode 100644 index 000000000000..f2e91d0add7a --- /dev/null +++ b/Documentation/devicetree/bindings/reset/thead,th1520-reset.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/thead,th1520-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: T-HEAD TH1520 SoC Reset Controller + +description: + The T-HEAD TH1520 reset controller is a hardware block that asserts/deasserts + resets for SoC subsystems. + +maintainers: + - Michal Wilczynski + +properties: + compatible: + enum: + - thead,th1520-reset + + reg: + maxItems: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - "#reset-cells" + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + rst: reset-controller@ffef528000 { + compatible = "thead,th1520-reset"; + reg = <0xff 0xef528000 0x0 0x1000>; + #reset-cells = <1>; + }; + }; -- cgit v1.2.3 From 338893af8e0d442abcd9f3f56a17fd37d60142c3 Mon Sep 17 00:00:00 2001 From: Nikolaos Pasaloukos Date: Thu, 27 Mar 2025 11:27:04 +0000 Subject: dt-bindings: Document Blaize BLZP1600 GPIO driver This is a custom silicon GPIO driver provided by VeriSilicon Microelectronics. It has 32 input/output ports which can be configured as edge or level triggered interrupts. It also provides a de-bounce feature. This controller is used on the Blaize BLZP1600 SoC. Signed-off-by: Nikolaos Pasaloukos Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/20250327-kernel-upstreaming-add_gpio_support-v2-1-bbe51f8d66da@blaize.com Signed-off-by: Bartosz Golaszewski --- .../bindings/gpio/blaize,blzp1600-gpio.yaml | 77 ++++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/blaize,blzp1600-gpio.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpio/blaize,blzp1600-gpio.yaml b/Documentation/devicetree/bindings/gpio/blaize,blzp1600-gpio.yaml new file mode 100644 index 000000000000..a05f6ea619c3 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/blaize,blzp1600-gpio.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/blaize,blzp1600-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Blaize BLZP1600 GPIO controller + +description: + Blaize BLZP1600 GPIO controller is an implementation of the VeriSilicon + APB GPIO v0.2 IP block. It has 32 ports each of which are intended to be + represented as child nodes with the generic GPIO-controller properties + as described in this binding's file. + +maintainers: + - Nikolaos Pasaloukos + - James Cowgill + - Matt Redfearn + - Neil Jones + +properties: + $nodename: + pattern: "^gpio@[0-9a-f]+$" + + compatible: + enum: + - blaize,blzp1600-gpio + + reg: + maxItems: 1 + + gpio-controller: true + + '#gpio-cells': + const: 2 + + ngpios: + default: 32 + minimum: 1 + maximum: 32 + + interrupts: + maxItems: 1 + + gpio-line-names: true + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + +dependencies: + interrupt-controller: [ interrupts ] + +additionalProperties: false + +examples: + - | + #include + + gpio: gpio@4c0000 { + compatible = "blaize,blzp1600-gpio"; + reg = <0x004c0000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <32>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; +... -- cgit v1.2.3 From f5b444361435bfc9eeaaae3dd2e9b4f18dae3888 Mon Sep 17 00:00:00 2001 From: Andrew Ballance Date: Sun, 16 Mar 2025 06:16:44 -0500 Subject: gpu: nova-core: remove completed Vec extentions from task list The requested Vec methods have been implemented thus, remove the completed item from the nova task list. Link: https://lore.kernel.org/r/20250316111644.154602-4-andrewjballance@gmail.com Signed-off-by: Andrew Ballance Signed-off-by: Danilo Krummrich --- Documentation/gpu/nova/core/todo.rst | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/gpu/nova/core/todo.rst b/Documentation/gpu/nova/core/todo.rst index ca08377d3b73..234d753d3eac 100644 --- a/Documentation/gpu/nova/core/todo.rst +++ b/Documentation/gpu/nova/core/todo.rst @@ -190,16 +190,6 @@ Rust abstraction for debugfs APIs. | Reference: Export GSP log buffers | Complexity: Intermediate -Vec extensions --------------- - -Implement ``Vec::truncate`` and ``Vec::resize``. - -Currently this is used for some experimental code to parse the vBIOS. - -| Reference vBIOS support -| Complexity: Beginner - GPU (general) ============= -- cgit v1.2.3 From af134b1145e6e1b64d41c144d4b5a8d17af22f45 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 31 Mar 2025 10:13:45 +0200 Subject: dt-bindings: writing-schema: Explain sub-nodes with additionalProperties:true Document recently introduced pattern of using additionalProperties: true for sub-nodes with their own schema. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250331081345.37103-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/example-schema.yaml | 15 ++++++++++++++- Documentation/devicetree/bindings/writing-schema.rst | 11 ++++++++--- 2 files changed, 22 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/example-schema.yaml b/Documentation/devicetree/bindings/example-schema.yaml index 484f8babcda4..c731d5045e80 100644 --- a/Documentation/devicetree/bindings/example-schema.yaml +++ b/Documentation/devicetree/bindings/example-schema.yaml @@ -178,7 +178,9 @@ properties: description: Child nodes are just another property from a json-schema perspective. type: object # DT nodes are json objects - # Child nodes also need additionalProperties or unevaluatedProperties + # Child nodes also need additionalProperties or unevaluatedProperties, where + # 'false' should be used in most cases (see 'child-node-with-own-schema' + # below). additionalProperties: false properties: vendor,a-child-node-property: @@ -189,6 +191,17 @@ properties: required: - vendor,a-child-node-property + child-node-with-own-schema: + description: | + Child node with their own compatible and device schema which ends in + 'additionalProperties: false' or 'unevaluatedProperties: false' can + mention only the compatible and use here 'additionalProperties: true'. + type: object + additionalProperties: true + properties: + compatible: + const: vendor,sub-device + # Describe the relationship between different properties dependencies: # 'vendor,bool-property' is only allowed when 'vendor,string-array-property' diff --git a/Documentation/devicetree/bindings/writing-schema.rst b/Documentation/devicetree/bindings/writing-schema.rst index eb8ced400c7e..fc73072f12fc 100644 --- a/Documentation/devicetree/bindings/writing-schema.rst +++ b/Documentation/devicetree/bindings/writing-schema.rst @@ -117,9 +117,14 @@ additionalProperties / unevaluatedProperties should be allowed. * additionalProperties: true - Rare case, used for schemas implementing common set of properties. Such - schemas are supposed to be referenced by other schemas, which then use - 'unevaluatedProperties: false'. Typically bus or common-part schemas. + - Top-level part: + Rare case, used for schemas implementing common set of properties. Such + schemas are supposed to be referenced by other schemas, which then use + 'unevaluatedProperties: false'. Typically bus or common-part schemas. + - Nested node: + When listing only the expected compatible of the nested node and there + is an another schema matching that compatible which ends with one of + two above cases ('false'). examples Optional. A list of one or more DTS hunks implementing this binding only. -- cgit v1.2.3 From acf5b947cff1b991ceb7fa53c66555242ff4c87b Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Fri, 7 Mar 2025 00:57:06 +0000 Subject: dt-bindings: vendor-prefixes: Add YuzukiHD name YuzukiHD provides Open Source Hardware designs, and also offers ready-made builds of them: https://github.com/YuzukiHD Signed-off-by: Andre Przywara Acked-by: Conor Dooley Link: https://patch.msgid.link/20250307005712.16828-10-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 86f6a19b28ae..411fd65e0bde 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1749,6 +1749,8 @@ patternProperties: description: Y Soft Corporation a.s. "^yuridenki,.*": description: Yuridenki-Shokai Co. Ltd. + "^yuzukihd,.*": + description: YuzukiHD Open Source Hardware "^zarlink,.*": description: Zarlink Semiconductor "^zealz,.*": -- cgit v1.2.3 From f9d55227839199e928a41574e41089288a43a2d6 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Fri, 7 Mar 2025 00:57:07 +0000 Subject: dt-bindings: arm: sunxi: Add new board names for A523 generation The new Allwinner A523 SoC family comes in different packages, though they all share the same die, and so the devicetree bindings. Add three board names that use a version from this SoC family: - The Avaota A1: an Open Source hardware router board. - The Radxa Cubie A5E: a typical development board - The X96QPro+: a TV box Add their compatible name to the list. Signed-off-by: Andre Przywara Acked-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250307005712.16828-11-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai --- Documentation/devicetree/bindings/arm/sunxi.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index f536cdd2c1a6..61627c900b31 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -845,6 +845,11 @@ properties: - const: allwinner,r7-tv-dongle - const: allwinner,sun5i-a10s + - description: Radxa Cubie A5E + items: + - const: radxa,cubie-a5e + - const: allwinner,sun55i-a527 + - description: Remix Mini PC items: - const: jide,remix-mini-pc @@ -966,6 +971,11 @@ properties: - const: hechuang,x96-mate - const: allwinner,sun50i-h616 + - description: X96Q Pro+ + items: + - const: amediatech,x96q-pro-plus + - const: allwinner,sun55i-h728 + - description: Xunlong OrangePi items: - const: xunlong,orangepi @@ -1081,4 +1091,9 @@ properties: - const: xunlong,orangepi-zero3 - const: allwinner,sun50i-h618 + - description: YuzukiHD Avaota A1 + items: + - const: yuzukihd,avaota-a1 + - const: allwinner,sun55i-t527 + additionalProperties: true -- cgit v1.2.3 From 385a2de38e45d0bbb6efa64e95f03e3dff54fc95 Mon Sep 17 00:00:00 2001 From: Arnaud Pouliquen Date: Thu, 27 Mar 2025 09:27:20 +0100 Subject: dt-bindings: remoteproc: stm32-rproc: Add firmware-name property Add the 'firmware-name' property to the remote processor binding to allow specifying the default firmware name in the device tree. Signed-off-by: Arnaud Pouliquen Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250327082721.641278-2-arnaud.pouliquen@foss.st.com Signed-off-by: Mathieu Poirier --- Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml index 370af61d8f28..843679c557e7 100644 --- a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml +++ b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml @@ -139,6 +139,10 @@ properties: If defined, when remoteproc is probed, it loads the default firmware and starts the remote processor. + firmware-name: + maxItems: 1 + description: Default name of the remote processor firmware. + required: - compatible - reg -- cgit v1.2.3 From 2eb68366159a94cdf61b97fbc9ab230bef94313f Mon Sep 17 00:00:00 2001 From: Pritesh Patel Date: Thu, 20 Mar 2025 16:24:44 +0530 Subject: dt-bindings: cache: sifive,ccache0: Add ESWIN EIC7700 SoC compatibility This cache controller is also used on the ESWIN EIC7700 SoC. However, it have 256KB private L2 Cache and shared L3 Cache of 4MB. So add dedicated compatible string for it. Signed-off-by: Pritesh Patel Reviewed-by: Samuel Holland Signed-off-by: Pinkesh Vaghela Signed-off-by: Conor Dooley --- .../devicetree/bindings/cache/sifive,ccache0.yaml | 44 ++++++++++++++++++++-- 1 file changed, 41 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml index 7e8cebe21584..579bacb66f34 100644 --- a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml +++ b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml @@ -39,6 +39,7 @@ properties: - const: cache - items: - enum: + - eswin,eic7700-l3-cache - starfive,jh7100-ccache - starfive,jh7110-ccache - const: sifive,ccache0 @@ -55,10 +56,10 @@ properties: enum: [2, 3] cache-sets: - enum: [1024, 2048] + enum: [1024, 2048, 4096] cache-size: - const: 2097152 + enum: [2097152, 4194304] cache-unified: true @@ -89,6 +90,7 @@ allOf: compatible: contains: enum: + - eswin,eic7700-l3-cache - sifive,fu740-c000-ccache - starfive,jh7100-ccache - starfive,jh7110-ccache @@ -108,6 +110,22 @@ allOf: Must contain entries for DirError, DataError and DataFail signals. maxItems: 3 + - if: + properties: + compatible: + contains: + const: eswin,eic7700-l3-cache + + then: + properties: + cache-size: + const: 4194304 + + else: + properties: + cache-size: + const: 2097152 + - if: properties: compatible: @@ -122,11 +140,31 @@ allOf: cache-sets: const: 2048 - else: + - if: + properties: + compatible: + contains: + enum: + - microchip,mpfs-ccache + - sifive,fu540-c000-ccache + + then: properties: cache-sets: const: 1024 + - if: + properties: + compatible: + contains: + enum: + - eswin,eic7700-l3-cache + + then: + properties: + cache-sets: + const: 4096 + - if: properties: compatible: -- cgit v1.2.3 From 8ae1a4eef78c09a61b62f85e2dfc128c7365d18d Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 3 Mar 2025 17:35:32 -0500 Subject: drm/amdgpu: add initial documentation for debugfs files Describes what debugfs files are available and what they are used for. v2: fix some typos (Mark Glines) v3: Address comments from Siqueira and Kent Reviewed-by: Rodrigo Siqueira Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/debugfs.rst | 210 +++++++++++++++++++++++++++++++++ Documentation/gpu/amdgpu/debugging.rst | 7 ++ Documentation/gpu/amdgpu/index.rst | 1 + 3 files changed, 218 insertions(+) create mode 100644 Documentation/gpu/amdgpu/debugfs.rst (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/debugfs.rst b/Documentation/gpu/amdgpu/debugfs.rst new file mode 100644 index 000000000000..fe7736a0b43a --- /dev/null +++ b/Documentation/gpu/amdgpu/debugfs.rst @@ -0,0 +1,210 @@ +============== +AMDGPU DebugFS +============== + +The amdgpu driver provides a number of debugfs files to aid in debugging +issues in the driver. These are usually found in +/sys/kernel/debug/dri/. + +DebugFS Files +============= + +amdgpu_benchmark +---------------- + +Run benchmarks using the DMA engine the driver uses for GPU memory paging. +Write a number to the file to run the test. The results are written to the +kernel log. VRAM is on device memory (dGPUs) or cave out (APUs) and GTT +(Graphics Translation Tables) is system memory that is accessible by the GPU. +The following tests are available: + +- 1: simple test, VRAM to GTT and GTT to VRAM +- 2: simple test, VRAM to VRAM +- 3: GTT to VRAM, buffer size sweep, powers of 2 +- 4: VRAM to GTT, buffer size sweep, powers of 2 +- 5: VRAM to VRAM, buffer size sweep, powers of 2 +- 6: GTT to VRAM, buffer size sweep, common display sizes +- 7: VRAM to GTT, buffer size sweep, common display sizes +- 8: VRAM to VRAM, buffer size sweep, common display sizes + +amdgpu_test_ib +-------------- + +Read this file to run simple IB (Indirect Buffer) tests on all kernel managed +rings. IBs are command buffers usually generated by userspace applications +which are submitted to the kernel for execution on an particular GPU engine. +This just runs the simple IB tests included in the kernel. These tests +are engine specific and verify that IB submission works. + +amdgpu_discovery +---------------- + +Provides raw access to the IP discovery binary provided by the GPU. Read this +file to access the raw binary. This is useful for verifying the contents of +the IP discovery table. It is chip specific. + +amdgpu_vbios +------------ + +Provides raw access to the ROM binary image from the GPU. Read this file to +access the raw binary. This is useful for verifying the contents of the +video BIOS ROM. It is board specific. + +amdgpu_evict_gtt +---------------- + +Evict all buffers from the GTT memory pool. Read this file to evict all +buffers from this pool. + +amdgpu_evict_vram +----------------- + +Evict all buffers from the VRAM memory pool. Read this file to evict all +buffers from this pool. + +amdgpu_gpu_recover +------------------ + +Trigger a GPU reset. Read this file to trigger reset the entire GPU. +All work currently running on the GPU will be lost. + +amdgpu_ring_ +------------------ + +Provides read access to the kernel managed ring buffers for each ring . +These are useful for debugging problems on a particular ring. The ring buffer +is how the CPU sends commands to the GPU. The CPU writes commands into the +buffer and then asks the GPU engine to process it. This is the raw binary +contents of the ring buffer. Use a tool like UMR to decode the rings into human +readable form. + +amdgpu_mqd_ +----------------- + +Provides read access to the kernel managed MQD (Memory Queue Descriptor) for +ring managed by the kernel driver. MQDs define the features of the ring +and are used to store the ring's state when it is not connected to hardware. +The driver writes the requested ring features and metadata (GPU addresses of +the ring itself and associated buffers) to the MQD and the firmware uses the MQD +to populate the hardware when the ring is mapped to a hardware slot. Only +available on engines which use MQDs. This provides access to the raw MQD +binary. + +amdgpu_error_ +------------------- + +Provides an interface to set an error code on the dma fences associated with +ring . The error code specified is propogated to all fences associated +with the ring. Use this to inject a fence error into a ring. + +amdgpu_pm_info +-------------- + +Provides human readable information about the power management features +and state of the GPU. This includes current GFX clock, Memory clock, +voltages, average SoC power, temperature, GFX load, Memory load, SMU +feature mask, VCN power state, clock and power gating features. + +amdgpu_firmware_info +-------------------- + +Lists the firmware versions for all firmwares used by the GPU. Only +entries with a non-0 version are valid. If the version is 0, the firmware +is not valid for the GPU. + +amdgpu_fence_info +----------------- + +Shows the last signalled and emitted fence sequence numbers for each +kernel driver managed ring. Fences are associated with submissions +to the engine. Emitted fences have been submitted to the ring +and signalled fences have been signalled by the GPU. Rings with a +larger emitted fence value have outstanding work that is still being +processed by the engine that owns that ring. When the emitted and +signalled fence values are equal, the ring is idle. + +amdgpu_gem_info +--------------- + +Lists all of the PIDs using the GPU and the GPU buffers that they have +allocated. This lists the buffer size, pool (VRAM, GTT, etc.), and buffer +attributes (CPU access required, CPU cache attributes, etc.). + +amdgpu_vm_info +-------------- + +Lists all of the PIDs using the GPU and the GPU buffers that they have +allocated as well as the status of those buffers relative to that process' +GPU virtual address space (e.g., evicted, idle, invalidated, etc.). + +amdgpu_sa_info +-------------- + +Prints out all of the suballocations (sa) by the suballocation manager in the +kernel driver. Prints the GPU address, size, and fence info associated +with each suballocation. The suballocations are used internally within +the kernel driver for various things. + +amdgpu__mm +---------------- + +Prints TTM information about the memory pool . + +amdgpu_vram +----------- + +Provides direct access to VRAM. Used by tools like UMR to inspect +objects in VRAM. + +amdgpu_iomem +------------ + +Provides direct access to GTT memory. Used by tools like UMR to inspect +GTT memory. + +amdgpu_regs_* +------------- + +Provides direct access to various register aperatures on the GPU. Used +by tools like UMR to access GPU registers. + +amdgpu_regs2 +------------ + +Provides an IOCTL interface used by UMR for interacting with GPU registers. + + +amdgpu_sensors +-------------- + +Provides an interface to query GPU power metrics (temperature, average +power, etc.). Used by tools like UMR to query GPU power metrics. + + +amdgpu_gca_config +----------------- + +Provides an interface to query GPU details (Graphics/Compute Array config, +PCI config, GPU family, etc.). Used by tools like UMR to query GPU details. + +amdgpu_wave +----------- + +Used to query GFX/compute wave information from the hardware. Used by tools +like UMR to query GFX/compute wave information. + +amdgpu_gpr +---------- + +Used to query GFX/compute GPR (General Purpose Register) information from the +hardware. Used by tools like UMR to query GPRs when debugging shaders. + +amdgpu_gprwave +-------------- + +Provides an IOCTL interface used by UMR for interacting with shader waves. + +amdgpu_fw_attestation +--------------------- + +Provides an interface for reading back firmware attestation records. diff --git a/Documentation/gpu/amdgpu/debugging.rst b/Documentation/gpu/amdgpu/debugging.rst index e75f97d0e4ea..7cbfea0606e1 100644 --- a/Documentation/gpu/amdgpu/debugging.rst +++ b/Documentation/gpu/amdgpu/debugging.rst @@ -2,6 +2,13 @@ GPU Debugging =============== +General Debugging Options +========================= + +The DebugFS section provides documentation on a number files to aid in debugging +issues on the GPU. + + GPUVM Debugging =============== diff --git a/Documentation/gpu/amdgpu/index.rst b/Documentation/gpu/amdgpu/index.rst index 302d039928ee..4c75567854cb 100644 --- a/Documentation/gpu/amdgpu/index.rst +++ b/Documentation/gpu/amdgpu/index.rst @@ -16,5 +16,6 @@ Next (GCN), Radeon DNA (RDNA), and Compute DNA (CDNA) architectures. thermal driver-misc debugging + debugfs process-isolation amdgpu-glossary -- cgit v1.2.3 From 8f1366fcb84677293d070e31843a87c41ab8f93f Mon Sep 17 00:00:00 2001 From: Rodrigo Siqueira Date: Tue, 25 Mar 2025 11:18:42 -0600 Subject: Documentation/gpu: Add new acronyms MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This commit introduces some new acronyms extracted from the source code and found on some web pages around the internet (most of them came from ArchLinux, Gentoo, and Wikipedia links). Reviewed-by: Christian König Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/amdgpu-glossary.rst | 36 ++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst b/Documentation/gpu/amdgpu/amdgpu-glossary.rst index 1e9283e076ba..080c3f2250d1 100644 --- a/Documentation/gpu/amdgpu/amdgpu-glossary.rst +++ b/Documentation/gpu/amdgpu/amdgpu-glossary.rst @@ -12,15 +12,27 @@ we have a dedicated glossary for Display Core at The number of CUs that are active on the system. The number of active CUs may be less than SE * SH * CU depending on the board configuration. + BACO + Bus Alive, Chip Off + + BOCO + Bus Off, Chip Off + CE Constant Engine + CIK + Sea Islands + CP Command Processor CPLIB Content Protection Library + CS + Command Submission + CU Compute Unit @@ -33,6 +45,9 @@ we have a dedicated glossary for Display Core at EOP End Of Pipe/Pipeline + FLR + Function Level Reset + GART Graphics Address Remapping Table. This is the name we use for the GPUVM page table used by the GPU kernel driver. It remaps system resources @@ -80,6 +95,9 @@ we have a dedicated glossary for Display Core at KCQ Kernel Compute Queue + KFD + Kernel Fusion Driver + KGQ Kernel Graphics Queue @@ -89,6 +107,9 @@ we have a dedicated glossary for Display Core at MC Memory Controller + MCBP + Mid Command Buffer Preemption + ME MicroEngine (Graphics) @@ -125,9 +146,15 @@ we have a dedicated glossary for Display Core at SE Shader Engine + SGPR + Scalar General-Purpose Registers + SH SHader array + SI + Southern Islands + SMU/SMC System Management Unit / System Management Controller @@ -146,6 +173,9 @@ we have a dedicated glossary for Display Core at TA Trusted Application + TC + Texture Cache + TOC Table of Contents @@ -158,5 +188,11 @@ we have a dedicated glossary for Display Core at VCN Video Codec Next + VGPR + Vector General-Purpose Registers + + VMID + Virtual Memory ID + VPE Video Processing Engine -- cgit v1.2.3 From 5acd17d6d14ec1112a6427e7c02569cba6c46f2d Mon Sep 17 00:00:00 2001 From: Rodrigo Siqueira Date: Tue, 25 Mar 2025 11:18:43 -0600 Subject: Documentation/gpu: Change index order to show driver core first Since driver-core has an overview of the AMD GPU hardware structure, it makes more sense to keep it first. This commit move driver-core up in the index list. Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/index.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/index.rst b/Documentation/gpu/amdgpu/index.rst index 4c75567854cb..fd47324437a0 100644 --- a/Documentation/gpu/amdgpu/index.rst +++ b/Documentation/gpu/amdgpu/index.rst @@ -7,8 +7,8 @@ Next (GCN), Radeon DNA (RDNA), and Compute DNA (CDNA) architectures. .. toctree:: - module-parameters driver-core + module-parameters display/index flashing xgmi -- cgit v1.2.3 From c6a1c23d1041f7a5f8f259face14212c6ce4f1a8 Mon Sep 17 00:00:00 2001 From: Rodrigo Siqueira Date: Tue, 25 Mar 2025 11:18:44 -0600 Subject: Documentation/gpu: Create a documentation entry just for hardware info The APU and dGPU tables are hidden in the driver misc info, which makes it hard to find specific hardware info when users need it. This commit creates a single page for this information and adds it to the top of the amdgpu list to improve searchability. Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher --- .../gpu/amdgpu/amd-hardware-list-info.rst | 23 ++++++++++++++++++++++ Documentation/gpu/amdgpu/driver-misc.rst | 17 ---------------- Documentation/gpu/amdgpu/index.rst | 1 + 3 files changed, 24 insertions(+), 17 deletions(-) create mode 100644 Documentation/gpu/amdgpu/amd-hardware-list-info.rst (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/amd-hardware-list-info.rst b/Documentation/gpu/amdgpu/amd-hardware-list-info.rst new file mode 100644 index 000000000000..1786544fe7c1 --- /dev/null +++ b/Documentation/gpu/amdgpu/amd-hardware-list-info.rst @@ -0,0 +1,23 @@ +================================================= + AMD Hardware Components Information per Product +================================================= + +On this page, you can find the AMD product name and which component version is +part of it. + +Accelerated Processing Units (APU) Info +--------------------------------------- + +.. csv-table:: + :header-rows: 1 + :widths: 3, 2, 2, 1, 1, 1, 1 + :file: ./apu-asic-info-table.csv + +Discrete GPU Info +----------------- + +.. csv-table:: + :header-rows: 1 + :widths: 3, 2, 2, 1, 1, 1 + :file: ./dgpu-asic-info-table.csv + diff --git a/Documentation/gpu/amdgpu/driver-misc.rst b/Documentation/gpu/amdgpu/driver-misc.rst index e40e15f89fd3..25b0c857816e 100644 --- a/Documentation/gpu/amdgpu/driver-misc.rst +++ b/Documentation/gpu/amdgpu/driver-misc.rst @@ -50,23 +50,6 @@ board_info .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c :doc: board_info -Accelerated Processing Units (APU) Info ---------------------------------------- - -.. csv-table:: - :header-rows: 1 - :widths: 3, 2, 2, 1, 1, 1, 1 - :file: ./apu-asic-info-table.csv - -Discrete GPU Info ------------------ - -.. csv-table:: - :header-rows: 1 - :widths: 3, 2, 2, 1, 1, 1 - :file: ./dgpu-asic-info-table.csv - - GPU Memory Usage Information ============================ diff --git a/Documentation/gpu/amdgpu/index.rst b/Documentation/gpu/amdgpu/index.rst index fd47324437a0..1fdc3ccb61c4 100644 --- a/Documentation/gpu/amdgpu/index.rst +++ b/Documentation/gpu/amdgpu/index.rst @@ -8,6 +8,7 @@ Next (GCN), Radeon DNA (RDNA), and Compute DNA (CDNA) architectures. .. toctree:: driver-core + amd-hardware-list-info module-parameters display/index flashing -- cgit v1.2.3 From 4ede6d20047ae13855a49969b48c438d1a2ac054 Mon Sep 17 00:00:00 2001 From: Rodrigo Siqueira Date: Tue, 25 Mar 2025 11:18:45 -0600 Subject: Documentation/gpu: Add explanation about AMD Pipes and Queues MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Pipes and Queues are two common vocabulary that pervades discussions around amdgpu core features. The definition and explanation of those components are spread around multiple places in the code, mailing list, and Gitlab, which sometimes leads to the wrong interpretation of these concepts. This commit attempts to centralize the definition and explanation of Pipe and Queue from amdgpu perspective in a kernel doc. Most of the information in this doc was derived from: - https://lore.kernel.org/amd-gfx/CADnq5_Pcz2x4aJzKbVrN3jsZhD6sTydtDw=6PaN4O3m4t+Grtg@mail.gmail.com/T/#m9a670b55ab20e0f7c46c80f802a0a4be255a719d - https://gitlab.freedesktop.org/mesa/mesa/-/issues/11759 Reviewed-by: Christian König Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/driver-core.rst | 50 + .../gpu/amdgpu/pipe_and_queue_abstraction.svg | 1279 ++++++++++++++++++++ 2 files changed, 1329 insertions(+) create mode 100644 Documentation/gpu/amdgpu/pipe_and_queue_abstraction.svg (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/driver-core.rst b/Documentation/gpu/amdgpu/driver-core.rst index 32723a925377..d8500c9c961e 100644 --- a/Documentation/gpu/amdgpu/driver-core.rst +++ b/Documentation/gpu/amdgpu/driver-core.rst @@ -98,6 +98,56 @@ RLC (RunList Controller) The name is a vestige of old hardware where it was originally added and doesn't really have much relation to what the engine does now. + +GFX, Compute, and SDMA Overall Behavior +======================================= + +.. note:: For simplicity, whenever the term block is used in this section, it + means GFX, Compute, and SDMA. + +GFX, Compute and SDMA share a similar form of operation that can be abstracted +to facilitate understanding of the behavior of these blocks. See the figure +below illustrating the common components of these blocks: + +.. kernel-figure:: pipe_and_queue_abstraction.svg + +In the central part of this figure, you can see two hardware elements, one called +**Pipes** and another called **Queues**; it is important to highlight that Queues +must be associated with a Pipe and vice-versa. Every specific hardware IP may have +a different number of Pipes and, in turn, a different number of Queues; for +example, GFX 11 has two Pipes and two Queues per Pipe for the GFX front end. + +Pipe is the hardware that processes the instructions available in the Queues; +in other words, it is a thread executing the operations inserted in the Queue. +One crucial characteristic of Pipes is that they can only execute one Queue at +a time; no matter if the hardware has multiple Queues in the Pipe, it only runs +one Queue per Pipe. + +Pipes have the mechanics of swapping between queues at the hardware level. +Nonetheless, they only make use of Queues that are considered mapped. Pipes can +switch between queues based on any of the following inputs: + +1. Command Stream; +2. Packet by Packet; +3. Other hardware requests the change (e.g., MES). + +Queues within Pipes are defined by the Hardware Queue Descriptors (HQD). +Associated with the HQD concept, we have the Memory Queue Descriptor (MQD), +which is responsible for storing information about the state of each of the +available Queues in the memory. The state of a Queue contains information such +as the GPU virtual address of the queue itself, save areas, doorbell, etc. The +MQD also stores the HQD registers, which are vital for activating or +deactivating a given Queue. The scheduling firmware (e.g., MES) is responsible +for loading HQDs from MQDs and vice versa. + +The Queue-switching process can also happen with the firmware requesting the +preemption or unmapping of a Queue. The firmware waits for the HQD_ACTIVE bit +to change to low before saving the state into the MQD. To make a different +Queue become active, the firmware copies the MQD state into the HQD registers +and loads any additional state. Finally, it sets the HQD_ACTIVE bit to high to +indicate that the queue is active. The Pipe will then execute work from active +Queues. + Driver Structure ================ diff --git a/Documentation/gpu/amdgpu/pipe_and_queue_abstraction.svg b/Documentation/gpu/amdgpu/pipe_and_queue_abstraction.svg new file mode 100644 index 000000000000..0df3c6b3000b --- /dev/null +++ b/Documentation/gpu/amdgpu/pipe_and_queue_abstraction.svg @@ -0,0 +1,1279 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + . . . + + + + + + + + + + + + . . . + + . . . + Pipe[0] + MQD + Queue[0] + Queue[n] + ... + + + + + + + + + + + + + + + + + . . . + + + + + + + + + + + + . . . + + . . . + Pipe[1] + Queue[0] + Queue[n] + ... + + + + + + + + + + + + + + . . . + + + + + + + + + + + + . . . + + . . . + Pipe[n] + Queue[0] + Queue[n] + ... + + ... + + Hardware Block + EXECUTION + + Memory + + + + + + + + e.g.,:queue[0] + + + + + e.g.,:queue[4] + + + + + e.g.,:queue[n] + + HQD + + + + + HQD + + + + + HQD + + + + + HQD + + + + + HQD + + + + + HQD + + + + Registers + + MQD + MQD + MQD + MQD + MQD + ... + + + HQD RegistersQueue Address in the GPUDoorbell... + + SWITCH QUEUE:WAIT FOR HQD_ACTIVE = 0SAVE QUEUE STATE TO THE MQDCOPY NEW MQD STATESET HQD_ACTIVE = 1 + + Firmware + + + + -- cgit v1.2.3 From e7aaa5fbf4fc1aa9c348075aab9bf054727f025f Mon Sep 17 00:00:00 2001 From: Rodrigo Siqueira Date: Tue, 25 Mar 2025 11:18:46 -0600 Subject: Documentation/gpu: Create a GC entry in the amdgpu documentation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit GC is a large block that plays a vital role for amdgpu; for this reason, this commit creates one specific page for GC and adds extra information about the CP component. Acked-by: Christian König Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/driver-core.rst | 30 +++----------------- Documentation/gpu/amdgpu/gc/index.rst | 47 ++++++++++++++++++++++++++++++++ Documentation/gpu/amdgpu/index.rst | 1 + 3 files changed, 52 insertions(+), 26 deletions(-) create mode 100644 Documentation/gpu/amdgpu/gc/index.rst (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/driver-core.rst b/Documentation/gpu/amdgpu/driver-core.rst index d8500c9c961e..2c7f7299d7ad 100644 --- a/Documentation/gpu/amdgpu/driver-core.rst +++ b/Documentation/gpu/amdgpu/driver-core.rst @@ -67,38 +67,16 @@ GC (Graphics and Compute) This is the graphics and compute engine, i.e., the block that encompasses the 3D pipeline and and shader blocks. This is by far the largest block on the GPU. The 3D pipeline has tons of sub-blocks. In - addition to that, it also contains the CP microcontrollers (ME, PFP, - CE, MEC) and the RLC microcontroller. It's exposed to userspace for - user mode drivers (OpenGL, Vulkan, OpenCL, etc.) + addition to that, it also contains the CP microcontrollers (ME, PFP, CE, + MEC) and the RLC microcontroller. It's exposed to userspace for user mode + drivers (OpenGL, Vulkan, OpenCL, etc.). More details in :ref:`Graphics (GFX) + and Compute `. VCN (Video Core Next) This is the multi-media engine. It handles video and image encode and decode. It's exposed to userspace for user mode drivers (VA-API, OpenMAX, etc.) -Graphics and Compute Microcontrollers -------------------------------------- - -CP (Command Processor) - The name for the hardware block that encompasses the front end of the - GFX/Compute pipeline. Consists mainly of a bunch of microcontrollers - (PFP, ME, CE, MEC). The firmware that runs on these microcontrollers - provides the driver interface to interact with the GFX/Compute engine. - - MEC (MicroEngine Compute) - This is the microcontroller that controls the compute queues on the - GFX/compute engine. - - MES (MicroEngine Scheduler) - This is a new engine for managing queues. This is currently unused. - -RLC (RunList Controller) - This is another microcontroller in the GFX/Compute engine. It handles - power management related functionality within the GFX/Compute engine. - The name is a vestige of old hardware where it was originally added - and doesn't really have much relation to what the engine does now. - - GFX, Compute, and SDMA Overall Behavior ======================================= diff --git a/Documentation/gpu/amdgpu/gc/index.rst b/Documentation/gpu/amdgpu/gc/index.rst new file mode 100644 index 000000000000..65ea93a3fbbe --- /dev/null +++ b/Documentation/gpu/amdgpu/gc/index.rst @@ -0,0 +1,47 @@ +.. _amdgpu-gc: + +======================================== + drm/amdgpu - Graphics and Compute (GC) +======================================== + +The relationship between the CPU and GPU can be described as the +producer-consumer problem, where the CPU fills out a buffer with operations +(producer) to be executed by the GPU (consumer). The requested operations in +the buffer are called Command Packets, which can be summarized as a compressed +way of transmitting command information to the graphics controller. + +The component that acts as the front end between the CPU and the GPU is called +the Command Processor (CP). This component is responsible for providing greater +flexibility to the GC since CP makes it possible to program various aspects of +the GPU pipeline. CP also coordinates the communication between the CPU and GPU +via a mechanism named **Ring Buffers**, where the CPU appends information to +the buffer while the GPU removes operations. It is relevant to highlight that a +CPU can add a pointer to the Ring Buffer that points to another region of +memory outside the Ring Buffer, and CP can handle it; this mechanism is called +**Indirect Buffer (IB)**. CP receives and parses the Command Streams (CS), and +writes the operations to the correct hardware blocks. + +Graphics (GFX) and Compute Microcontrollers +------------------------------------------- + +GC is a large block, and as a result, it has multiple firmware associated with +it. Some of them are: + +CP (Command Processor) + The name for the hardware block that encompasses the front end of the + GFX/Compute pipeline. Consists mainly of a bunch of microcontrollers + (PFP, ME, CE, MEC). The firmware that runs on these microcontrollers + provides the driver interface to interact with the GFX/Compute engine. + + MEC (MicroEngine Compute) + This is the microcontroller that controls the compute queues on the + GFX/compute engine. + + MES (MicroEngine Scheduler) + This is the engine for managing queues. + +RLC (RunList Controller) + This is another microcontroller in the GFX/Compute engine. It handles + power management related functionality within the GFX/Compute engine. + The name is a vestige of old hardware where it was originally added + and doesn't really have much relation to what the engine does now. diff --git a/Documentation/gpu/amdgpu/index.rst b/Documentation/gpu/amdgpu/index.rst index 1fdc3ccb61c4..bb2894b5edaf 100644 --- a/Documentation/gpu/amdgpu/index.rst +++ b/Documentation/gpu/amdgpu/index.rst @@ -10,6 +10,7 @@ Next (GCN), Radeon DNA (RDNA), and Compute DNA (CDNA) architectures. driver-core amd-hardware-list-info module-parameters + gc/index display/index flashing xgmi -- cgit v1.2.3 From 74f0ff369f8a4f44082a71049a15d7da2e73ff7c Mon Sep 17 00:00:00 2001 From: Rodrigo Siqueira Date: Tue, 25 Mar 2025 11:18:47 -0600 Subject: Documentation/gpu: Add an intro about MES MES is an important firmware that lacks some essential documentation. This commit introduces an overview of it and how it works. Reviewed-by: Bagas Sanjaya Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/driver-core.rst | 2 ++ Documentation/gpu/amdgpu/gc/index.rst | 7 +++++- Documentation/gpu/amdgpu/gc/mes.rst | 38 ++++++++++++++++++++++++++++++++ 3 files changed, 46 insertions(+), 1 deletion(-) create mode 100644 Documentation/gpu/amdgpu/gc/mes.rst (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/driver-core.rst b/Documentation/gpu/amdgpu/driver-core.rst index 2c7f7299d7ad..7e3f5d1e9aaf 100644 --- a/Documentation/gpu/amdgpu/driver-core.rst +++ b/Documentation/gpu/amdgpu/driver-core.rst @@ -77,6 +77,8 @@ VCN (Video Core Next) decode. It's exposed to userspace for user mode drivers (VA-API, OpenMAX, etc.) +.. _pipes-and-queues-description: + GFX, Compute, and SDMA Overall Behavior ======================================= diff --git a/Documentation/gpu/amdgpu/gc/index.rst b/Documentation/gpu/amdgpu/gc/index.rst index 65ea93a3fbbe..ff6e9ef5cbee 100644 --- a/Documentation/gpu/amdgpu/gc/index.rst +++ b/Documentation/gpu/amdgpu/gc/index.rst @@ -38,10 +38,15 @@ CP (Command Processor) GFX/compute engine. MES (MicroEngine Scheduler) - This is the engine for managing queues. + This is the engine for managing queues. For more details check + :ref:`MicroEngine Scheduler (MES) `. RLC (RunList Controller) This is another microcontroller in the GFX/Compute engine. It handles power management related functionality within the GFX/Compute engine. The name is a vestige of old hardware where it was originally added and doesn't really have much relation to what the engine does now. + +.. toctree:: + + mes.rst diff --git a/Documentation/gpu/amdgpu/gc/mes.rst b/Documentation/gpu/amdgpu/gc/mes.rst new file mode 100644 index 000000000000..b99eb211b179 --- /dev/null +++ b/Documentation/gpu/amdgpu/gc/mes.rst @@ -0,0 +1,38 @@ +.. _amdgpu-mes: + +============================= + MicroEngine Scheduler (MES) +============================= + +.. note:: + Queue and ring buffer are used as a synonymous. + +.. note:: + This section assumes that you are familiar with the concept of Pipes, Queues, and GC. + If not, check :ref:`GFX, Compute, and SDMA Overall Behavior` + and :ref:`drm/amdgpu - Graphics and Compute (GC) `. + +Every GFX has a pipe component with one or more hardware queues. Pipes can +switch between queues depending on certain conditions, and one of the +components that can request a queue switch to a pipe is the MicroEngine +Scheduler (MES). Whenever the driver is initialized, it creates one MQD per +hardware queue, and then the MQDs are handed to the MES firmware for mapping +to: + +1. Kernel Queues (legacy): This queue is statically mapped to HQDs and never + preempted. Even though this is a legacy feature, it is the current default, and + most existing hardware supports it. When an application submits work to the + kernel driver, it submits all of the application command buffers to the kernel + queues. The CS IOCTL takes the command buffer from the applications and + schedules them on the kernel queue. + +2. User Queues: These queues are dynamically mapped to the HQDs. Regarding the + utilization of User Queues, the userspace application will create its user + queues and submit work directly to its user queues with no need to IOCTL for + each submission and no need to share a single kernel queue. + +In terms of User Queues, MES can dynamically map them to the HQD. If there are +more MQDs than HQDs, the MES firmware will preempt other user queues to make +sure each queues get a time slice; in other words, MES is a microcontroller +that handles the mapping and unmapping of MQDs into HQDs, as well as the +priorities and oversubscription of MQDs. -- cgit v1.2.3 From aa52eb6d1672cd75507d235a9f6e1b93fb5d3bb4 Mon Sep 17 00:00:00 2001 From: Charles Han Date: Thu, 13 Feb 2025 15:08:37 +0800 Subject: Documentation: Remove repeated word in docs Remove the repeated word "the" in docs. Signed-off-by: Charles Han Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/display/dc-debug.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/display/dc-debug.rst b/Documentation/gpu/amdgpu/display/dc-debug.rst index 013f63b271f3..605dca21f4ae 100644 --- a/Documentation/gpu/amdgpu/display/dc-debug.rst +++ b/Documentation/gpu/amdgpu/display/dc-debug.rst @@ -154,7 +154,7 @@ of the display parameters, but the userspace might also cause this issue. One way to identify the source of the problem is to take a screenshot or make a desktop video capture when the problem happens; after checking the screenshot/video recording, if you don't see any of the artifacts, it means -that the issue is likely on the the driver side. If you can still see the +that the issue is likely on the driver side. If you can still see the problem in the data collected, it is an issue that probably happened during rendering, and the display code just got the framebuffer already corrupted. -- cgit v1.2.3 From dcbe2aeda2e09eb69f5feba7e171db2836d9999d Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Tue, 25 Feb 2025 10:40:23 +0100 Subject: media: v4l2: Add NV15 and NV20 pixel formats Add NV15 and NV20 pixel formats used by the Rockchip Video Decoder for 10-bit buffers. NV15 and NV20 is 10-bit 4:2:0/4:2:2 semi-planar YUV formats similar to NV12 and NV16, using 10-bit components with no padding between each component. Instead, a group of 4 luminance/chrominance samples are stored over 5 bytes in little endian order: YYYY = UVUV = 4 * 10 bits = 40 bits = 5 bytes The '15' and '20' suffix refers to the optimum effective bits per pixel which is achieved when the total number of luminance samples is a multiple of 8 for NV15 and 4 for NV20. Signed-off-by: Jonas Karlman Reviewed-by: Nicolas Dufresne Tested-by: Nicolas Dufresne Tested-by: Christopher Obbard Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- .../userspace-api/media/v4l/pixfmt-yuv-planar.rst | 128 +++++++++++++++++++++ 1 file changed, 128 insertions(+) (limited to 'Documentation') diff --git a/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst b/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst index b788f6933855..6e4f399f1f88 100644 --- a/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst @@ -137,6 +137,13 @@ All components are stored with the same number of bits per component. - Cb, Cr - No - Linear + * - V4L2_PIX_FMT_NV15 + - 'NV15' + - 10 + - 4:2:0 + - Cb, Cr + - Yes + - Linear * - V4L2_PIX_FMT_NV15_4L4 - 'VT15' - 15 @@ -186,6 +193,13 @@ All components are stored with the same number of bits per component. - Cr, Cb - No - Linear + * - V4L2_PIX_FMT_NV20 + - 'NV20' + - 10 + - 4:2:2 + - Cb, Cr + - Yes + - Linear * - V4L2_PIX_FMT_NV24 - 'NV24' - 8 @@ -302,6 +316,57 @@ of the luma plane. - Cr\ :sub:`11` +.. _V4L2-PIX-FMT-NV15: + +NV15 +---- + +Semi-planar 10-bit YUV 4:2:0 format similar to NV12, using 10-bit components +with no padding between each component. A group of 4 components are stored over +5 bytes in little endian order. + +.. flat-table:: Sample 4x4 NV15 Image (1 byte per cell) + :header-rows: 0 + :stub-columns: 0 + + * - start + 0: + - Y'\ :sub:`00[7:0]` + - Y'\ :sub:`01[5:0]`\ Y'\ :sub:`00[9:8]` + - Y'\ :sub:`02[3:0]`\ Y'\ :sub:`01[9:6]` + - Y'\ :sub:`03[1:0]`\ Y'\ :sub:`02[9:4]` + - Y'\ :sub:`03[9:2]` + * - start + 5: + - Y'\ :sub:`10[7:0]` + - Y'\ :sub:`11[5:0]`\ Y'\ :sub:`10[9:8]` + - Y'\ :sub:`12[3:0]`\ Y'\ :sub:`11[9:6]` + - Y'\ :sub:`13[1:0]`\ Y'\ :sub:`12[9:4]` + - Y'\ :sub:`13[9:2]` + * - start + 10: + - Y'\ :sub:`20[7:0]` + - Y'\ :sub:`21[5:0]`\ Y'\ :sub:`20[9:8]` + - Y'\ :sub:`22[3:0]`\ Y'\ :sub:`21[9:6]` + - Y'\ :sub:`23[1:0]`\ Y'\ :sub:`22[9:4]` + - Y'\ :sub:`23[9:2]` + * - start + 15: + - Y'\ :sub:`30[7:0]` + - Y'\ :sub:`31[5:0]`\ Y'\ :sub:`30[9:8]` + - Y'\ :sub:`32[3:0]`\ Y'\ :sub:`31[9:6]` + - Y'\ :sub:`33[1:0]`\ Y'\ :sub:`32[9:4]` + - Y'\ :sub:`33[9:2]` + * - start + 20: + - Cb\ :sub:`00[7:0]` + - Cr\ :sub:`00[5:0]`\ Cb\ :sub:`00[9:8]` + - Cb\ :sub:`01[3:0]`\ Cr\ :sub:`00[9:6]` + - Cr\ :sub:`01[1:0]`\ Cb\ :sub:`01[9:4]` + - Cr\ :sub:`01[9:2]` + * - start + 25: + - Cb\ :sub:`10[7:0]` + - Cr\ :sub:`10[5:0]`\ Cb\ :sub:`10[9:8]` + - Cb\ :sub:`11[3:0]`\ Cr\ :sub:`10[9:6]` + - Cr\ :sub:`11[1:0]`\ Cb\ :sub:`11[9:4]` + - Cr\ :sub:`11[9:2]` + + .. _V4L2-PIX-FMT-NV12MT: .. _V4L2-PIX-FMT-NV12MT-16X16: .. _V4L2-PIX-FMT-NV12-4L4: @@ -631,6 +696,69 @@ number of lines as the luma plane. - Cr\ :sub:`32` +.. _V4L2-PIX-FMT-NV20: + +NV20 +---- + +Semi-planar 10-bit YUV 4:2:2 format similar to NV16, using 10-bit components +with no padding between each component. A group of 4 components are stored over +5 bytes in little endian order. + +.. flat-table:: Sample 4x4 NV20 Image (1 byte per cell) + :header-rows: 0 + :stub-columns: 0 + + * - start + 0: + - Y'\ :sub:`00[7:0]` + - Y'\ :sub:`01[5:0]`\ Y'\ :sub:`00[9:8]` + - Y'\ :sub:`02[3:0]`\ Y'\ :sub:`01[9:6]` + - Y'\ :sub:`03[1:0]`\ Y'\ :sub:`02[9:4]` + - Y'\ :sub:`03[9:2]` + * - start + 5: + - Y'\ :sub:`10[7:0]` + - Y'\ :sub:`11[5:0]`\ Y'\ :sub:`10[9:8]` + - Y'\ :sub:`12[3:0]`\ Y'\ :sub:`11[9:6]` + - Y'\ :sub:`13[1:0]`\ Y'\ :sub:`12[9:4]` + - Y'\ :sub:`13[9:2]` + * - start + 10: + - Y'\ :sub:`20[7:0]` + - Y'\ :sub:`21[5:0]`\ Y'\ :sub:`20[9:8]` + - Y'\ :sub:`22[3:0]`\ Y'\ :sub:`21[9:6]` + - Y'\ :sub:`23[1:0]`\ Y'\ :sub:`22[9:4]` + - Y'\ :sub:`23[9:2]` + * - start + 15: + - Y'\ :sub:`30[7:0]` + - Y'\ :sub:`31[5:0]`\ Y'\ :sub:`30[9:8]` + - Y'\ :sub:`32[3:0]`\ Y'\ :sub:`31[9:6]` + - Y'\ :sub:`33[1:0]`\ Y'\ :sub:`32[9:4]` + - Y'\ :sub:`33[9:2]` + * - start + 20: + - Cb\ :sub:`00[7:0]` + - Cr\ :sub:`00[5:0]`\ Cb\ :sub:`00[9:8]` + - Cb\ :sub:`01[3:0]`\ Cr\ :sub:`00[9:6]` + - Cr\ :sub:`01[1:0]`\ Cb\ :sub:`01[9:4]` + - Cr\ :sub:`01[9:2]` + * - start + 25: + - Cb\ :sub:`10[7:0]` + - Cr\ :sub:`10[5:0]`\ Cb\ :sub:`10[9:8]` + - Cb\ :sub:`11[3:0]`\ Cr\ :sub:`10[9:6]` + - Cr\ :sub:`11[1:0]`\ Cb\ :sub:`11[9:4]` + - Cr\ :sub:`11[9:2]` + * - start + 30: + - Cb\ :sub:`20[7:0]` + - Cr\ :sub:`20[5:0]`\ Cb\ :sub:`20[9:8]` + - Cb\ :sub:`21[3:0]`\ Cr\ :sub:`20[9:6]` + - Cr\ :sub:`21[1:0]`\ Cb\ :sub:`21[9:4]` + - Cr\ :sub:`21[9:2]` + * - start + 35: + - Cb\ :sub:`30[7:0]` + - Cr\ :sub:`30[5:0]`\ Cb\ :sub:`30[9:8]` + - Cb\ :sub:`31[3:0]`\ Cr\ :sub:`30[9:6]` + - Cr\ :sub:`31[1:0]`\ Cb\ :sub:`31[9:4]` + - Cr\ :sub:`31[9:2]` + + .. _V4L2-PIX-FMT-NV24: .. _V4L2-PIX-FMT-NV42: -- cgit v1.2.3 From fa6fe07d1536361a227d655e69ca270faf28fdbe Mon Sep 17 00:00:00 2001 From: NeilBrown Date: Wed, 19 Mar 2025 14:01:35 +1100 Subject: VFS: rename lookup_one_len family to lookup_noperm and remove permission check The lookup_one_len family of functions is (now) only used internally by a filesystem on itself either - in a context where permission checking is irrelevant such as by a virtual filesystem populating itself, or xfs accessing its ORPHANAGE or dquota accessing the quota file; or - in a context where a permission check (MAY_EXEC on the parent) has just been performed such as a network filesystem finding in "silly-rename" file in the same directory. This is also the context after the _parentat() functions where currently lookup_one_qstr_excl() is used. So the permission check is pointless. The name "one_len" is unhelpful in understanding the purpose of these functions and should be changed. Most of the callers pass the len as "strlen()" so using a qstr and QSTR() can simplify the code. This patch renames these functions (include lookup_positive_unlocked() which is part of the family despite the name) to have a name based on "lookup_noperm". They are changed to receive a 'struct qstr' instead of separate name and len. In a few cases the use of QSTR() results in a new call to strlen(). try_lookup_noperm() takes a pointer to a qstr instead of the whole qstr. This is consistent with d_hash_and_lookup() (which is nearly identical) and useful for lookup_noperm_unlocked(). The new lookup_noperm_common() doesn't take a qstr yet. That will be tidied up in a subsequent patch. Signed-off-by: NeilBrown Link: https://lore.kernel.org/r/20250319031545.2999807-5-neil@brown.name Signed-off-by: Christian Brauner --- Documentation/filesystems/porting.rst | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/porting.rst b/Documentation/filesystems/porting.rst index 57dcba6de743..9150de7f64f1 100644 --- a/Documentation/filesystems/porting.rst +++ b/Documentation/filesystems/porting.rst @@ -1212,3 +1212,23 @@ lookup_one(), lookup_one_unlocked(), lookup_one_positive_unlocked() now take a qstr instead of a name and len. These, not the "one_len" versions, should be used whenever accessing a filesystem from outside that filesysmtem, through a mount point - which will have a mnt_idmap. + +--- + +** mandatory** + +Functions try_lookup_one_len(), lookup_one_len(), +lookup_one_len_unlocked() and lookup_positive_unlocked() have been +renamed to try_lookup_noperm(), lookup_noperm(), +lookup_noperm_unlocked(), lookup_noperm_positive_unlocked(). They now +take a qstr instead of separate name and length. QSTR() can be used +when strlen() is needed for the length. + +For try_lookup_noperm() a reference to the qstr is passed in case the +hash might subsequently be needed. + +These function no longer do any permission checking - they previously +checked that the caller has 'X' permission on the parent. They must +ONLY be used internally by a filesystem on itself when it knows that +permissions are irrelevant or in a context where permission checks have +already been performed such as after vfs_path_parent_lookup() -- cgit v1.2.3 From 06c567403ae5a0b56005c2d4a184c903f572c844 Mon Sep 17 00:00:00 2001 From: NeilBrown Date: Wed, 19 Mar 2025 14:01:36 +1100 Subject: Use try_lookup_noperm() instead of d_hash_and_lookup() outside of VFS try_lookup_noperm() and d_hash_and_lookup() are nearly identical. The former does some validation of the name where the latter doesn't. Outside of the VFS that validation is likely valuable, and having only one exported function for this task is certainly a good idea. So make d_hash_and_lookup() local to VFS files and change all other callers to try_lookup_noperm(). Note that the arguments are swapped. Signed-off-by: NeilBrown Link: https://lore.kernel.org/r/20250319031545.2999807-6-neil@brown.name Signed-off-by: Christian Brauner --- Documentation/filesystems/porting.rst | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/porting.rst b/Documentation/filesystems/porting.rst index 9150de7f64f1..3111ef5592f3 100644 --- a/Documentation/filesystems/porting.rst +++ b/Documentation/filesystems/porting.rst @@ -1232,3 +1232,14 @@ checked that the caller has 'X' permission on the parent. They must ONLY be used internally by a filesystem on itself when it knows that permissions are irrelevant or in a context where permission checks have already been performed such as after vfs_path_parent_lookup() + +--- + +** mandatory** + +d_hash_and_lookup() is no longer exported or available outside the VFS. +Use try_lookup_noperm() instead. This adds name validation and takes +arguments in the opposite order but is otherwise identical. + +Using try_lookup_noperm() will require linux/namei.h to be included. + -- cgit v1.2.3 From e34e0131fea1b0f63c2105a1958c94af2ee90f4d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michal=20Koutn=C3=BD?= Date: Mon, 10 Mar 2025 18:04:36 +0100 Subject: sched: Add commadline option for RT_GROUP_SCHED toggling MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Only simple implementation with a static key wrapper, it will be wired in later. Signed-off-by: Michal Koutný Signed-off-by: Peter Zijlstra (Intel) Link: https://lkml.kernel.org/r/20250310170442.504716-5-mkoutny@suse.com --- Documentation/admin-guide/kernel-parameters.txt | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 3f35d5b8c296..168202330cfa 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -6280,6 +6280,11 @@ Memory area to be used by remote processor image, managed by CMA. + rt_group_sched= [KNL] Enable or disable SCHED_RR/FIFO group scheduling + when CONFIG_RT_GROUP_SCHED=y. Defaults to + !CONFIG_RT_GROUP_SCHED_DEFAULT_DISABLED. + Format: + rw [KNL] Mount root device read-write on boot S [KNL] Run init in single mode -- cgit v1.2.3 From d526b4efb748d439af68be7d1a8922716a0eb52c Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Wed, 26 Mar 2025 13:49:00 -0400 Subject: Documentation: update KIQ documentation KIQ is replaced with MES on GFX 11 and newer. Reviewed-by: shaoyun.liu Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/driver-core.rst | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/driver-core.rst b/Documentation/gpu/amdgpu/driver-core.rst index 7e3f5d1e9aaf..81256318e93c 100644 --- a/Documentation/gpu/amdgpu/driver-core.rst +++ b/Documentation/gpu/amdgpu/driver-core.rst @@ -140,7 +140,8 @@ Some useful constructs: KIQ (Kernel Interface Queue) This is a control queue used by the kernel driver to manage other gfx and compute queues on the GFX/compute engine. You can use it to - map/unmap additional queues, etc. + map/unmap additional queues, etc. This is replaced by MES on + GFX 11 and newer hardware. IB (Indirect Buffer) A command buffer for a particular engine. Rather than writing -- cgit v1.2.3 From 9040e657dc1c243b89e089a2fd83a84e041d9706 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Wed, 26 Mar 2025 13:50:10 -0400 Subject: Documenation: fix typo in debugfs.rst In reference to memory carved out for APUs, s/cave out/carve out/ Reviewed-by: shaoyun.liu Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/debugfs.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/debugfs.rst b/Documentation/gpu/amdgpu/debugfs.rst index fe7736a0b43a..5150d0a95658 100644 --- a/Documentation/gpu/amdgpu/debugfs.rst +++ b/Documentation/gpu/amdgpu/debugfs.rst @@ -14,7 +14,7 @@ amdgpu_benchmark Run benchmarks using the DMA engine the driver uses for GPU memory paging. Write a number to the file to run the test. The results are written to the -kernel log. VRAM is on device memory (dGPUs) or cave out (APUs) and GTT +kernel log. VRAM is on device memory (dGPUs) or carve out (APUs) and GTT (Graphics Translation Tables) is system memory that is accessible by the GPU. The following tests are available: -- cgit v1.2.3 From 12a2bf6765c2a61eb7f20870452bb915eb28fdcc Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Tue, 8 Apr 2025 16:54:14 -0400 Subject: drm: Add UAPI for the Asahi driver This adds the UAPI for the Asahi driver targeting the GPU in the Apple M1 and M2 series systems on chip. The UAPI design is based on other modern Vulkan-capable drivers, including Xe and Panthor. Memory management is based on explicit VM management. Synchronization is exclusively explicit sync. This UAPI is validated against our open source Mesa stack, which is fully conformant to the OpenGL 4.6, OpenGL ES 3.2, OpenCL 3.0, and Vulkan 1.4 standards. The Vulkan driver supports sparse, exercising the VM_BIND mechanism. This patch adds the standalone UAPI header. It is implemented by an open source DRM driver written in Rust. We fully intend to upstream this driver when possible. However, as a production graphics driver, it depends on a significant number of Rust abstractions that will take a long time to upstream. In the mean time, our userspace is upstream in Mesa but is not allowed to probe with upstream Mesa as the UAPI is not yet reviewed and merged in the upstream kernel. Although we ship a patched Mesa in Fedora Asahi Remix, any containers shipping upstream Mesa builds are broken for our users, including upstream Flatpak and Waydroid runtimes. Additionally, it forces us to maintain forks of Mesa and virglrenderer, which complicates bisects. The intention in sending out this patch is for this UAPI to be thoroughly reviewed. Once we as the DRM community are satisfied with the UAPI, this header lands signifying that the UAPI is stable and must only be evolved in backwards-compatible ways; it will be the UAPI implemented in the DRM driver that eventually lands upstream. That promise lets us enable upstream Mesa, solving all these issues while the upstream Rust abstractions are developed. https://github.com/alyssarosenzweig/linux/commits/agx-uapi-v7 contains the DRM driver implementing this proposed UAPI. https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33984 contains the Mesa patches to implement this proposed UAPI. That Linux and Mesa branch together give a complete graphics/compute stack on top of this UAPI. Co-developed-by: Asahi Lina Signed-off-by: Asahi Lina Acked-by: Simona Vetter Reviewed-by: Neal Gompa Reviewed-by: Janne Grunau Reviewed-by: Faith Ekstrand Link: https://lore.kernel.org/r/20250408-agx-uapi-v7-1-ad122d4f7324@rosenzweig.io Signed-off-by: Alyssa Rosenzweig --- Documentation/gpu/driver-uapi.rst | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/gpu/driver-uapi.rst b/Documentation/gpu/driver-uapi.rst index 971cdb4816fc..1f15a8ca1265 100644 --- a/Documentation/gpu/driver-uapi.rst +++ b/Documentation/gpu/driver-uapi.rst @@ -27,3 +27,8 @@ drm/xe uAPI =========== .. kernel-doc:: include/uapi/drm/xe_drm.h + +drm/asahi uAPI +================ + +.. kernel-doc:: include/uapi/drm/asahi_drm.h -- cgit v1.2.3 From c07d3aede2b26830ee63f64d8326f6a87dee3a6d Mon Sep 17 00:00:00 2001 From: Eric Biggers Date: Fri, 4 Apr 2025 15:58:59 -0700 Subject: fscrypt: add support for hardware-wrapped keys Add support for hardware-wrapped keys to fscrypt. Such keys are protected from certain attacks, such as cold boot attacks. For more information, see the "Hardware-wrapped keys" section of Documentation/block/inline-encryption.rst. To support hardware-wrapped keys in fscrypt, we allow the fscrypt master keys to be hardware-wrapped. File contents encryption is done by passing the wrapped key to the inline encryption hardware via blk-crypto. Other fscrypt operations such as filenames encryption continue to be done by the kernel, using the "software secret" which the hardware derives. For more information, see the documentation which this patch adds to Documentation/filesystems/fscrypt.rst. Note that this feature doesn't require any filesystem-specific changes. However it does depend on inline encryption support, and thus currently it is only applicable to ext4 and f2fs. The version of this feature introduced by this patch is mostly equivalent to the version that has existed downstream in the Android Common Kernels since 2020. However, a couple fixes are included. First, the flags field in struct fscrypt_add_key_arg is now placed in the proper location. Second, key identifiers for HW-wrapped keys are now derived using a distinct HKDF context byte; this fixes a bug where a raw key could have the same identifier as a HW-wrapped key. Note that as a result of these fixes, the version of this feature introduced by this patch is not UAPI or on-disk format compatible with the version in the Android Common Kernels, though the divergence is limited to just those specific fixes. This version should be used going forwards. This patch has been heavily rewritten from the original version by Gaurav Kashyap and Barani Muthukumaran . Tested-by: Bartosz Golaszewski # sm8650 Link: https://lore.kernel.org/r/20250404225859.172344-1-ebiggers@kernel.org Signed-off-by: Eric Biggers --- Documentation/filesystems/fscrypt.rst | 187 +++++++++++++++++++++++++++------- 1 file changed, 149 insertions(+), 38 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/fscrypt.rst b/Documentation/filesystems/fscrypt.rst index e80329908549..734ee38eb89b 100644 --- a/Documentation/filesystems/fscrypt.rst +++ b/Documentation/filesystems/fscrypt.rst @@ -70,7 +70,7 @@ Online attacks -------------- fscrypt (and storage encryption in general) can only provide limited -protection, if any at all, against online attacks. In detail: +protection against online attacks. In detail: Side-channel attacks ~~~~~~~~~~~~~~~~~~~~ @@ -99,16 +99,23 @@ Therefore, any encryption-specific access control checks would merely be enforced by kernel *code* and therefore would be largely redundant with the wide variety of access control mechanisms already available.) -Kernel memory compromise -~~~~~~~~~~~~~~~~~~~~~~~~ +Read-only kernel memory compromise +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Unless `hardware-wrapped keys`_ are used, an attacker who gains the +ability to read from arbitrary kernel memory, e.g. by mounting a +physical attack or by exploiting a kernel security vulnerability, can +compromise all fscrypt keys that are currently in-use. This also +extends to cold boot attacks; if the system is suddenly powered off, +keys the system was using may remain in memory for a short time. -An attacker who compromises the system enough to read from arbitrary -memory, e.g. by mounting a physical attack or by exploiting a kernel -security vulnerability, can compromise all encryption keys that are -currently in use. +However, if hardware-wrapped keys are used, then the fscrypt master +keys and file contents encryption keys (but not other types of fscrypt +subkeys such as filenames encryption keys) are protected from +compromises of arbitrary kernel memory. -However, fscrypt allows encryption keys to be removed from the kernel, -which may protect them from later compromise. +In addition, fscrypt allows encryption keys to be removed from the +kernel, which may protect them from later compromise. In more detail, the FS_IOC_REMOVE_ENCRYPTION_KEY ioctl (or the FS_IOC_REMOVE_ENCRYPTION_KEY_ALL_USERS ioctl) can wipe a master @@ -144,6 +151,24 @@ However, these ioctls have some limitations: accelerator hardware (if used by the crypto API to implement any of the algorithms), or in other places not explicitly considered here. +Full system compromise +~~~~~~~~~~~~~~~~~~~~~~ + +An attacker who gains "root" access and/or the ability to execute +arbitrary kernel code can freely exfiltrate data that is protected by +any in-use fscrypt keys. Thus, usually fscrypt provides no meaningful +protection in this scenario. (Data that is protected by a key that is +absent throughout the entire attack remains protected, modulo the +limitations of key removal mentioned above in the case where the key +was removed prior to the attack.) + +However, if `hardware-wrapped keys`_ are used, such attackers will be +unable to exfiltrate the master keys or file contents keys in a form +that will be usable after the system is powered off. This may be +useful if the attacker is significantly time-limited and/or +bandwidth-limited, so they can only exfiltrate some data and need to +rely on a later offline attack to exfiltrate the rest of it. + Limitations of v1 policies ~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -170,6 +195,10 @@ policies on all new encrypted directories. Key hierarchy ============= +Note: this section assumes the use of raw keys rather than +hardware-wrapped keys. The use of hardware-wrapped keys modifies the +key hierarchy slightly. For details, see `Hardware-wrapped keys`_. + Master Keys ----------- @@ -832,7 +861,9 @@ a pointer to struct fscrypt_add_key_arg, defined as follows:: struct fscrypt_key_specifier key_spec; __u32 raw_size; __u32 key_id; - __u32 __reserved[8]; + #define FSCRYPT_ADD_KEY_FLAG_HW_WRAPPED 0x00000001 + __u32 flags; + __u32 __reserved[7]; __u8 raw[]; }; @@ -851,7 +882,7 @@ a pointer to struct fscrypt_add_key_arg, defined as follows:: struct fscrypt_provisioning_key_payload { __u32 type; - __u32 __reserved; + __u32 flags; __u8 raw[]; }; @@ -879,24 +910,32 @@ as follows: Alternatively, if ``key_id`` is nonzero, this field must be 0, since in that case the size is implied by the specified Linux keyring key. -- ``key_id`` is 0 if the raw key is given directly in the ``raw`` - field. Otherwise ``key_id`` is the ID of a Linux keyring key of - type "fscrypt-provisioning" whose payload is - struct fscrypt_provisioning_key_payload whose ``raw`` field contains - the raw key and whose ``type`` field matches ``key_spec.type``. - Since ``raw`` is variable-length, the total size of this key's - payload must be ``sizeof(struct fscrypt_provisioning_key_payload)`` - plus the raw key size. The process must have Search permission on - this key. - - Most users should leave this 0 and specify the raw key directly. - The support for specifying a Linux keyring key is intended mainly to +- ``key_id`` is 0 if the key is given directly in the ``raw`` field. + Otherwise ``key_id`` is the ID of a Linux keyring key of type + "fscrypt-provisioning" whose payload is struct + fscrypt_provisioning_key_payload whose ``raw`` field contains the + key, whose ``type`` field matches ``key_spec.type``, and whose + ``flags`` field matches ``flags``. Since ``raw`` is + variable-length, the total size of this key's payload must be + ``sizeof(struct fscrypt_provisioning_key_payload)`` plus the number + of key bytes. The process must have Search permission on this key. + + Most users should leave this 0 and specify the key directly. The + support for specifying a Linux keyring key is intended mainly to allow re-adding keys after a filesystem is unmounted and re-mounted, - without having to store the raw keys in userspace memory. + without having to store the keys in userspace memory. + +- ``flags`` contains optional flags from ````: + + - FSCRYPT_ADD_KEY_FLAG_HW_WRAPPED: This denotes that the key is a + hardware-wrapped key. See `Hardware-wrapped keys`_. This flag + can't be used if FSCRYPT_KEY_SPEC_TYPE_DESCRIPTOR is used. - ``raw`` is a variable-length field which must contain the actual key, ``raw_size`` bytes long. Alternatively, if ``key_id`` is - nonzero, then this field is unused. + nonzero, then this field is unused. Note that despite being named + ``raw``, if FSCRYPT_ADD_KEY_FLAG_HW_WRAPPED is specified then it + will contain a wrapped key, not a raw key. For v2 policy keys, the kernel keeps track of which user (identified by effective user ID) added the key, and only allows the key to be @@ -908,8 +947,8 @@ prevent that other user from unexpectedly removing it. Therefore, FS_IOC_ADD_ENCRYPTION_KEY may also be used to add a v2 policy key *again*, even if it's already added by other user(s). In this case, FS_IOC_ADD_ENCRYPTION_KEY will just install a claim to the key for the -current user, rather than actually add the key again (but the raw key -must still be provided, as a proof of knowledge). +current user, rather than actually add the key again (but the key must +still be provided, as a proof of knowledge). FS_IOC_ADD_ENCRYPTION_KEY returns 0 if either the key or a claim to the key was either added or already exists. @@ -918,20 +957,23 @@ FS_IOC_ADD_ENCRYPTION_KEY can fail with the following errors: - ``EACCES``: FSCRYPT_KEY_SPEC_TYPE_DESCRIPTOR was specified, but the caller does not have the CAP_SYS_ADMIN capability in the initial - user namespace; or the raw key was specified by Linux key ID but the + user namespace; or the key was specified by Linux key ID but the process lacks Search permission on the key. +- ``EBADMSG``: invalid hardware-wrapped key - ``EDQUOT``: the key quota for this user would be exceeded by adding the key - ``EINVAL``: invalid key size or key specifier type, or reserved bits were set -- ``EKEYREJECTED``: the raw key was specified by Linux key ID, but the - key has the wrong type -- ``ENOKEY``: the raw key was specified by Linux key ID, but no key - exists with that ID +- ``EKEYREJECTED``: the key was specified by Linux key ID, but the key + has the wrong type +- ``ENOKEY``: the key was specified by Linux key ID, but no key exists + with that ID - ``ENOTTY``: this type of filesystem does not implement encryption - ``EOPNOTSUPP``: the kernel was not configured with encryption support for this filesystem, or the filesystem superblock has not - had encryption enabled on it + had encryption enabled on it; or a hardware wrapped key was specified + but the filesystem does not support inline encryption or the hardware + does not support hardware-wrapped keys Legacy method ~~~~~~~~~~~~~ @@ -994,9 +1036,8 @@ or removed by non-root users. These ioctls don't work on keys that were added via the legacy process-subscribed keyrings mechanism. -Before using these ioctls, read the `Kernel memory compromise`_ -section for a discussion of the security goals and limitations of -these ioctls. +Before using these ioctls, read the `Online attacks`_ section for a +discussion of the security goals and limitations of these ioctls. FS_IOC_REMOVE_ENCRYPTION_KEY ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -1316,7 +1357,8 @@ inline encryption hardware doesn't have the needed crypto capabilities (e.g. support for the needed encryption algorithm and data unit size) and where blk-crypto-fallback is unusable. (For blk-crypto-fallback to be usable, it must be enabled in the kernel configuration with -CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK=y.) +CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK=y, and the file must be +protected by a raw key rather than a hardware-wrapped key.) Currently fscrypt always uses the filesystem block size (which is usually 4096 bytes) as the data unit size. Therefore, it can only use @@ -1324,7 +1366,76 @@ inline encryption hardware that supports that data unit size. Inline encryption doesn't affect the ciphertext or other aspects of the on-disk format, so users may freely switch back and forth between -using "inlinecrypt" and not using "inlinecrypt". +using "inlinecrypt" and not using "inlinecrypt". An exception is that +files that are protected by a hardware-wrapped key can only be +encrypted/decrypted by the inline encryption hardware and therefore +can only be accessed when the "inlinecrypt" mount option is used. For +more information about hardware-wrapped keys, see below. + +Hardware-wrapped keys +--------------------- + +fscrypt supports using *hardware-wrapped keys* when the inline +encryption hardware supports it. Such keys are only present in kernel +memory in wrapped (encrypted) form; they can only be unwrapped +(decrypted) by the inline encryption hardware and are temporally bound +to the current boot. This prevents the keys from being compromised if +kernel memory is leaked. This is done without limiting the number of +keys that can be used and while still allowing the execution of +cryptographic tasks that are tied to the same key but can't use inline +encryption hardware, e.g. filenames encryption. + +Note that hardware-wrapped keys aren't specific to fscrypt; they are a +block layer feature (part of *blk-crypto*). For more details about +hardware-wrapped keys, see the block layer documentation at +:ref:`Documentation/block/inline-encryption.rst +`. The rest of this section just focuses on +the details of how fscrypt can use hardware-wrapped keys. + +fscrypt supports hardware-wrapped keys by allowing the fscrypt master +keys to be hardware-wrapped keys as an alternative to raw keys. To +add a hardware-wrapped key with `FS_IOC_ADD_ENCRYPTION_KEY`_, +userspace must specify FSCRYPT_ADD_KEY_FLAG_HW_WRAPPED in the +``flags`` field of struct fscrypt_add_key_arg and also in the +``flags`` field of struct fscrypt_provisioning_key_payload when +applicable. The key must be in ephemerally-wrapped form, not +long-term wrapped form. + +Some limitations apply. First, files protected by a hardware-wrapped +key are tied to the system's inline encryption hardware. Therefore +they can only be accessed when the "inlinecrypt" mount option is used, +and they can't be included in portable filesystem images. Second, +currently the hardware-wrapped key support is only compatible with +`IV_INO_LBLK_64 policies`_ and `IV_INO_LBLK_32 policies`_, as it +assumes that there is just one file contents encryption key per +fscrypt master key rather than one per file. Future work may address +this limitation by passing per-file nonces down the storage stack to +allow the hardware to derive per-file keys. + +Implementation-wise, to encrypt/decrypt the contents of files that are +protected by a hardware-wrapped key, fscrypt uses blk-crypto, +attaching the hardware-wrapped key to the bio crypt contexts. As is +the case with raw keys, the block layer will program the key into a +keyslot when it isn't already in one. However, when programming a +hardware-wrapped key, the hardware doesn't program the given key +directly into a keyslot but rather unwraps it (using the hardware's +ephemeral wrapping key) and derives the inline encryption key from it. +The inline encryption key is the key that actually gets programmed +into a keyslot, and it is never exposed to software. + +However, fscrypt doesn't just do file contents encryption; it also +uses its master keys to derive filenames encryption keys, key +identifiers, and sometimes some more obscure types of subkeys such as +dirhash keys. So even with file contents encryption out of the +picture, fscrypt still needs a raw key to work with. To get such a +key from a hardware-wrapped key, fscrypt asks the inline encryption +hardware to derive a cryptographically isolated "software secret" from +the hardware-wrapped key. fscrypt uses this "software secret" to key +its KDF to derive all subkeys other than file contents keys. + +Note that this implies that the hardware-wrapped key feature only +protects the file contents encryption keys. It doesn't protect other +fscrypt subkeys such as filenames encryption keys. Direct I/O support ================== -- cgit v1.2.3 From 16280ded45fba1216d1d4c6acfc20c2d5b45ef50 Mon Sep 17 00:00:00 2001 From: Riana Tauro Date: Mon, 7 Apr 2025 10:44:11 +0530 Subject: drm/xe: Add configfs to enable survivability mode Registers a configfs subsystem called 'xe' that creates a directory in the mounted configfs directory (/sys/kernel/config) Userspace can then create the device that has to be configured under the xe directory mkdir /sys/kernel/config/xe/0000:03:00.0 The device created will have the following attributes to be configured /sys/kernel/config/xe/ .. 0000:03:00.0/ ... survivability_mode v2: fix kernel-doc fix return value (Lucas) v3: fix kernel-doc (Lucas) Signed-off-by: Riana Tauro Reviewed-by: Lucas De Marchi Link: https://lore.kernel.org/r/20250407051414.1651616-2-riana.tauro@intel.com Signed-off-by: Lucas De Marchi --- Documentation/gpu/xe/index.rst | 1 + Documentation/gpu/xe/xe_configfs.rst | 10 ++++++++++ 2 files changed, 11 insertions(+) create mode 100644 Documentation/gpu/xe/xe_configfs.rst (limited to 'Documentation') diff --git a/Documentation/gpu/xe/index.rst b/Documentation/gpu/xe/index.rst index 92cfb25e64d3..b2369561f24e 100644 --- a/Documentation/gpu/xe/index.rst +++ b/Documentation/gpu/xe/index.rst @@ -25,3 +25,4 @@ DG2, etc is provided to prototype the driver. xe_debugging xe_devcoredump xe-drm-usage-stats.rst + xe_configfs diff --git a/Documentation/gpu/xe/xe_configfs.rst b/Documentation/gpu/xe/xe_configfs.rst new file mode 100644 index 000000000000..9b9d941eb20e --- /dev/null +++ b/Documentation/gpu/xe/xe_configfs.rst @@ -0,0 +1,10 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +.. _xe_configfs: + +============ +Xe Configfs +============ + +.. kernel-doc:: drivers/gpu/drm/xe/xe_configfs.c + :doc: Xe Configfs -- cgit v1.2.3 From 77052ab24590cb72598e31de4a7c29f99d51d201 Mon Sep 17 00:00:00 2001 From: Riana Tauro Date: Mon, 7 Apr 2025 10:44:12 +0530 Subject: drm/xe: Add documentation for survivability mode Add survivability mode document to pcode document as it is enabled when pcode detects a failure. v2: fix kernel-doc (Lucas) Signed-off-by: Riana Tauro Reviewed-by: Lucas De Marchi Link: https://lore.kernel.org/r/20250407051414.1651616-3-riana.tauro@intel.com Signed-off-by: Lucas De Marchi --- Documentation/gpu/xe/xe_pcode.rst | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/gpu/xe/xe_pcode.rst b/Documentation/gpu/xe/xe_pcode.rst index d2e22cc45061..5937ef3599b0 100644 --- a/Documentation/gpu/xe/xe_pcode.rst +++ b/Documentation/gpu/xe/xe_pcode.rst @@ -12,3 +12,10 @@ Internal API .. kernel-doc:: drivers/gpu/drm/xe/xe_pcode.c :internal: + +================== +Boot Survivability +================== + +.. kernel-doc:: drivers/gpu/drm/xe/xe_survivability_mode.c + :doc: Xe Boot Survivability -- cgit v1.2.3 From 5bfc88c4e5783357399ce66f40a479a090af2ba0 Mon Sep 17 00:00:00 2001 From: Alexis Czezar Torreno Date: Wed, 9 Apr 2025 09:34:28 +0800 Subject: regulator: dt-bindings: adi,adp5055-regulator: Add adp5055 support Add documentation for devicetree bindings for ADP5055. The device consists of 3 buck regulators able to connect to high input voltages of up to 18V with no preregulators. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Alexis Czezar Torreno Link: https://patch.msgid.link/20250409-upstream-adp5055-v6-1-faa6e810deb1@analog.com Signed-off-by: Mark Brown --- .../bindings/regulator/adi,adp5055-regulator.yaml | 157 +++++++++++++++++++++ 1 file changed, 157 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/adi,adp5055-regulator.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/regulator/adi,adp5055-regulator.yaml b/Documentation/devicetree/bindings/regulator/adi,adp5055-regulator.yaml new file mode 100644 index 000000000000..9c4ead4c9fd1 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/adi,adp5055-regulator.yaml @@ -0,0 +1,157 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/adi,adp5055-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADP5055 Triple Buck Regulator + +maintainers: + - Alexis Czezar Torreno + +description: | + The ADP5055 combines three high performance buck regulator. The device enables + direct connection to high input voltages up to 18 V with no preregulators. + https://www.analog.com/media/en/technical-documentation/data-sheets/adp5055.pdf + +properties: + compatible: + enum: + - adi,adp5055 + + reg: + enum: + - 0x70 + - 0x71 + + adi,tset-us: + description: + Setting time used by the device. This is changed via soldering specific + resistor values on the CFG2 pin. + enum: [2600, 20800] + default: 2600 + + adi,ocp-blanking: + description: + If present, overcurrent protection (OCP) blanking for all regulator is on. + type: boolean + + adi,delay-power-good: + description: + Configures delay timer of the power good (PWRGD) pin. Delay is based on + Tset which can be 2.6 ms or 20.8 ms. + type: boolean + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +patternProperties: + '^buck[0-2]$': + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + + properties: + enable-gpios: + maxItems: 1 + description: + GPIO specifier to enable the GPIO control for each regulator. The + driver supports two modes of enable, hardware only (GPIOs) or software + only (Registers). Pure hardware enabling requires each regulator to + contain this property. If at least one regulator does not have this, + the driver automatically switches to software only mode. + + adi,dvs-limit-upper-microvolt: + description: + Configure the allowable upper side limit of the voltage output of each + regulator in microvolt. Relative to the default Vref trimming value. + Vref = 600 mV. Voltages are in 12 mV steps, value is autoadjusted. + Vout_high = Vref_trim + dvs-limit-upper. + minimum: 12000 + maximum: 192000 + default: 192000 + + adi,dvs-limit-lower-microvolt: + description: + Configure the allowable lower side limit of the voltage output of each + regulator in microvolt. Relative to the default Vref trimming value. + Vref = 600 mV. Voltages are in 12 mV steps, value is autoadjusted. + Vout_low = Vref_trim + dvs-limit-lower. + minimum: -190500 + maximum: -10500 + default: -190500 + + adi,fast-transient: + description: + Configures the fast transient sensitivity for each regulator. + "none" - No fast transient. + "3G_1.5%" - 1.5% window with 3*350uA/V + "5G_1.5%" - 1.5% window with 5*350uA/V + "5G_2.5%" - 2.5% window with 5*350uA/V + enum: [none, 3G_1.5%, 5G_1.5%, 5G_2.5%] + default: 5G_2.5% + + adi,mask-power-good: + description: + If present, masks individual regulators PWRGD signal to the external + PWRGD hardware pin. + type: boolean + + required: + - regulator-name + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + regulator@70 { + compatible = "adi,adp5055"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + adi,tset-us = <2600>; + adi,ocp-blanking; + adi,delay-power-good; + + buck0 { + regulator-name = "buck0"; + enable-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; + adi,dvs-limit-upper-microvolt = <192000>; + adi,dvs-limit-lower-microvolt = <(-190500)>; + adi,fast-transient = "5G_2.5%"; + adi,mask-power-good; + }; + + buck1 { + regulator-name = "buck1"; + enable-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>; + adi,dvs-limit-upper-microvolt = <192000>; + adi,dvs-limit-lower-microvolt = <(-190500)>; + adi,fast-transient = "5G_2.5%"; + adi,mask-power-good; + }; + + buck2 { + regulator-name = "buck2"; + enable-gpios = <&gpio 19 GPIO_ACTIVE_HIGH>; + adi,dvs-limit-upper-microvolt = <192000>; + adi,dvs-limit-lower-microvolt = <(-190500)>; + adi,fast-transient = "5G_2.5%"; + adi,mask-power-good; + }; + }; + }; -- cgit v1.2.3 From 6db0261f3776bde01ae916ad8e1cb2ded3ba1a2b Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Wed, 9 Apr 2025 11:47:38 +0300 Subject: Documentation: ACPI: Use all-string data node references Document that references to data nodes shall use string-only references instead of a device reference and a succession of the first package entries of hierarchical data node references. Fixes: 9880702d123f ("ACPI: property: Support using strings in reference properties") Cc: 6.8+ # 6.8+ Signed-off-by: Sakari Ailus Link: https://patch.msgid.link/20250409084738.3657079-1-sakari.ailus@linux.intel.com [ rjw: Clarifying edits ] Signed-off-by: Rafael J. Wysocki --- .../acpi/dsd/data-node-references.rst | 26 ++++++++++------------ Documentation/firmware-guide/acpi/dsd/graph.rst | 11 ++++----- Documentation/firmware-guide/acpi/dsd/leds.rst | 7 +----- 3 files changed, 17 insertions(+), 27 deletions(-) (limited to 'Documentation') diff --git a/Documentation/firmware-guide/acpi/dsd/data-node-references.rst b/Documentation/firmware-guide/acpi/dsd/data-node-references.rst index 8d8b53e96bcf..ccb4b153e6f2 100644 --- a/Documentation/firmware-guide/acpi/dsd/data-node-references.rst +++ b/Documentation/firmware-guide/acpi/dsd/data-node-references.rst @@ -12,11 +12,14 @@ ACPI in general allows referring to device objects in the tree only. Hierarchical data extension nodes may not be referred to directly, hence this document defines a scheme to implement such references. -A reference consist of the device object name followed by one or more -hierarchical data extension [dsd-guide] keys. Specifically, the hierarchical -data extension node which is referred to by the key shall lie directly under -the parent object i.e. either the device object or another hierarchical data -extension node. +A reference to a _DSD hierarchical data node is a string consisting of a +device object reference followed by a dot (".") and a relative path to a data +node object. Do not use non-string references as this will produce a copy of +the hierarchical data node, not a reference! + +The hierarchical data extension node which is referred to shall be located +directly under its parent object i.e. either the device object or another +hierarchical data extension node [dsd-guide]. The keys in the hierarchical data nodes shall consist of the name of the node, "@" character and the number of the node in hexadecimal notation (without pre- @@ -33,11 +36,9 @@ extension key. Example ======= -In the ASL snippet below, the "reference" _DSD property contains a -device object reference to DEV0 and under that device object, a -hierarchical data extension key "node@1" referring to the NOD1 object -and lastly, a hierarchical data extension key "anothernode" referring to -the ANOD object which is also the final target node of the reference. +In the ASL snippet below, the "reference" _DSD property contains a string +reference to a hierarchical data extension node ANOD under DEV0 under the parent +of DEV1. ANOD is also the final target node of the reference. :: Device (DEV0) @@ -76,10 +77,7 @@ the ANOD object which is also the final target node of the reference. Name (_DSD, Package () { ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { - Package () { - "reference", Package () { - ^DEV0, "node@1", "anothernode" - } + Package () { "reference", "^DEV0.ANOD" } }, } }) diff --git a/Documentation/firmware-guide/acpi/dsd/graph.rst b/Documentation/firmware-guide/acpi/dsd/graph.rst index b9dbfc73ed25..d6ae5ffa748c 100644 --- a/Documentation/firmware-guide/acpi/dsd/graph.rst +++ b/Documentation/firmware-guide/acpi/dsd/graph.rst @@ -66,12 +66,9 @@ of that port shall be zero. Similarly, if a port may only have a single endpoint, the number of that endpoint shall be zero. The endpoint reference uses property extension with "remote-endpoint" property -name followed by a reference in the same package. Such references consist of -the remote device reference, the first package entry of the port data extension -reference under the device and finally the first package entry of the endpoint -data extension reference under the port. Individual references thus appear as:: +name followed by a string reference in the same package. [data-node-ref]:: - Package() { device, "port@X", "endpoint@Y" } + "device.datanode" In the above example, "X" is the number of the port and "Y" is the number of the endpoint. @@ -109,7 +106,7 @@ A simple example of this is show below:: ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "reg", 0 }, - Package () { "remote-endpoint", Package() { \_SB.PCI0.ISP, "port@4", "endpoint@0" } }, + Package () { "remote-endpoint", "\\_SB.PCI0.ISP.EP40" }, } }) } @@ -141,7 +138,7 @@ A simple example of this is show below:: ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "reg", 0 }, - Package () { "remote-endpoint", Package () { \_SB.PCI0.I2C2.CAM0, "port@0", "endpoint@0" } }, + Package () { "remote-endpoint", "\\_SB.PCI0.I2C2.CAM0.EP00" }, } }) } diff --git a/Documentation/firmware-guide/acpi/dsd/leds.rst b/Documentation/firmware-guide/acpi/dsd/leds.rst index 93db592c93c7..a97cd07d49be 100644 --- a/Documentation/firmware-guide/acpi/dsd/leds.rst +++ b/Documentation/firmware-guide/acpi/dsd/leds.rst @@ -15,11 +15,6 @@ Referring to LEDs in Device tree is documented in [video-interfaces], in "flash-leds" property documentation. In short, LEDs are directly referred to by using phandles. -While Device tree allows referring to any node in the tree [devicetree], in -ACPI references are limited to device nodes only [acpi]. For this reason using -the same mechanism on ACPI is not possible. A mechanism to refer to non-device -ACPI nodes is documented in [data-node-ref]. - ACPI allows (as does DT) using integer arguments after the reference. A combination of the LED driver device reference and an integer argument, referring to the "reg" property of the relevant LED, is used to identify @@ -74,7 +69,7 @@ omitted. :: Package () { Package () { "flash-leds", - Package () { ^LED, "led@0", ^LED, "led@1" }, + Package () { "^LED.LED0", "^LED.LED1" }, } } }) -- cgit v1.2.3 From 10f94d092bba9ab08004c624c604e976e6e3cd22 Mon Sep 17 00:00:00 2001 From: Koichiro Den Date: Mon, 7 Apr 2025 13:30:18 +0900 Subject: Documentation: gpio: document configfs interface for gpio-aggregator Add documentation for the newly added configfs-based interface for GPIO aggregator. Signed-off-by: Koichiro Den Link: https://lore.kernel.org/r/20250407043019.4105613-9-koichiro.den@canonical.com Signed-off-by: Bartosz Golaszewski --- Documentation/admin-guide/gpio/gpio-aggregator.rst | 107 +++++++++++++++++++++ 1 file changed, 107 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/gpio/gpio-aggregator.rst b/Documentation/admin-guide/gpio/gpio-aggregator.rst index 5cd1e7221756..8374a9df9105 100644 --- a/Documentation/admin-guide/gpio/gpio-aggregator.rst +++ b/Documentation/admin-guide/gpio/gpio-aggregator.rst @@ -69,6 +69,113 @@ write-only attribute files in sysfs. $ echo gpio-aggregator.0 > delete_device +Aggregating GPIOs using Configfs +-------------------------------- + +**Group:** ``/config/gpio-aggregator`` + + This is the root directory of the gpio-aggregator configfs tree. + +**Group:** ``/config/gpio-aggregator/`` + + This directory represents a GPIO aggregator device. You can assign any + name to ```` (e.g. ``agg0``), except names starting with + ``_sysfs`` prefix, which are reserved for auto-generated configfs + entries corresponding to devices created via Sysfs. + +**Attribute:** ``/config/gpio-aggregator//live`` + + The ``live`` attribute allows to trigger the actual creation of the device + once it's fully configured. Accepted values are: + + * ``1``, ``yes``, ``true`` : enable the virtual device + * ``0``, ``no``, ``false`` : disable the virtual device + +**Attribute:** ``/config/gpio-aggregator//dev_name`` + + The read-only ``dev_name`` attribute exposes the name of the device as it + will appear in the system on the platform bus (e.g. ``gpio-aggregator.0``). + This is useful for identifying a character device for the newly created + aggregator. If it's ``gpio-aggregator.0``, + ``/sys/devices/platform/gpio-aggregator.0/gpiochipX`` path tells you that the + GPIO device id is ``X``. + +You must create subdirectories for each virtual line you want to +instantiate, named exactly as ``line0``, ``line1``, ..., ``lineY``, when +you want to instantiate ``Y+1`` (Y >= 0) lines. Configure all lines before +activating the device by setting ``live`` to 1. + +**Group:** ``/config/gpio-aggregator///`` + + This directory represents a GPIO line to include in the aggregator. + +**Attribute:** ``/config/gpio-aggregator///key`` + +**Attribute:** ``/config/gpio-aggregator///offset`` + + The default values after creating the ```` directory are: + + * ``key`` : + * ``offset`` : -1 + + ``key`` must always be explicitly configured, while ``offset`` depends. + Two configuration patterns exist for each ````: + + (a). For lookup by GPIO line name: + + * Set ``key`` to the line name. + * Ensure ``offset`` remains -1 (the default). + + (b). For lookup by GPIO chip name and the line offset within the chip: + + * Set ``key`` to the chip name. + * Set ``offset`` to the line offset (0 <= ``offset`` < 65535). + +**Attribute:** ``/config/gpio-aggregator///name`` + + The ``name`` attribute sets a custom name for lineY. If left unset, the + line will remain unnamed. + +Once the configuration is done, the ``'live'`` attribute must be set to 1 +in order to instantiate the aggregator device. It can be set back to 0 to +destroy the virtual device. The module will synchronously wait for the new +aggregator device to be successfully probed and if this doesn't happen, writing +to ``'live'`` will result in an error. This is a different behaviour from the +case when you create it using sysfs ``new_device`` interface. + +.. note:: + + For aggregators created via Sysfs, the configfs entries are + auto-generated and appear as ``/config/gpio-aggregator/_sysfs./``. You + cannot add or remove line directories with mkdir(2)/rmdir(2). To modify + lines, you must use the "delete_device" interface to tear down the + existing device and reconfigure it from scratch. However, you can still + toggle the aggregator with the ``live`` attribute and adjust the + ``key``, ``offset``, and ``name`` attributes for each line when ``live`` + is set to 0 by hand (i.e. it's not waiting for deferred probe). + +Sample configuration commands +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +.. code-block:: sh + + # Create a directory for an aggregator device + $ mkdir /sys/kernel/config/gpio-aggregator/agg0 + + # Configure each line + $ mkdir /sys/kernel/config/gpio-aggregator/agg0/line0 + $ echo gpiochip0 > /sys/kernel/config/gpio-aggregator/agg0/line0/key + $ echo 6 > /sys/kernel/config/gpio-aggregator/agg0/line0/offset + $ echo test0 > /sys/kernel/config/gpio-aggregator/agg0/line0/name + $ mkdir /sys/kernel/config/gpio-aggregator/agg0/line1 + $ echo gpiochip0 > /sys/kernel/config/gpio-aggregator/agg0/line1/key + $ echo 7 > /sys/kernel/config/gpio-aggregator/agg0/line1/offset + $ echo test1 > /sys/kernel/config/gpio-aggregator/agg0/line1/name + + # Activate the aggregator device + $ echo 1 > /sys/kernel/config/gpio-aggregator/agg0/live + + Generic GPIO Driver ------------------- -- cgit v1.2.3 From 668b9d1dceb86b570ff28d913e8464ba62f57e91 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 8 Apr 2025 18:09:22 +0800 Subject: docs: sphinx: kerneldoc: verbose kernel-doc command if V=1 It is useful to know what kernel-doc command was used during document build time, as it allows one to check the output the same way as Sphinx extension does. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/a2f01590814b111e138f278e8a721024fdf2d445.1744106242.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kerneldoc.py | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) (limited to 'Documentation') diff --git a/Documentation/sphinx/kerneldoc.py b/Documentation/sphinx/kerneldoc.py index 39ddae6ae7dd..d206eb2be10a 100644 --- a/Documentation/sphinx/kerneldoc.py +++ b/Documentation/sphinx/kerneldoc.py @@ -43,6 +43,29 @@ from sphinx.util import logging __version__ = '1.0' +def cmd_str(cmd): + """ + Helper function to output a command line that can be used to produce + the same records via command line. Helpful to debug troubles at the + script. + """ + + cmd_line = "" + + for w in cmd: + if w == "" or " " in w: + esc_cmd = "'" + w + "'" + else: + esc_cmd = w + + if cmd_line: + cmd_line += " " + esc_cmd + continue + else: + cmd_line = esc_cmd + + return cmd_line + class KernelDocDirective(Directive): """Extract kernel-doc comments from the specified file""" required_argument = 1 @@ -57,6 +80,7 @@ class KernelDocDirective(Directive): } has_content = False logger = logging.getLogger('kerneldoc') + verbose = 0 def run(self): env = self.state.document.settings.env @@ -65,6 +89,13 @@ class KernelDocDirective(Directive): filename = env.config.kerneldoc_srctree + '/' + self.arguments[0] export_file_patterns = [] + verbose = os.environ.get("V") + if verbose: + try: + self.verbose = int(verbose) + except ValueError: + pass + # Tell sphinx of the dependency env.note_dependency(os.path.abspath(filename)) @@ -104,6 +135,9 @@ class KernelDocDirective(Directive): cmd += [filename] + if self.verbose >= 1: + print(cmd_str(cmd)) + try: self.logger.verbose("calling kernel-doc '%s'" % (" ".join(cmd))) -- cgit v1.2.3 From 01c43355255e1f0bba8677fc66facc0047a23242 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 8 Apr 2025 18:09:23 +0800 Subject: docs: sphinx: kerneldoc: ignore "\" characters from options Documentation/driver-api/infiniband.rst has a kernel-doc tag with "\" characters at the end: .. kernel-doc:: drivers/infiniband/ulp/iser/iscsi_iser.c :functions: iscsi_iser_pdu_alloc iser_initialize_task_headers \ iscsi_iser_task_init iscsi_iser_mtask_xmit iscsi_iser_task_xmit \ iscsi_iser_cleanup_task iscsi_iser_check_protection \ iscsi_iser_conn_create iscsi_iser_conn_bind \ iscsi_iser_conn_start iscsi_iser_conn_stop \ iscsi_iser_session_destroy iscsi_iser_session_create \ iscsi_iser_set_param iscsi_iser_ep_connect iscsi_iser_ep_poll \ iscsi_iser_ep_disconnect This is not handled well, as the "\" strings will be just stored inside Sphinx options. While the actual problem deserves being fixed, better to relax the keneldoc.py extension to silently strip "\" from the end of strings, as otherwise this may cause troubles when preparing arguments to be executed by kernel-doc. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/4c652d6c57b20500c135b95294e554d9e9a97f42.1744106242.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kerneldoc.py | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'Documentation') diff --git a/Documentation/sphinx/kerneldoc.py b/Documentation/sphinx/kerneldoc.py index d206eb2be10a..344789ed9ea2 100644 --- a/Documentation/sphinx/kerneldoc.py +++ b/Documentation/sphinx/kerneldoc.py @@ -118,6 +118,10 @@ class KernelDocDirective(Directive): identifiers = self.options.get('identifiers').split() if identifiers: for i in identifiers: + i = i.rstrip("\\").strip() + if not i: + continue + cmd += ['-function', i] else: cmd += ['-no-doc-sections'] @@ -126,9 +130,17 @@ class KernelDocDirective(Directive): no_identifiers = self.options.get('no-identifiers').split() if no_identifiers: for i in no_identifiers: + i = i.rstrip("\\").strip() + if not i: + continue + cmd += ['-nosymbol', i] for pattern in export_file_patterns: + pattern = pattern.rstrip("\\").strip() + if not pattern: + continue + for f in glob.glob(env.config.kerneldoc_srctree + '/' + pattern): env.note_dependency(os.path.abspath(f)) cmd += ['-export-file', f] -- cgit v1.2.3 From feec610725e38e96dca0f77f1fc388f59ffa616b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 8 Apr 2025 18:09:24 +0800 Subject: docs: sphinx: kerneldoc: use kernel-doc.py script Switch to the new version when producing documentation. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/a81d8db099d9cef5161deaef40ac9056bf9802a3.1744106242.git.mchehab+huawei@kernel.org --- Documentation/Makefile | 2 +- Documentation/conf.py | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/Makefile b/Documentation/Makefile index 63094646df28..c022b97c487e 100644 --- a/Documentation/Makefile +++ b/Documentation/Makefile @@ -60,7 +60,7 @@ endif #HAVE_LATEXMK # Internal variables. PAPEROPT_a4 = -D latex_paper_size=a4 PAPEROPT_letter = -D latex_paper_size=letter -KERNELDOC = $(srctree)/scripts/kernel-doc +KERNELDOC = $(srctree)/scripts/kernel-doc.py KERNELDOC_CONF = -D kerneldoc_srctree=$(srctree) -D kerneldoc_bin=$(KERNELDOC) ALLSPHINXOPTS = $(KERNELDOC_CONF) $(PAPEROPT_$(PAPER)) $(SPHINXOPTS) ifneq ($(wildcard $(srctree)/.config),) diff --git a/Documentation/conf.py b/Documentation/conf.py index 3dad1f90b098..b126f6760b5f 100644 --- a/Documentation/conf.py +++ b/Documentation/conf.py @@ -540,7 +540,7 @@ pdf_documents = [ # kernel-doc extension configuration for running Sphinx directly (e.g. by Read # the Docs). In a normal build, these are supplied from the Makefile via command # line arguments. -kerneldoc_bin = '../scripts/kernel-doc' +kerneldoc_bin = '../scripts/kernel-doc.py' kerneldoc_srctree = '..' # ------------------------------------------------------------------------------ -- cgit v1.2.3 From 855c634930f04c21434fae9c41a7a7372b6ac879 Mon Sep 17 00:00:00 2001 From: Philipp Stanner Date: Thu, 27 Mar 2025 12:07:08 +0100 Subject: PCI: Remove pcim_iounmap_regions() All users of the deprecated function pcim_iounmap_regions() have been ported by now. Remove it. Signed-off-by: Philipp Stanner Signed-off-by: Bjorn Helgaas Reviewed-by: Zijun Hu Reviewed-by: Andy Shevchenko Link: https://patch.msgid.link/20250327110707.20025-4-phasta@kernel.org --- Documentation/driver-api/driver-model/devres.rst | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/driver-model/devres.rst b/Documentation/driver-api/driver-model/devres.rst index d75728eb05f8..601f1a74d34d 100644 --- a/Documentation/driver-api/driver-model/devres.rst +++ b/Documentation/driver-api/driver-model/devres.rst @@ -396,7 +396,6 @@ PCI pcim_iomap_regions() : do request_region() and iomap() on multiple BARs pcim_iomap_table() : array of mapped addresses indexed by BAR pcim_iounmap() : do iounmap() on a single BAR - pcim_iounmap_regions() : do iounmap() and release_region() on multiple BARs pcim_pin_device() : keep PCI device enabled after release pcim_set_mwi() : enable Memory-Write-Invalidate PCI transaction -- cgit v1.2.3 From 03df156dd3a6d5992f17682cd5c3b11e5ffdae02 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 8 Apr 2025 12:59:52 -0700 Subject: xdp: double protect netdev->xdp_flags with netdev->lock Protect xdp_features with netdev->lock. This way pure readers no longer have to take rtnl_lock to access the field. This includes calling NETDEV_XDP_FEAT_CHANGE under the lock. Looks like that's fine for bonding, the only "real" listener, it's the same as ethtool feature change. In terms of normal drivers - only GVE need special consideration (other drivers don't use instance lock or don't support XDP). It calls xdp_set_features_flag() helper from gve_init_priv() which in turn is called from gve_reset_recovery() (locked), or prior to netdev registration. So switch to _locked. Reviewed-by: Joe Damato Acked-by: Stanislav Fomichev Acked-by: Harshitha Ramamurthy Acked-by: Martin KaFai Lau Link: https://patch.msgid.link/20250408195956.412733-6-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/networking/netdevices.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/networking/netdevices.rst b/Documentation/networking/netdevices.rst index 6c2d8945f597..d6357472d3f1 100644 --- a/Documentation/networking/netdevices.rst +++ b/Documentation/networking/netdevices.rst @@ -354,6 +354,7 @@ For devices with locked ops, currently only the following notifiers are running under the lock: * ``NETDEV_REGISTER`` * ``NETDEV_UP`` +* ``NETDEV_XDP_FEAT_CHANGE`` The following notifiers are running without the lock: * ``NETDEV_UNREGISTER`` -- cgit v1.2.3 From 87eba404f2e1785d410b51a31ff030932194e1c6 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 8 Apr 2025 12:59:54 -0700 Subject: docs: netdev: break down the instance locking info per ops struct Explicitly list all the ops structs and what locking they provide. Use "ops locked" as a term for drivers which have ops called under the instance lock. Acked-by: Stanislav Fomichev Reviewed-by: Joe Damato Link: https://patch.msgid.link/20250408195956.412733-8-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/networking/netdevices.rst | 54 +++++++++++++++++++++++++-------- 1 file changed, 42 insertions(+), 12 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/netdevices.rst b/Documentation/networking/netdevices.rst index d6357472d3f1..7ae28c5fb835 100644 --- a/Documentation/networking/netdevices.rst +++ b/Documentation/networking/netdevices.rst @@ -314,13 +314,8 @@ napi->poll: softirq will be called with interrupts disabled by netconsole. -struct netdev_queue_mgmt_ops synchronization rules -================================================== - -All queue management ndo callbacks are holding netdev instance lock. - -RTNL and netdev instance lock -============================= +netdev instance lock +==================== Historically, all networking control operations were protected by a single global lock known as ``rtnl_lock``. There is an ongoing effort to replace this @@ -328,10 +323,13 @@ global lock with separate locks for each network namespace. Additionally, properties of individual netdev are increasingly protected by per-netdev locks. For device drivers that implement shaping or queue management APIs, all control -operations will be performed under the netdev instance lock. Currently, this -instance lock is acquired within the context of ``rtnl_lock``. The drivers -can also explicitly request instance lock to be acquired via -``request_ops_lock``. In the future, there will be an option for individual +operations will be performed under the netdev instance lock. +Drivers can also explicitly request instance lock to be held during ops +by setting ``request_ops_lock`` to true. Code comments and docs refer +to drivers which have ops called under the instance lock as "ops locked". +See also the documentation of the ``lock`` member of struct net_device. + +In the future, there will be an option for individual drivers to opt out of using ``rtnl_lock`` and instead perform their control operations directly under the netdev instance lock. @@ -343,8 +341,40 @@ there are two sets of interfaces: ``dev_xxx`` and ``netif_xxx`` (e.g., acquiring the instance lock themselves, while the ``netif_xxx`` functions assume that the driver has already acquired the instance lock. +struct net_device_ops +--------------------- + +``ndos`` are called without holding the instance lock for most drivers. + +"Ops locked" drivers will have most of the ``ndos`` invoked under +the instance lock. + +struct ethtool_ops +------------------ + +Similarly to ``ndos`` the instance lock is only held for select drivers. +For "ops locked" drivers all ethtool ops without exceptions should +be called under the instance lock. + +struct net_shaper_ops +--------------------- + +All net shaper callbacks are invoked while holding the netdev instance +lock. ``rtnl_lock`` may or may not be held. + +Note that supporting net shapers automatically enables "ops locking". + +struct netdev_queue_mgmt_ops +---------------------------- + +All queue management callbacks are invoked while holding the netdev instance +lock. ``rtnl_lock`` may or may not be held. + +Note that supporting struct netdev_queue_mgmt_ops automatically enables +"ops locking". + Notifiers and netdev instance lock -================================== +---------------------------------- For device drivers that implement shaping or queue management APIs, some of the notifiers (``enum netdev_cmd``) are running under the netdev -- cgit v1.2.3 From ce7b14947484e6190372f2c3dbfb69aafbc4c0fc Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 8 Apr 2025 12:59:55 -0700 Subject: netdev: depend on netdev->lock for qstats in ops locked drivers We mostly needed rtnl_lock in qstat to make sure the queue count is stable while we work. For "ops locked" drivers the instance lock protects the queue count, so we don't have to take rtnl_lock. For currently ops-locked drivers: netdevsim and bnxt need the protection from netdev going down while we dump, which instance lock provides. gve doesn't care. Reviewed-by: Joe Damato Acked-by: Stanislav Fomichev Link: https://patch.msgid.link/20250408195956.412733-9-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/networking/netdevices.rst | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/netdevices.rst b/Documentation/networking/netdevices.rst index 7ae28c5fb835..0ccc7dcf4390 100644 --- a/Documentation/networking/netdevices.rst +++ b/Documentation/networking/netdevices.rst @@ -356,6 +356,12 @@ Similarly to ``ndos`` the instance lock is only held for select drivers. For "ops locked" drivers all ethtool ops without exceptions should be called under the instance lock. +struct netdev_stat_ops +---------------------- + +"qstat" ops are invoked under the instance lock for "ops locked" drivers, +and under rtnl_lock for all other drivers. + struct net_shaper_ops --------------------- -- cgit v1.2.3 From 935e5bd95df2c79404630a691caf42c3d7bc3a93 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andr=C3=A9=20Draszik?= Date: Wed, 9 Apr 2025 21:37:24 +0100 Subject: dt-bindings: firmware: google,gs101-acpm-ipc: add PMIC child node MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The PMIC is supposed to be a child of ACPM, add it here to describe the connection. Reviewed-by: Krzysztof Kozlowski Signed-off-by: André Draszik Link: https://lore.kernel.org/r/20250409-s2mpg10-v4-3-d66d5f39b6bf@linaro.org Signed-off-by: Krzysztof Kozlowski --- .../bindings/firmware/google,gs101-acpm-ipc.yaml | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml b/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml index 2cdad1bbae73..9785aac3b5f3 100644 --- a/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml +++ b/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml @@ -27,6 +27,15 @@ properties: mboxes: maxItems: 1 + pmic: + description: Child node describing the main PMIC. + type: object + additionalProperties: true + + properties: + compatible: + const: samsung,s2mpg10-pmic + shmem: description: List of phandle pointing to the shared memory (SHM) area. The memory @@ -43,8 +52,34 @@ additionalProperties: false examples: - | + #include + power-management { compatible = "google,gs101-acpm-ipc"; mboxes = <&ap2apm_mailbox>; shmem = <&apm_sram>; + + pmic { + compatible = "samsung,s2mpg10-pmic"; + interrupts-extended = <&gpa0 6 IRQ_TYPE_LEVEL_LOW>; + + regulators { + LDO1 { + regulator-name = "vdd_ldo1"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + }; + + // ... + + BUCK1 { + regulator-name = "vdd_mif"; + regulator-min-microvolt = <450000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; }; -- cgit v1.2.3 From 19f72d95ae31586a49225023ee903edd242ce4fc Mon Sep 17 00:00:00 2001 From: Wang Yaxin Date: Wed, 19 Mar 2025 15:51:10 +0800 Subject: Docs/zh_CN: Translate index.rst to Simplified Chinese translate the "index.rst" into Simplified Chinese. Update to commit e793b86ae44e("Documentation: networking: add Twisted Pair Ethernet diagnostics at OSI Layer 1") Signed-off-by: Wang Yaxin Signed-off-by: Jiang Kun Signed-off-by: xu xin Signed-off-by: He Peilin Link: https://lore.kernel.org/r/20250319155110884FL0FcZmsjNzP1NnAC70Zs@zte.com.cn Signed-off-by: Alex Shi --- .../translations/zh_CN/networking/index.rst | 159 +++++++++++++++++++++ 1 file changed, 159 insertions(+) create mode 100644 Documentation/translations/zh_CN/networking/index.rst (limited to 'Documentation') diff --git a/Documentation/translations/zh_CN/networking/index.rst b/Documentation/translations/zh_CN/networking/index.rst new file mode 100644 index 000000000000..a722fed81910 --- /dev/null +++ b/Documentation/translations/zh_CN/networking/index.rst @@ -0,0 +1,159 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: ../disclaimer-zh_CN.rst + +:Original: Documentation/networking/index.rst + +:翻译: + + 王亚鑫 Wang Yaxin + +:校译: + +网络 +==== + +有关网络设备（netdev）开发过程的详细指南，请参考：:ref:`netdev-FAQ` + +目录： + +.. toctree:: + :maxdepth: 2 + +Todolist: + +* af_xdp +* bareudp +* batman-adv +* can +* can_ucan_protocol +* device_drivers/index +* diagnostic/index +* dsa/index +* devlink/index +* caif/index +* ethtool-netlink +* ieee802154 +* iso15765-2 +* j1939 +* kapi +* msg_zerocopy +* failover +* net_dim +* net_failover +* page_pool +* phy +* sfp-phylink +* alias +* bridge +* snmp_counter +* checksum-offloads +* segmentation-offloads +* scaling +* tls +* tls-offload +* tls-handshake +* nfc +* 6lowpan +* 6pack +* arcnet-hardware +* arcnet +* atm +* ax25 +* bonding +* cdc_mbim +* dccp +* dctcp +* devmem +* dns_resolver +* driver +* eql +* fib_trie +* filter +* generic-hdlc +* generic_netlink +* netlink_spec/index +* gen_stats +* gtp +* ila +* ioam6-sysctl +* ip_dynaddr +* ipsec +* ip-sysctl +* ipv6 +* ipvlan +* ipvs-sysctl +* kcm +* l2tp +* lapb-module +* mac80211-injection +* mctp +* mpls-sysctl +* mptcp +* mptcp-sysctl +* multiqueue +* multi-pf-netdev +* napi +* net_cachelines/index +* netconsole +* netdev-features +* netdevices +* netfilter-sysctl +* netif-msg +* netmem +* nexthop-group-resilient +* nf_conntrack-sysctl +* nf_flowtable +* oa-tc6-framework +* openvswitch +* operstates +* packet_mmap +* phonet +* phy-link-topology +* pktgen +* plip +* ppp_generic +* proc_net_tcp +* pse-pd/index +* radiotap-headers +* rds +* regulatory +* representors +* rxrpc +* sctp +* secid +* seg6-sysctl +* skbuff +* smc-sysctl +* sriov +* statistics +* strparser +* switchdev +* sysfs-tagging +* tc-actions-env-rules +* tc-queue-filters +* tcp_ao +* tcp-thin +* team +* timestamping +* tipc +* tproxy +* tuntap +* udplite +* vrf +* vxlan +* x25 +* x25-iface +* xfrm_device +* xfrm_proc +* xfrm_sync +* xfrm_sysctl +* xdp-rx-metadata +* xsk-tx-metadata + +.. only:: subproject and html + + Indices + ======= + + * :ref:`genindex` -- cgit v1.2.3 From ff6dfbf73c16b1b517554626820e4058b235e9e0 Mon Sep 17 00:00:00 2001 From: Wang Yaxin Date: Wed, 19 Mar 2025 15:52:37 +0800 Subject: Docs/zh_CN: Translate msg_zerocopy.rst to Simplified Chinese translate the "msg_zerocopy.rst" into Simplified Chinese. Update to commit bac2cac12c26("docs: net: description of MSG_ZEROCOPY for AF_VSOCK") Fix embedded code type issue by Alex Shi. Signed-off-by: Wang Yaxin Signed-off-by: Jiang Kun Signed-off-by: xu xin Signed-off-by: He Peilin Reviewed-by: Yanteng Si Link: https://lore.kernel.org/r/20250319155237978a-_o_XXMLszvXPDlyRsb4@zte.com.cn Signed-off-by: Alex Shi --- .../translations/zh_CN/networking/index.rst | 5 +- .../translations/zh_CN/networking/msg_zerocopy.rst | 223 +++++++++++++++++++++ 2 files changed, 226 insertions(+), 2 deletions(-) create mode 100644 Documentation/translations/zh_CN/networking/msg_zerocopy.rst (limited to 'Documentation') diff --git a/Documentation/translations/zh_CN/networking/index.rst b/Documentation/translations/zh_CN/networking/index.rst index a722fed81910..d07dd69f980b 100644 --- a/Documentation/translations/zh_CN/networking/index.rst +++ b/Documentation/translations/zh_CN/networking/index.rst @@ -18,7 +18,9 @@ 目录： .. toctree:: - :maxdepth: 2 + :maxdepth: 1 + + msg_zerocopy Todolist: @@ -37,7 +39,6 @@ Todolist: * iso15765-2 * j1939 * kapi -* msg_zerocopy * failover * net_dim * net_failover diff --git a/Documentation/translations/zh_CN/networking/msg_zerocopy.rst b/Documentation/translations/zh_CN/networking/msg_zerocopy.rst new file mode 100644 index 000000000000..821b32c4d1bf --- /dev/null +++ b/Documentation/translations/zh_CN/networking/msg_zerocopy.rst @@ -0,0 +1,223 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: ../disclaimer-zh_CN.rst + +:Original: Documentation/networking/msg_zerocopy.rst + +:翻译: + + 王亚鑫 Wang Yaxin + +:校译: + + - 徐鑫 xu xin + - 何配林 He Peilin + +============ +MSG_ZEROCOPY +============ + +简介 +==== + +MSG_ZEROCOPY 标志用于启用套接字发送调用的免拷贝功能。该功能目前适用于 TCP、UDP 和 VSOCK +（使用 virtio 传输）套接字。 + +机遇与注意事项 +-------------- + +在用户进程与内核之间拷贝大型缓冲区可能会消耗大量资源。Linux 支持多种免拷贝的接口，如sendfile +和 splice。MSG_ZEROCOPY 标志将底层的拷贝避免机制扩展到了常见的套接字发送调用中。 + +免拷贝并非毫无代价。在实现上，它通过页面固定（page pinning）将按字节拷贝的成本替换为页面统计 +（page accounting）和完成通知的开销。因此，MSG_ZEROCOPY 通常仅在写入量超过大约 10 KB 时 +才有效。 + +页面固定还会改变系统调用的语义。它会暂时在进程和网络堆栈之间共享缓冲区。与拷贝不同，进程在系统 +调用返回后不能立即覆盖缓冲区，否则可能会修改正在传输中的数据。内核的完整性不会受到影响，但有缺 +陷的程序可能会破坏自己的数据流。 + +当内核返回数据可以安全修改的通知时，进程才可以修改数据。因此，将现有应用程序转换为使用 +MSG_ZEROCOPY 并非总是像简单地传递该标志那样容易。 + +更多信息 +-------- + +本文档的大部分内容是来自于 netdev 2.1 上发表的一篇长篇论文。如需更深入的信息，请参阅该论文和 +演讲，或者浏览 LWN.net 上的精彩报道，也可以直接阅读源码。 + + 论文、幻灯片、视频： + https://netdevconf.org/2.1/session.html?debruijn + + LWN 文章： + https://lwn.net/Articles/726917/ + + 补丁集： + [PATCH net-next v4 0/9] socket sendmsg MSG_ZEROCOPY + https://lore.kernel.org/netdev/20170803202945.70750-1-willemdebruijn.kernel@gmail.com + +接口 +==== + +传递 MSG_ZEROCOPY 标志是启用免拷贝功能的最明显步骤，但并非唯一的步骤。 + +套接字设置 +---------- + +当应用程序向 send 系统调用传递未定义的标志时，内核通常会宽容对待。默认情况下，它会简单地忽略 +这些标志。为了避免为那些偶然传递此标志的遗留进程启用免拷贝模式，进程必须首先通过设置套接字选项 +来表明意图： + +:: + + if (setsockopt(fd, SOL_SOCKET, SO_ZEROCOPY, &one, sizeof(one))) + error(1, errno, "setsockopt zerocopy"); + +传输 +---- + +对 send（或 sendto、sendmsg、sendmmsg）本身的改动非常简单。只需传递新的标志即可。 + +:: + + ret = send(fd, buf, sizeof(buf), MSG_ZEROCOPY); + +如果零拷贝操作失败，将返回 -1，并设置 errno 为 ENOBUFS。这种情况可能发生在套接字超出其 +optmem 限制，或者用户超出其锁定页面的 ulimit 时。 + +混合使用免拷贝和拷贝 +~~~~~~~~~~~~~~~~~~~~ + +许多工作负载同时包含大型和小型缓冲区。由于对于小数据包来说，免拷贝的成本高于拷贝，因此该 +功能是通过标志实现的。带有标志的调用和没有标志的调用可以安全地混合使用。 + +通知 +---- + +当内核认为可以安全地重用之前传递的缓冲区时，它必须通知进程。完成通知在套接字的错误队列上 +排队，类似于传输时间戳接口。 + +通知本身是一个简单的标量值。每个套接字都维护一个内部的无符号 32 位计数器。每次带有 +MSG_ZEROCOPY 标志的 send 调用成功发送数据时，计数器都会增加。如果调用失败或长度为零， +则计数器不会增加。该计数器统计系统调用的调用次数，而不是字节数。在 UINT_MAX 次调用后， +计数器会循环。 + +通知接收 +~~~~~~~~ + +下面的代码片段展示了 API 的使用。在最简单的情况下，每次 send 系统调用后，都会对错误队列 +进行轮询和 recvmsg 调用。 + +从错误队列读取始终是一个非阻塞操作。poll 调用用于阻塞，直到出现错误。它会在其输出标志中 +设置 POLLERR。该标志不需要在 events 字段中设置。错误会无条件地发出信号。 + +:: + + pfd.fd = fd; + pfd.events = 0; + if (poll(&pfd, 1, -1) != 1 || pfd.revents & POLLERR == 0) + error(1, errno, "poll"); + + ret = recvmsg(fd, &msg, MSG_ERRQUEUE); + if (ret == -1) + error(1, errno, "recvmsg"); + +read_notification(msg); + + +这个示例仅用于演示目的。在实际应用中，不等待通知，而是每隔几次 send 调用就进行一次非阻塞 +读取会更高效。 + +零拷贝通知可以与其他套接字操作乱序处理。通常，拥有错误队列套接字会阻塞其他操作，直到错误 +被读取。然而，零拷贝通知具有零错误代码，因此不会阻塞 send 和 recv 调用。 + +通知批处理 +~~~~~~~~~~~~ + +可以使用 recvmmsg 调用来一次性读取多个未决的数据包。这通常不是必需的。在每条消息中，内核 +返回的不是一个单一的值，而是一个范围。当错误队列上有一个通知正在等待接收时，它会将连续的通 +知合并起来。 + +当一个新的通知即将被排队时，它会检查队列尾部的通知的范围是否可以扩展以包含新的值。如果是这 +样，它会丢弃新的通知数据包，并增大未处理通知的范围上限值。 + +对于按顺序确认数据的协议（如 TCP），每个通知都可以合并到前一个通知中，因此在任何时候在等待 +的通知都不会超过一个。 + +有序交付是常见的情况，但不能保证。在重传和套接字拆除时，通知可能会乱序到达。 + +通知解析 +~~~~~~~~ + +下面的代码片段演示了如何解析控制消息：前面代码片段中的 read_notification() 调用。通知 +以标准错误格式 sock_extended_err 编码。 + +控制数据中的级别和类型字段是协议族特定的，对于 TCP 或 UDP 套接字，分别为 IP_RECVERR 或 +IPV6_RECVERR。对于 VSOCK 套接字，cmsg_level 为 SOL_VSOCK，cmsg_type 为 VSOCK_RECVERR。 + +错误来源是新的类型 SO_EE_ORIGIN_ZEROCOPY。如前所述，ee_errno 为零，以避免在套接字上 +阻塞地读取和写入系统调用。 + +32 位通知范围编码为 [ee_info, ee_data]。这个范围是包含边界值的。除了下面讨论的 ee_code +字段外，结构中的其他字段应被视为未定义的。 + +:: + + struct sock_extended_err *serr; + struct cmsghdr *cm; + + cm = CMSG_FIRSTHDR(msg); + if (cm->cmsg_level != SOL_IP && + cm->cmsg_type != IP_RECVERR) + error(1, 0, "cmsg"); + + serr = (void *) CMSG_DATA(cm); + if (serr->ee_errno != 0 || + serr->ee_origin != SO_EE_ORIGIN_ZEROCOPY) + error(1, 0, "serr"); + +printf("completed: %u..%u\n", serr->ee_info, serr->ee_data); + + +延迟拷贝 +~~~~~~~~ + +传递标志 MSG_ZEROCOPY 是向内核发出的一个提示，让内核采用免拷贝的策略，同时也是一种约 +定，即内核会对完成通知进行排队处理。但这并不保证拷贝操作一定会被省略。 + +拷贝避免不总是适用的。不支持分散/聚集 I/O 的设备无法发送由内核生成的协议头加上零拷贝用户 +数据组成的数据包。数据包可能需要在协议栈底层转换为一份私有数据副本，例如用于计算校验和。 + +在所有这些情况下，当内核释放对共享页面的持有权时，它会返回一个完成通知。该通知可能在（已 +拷贝）数据完全传输之前到达。因此。零拷贝完成通知并不是传输完成通知。 + +如果数据不在缓存中，延迟拷贝可能会比立即在系统调用中拷贝开销更大。进程还会因通知处理而产 +生成本，但却没有带来任何好处。因此，内核会在返回时通过在 ee_code 字段中设置标志 +SO_EE_CODE_ZEROCOPY_COPIED 来指示数据是否以拷贝的方式完成。进程可以利用这个信号，在 +同一套接字上后续的请求中停止传递 MSG_ZEROCOPY 标志。 + +实现 +==== + +环回 +---- + +对于 TCP 和 UDP： +如果接收进程不读取其套接字，发送到本地套接字的数据可能会无限期排队。无限期的通知延迟是不 +可接受的。因此，所有使用 MSG_ZEROCOPY 生成并环回到本地套接字的数据包都将产生延迟拷贝。 +这包括环回到数据包套接字（例如，tcpdump）和 tun 设备。 + +对于 VSOCK： +发送到本地套接字的数据路径与非本地套接字相同。 + +测试 +==== + +更具体的示例代码可以在内核源码的 tools/testing/selftests/net/msg_zerocopy.c 中找到。 + +要留意环回约束问题。该测试可以在一对主机之间进行。但如果是在本地的一对进程之间运行，例如当使用 +msg_zerocopy.sh 脚本在跨命名空间的虚拟以太网（veth）对之间运行时，测试将不会显示出任何性能 +提升。为了便于测试，可以通过让 skb_orphan_frags_rx 与 skb_orphan_frags 相同，来暂时放宽 +环回限制。 + +对于 VSOCK 类型套接字的示例可以在 tools/testing/vsock/vsock_test_zerocopy.c 中找到。 -- cgit v1.2.3 From 4f0145e9ea41cc5d0f80b79a60ce39757d3b47d6 Mon Sep 17 00:00:00 2001 From: Yanteng Si Date: Fri, 28 Mar 2025 18:06:43 +0800 Subject: docs/zh_CN: Add how-to of Chinese translation Many new faces keep appearing on the mailing list from time to time, and there may be many potential developers who want to participate in the Chinese translation but don't know how to get started. As more and more documents are translated, it is becoming increasingly important to improve the maintainability of Chinese documents. We have a lot of conventions, but currently these conventions are still being passed on orally. At the same time, during the review process, especially for the first few patches submitted by newbies, we have made too many repetitive comments. In order to address the above issues, I have drafted this guide, and there is still a lot that needs to be improved. Alex Shi: Fix a embedded code white space issue. Co-developed-by: Dongliang Mu Signed-off-by: Dongliang Mu Signed-off-by: Yanteng Si Link: https://lore.kernel.org/r/0443c86e10d900a4d752d103265c948360563d43.1743156287.git.si.yanteng@linux.dev Signed-off-by: Alex Shi --- Documentation/translations/zh_CN/how-to.rst | 459 ++++++++++++++++++++++++++++ Documentation/translations/zh_CN/index.rst | 24 +- 2 files changed, 471 insertions(+), 12 deletions(-) create mode 100644 Documentation/translations/zh_CN/how-to.rst (limited to 'Documentation') diff --git a/Documentation/translations/zh_CN/how-to.rst b/Documentation/translations/zh_CN/how-to.rst new file mode 100644 index 000000000000..569b0209385a --- /dev/null +++ b/Documentation/translations/zh_CN/how-to.rst @@ -0,0 +1,459 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========================= +Linux内核中文文档翻译规范 +========================= + +修订记录： + - v1.0 2025年3月28日，司延腾、慕冬亮共同编写了该规范。 + +制定规范的背景 +============== + +过去几年，在广大社区爱好者的友好合作下，Linux 内核中文文档迎来了蓬勃的发 +展。在翻译的早期，一切都是混乱的，社区对译稿只有一个准确翻译的要求，以鼓 +励更多的开发者参与进来，这是从0到1的必然过程，所以早期的中文文档目录更加 +具有多样性，不过好在文档不多，维护上并没有过大的压力。 + +然而，世事变幻，不觉有年，现在内核中文文档在前进的道路上越走越远，很多潜 +在的问题逐渐浮出水面，而且随着中文文档数量的增加，翻译更多的文档与提高中 +文文档可维护性之间的矛盾愈发尖锐。由于文档翻译的特殊性，很多开发者并不会 +一直更新文档，如果中文文档落后英文文档太多，文档更新的工作量会远大于重新 +翻译。而且邮件列表中陆续有新的面孔出现，他们那股热情，就像燃烧的火焰，能 +瞬间点燃整个空间，可是他们的补丁往往具有个性，这会给审阅带来了很大的困难， +reviewer 们只能耐心地指导他们如何与社区更好地合作，但是这项工作具有重复 +性，长此以往，会渐渐浇灭 reviewer 审阅的热情。 + +虽然内核文档中已经有了类似的贡献指南，但是缺乏专门针对于中文翻译的，尤其 +是对于新手来说，浏览大量的文档反而更加迷惑，该文档就是为了缓解这一问题而 +编写，目的是为提供给新手一个快速翻译指南。 + +详细的贡献指南：Documentation/translations/zh_CN/process/index.rst。 + +环境搭建 +======== + +工欲善其事必先利其器，如果您目前对内核文档翻译满怀热情，并且会独立地安装 +linux 发行版和简单地使用 linux 命令行，那么可以迅速开始了。若您尚不具备该 +能力，很多网站上会有详细的手把手教程，最多一个上午，您应该就能掌握对应技 +能。您需要注意的一点是，请不要使用 root 用户进行后续步骤和文档翻译。 + +拉取开发树 +---------- + +中文文档翻译工作目前独立于 linux-doc 开发树开展，所以您需要拉取该开发树， +打开终端命令行执行:: + + git clone git://git.kernel.org/pub/scm/linux/kernel/git/alexs/linux.git + +如果您遇到网络连接问题，也可以执行以下命令:: + + git clone https://mirrors.hust.edu.cn/git/kernel-doc-zh.git linux + +这是 Alex 开发树的镜像库，每两个小时同步一次上游。如果您了解到更快的 mirror， +请随时 **添加** 。 + +命令执行完毕后，您会在当前目录下得到一个 linux 目录，该目录就是您之后的工作 +仓库，请把它放在一个稳妥的位置。 + +安装文档构建环境 +---------------- + +内核仓库里面提供了一个半自动化脚本，执行该脚本，会检测您的发行版中需要安 +装哪些软件包，请按照命令行提示进行安装，通常您只需要复制命令并执行就行。 +:: + + cd linux + ./scripts/sphinx-pre-install + +以Fedora为例，它的输出是这样的:: + + You should run: + + sudo dnf install -y dejavu-sans-fonts dejavu-sans-mono-fonts dejavu-serif-fonts google-noto-sans-cjk-fonts graphviz-gd latexmk librsvg2-tools texlive-anyfontsize texlive-capt-of texlive-collection-fontsrecommended texlive-ctex texlive-eqparbox texlive-fncychap texlive-framed texlive-luatex85 texlive-multirow texlive-needspace texlive-tabulary texlive-threeparttable texlive-upquote texlive-wrapfig texlive-xecjk + + Sphinx needs to be installed either: + 1) via pip/pypi with: + + /usr/bin/python3 -m venv sphinx_latest + . sphinx_latest/bin/activate + pip install -r ./Documentation/sphinx/requirements.txt + + If you want to exit the virtualenv, you can use: + deactivate + + 2) As a package with: + + sudo dnf install -y python3-sphinx + + Please note that Sphinx >= 3.0 will currently produce false-positive + warning when the same name is used for more than one type (functions, + structs, enums,...). This is known Sphinx bug. For more details, see: + https://github.com/sphinx-doc/sphinx/pull/8313 + +请您按照提示复制打印的命令到命令行执行，您必须具备 root 权限才能执行 sudo +开头的命令。 + +如果您处于一个多用户环境中，为了避免对其他人造成影响，建议您配置单用户 +sphinx 虚拟环境，即只需要执行:: + + /usr/bin/python3 -m venv sphinx_latest + . sphinx_latest/bin/activate + pip install -r ./Documentation/sphinx/requirements.txt + +最后执行以下命令退出虚拟环境:: + + deactivate + +您可以在任何需要的时候再次执行以下命令进入虚拟环境:: + + . sphinx_latest/bin/activate + +进行第一次文档编译 +------------------ + +进入开发树目录:: + + cd linux + +这是一个标准的编译和调试流程，请每次构建时都严格执行:: + + . sphinx_latest/bin/activate + make cleandocs + make htmldocs + deactivate + +检查编译结果 +------------ + +编译输出在Documentation/output/目录下，请用浏览器打开该目录下对应 +的文件进行检查。 + +git和邮箱配置 +------------- + +打开命令行执行:: + + sudo dnf install git-email + vim ~/.gitconfig + +这里是我的一个配置文件示范，请根据您的邮箱域名服务商提供的手册替换到对 +应的字段。 +:: + + [user] + name = Yanteng Si # 这会出现在您的补丁头部签名栏 + email = si.yanteng@linux.dev # 这会出现在您的补丁头部签名栏 + + [sendemail] + from = Yanteng Si # 这会出现在您的补丁头部 + smtpencryption = ssl + smtpserver = smtp.migadu.com + smtpuser = si.yanteng@linux.dev + smtppass = # 建议使用第三方客户端专用密码 + chainreplyto = false + smtpserverport = 465 + +关于邮件客户端的配置，请查阅Documentation/translations/zh_CN/process/email-clients.rst。 + +开始翻译文档 +============ + +文档索引结构 +------------ + +目前中文文档是在Documentation/translations/zh_CN/目录下进行，该 +目录结构最终会与Documentation/结构一致，所以您只需要将您感兴趣的英文 +文档文件和对应的 index.rst 复制到 zh_CN 目录下对应的位置，然后修改更 +上一级的 index 即可开始您的翻译。 + +为了保证翻译的文档补丁被顺利合并，不建议多人同时翻译一个目录，因为这会 +造成补丁之间互相依赖，往往会导致一部分补丁被合并，另一部分产生冲突。 + +如果实在无法避免两个人同时对一个目录进行翻译的情况，请将补丁制作进一个补 +丁集。但是不推荐刚开始就这么做，因为经过实践，在没有指导的情况下，新手很 +难一次处理好这个补丁集。 + +请执行以下命令，新建开发分支:: + + git checkout docs-next + git branch my-trans + git checkout my-trans + +译文格式要求 +------------ + + - 每行长度最多不超过40个字符 + - 每行长度请保持一致 + - 标题的下划线长度请按照一个英文一个字符、一个中文两个字符与标题对齐 + - 其它的修饰符请与英文文档保持一致 + +此外在译文的头部，您需要插入以下内容:: + + .. SPDX-License-Identifier: GPL-2.0 + .. include:: ../disclaimer-zh_CN.rst #您需要了解该文件的路径，根 + 据您实际翻译的文档灵活调整 + + :Original: Documentation/xxx/xxx.rst #替换为您翻译的英文文档路径 + + :翻译: + + 司延腾 Yanteng Si #替换为您自己的联系方式 + +翻译技巧 +-------- + +中文文档有每行40字符限制，因为一个中文字符等于2个英文字符。但是社区并没有 +那么严格，一个诀窍是将您的翻译的内容与英文原文的每行长度对齐即可，这样， +您也不必总是检查有没有超限。 + +如果您的英文阅读能力有限，可以考虑使用辅助翻译工具，例如 deepseek 。但是您 +必须仔细地打磨，使译文达到“信达雅”的标准。 + +**请注意** 社区不接受纯机器翻译的文档，社区工作建立在信任的基础上，请认真对待。 + +编译和检查 +---------- + +请执行:: + + . sphinx_latest/bin/activate + make cleandocs + make htmldocs + +解决与您翻译的文档相关的 warning 和 error，然后执行:: + + make cleandocs #该步骤不能省略，否则可能不会再次输出真实存在的警告 + make htmldocs + deactivate + +进入 output 目录用浏览器打开您翻译的文档，检查渲染的页面是否正常，如果正常， +继续进行后续步骤，否则请尝试解决。 + +制作补丁 +======== + +提交改动 +-------- + +执行以下命令，在弹出的交互式页面中填写必要的信息。 +:: + + git add . + git commit -s -v + +请参考以下信息进行输入:: + + docs/zh_CN: Add self-protection index Chinese translation + + Translate .../security/self-protection.rst into Chinese. + + Update the translation through commit b080e52110ea #请执行git log <您翻译的英文文档路径> 复制最顶部第一个补丁的sha值的前12位，替换掉12位sha值。 + ("docs: update self-protection __ro_after_init status") + + Signed-off-by: Yanteng Si #如果您前面的步骤正确执行，该行会自动显示，否则请检查gitconfig文件。 + +保存并退出。 + +**请注意** 以上四行，缺少任何一行，您都将会在第一轮审阅后返工，如果您需要一个更加明确的示例，请对 zh_CN 目录执行 git log。 + +导出补丁和制作封面 +------------------ + +这个时候，可以导出补丁，做发送邮件列表最后的准备了。命令行执行:: + + git format-patch -N + +然后命令行会输出类似下面的内容:: + + 0001-docs-zh_CN-add-xxxxxxxx.patch + 0002-docs-zh_CN-add-xxxxxxxx.patch + …… + +测试补丁 +-------- + +内核提供了一个补丁检测脚本，请执行:: + + ./scripts/checkpatch.pl *.patch + +参考脚本输出，解决掉所有的 error 和 warning，通常情况下，只有下面这个 +warning 不需要解决:: + + WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? + +一个简单的解决方法是一次只检查一个补丁，然后打上该补丁，直接对译文进行修改， +然后执行以下命令为补丁追加更改:: + + git checkout docs-next + git branch test-trans + git am 0001-xxxxx.patch + ./scripts/checkpatch.pl 0001-xxxxx.patch + 直接修改您的翻译 + git add . + git am --amend + 保存退出 + git am 0002-xxxxx.patch + …… + +重新导出再次检测，重复这个过程，直到处理完所有的补丁。 + +最后，如果检测时没有 warning 和 error 需要被处理或者您只有一个补丁，请跳 +过下面这个步骤，否则请重新导出补丁制作封面:: + + git format-patch -N --cover-letter --thread=shallow #N为您的补丁数量,N一般要大于1。 + +然后命令行会输出类似下面的内容:: + + 0000-cover-letter.patch + 0001-docs-zh_CN-add-xxxxxxxx.patch + 0002-docs-zh_CN-add-xxxxxxxx.patch + +您需要用编辑器打开0号补丁，修改两处内容:: + + vim 0000-cover-letter.patch + + ... + Subject: [PATCH 0/1] *** SUBJECT HERE *** #修改该字段，概括您的补丁集都做了哪些事情 + + *** BLURB HERE *** #修改该字段，详细描述您的补丁集做了哪些事情 + + Yanteng Si (1): + docs/zh_CN: add xxxxx + ... + +如果您只有一个补丁，则可以不制作封面，即0号补丁，只需要执行:: + + git format-patch -1 + +把补丁提交到邮件列表 +==================== + +恭喜您，您的文档翻译现在可以提交到邮件列表了。 + +获取维护者和审阅者邮箱以及邮件列表地址 +-------------------------------------- + +内核提供了一个自动化脚本工具，请执行:: + + ./scripts/get_maintainer.pl *.patch + +将输出的邮箱地址保存下来。 + +将补丁提交到邮件列表 +-------------------- + +打开上面您保存的邮件地址，执行:: + + git send-email *.patch --to --cc #一个to对应一个地址，一个cc对应一个地址，有几个就写几个。 + +执行该命令时，请确保网络通常，邮件发送成功一般会返回250。 + +您可以先发送给自己，尝试发出的 patch 是否可以用 'git am' 工具正常打上。 +如果检查正常， 您就可以放心的发送到社区评审了。 + +如果该步骤被中断，您可以检查一下，继续用上条命令发送失败的补丁，一定不要再 +次发送已经发送成功的补丁。 + +积极参与审阅过程并迭代补丁 +========================== + +补丁提交到邮件列表并不代表万事大吉，您还需要积极回复 maintainer 和 +reviewer 的评论，做到每条都有回复，每个回复都落实到位。 + +如何回复评论 +------------ + + - 请先将您的邮箱客户端信件回复修改为 **纯文本** 格式，并去除所有签名，尤其是 + 企业邮箱。 + - 然后点击回复按钮，并将要回复的邮件带入， + - 在第一条评论行尾换行，输入您的回复 + - 在第二条评论行尾换行，输入您的回复 + - 直到处理完最后一条评论，换行空两行输入问候语和署名 + +注意，信件回复请尽量使用英文。 + +迭代补丁 +-------- + +建议您每回复一条评论，就修改一处翻译。然后重新生成补丁，相信您现在已经具 +备了灵活使用 git am --amend 的能力。 + +每次迭代一个补丁，不要一次多个:: + + git am <您要修改的补丁> + 直接对文件进行您的修改 + git add . + git commit --amend + +当您将所有的评论落实到位后，导出第二版补丁，并修改封面:: + + git format-patch -N -v 2 --cover-letter --thread=shallow + +打开0号补丁，在 BLURB HERE 处编写相较于上个版本，您做了哪些改动。 + +然后执行:: + + git send-email v2* --to --cc + +这样，新的一版补丁就又发送到邮件列表等待审阅，之后就是重复这个过程。 + +审阅周期 +-------- + +因为有时邮件列表比较繁忙，您的邮件可能会被淹没，如果超过两周没有得到任何 +回复，请自己回复自己，回复的内容为 Ping. + +最终，如果您落实好了所有的评论，并且一段时间后没有最新的评论，您的补丁将 +会先进入 Alex 的开发树，然后进入 linux-doc 开发树，最终在下个窗口打开 +时合并进 mainline 仓库。 + +紧急处理 +-------- + +如果您发送到邮件列表之后。发现发错了补丁集，尤其是在多个版本迭代的过程中； +自己发现了一些不妥的翻译；发送错了邮件列表…… + +git email默认会抄送给您一份，所以您可以切换为审阅者的角色审查自己的补丁， +并留下评论，描述有何不妥，将在下个版本怎么改，并付诸行动，重新提交，但是 +注意频率，每天提交的次数不要超过两次。 + +新手任务 +-------- +对于首次参与 Linux 内核中文文档翻译的新手，建议您在 linux 目录中运行以下命令： +:: + + ./script/checktransupdate.py -l zh_CN`` + +该命令会列出需要翻译或更新的英文文档。 + +关于详细操作说明，请参考： Documentation/translations/zh_CN/doc-guide/checktransupdate.rst\ + +进阶 +---- + +希望您不只是单纯的翻译内核文档，在熟悉了一起与社区工作之后，您可以审阅其他 +开发者的翻译，或者提出具有建设性的主张。与此同时，与文档对应的代码更加有趣， +而且需要完善的地方还有很多，勇敢地去探索，然后提交你的想法吧。 + +常见的问题 +========== + +Maintainer回复补丁不能正常apply +------------------------------- + +这通常是因为您的补丁与邮件列表其他人的补丁产生了冲突，别人的补丁先被 apply 了， +您的补丁集就无法成功 apply 了，这需要您更新本地分支，在本地解决完冲突后再次提交。 + +请尽量避免冲突，不要多个人同时翻译一个目录。翻译之前可以通过 git log 查看您感 +兴趣的目录近期有没有其他人翻译，如果有，请提前私信联系对方，请求其代为发送您 +的补丁。如果对方未来一个月内没有提交新补丁的打算，您可以独自发送。 + +回信被邮件列表拒收 +------------------ + +大部分情况下，是由于您发送了非纯文本格式的信件，请尽量避免使用 webmail，推荐 +使用邮件客户端，比如 thunderbird，记得在设置中的回信配置那改为纯文本发送。 + +如果超过了24小时，您依旧没有在发现您的邮 +件，请联系您的网络管理员帮忙解决。 diff --git a/Documentation/translations/zh_CN/index.rst b/Documentation/translations/zh_CN/index.rst index cc512ca54172..b08c09d8e96e 100644 --- a/Documentation/translations/zh_CN/index.rst +++ b/Documentation/translations/zh_CN/index.rst @@ -21,18 +21,18 @@ 这是中文内核文档树的顶级目录。内核文档，就像内核本身一样，在很大程度上是一 项正在进行的工作；当我们努力将许多分散的文件整合成一个连贯的整体时尤其如此。 另外，随时欢迎您对内核文档进行改进；如果您想提供帮助，请加入vger.kernel.org -上的linux-doc邮件列表。 - -顺便说下，中文文档也需要遵守内核编码风格，风格中中文和英文的主要不同就是中文 -的字符标点占用两个英文字符宽度，所以，当英文要求不要超过每行100个字符时， -中文就不要超过50个字符。另外，也要注意'-'，'='等符号与相关标题的对齐。在将 -补丁提交到社区之前，一定要进行必要的 ``checkpatch.pl`` 检查和编译测试，确保 -在 ``make htmldocs/pdfdocs`` 中不增加新的告警，最后，安装检查你生成的 -html/pdf 文件，确认它们看起来是正常的。 - -提交之前请确认你的补丁可以正常提交到中文文档维护库: -https://git.kernel.org/pub/scm/linux/kernel/git/alexs/linux.git/ -如果你的补丁依赖于其他人的补丁, 可以与其他人商量后由某一个人合并提交。 +上的linux-doc邮件列表，并按照Documentation/translations/zh_CN/how-to.rst的 +指引提交补丁。提交补丁之前请确保执行"make htmldocs”后无与翻译有关的异常输出。 + +如何翻译内核文档 +---------------- + +翻译文档本身是一件很简单的事情，但是提交补丁需要注意一些细节，为了保证内核中文文档的高质量可持续发展，提供了一份翻译指南。 + +.. toctree:: + :maxdepth: 1 + + how-to.rst 与Linux 内核社区一起工作 ------------------------ -- cgit v1.2.3 From 64e6121dc1b18a8208faf5b26efb50206722fd8e Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 4 Apr 2025 16:40:29 -0500 Subject: dt-bindings: display: rockchip,vop: Drop assigned-clocks assigned-clock properties are implicitly allowed in any node with 'clocks' and don't have to be specified. The max here also appears to be wrong as there's a case with 4 entries. Signed-off-by: "Rob Herring (Arm)" Reviewed-by: Krzysztof Kozlowski Signed-off-by: Heiko Stuebner Link: https://lore.kernel.org/r/20250404214030.401629-1-robh@kernel.org --- .../devicetree/bindings/display/rockchip/rockchip-vop.yaml | 6 ------ 1 file changed, 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml index b339b7e708c6..8b5f58103dda 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml @@ -73,12 +73,6 @@ properties: port: $ref: /schemas/graph.yaml#/properties/port - assigned-clocks: - maxItems: 2 - - assigned-clock-rates: - maxItems: 2 - iommus: maxItems: 1 -- cgit v1.2.3 From 070d546258257c75c65a2f15da558eb96bce550c Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 7 Apr 2025 11:56:06 -0500 Subject: dt-bindings: phy: rockchip: Add missing "phy-supply" property Several Rockchip PHYs use the "phy-supply" property, but don't document it. Add it to the current known users. Signed-off-by: Rob Herring (Arm) Reviewed-by: Heiko Stuebner Link: https://lore.kernel.org/r/20250407165607.2937088-1-robh@kernel.org Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml | 3 +++ Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml | 3 +++ Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml | 3 +++ 3 files changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml index 888e6b2aac5a..3e101c3c5ea9 100644 --- a/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml @@ -42,6 +42,9 @@ properties: - const: phy - const: apb + phy-supply: + description: Single PHY regulator + rockchip,enable-ssc: type: boolean description: diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml index b42f1272903d..8b7059d5b182 100644 --- a/Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml @@ -47,6 +47,9 @@ properties: - const: pcs_apb - const: pma_apb + phy-supply: + description: Single PHY regulator + rockchip,dp-lane-mux: $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 2 diff --git a/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml index ba67dca5a446..d7de8b527c5c 100644 --- a/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml +++ b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml @@ -46,6 +46,9 @@ properties: reset-names: const: phy + phy-supply: + description: Single PHY regulator + rockchip,phy-grf: $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the syscon managing the phy "general register files" -- cgit v1.2.3 From 23f793850e9ee7390584c0809f085d6c88de7d3f Mon Sep 17 00:00:00 2001 From: Kaustabh Chakraborty Date: Thu, 10 Apr 2025 14:01:13 +0530 Subject: dt-bindings: phy: samsung,usb3-drd-phy: add exynos7870-usbdrd-phy compatible Add the compatible string "samsung,exynos7870-usbdrd-phy" to the documentation. The devicetree node requires two clocks, named "phy" and "ref" (same as clocks required by Exynos5). Signed-off-by: Kaustabh Chakraborty Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250410-exynos7870-usbphy-v2-2-2eb005987455@disroot.org Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml index 27295acbba76..fdddddc7d611 100644 --- a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml +++ b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml @@ -30,6 +30,7 @@ properties: - samsung,exynos5420-usbdrd-phy - samsung,exynos5433-usbdrd-phy - samsung,exynos7-usbdrd-phy + - samsung,exynos7870-usbdrd-phy - samsung,exynos850-usbdrd-phy clocks: @@ -184,6 +185,7 @@ allOf: enum: - samsung,exynos5250-usbdrd-phy - samsung,exynos5420-usbdrd-phy + - samsung,exynos7870-usbdrd-phy - samsung,exynos850-usbdrd-phy then: properties: -- cgit v1.2.3 From 9e0dd98654a528735d2b363d0dc73f7904108652 Mon Sep 17 00:00:00 2001 From: Caleb James DeLisle Date: Sun, 30 Mar 2025 17:02:57 +0000 Subject: dt-bindings: vendor-prefixes: Add EcoNet Add the "econet" vendor prefix for SoC maker Signed-off-by: Caleb James DeLisle Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250330170306.2584136-2-cjd@cjdns.fr Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 86f6a19b28ae..b23b1c05827f 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -432,6 +432,8 @@ patternProperties: description: EBV Elektronik "^eckelmann,.*": description: Eckelmann AG + "^econet,.*": + description: EcoNet (HK) Limited "^edgeble,.*": description: Edgeble AI Technologies Pvt. Ltd. "^edimax,.*": -- cgit v1.2.3 From b82f66c76b8e3d9cabc06a68c8e0401e3f96fecf Mon Sep 17 00:00:00 2001 From: Antonin Godard Date: Tue, 18 Mar 2025 08:58:28 +0100 Subject: dt-bindings: display: simple: Add NLT NL13676BC25-03F panel Add NLT NL13676BC25-03F 15.6" LCD-TFT LVDS panel compatible string. Signed-off-by: Antonin Godard Acked-by: Krzysztof Kozlowski Link: https://patchwork.freedesktop.org/patch/msgid/20250318-b4-add-nlt-nl13676bc25-03f-v1-1-67e0f8cf2e6f@bootlin.com Signed-off-by: Louis Chauvet --- Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index b5c8eb4fa2d1..b71ad32270d4 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -226,6 +226,8 @@ properties: - netron-dy,e231732 # Newhaven Display International 480 x 272 TFT LCD panel - newhaven,nhd-4.3-480272ef-atxl + # NLT Technologies, Ltd. 15.6" WXGA (1366×768) LVDS TFT LCD panel + - nlt,nl13676bc25-03f # New Vision Display 7.0" 800 RGB x 480 TFT LCD panel - nvd,9128 # OKAYA Electric America, Inc. RS800480T-7X0GP 7" WVGA LCD panel -- cgit v1.2.3 From c449d5f3a3d70b6223af8df2cadca3ca6eacb613 Mon Sep 17 00:00:00 2001 From: Jiayuan Chen Date: Wed, 9 Apr 2025 19:26:05 +0800 Subject: tcp: add LINUX_MIB_PAWS_TW_REJECTED counter When TCP is in TIME_WAIT state, PAWS verification uses LINUX_PAWSESTABREJECTED, which is ambiguous and cannot be distinguished from other PAWS verification processes. We added a new counter, like the existing PAWS_OLD_ACK one. Also we update the doc with previously missing PAWS_OLD_ACK. usage: ''' nstat -az | grep PAWSTimewait TcpExtPAWSTimewait 1 0.0 ''' Suggested-by: Eric Dumazet Signed-off-by: Jiayuan Chen Reviewed-by: Eric Dumazet Link: https://patch.msgid.link/20250409112614.16153-3-jiayuan.chen@linux.dev Signed-off-by: Jakub Kicinski --- Documentation/networking/net_cachelines/snmp.rst | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/net_cachelines/snmp.rst b/Documentation/networking/net_cachelines/snmp.rst index bc96efc92cf5..bd44b3eebbef 100644 --- a/Documentation/networking/net_cachelines/snmp.rst +++ b/Documentation/networking/net_cachelines/snmp.rst @@ -37,6 +37,8 @@ unsigned_long LINUX_MIB_TIMEWAITKILLED unsigned_long LINUX_MIB_PAWSACTIVEREJECTED unsigned_long LINUX_MIB_PAWSESTABREJECTED unsigned_long LINUX_MIB_TSECR_REJECTED +unsigned_long LINUX_MIB_PAWS_OLD_ACK +unsigned_long LINUX_MIB_PAWS_TW_REJECTED unsigned_long LINUX_MIB_DELAYEDACKLOST unsigned_long LINUX_MIB_LISTENOVERFLOWS unsigned_long LINUX_MIB_LISTENDROPS -- cgit v1.2.3 From cd5e64fb959a98e2d3122c7e944f17ffa6d0448e Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Wed, 9 Apr 2025 18:46:46 -0700 Subject: netlink: specs: rename rtnetlink specs in accordance with family name The rtnetlink family names are set to rt-$name within the YAML but the files are called rt_$name. C codegen assumes that the generated file name will match the family. The use of dashes is in line with our general expectation that name properties in the spec use dashes not underscores (even tho, as Donald points out most genl families use underscores in the name). We have 3 un-ideal options to choose from: - accept the slight inconsistency with old families using _, or - accept the slight annoyance with all languages having to do s/-/_/ when looking up family ID, or - accept the inconsistency with all name properties in new YAML spec being separated with - and just the family name always using _. Pick option 1 and rename the rtnl spec files. Reviewed-by: Jacob Keller Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250410014658.782120-2-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-addr.yaml | 204 ++ Documentation/netlink/specs/rt-link.yaml | 2523 ++++++++++++++++++++ Documentation/netlink/specs/rt-neigh.yaml | 442 ++++ Documentation/netlink/specs/rt-route.yaml | 336 +++ Documentation/netlink/specs/rt-rule.yaml | 269 +++ Documentation/netlink/specs/rt_addr.yaml | 204 -- Documentation/netlink/specs/rt_link.yaml | 2523 -------------------- Documentation/netlink/specs/rt_neigh.yaml | 442 ---- Documentation/netlink/specs/rt_route.yaml | 336 --- Documentation/netlink/specs/rt_rule.yaml | 269 --- .../userspace-api/netlink/netlink-raw.rst | 2 +- 11 files changed, 3775 insertions(+), 3775 deletions(-) create mode 100644 Documentation/netlink/specs/rt-addr.yaml create mode 100644 Documentation/netlink/specs/rt-link.yaml create mode 100644 Documentation/netlink/specs/rt-neigh.yaml create mode 100644 Documentation/netlink/specs/rt-route.yaml create mode 100644 Documentation/netlink/specs/rt-rule.yaml delete mode 100644 Documentation/netlink/specs/rt_addr.yaml delete mode 100644 Documentation/netlink/specs/rt_link.yaml delete mode 100644 Documentation/netlink/specs/rt_neigh.yaml delete mode 100644 Documentation/netlink/specs/rt_route.yaml delete mode 100644 Documentation/netlink/specs/rt_rule.yaml (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-addr.yaml b/Documentation/netlink/specs/rt-addr.yaml new file mode 100644 index 000000000000..df6b23f06a22 --- /dev/null +++ b/Documentation/netlink/specs/rt-addr.yaml @@ -0,0 +1,204 @@ +# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) + +name: rt-addr +protocol: netlink-raw +protonum: 0 + +doc: + Address configuration over rtnetlink. + +definitions: + - + name: ifaddrmsg + type: struct + members: + - + name: ifa-family + type: u8 + - + name: ifa-prefixlen + type: u8 + - + name: ifa-flags + type: u8 + enum: ifa-flags + enum-as-flags: true + - + name: ifa-scope + type: u8 + - + name: ifa-index + type: u32 + - + name: ifa-cacheinfo + type: struct + members: + - + name: ifa-prefered + type: u32 + - + name: ifa-valid + type: u32 + - + name: cstamp + type: u32 + - + name: tstamp + type: u32 + + - + name: ifa-flags + type: flags + entries: + - + name: secondary + - + name: nodad + - + name: optimistic + - + name: dadfailed + - + name: homeaddress + - + name: deprecated + - + name: tentative + - + name: permanent + - + name: managetempaddr + - + name: noprefixroute + - + name: mcautojoin + - + name: stable-privacy + +attribute-sets: + - + name: addr-attrs + name-prefix: ifa- + attributes: + - + name: address + type: binary + display-hint: ipv4 + - + name: local + type: binary + display-hint: ipv4 + - + name: label + type: string + - + name: broadcast + type: binary + display-hint: ipv4 + - + name: anycast + type: binary + - + name: cacheinfo + type: binary + struct: ifa-cacheinfo + - + name: multicast + type: binary + - + name: flags + type: u32 + enum: ifa-flags + enum-as-flags: true + - + name: rt-priority + type: u32 + - + name: target-netnsid + type: binary + - + name: proto + type: u8 + + +operations: + fixed-header: ifaddrmsg + enum-model: directional + list: + - + name: newaddr + doc: Add new address + attribute-set: addr-attrs + do: + request: + value: 20 + attributes: &ifaddr-all + - ifa-family + - ifa-flags + - ifa-prefixlen + - ifa-scope + - ifa-index + - address + - label + - local + - cacheinfo + - + name: deladdr + doc: Remove address + attribute-set: addr-attrs + do: + request: + value: 21 + attributes: + - ifa-family + - ifa-flags + - ifa-prefixlen + - ifa-scope + - ifa-index + - address + - local + - + name: getaddr + doc: Dump address information. + attribute-set: addr-attrs + dump: + request: + value: 22 + attributes: + - ifa-index + reply: + value: 20 + attributes: *ifaddr-all + - + name: getmulticast + doc: Get / dump IPv4/IPv6 multicast addresses. + attribute-set: addr-attrs + fixed-header: ifaddrmsg + do: + request: + value: 58 + attributes: + - ifa-family + - ifa-index + reply: + value: 58 + attributes: &mcaddr-attrs + - multicast + - cacheinfo + dump: + request: + value: 58 + attributes: + - ifa-family + reply: + value: 58 + attributes: *mcaddr-attrs + +mcast-groups: + list: + - + name: rtnlgrp-ipv4-ifaddr + value: 5 + - + name: rtnlgrp-ipv6-ifaddr + value: 9 diff --git a/Documentation/netlink/specs/rt-link.yaml b/Documentation/netlink/specs/rt-link.yaml new file mode 100644 index 000000000000..31238455f8e9 --- /dev/null +++ b/Documentation/netlink/specs/rt-link.yaml @@ -0,0 +1,2523 @@ +# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) + +name: rt-link +protocol: netlink-raw +protonum: 0 + +doc: + Link configuration over rtnetlink. + +definitions: + - + name: ifinfo-flags + type: flags + entries: + - + name: up + - + name: broadcast + - + name: debug + - + name: loopback + - + name: point-to-point + - + name: no-trailers + - + name: running + - + name: no-arp + - + name: promisc + - + name: all-multi + - + name: master + - + name: slave + - + name: multicast + - + name: portsel + - + name: auto-media + - + name: dynamic + - + name: lower-up + - + name: dormant + - + name: echo + - + name: vlan-protocols + type: enum + entries: + - + name: 8021q + value: 33024 + - + name: 8021ad + value: 34984 + - + name: rtgenmsg + type: struct + members: + - + name: family + type: u8 + - + name: ifinfomsg + type: struct + members: + - + name: ifi-family + type: u8 + - + name: pad + type: pad + len: 1 + - + name: ifi-type + type: u16 + - + name: ifi-index + type: s32 + - + name: ifi-flags + type: u32 + enum: ifinfo-flags + enum-as-flags: true + - + name: ifi-change + type: u32 + - + name: ifla-bridge-id + type: struct + members: + - + name: prio + type: u16 + - + name: addr + type: binary + len: 6 + display-hint: mac + - + name: ifla-cacheinfo + type: struct + members: + - + name: max-reasm-len + type: u32 + - + name: tstamp + type: u32 + - + name: reachable-time + type: s32 + - + name: retrans-time + type: u32 + - + name: rtnl-link-stats + type: struct + members: + - + name: rx-packets + type: u32 + - + name: tx-packets + type: u32 + - + name: rx-bytes + type: u32 + - + name: tx-bytes + type: u32 + - + name: rx-errors + type: u32 + - + name: tx-errors + type: u32 + - + name: rx-dropped + type: u32 + - + name: tx-dropped + type: u32 + - + name: multicast + type: u32 + - + name: collisions + type: u32 + - + name: rx-length-errors + type: u32 + - + name: rx-over-errors + type: u32 + - + name: rx-crc-errors + type: u32 + - + name: rx-frame-errors + type: u32 + - + name: rx-fifo-errors + type: u32 + - + name: rx-missed-errors + type: u32 + - + name: tx-aborted-errors + type: u32 + - + name: tx-carrier-errors + type: u32 + - + name: tx-fifo-errors + type: u32 + - + name: tx-heartbeat-errors + type: u32 + - + name: tx-window-errors + type: u32 + - + name: rx-compressed + type: u32 + - + name: tx-compressed + type: u32 + - + name: rx-nohandler + type: u32 + - + name: rtnl-link-stats64 + type: struct + members: + - + name: rx-packets + type: u64 + - + name: tx-packets + type: u64 + - + name: rx-bytes + type: u64 + - + name: tx-bytes + type: u64 + - + name: rx-errors + type: u64 + - + name: tx-errors + type: u64 + - + name: rx-dropped + type: u64 + - + name: tx-dropped + type: u64 + - + name: multicast + type: u64 + - + name: collisions + type: u64 + - + name: rx-length-errors + type: u64 + - + name: rx-over-errors + type: u64 + - + name: rx-crc-errors + type: u64 + - + name: rx-frame-errors + type: u64 + - + name: rx-fifo-errors + type: u64 + - + name: rx-missed-errors + type: u64 + - + name: tx-aborted-errors + type: u64 + - + name: tx-carrier-errors + type: u64 + - + name: tx-fifo-errors + type: u64 + - + name: tx-heartbeat-errors + type: u64 + - + name: tx-window-errors + type: u64 + - + name: rx-compressed + type: u64 + - + name: tx-compressed + type: u64 + - + name: rx-nohandler + type: u64 + - + name: rx-otherhost-dropped + type: u64 + - + name: rtnl-link-ifmap + type: struct + members: + - + name: mem-start + type: u64 + - + name: mem-end + type: u64 + - + name: base-addr + type: u64 + - + name: irq + type: u16 + - + name: dma + type: u8 + - + name: port + type: u8 + - + name: ipv4-devconf + type: struct + members: + - + name: forwarding + type: u32 + - + name: mc-forwarding + type: u32 + - + name: proxy-arp + type: u32 + - + name: accept-redirects + type: u32 + - + name: secure-redirects + type: u32 + - + name: send-redirects + type: u32 + - + name: shared-media + type: u32 + - + name: rp-filter + type: u32 + - + name: accept-source-route + type: u32 + - + name: bootp-relay + type: u32 + - + name: log-martians + type: u32 + - + name: tag + type: u32 + - + name: arpfilter + type: u32 + - + name: medium-id + type: u32 + - + name: noxfrm + type: u32 + - + name: nopolicy + type: u32 + - + name: force-igmp-version + type: u32 + - + name: arp-announce + type: u32 + - + name: arp-ignore + type: u32 + - + name: promote-secondaries + type: u32 + - + name: arp-accept + type: u32 + - + name: arp-notify + type: u32 + - + name: accept-local + type: u32 + - + name: src-vmark + type: u32 + - + name: proxy-arp-pvlan + type: u32 + - + name: route-localnet + type: u32 + - + name: igmpv2-unsolicited-report-interval + type: u32 + - + name: igmpv3-unsolicited-report-interval + type: u32 + - + name: ignore-routes-with-linkdown + type: u32 + - + name: drop-unicast-in-l2-multicast + type: u32 + - + name: drop-gratuitous-arp + type: u32 + - + name: bc-forwarding + type: u32 + - + name: arp-evict-nocarrier + type: u32 + - + name: ipv6-devconf + type: struct + members: + - + name: forwarding + type: u32 + - + name: hoplimit + type: u32 + - + name: mtu6 + type: u32 + - + name: accept-ra + type: u32 + - + name: accept-redirects + type: u32 + - + name: autoconf + type: u32 + - + name: dad-transmits + type: u32 + - + name: rtr-solicits + type: u32 + - + name: rtr-solicit-interval + type: u32 + - + name: rtr-solicit-delay + type: u32 + - + name: use-tempaddr + type: u32 + - + name: temp-valid-lft + type: u32 + - + name: temp-prefered-lft + type: u32 + - + name: regen-max-retry + type: u32 + - + name: max-desync-factor + type: u32 + - + name: max-addresses + type: u32 + - + name: force-mld-version + type: u32 + - + name: accept-ra-defrtr + type: u32 + - + name: accept-ra-pinfo + type: u32 + - + name: accept-ra-rtr-pref + type: u32 + - + name: rtr-probe-interval + type: u32 + - + name: accept-ra-rt-info-max-plen + type: u32 + - + name: proxy-ndp + type: u32 + - + name: optimistic-dad + type: u32 + - + name: accept-source-route + type: u32 + - + name: mc-forwarding + type: u32 + - + name: disable-ipv6 + type: u32 + - + name: accept-dad + type: u32 + - + name: force-tllao + type: u32 + - + name: ndisc-notify + type: u32 + - + name: mldv1-unsolicited-report-interval + type: u32 + - + name: mldv2-unsolicited-report-interval + type: u32 + - + name: suppress-frag-ndisc + type: u32 + - + name: accept-ra-from-local + type: u32 + - + name: use-optimistic + type: u32 + - + name: accept-ra-mtu + type: u32 + - + name: stable-secret + type: u32 + - + name: use-oif-addrs-only + type: u32 + - + name: accept-ra-min-hop-limit + type: u32 + - + name: ignore-routes-with-linkdown + type: u32 + - + name: drop-unicast-in-l2-multicast + type: u32 + - + name: drop-unsolicited-na + type: u32 + - + name: keep-addr-on-down + type: u32 + - + name: rtr-solicit-max-interval + type: u32 + - + name: seg6-enabled + type: u32 + - + name: seg6-require-hmac + type: u32 + - + name: enhanced-dad + type: u32 + - + name: addr-gen-mode + type: u8 + - + name: disable-policy + type: u32 + - + name: accept-ra-rt-info-min-plen + type: u32 + - + name: ndisc-tclass + type: u32 + - + name: rpl-seg-enabled + type: u32 + - + name: ra-defrtr-metric + type: u32 + - + name: ioam6-enabled + type: u32 + - + name: ioam6-id + type: u32 + - + name: ioam6-id-wide + type: u32 + - + name: ndisc-evict-nocarrier + type: u32 + - + name: accept-untracked-na + type: u32 + - + name: ifla-icmp6-stats + type: struct + members: + - + name: inmsgs + type: u64 + - + name: inerrors + type: u64 + - + name: outmsgs + type: u64 + - + name: outerrors + type: u64 + - + name: csumerrors + type: u64 + - + name: ratelimithost + type: u64 + - + name: ifla-inet6-stats + type: struct + members: + - + name: inpkts + type: u64 + - + name: inoctets + type: u64 + - + name: indelivers + type: u64 + - + name: outforwdatagrams + type: u64 + - + name: outpkts + type: u64 + - + name: outoctets + type: u64 + - + name: inhdrerrors + type: u64 + - + name: intoobigerrors + type: u64 + - + name: innoroutes + type: u64 + - + name: inaddrerrors + type: u64 + - + name: inunknownprotos + type: u64 + - + name: intruncatedpkts + type: u64 + - + name: indiscards + type: u64 + - + name: outdiscards + type: u64 + - + name: outnoroutes + type: u64 + - + name: reasmtimeout + type: u64 + - + name: reasmreqds + type: u64 + - + name: reasmoks + type: u64 + - + name: reasmfails + type: u64 + - + name: fragoks + type: u64 + - + name: fragfails + type: u64 + - + name: fragcreates + type: u64 + - + name: inmcastpkts + type: u64 + - + name: outmcastpkts + type: u64 + - + name: inbcastpkts + type: u64 + - + name: outbcastpkts + type: u64 + - + name: inmcastoctets + type: u64 + - + name: outmcastoctets + type: u64 + - + name: inbcastoctets + type: u64 + - + name: outbcastoctets + type: u64 + - + name: csumerrors + type: u64 + - + name: noectpkts + type: u64 + - + name: ect1-pkts + type: u64 + - + name: ect0-pkts + type: u64 + - + name: cepkts + type: u64 + - + name: reasm-overlaps + type: u64 + - name: br-boolopt-multi + type: struct + members: + - + name: optval + type: u32 + - + name: optmask + type: u32 + - + name: if_stats_msg + type: struct + members: + - + name: family + type: u8 + - + name: pad + type: pad + len: 3 + - + name: ifindex + type: u32 + - + name: filter-mask + type: u32 + - + name: ifla-vlan-flags + type: struct + members: + - + name: flags + type: u32 + enum: vlan-flags + enum-as-flags: true + - + name: mask + type: u32 + display-hint: hex + - + name: vlan-flags + type: flags + entries: + - reorder-hdr + - gvrp + - loose-binding + - mvrp + - bridge-binding + - + name: ifla-vlan-qos-mapping + type: struct + members: + - + name: from + type: u32 + - + name: to + type: u32 + - + name: ifla-geneve-port-range + type: struct + members: + - + name: low + type: u16 + byte-order: big-endian + - + name: high + type: u16 + byte-order: big-endian + - + name: ifla-vf-mac + type: struct + members: + - + name: vf + type: u32 + - + name: mac + type: binary + len: 32 + - + name: ifla-vf-vlan + type: struct + members: + - + name: vf + type: u32 + - + name: vlan + type: u32 + - + name: qos + type: u32 + - + name: ifla-vf-tx-rate + type: struct + members: + - + name: vf + type: u32 + - + name: rate + type: u32 + - + name: ifla-vf-spoofchk + type: struct + members: + - + name: vf + type: u32 + - + name: setting + type: u32 + - + name: ifla-vf-link-state + type: struct + members: + - + name: vf + type: u32 + - + name: link-state + type: u32 + enum: ifla-vf-link-state-enum + - + name: ifla-vf-link-state-enum + type: enum + entries: + - auto + - enable + - disable + - + name: ifla-vf-rate + type: struct + members: + - + name: vf + type: u32 + - + name: min-tx-rate + type: u32 + - + name: max-tx-rate + type: u32 + - + name: ifla-vf-rss-query-en + type: struct + members: + - + name: vf + type: u32 + - + name: setting + type: u32 + - + name: ifla-vf-trust + type: struct + members: + - + name: vf + type: u32 + - + name: setting + type: u32 + - + name: ifla-vf-guid + type: struct + members: + - + name: vf + type: u32 + - + name: guid + type: u64 + - + name: ifla-vf-vlan-info + type: struct + members: + - + name: vf + type: u32 + - + name: vlan + type: u32 + - + name: qos + type: u32 + - + name: vlan-proto + type: u32 + - + name: rtext-filter + type: flags + entries: + - vf + - brvlan + - brvlan-compressed + - skip-stats + - mrp + - cfm-config + - cfm-status + - mst + - + name: netkit-policy + type: enum + entries: + - + name: forward + value: 0 + - + name: blackhole + value: 2 + - + name: netkit-mode + type: enum + entries: + - name: l2 + - name: l3 + + - + name: netkit-scrub + type: enum + entries: + - name: none + - name: default + +attribute-sets: + - + name: link-attrs + name-prefix: ifla- + attributes: + - + name: address + type: binary + display-hint: mac + - + name: broadcast + type: binary + display-hint: mac + - + name: ifname + type: string + - + name: mtu + type: u32 + - + name: link + type: u32 + - + name: qdisc + type: string + - + name: stats + type: binary + struct: rtnl-link-stats + - + name: cost + type: string + - + name: priority + type: string + - + name: master + type: u32 + - + name: wireless + type: string + - + name: protinfo + type: string + - + name: txqlen + type: u32 + - + name: map + type: binary + struct: rtnl-link-ifmap + - + name: weight + type: u32 + - + name: operstate + type: u8 + - + name: linkmode + type: u8 + - + name: linkinfo + type: nest + nested-attributes: linkinfo-attrs + - + name: net-ns-pid + type: u32 + - + name: ifalias + type: string + - + name: num-vf + type: u32 + - + name: vfinfo-list + type: nest + nested-attributes: vfinfo-list-attrs + - + name: stats64 + type: binary + struct: rtnl-link-stats64 + - + name: vf-ports + type: nest + nested-attributes: vf-ports-attrs + - + name: port-self + type: nest + nested-attributes: port-self-attrs + - + name: af-spec + type: nest + nested-attributes: af-spec-attrs + - + name: group + type: u32 + - + name: net-ns-fd + type: u32 + - + name: ext-mask + type: u32 + enum: rtext-filter + enum-as-flags: true + - + name: promiscuity + type: u32 + - + name: num-tx-queues + type: u32 + - + name: num-rx-queues + type: u32 + - + name: carrier + type: u8 + - + name: phys-port-id + type: binary + - + name: carrier-changes + type: u32 + - + name: phys-switch-id + type: binary + - + name: link-netnsid + type: s32 + - + name: phys-port-name + type: string + - + name: proto-down + type: u8 + - + name: gso-max-segs + type: u32 + - + name: gso-max-size + type: u32 + - + name: pad + type: pad + - + name: xdp + type: nest + nested-attributes: xdp-attrs + - + name: event + type: u32 + - + name: new-netnsid + type: s32 + - + name: target-netnsid + type: s32 + - + name: carrier-up-count + type: u32 + - + name: carrier-down-count + type: u32 + - + name: new-ifindex + type: s32 + - + name: min-mtu + type: u32 + - + name: max-mtu + type: u32 + - + name: prop-list + type: nest + nested-attributes: link-attrs + - + name: alt-ifname + type: string + multi-attr: true + - + name: perm-address + type: binary + display-hint: mac + - + name: proto-down-reason + type: string + - + name: parent-dev-name + type: string + - + name: parent-dev-bus-name + type: string + - + name: gro-max-size + type: u32 + - + name: tso-max-size + type: u32 + - + name: tso-max-segs + type: u32 + - + name: allmulti + type: u32 + - + name: devlink-port + type: binary + - + name: gso-ipv4-max-size + type: u32 + - + name: gro-ipv4-max-size + type: u32 + - + name: dpll-pin + type: nest + nested-attributes: link-dpll-pin-attrs + - + name: max-pacing-offload-horizon + type: uint + doc: EDT offload horizon supported by the device (in nsec). + - + name: netns-immutable + type: u8 + - + name: af-spec-attrs + attributes: + - + name: "inet" + type: nest + value: 2 + nested-attributes: ifla-attrs + - + name: "inet6" + type: nest + value: 10 + nested-attributes: ifla6-attrs + - + name: "mctp" + type: nest + value: 45 + nested-attributes: mctp-attrs + - + name: vfinfo-list-attrs + attributes: + - + name: info + type: nest + nested-attributes: vfinfo-attrs + multi-attr: true + - + name: vfinfo-attrs + attributes: + - + name: mac + type: binary + struct: ifla-vf-mac + - + name: vlan + type: binary + struct: ifla-vf-vlan + - + name: tx-rate + type: binary + struct: ifla-vf-tx-rate + - + name: spoofchk + type: binary + struct: ifla-vf-spoofchk + - + name: link-state + type: binary + struct: ifla-vf-link-state + - + name: rate + type: binary + struct: ifla-vf-rate + - + name: rss-query-en + type: binary + struct: ifla-vf-rss-query-en + - + name: stats + type: nest + nested-attributes: vf-stats-attrs + - + name: trust + type: binary + struct: ifla-vf-trust + - + name: ib-node-guid + type: binary + struct: ifla-vf-guid + - + name: ib-port-guid + type: binary + struct: ifla-vf-guid + - + name: vlan-list + type: nest + nested-attributes: vf-vlan-attrs + - + name: broadcast + type: binary + - + name: vf-stats-attrs + attributes: + - + name: rx-packets + type: u64 + value: 0 + - + name: tx-packets + type: u64 + - + name: rx-bytes + type: u64 + - + name: tx-bytes + type: u64 + - + name: broadcast + type: u64 + - + name: multicast + type: u64 + - + name: pad + type: pad + - + name: rx-dropped + type: u64 + - + name: tx-dropped + type: u64 + - + name: vf-vlan-attrs + attributes: + - + name: info + type: binary + struct: ifla-vf-vlan-info + multi-attr: true + - + name: vf-ports-attrs + attributes: [] + - + name: port-self-attrs + attributes: [] + - + name: linkinfo-attrs + attributes: + - + name: kind + type: string + - + name: data + type: sub-message + sub-message: linkinfo-data-msg + selector: kind + - + name: xstats + type: binary + - + name: slave-kind + type: string + - + name: slave-data + type: sub-message + sub-message: linkinfo-member-data-msg + selector: slave-kind + - + name: linkinfo-bond-attrs + name-prefix: ifla-bond- + attributes: + - + name: mode + type: u8 + - + name: active-slave + type: u32 + - + name: miimon + type: u32 + - + name: updelay + type: u32 + - + name: downdelay + type: u32 + - + name: use-carrier + type: u8 + - + name: arp-interval + type: u32 + - + name: arp-ip-target + type: indexed-array + sub-type: u32 + byte-order: big-endian + display-hint: ipv4 + - + name: arp-validate + type: u32 + - + name: arp-all-targets + type: u32 + - + name: primary + type: u32 + - + name: primary-reselect + type: u8 + - + name: fail-over-mac + type: u8 + - + name: xmit-hash-policy + type: u8 + - + name: resend-igmp + type: u32 + - + name: num-peer-notif + type: u8 + - + name: all-slaves-active + type: u8 + - + name: min-links + type: u32 + - + name: lp-interval + type: u32 + - + name: packets-per-slave + type: u32 + - + name: ad-lacp-rate + type: u8 + - + name: ad-select + type: u8 + - + name: ad-info + type: nest + nested-attributes: bond-ad-info-attrs + - + name: ad-actor-sys-prio + type: u16 + - + name: ad-user-port-key + type: u16 + - + name: ad-actor-system + type: binary + display-hint: mac + - + name: tlb-dynamic-lb + type: u8 + - + name: peer-notif-delay + type: u32 + - + name: ad-lacp-active + type: u8 + - + name: missed-max + type: u8 + - + name: ns-ip6-target + type: indexed-array + sub-type: binary + display-hint: ipv6 + - + name: coupled-control + type: u8 + - + name: bond-ad-info-attrs + name-prefix: ifla-bond-ad-info- + attributes: + - + name: aggregator + type: u16 + - + name: num-ports + type: u16 + - + name: actor-key + type: u16 + - + name: partner-key + type: u16 + - + name: partner-mac + type: binary + display-hint: mac + - + name: bond-slave-attrs + name-prefix: ifla-bond-slave- + attributes: + - + name: state + type: u8 + - + name: mii-status + type: u8 + - + name: link-failure-count + type: u32 + - + name: perm-hwaddr + type: binary + display-hint: mac + - + name: queue-id + type: u16 + - + name: ad-aggregator-id + type: u16 + - + name: ad-actor-oper-port-state + type: u8 + - + name: ad-partner-oper-port-state + type: u16 + - + name: prio + type: u32 + - + name: linkinfo-bridge-attrs + name-prefix: ifla-br- + attributes: + - + name: forward-delay + type: u32 + - + name: hello-time + type: u32 + - + name: max-age + type: u32 + - + name: ageing-time + type: u32 + - + name: stp-state + type: u32 + - + name: priority + type: u16 + - + name: vlan-filtering + type: u8 + - + name: vlan-protocol + type: u16 + - + name: group-fwd-mask + type: u16 + - + name: root-id + type: binary + struct: ifla-bridge-id + - + name: bridge-id + type: binary + struct: ifla-bridge-id + - + name: root-port + type: u16 + - + name: root-path-cost + type: u32 + - + name: topology-change + type: u8 + - + name: topology-change-detected + type: u8 + - + name: hello-timer + type: u64 + - + name: tcn-timer + type: u64 + - + name: topology-change-timer + type: u64 + - + name: gc-timer + type: u64 + - + name: group-addr + type: binary + display-hint: mac + - + name: fdb-flush + type: binary + - + name: mcast-router + type: u8 + - + name: mcast-snooping + type: u8 + - + name: mcast-query-use-ifaddr + type: u8 + - + name: mcast-querier + type: u8 + - + name: mcast-hash-elasticity + type: u32 + - + name: mcast-hash-max + type: u32 + - + name: mcast-last-member-cnt + type: u32 + - + name: mcast-startup-query-cnt + type: u32 + - + name: mcast-last-member-intvl + type: u64 + - + name: mcast-membership-intvl + type: u64 + - + name: mcast-querier-intvl + type: u64 + - + name: mcast-query-intvl + type: u64 + - + name: mcast-query-response-intvl + type: u64 + - + name: mcast-startup-query-intvl + type: u64 + - + name: nf-call-iptables + type: u8 + - + name: nf-call-ip6-tables + type: u8 + - + name: nf-call-arptables + type: u8 + - + name: vlan-default-pvid + type: u16 + - + name: pad + type: pad + - + name: vlan-stats-enabled + type: u8 + - + name: mcast-stats-enabled + type: u8 + - + name: mcast-igmp-version + type: u8 + - + name: mcast-mld-version + type: u8 + - + name: vlan-stats-per-port + type: u8 + - + name: multi-boolopt + type: binary + struct: br-boolopt-multi + - + name: mcast-querier-state + type: binary + - + name: fdb-n-learned + type: u32 + - + name: fdb-max-learned + type: u32 + - + name: linkinfo-brport-attrs + name-prefix: ifla-brport- + attributes: + - + name: state + type: u8 + - + name: priority + type: u16 + - + name: cost + type: u32 + - + name: mode + type: flag + - + name: guard + type: flag + - + name: protect + type: flag + - + name: fast-leave + type: flag + - + name: learning + type: flag + - + name: unicast-flood + type: flag + - + name: proxyarp + type: flag + - + name: learning-sync + type: flag + - + name: proxyarp-wifi + type: flag + - + name: root-id + type: binary + struct: ifla-bridge-id + - + name: bridge-id + type: binary + struct: ifla-bridge-id + - + name: designated-port + type: u16 + - + name: designated-cost + type: u16 + - + name: id + type: u16 + - + name: "no" + type: u16 + - + name: topology-change-ack + type: u8 + - + name: config-pending + type: u8 + - + name: message-age-timer + type: u64 + - + name: forward-delay-timer + type: u64 + - + name: hold-timer + type: u64 + - + name: flush + type: flag + - + name: multicast-router + type: u8 + - + name: pad + type: pad + - + name: mcast-flood + type: flag + - + name: mcast-to-ucast + type: flag + - + name: vlan-tunnel + type: flag + - + name: bcast-flood + type: flag + - + name: group-fwd-mask + type: u16 + - + name: neigh-suppress + type: flag + - + name: isolated + type: flag + - + name: backup-port + type: u32 + - + name: mrp-ring-open + type: flag + - + name: mrp-in-open + type: flag + - + name: mcast-eht-hosts-limit + type: u32 + - + name: mcast-eht-hosts-cnt + type: u32 + - + name: locked + type: flag + - + name: mab + type: flag + - + name: mcast-n-groups + type: u32 + - + name: mcast-max-groups + type: u32 + - + name: neigh-vlan-suppress + type: flag + - + name: backup-nhid + type: u32 + - + name: linkinfo-gre-attrs + name-prefix: ifla-gre- + attributes: + - + name: link + type: u32 + - + name: iflags + type: u16 + - + name: oflags + type: u16 + - + name: ikey + type: u32 + - + name: okey + type: u32 + - + name: local + type: binary + display-hint: ipv4 + - + name: remote + type: binary + display-hint: ipv4 + - + name: ttl + type: u8 + - + name: tos + type: u8 + - + name: pmtudisc + type: u8 + - + name: encap-limit + type: u32 + - + name: flowinfo + type: u32 + - + name: flags + type: u32 + - + name: encap-type + type: u16 + - + name: encap-flags + type: u16 + - + name: encap-sport + type: u16 + - + name: encap-dport + type: u16 + - + name: collect-metadata + type: flag + - + name: ignore-df + type: u8 + - + name: fwmark + type: u32 + - + name: erspan-index + type: u32 + - + name: erspan-ver + type: u8 + - + name: erspan-dir + type: u8 + - + name: erspan-hwid + type: u16 + - + name: linkinfo-vti-attrs + name-prefix: ifla-vti- + attributes: + - + name: link + type: u32 + - + name: ikey + type: u32 + - + name: okey + type: u32 + - + name: local + type: binary + display-hint: ipv4 + - + name: remote + type: binary + display-hint: ipv4 + - + name: fwmark + type: u32 + - + name: linkinfo-vti6-attrs + subset-of: linkinfo-vti-attrs + attributes: + - + name: link + - + name: ikey + - + name: okey + - + name: local + display-hint: ipv6 + - + name: remote + display-hint: ipv6 + - + name: fwmark + - + name: linkinfo-geneve-attrs + name-prefix: ifla-geneve- + attributes: + - + name: id + type: u32 + - + name: remote + type: binary + display-hint: ipv4 + - + name: ttl + type: u8 + - + name: tos + type: u8 + - + name: port + type: u16 + - + name: collect-metadata + type: flag + - + name: remote6 + type: binary + display-hint: ipv6 + - + name: udp-csum + type: u8 + - + name: udp-zero-csum6-tx + type: u8 + - + name: udp-zero-csum6-rx + type: u8 + - + name: label + type: u32 + - + name: ttl-inherit + type: u8 + - + name: df + type: u8 + - + name: inner-proto-inherit + type: flag + - + name: port-range + type: binary + struct: ifla-geneve-port-range + - + name: linkinfo-iptun-attrs + name-prefix: ifla-iptun- + attributes: + - + name: link + type: u32 + - + name: local + type: binary + display-hint: ipv4 + - + name: remote + type: binary + display-hint: ipv4 + - + name: ttl + type: u8 + - + name: tos + type: u8 + - + name: encap-limit + type: u8 + - + name: flowinfo + type: u32 + - + name: flags + type: u16 + - + name: proto + type: u8 + - + name: pmtudisc + type: u8 + - + name: 6rd-prefix + type: binary + display-hint: ipv6 + - + name: 6rd-relay-prefix + type: binary + display-hint: ipv4 + - + name: 6rd-prefixlen + type: u16 + - + name: 6rd-relay-prefixlen + type: u16 + - + name: encap-type + type: u16 + - + name: encap-flags + type: u16 + - + name: encap-sport + type: u16 + - + name: encap-dport + type: u16 + - + name: collect-metadata + type: flag + - + name: fwmark + type: u32 + - + name: linkinfo-ip6tnl-attrs + subset-of: linkinfo-iptun-attrs + attributes: + - + name: link + - + name: local + display-hint: ipv6 + - + name: remote + display-hint: ipv6 + - + name: ttl + - + name: encap-limit + - + name: flowinfo + - + name: flags + # ip6tnl unlike ipip and sit has 32b flags + type: u32 + - + name: proto + - + name: encap-type + - + name: encap-flags + - + name: encap-sport + - + name: encap-dport + - + name: collect-metadata + - + name: fwmark + - + name: linkinfo-tun-attrs + name-prefix: ifla-tun- + attributes: + - + name: owner + type: u32 + - + name: group + type: u32 + - + name: type + type: u8 + - + name: pi + type: u8 + - + name: vnet-hdr + type: u8 + - + name: persist + type: u8 + - + name: multi-queue + type: u8 + - + name: num-queues + type: u32 + - + name: num-disabled-queues + type: u32 + - + name: linkinfo-vlan-attrs + name-prefix: ifla-vlan- + attributes: + - + name: id + type: u16 + - + name: flag + type: binary + struct: ifla-vlan-flags + - + name: egress-qos + type: nest + nested-attributes: ifla-vlan-qos + - + name: ingress-qos + type: nest + nested-attributes: ifla-vlan-qos + - + name: protocol + type: u16 + enum: vlan-protocols + byte-order: big-endian + - + name: ifla-vlan-qos + name-prefix: ifla-vlan-qos + attributes: + - + name: mapping + type: binary + multi-attr: true + struct: ifla-vlan-qos-mapping + - + name: linkinfo-vrf-attrs + name-prefix: ifla-vrf- + attributes: + - + name: table + type: u32 + - + name: xdp-attrs + attributes: + - + name: fd + type: s32 + - + name: attached + type: u8 + - + name: flags + type: u32 + - + name: prog-id + type: u32 + - + name: drv-prog-id + type: u32 + - + name: skb-prog-id + type: u32 + - + name: hw-prog-id + type: u32 + - + name: expected-fd + type: s32 + - + name: ifla-attrs + attributes: + - + name: conf + type: binary + struct: ipv4-devconf + - + name: ifla6-attrs + attributes: + - + name: flags + type: u32 + - + name: conf + type: binary + struct: ipv6-devconf + - + name: stats + type: binary + struct: ifla-inet6-stats + - + name: mcast + type: binary + - + name: cacheinfo + type: binary + struct: ifla-cacheinfo + - + name: icmp6-stats + type: binary + struct: ifla-icmp6-stats + - + name: token + type: binary + - + name: addr-gen-mode + type: u8 + - + name: ra-mtu + type: u32 + - + name: mctp-attrs + attributes: + - + name: mctp-net + type: u32 + - + name: phys-binding + type: u8 + - + name: stats-attrs + name-prefix: ifla-stats- + attributes: + - + name: link-64 + type: binary + struct: rtnl-link-stats64 + - + name: link-xstats + type: binary + - + name: link-xstats-slave + type: binary + - + name: link-offload-xstats + type: nest + nested-attributes: link-offload-xstats + - + name: af-spec + type: binary + - + name: link-offload-xstats + attributes: + - + name: cpu-hit + type: binary + - + name: hw-s-info + type: indexed-array + sub-type: nest + nested-attributes: hw-s-info-one + - + name: l3-stats + type: binary + - + name: hw-s-info-one + attributes: + - + name: request + type: u8 + - + name: used + type: u8 + - + name: link-dpll-pin-attrs + attributes: + - + name: id + type: u32 + - + name: linkinfo-netkit-attrs + name-prefix: ifla-netkit- + attributes: + - + name: peer-info + type: binary + - + name: primary + type: u8 + - + name: policy + type: u32 + enum: netkit-policy + - + name: peer-policy + type: u32 + enum: netkit-policy + - + name: mode + type: u32 + enum: netkit-mode + - + name: scrub + type: u32 + enum: netkit-scrub + - + name: peer-scrub + type: u32 + enum: netkit-scrub + - + name: headroom + type: u16 + - + name: tailroom + type: u16 + +sub-messages: + - + name: linkinfo-data-msg + formats: + - + value: bond + attribute-set: linkinfo-bond-attrs + - + value: bridge + attribute-set: linkinfo-bridge-attrs + - + value: erspan + attribute-set: linkinfo-gre-attrs + - + value: gre + attribute-set: linkinfo-gre-attrs + - + value: gretap + attribute-set: linkinfo-gre-attrs + - + value: geneve + attribute-set: linkinfo-geneve-attrs + - + value: ipip + attribute-set: linkinfo-iptun-attrs + - + value: ip6tnl + attribute-set: linkinfo-ip6tnl-attrs + - + value: sit + attribute-set: linkinfo-iptun-attrs + - + value: tun + attribute-set: linkinfo-tun-attrs + - + value: vlan + attribute-set: linkinfo-vlan-attrs + - + value: vrf + attribute-set: linkinfo-vrf-attrs + - + value: vti + attribute-set: linkinfo-vti-attrs + - + value: vti6 + attribute-set: linkinfo-vti6-attrs + - + value: netkit + attribute-set: linkinfo-netkit-attrs + - + name: linkinfo-member-data-msg + formats: + - + value: bridge + attribute-set: linkinfo-brport-attrs + - + value: bond + attribute-set: bond-slave-attrs + +operations: + enum-model: directional + list: + - + name: newlink + doc: Create a new link. + attribute-set: link-attrs + fixed-header: ifinfomsg + do: + request: + value: 16 + attributes: &link-new-attrs + - ifi-index + - ifname + - net-ns-pid + - net-ns-fd + - target-netnsid + - link-netnsid + - linkinfo + - group + - num-tx-queues + - num-rx-queues + - address + - broadcast + - mtu + - txqlen + - operstate + - linkmode + - group + - gso-max-size + - gso-max-segs + - gro-max-size + - gso-ipv4-max-size + - gro-ipv4-max-size + - af-spec + - + name: dellink + doc: Delete an existing link. + attribute-set: link-attrs + fixed-header: ifinfomsg + do: + request: + value: 17 + attributes: + - ifi-index + - ifname + - + name: getlink + doc: Get / dump information about a link. + attribute-set: link-attrs + fixed-header: ifinfomsg + do: + request: + value: 18 + attributes: + - ifi-index + - ifname + - alt-ifname + - ext-mask + - target-netnsid + reply: + value: 16 + attributes: &link-all-attrs + - ifi-family + - ifi-type + - ifi-index + - ifi-flags + - ifi-change + - address + - broadcast + - ifname + - mtu + - link + - qdisc + - stats + - cost + - priority + - master + - wireless + - protinfo + - txqlen + - map + - weight + - operstate + - linkmode + - linkinfo + - net-ns-pid + - ifalias + - num-vf + - vfinfo-list + - stats64 + - vf-ports + - port-self + - af-spec + - group + - net-ns-fd + - ext-mask + - promiscuity + - num-tx-queues + - num-rx-queues + - carrier + - phys-port-id + - carrier-changes + - phys-switch-id + - link-netnsid + - phys-port-name + - proto-down + - gso-max-segs + - gso-max-size + - pad + - xdp + - event + - new-netnsid + - if-netnsid + - target-netnsid + - carrier-up-count + - carrier-down-count + - new-ifindex + - min-mtu + - max-mtu + - prop-list + - alt-ifname + - perm-address + - proto-down-reason + - parent-dev-name + - parent-dev-bus-name + - gro-max-size + - tso-max-size + - tso-max-segs + - allmulti + - devlink-port + - gso-ipv4-max-size + - gro-ipv4-max-size + dump: + request: + value: 18 + attributes: + - target-netnsid + - ext-mask + - master + - linkinfo + reply: + value: 16 + attributes: *link-all-attrs + - + name: setlink + doc: Set information about a link. + attribute-set: link-attrs + fixed-header: ifinfomsg + do: + request: + value: 19 + attributes: *link-all-attrs + - + name: getstats + doc: Get / dump link stats. + attribute-set: stats-attrs + fixed-header: if_stats_msg + do: + request: + value: 94 + attributes: + - ifindex + reply: + value: 92 + attributes: &link-stats-attrs + - family + - ifindex + - filter-mask + - link-64 + - link-xstats + - link-xstats-slave + - link-offload-xstats + - af-spec + dump: + request: + value: 94 + reply: + value: 92 + attributes: *link-stats-attrs + +mcast-groups: + list: + - + name: rtnlgrp-link + value: 1 + - + name: rtnlgrp-stats + value: 36 diff --git a/Documentation/netlink/specs/rt-neigh.yaml b/Documentation/netlink/specs/rt-neigh.yaml new file mode 100644 index 000000000000..e670b6dc07be --- /dev/null +++ b/Documentation/netlink/specs/rt-neigh.yaml @@ -0,0 +1,442 @@ +# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) + +name: rt-neigh +protocol: netlink-raw +protonum: 0 + +doc: + IP neighbour management over rtnetlink. + +definitions: + - + name: ndmsg + type: struct + members: + - + name: family + type: u8 + - + name: pad + type: pad + len: 3 + - + name: ifindex + type: s32 + - + name: state + type: u16 + enum: nud-state + - + name: flags + type: u8 + enum: ntf-flags + - + name: type + type: u8 + enum: rtm-type + - + name: ndtmsg + type: struct + members: + - + name: family + type: u8 + - + name: pad + type: pad + len: 3 + - + name: nud-state + type: flags + entries: + - incomplete + - reachable + - stale + - delay + - probe + - failed + - noarp + - permanent + - + name: ntf-flags + type: flags + entries: + - use + - self + - master + - proxy + - ext-learned + - offloaded + - sticky + - router + - + name: ntf-ext-flags + type: flags + entries: + - managed + - locked + - + name: rtm-type + type: enum + entries: + - unspec + - unicast + - local + - broadcast + - anycast + - multicast + - blackhole + - unreachable + - prohibit + - throw + - nat + - xresolve + - + name: nda-cacheinfo + type: struct + members: + - + name: confirmed + type: u32 + - + name: used + type: u32 + - + name: updated + type: u32 + - + name: refcnt + type: u32 + - + name: ndt-config + type: struct + members: + - + name: key-len + type: u16 + - + name: entry-size + type: u16 + - + name: entries + type: u32 + - + name: last-flush + type: u32 + - + name: last-rand + type: u32 + - + name: hash-rnd + type: u32 + - + name: hash-mask + type: u32 + - + name: hash-chain-gc + type: u32 + - + name: proxy-qlen + type: u32 + - + name: ndt-stats + type: struct + members: + - + name: allocs + type: u64 + - + name: destroys + type: u64 + - + name: hash-grows + type: u64 + - + name: res-failed + type: u64 + - + name: lookups + type: u64 + - + name: hits + type: u64 + - + name: rcv-probes-mcast + type: u64 + - + name: rcv-probes-ucast + type: u64 + - + name: periodic-gc-runs + type: u64 + - + name: forced-gc-runs + type: u64 + - + name: table-fulls + type: u64 + +attribute-sets: + - + name: neighbour-attrs + attributes: + - + name: unspec + type: binary + value: 0 + - + name: dst + type: binary + display-hint: ipv4 + - + name: lladr + type: binary + display-hint: mac + - + name: cacheinfo + type: binary + struct: nda-cacheinfo + - + name: probes + type: u32 + - + name: vlan + type: u16 + - + name: port + type: u16 + - + name: vni + type: u32 + - + name: ifindex + type: u32 + - + name: master + type: u32 + - + name: link-netnsid + type: s32 + - + name: src-vni + type: u32 + - + name: protocol + type: u8 + - + name: nh-id + type: u32 + - + name: fdb-ext-attrs + type: binary + - + name: flags-ext + type: u32 + enum: ntf-ext-flags + - + name: ndm-state-mask + type: u16 + - + name: ndm-flags-mask + type: u8 + - + name: ndt-attrs + attributes: + - + name: name + type: string + - + name: thresh1 + type: u32 + - + name: thresh2 + type: u32 + - + name: thresh3 + type: u32 + - + name: config + type: binary + struct: ndt-config + - + name: parms + type: nest + nested-attributes: ndtpa-attrs + - + name: stats + type: binary + struct: ndt-stats + - + name: gc-interval + type: u64 + - + name: pad + type: pad + - + name: ndtpa-attrs + attributes: + - + name: ifindex + type: u32 + - + name: refcnt + type: u32 + - + name: reachable-time + type: u64 + - + name: base-reachable-time + type: u64 + - + name: retrans-time + type: u64 + - + name: gc-staletime + type: u64 + - + name: delay-probe-time + type: u64 + - + name: queue-len + type: u32 + - + name: app-probes + type: u32 + - + name: ucast-probes + type: u32 + - + name: mcast-probes + type: u32 + - + name: anycast-delay + type: u64 + - + name: proxy-delay + type: u64 + - + name: proxy-qlen + type: u32 + - + name: locktime + type: u64 + - + name: queue-lenbytes + type: u32 + - + name: mcast-reprobes + type: u32 + - + name: pad + type: pad + - + name: interval-probe-time-ms + type: u64 + +operations: + enum-model: directional + list: + - + name: newneigh + doc: Add new neighbour entry + fixed-header: ndmsg + attribute-set: neighbour-attrs + do: + request: + value: 28 + attributes: &neighbour-all + - dst + - lladdr + - probes + - vlan + - port + - vni + - ifindex + - master + - protocol + - nh-id + - flags-ext + - fdb-ext-attrs + - + name: delneigh + doc: Remove an existing neighbour entry + fixed-header: ndmsg + attribute-set: neighbour-attrs + do: + request: + value: 29 + attributes: + - dst + - ifindex + - + name: delneigh-ntf + doc: Notify a neighbour deletion + value: 29 + notify: delneigh + fixed-header: ndmsg + - + name: getneigh + doc: Get or dump neighbour entries + fixed-header: ndmsg + attribute-set: neighbour-attrs + do: + request: + value: 30 + attributes: + - dst + reply: + value: 28 + attributes: *neighbour-all + dump: + request: + attributes: + - ifindex + - master + reply: + attributes: *neighbour-all + - + name: newneigh-ntf + doc: Notify a neighbour creation + value: 28 + notify: getneigh + fixed-header: ndmsg + - + name: getneightbl + doc: Get or dump neighbour tables + fixed-header: ndtmsg + attribute-set: ndt-attrs + dump: + request: + value: 66 + reply: + value: 64 + attributes: + - name + - thresh1 + - thresh2 + - thresh3 + - config + - parms + - stats + - gc-interval + - + name: setneightbl + doc: Set neighbour tables + fixed-header: ndtmsg + attribute-set: ndt-attrs + do: + request: + value: 67 + attributes: + - name + - thresh1 + - thresh2 + - thresh3 + - parms + - gc-interval + +mcast-groups: + list: + - + name: rtnlgrp-neigh + value: 3 diff --git a/Documentation/netlink/specs/rt-route.yaml b/Documentation/netlink/specs/rt-route.yaml new file mode 100644 index 000000000000..292469c7d4b9 --- /dev/null +++ b/Documentation/netlink/specs/rt-route.yaml @@ -0,0 +1,336 @@ +# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) + +name: rt-route +protocol: netlink-raw +protonum: 0 + +doc: + Route configuration over rtnetlink. + +definitions: + - + name: rtm-type + name-prefix: rtn- + type: enum + entries: + - unspec + - unicast + - local + - broadcast + - anycast + - multicast + - blackhole + - unreachable + - prohibit + - throw + - nat + - xresolve + - + name: rtmsg + type: struct + members: + - + name: rtm-family + type: u8 + - + name: rtm-dst-len + type: u8 + - + name: rtm-src-len + type: u8 + - + name: rtm-tos + type: u8 + - + name: rtm-table + type: u8 + - + name: rtm-protocol + type: u8 + - + name: rtm-scope + type: u8 + - + name: rtm-type + type: u8 + enum: rtm-type + - + name: rtm-flags + type: u32 + - + name: rta-cacheinfo + type: struct + members: + - + name: rta-clntref + type: u32 + - + name: rta-lastuse + type: u32 + - + name: rta-expires + type: u32 + - + name: rta-error + type: u32 + - + name: rta-used + type: u32 + +attribute-sets: + - + name: route-attrs + name-prefix: rta- + attributes: + - + name: dst + type: binary + display-hint: ipv4 + - + name: src + type: binary + display-hint: ipv4 + - + name: iif + type: u32 + - + name: oif + type: u32 + - + name: gateway + type: binary + display-hint: ipv4 + - + name: priority + type: u32 + - + name: prefsrc + type: binary + display-hint: ipv4 + - + name: metrics + type: nest + nested-attributes: metrics + - + name: multipath + type: binary + - + name: protoinfo # not used + type: binary + - + name: flow + type: u32 + - + name: cacheinfo + type: binary + struct: rta-cacheinfo + - + name: session # not used + type: binary + - + name: mp-algo # not used + type: binary + - + name: table + type: u32 + - + name: mark + type: u32 + - + name: mfc-stats + type: binary + - + name: via + type: binary + - + name: newdst + type: binary + - + name: pref + type: u8 + - + name: encap-type + type: u16 + - + name: encap + type: binary # tunnel specific nest + - + name: expires + type: u32 + - + name: pad + type: binary + - + name: uid + type: u32 + - + name: ttl-propagate + type: u8 + - + name: ip-proto + type: u8 + - + name: sport + type: u16 + - + name: dport + type: u16 + - + name: nh-id + type: u32 + - + name: flowlabel + type: u32 + byte-order: big-endian + display-hint: hex + - + name: metrics + name-prefix: rtax- + attributes: + - + name: unspec + type: unused + value: 0 + - + name: lock + type: u32 + - + name: mtu + type: u32 + - + name: window + type: u32 + - + name: rtt + type: u32 + - + name: rttvar + type: u32 + - + name: ssthresh + type: u32 + - + name: cwnd + type: u32 + - + name: advmss + type: u32 + - + name: reordering + type: u32 + - + name: hoplimit + type: u32 + - + name: initcwnd + type: u32 + - + name: features + type: u32 + - + name: rto-min + type: u32 + - + name: initrwnd + type: u32 + - + name: quickack + type: u32 + - + name: cc-algo + type: string + - + name: fastopen-no-cookie + type: u32 + +operations: + enum-model: directional + list: + - + name: getroute + doc: Dump route information. + attribute-set: route-attrs + fixed-header: rtmsg + do: + request: + value: 26 + attributes: + - rtm-family + - src + - rtm-src-len + - dst + - rtm-dst-len + - iif + - oif + - ip-proto + - sport + - dport + - mark + - uid + - flowlabel + reply: + value: 24 + attributes: &all-route-attrs + - rtm-family + - rtm-dst-len + - rtm-src-len + - rtm-tos + - rtm-table + - rtm-protocol + - rtm-scope + - rtm-type + - rtm-flags + - dst + - src + - iif + - oif + - gateway + - priority + - prefsrc + - metrics + - multipath + - flow + - cacheinfo + - table + - mark + - mfc-stats + - via + - newdst + - pref + - encap-type + - encap + - expires + - pad + - uid + - ttl-propagate + - ip-proto + - sport + - dport + - nh-id + - flowlabel + dump: + request: + value: 26 + attributes: + - rtm-family + reply: + value: 24 + attributes: *all-route-attrs + - + name: newroute + doc: Create a new route + attribute-set: route-attrs + fixed-header: rtmsg + do: + request: + value: 24 + attributes: *all-route-attrs + - + name: delroute + doc: Delete an existing route + attribute-set: route-attrs + fixed-header: rtmsg + do: + request: + value: 25 + attributes: *all-route-attrs diff --git a/Documentation/netlink/specs/rt-rule.yaml b/Documentation/netlink/specs/rt-rule.yaml new file mode 100644 index 000000000000..de0938d36541 --- /dev/null +++ b/Documentation/netlink/specs/rt-rule.yaml @@ -0,0 +1,269 @@ +# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) + +name: rt-rule +protocol: netlink-raw +protonum: 0 + +doc: + FIB rule management over rtnetlink. + +definitions: + - + name: rtgenmsg + type: struct + members: + - + name: family + type: u8 + - + name: pad + type: pad + len: 3 + - + name: fib-rule-hdr + type: struct + members: + - + name: family + type: u8 + - + name: dst-len + type: u8 + - + name: src-len + type: u8 + - + name: tos + type: u8 + - + name: table + type: u8 + - + name: res1 + type: pad + len: 1 + - + name: res2 + type: pad + len: 1 + - + name: action + type: u8 + enum: fr-act + - + name: flags + type: u32 + - + name: fr-act + type: enum + entries: + - unspec + - to-tbl + - goto + - nop + - res3 + - res4 + - blackhole + - unreachable + - prohibit + - + name: fib-rule-port-range + type: struct + members: + - + name: start + type: u16 + - + name: end + type: u16 + - + name: fib-rule-uid-range + type: struct + members: + - + name: start + type: u32 + - + name: end + type: u32 + +attribute-sets: + - + name: fib-rule-attrs + attributes: + - + name: dst + type: u32 + - + name: src + type: u32 + - + name: iifname + type: string + - + name: goto + type: u32 + - + name: unused2 + type: pad + - + name: priority + type: u32 + - + name: unused3 + type: pad + - + name: unused4 + type: pad + - + name: unused5 + type: pad + - + name: fwmark + type: u32 + display-hint: hex + - + name: flow + type: u32 + - + name: tun-id + type: u64 + - + name: suppress-ifgroup + type: u32 + - + name: suppress-prefixlen + type: u32 + display-hint: hex + - + name: table + type: u32 + - + name: fwmask + type: u32 + display-hint: hex + - + name: oifname + type: string + - + name: pad + type: pad + - + name: l3mdev + type: u8 + - + name: uid-range + type: binary + struct: fib-rule-uid-range + - + name: protocol + type: u8 + - + name: ip-proto + type: u8 + - + name: sport-range + type: binary + struct: fib-rule-port-range + - + name: dport-range + type: binary + struct: fib-rule-port-range + - + name: dscp + type: u8 + - + name: flowlabel + type: u32 + byte-order: big-endian + display-hint: hex + - + name: flowlabel-mask + type: u32 + byte-order: big-endian + display-hint: hex + - + name: sport-mask + type: u16 + display-hint: hex + - + name: dport-mask + type: u16 + display-hint: hex + - + name: dscp-mask + type: u8 + display-hint: hex + +operations: + enum-model: directional + fixed-header: fib-rule-hdr + list: + - + name: newrule + doc: Add new FIB rule + attribute-set: fib-rule-attrs + do: + request: + value: 32 + attributes: &fib-rule-all + - iifname + - oifname + - priority + - fwmark + - flow + - tun-id + - fwmask + - table + - suppress-prefixlen + - suppress-ifgroup + - goto + - l3mdev + - uid-range + - protocol + - ip-proto + - sport-range + - dport-range + - dscp + - flowlabel + - flowlabel-mask + - sport-mask + - dport-mask + - dscp-mask + - + name: newrule-ntf + doc: Notify a rule creation + value: 32 + notify: newrule + - + name: delrule + doc: Remove an existing FIB rule + attribute-set: fib-rule-attrs + do: + request: + value: 33 + attributes: *fib-rule-all + - + name: delrule-ntf + doc: Notify a rule deletion + value: 33 + notify: delrule + - + name: getrule + doc: Dump all FIB rules + attribute-set: fib-rule-attrs + dump: + request: + value: 34 + reply: + value: 32 + attributes: *fib-rule-all + +mcast-groups: + list: + - + name: rtnlgrp-ipv4-rule + value: 8 + - + name: rtnlgrp-ipv6-rule + value: 19 diff --git a/Documentation/netlink/specs/rt_addr.yaml b/Documentation/netlink/specs/rt_addr.yaml deleted file mode 100644 index df6b23f06a22..000000000000 --- a/Documentation/netlink/specs/rt_addr.yaml +++ /dev/null @@ -1,204 +0,0 @@ -# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) - -name: rt-addr -protocol: netlink-raw -protonum: 0 - -doc: - Address configuration over rtnetlink. - -definitions: - - - name: ifaddrmsg - type: struct - members: - - - name: ifa-family - type: u8 - - - name: ifa-prefixlen - type: u8 - - - name: ifa-flags - type: u8 - enum: ifa-flags - enum-as-flags: true - - - name: ifa-scope - type: u8 - - - name: ifa-index - type: u32 - - - name: ifa-cacheinfo - type: struct - members: - - - name: ifa-prefered - type: u32 - - - name: ifa-valid - type: u32 - - - name: cstamp - type: u32 - - - name: tstamp - type: u32 - - - - name: ifa-flags - type: flags - entries: - - - name: secondary - - - name: nodad - - - name: optimistic - - - name: dadfailed - - - name: homeaddress - - - name: deprecated - - - name: tentative - - - name: permanent - - - name: managetempaddr - - - name: noprefixroute - - - name: mcautojoin - - - name: stable-privacy - -attribute-sets: - - - name: addr-attrs - name-prefix: ifa- - attributes: - - - name: address - type: binary - display-hint: ipv4 - - - name: local - type: binary - display-hint: ipv4 - - - name: label - type: string - - - name: broadcast - type: binary - display-hint: ipv4 - - - name: anycast - type: binary - - - name: cacheinfo - type: binary - struct: ifa-cacheinfo - - - name: multicast - type: binary - - - name: flags - type: u32 - enum: ifa-flags - enum-as-flags: true - - - name: rt-priority - type: u32 - - - name: target-netnsid - type: binary - - - name: proto - type: u8 - - -operations: - fixed-header: ifaddrmsg - enum-model: directional - list: - - - name: newaddr - doc: Add new address - attribute-set: addr-attrs - do: - request: - value: 20 - attributes: &ifaddr-all - - ifa-family - - ifa-flags - - ifa-prefixlen - - ifa-scope - - ifa-index - - address - - label - - local - - cacheinfo - - - name: deladdr - doc: Remove address - attribute-set: addr-attrs - do: - request: - value: 21 - attributes: - - ifa-family - - ifa-flags - - ifa-prefixlen - - ifa-scope - - ifa-index - - address - - local - - - name: getaddr - doc: Dump address information. - attribute-set: addr-attrs - dump: - request: - value: 22 - attributes: - - ifa-index - reply: - value: 20 - attributes: *ifaddr-all - - - name: getmulticast - doc: Get / dump IPv4/IPv6 multicast addresses. - attribute-set: addr-attrs - fixed-header: ifaddrmsg - do: - request: - value: 58 - attributes: - - ifa-family - - ifa-index - reply: - value: 58 - attributes: &mcaddr-attrs - - multicast - - cacheinfo - dump: - request: - value: 58 - attributes: - - ifa-family - reply: - value: 58 - attributes: *mcaddr-attrs - -mcast-groups: - list: - - - name: rtnlgrp-ipv4-ifaddr - value: 5 - - - name: rtnlgrp-ipv6-ifaddr - value: 9 diff --git a/Documentation/netlink/specs/rt_link.yaml b/Documentation/netlink/specs/rt_link.yaml deleted file mode 100644 index 31238455f8e9..000000000000 --- a/Documentation/netlink/specs/rt_link.yaml +++ /dev/null @@ -1,2523 +0,0 @@ -# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) - -name: rt-link -protocol: netlink-raw -protonum: 0 - -doc: - Link configuration over rtnetlink. - -definitions: - - - name: ifinfo-flags - type: flags - entries: - - - name: up - - - name: broadcast - - - name: debug - - - name: loopback - - - name: point-to-point - - - name: no-trailers - - - name: running - - - name: no-arp - - - name: promisc - - - name: all-multi - - - name: master - - - name: slave - - - name: multicast - - - name: portsel - - - name: auto-media - - - name: dynamic - - - name: lower-up - - - name: dormant - - - name: echo - - - name: vlan-protocols - type: enum - entries: - - - name: 8021q - value: 33024 - - - name: 8021ad - value: 34984 - - - name: rtgenmsg - type: struct - members: - - - name: family - type: u8 - - - name: ifinfomsg - type: struct - members: - - - name: ifi-family - type: u8 - - - name: pad - type: pad - len: 1 - - - name: ifi-type - type: u16 - - - name: ifi-index - type: s32 - - - name: ifi-flags - type: u32 - enum: ifinfo-flags - enum-as-flags: true - - - name: ifi-change - type: u32 - - - name: ifla-bridge-id - type: struct - members: - - - name: prio - type: u16 - - - name: addr - type: binary - len: 6 - display-hint: mac - - - name: ifla-cacheinfo - type: struct - members: - - - name: max-reasm-len - type: u32 - - - name: tstamp - type: u32 - - - name: reachable-time - type: s32 - - - name: retrans-time - type: u32 - - - name: rtnl-link-stats - type: struct - members: - - - name: rx-packets - type: u32 - - - name: tx-packets - type: u32 - - - name: rx-bytes - type: u32 - - - name: tx-bytes - type: u32 - - - name: rx-errors - type: u32 - - - name: tx-errors - type: u32 - - - name: rx-dropped - type: u32 - - - name: tx-dropped - type: u32 - - - name: multicast - type: u32 - - - name: collisions - type: u32 - - - name: rx-length-errors - type: u32 - - - name: rx-over-errors - type: u32 - - - name: rx-crc-errors - type: u32 - - - name: rx-frame-errors - type: u32 - - - name: rx-fifo-errors - type: u32 - - - name: rx-missed-errors - type: u32 - - - name: tx-aborted-errors - type: u32 - - - name: tx-carrier-errors - type: u32 - - - name: tx-fifo-errors - type: u32 - - - name: tx-heartbeat-errors - type: u32 - - - name: tx-window-errors - type: u32 - - - name: rx-compressed - type: u32 - - - name: tx-compressed - type: u32 - - - name: rx-nohandler - type: u32 - - - name: rtnl-link-stats64 - type: struct - members: - - - name: rx-packets - type: u64 - - - name: tx-packets - type: u64 - - - name: rx-bytes - type: u64 - - - name: tx-bytes - type: u64 - - - name: rx-errors - type: u64 - - - name: tx-errors - type: u64 - - - name: rx-dropped - type: u64 - - - name: tx-dropped - type: u64 - - - name: multicast - type: u64 - - - name: collisions - type: u64 - - - name: rx-length-errors - type: u64 - - - name: rx-over-errors - type: u64 - - - name: rx-crc-errors - type: u64 - - - name: rx-frame-errors - type: u64 - - - name: rx-fifo-errors - type: u64 - - - name: rx-missed-errors - type: u64 - - - name: tx-aborted-errors - type: u64 - - - name: tx-carrier-errors - type: u64 - - - name: tx-fifo-errors - type: u64 - - - name: tx-heartbeat-errors - type: u64 - - - name: tx-window-errors - type: u64 - - - name: rx-compressed - type: u64 - - - name: tx-compressed - type: u64 - - - name: rx-nohandler - type: u64 - - - name: rx-otherhost-dropped - type: u64 - - - name: rtnl-link-ifmap - type: struct - members: - - - name: mem-start - type: u64 - - - name: mem-end - type: u64 - - - name: base-addr - type: u64 - - - name: irq - type: u16 - - - name: dma - type: u8 - - - name: port - type: u8 - - - name: ipv4-devconf - type: struct - members: - - - name: forwarding - type: u32 - - - name: mc-forwarding - type: u32 - - - name: proxy-arp - type: u32 - - - name: accept-redirects - type: u32 - - - name: secure-redirects - type: u32 - - - name: send-redirects - type: u32 - - - name: shared-media - type: u32 - - - name: rp-filter - type: u32 - - - name: accept-source-route - type: u32 - - - name: bootp-relay - type: u32 - - - name: log-martians - type: u32 - - - name: tag - type: u32 - - - name: arpfilter - type: u32 - - - name: medium-id - type: u32 - - - name: noxfrm - type: u32 - - - name: nopolicy - type: u32 - - - name: force-igmp-version - type: u32 - - - name: arp-announce - type: u32 - - - name: arp-ignore - type: u32 - - - name: promote-secondaries - type: u32 - - - name: arp-accept - type: u32 - - - name: arp-notify - type: u32 - - - name: accept-local - type: u32 - - - name: src-vmark - type: u32 - - - name: proxy-arp-pvlan - type: u32 - - - name: route-localnet - type: u32 - - - name: igmpv2-unsolicited-report-interval - type: u32 - - - name: igmpv3-unsolicited-report-interval - type: u32 - - - name: ignore-routes-with-linkdown - type: u32 - - - name: drop-unicast-in-l2-multicast - type: u32 - - - name: drop-gratuitous-arp - type: u32 - - - name: bc-forwarding - type: u32 - - - name: arp-evict-nocarrier - type: u32 - - - name: ipv6-devconf - type: struct - members: - - - name: forwarding - type: u32 - - - name: hoplimit - type: u32 - - - name: mtu6 - type: u32 - - - name: accept-ra - type: u32 - - - name: accept-redirects - type: u32 - - - name: autoconf - type: u32 - - - name: dad-transmits - type: u32 - - - name: rtr-solicits - type: u32 - - - name: rtr-solicit-interval - type: u32 - - - name: rtr-solicit-delay - type: u32 - - - name: use-tempaddr - type: u32 - - - name: temp-valid-lft - type: u32 - - - name: temp-prefered-lft - type: u32 - - - name: regen-max-retry - type: u32 - - - name: max-desync-factor - type: u32 - - - name: max-addresses - type: u32 - - - name: force-mld-version - type: u32 - - - name: accept-ra-defrtr - type: u32 - - - name: accept-ra-pinfo - type: u32 - - - name: accept-ra-rtr-pref - type: u32 - - - name: rtr-probe-interval - type: u32 - - - name: accept-ra-rt-info-max-plen - type: u32 - - - name: proxy-ndp - type: u32 - - - name: optimistic-dad - type: u32 - - - name: accept-source-route - type: u32 - - - name: mc-forwarding - type: u32 - - - name: disable-ipv6 - type: u32 - - - name: accept-dad - type: u32 - - - name: force-tllao - type: u32 - - - name: ndisc-notify - type: u32 - - - name: mldv1-unsolicited-report-interval - type: u32 - - - name: mldv2-unsolicited-report-interval - type: u32 - - - name: suppress-frag-ndisc - type: u32 - - - name: accept-ra-from-local - type: u32 - - - name: use-optimistic - type: u32 - - - name: accept-ra-mtu - type: u32 - - - name: stable-secret - type: u32 - - - name: use-oif-addrs-only - type: u32 - - - name: accept-ra-min-hop-limit - type: u32 - - - name: ignore-routes-with-linkdown - type: u32 - - - name: drop-unicast-in-l2-multicast - type: u32 - - - name: drop-unsolicited-na - type: u32 - - - name: keep-addr-on-down - type: u32 - - - name: rtr-solicit-max-interval - type: u32 - - - name: seg6-enabled - type: u32 - - - name: seg6-require-hmac - type: u32 - - - name: enhanced-dad - type: u32 - - - name: addr-gen-mode - type: u8 - - - name: disable-policy - type: u32 - - - name: accept-ra-rt-info-min-plen - type: u32 - - - name: ndisc-tclass - type: u32 - - - name: rpl-seg-enabled - type: u32 - - - name: ra-defrtr-metric - type: u32 - - - name: ioam6-enabled - type: u32 - - - name: ioam6-id - type: u32 - - - name: ioam6-id-wide - type: u32 - - - name: ndisc-evict-nocarrier - type: u32 - - - name: accept-untracked-na - type: u32 - - - name: ifla-icmp6-stats - type: struct - members: - - - name: inmsgs - type: u64 - - - name: inerrors - type: u64 - - - name: outmsgs - type: u64 - - - name: outerrors - type: u64 - - - name: csumerrors - type: u64 - - - name: ratelimithost - type: u64 - - - name: ifla-inet6-stats - type: struct - members: - - - name: inpkts - type: u64 - - - name: inoctets - type: u64 - - - name: indelivers - type: u64 - - - name: outforwdatagrams - type: u64 - - - name: outpkts - type: u64 - - - name: outoctets - type: u64 - - - name: inhdrerrors - type: u64 - - - name: intoobigerrors - type: u64 - - - name: innoroutes - type: u64 - - - name: inaddrerrors - type: u64 - - - name: inunknownprotos - type: u64 - - - name: intruncatedpkts - type: u64 - - - name: indiscards - type: u64 - - - name: outdiscards - type: u64 - - - name: outnoroutes - type: u64 - - - name: reasmtimeout - type: u64 - - - name: reasmreqds - type: u64 - - - name: reasmoks - type: u64 - - - name: reasmfails - type: u64 - - - name: fragoks - type: u64 - - - name: fragfails - type: u64 - - - name: fragcreates - type: u64 - - - name: inmcastpkts - type: u64 - - - name: outmcastpkts - type: u64 - - - name: inbcastpkts - type: u64 - - - name: outbcastpkts - type: u64 - - - name: inmcastoctets - type: u64 - - - name: outmcastoctets - type: u64 - - - name: inbcastoctets - type: u64 - - - name: outbcastoctets - type: u64 - - - name: csumerrors - type: u64 - - - name: noectpkts - type: u64 - - - name: ect1-pkts - type: u64 - - - name: ect0-pkts - type: u64 - - - name: cepkts - type: u64 - - - name: reasm-overlaps - type: u64 - - name: br-boolopt-multi - type: struct - members: - - - name: optval - type: u32 - - - name: optmask - type: u32 - - - name: if_stats_msg - type: struct - members: - - - name: family - type: u8 - - - name: pad - type: pad - len: 3 - - - name: ifindex - type: u32 - - - name: filter-mask - type: u32 - - - name: ifla-vlan-flags - type: struct - members: - - - name: flags - type: u32 - enum: vlan-flags - enum-as-flags: true - - - name: mask - type: u32 - display-hint: hex - - - name: vlan-flags - type: flags - entries: - - reorder-hdr - - gvrp - - loose-binding - - mvrp - - bridge-binding - - - name: ifla-vlan-qos-mapping - type: struct - members: - - - name: from - type: u32 - - - name: to - type: u32 - - - name: ifla-geneve-port-range - type: struct - members: - - - name: low - type: u16 - byte-order: big-endian - - - name: high - type: u16 - byte-order: big-endian - - - name: ifla-vf-mac - type: struct - members: - - - name: vf - type: u32 - - - name: mac - type: binary - len: 32 - - - name: ifla-vf-vlan - type: struct - members: - - - name: vf - type: u32 - - - name: vlan - type: u32 - - - name: qos - type: u32 - - - name: ifla-vf-tx-rate - type: struct - members: - - - name: vf - type: u32 - - - name: rate - type: u32 - - - name: ifla-vf-spoofchk - type: struct - members: - - - name: vf - type: u32 - - - name: setting - type: u32 - - - name: ifla-vf-link-state - type: struct - members: - - - name: vf - type: u32 - - - name: link-state - type: u32 - enum: ifla-vf-link-state-enum - - - name: ifla-vf-link-state-enum - type: enum - entries: - - auto - - enable - - disable - - - name: ifla-vf-rate - type: struct - members: - - - name: vf - type: u32 - - - name: min-tx-rate - type: u32 - - - name: max-tx-rate - type: u32 - - - name: ifla-vf-rss-query-en - type: struct - members: - - - name: vf - type: u32 - - - name: setting - type: u32 - - - name: ifla-vf-trust - type: struct - members: - - - name: vf - type: u32 - - - name: setting - type: u32 - - - name: ifla-vf-guid - type: struct - members: - - - name: vf - type: u32 - - - name: guid - type: u64 - - - name: ifla-vf-vlan-info - type: struct - members: - - - name: vf - type: u32 - - - name: vlan - type: u32 - - - name: qos - type: u32 - - - name: vlan-proto - type: u32 - - - name: rtext-filter - type: flags - entries: - - vf - - brvlan - - brvlan-compressed - - skip-stats - - mrp - - cfm-config - - cfm-status - - mst - - - name: netkit-policy - type: enum - entries: - - - name: forward - value: 0 - - - name: blackhole - value: 2 - - - name: netkit-mode - type: enum - entries: - - name: l2 - - name: l3 - - - - name: netkit-scrub - type: enum - entries: - - name: none - - name: default - -attribute-sets: - - - name: link-attrs - name-prefix: ifla- - attributes: - - - name: address - type: binary - display-hint: mac - - - name: broadcast - type: binary - display-hint: mac - - - name: ifname - type: string - - - name: mtu - type: u32 - - - name: link - type: u32 - - - name: qdisc - type: string - - - name: stats - type: binary - struct: rtnl-link-stats - - - name: cost - type: string - - - name: priority - type: string - - - name: master - type: u32 - - - name: wireless - type: string - - - name: protinfo - type: string - - - name: txqlen - type: u32 - - - name: map - type: binary - struct: rtnl-link-ifmap - - - name: weight - type: u32 - - - name: operstate - type: u8 - - - name: linkmode - type: u8 - - - name: linkinfo - type: nest - nested-attributes: linkinfo-attrs - - - name: net-ns-pid - type: u32 - - - name: ifalias - type: string - - - name: num-vf - type: u32 - - - name: vfinfo-list - type: nest - nested-attributes: vfinfo-list-attrs - - - name: stats64 - type: binary - struct: rtnl-link-stats64 - - - name: vf-ports - type: nest - nested-attributes: vf-ports-attrs - - - name: port-self - type: nest - nested-attributes: port-self-attrs - - - name: af-spec - type: nest - nested-attributes: af-spec-attrs - - - name: group - type: u32 - - - name: net-ns-fd - type: u32 - - - name: ext-mask - type: u32 - enum: rtext-filter - enum-as-flags: true - - - name: promiscuity - type: u32 - - - name: num-tx-queues - type: u32 - - - name: num-rx-queues - type: u32 - - - name: carrier - type: u8 - - - name: phys-port-id - type: binary - - - name: carrier-changes - type: u32 - - - name: phys-switch-id - type: binary - - - name: link-netnsid - type: s32 - - - name: phys-port-name - type: string - - - name: proto-down - type: u8 - - - name: gso-max-segs - type: u32 - - - name: gso-max-size - type: u32 - - - name: pad - type: pad - - - name: xdp - type: nest - nested-attributes: xdp-attrs - - - name: event - type: u32 - - - name: new-netnsid - type: s32 - - - name: target-netnsid - type: s32 - - - name: carrier-up-count - type: u32 - - - name: carrier-down-count - type: u32 - - - name: new-ifindex - type: s32 - - - name: min-mtu - type: u32 - - - name: max-mtu - type: u32 - - - name: prop-list - type: nest - nested-attributes: link-attrs - - - name: alt-ifname - type: string - multi-attr: true - - - name: perm-address - type: binary - display-hint: mac - - - name: proto-down-reason - type: string - - - name: parent-dev-name - type: string - - - name: parent-dev-bus-name - type: string - - - name: gro-max-size - type: u32 - - - name: tso-max-size - type: u32 - - - name: tso-max-segs - type: u32 - - - name: allmulti - type: u32 - - - name: devlink-port - type: binary - - - name: gso-ipv4-max-size - type: u32 - - - name: gro-ipv4-max-size - type: u32 - - - name: dpll-pin - type: nest - nested-attributes: link-dpll-pin-attrs - - - name: max-pacing-offload-horizon - type: uint - doc: EDT offload horizon supported by the device (in nsec). - - - name: netns-immutable - type: u8 - - - name: af-spec-attrs - attributes: - - - name: "inet" - type: nest - value: 2 - nested-attributes: ifla-attrs - - - name: "inet6" - type: nest - value: 10 - nested-attributes: ifla6-attrs - - - name: "mctp" - type: nest - value: 45 - nested-attributes: mctp-attrs - - - name: vfinfo-list-attrs - attributes: - - - name: info - type: nest - nested-attributes: vfinfo-attrs - multi-attr: true - - - name: vfinfo-attrs - attributes: - - - name: mac - type: binary - struct: ifla-vf-mac - - - name: vlan - type: binary - struct: ifla-vf-vlan - - - name: tx-rate - type: binary - struct: ifla-vf-tx-rate - - - name: spoofchk - type: binary - struct: ifla-vf-spoofchk - - - name: link-state - type: binary - struct: ifla-vf-link-state - - - name: rate - type: binary - struct: ifla-vf-rate - - - name: rss-query-en - type: binary - struct: ifla-vf-rss-query-en - - - name: stats - type: nest - nested-attributes: vf-stats-attrs - - - name: trust - type: binary - struct: ifla-vf-trust - - - name: ib-node-guid - type: binary - struct: ifla-vf-guid - - - name: ib-port-guid - type: binary - struct: ifla-vf-guid - - - name: vlan-list - type: nest - nested-attributes: vf-vlan-attrs - - - name: broadcast - type: binary - - - name: vf-stats-attrs - attributes: - - - name: rx-packets - type: u64 - value: 0 - - - name: tx-packets - type: u64 - - - name: rx-bytes - type: u64 - - - name: tx-bytes - type: u64 - - - name: broadcast - type: u64 - - - name: multicast - type: u64 - - - name: pad - type: pad - - - name: rx-dropped - type: u64 - - - name: tx-dropped - type: u64 - - - name: vf-vlan-attrs - attributes: - - - name: info - type: binary - struct: ifla-vf-vlan-info - multi-attr: true - - - name: vf-ports-attrs - attributes: [] - - - name: port-self-attrs - attributes: [] - - - name: linkinfo-attrs - attributes: - - - name: kind - type: string - - - name: data - type: sub-message - sub-message: linkinfo-data-msg - selector: kind - - - name: xstats - type: binary - - - name: slave-kind - type: string - - - name: slave-data - type: sub-message - sub-message: linkinfo-member-data-msg - selector: slave-kind - - - name: linkinfo-bond-attrs - name-prefix: ifla-bond- - attributes: - - - name: mode - type: u8 - - - name: active-slave - type: u32 - - - name: miimon - type: u32 - - - name: updelay - type: u32 - - - name: downdelay - type: u32 - - - name: use-carrier - type: u8 - - - name: arp-interval - type: u32 - - - name: arp-ip-target - type: indexed-array - sub-type: u32 - byte-order: big-endian - display-hint: ipv4 - - - name: arp-validate - type: u32 - - - name: arp-all-targets - type: u32 - - - name: primary - type: u32 - - - name: primary-reselect - type: u8 - - - name: fail-over-mac - type: u8 - - - name: xmit-hash-policy - type: u8 - - - name: resend-igmp - type: u32 - - - name: num-peer-notif - type: u8 - - - name: all-slaves-active - type: u8 - - - name: min-links - type: u32 - - - name: lp-interval - type: u32 - - - name: packets-per-slave - type: u32 - - - name: ad-lacp-rate - type: u8 - - - name: ad-select - type: u8 - - - name: ad-info - type: nest - nested-attributes: bond-ad-info-attrs - - - name: ad-actor-sys-prio - type: u16 - - - name: ad-user-port-key - type: u16 - - - name: ad-actor-system - type: binary - display-hint: mac - - - name: tlb-dynamic-lb - type: u8 - - - name: peer-notif-delay - type: u32 - - - name: ad-lacp-active - type: u8 - - - name: missed-max - type: u8 - - - name: ns-ip6-target - type: indexed-array - sub-type: binary - display-hint: ipv6 - - - name: coupled-control - type: u8 - - - name: bond-ad-info-attrs - name-prefix: ifla-bond-ad-info- - attributes: - - - name: aggregator - type: u16 - - - name: num-ports - type: u16 - - - name: actor-key - type: u16 - - - name: partner-key - type: u16 - - - name: partner-mac - type: binary - display-hint: mac - - - name: bond-slave-attrs - name-prefix: ifla-bond-slave- - attributes: - - - name: state - type: u8 - - - name: mii-status - type: u8 - - - name: link-failure-count - type: u32 - - - name: perm-hwaddr - type: binary - display-hint: mac - - - name: queue-id - type: u16 - - - name: ad-aggregator-id - type: u16 - - - name: ad-actor-oper-port-state - type: u8 - - - name: ad-partner-oper-port-state - type: u16 - - - name: prio - type: u32 - - - name: linkinfo-bridge-attrs - name-prefix: ifla-br- - attributes: - - - name: forward-delay - type: u32 - - - name: hello-time - type: u32 - - - name: max-age - type: u32 - - - name: ageing-time - type: u32 - - - name: stp-state - type: u32 - - - name: priority - type: u16 - - - name: vlan-filtering - type: u8 - - - name: vlan-protocol - type: u16 - - - name: group-fwd-mask - type: u16 - - - name: root-id - type: binary - struct: ifla-bridge-id - - - name: bridge-id - type: binary - struct: ifla-bridge-id - - - name: root-port - type: u16 - - - name: root-path-cost - type: u32 - - - name: topology-change - type: u8 - - - name: topology-change-detected - type: u8 - - - name: hello-timer - type: u64 - - - name: tcn-timer - type: u64 - - - name: topology-change-timer - type: u64 - - - name: gc-timer - type: u64 - - - name: group-addr - type: binary - display-hint: mac - - - name: fdb-flush - type: binary - - - name: mcast-router - type: u8 - - - name: mcast-snooping - type: u8 - - - name: mcast-query-use-ifaddr - type: u8 - - - name: mcast-querier - type: u8 - - - name: mcast-hash-elasticity - type: u32 - - - name: mcast-hash-max - type: u32 - - - name: mcast-last-member-cnt - type: u32 - - - name: mcast-startup-query-cnt - type: u32 - - - name: mcast-last-member-intvl - type: u64 - - - name: mcast-membership-intvl - type: u64 - - - name: mcast-querier-intvl - type: u64 - - - name: mcast-query-intvl - type: u64 - - - name: mcast-query-response-intvl - type: u64 - - - name: mcast-startup-query-intvl - type: u64 - - - name: nf-call-iptables - type: u8 - - - name: nf-call-ip6-tables - type: u8 - - - name: nf-call-arptables - type: u8 - - - name: vlan-default-pvid - type: u16 - - - name: pad - type: pad - - - name: vlan-stats-enabled - type: u8 - - - name: mcast-stats-enabled - type: u8 - - - name: mcast-igmp-version - type: u8 - - - name: mcast-mld-version - type: u8 - - - name: vlan-stats-per-port - type: u8 - - - name: multi-boolopt - type: binary - struct: br-boolopt-multi - - - name: mcast-querier-state - type: binary - - - name: fdb-n-learned - type: u32 - - - name: fdb-max-learned - type: u32 - - - name: linkinfo-brport-attrs - name-prefix: ifla-brport- - attributes: - - - name: state - type: u8 - - - name: priority - type: u16 - - - name: cost - type: u32 - - - name: mode - type: flag - - - name: guard - type: flag - - - name: protect - type: flag - - - name: fast-leave - type: flag - - - name: learning - type: flag - - - name: unicast-flood - type: flag - - - name: proxyarp - type: flag - - - name: learning-sync - type: flag - - - name: proxyarp-wifi - type: flag - - - name: root-id - type: binary - struct: ifla-bridge-id - - - name: bridge-id - type: binary - struct: ifla-bridge-id - - - name: designated-port - type: u16 - - - name: designated-cost - type: u16 - - - name: id - type: u16 - - - name: "no" - type: u16 - - - name: topology-change-ack - type: u8 - - - name: config-pending - type: u8 - - - name: message-age-timer - type: u64 - - - name: forward-delay-timer - type: u64 - - - name: hold-timer - type: u64 - - - name: flush - type: flag - - - name: multicast-router - type: u8 - - - name: pad - type: pad - - - name: mcast-flood - type: flag - - - name: mcast-to-ucast - type: flag - - - name: vlan-tunnel - type: flag - - - name: bcast-flood - type: flag - - - name: group-fwd-mask - type: u16 - - - name: neigh-suppress - type: flag - - - name: isolated - type: flag - - - name: backup-port - type: u32 - - - name: mrp-ring-open - type: flag - - - name: mrp-in-open - type: flag - - - name: mcast-eht-hosts-limit - type: u32 - - - name: mcast-eht-hosts-cnt - type: u32 - - - name: locked - type: flag - - - name: mab - type: flag - - - name: mcast-n-groups - type: u32 - - - name: mcast-max-groups - type: u32 - - - name: neigh-vlan-suppress - type: flag - - - name: backup-nhid - type: u32 - - - name: linkinfo-gre-attrs - name-prefix: ifla-gre- - attributes: - - - name: link - type: u32 - - - name: iflags - type: u16 - - - name: oflags - type: u16 - - - name: ikey - type: u32 - - - name: okey - type: u32 - - - name: local - type: binary - display-hint: ipv4 - - - name: remote - type: binary - display-hint: ipv4 - - - name: ttl - type: u8 - - - name: tos - type: u8 - - - name: pmtudisc - type: u8 - - - name: encap-limit - type: u32 - - - name: flowinfo - type: u32 - - - name: flags - type: u32 - - - name: encap-type - type: u16 - - - name: encap-flags - type: u16 - - - name: encap-sport - type: u16 - - - name: encap-dport - type: u16 - - - name: collect-metadata - type: flag - - - name: ignore-df - type: u8 - - - name: fwmark - type: u32 - - - name: erspan-index - type: u32 - - - name: erspan-ver - type: u8 - - - name: erspan-dir - type: u8 - - - name: erspan-hwid - type: u16 - - - name: linkinfo-vti-attrs - name-prefix: ifla-vti- - attributes: - - - name: link - type: u32 - - - name: ikey - type: u32 - - - name: okey - type: u32 - - - name: local - type: binary - display-hint: ipv4 - - - name: remote - type: binary - display-hint: ipv4 - - - name: fwmark - type: u32 - - - name: linkinfo-vti6-attrs - subset-of: linkinfo-vti-attrs - attributes: - - - name: link - - - name: ikey - - - name: okey - - - name: local - display-hint: ipv6 - - - name: remote - display-hint: ipv6 - - - name: fwmark - - - name: linkinfo-geneve-attrs - name-prefix: ifla-geneve- - attributes: - - - name: id - type: u32 - - - name: remote - type: binary - display-hint: ipv4 - - - name: ttl - type: u8 - - - name: tos - type: u8 - - - name: port - type: u16 - - - name: collect-metadata - type: flag - - - name: remote6 - type: binary - display-hint: ipv6 - - - name: udp-csum - type: u8 - - - name: udp-zero-csum6-tx - type: u8 - - - name: udp-zero-csum6-rx - type: u8 - - - name: label - type: u32 - - - name: ttl-inherit - type: u8 - - - name: df - type: u8 - - - name: inner-proto-inherit - type: flag - - - name: port-range - type: binary - struct: ifla-geneve-port-range - - - name: linkinfo-iptun-attrs - name-prefix: ifla-iptun- - attributes: - - - name: link - type: u32 - - - name: local - type: binary - display-hint: ipv4 - - - name: remote - type: binary - display-hint: ipv4 - - - name: ttl - type: u8 - - - name: tos - type: u8 - - - name: encap-limit - type: u8 - - - name: flowinfo - type: u32 - - - name: flags - type: u16 - - - name: proto - type: u8 - - - name: pmtudisc - type: u8 - - - name: 6rd-prefix - type: binary - display-hint: ipv6 - - - name: 6rd-relay-prefix - type: binary - display-hint: ipv4 - - - name: 6rd-prefixlen - type: u16 - - - name: 6rd-relay-prefixlen - type: u16 - - - name: encap-type - type: u16 - - - name: encap-flags - type: u16 - - - name: encap-sport - type: u16 - - - name: encap-dport - type: u16 - - - name: collect-metadata - type: flag - - - name: fwmark - type: u32 - - - name: linkinfo-ip6tnl-attrs - subset-of: linkinfo-iptun-attrs - attributes: - - - name: link - - - name: local - display-hint: ipv6 - - - name: remote - display-hint: ipv6 - - - name: ttl - - - name: encap-limit - - - name: flowinfo - - - name: flags - # ip6tnl unlike ipip and sit has 32b flags - type: u32 - - - name: proto - - - name: encap-type - - - name: encap-flags - - - name: encap-sport - - - name: encap-dport - - - name: collect-metadata - - - name: fwmark - - - name: linkinfo-tun-attrs - name-prefix: ifla-tun- - attributes: - - - name: owner - type: u32 - - - name: group - type: u32 - - - name: type - type: u8 - - - name: pi - type: u8 - - - name: vnet-hdr - type: u8 - - - name: persist - type: u8 - - - name: multi-queue - type: u8 - - - name: num-queues - type: u32 - - - name: num-disabled-queues - type: u32 - - - name: linkinfo-vlan-attrs - name-prefix: ifla-vlan- - attributes: - - - name: id - type: u16 - - - name: flag - type: binary - struct: ifla-vlan-flags - - - name: egress-qos - type: nest - nested-attributes: ifla-vlan-qos - - - name: ingress-qos - type: nest - nested-attributes: ifla-vlan-qos - - - name: protocol - type: u16 - enum: vlan-protocols - byte-order: big-endian - - - name: ifla-vlan-qos - name-prefix: ifla-vlan-qos - attributes: - - - name: mapping - type: binary - multi-attr: true - struct: ifla-vlan-qos-mapping - - - name: linkinfo-vrf-attrs - name-prefix: ifla-vrf- - attributes: - - - name: table - type: u32 - - - name: xdp-attrs - attributes: - - - name: fd - type: s32 - - - name: attached - type: u8 - - - name: flags - type: u32 - - - name: prog-id - type: u32 - - - name: drv-prog-id - type: u32 - - - name: skb-prog-id - type: u32 - - - name: hw-prog-id - type: u32 - - - name: expected-fd - type: s32 - - - name: ifla-attrs - attributes: - - - name: conf - type: binary - struct: ipv4-devconf - - - name: ifla6-attrs - attributes: - - - name: flags - type: u32 - - - name: conf - type: binary - struct: ipv6-devconf - - - name: stats - type: binary - struct: ifla-inet6-stats - - - name: mcast - type: binary - - - name: cacheinfo - type: binary - struct: ifla-cacheinfo - - - name: icmp6-stats - type: binary - struct: ifla-icmp6-stats - - - name: token - type: binary - - - name: addr-gen-mode - type: u8 - - - name: ra-mtu - type: u32 - - - name: mctp-attrs - attributes: - - - name: mctp-net - type: u32 - - - name: phys-binding - type: u8 - - - name: stats-attrs - name-prefix: ifla-stats- - attributes: - - - name: link-64 - type: binary - struct: rtnl-link-stats64 - - - name: link-xstats - type: binary - - - name: link-xstats-slave - type: binary - - - name: link-offload-xstats - type: nest - nested-attributes: link-offload-xstats - - - name: af-spec - type: binary - - - name: link-offload-xstats - attributes: - - - name: cpu-hit - type: binary - - - name: hw-s-info - type: indexed-array - sub-type: nest - nested-attributes: hw-s-info-one - - - name: l3-stats - type: binary - - - name: hw-s-info-one - attributes: - - - name: request - type: u8 - - - name: used - type: u8 - - - name: link-dpll-pin-attrs - attributes: - - - name: id - type: u32 - - - name: linkinfo-netkit-attrs - name-prefix: ifla-netkit- - attributes: - - - name: peer-info - type: binary - - - name: primary - type: u8 - - - name: policy - type: u32 - enum: netkit-policy - - - name: peer-policy - type: u32 - enum: netkit-policy - - - name: mode - type: u32 - enum: netkit-mode - - - name: scrub - type: u32 - enum: netkit-scrub - - - name: peer-scrub - type: u32 - enum: netkit-scrub - - - name: headroom - type: u16 - - - name: tailroom - type: u16 - -sub-messages: - - - name: linkinfo-data-msg - formats: - - - value: bond - attribute-set: linkinfo-bond-attrs - - - value: bridge - attribute-set: linkinfo-bridge-attrs - - - value: erspan - attribute-set: linkinfo-gre-attrs - - - value: gre - attribute-set: linkinfo-gre-attrs - - - value: gretap - attribute-set: linkinfo-gre-attrs - - - value: geneve - attribute-set: linkinfo-geneve-attrs - - - value: ipip - attribute-set: linkinfo-iptun-attrs - - - value: ip6tnl - attribute-set: linkinfo-ip6tnl-attrs - - - value: sit - attribute-set: linkinfo-iptun-attrs - - - value: tun - attribute-set: linkinfo-tun-attrs - - - value: vlan - attribute-set: linkinfo-vlan-attrs - - - value: vrf - attribute-set: linkinfo-vrf-attrs - - - value: vti - attribute-set: linkinfo-vti-attrs - - - value: vti6 - attribute-set: linkinfo-vti6-attrs - - - value: netkit - attribute-set: linkinfo-netkit-attrs - - - name: linkinfo-member-data-msg - formats: - - - value: bridge - attribute-set: linkinfo-brport-attrs - - - value: bond - attribute-set: bond-slave-attrs - -operations: - enum-model: directional - list: - - - name: newlink - doc: Create a new link. - attribute-set: link-attrs - fixed-header: ifinfomsg - do: - request: - value: 16 - attributes: &link-new-attrs - - ifi-index - - ifname - - net-ns-pid - - net-ns-fd - - target-netnsid - - link-netnsid - - linkinfo - - group - - num-tx-queues - - num-rx-queues - - address - - broadcast - - mtu - - txqlen - - operstate - - linkmode - - group - - gso-max-size - - gso-max-segs - - gro-max-size - - gso-ipv4-max-size - - gro-ipv4-max-size - - af-spec - - - name: dellink - doc: Delete an existing link. - attribute-set: link-attrs - fixed-header: ifinfomsg - do: - request: - value: 17 - attributes: - - ifi-index - - ifname - - - name: getlink - doc: Get / dump information about a link. - attribute-set: link-attrs - fixed-header: ifinfomsg - do: - request: - value: 18 - attributes: - - ifi-index - - ifname - - alt-ifname - - ext-mask - - target-netnsid - reply: - value: 16 - attributes: &link-all-attrs - - ifi-family - - ifi-type - - ifi-index - - ifi-flags - - ifi-change - - address - - broadcast - - ifname - - mtu - - link - - qdisc - - stats - - cost - - priority - - master - - wireless - - protinfo - - txqlen - - map - - weight - - operstate - - linkmode - - linkinfo - - net-ns-pid - - ifalias - - num-vf - - vfinfo-list - - stats64 - - vf-ports - - port-self - - af-spec - - group - - net-ns-fd - - ext-mask - - promiscuity - - num-tx-queues - - num-rx-queues - - carrier - - phys-port-id - - carrier-changes - - phys-switch-id - - link-netnsid - - phys-port-name - - proto-down - - gso-max-segs - - gso-max-size - - pad - - xdp - - event - - new-netnsid - - if-netnsid - - target-netnsid - - carrier-up-count - - carrier-down-count - - new-ifindex - - min-mtu - - max-mtu - - prop-list - - alt-ifname - - perm-address - - proto-down-reason - - parent-dev-name - - parent-dev-bus-name - - gro-max-size - - tso-max-size - - tso-max-segs - - allmulti - - devlink-port - - gso-ipv4-max-size - - gro-ipv4-max-size - dump: - request: - value: 18 - attributes: - - target-netnsid - - ext-mask - - master - - linkinfo - reply: - value: 16 - attributes: *link-all-attrs - - - name: setlink - doc: Set information about a link. - attribute-set: link-attrs - fixed-header: ifinfomsg - do: - request: - value: 19 - attributes: *link-all-attrs - - - name: getstats - doc: Get / dump link stats. - attribute-set: stats-attrs - fixed-header: if_stats_msg - do: - request: - value: 94 - attributes: - - ifindex - reply: - value: 92 - attributes: &link-stats-attrs - - family - - ifindex - - filter-mask - - link-64 - - link-xstats - - link-xstats-slave - - link-offload-xstats - - af-spec - dump: - request: - value: 94 - reply: - value: 92 - attributes: *link-stats-attrs - -mcast-groups: - list: - - - name: rtnlgrp-link - value: 1 - - - name: rtnlgrp-stats - value: 36 diff --git a/Documentation/netlink/specs/rt_neigh.yaml b/Documentation/netlink/specs/rt_neigh.yaml deleted file mode 100644 index e670b6dc07be..000000000000 --- a/Documentation/netlink/specs/rt_neigh.yaml +++ /dev/null @@ -1,442 +0,0 @@ -# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) - -name: rt-neigh -protocol: netlink-raw -protonum: 0 - -doc: - IP neighbour management over rtnetlink. - -definitions: - - - name: ndmsg - type: struct - members: - - - name: family - type: u8 - - - name: pad - type: pad - len: 3 - - - name: ifindex - type: s32 - - - name: state - type: u16 - enum: nud-state - - - name: flags - type: u8 - enum: ntf-flags - - - name: type - type: u8 - enum: rtm-type - - - name: ndtmsg - type: struct - members: - - - name: family - type: u8 - - - name: pad - type: pad - len: 3 - - - name: nud-state - type: flags - entries: - - incomplete - - reachable - - stale - - delay - - probe - - failed - - noarp - - permanent - - - name: ntf-flags - type: flags - entries: - - use - - self - - master - - proxy - - ext-learned - - offloaded - - sticky - - router - - - name: ntf-ext-flags - type: flags - entries: - - managed - - locked - - - name: rtm-type - type: enum - entries: - - unspec - - unicast - - local - - broadcast - - anycast - - multicast - - blackhole - - unreachable - - prohibit - - throw - - nat - - xresolve - - - name: nda-cacheinfo - type: struct - members: - - - name: confirmed - type: u32 - - - name: used - type: u32 - - - name: updated - type: u32 - - - name: refcnt - type: u32 - - - name: ndt-config - type: struct - members: - - - name: key-len - type: u16 - - - name: entry-size - type: u16 - - - name: entries - type: u32 - - - name: last-flush - type: u32 - - - name: last-rand - type: u32 - - - name: hash-rnd - type: u32 - - - name: hash-mask - type: u32 - - - name: hash-chain-gc - type: u32 - - - name: proxy-qlen - type: u32 - - - name: ndt-stats - type: struct - members: - - - name: allocs - type: u64 - - - name: destroys - type: u64 - - - name: hash-grows - type: u64 - - - name: res-failed - type: u64 - - - name: lookups - type: u64 - - - name: hits - type: u64 - - - name: rcv-probes-mcast - type: u64 - - - name: rcv-probes-ucast - type: u64 - - - name: periodic-gc-runs - type: u64 - - - name: forced-gc-runs - type: u64 - - - name: table-fulls - type: u64 - -attribute-sets: - - - name: neighbour-attrs - attributes: - - - name: unspec - type: binary - value: 0 - - - name: dst - type: binary - display-hint: ipv4 - - - name: lladr - type: binary - display-hint: mac - - - name: cacheinfo - type: binary - struct: nda-cacheinfo - - - name: probes - type: u32 - - - name: vlan - type: u16 - - - name: port - type: u16 - - - name: vni - type: u32 - - - name: ifindex - type: u32 - - - name: master - type: u32 - - - name: link-netnsid - type: s32 - - - name: src-vni - type: u32 - - - name: protocol - type: u8 - - - name: nh-id - type: u32 - - - name: fdb-ext-attrs - type: binary - - - name: flags-ext - type: u32 - enum: ntf-ext-flags - - - name: ndm-state-mask - type: u16 - - - name: ndm-flags-mask - type: u8 - - - name: ndt-attrs - attributes: - - - name: name - type: string - - - name: thresh1 - type: u32 - - - name: thresh2 - type: u32 - - - name: thresh3 - type: u32 - - - name: config - type: binary - struct: ndt-config - - - name: parms - type: nest - nested-attributes: ndtpa-attrs - - - name: stats - type: binary - struct: ndt-stats - - - name: gc-interval - type: u64 - - - name: pad - type: pad - - - name: ndtpa-attrs - attributes: - - - name: ifindex - type: u32 - - - name: refcnt - type: u32 - - - name: reachable-time - type: u64 - - - name: base-reachable-time - type: u64 - - - name: retrans-time - type: u64 - - - name: gc-staletime - type: u64 - - - name: delay-probe-time - type: u64 - - - name: queue-len - type: u32 - - - name: app-probes - type: u32 - - - name: ucast-probes - type: u32 - - - name: mcast-probes - type: u32 - - - name: anycast-delay - type: u64 - - - name: proxy-delay - type: u64 - - - name: proxy-qlen - type: u32 - - - name: locktime - type: u64 - - - name: queue-lenbytes - type: u32 - - - name: mcast-reprobes - type: u32 - - - name: pad - type: pad - - - name: interval-probe-time-ms - type: u64 - -operations: - enum-model: directional - list: - - - name: newneigh - doc: Add new neighbour entry - fixed-header: ndmsg - attribute-set: neighbour-attrs - do: - request: - value: 28 - attributes: &neighbour-all - - dst - - lladdr - - probes - - vlan - - port - - vni - - ifindex - - master - - protocol - - nh-id - - flags-ext - - fdb-ext-attrs - - - name: delneigh - doc: Remove an existing neighbour entry - fixed-header: ndmsg - attribute-set: neighbour-attrs - do: - request: - value: 29 - attributes: - - dst - - ifindex - - - name: delneigh-ntf - doc: Notify a neighbour deletion - value: 29 - notify: delneigh - fixed-header: ndmsg - - - name: getneigh - doc: Get or dump neighbour entries - fixed-header: ndmsg - attribute-set: neighbour-attrs - do: - request: - value: 30 - attributes: - - dst - reply: - value: 28 - attributes: *neighbour-all - dump: - request: - attributes: - - ifindex - - master - reply: - attributes: *neighbour-all - - - name: newneigh-ntf - doc: Notify a neighbour creation - value: 28 - notify: getneigh - fixed-header: ndmsg - - - name: getneightbl - doc: Get or dump neighbour tables - fixed-header: ndtmsg - attribute-set: ndt-attrs - dump: - request: - value: 66 - reply: - value: 64 - attributes: - - name - - thresh1 - - thresh2 - - thresh3 - - config - - parms - - stats - - gc-interval - - - name: setneightbl - doc: Set neighbour tables - fixed-header: ndtmsg - attribute-set: ndt-attrs - do: - request: - value: 67 - attributes: - - name - - thresh1 - - thresh2 - - thresh3 - - parms - - gc-interval - -mcast-groups: - list: - - - name: rtnlgrp-neigh - value: 3 diff --git a/Documentation/netlink/specs/rt_route.yaml b/Documentation/netlink/specs/rt_route.yaml deleted file mode 100644 index 292469c7d4b9..000000000000 --- a/Documentation/netlink/specs/rt_route.yaml +++ /dev/null @@ -1,336 +0,0 @@ -# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) - -name: rt-route -protocol: netlink-raw -protonum: 0 - -doc: - Route configuration over rtnetlink. - -definitions: - - - name: rtm-type - name-prefix: rtn- - type: enum - entries: - - unspec - - unicast - - local - - broadcast - - anycast - - multicast - - blackhole - - unreachable - - prohibit - - throw - - nat - - xresolve - - - name: rtmsg - type: struct - members: - - - name: rtm-family - type: u8 - - - name: rtm-dst-len - type: u8 - - - name: rtm-src-len - type: u8 - - - name: rtm-tos - type: u8 - - - name: rtm-table - type: u8 - - - name: rtm-protocol - type: u8 - - - name: rtm-scope - type: u8 - - - name: rtm-type - type: u8 - enum: rtm-type - - - name: rtm-flags - type: u32 - - - name: rta-cacheinfo - type: struct - members: - - - name: rta-clntref - type: u32 - - - name: rta-lastuse - type: u32 - - - name: rta-expires - type: u32 - - - name: rta-error - type: u32 - - - name: rta-used - type: u32 - -attribute-sets: - - - name: route-attrs - name-prefix: rta- - attributes: - - - name: dst - type: binary - display-hint: ipv4 - - - name: src - type: binary - display-hint: ipv4 - - - name: iif - type: u32 - - - name: oif - type: u32 - - - name: gateway - type: binary - display-hint: ipv4 - - - name: priority - type: u32 - - - name: prefsrc - type: binary - display-hint: ipv4 - - - name: metrics - type: nest - nested-attributes: metrics - - - name: multipath - type: binary - - - name: protoinfo # not used - type: binary - - - name: flow - type: u32 - - - name: cacheinfo - type: binary - struct: rta-cacheinfo - - - name: session # not used - type: binary - - - name: mp-algo # not used - type: binary - - - name: table - type: u32 - - - name: mark - type: u32 - - - name: mfc-stats - type: binary - - - name: via - type: binary - - - name: newdst - type: binary - - - name: pref - type: u8 - - - name: encap-type - type: u16 - - - name: encap - type: binary # tunnel specific nest - - - name: expires - type: u32 - - - name: pad - type: binary - - - name: uid - type: u32 - - - name: ttl-propagate - type: u8 - - - name: ip-proto - type: u8 - - - name: sport - type: u16 - - - name: dport - type: u16 - - - name: nh-id - type: u32 - - - name: flowlabel - type: u32 - byte-order: big-endian - display-hint: hex - - - name: metrics - name-prefix: rtax- - attributes: - - - name: unspec - type: unused - value: 0 - - - name: lock - type: u32 - - - name: mtu - type: u32 - - - name: window - type: u32 - - - name: rtt - type: u32 - - - name: rttvar - type: u32 - - - name: ssthresh - type: u32 - - - name: cwnd - type: u32 - - - name: advmss - type: u32 - - - name: reordering - type: u32 - - - name: hoplimit - type: u32 - - - name: initcwnd - type: u32 - - - name: features - type: u32 - - - name: rto-min - type: u32 - - - name: initrwnd - type: u32 - - - name: quickack - type: u32 - - - name: cc-algo - type: string - - - name: fastopen-no-cookie - type: u32 - -operations: - enum-model: directional - list: - - - name: getroute - doc: Dump route information. - attribute-set: route-attrs - fixed-header: rtmsg - do: - request: - value: 26 - attributes: - - rtm-family - - src - - rtm-src-len - - dst - - rtm-dst-len - - iif - - oif - - ip-proto - - sport - - dport - - mark - - uid - - flowlabel - reply: - value: 24 - attributes: &all-route-attrs - - rtm-family - - rtm-dst-len - - rtm-src-len - - rtm-tos - - rtm-table - - rtm-protocol - - rtm-scope - - rtm-type - - rtm-flags - - dst - - src - - iif - - oif - - gateway - - priority - - prefsrc - - metrics - - multipath - - flow - - cacheinfo - - table - - mark - - mfc-stats - - via - - newdst - - pref - - encap-type - - encap - - expires - - pad - - uid - - ttl-propagate - - ip-proto - - sport - - dport - - nh-id - - flowlabel - dump: - request: - value: 26 - attributes: - - rtm-family - reply: - value: 24 - attributes: *all-route-attrs - - - name: newroute - doc: Create a new route - attribute-set: route-attrs - fixed-header: rtmsg - do: - request: - value: 24 - attributes: *all-route-attrs - - - name: delroute - doc: Delete an existing route - attribute-set: route-attrs - fixed-header: rtmsg - do: - request: - value: 25 - attributes: *all-route-attrs diff --git a/Documentation/netlink/specs/rt_rule.yaml b/Documentation/netlink/specs/rt_rule.yaml deleted file mode 100644 index de0938d36541..000000000000 --- a/Documentation/netlink/specs/rt_rule.yaml +++ /dev/null @@ -1,269 +0,0 @@ -# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) - -name: rt-rule -protocol: netlink-raw -protonum: 0 - -doc: - FIB rule management over rtnetlink. - -definitions: - - - name: rtgenmsg - type: struct - members: - - - name: family - type: u8 - - - name: pad - type: pad - len: 3 - - - name: fib-rule-hdr - type: struct - members: - - - name: family - type: u8 - - - name: dst-len - type: u8 - - - name: src-len - type: u8 - - - name: tos - type: u8 - - - name: table - type: u8 - - - name: res1 - type: pad - len: 1 - - - name: res2 - type: pad - len: 1 - - - name: action - type: u8 - enum: fr-act - - - name: flags - type: u32 - - - name: fr-act - type: enum - entries: - - unspec - - to-tbl - - goto - - nop - - res3 - - res4 - - blackhole - - unreachable - - prohibit - - - name: fib-rule-port-range - type: struct - members: - - - name: start - type: u16 - - - name: end - type: u16 - - - name: fib-rule-uid-range - type: struct - members: - - - name: start - type: u32 - - - name: end - type: u32 - -attribute-sets: - - - name: fib-rule-attrs - attributes: - - - name: dst - type: u32 - - - name: src - type: u32 - - - name: iifname - type: string - - - name: goto - type: u32 - - - name: unused2 - type: pad - - - name: priority - type: u32 - - - name: unused3 - type: pad - - - name: unused4 - type: pad - - - name: unused5 - type: pad - - - name: fwmark - type: u32 - display-hint: hex - - - name: flow - type: u32 - - - name: tun-id - type: u64 - - - name: suppress-ifgroup - type: u32 - - - name: suppress-prefixlen - type: u32 - display-hint: hex - - - name: table - type: u32 - - - name: fwmask - type: u32 - display-hint: hex - - - name: oifname - type: string - - - name: pad - type: pad - - - name: l3mdev - type: u8 - - - name: uid-range - type: binary - struct: fib-rule-uid-range - - - name: protocol - type: u8 - - - name: ip-proto - type: u8 - - - name: sport-range - type: binary - struct: fib-rule-port-range - - - name: dport-range - type: binary - struct: fib-rule-port-range - - - name: dscp - type: u8 - - - name: flowlabel - type: u32 - byte-order: big-endian - display-hint: hex - - - name: flowlabel-mask - type: u32 - byte-order: big-endian - display-hint: hex - - - name: sport-mask - type: u16 - display-hint: hex - - - name: dport-mask - type: u16 - display-hint: hex - - - name: dscp-mask - type: u8 - display-hint: hex - -operations: - enum-model: directional - fixed-header: fib-rule-hdr - list: - - - name: newrule - doc: Add new FIB rule - attribute-set: fib-rule-attrs - do: - request: - value: 32 - attributes: &fib-rule-all - - iifname - - oifname - - priority - - fwmark - - flow - - tun-id - - fwmask - - table - - suppress-prefixlen - - suppress-ifgroup - - goto - - l3mdev - - uid-range - - protocol - - ip-proto - - sport-range - - dport-range - - dscp - - flowlabel - - flowlabel-mask - - sport-mask - - dport-mask - - dscp-mask - - - name: newrule-ntf - doc: Notify a rule creation - value: 32 - notify: newrule - - - name: delrule - doc: Remove an existing FIB rule - attribute-set: fib-rule-attrs - do: - request: - value: 33 - attributes: *fib-rule-all - - - name: delrule-ntf - doc: Notify a rule deletion - value: 33 - notify: delrule - - - name: getrule - doc: Dump all FIB rules - attribute-set: fib-rule-attrs - dump: - request: - value: 34 - reply: - value: 32 - attributes: *fib-rule-all - -mcast-groups: - list: - - - name: rtnlgrp-ipv4-rule - value: 8 - - - name: rtnlgrp-ipv6-rule - value: 19 diff --git a/Documentation/userspace-api/netlink/netlink-raw.rst b/Documentation/userspace-api/netlink/netlink-raw.rst index 1990eea772d0..31fc91020eb3 100644 --- a/Documentation/userspace-api/netlink/netlink-raw.rst +++ b/Documentation/userspace-api/netlink/netlink-raw.rst @@ -62,7 +62,7 @@ Sub-messages ------------ Several raw netlink families such as -:doc:`rt_link<../../networking/netlink_spec/rt_link>` and +:doc:`rt-link<../../networking/netlink_spec/rt-link>` and :doc:`tc<../../networking/netlink_spec/tc>` use attribute nesting as an abstraction to carry module specific information. -- cgit v1.2.3 From 97a33caa90715f90b93610a1fc6e5deb4c21e8d4 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Wed, 9 Apr 2025 18:46:47 -0700 Subject: netlink: specs: rt-route: specify fixed-header at operations level The C codegen currently stores the fixed-header as part of family info, so it only supports one fixed-header type per spec. Luckily all rtm route message have the same fixed header so just move it up to the higher level. Reviewed-by: Jacob Keller Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250410014658.782120-3-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-route.yaml | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-route.yaml b/Documentation/netlink/specs/rt-route.yaml index 292469c7d4b9..6fa3fa24305e 100644 --- a/Documentation/netlink/specs/rt-route.yaml +++ b/Documentation/netlink/specs/rt-route.yaml @@ -245,12 +245,12 @@ attribute-sets: operations: enum-model: directional + fixed-header: rtmsg list: - name: getroute doc: Dump route information. attribute-set: route-attrs - fixed-header: rtmsg do: request: value: 26 @@ -320,7 +320,6 @@ operations: name: newroute doc: Create a new route attribute-set: route-attrs - fixed-header: rtmsg do: request: value: 24 @@ -329,7 +328,6 @@ operations: name: delroute doc: Delete an existing route attribute-set: route-attrs - fixed-header: rtmsg do: request: value: 25 -- cgit v1.2.3 From d460016e7bca47b25951853c5f74c1632ccddb3b Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Wed, 9 Apr 2025 18:46:48 -0700 Subject: netlink: specs: rt-addr: remove the fixed members from attrs The purpose of the attribute list is to list the attributes which will be included in a given message to shrink the objects for families with huge attr spaces. Fixed headers are always present in their entirety (between netlink header and the attrs) so there's no point in listing their members. Current C codegen doesn't expect them and tries to look them up in the attribute space. Reviewed-by: Jacob Keller Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250410014658.782120-4-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-addr.yaml | 20 +++----------------- 1 file changed, 3 insertions(+), 17 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-addr.yaml b/Documentation/netlink/specs/rt-addr.yaml index df6b23f06a22..0488ce87506c 100644 --- a/Documentation/netlink/specs/rt-addr.yaml +++ b/Documentation/netlink/specs/rt-addr.yaml @@ -133,11 +133,6 @@ operations: request: value: 20 attributes: &ifaddr-all - - ifa-family - - ifa-flags - - ifa-prefixlen - - ifa-scope - - ifa-index - address - label - local @@ -150,11 +145,6 @@ operations: request: value: 21 attributes: - - ifa-family - - ifa-flags - - ifa-prefixlen - - ifa-scope - - ifa-index - address - local - @@ -164,8 +154,7 @@ operations: dump: request: value: 22 - attributes: - - ifa-index + attributes: [] reply: value: 20 attributes: *ifaddr-all @@ -177,9 +166,7 @@ operations: do: request: value: 58 - attributes: - - ifa-family - - ifa-index + attributes: [] reply: value: 58 attributes: &mcaddr-attrs @@ -188,8 +175,7 @@ operations: dump: request: value: 58 - attributes: - - ifa-family + attributes: [] reply: value: 58 attributes: *mcaddr-attrs -- cgit v1.2.3 From 295ff1e9520185de63e747aec63949e54f883c2e Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Wed, 9 Apr 2025 18:46:49 -0700 Subject: netlink: specs: rt-route: remove the fixed members from attrs The purpose of the attribute list is to list the attributes which will be included in a given message to shrink the objects for families with huge attr spaces. Fixed headers are always present in their entirety (between netlink header and the attrs) so there's no point in listing their members. Current C codegen doesn't expect them and tries to look them up in the attribute space. Reviewed-by: Jacob Keller Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250410014658.782120-5-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-route.yaml | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-route.yaml b/Documentation/netlink/specs/rt-route.yaml index 6fa3fa24305e..c7c6f776ab2f 100644 --- a/Documentation/netlink/specs/rt-route.yaml +++ b/Documentation/netlink/specs/rt-route.yaml @@ -255,11 +255,8 @@ operations: request: value: 26 attributes: - - rtm-family - src - - rtm-src-len - dst - - rtm-dst-len - iif - oif - ip-proto @@ -271,15 +268,6 @@ operations: reply: value: 24 attributes: &all-route-attrs - - rtm-family - - rtm-dst-len - - rtm-src-len - - rtm-tos - - rtm-table - - rtm-protocol - - rtm-scope - - rtm-type - - rtm-flags - dst - src - iif @@ -311,8 +299,7 @@ operations: dump: request: value: 26 - attributes: - - rtm-family + attributes: [] reply: value: 24 attributes: *all-route-attrs -- cgit v1.2.3 From 52d062362c05b17f86485ae206420140bbe0f649 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Wed, 9 Apr 2025 18:46:50 -0700 Subject: netlink: specs: rt-addr: add C naming info Add properties needed for C codegen to match names with uAPI headers. Reviewed-by: Jacob Keller Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250410014658.782120-6-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-addr.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-addr.yaml b/Documentation/netlink/specs/rt-addr.yaml index 0488ce87506c..4f86aa1075da 100644 --- a/Documentation/netlink/specs/rt-addr.yaml +++ b/Documentation/netlink/specs/rt-addr.yaml @@ -2,6 +2,7 @@ name: rt-addr protocol: netlink-raw +uapi-header: linux/rtnetlink.h protonum: 0 doc: @@ -49,6 +50,8 @@ definitions: - name: ifa-flags type: flags + name-prefix: ifa-f- + enum-name: entries: - name: secondary @@ -124,6 +127,7 @@ attribute-sets: operations: fixed-header: ifaddrmsg enum-model: directional + name-prefix: rtm- list: - name: newaddr -- cgit v1.2.3 From 1652e1f35dfb434862a595224ab2c4aa0244951f Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Wed, 9 Apr 2025 18:46:51 -0700 Subject: netlink: specs: rt-route: add C naming info Add properties needed for C codegen to match names with uAPI headers. Reviewed-by: Jacob Keller Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250410014658.782120-7-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-route.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-route.yaml b/Documentation/netlink/specs/rt-route.yaml index c7c6f776ab2f..800f3a823d47 100644 --- a/Documentation/netlink/specs/rt-route.yaml +++ b/Documentation/netlink/specs/rt-route.yaml @@ -2,6 +2,7 @@ name: rt-route protocol: netlink-raw +uapi-header: linux/rtnetlink.h protonum: 0 doc: @@ -11,6 +12,7 @@ definitions: - name: rtm-type name-prefix: rtn- + enum-name: type: enum entries: - unspec @@ -246,6 +248,7 @@ attribute-sets: operations: enum-model: directional fixed-header: rtmsg + name-prefix: rtm- list: - name: getroute -- cgit v1.2.3 From 0fbceff4f873500f0d0e632ee2d1e84e9a67b1b4 Mon Sep 17 00:00:00 2001 From: Justin Chen Date: Wed, 2 Apr 2025 11:51:58 -0700 Subject: dt-bindings: phy: brcmstb-usb-phy: Add support for bcm74110 bcm74110 brcmstb usb phy adds further power savings during suspend states. Signed-off-by: Justin Chen Reviewed-by: Florian Fainelli Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250402185159.2976920-2-justin.chen@broadcom.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml b/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml index 580fbe37b37f..843d04027c30 100644 --- a/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml @@ -18,6 +18,7 @@ properties: - brcm,bcm4908-usb-phy - brcm,bcm7211-usb-phy - brcm,bcm7216-usb-phy + - brcm,bcm74110-usb-phy - brcm,brcmstb-usb-phy reg: @@ -139,7 +140,9 @@ allOf: properties: compatible: contains: - const: brcm,bcm7216-usb-phy + enum: + - brcm,bcm7216-usb-phy + - brcm,bcm74110-usb-phy then: properties: reg: -- cgit v1.2.3 From a56d188a0a8f3df4860acf66a6af89318ce611be Mon Sep 17 00:00:00 2001 From: Kurt Borja Date: Sat, 29 Mar 2025 04:32:27 -0300 Subject: Documentation: wmi: Improve and update alienware-wmi documentation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use tables to describe method operations instead of using pseudo-code. Drop unknown method descriptions to avoid redundancy. Drop GPIO section as it is currently irrelevant to this driver. Update Thermal_Information method documentation. Add one more helpful developer to the kudos section. Reviewed-by: Armin Wolf Reviewed-by: Bagas Sanjaya Signed-off-by: Kurt Borja Link: https://lore.kernel.org/r/20250329-hwm-v7-10-a14ea39d8a94@gmail.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/wmi/devices/alienware-wmi.rst | 387 +++++++++------------------- 1 file changed, 119 insertions(+), 268 deletions(-) (limited to 'Documentation') diff --git a/Documentation/wmi/devices/alienware-wmi.rst b/Documentation/wmi/devices/alienware-wmi.rst index ddc5e561960e..79238051b18b 100644 --- a/Documentation/wmi/devices/alienware-wmi.rst +++ b/Documentation/wmi/devices/alienware-wmi.rst @@ -11,7 +11,7 @@ The WMI device WMAX has been implemented for many Alienware and Dell's G-Series models. Throughout these models, two implementations have been identified. The first one, used by older systems, deals with HDMI, brightness, RGB, amplifier and deep sleep control. The second one used by newer systems deals primarily -with thermal, overclocking, and GPIO control. +with thermal control and overclocking. It is suspected that the latter is used by Alienware Command Center (AWCC) to manage manufacturer predefined thermal profiles. The alienware-wmi driver @@ -69,9 +69,6 @@ data using the `bmfdec `_ utility: [WmiMethodId(164), Implemented, read, write, Description("Tobii Camera Power Off.")] void TobiiCameraPowerOff([out] uint32 argr); }; -Some of these methods get quite intricate so we will describe them using -pseudo-code that vaguely resembles the original ASL code. - Methods not described in the following document have unknown behavior. Argument Structure @@ -87,175 +84,133 @@ ID 0xA0, the argument you would pass to the method is 0xA001. Thermal Methods =============== -WMI method Thermal_Information([in] uint32 arg2, [out] uint32 argr) -------------------------------------------------------------------- - -:: - - if BYTE_0(arg2) == 0x01: - argr = 1 - - if BYTE_0(arg2) == 0x02: - argr = SYSTEM_DESCRIPTION - - if BYTE_0(arg2) == 0x03: - if BYTE_1(arg2) == 0x00: - argr = FAN_ID_0 - - if BYTE_1(arg2) == 0x01: - argr = FAN_ID_1 - - if BYTE_1(arg2) == 0x02: - argr = FAN_ID_2 - - if BYTE_1(arg2) == 0x03: - argr = FAN_ID_3 - - if BYTE_1(arg2) == 0x04: - argr = SENSOR_ID_CPU | 0x0100 - - if BYTE_1(arg2) == 0x05: - argr = SENSOR_ID_GPU | 0x0100 - - if BYTE_1(arg2) == 0x06: - argr = THERMAL_MODE_QUIET_ID - - if BYTE_1(arg2) == 0x07: - argr = THERMAL_MODE_BALANCED_ID - - if BYTE_1(arg2) == 0x08: - argr = THERMAL_MODE_BALANCED_PERFORMANCE_ID - - if BYTE_1(arg2) == 0x09: - argr = THERMAL_MODE_PERFORMANCE_ID - - if BYTE_1(arg2) == 0x0A: - argr = THERMAL_MODE_LOW_POWER_ID - - if BYTE_1(arg2) == 0x0B: - argr = THERMAL_MODE_GMODE_ID - - else: - argr = 0xFFFFFFFF - - if BYTE_0(arg2) == 0x04: - if is_valid_sensor(BYTE_1(arg2)): - argr = SENSOR_TEMP_C - else: - argr = 0xFFFFFFFF - - if BYTE_0(arg2) == 0x05: - if is_valid_fan(BYTE_1(arg2)): - argr = FAN_RPM() - - if BYTE_0(arg2) == 0x06: - skip - - if BYTE_0(arg2) == 0x07: - argr = 0 - - If BYTE_0(arg2) == 0x08: - if is_valid_fan(BYTE_1(arg2)): - argr = 0 - else: - argr = 0xFFFFFFFF - - if BYTE_0(arg2) == 0x09: - if is_valid_fan(BYTE_1(arg2)): - argr = FAN_UNKNOWN_STAT_0() - - else: - argr = 0xFFFFFFFF - - if BYTE_0(arg2) == 0x0A: - argr = THERMAL_MODE_BALANCED_ID - - if BYTE_0(arg2) == 0x0B: - argr = CURRENT_THERMAL_MODE() - - if BYTE_0(arg2) == 0x0C: - if is_valid_fan(BYTE_1(arg2)): - argr = FAN_UNKNOWN_STAT_1() - else: - argr = 0xFFFFFFFF - -Operation 0x02 returns a *system description* buffer with the following -structure: - -:: - - out[0] -> Number of fans - out[1] -> Number of sensors - out[2] -> 0x00 - out[3] -> Number of thermal modes +WMI method GetFanSensors([in] uint32 arg2, [out] uint32 argr) +------------------------------------------------------------- -Operation 0x03 list all available fan IDs, sensor IDs and thermal profile -codes in order, but different models may have different number of fans and -thermal profiles. These are the known ranges: ++--------------------+------------------------------------+--------------------+ +| Operation (Byte 0) | Description | Arguments | ++====================+====================================+====================+ +| 0x01 | Get the number of temperature | - Byte 1: Fan ID | +| | sensors related with a fan ID | | ++--------------------+------------------------------------+--------------------+ +| 0x02 | Get the temperature sensor IDs | - Byte 1: Fan ID | +| | related to a fan sensor ID | - Byte 2: Index | ++--------------------+------------------------------------+--------------------+ -* Fan IDs: from 2 up to 4 -* Sensor IDs: 2 -* Thermal profile codes: from 1 up to 7 +WMI method Thermal_Information([in] uint32 arg2, [out] uint32 argr) +------------------------------------------------------------------- -In total BYTE_1(ARG2) may range from 0x5 up to 0xD depending on the model. ++--------------------+------------------------------------+--------------------+ +| Operation (Byte 0) | Description | Arguments | ++====================+====================================+====================+ +| 0x01 | Unknown. | - None | ++--------------------+------------------------------------+--------------------+ +| 0x02 | Get system description number with | - None | +| | the following structure: | | +| | | | +| | - Byte 0: Number of fans | | +| | - Byte 1: Number of temperature | | +| | sensors | | +| | - Byte 2: Unknown | | +| | - Byte 3: Number of thermal | | +| | profiles | | ++--------------------+------------------------------------+--------------------+ +| 0x03 | List an ID or resource at a given | - Byte 1: Index | +| | index. Fan IDs, temperature IDs, | | +| | unknown IDs and thermal profile | | +| | IDs are listed in that exact | | +| | order. | | +| | | | +| | Operation 0x02 is used to know | | +| | which indexes map to which | | +| | resources. | | +| | | | +| | **Returns:** ID at a given index | | ++--------------------+------------------------------------+--------------------+ +| 0x04 | Get the current temperature for a | - Byte 1: Sensor | +| | given temperature sensor. | ID | ++--------------------+------------------------------------+--------------------+ +| 0x05 | Get the current RPM for a given | - Byte 1: Fan ID | +| | fan. | | ++--------------------+------------------------------------+--------------------+ +| 0x06 | Get fan speed percentage. (not | - Byte 1: Fan ID | +| | implemented in every model) | | ++--------------------+------------------------------------+--------------------+ +| 0x07 | Unknown. | - Unknown | ++--------------------+------------------------------------+--------------------+ +| 0x08 | Get minimum RPM for a given FAN | - Byte 1: Fan ID | +| | ID. | | ++--------------------+------------------------------------+--------------------+ +| 0x09 | Get maximum RPM for a given FAN | - Byte 1: Fan ID | +| | ID. | | ++--------------------+------------------------------------+--------------------+ +| 0x0A | Get balanced thermal profile ID. | - None | ++--------------------+------------------------------------+--------------------+ +| 0x0B | Get current thermal profile ID. | - None | ++--------------------+------------------------------------+--------------------+ +| 0x0C | Get current `boost` value for a | - Byte 1: Fan ID | +| | given fan ID. | | ++--------------------+------------------------------------+--------------------+ WMI method Thermal_Control([in] uint32 arg2, [out] uint32 argr) --------------------------------------------------------------- -:: - - if BYTE_0(arg2) == 0x01: - if is_valid_thermal_profile(BYTE_1(arg2)): - SET_THERMAL_PROFILE(BYTE_1(arg2)) - argr = 0 - - if BYTE_0(arg2) == 0x02: - if is_valid_fan(BYTE_1(arg2)): - SET_FAN_SPEED_MULTIPLIER(BYTE_2(arg2)) - argr = 0 - else: - argr = 0xFFFFFFFF - -.. note:: - While you can manually change the fan speed multiplier with this method, - Dell's BIOS tends to overwrite this changes anyway. ++--------------------+------------------------------------+--------------------+ +| Operation (Byte 0) | Description | Arguments | ++====================+====================================+====================+ +| 0x01 | Activate a given thermal profile. | - Byte 1: Thermal | +| | | profile ID | ++--------------------+------------------------------------+--------------------+ +| 0x02 | Set a `boost` value for a given | - Byte 1: Fan ID | +| | fan ID. | - Byte 2: Boost | ++--------------------+------------------------------------+--------------------+ These are the known thermal profile codes: -:: - - CUSTOM 0x00 - - BALANCED_USTT 0xA0 - BALANCED_PERFORMANCE_USTT 0xA1 - COOL_USTT 0xA2 - QUIET_USTT 0xA3 - PERFORMANCE_USTT 0xA4 - LOW_POWER_USTT 0xA5 - - QUIET 0x96 - BALANCED 0x97 - BALANCED_PERFORMANCE 0x98 - PERFORMANCE 0x99 - - GMODE 0xAB - -Usually if a model doesn't support the first four profiles they will support -the User Selectable Thermal Tables (USTT) profiles and vice-versa. - -GMODE replaces PERFORMANCE in G-Series laptops. ++------------------------------+----------+------+ +| Thermal Profile | Type | ID | ++==============================+==========+======+ +| Custom | Special | 0x00 | ++------------------------------+----------+------+ +| G-Mode | Special | 0xAB | ++------------------------------+----------+------+ +| Quiet | Legacy | 0x96 | ++------------------------------+----------+------+ +| Balanced | Legacy | 0x97 | ++------------------------------+----------+------+ +| Balanced Performance | Legacy | 0x98 | ++------------------------------+----------+------+ +| Performance | Legacy | 0x99 | ++------------------------------+----------+------+ +| Balanced | USTT | 0xA0 | ++------------------------------+----------+------+ +| Balanced Performance | USTT | 0xA1 | ++------------------------------+----------+------+ +| Cool | USTT | 0xA2 | ++------------------------------+----------+------+ +| Quiet | USTT | 0xA3 | ++------------------------------+----------+------+ +| Performance | USTT | 0xA4 | ++------------------------------+----------+------+ +| Low Power | USTT | 0xA5 | ++------------------------------+----------+------+ + +If a model supports the User Selectable Thermal Tables (USTT) profiles, it will +not support the Legacy profiles and vice-versa. + +Every model supports the CUSTOM (0x00) thermal profile. GMODE replaces +PERFORMANCE in G-Series laptops. WMI method GameShiftStatus([in] uint32 arg2, [out] uint32 argr) --------------------------------------------------------------- -:: - - if BYTE_0(arg2) == 0x1: - TOGGLE_GAME_SHIFT() - argr = GET_GAME_SHIFT_STATUS() - - if BYTE_0(arg2) == 0x2: - argr = GET_GAME_SHIFT_STATUS() ++--------------------+------------------------------------+--------------------+ +| Operation (Byte 0) | Description | Arguments | ++====================+====================================+====================+ +| 0x01 | Toggle *Game Shift*. | - None | ++--------------------+------------------------------------+--------------------+ +| 0x02 | Get *Game Shift* status. | - None | ++--------------------+------------------------------------+--------------------+ Game Shift Status does not change the fan speed profile but it could be some sort of CPU/GPU power profile. Benchmarks have not been done. @@ -267,131 +222,27 @@ Thermal_Information does not list it. G-key on Dell's G-Series laptops also changes Game Shift status, so both are directly related. -WMI method GetFanSensors([in] uint32 arg2, [out] uint32 argr) -------------------------------------------------------------- - -:: - - if BYTE_0(arg2) == 0x1: - if is_valid_fan(BYTE_1(arg2)): - argr = 1 - else: - argr = 0 - - if BYTE_0(arg2) == 0x2: - if is_valid_fan(BYTE_1(arg2)): - if BYTE_2(arg2) == 0: - argr == SENSOR_ID - else - argr == 0xFFFFFFFF - else: - argr = 0 - Overclocking Methods ==================== -.. warning:: - These methods have not been tested and are only partially reverse - engineered. - -WMI method Return_OverclockingReport([out] uint32 argr) -------------------------------------------------------- - -:: - - CSMI (0xE3, 0x99) - argr = 0 - -CSMI is an unknown operation. - -WMI method Set_OCUIBIOSControl([in] uint32 arg2, [out] uint32 argr) -------------------------------------------------------------------- - -:: - - CSMI (0xE3, 0x99) - argr = 0 - -CSMI is an unknown operation. - -WMI method Clear_OCFailSafeFlag([out] uint32 argr) --------------------------------------------------- - -:: - - CSMI (0xE3, 0x99) - argr = 0 - -CSMI is an unknown operation. - - WMI method MemoryOCControl([in] uint32 arg2, [out] uint32 argr) --------------------------------------------------------------- AWCC supports memory overclocking, but this method is very intricate and has not been deciphered yet. -GPIO methods -============ - -These methods are probably related to some kind of firmware update system, -through a GPIO device. - -.. warning:: - These methods have not been tested and are only partially reverse - engineered. - -WMI method FWUpdateGPIOtoggle([in] uint32 arg2, [out] uint32 argr) ------------------------------------------------------------------- - -:: - - if BYTE_0(arg2) == 0: - if BYTE_1(arg2) == 1: - SET_PIN_A_HIGH() - else: - SET_PIN_A_LOW() - - if BYTE_0(arg2) == 1: - if BYTE_1(arg2) == 1: - SET_PIN_B_HIGH() - - else: - SET_PIN_B_LOW() - - else: - argr = 1 - -WMI method ReadTotalofGPIOs([out] uint32 argr) ----------------------------------------------- - -:: - - argr = 0x02 - -WMI method ReadGPIOpPinStatus([in] uint32 arg2, [out] uint32 argr) ------------------------------------------------------------------- - -:: - - if BYTE_0(arg2) == 0: - argr = PIN_A_STATUS - - if BYTE_0(arg2) == 1: - argr = PIN_B_STATUS - Other information Methods ========================= WMI method ReadChassisColor([out] uint32 argr) ---------------------------------------------- -:: - - argr = CHASSIS_COLOR_ID +Returns the chassis color internal ID. Acknowledgements ================ -Kudos to `AlexIII `_ for documenting -and testing available thermal profile codes. +Kudos to `AlexIII `_ and +`T-Troll `_ for documenting and +testing some of this device's functionality, making it possible to generalize +this driver. -- cgit v1.2.3 From 3e48767ab53b56d31c77a063d022ca9aca43bf22 Mon Sep 17 00:00:00 2001 From: Kurt Borja Date: Sat, 29 Mar 2025 04:32:28 -0300 Subject: Documentation: admin-guide: laptops: Add documentation for alienware-wmi MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add driver admin-guide documentation for the alienware-wmi driver. Reviewed-by: Armin Wolf Signed-off-by: Kurt Borja Link: https://lore.kernel.org/r/20250329-hwm-v7-11-a14ea39d8a94@gmail.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- .../admin-guide/laptops/alienware-wmi.rst | 127 +++++++++++++++++++++ Documentation/admin-guide/laptops/index.rst | 1 + 2 files changed, 128 insertions(+) create mode 100644 Documentation/admin-guide/laptops/alienware-wmi.rst (limited to 'Documentation') diff --git a/Documentation/admin-guide/laptops/alienware-wmi.rst b/Documentation/admin-guide/laptops/alienware-wmi.rst new file mode 100644 index 000000000000..27a32a8057da --- /dev/null +++ b/Documentation/admin-guide/laptops/alienware-wmi.rst @@ -0,0 +1,127 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +==================== +Alienware WMI Driver +==================== + +Kurt Borja + +This is a driver for the "WMAX" WMI device, which is found in most Dell gaming +laptops and controls various special features. + +Before the launch of M-Series laptops (~2018), the "WMAX" device controlled +basic RGB lighting, deep sleep mode, HDMI mode and amplifier status. + +Later, this device was completely repurpused. Now it mostly deals with thermal +profiles, sensor monitoring and overclocking. This interface is named "AWCC" and +is known to be used by the AWCC OEM application to control these features. + +The alienware-wmi driver controls both interfaces. + +AWCC Interface +============== + +WMI device documentation: Documentation/wmi/devices/alienware-wmi.rst + +Supported devices +----------------- + +- Alienware M-Series laptops +- Alienware X-Series laptops +- Alienware Aurora Desktops +- Dell G-Series laptops + +If you believe your device supports the AWCC interface and you don't have any of +the features described in this document, try the following alienware-wmi module +parameters: + +- ``force_platform_profile=1``: Forces probing for platform profile support +- ``force_hwmon=1``: Forces probing for HWMON support + +If the module loads successfully with these parameters, consider submitting a +patch adding your model to the ``awcc_dmi_table`` located in +``drivers/platform/x86/dell/alienware-wmi-wmax.c`` or contacting the maintainer +for further guidance. + +Status +------ + +The following features are currently supported: + +- :ref:`Platform Profile `: + + - Thermal profile control + + - G-Mode toggling + +- :ref:`HWMON `: + + - Sensor monitoring + + - Manual fan control + +.. _platform-profile: + +Platform Profile +---------------- + +The AWCC interface exposes various firmware defined thermal profiles. These are +exposed to user-space through the Platform Profile class interface. Refer to +:ref:`sysfs-class-platform-profile ` +for more information. + +The name of the platform-profile class device exported by this driver is +"alienware-wmi" and it's path can be found with: + +:: + + grep -l "alienware-wmi" /sys/class/platform-profile/platform-profile-*/name | sed 's|/[^/]*$||' + +If the device supports G-Mode, it is also toggled when selecting the +``performance`` profile. + +.. note:: + You may set the ``force_gmode`` module parameter to always try to toggle this + feature, without checking if your model supports it. + +.. _hwmon: + +HWMON +----- + +The AWCC interface also supports sensor monitoring and manual fan control. Both +of these features are exposed to user-space through the HWMON interface. + +The name of the hwmon class device exported by this driver is "alienware_wmi" +and it's path can be found with: + +:: + + grep -l "alienware_wmi" /sys/class/hwmon/hwmon*/name | sed 's|/[^/]*$||' + +Sensor monitoring is done through the standard HWMON interface. Refer to +:ref:`sysfs-class-hwmon ` for more +information. + +Manual fan control on the other hand, is not exposed directly by the AWCC +interface. Instead it let's us control a fan `boost` value. This `boost` value +has the following aproximate behavior over the fan pwm: + +:: + + pwm = pwm_base + (fan_boost / 255) * (pwm_max - pwm_base) + +Due to the above behavior, the fan `boost` control is exposed to user-space +through the following, custom hwmon sysfs attribute: + +=============================== ======= ======================================= +Name Perm Description +=============================== ======= ======================================= +fan[1-4]_boost RW Fan boost value. + + Integer value between 0 and 255 +=============================== ======= ======================================= + +.. note:: + In some devices, manual fan control only works reliably if the ``custom`` + platform profile is selected. diff --git a/Documentation/admin-guide/laptops/index.rst b/Documentation/admin-guide/laptops/index.rst index e71c8984c23e..db842b629303 100644 --- a/Documentation/admin-guide/laptops/index.rst +++ b/Documentation/admin-guide/laptops/index.rst @@ -7,6 +7,7 @@ Laptop Drivers .. toctree:: :maxdepth: 1 + alienware-wmi asus-laptop disk-shock-protection laptop-mode -- cgit v1.2.3 From 361813db5d9ba33434754c0de1207a2b91264ab1 Mon Sep 17 00:00:00 2001 From: Kurt Borja Date: Sat, 29 Mar 2025 04:32:29 -0300 Subject: Documentation: ABI: Add sysfs platform and debugfs ABI documentation for alienware-wmi MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add ABI description for the alienware-wmi driver. Reviewed-by: Armin Wolf Signed-off-by: Kurt Borja Link: https://lore.kernel.org/r/20250329-hwm-v7-12-a14ea39d8a94@gmail.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/ABI/testing/debugfs-alienware-wmi | 44 ++++++++++++++++++++++ .../ABI/testing/sysfs-platform-alienware-wmi | 14 +++++++ 2 files changed, 58 insertions(+) create mode 100644 Documentation/ABI/testing/debugfs-alienware-wmi create mode 100644 Documentation/ABI/testing/sysfs-platform-alienware-wmi (limited to 'Documentation') diff --git a/Documentation/ABI/testing/debugfs-alienware-wmi b/Documentation/ABI/testing/debugfs-alienware-wmi new file mode 100644 index 000000000000..48cfd4d0b002 --- /dev/null +++ b/Documentation/ABI/testing/debugfs-alienware-wmi @@ -0,0 +1,44 @@ +What: /sys/kernel/debug/alienware-wmi-/system_description +Date: March 2025 +KernelVersion: 6.15 +Contact: Kurt Borja +Description: + This file exposes the raw ``system_description`` number reported + by the WMAX device. + + Only present on devices with the AWCC interface. + + See Documentation/admin-guide/laptops/alienware-wmi.rst for + details. + + RO + +What: /sys/kernel/debug/alienware-wmi-/hwmon_data +Date: March 2025 +KernelVersion: 6.15 +Contact: Kurt Borja +Description: + This file exposes HWMON private data. + + Includes fan sensor count, temperature sensor count, internal + fan IDs and internal temp IDs. + + See Documentation/admin-guide/laptops/alienware-wmi.rst for + details. + + RO + +What: /sys/kernel/debug/alienware-wmi-/pprof_data +Date: March 2025 +KernelVersion: 6.15 +Contact: Kurt Borja +Description: + This file exposes Platform Profile private data. + + Includes internal mapping to platform profiles and thermal + profile IDs. + + See Documentation/admin-guide/laptops/alienware-wmi.rst for + details. + + RO diff --git a/Documentation/ABI/testing/sysfs-platform-alienware-wmi b/Documentation/ABI/testing/sysfs-platform-alienware-wmi new file mode 100644 index 000000000000..4877b3745f4e --- /dev/null +++ b/Documentation/ABI/testing/sysfs-platform-alienware-wmi @@ -0,0 +1,14 @@ +What: /sys/class/hwmon/hwmonX/fanY_boost +Date: March 2025 +KernelVersion: 6.15 +Contact: Kurt Borja +Description: + This file exposes fan boost control for Dell gaming laptops with + the AWCC WMI interface. + + See Documentation/admin-guide/laptops/alienware-wmi.rst for + details. + + Integer value in the range 0 to 255 + + RW -- cgit v1.2.3 From 6640c9bc5c974efaa56347215696cbd03aa36ced Mon Sep 17 00:00:00 2001 From: Wesley Cheng Date: Wed, 9 Apr 2025 12:47:52 -0700 Subject: ASoC: doc: Add documentation for SOC USB With the introduction of the soc-usb driver, add documentation highlighting details on how to utilize the new driver and how it interacts with different components in USB SND and ASoC. It provides examples on how to implement the drivers that will need to be introduced in order to enable USB audio offloading. Signed-off-by: Wesley Cheng Acked-by: Mark Brown Link: https://lore.kernel.org/r/20250409194804.3773260-20-quic_wcheng@quicinc.com Signed-off-by: Greg Kroah-Hartman --- Documentation/sound/soc/index.rst | 1 + Documentation/sound/soc/usb.rst | 482 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 483 insertions(+) create mode 100644 Documentation/sound/soc/usb.rst (limited to 'Documentation') diff --git a/Documentation/sound/soc/index.rst b/Documentation/sound/soc/index.rst index e57df2dab2fd..8bed8f8f48da 100644 --- a/Documentation/sound/soc/index.rst +++ b/Documentation/sound/soc/index.rst @@ -18,3 +18,4 @@ The documentation is spilt into the following sections:- jack dpcm codec-to-codec + usb diff --git a/Documentation/sound/soc/usb.rst b/Documentation/sound/soc/usb.rst new file mode 100644 index 000000000000..94c12f9d9dd1 --- /dev/null +++ b/Documentation/sound/soc/usb.rst @@ -0,0 +1,482 @@ +================ +ASoC USB support +================ + +Overview +======== +In order to leverage the existing USB sound device support in ALSA, the +ASoC USB APIs are introduced to allow the subsystems to exchange +configuration information. + +One potential use case would be to support USB audio offloading, which is +an implementation that allows for an alternate power-optimized path in the audio +subsystem to handle the transfer of audio data over the USB bus. This would +let the main processor to stay in lower power modes for longer duration. The +following is an example design of how the ASoC and ALSA pieces can be connected +together to achieve this: + +:: + + USB | ASoC + | _________________________ + | | ASoC Platform card | + | |_________________________| + | | | + | ___V____ ____V____ + | |ASoC BE | |ASoC FE | + | |DAI LNK | |DAI LNK | + | |________| |_________| + | ^ ^ ^ + | | |________| + | ___V____ | + | |SoC-USB | | + ________ ________ | | | + |USB SND |<--->|USBSND |<------------>|________| | + |(card.c)| |offld |<---------- | + |________| |________|___ | | | + ^ ^ | | | ____________V_________ + | | | | | |IPC | + __ V_______________V_____ | | | |______________________| + |USB SND (endpoint.c) | | | | ^ + |_________________________| | | | | + ^ | | | ___________V___________ + | | | |->|audio DSP | + ___________V_____________ | | |_______________________| + |XHCI HCD |<- | + |_________________________| | + + +SoC USB driver +============== +Structures +---------- +``struct snd_soc_usb`` + + - ``list``: list head for SND SoC struct list + - ``component``: reference to ASoC component + - ``connection_status_cb``: callback to notify connection events + - ``update_offload_route_info``: callback to fetch selected USB sound card/PCM + device + - ``priv_data``: driver data + +The snd_soc_usb structure can be referenced using the ASoC platform card +device, or a USB device (udev->dev). This is created by the ASoC BE DAI +link, and the USB sound entity will be able to pass information to the +ASoC BE DAI link using this structure. + +``struct snd_soc_usb_device`` + + - ``card_idx``: sound card index associated with USB sound device + - ``chip_idx``: USB sound chip array index + - ``cpcm_idx``: capture pcm device indexes associated with the USB sound device + - ``ppcm_idx``: playback pcm device indexes associated with the USB sound device + - ``num_playback``: number of playback streams + - ``num_capture``: number of capture streams + - ``list``: list head for the USB sound device list + +The struct snd_soc_usb_device is created by the USB sound offload driver. +This will carry basic parameters/limitations that will be used to +determine the possible offloading paths for this USB audio device. + +Functions +--------- +.. code-block:: rst + + int snd_soc_usb_find_supported_format(int card_idx, + struct snd_pcm_hw_params *params, int direction) +.. + + - ``card_idx``: the index into the USB sound chip array. + - ``params``: Requested PCM parameters from the USB DPCM BE DAI link + - ``direction``: capture or playback + +**snd_soc_usb_find_supported_format()** ensures that the requested audio profile +being requested by the external DSP is supported by the USB device. + +Returns 0 on success, and -EOPNOTSUPP on failure. + +.. code-block:: rst + + int snd_soc_usb_connect(struct device *usbdev, struct snd_soc_usb_device *sdev) +.. + + - ``usbdev``: the usb device that was discovered + - ``sdev``: capabilities of the device + +**snd_soc_usb_connect()** notifies the ASoC USB DCPM BE DAI link of a USB +audio device detection. This can be utilized in the BE DAI +driver to keep track of available USB audio devices. This is intended +to be called by the USB offload driver residing in USB SND. + +Returns 0 on success, negative error code on failure. + +.. code-block:: rst + + int snd_soc_usb_disconnect(struct device *usbdev, struct snd_soc_usb_device *sdev) +.. + + - ``usbdev``: the usb device that was removed + - ``sdev``: capabilities to free + +**snd_soc_usb_disconnect()** notifies the ASoC USB DCPM BE DAI link of a USB +audio device removal. This is intended to be called by the USB offload +driver that resides in USB SND. + +.. code-block:: rst + + void *snd_soc_usb_find_priv_data(struct device *usbdev) +.. + + - ``usbdev``: the usb device to reference to find private data + +**snd_soc_usb_find_priv_data()** fetches the private data saved to the SoC USB +device. + +Returns pointer to priv_data on success, NULL on failure. + +.. code-block:: rst + + int snd_soc_usb_setup_offload_jack(struct snd_soc_component *component, + struct snd_soc_jack *jack) +.. + + - ``component``: ASoC component to add the jack + - ``jack``: jack component to populate + +**snd_soc_usb_setup_offload_jack()** is a helper to add a sound jack control to +the platform sound card. This will allow for consistent naming to be used on +designs that support USB audio offloading. Additionally, this will enable the +jack to notify of changes. + +Returns 0 on success, negative otherwise. + +.. code-block:: rst + + int snd_soc_usb_update_offload_route(struct device *dev, int card, int pcm, + int direction, enum snd_soc_usb_kctl path, + long *route) +.. + + - ``dev``: USB device to look up offload path mapping + - ``card``: USB sound card index + - ``pcm``: USB sound PCM device index + - ``direction``: direction to fetch offload routing information + - ``path``: kcontrol selector - pcm device or card index + - ``route``: mapping of sound card and pcm indexes for the offload path. This is + an array of two integers that will carry the card and pcm device indexes + in that specific order. This can be used as the array for the kcontrol + output. + +**snd_soc_usb_update_offload_route()** calls a registered callback to the USB BE DAI +link to fetch the information about the mapped ASoC devices for executing USB audio +offload for the device. ``route`` may be a pointer to a kcontrol value output array, +which carries values when the kcontrol is read. + +Returns 0 on success, negative otherwise. + +.. code-block:: rst + + struct snd_soc_usb *snd_soc_usb_allocate_port(struct snd_soc_component *component, + void *data); +.. + + - ``component``: DPCM BE DAI link component + - ``data``: private data + +**snd_soc_usb_allocate_port()** allocates a SoC USB device and populates standard +parameters that is used for further operations. + +Returns a pointer to struct soc_usb on success, negative on error. + +.. code-block:: rst + + void snd_soc_usb_free_port(struct snd_soc_usb *usb); +.. + + - ``usb``: SoC USB device to free + +**snd_soc_usb_free_port()** frees a SoC USB device. + +.. code-block:: rst + + void snd_soc_usb_add_port(struct snd_soc_usb *usb); +.. + + - ``usb``: SoC USB device to add + +**snd_soc_usb_add_port()** add an allocated SoC USB device to the SOC USB framework. +Once added, this device can be referenced by further operations. + +.. code-block:: rst + + void snd_soc_usb_remove_port(struct snd_soc_usb *usb); +.. + + - ``usb``: SoC USB device to remove + +**snd_soc_usb_remove_port()** removes a SoC USB device from the SoC USB framework. +After removing a device, any SOC USB operations would not be able to reference the +device removed. + +How to Register to SoC USB +-------------------------- +The ASoC DPCM USB BE DAI link is the entity responsible for allocating and +registering the SoC USB device on the component bind. Likewise, it will +also be responsible for freeing the allocated resources. An example can +be shown below: + +.. code-block:: rst + + static int q6usb_component_probe(struct snd_soc_component *component) + { + ... + data->usb = snd_soc_usb_allocate_port(component, 1, &data->priv); + if (!data->usb) + return -ENOMEM; + + usb->connection_status_cb = q6usb_alsa_connection_cb; + + ret = snd_soc_usb_add_port(usb); + if (ret < 0) { + dev_err(component->dev, "failed to add usb port\n"); + goto free_usb; + } + ... + } + + static void q6usb_component_remove(struct snd_soc_component *component) + { + ... + snd_soc_usb_remove_port(data->usb); + snd_soc_usb_free_port(data->usb); + } + + static const struct snd_soc_component_driver q6usb_dai_component = { + .probe = q6usb_component_probe, + .remove = q6usb_component_remove, + .name = "q6usb-dai-component", + ... + }; +.. + +BE DAI links can pass along vendor specific information as part of the +call to allocate the SoC USB device. This will allow any BE DAI link +parameters or settings to be accessed by the USB offload driver that +resides in USB SND. + +USB Audio Device Connection Flow +-------------------------------- +USB devices can be hotplugged into the USB ports at any point in time. +The BE DAI link should be aware of the current state of the physical USB +port, i.e. if there are any USB devices with audio interface(s) connected. +connection_status_cb() can be used to notify the BE DAI link of any change. + +This is called whenever there is a USB SND interface bind or remove event, +using snd_soc_usb_connect() or snd_soc_usb_disconnect(): + +.. code-block:: rst + + static void qc_usb_audio_offload_probe(struct snd_usb_audio *chip) + { + ... + snd_soc_usb_connect(usb_get_usb_backend(udev), sdev); + ... + } + + static void qc_usb_audio_offload_disconnect(struct snd_usb_audio *chip) + { + ... + snd_soc_usb_disconnect(usb_get_usb_backend(chip->dev), dev->sdev); + ... + } +.. + +In order to account for conditions where driver or device existence is +not guaranteed, USB SND exposes snd_usb_rediscover_devices() to resend the +connect events for any identified USB audio interfaces. Consider the +the following situation: + + **usb_audio_probe()** + | --> USB audio streams allocated and saved to usb_chip[] + | --> Propagate connect event to USB offload driver in USB SND + | --> **snd_soc_usb_connect()** exits as USB BE DAI link is not ready + + BE DAI link component probe + | --> DAI link is probed and SoC USB port is allocated + | --> The USB audio device connect event is missed + +To ensure connection events are not missed, **snd_usb_rediscover_devices()** +is executed when the SoC USB device is registered. Now, when the BE DAI +link component probe occurs, the following highlights the sequence: + + BE DAI link component probe + | --> DAI link is probed and SoC USB port is allocated + | --> SoC USB device added, and **snd_usb_rediscover_devices()** runs + + **snd_usb_rediscover_devices()** + | --> Traverses through usb_chip[] and for non-NULL entries issue + | **connection_status_cb()** + +In the case where the USB offload driver is unbound, while USB SND is ready, +the **snd_usb_rediscover_devices()** is called during module init. This allows +for the offloading path to also be enabled with the following flow: + + **usb_audio_probe()** + | --> USB audio streams allocated and saved to usb_chip[] + | --> Propagate connect event to USB offload driver in USB SND + | --> USB offload driver **NOT** ready! + + BE DAI link component probe + | --> DAI link is probed and SoC USB port is allocated + | --> No USB connect event due to missing USB offload driver + + USB offload driver probe + | --> **qc_usb_audio_offload_init()** + | --> Calls **snd_usb_rediscover_devices()** to notify of devices + +USB Offload Related Kcontrols +============================= +Details +------- +A set of kcontrols can be utilized by applications to help select the proper sound +devices to enable USB audio offloading. SoC USB exposes the get_offload_dev() +callback that designs can use to ensure that the proper indices are returned to the +application. + +Implementation +-------------- + +**Example:** + + **Sound Cards**: + + :: + + 0 [SM8250MTPWCD938]: sm8250 - SM8250-MTP-WCD9380-WSA8810-VA-D + SM8250-MTP-WCD9380-WSA8810-VA-DMIC + 1 [Seri ]: USB-Audio - Plantronics Blackwire 3225 Seri + Plantronics Plantronics Blackwire + 3225 Seri at usb-xhci-hcd.1.auto-1.1, + full sp + 2 [C320M ]: USB-Audio - Plantronics C320-M + Plantronics Plantronics C320-M at usb-xhci-hcd.1.auto-1.2, full speed + + **PCM Devices**: + + :: + + card 0: SM8250MTPWCD938 [SM8250-MTP-WCD9380-WSA8810-VA-D], device 0: MultiMedia1 (*) [] + Subdevices: 1/1 + Subdevice #0: subdevice #0 + card 0: SM8250MTPWCD938 [SM8250-MTP-WCD9380-WSA8810-VA-D], device 1: MultiMedia2 (*) [] + Subdevices: 1/1 + Subdevice #0: subdevice #0 + card 1: Seri [Plantronics Blackwire 3225 Seri], device 0: USB Audio [USB Audio] + Subdevices: 1/1 + Subdevice #0: subdevice #0 + card 2: C320M [Plantronics C320-M], device 0: USB Audio [USB Audio] + Subdevices: 1/1 + Subdevice #0: subdevice #0 + + **USB Sound Card** - card#1: + + :: + + USB Offload Playback Card Route PCM#0 -1 (range -1->32) + USB Offload Playback PCM Route PCM#0 -1 (range -1->255) + + **USB Sound Card** - card#2: + + :: + + USB Offload Playback Card Route PCM#0 0 (range -1->32) + USB Offload Playback PCM Route PCM#0 1 (range -1->255) + +The above example shows a scenario where the system has one ASoC platform card +(card#0) and two USB sound devices connected (card#1 and card#2). When reading +the available kcontrols for each USB audio device, the following kcontrols lists +the mapped offload card and pcm device indexes for the specific USB device: + + ``USB Offload Playback Card Route PCM#*`` + + ``USB Offload Playback PCM Route PCM#*`` + +The kcontrol is indexed, because a USB audio device could potentially have +several PCM devices. The above kcontrols are defined as: + + - ``USB Offload Playback Card Route PCM#`` **(R)**: Returns the ASoC platform sound + card index for a mapped offload path. The output **"0"** (card index) signifies + that there is an available offload path for the USB SND device through card#0. + If **"-1"** is seen, then no offload path is available for the USB SND device. + This kcontrol exists for each USB audio device that exists in the system, and + its expected to derive the current status of offload based on the output value + for the kcontrol along with the PCM route kcontrol. + + - ``USB Offload Playback PCM Route PCM#`` **(R)**: Returns the ASoC platform sound + PCM device index for a mapped offload path. The output **"1"** (PCM device index) + signifies that there is an available offload path for the USB SND device through + PCM device#0. If **"-1"** is seen, then no offload path is available for the USB\ + SND device. This kcontrol exists for each USB audio device that exists in the + system, and its expected to derive the current status of offload based on the + output value for this kcontrol, in addition to the card route kcontrol. + +USB Offload Playback Route Kcontrol +----------------------------------- +In order to allow for vendor specific implementations on audio offloading device +selection, the SoC USB layer exposes the following: + +.. code-block:: rst + + int (*update_offload_route_info)(struct snd_soc_component *component, + int card, int pcm, int direction, + enum snd_soc_usb_kctl path, + long *route) +.. + +These are specific for the **USB Offload Playback Card Route PCM#** and **USB +Offload PCM Route PCM#** kcontrols. + +When users issue get calls to the kcontrol, the registered SoC USB callbacks will +execute the registered function calls to the DPCM BE DAI link. + +**Callback Registration:** + +.. code-block:: rst + + static int q6usb_component_probe(struct snd_soc_component *component) + { + ... + usb = snd_soc_usb_allocate_port(component, 1, &data->priv); + if (IS_ERR(usb)) + return -ENOMEM; + + usb->connection_status_cb = q6usb_alsa_connection_cb; + usb->update_offload_route_info = q6usb_get_offload_dev; + + ret = snd_soc_usb_add_port(usb); +.. + +Existing USB Sound Kcontrol +--------------------------- +With the introduction of USB offload support, the above USB offload kcontrol +will be added to the pre existing list of kcontrols identified by the USB sound +framework. These kcontrols are still the main controls that are used to +modify characteristics pertaining to the USB audio device. + + :: + + Number of controls: 9 + ctl type num name value + 0 INT 2 Capture Channel Map 0, 0 (range 0->36) + 1 INT 2 Playback Channel Map 0, 0 (range 0->36) + 2 BOOL 1 Headset Capture Switch On + 3 INT 1 Headset Capture Volume 10 (range 0->13) + 4 BOOL 1 Sidetone Playback Switch On + 5 INT 1 Sidetone Playback Volume 4096 (range 0->8192) + 6 BOOL 1 Headset Playback Switch On + 7 INT 2 Headset Playback Volume 20, 20 (range 0->24) + 8 INT 1 USB Offload Playback Card Route PCM#0 0 (range -1->32) + 9 INT 1 USB Offload Playback PCM Route PCM#0 1 (range -1->255) + +Since USB audio device controls are handled over the USB control endpoint, use the +existing mechanisms present in the USB mixer to set parameters, such as volume. -- cgit v1.2.3 From 305da591bd056ae1cdf9fcf32b4abb3c38ba82c2 Mon Sep 17 00:00:00 2001 From: Wesley Cheng Date: Wed, 9 Apr 2025 12:47:54 -0700 Subject: ASoC: dt-bindings: Update example for enabling USB offload on SM8250 Add an example on enabling of USB offload for the Q6DSP. The routing can be done by the mixer, which can pass the multimedia stream to the USB backend. Acked-by: Rob Herring Signed-off-by: Wesley Cheng Acked-by: Mark Brown Link: https://lore.kernel.org/r/20250409194804.3773260-22-quic_wcheng@quicinc.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/sound/qcom,sm8250.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml index b9e33a7429b0..4e208cb7f6c6 100644 --- a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml @@ -190,4 +190,19 @@ examples: sound-dai = <&vamacro 0>; }; }; + + usb-dai-link { + link-name = "USB Playback"; + cpu { + sound-dai = <&q6afedai USB_RX>; + }; + + codec { + sound-dai = <&usbdai USB_RX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + }; }; -- cgit v1.2.3 From be526da77939920f7d8fa665889f41a0ad5b4d8d Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Mon, 9 Dec 2024 13:01:05 +0100 Subject: dt-bindings: media: camss: Restrict bus-type property The CSIPHY of Qualcomm SoCs support both D-PHY and C-PHY standards for CSI-2, but not any others so restrict the bus-type property describing this to the supported values. The only exception here is MSM8916 which only supports D-PHY. C-PHY was introduced with newer SoCs. Do note, that currently the Linux driver only supports D-PHY. Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski Reviewed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../bindings/media/qcom,msm8916-camss.yaml | 8 ++++++ .../bindings/media/qcom,msm8953-camss.yaml | 15 +++++++++++ .../bindings/media/qcom,msm8996-camss.yaml | 20 +++++++++++++++ .../bindings/media/qcom,sc8280xp-camss.yaml | 20 +++++++++++++++ .../bindings/media/qcom,sdm660-camss.yaml | 20 +++++++++++++++ .../bindings/media/qcom,sdm845-camss.yaml | 20 +++++++++++++++ .../bindings/media/qcom,sm8250-camss.yaml | 30 ++++++++++++++++++++++ 7 files changed, 133 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml index 3469a43f00d4..7c8e0a905d89 100644 --- a/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml @@ -93,6 +93,10 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes @@ -112,6 +116,10 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes diff --git a/Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml index 8856fba385b1..6d776b0ca711 100644 --- a/Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml @@ -112,6 +112,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes @@ -131,6 +136,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes @@ -150,6 +160,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes diff --git a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml index 644646de338a..a2025952fe95 100644 --- a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml @@ -115,6 +115,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes @@ -134,6 +139,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes @@ -153,6 +163,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes @@ -172,6 +187,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes diff --git a/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml index 9936f0132417..d195f1bfb23d 100644 --- a/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml @@ -143,6 +143,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - clock-lanes - data-lanes @@ -166,6 +171,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - clock-lanes - data-lanes @@ -189,6 +199,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - clock-lanes - data-lanes @@ -212,6 +227,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - clock-lanes - data-lanes diff --git a/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml index 68d8670557f5..6e6ad8390e44 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml @@ -121,6 +121,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes @@ -140,6 +145,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes @@ -159,6 +169,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes @@ -178,6 +193,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml index 289494f561e5..82bf4689d330 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml @@ -108,6 +108,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes @@ -127,6 +132,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes @@ -146,6 +156,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes @@ -165,6 +180,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - data-lanes diff --git a/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml index a372d991e652..ebf68ff4ab96 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml @@ -128,6 +128,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - clock-lanes - data-lanes @@ -151,6 +156,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - clock-lanes - data-lanes @@ -174,6 +184,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - clock-lanes - data-lanes @@ -197,6 +212,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - clock-lanes - data-lanes @@ -220,6 +240,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - clock-lanes - data-lanes @@ -243,6 +268,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - clock-lanes - data-lanes -- cgit v1.2.3 From 2ab7f87a7f4bf392e3836a2600f115a1baa1415c Mon Sep 17 00:00:00 2001 From: Bryan O'Donoghue Date: Fri, 14 Mar 2025 13:14:00 +0000 Subject: dt-bindings: media: Add qcom,x1e80100-camss Add bindings for qcom,x1e80100-camss in order to support the camera subsystem for x1e80100 as found in various Co-Pilot laptops. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Vladimir Zapolskiy Signed-off-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../bindings/media/qcom,x1e80100-camss.yaml | 367 +++++++++++++++++++++ 1 file changed, 367 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml new file mode 100644 index 000000000000..113565cf2a99 --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml @@ -0,0 +1,367 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,x1e80100-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm X1E80100 Camera Subsystem (CAMSS) + +maintainers: + - Bryan O'Donoghue + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. + +properties: + compatible: + const: qcom,x1e80100-camss + + reg: + maxItems: 17 + + reg-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csid_lite0 + - const: csid_lite1 + - const: csid_wrapper + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: csiphy4 + - const: csitpg0 + - const: csitpg1 + - const: csitpg2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite0 + - const: vfe_lite1 + + clocks: + maxItems: 29 + + clock-names: + items: + - const: camnoc_nrt_axi + - const: camnoc_rt_axi + - const: core_ahb + - const: cpas_ahb + - const: cpas_fast_ahb + - const: cpas_vfe0 + - const: cpas_vfe1 + - const: cpas_vfe_lite + - const: cphy_rx_clk_src + - const: csid + - const: csid_csiphy_rx + - const: csiphy0 + - const: csiphy0_timer + - const: csiphy1 + - const: csiphy1_timer + - const: csiphy2 + - const: csiphy2_timer + - const: csiphy4 + - const: csiphy4_timer + - const: gcc_axi_hf + - const: gcc_axi_sf + - const: vfe0 + - const: vfe0_fast_ahb + - const: vfe1 + - const: vfe1_fast_ahb + - const: vfe_lite + - const: vfe_lite_ahb + - const: vfe_lite_cphy_rx + - const: vfe_lite_csid + + interrupts: + maxItems: 13 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csid_lite0 + - const: csid_lite1 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: csiphy4 + - const: vfe0 + - const: vfe1 + - const: vfe_lite0 + - const: vfe_lite1 + + interconnects: + maxItems: 4 + + interconnect-names: + items: + - const: ahb + - const: hf_mnoc + - const: sf_mnoc + - const: sf_icp_mnoc + + iommus: + maxItems: 8 + + power-domains: + items: + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller. + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller. + - description: Titan Top GDSC - Titan ISP Block, Global Distributed Switch Controller. + + power-domain-names: + items: + - const: ife0 + - const: ife1 + - const: top + + vdd-csiphy-0p8-supply: + description: + Phandle to a 0.8V regulator supply to a PHY. + + vdd-csiphy-1p2-supply: + description: + Phandle to 1.8V regulator supply to a PHY. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + patternProperties: + "^port@[0-3]+$": + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + + description: + Input port for receiving CSI data from a CSIPHY. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - interrupt-names + - interconnects + - interconnect-names + - iommus + - power-domains + - power-domain-names + - vdd-csiphy-0p8-supply + - vdd-csiphy-1p2-supply + - ports + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + camss: isp@acb6000 { + compatible = "qcom,x1e80100-camss"; + + reg = <0 0x0acb7000 0 0x2000>, + <0 0x0acb9000 0 0x2000>, + <0 0x0acbb000 0 0x2000>, + <0 0x0acc6000 0 0x1000>, + <0 0x0acca000 0 0x1000>, + <0 0x0acb6000 0 0x1000>, + <0 0x0ace4000 0 0x1000>, + <0 0x0ace6000 0 0x1000>, + <0 0x0ace8000 0 0x1000>, + <0 0x0acec000 0 0x4000>, + <0 0x0acf6000 0 0x1000>, + <0 0x0acf7000 0 0x1000>, + <0 0x0acf8000 0 0x1000>, + <0 0x0ac62000 0 0x4000>, + <0 0x0ac71000 0 0x4000>, + <0 0x0acc7000 0 0x2000>, + <0 0x0accb000 0 0x2000>; + + reg-names = "csid0", + "csid1", + "csid2", + "csid_lite0", + "csid_lite1", + "csid_wrapper", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy4", + "csitpg0", + "csitpg1", + "csitpg2", + "vfe0", + "vfe1", + "vfe_lite0", + "vfe_lite1"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_NRT_CLK>, + <&camcc CAM_CC_CAMNOC_AXI_RT_CLK>, + <&camcc CAM_CC_CORE_AHB_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CPAS_FAST_AHB_CLK>, + <&camcc CAM_CC_CPAS_IFE_0_CLK>, + <&camcc CAM_CC_CPAS_IFE_1_CLK>, + <&camcc CAM_CC_CPAS_IFE_LITE_CLK>, + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSID_CLK>, + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY4_CLK>, + <&camcc CAM_CC_CSI4PHYTIMER_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&gcc GCC_CAMERA_SF_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>; + + clock-names = "camnoc_nrt_axi", + "camnoc_rt_axi", + "core_ahb", + "cpas_ahb", + "cpas_fast_ahb", + "cpas_vfe0", + "cpas_vfe1", + "cpas_vfe_lite", + "cphy_rx_clk_src", + "csid", + "csid_csiphy_rx", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "csiphy4", + "csiphy4_timer", + "gcc_axi_hf", + "gcc_axi_sf", + "vfe0", + "vfe0_fast_ahb", + "vfe1", + "vfe1_fast_ahb", + "vfe_lite", + "vfe_lite_ahb", + "vfe_lite_cphy_rx", + "vfe_lite_csid"; + + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + ; + + interrupt-names = "csid0", + "csid1", + "csid2", + "csid_lite0", + "csid_lite1", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy4", + "vfe0", + "vfe1", + "vfe_lite0", + "vfe_lite1"; + + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&mmss_noc MASTER_CAMNOC_ICP QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + + interconnect-names = "ahb", + "hf_mnoc", + "sf_mnoc", + "sf_icp_mnoc"; + + iommus = <&apps_smmu 0x800 0x60>, + <&apps_smmu 0x860 0x60>, + <&apps_smmu 0x1800 0x60>, + <&apps_smmu 0x1860 0x60>, + <&apps_smmu 0x18e0 0x00>, + <&apps_smmu 0x1980 0x20>, + <&apps_smmu 0x1900 0x00>, + <&apps_smmu 0x19a0 0x20>; + + power-domains = <&camcc CAM_CC_IFE_0_GDSC>, + <&camcc CAM_CC_IFE_1_GDSC>, + <&camcc CAM_CC_TITAN_TOP_GDSC>; + + power-domain-names = "ife0", + "ife1", + "top"; + + vdd-csiphy-0p8-supply = <&csiphy_0p8_supply>; + vdd-csiphy-1p2-supply = <&csiphy_1p2_supply>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + csiphy_ep0: endpoint { + clock-lanes = <7>; + data-lanes = <0 1>; + remote-endpoint = <&sensor_ep>; + }; + }; + }; + }; + }; -- cgit v1.2.3 From bf462ef8c5ad61616b54751915f3dd1d3301a505 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Fri, 21 Mar 2025 08:49:00 +0530 Subject: dt-bindings: media: qcom,sm8550-iris: document SA8775p IRIS accelerator Document the IRIS video decoder and encoder accelerator found in the SA8775p platform. SA8775p and SM8550 are irisv3 with same core and bindings, hence SA8775p is made fallback to SM8550. QCS8300 is a downscaled version of irisv3 and have different hardware capabilities. SM8650 is an irisv3 with different (higher) number of reset lines compared to SM8550. QCS8300 is yet to come in future posting, while SM8650 is posted as https://lore.kernel.org/all/20250305-topic-sm8x50-iris-v10-v2-1-bd65a3fc099e@linaro.org/ Reviewed-by: Bryan O'Donoghue Reviewed-by: Krzysztof Kozlowski Signed-off-by: Vikash Garodia Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml index e424ea84c211..6a89e9e38087 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml @@ -19,7 +19,12 @@ allOf: properties: compatible: - const: qcom,sm8550-iris + oneOf: + - items: + - enum: + - qcom,sa8775p-iris + - const: qcom,sm8550-iris + - const: qcom,sm8550-iris power-domains: maxItems: 4 -- cgit v1.2.3 From 4edd34175e3dd91dc30b3091efdf3f9c7143d4c4 Mon Sep 17 00:00:00 2001 From: Renjiang Han Date: Thu, 19 Dec 2024 11:11:53 +0530 Subject: dt-bindings: media: add support for video hardware on QCS615 platform QCS615 uses the same video core as SC7180. Therefore, add qcom,qcs615-venus compatible to qcom,sc7180-venus.yaml to enable video hardware support on QCS615 platform. Make qcom,qcs615-venus fallback to qcom,sc7180-venus to ensure compatibility with existing configurations. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Renjiang Han Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml index 83c4a5d95f02..bfd8b1ad4731 100644 --- a/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml @@ -18,7 +18,12 @@ allOf: properties: compatible: - const: qcom,sc7180-venus + oneOf: + - items: + - enum: + - qcom,qcs615-venus + - const: qcom,sc7180-venus + - const: qcom,sc7180-venus power-domains: minItems: 2 -- cgit v1.2.3 From aae29082b6620c664e97a1e2f2062abc6a58659d Mon Sep 17 00:00:00 2001 From: Nitheesh Sekar Date: Wed, 26 Mar 2025 12:10:55 +0400 Subject: dt-bindings: phy: qcom: uniphy-pcie: Add ipq5018 compatible The IPQ5018 SoC contains a Gen2 1 and 2-lane PCIe UNIPHY which is the same as the one found in IPQ5332. As such, add IPQ5018 compatible. Signed-off-by: Nitheesh Sekar Signed-off-by: Sricharan Ramabadhran Reviewed-by: Rob Herring (Arm) Signed-off-by: George Moussalem Link: https://lore.kernel.org/r/20250326-ipq5018-pcie-v7-1-e1828fef06c9@outlook.com Signed-off-by: Vinod Koul --- .../bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml | 49 ++++++++++++++++++---- 1 file changed, 41 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml index e39168d55d23..6e9df81441e9 100644 --- a/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml @@ -11,26 +11,24 @@ maintainers: - Varadarajan Narayanan description: - PCIe and USB combo PHY found in Qualcomm IPQ5332 SoC + PCIe and USB combo PHY found in Qualcomm IPQ5018 & IPQ5332 SoCs properties: compatible: enum: + - qcom,ipq5018-uniphy-pcie-phy - qcom,ipq5332-uniphy-pcie-phy reg: maxItems: 1 clocks: - items: - - description: pcie pipe clock - - description: pcie ahb clock + minItems: 1 + maxItems: 2 resets: - items: - - description: phy reset - - description: ahb reset - - description: cfg reset + minItems: 2 + maxItems: 3 "#phy-cells": const: 0 @@ -53,6 +51,41 @@ required: additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq5018-uniphy-pcie-phy + then: + properties: + clocks: + items: + - description: pcie pipe clock + resets: + items: + - description: phy reset + - description: cfg reset + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq5332-uniphy-pcie-phy + then: + properties: + clocks: + items: + - description: pcie pipe clock + - description: pcie ahb clock + resets: + items: + - description: phy reset + - description: ahb reset + - description: cfg reset + examples: - | #include -- cgit v1.2.3 From b7628c7973765c856866b3047c9002ae0825add6 Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Wed, 9 Apr 2025 11:53:15 +0100 Subject: KVM: arm64: Allow userspace to limit the number of PMU counters for EL2 VMs As long as we had purely EL1 VMs, we could easily update the number of guest-visible counters by letting userspace write to PMCR_EL0.N. With VMs started at EL2, PMCR_EL1.N only reflects MDCR_EL2.HPMN, and we don't have a good way to limit it. For this purpose, introduce a new PMUv3 attribute that allows limiting the maximum number of counters. This requires the explicit selection of a PMU. Suggested-by: Oliver Upton Reviewed-by: Oliver Upton Signed-off-by: Marc Zyngier --- Documentation/virt/kvm/devices/vcpu.rst | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'Documentation') diff --git a/Documentation/virt/kvm/devices/vcpu.rst b/Documentation/virt/kvm/devices/vcpu.rst index 31a9576c07af..60bf205cb373 100644 --- a/Documentation/virt/kvm/devices/vcpu.rst +++ b/Documentation/virt/kvm/devices/vcpu.rst @@ -137,6 +137,30 @@ exit_reason = KVM_EXIT_FAIL_ENTRY and populate the fail_entry struct by setting hardare_entry_failure_reason field to KVM_EXIT_FAIL_ENTRY_CPU_UNSUPPORTED and the cpu field to the processor id. +1.5 ATTRIBUTE: KVM_ARM_VCPU_PMU_V3_SET_NR_COUNTERS +-------------------------------------------------- + +:Parameters: in kvm_device_attr.addr the address to an unsigned int + representing the maximum value taken by PMCR_EL0.N + +:Returns: + + ======= ==================================================== + -EBUSY PMUv3 already initialized, a VCPU has already run or + an event filter has already been set + -EFAULT Error accessing the value pointed to by addr + -ENODEV PMUv3 not supported or GIC not initialized + -EINVAL No PMUv3 explicitly selected, or value of N out of + range + ======= ==================================================== + +Set the number of implemented event counters in the virtual PMU. This +mandates that a PMU has explicitly been selected via +KVM_ARM_VCPU_PMU_V3_SET_PMU, and will fail when no PMU has been +explicitly selected, or the number of counters is out of range for the +selected PMU. Selecting a new PMU cancels the effect of setting this +attribute. + 2. GROUP: KVM_ARM_VCPU_TIMER_CTRL ================================= -- cgit v1.2.3 From f1745496d3fba34a2e16ef47d78903d7208c1214 Mon Sep 17 00:00:00 2001 From: David Howells Date: Wed, 9 Apr 2025 15:18:45 +0100 Subject: netfs: Update main API document Bring the netfs documentation up to date. Signed-off-by: David Howells Link: https://lore.kernel.org/1690127.1744208325@warthog.procyon.org.uk Reviewed-by: "Paulo Alcantara (Red Hat)" cc: Jeff Layton cc: Viacheslav Dubeyko cc: Alex Markuze cc: Timothy Day cc: Jonathan Corbet cc: netfs@lists.linux.dev cc: linux-doc@vger.kernel.org cc: linux-fsdevel@vger.kernel.org Signed-off-by: Christian Brauner --- Documentation/filesystems/netfs_library.rst | 1016 +++++++++++++++++++-------- 1 file changed, 739 insertions(+), 277 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/netfs_library.rst b/Documentation/filesystems/netfs_library.rst index 3886c14f89f4..939b4b624fad 100644 --- a/Documentation/filesystems/netfs_library.rst +++ b/Documentation/filesystems/netfs_library.rst @@ -1,33 +1,187 @@ .. SPDX-License-Identifier: GPL-2.0 -================================= -Network Filesystem Helper Library -================================= +=================================== +Network Filesystem Services Library +=================================== .. Contents: - Overview. + - Requests and streams. + - Subrequests. + - Result collection and retry. + - Local caching. + - Content encryption (fscrypt). - Per-inode context. - Inode context helper functions. - - Buffered read helpers. - - Read helper functions. - - Read helper structures. - - Read helper operations. - - Read helper procedure. - - Read helper cache API. + - Inode locking. + - Inode writeback. + - High-level VFS API. + - Unlocked read/write iter. + - Pre-locked read/write iter. + - Monolithic files API. + - Memory-mapped I/O API. + - High-level VM API. + - Deprecated PG_private2 API. + - I/O request API. + - Request structure. + - Stream structure. + - Subrequest structure. + - Filesystem methods. + - Terminating a subrequest. + - Local cache API. + - API function reference. Overview ======== -The network filesystem helper library is a set of functions designed to aid a -network filesystem in implementing VM/VFS operations. For the moment, that -just includes turning various VM buffered read operations into requests to read -from the server. The helper library, however, can also interpose other -services, such as local caching or local data encryption. +The network filesystem services library, netfslib, is a set of functions +designed to aid a network filesystem in implementing VM/VFS API operations. It +takes over the normal buffered read, readahead, write and writeback and also +handles unbuffered and direct I/O. -Note that the library module doesn't link against local caching directly, so -access must be provided by the netfs. +The library provides support for (re-)negotiation of I/O sizes and retrying +failed I/O as well as local caching and will, in the future, provide content +encryption. + +It insulates the filesystem from VM interface changes as much as possible and +handles VM features such as large multipage folios. The filesystem basically +just has to provide a way to perform read and write RPC calls. + +The way I/O is organised inside netfslib consists of a number of objects: + + * A *request*. A request is used to track the progress of the I/O overall and + to hold on to resources. The collection of results is done at the request + level. The I/O within a request is divided into a number of parallel + streams of subrequests. + + * A *stream*. A non-overlapping series of subrequests. The subrequests + within a stream do not have to be contiguous. + + * A *subrequest*. This is the basic unit of I/O. It represents a single RPC + call or a single cache I/O operation. The library passes these to the + filesystem and the cache to perform. + +Requests and Streams +-------------------- + +When actually performing I/O (as opposed to just copying into the pagecache), +netfslib will create one or more requests to track the progress of the I/O and +to hold resources. + +A read operation will have a single stream and the subrequests within that +stream may be of mixed origins, for instance mixing RPC subrequests and cache +subrequests. + +On the other hand, a write operation may have multiple streams, where each +stream targets a different destination. For instance, there may be one stream +writing to the local cache and one to the server. Currently, only two streams +are allowed, but this could be increased if parallel writes to multiple servers +is desired. + +The subrequests within a write stream do not need to match alignment or size +with the subrequests in another write stream and netfslib performs the tiling +of subrequests in each stream over the source buffer independently. Further, +each stream may contain holes that don't correspond to holes in the other +stream. + +In addition, the subrequests do not need to correspond to the boundaries of the +folios or vectors in the source/destination buffer. The library handles the +collection of results and the wrangling of folio flags and references. + +Subrequests +----------- + +Subrequests are at the heart of the interaction between netfslib and the +filesystem using it. Each subrequest is expected to correspond to a single +read or write RPC or cache operation. The library will stitch together the +results from a set of subrequests to provide a higher level operation. + +Netfslib has two interactions with the filesystem or the cache when setting up +a subrequest. First, there's an optional preparatory step that allows the +filesystem to negotiate the limits on the subrequest, both in terms of maximum +number of bytes and maximum number of vectors (e.g. for RDMA). This may +involve negotiating with the server (e.g. cifs needing to acquire credits). + +And, secondly, there's the issuing step in which the subrequest is handed off +to the filesystem to perform. + +Note that these two steps are done slightly differently between read and write: + + * For reads, the VM/VFS tells us how much is being requested up front, so the + library can preset maximum values that the cache and then the filesystem can + then reduce. The cache also gets consulted first on whether it wants to do + a read before the filesystem is consulted. + + * For writeback, it is unknown how much there will be to write until the + pagecache is walked, so no limit is set by the library. + +Once a subrequest is completed, the filesystem or cache informs the library of +the completion and then collection is invoked. Depending on whether the +request is synchronous or asynchronous, the collection of results will be done +in either the application thread or in a work queue. + +Result Collection and Retry +--------------------------- + +As subrequests complete, the results are collected and collated by the library +and folio unlocking is performed progressively (if appropriate). Once the +request is complete, async completion will be invoked (again, if appropriate). +It is possible for the filesystem to provide interim progress reports to the +library to cause folio unlocking to happen earlier if possible. + +If any subrequests fail, netfslib can retry them. It will wait until all +subrequests are completed, offer the filesystem the opportunity to fiddle with +the resources/state held by the request and poke at the subrequests before +re-preparing and re-issuing the subrequests. + +This allows the tiling of contiguous sets of failed subrequest within a stream +to be changed, adding more subrequests or ditching excess as necessary (for +instance, if the network sizes change or the server decides it wants smaller +chunks). + +Further, if one or more contiguous cache-read subrequests fail, the library +will pass them to the filesystem to perform instead, renegotiating and retiling +them as necessary to fit with the filesystem's parameters rather than those of +the cache. + +Local Caching +------------- + +One of the services netfslib provides, via ``fscache``, is the option to cache +on local disk a copy of the data obtained from/written to a network filesystem. +The library will manage the storing, retrieval and some invalidation of data +automatically on behalf of the filesystem if a cookie is attached to the +``netfs_inode``. + +Note that local caching used to use the PG_private_2 (aliased as PG_fscache) to +keep track of a page that was being written to the cache, but this is now +deprecated as PG_private_2 will be removed. + +Instead, folios that are read from the server for which there was no data in +the cache will be marked as dirty and will have ``folio->private`` set to a +special value (``NETFS_FOLIO_COPY_TO_CACHE``) and left to writeback to write. +If the folio is modified before that happened, the special value will be +cleared and the write will become normally dirty. + +When writeback occurs, folios that are so marked will only be written to the +cache and not to the server. Writeback handles mixed cache-only writes and +server-and-cache writes by using two streams, sending one to the cache and one +to the server. The server stream will have gaps in it corresponding to those +folios. + +Content Encryption (fscrypt) +---------------------------- + +Though it does not do so yet, at some point netfslib will acquire the ability +to do client-side content encryption on behalf of the network filesystem (Ceph, +for example). fscrypt can be used for this if appropriate (it may not be - +cifs, for example). + +The data will be stored encrypted in the local cache using the same manner of +encryption as the data written to the server and the library will impose bounce +buffering and RMW cycles as necessary. Per-Inode Context @@ -40,10 +194,13 @@ structure is defined:: struct netfs_inode { struct inode inode; const struct netfs_request_ops *ops; - struct fscache_cookie *cache; + struct fscache_cookie * cache; + loff_t remote_i_size; + unsigned long flags; + ... }; -A network filesystem that wants to use netfs lib must place one of these in its +A network filesystem that wants to use netfslib must place one of these in its inode wrapper struct instead of the VFS ``struct inode``. This can be done in a way similar to the following:: @@ -56,7 +213,8 @@ This allows netfslib to find its state by using ``container_of()`` from the inode pointer, thereby allowing the netfslib helper functions to be pointed to directly by the VFS/VM operation tables. -The structure contains the following fields: +The structure contains the following fields that are of interest to the +filesystem: * ``inode`` @@ -71,6 +229,37 @@ The structure contains the following fields: Local caching cookie, or NULL if no caching is enabled. This field does not exist if fscache is disabled. + * ``remote_i_size`` + + The size of the file on the server. This differs from inode->i_size if + local modifications have been made but not yet written back. + + * ``flags`` + + A set of flags, some of which the filesystem might be interested in: + + * ``NETFS_ICTX_MODIFIED_ATTR`` + + Set if netfslib modifies mtime/ctime. The filesystem is free to ignore + this or clear it. + + * ``NETFS_ICTX_UNBUFFERED`` + + Do unbuffered I/O upon the file. Like direct I/O but without the + alignment limitations. RMW will be performed if necessary. The pagecache + will not be used unless mmap() is also used. + + * ``NETFS_ICTX_WRITETHROUGH`` + + Do writethrough caching upon the file. I/O will be set up and dispatched + as buffered writes are made to the page cache. mmap() does the normal + writeback thing. + + * ``NETFS_ICTX_SINGLE_NO_UPLOAD`` + + Set if the file has a monolithic content that must be read entirely in a + single go and must not be written back to the server, though it can be + cached (e.g. AFS directories). Inode Context Helper Functions ------------------------------ @@ -84,117 +273,250 @@ set the operations table pointer:: then a function to cast from the VFS inode structure to the netfs context:: - struct netfs_inode *netfs_node(struct inode *inode); + struct netfs_inode *netfs_inode(struct inode *inode); and finally, a function to get the cache cookie pointer from the context attached to an inode (or NULL if fscache is disabled):: struct fscache_cookie *netfs_i_cookie(struct netfs_inode *ctx); +Inode Locking +------------- + +A number of functions are provided to manage the locking of i_rwsem for I/O and +to effectively extend it to provide more separate classes of exclusion:: + + int netfs_start_io_read(struct inode *inode); + void netfs_end_io_read(struct inode *inode); + int netfs_start_io_write(struct inode *inode); + void netfs_end_io_write(struct inode *inode); + int netfs_start_io_direct(struct inode *inode); + void netfs_end_io_direct(struct inode *inode); + +The exclusion breaks down into four separate classes: + + 1) Buffered reads and writes. + + Buffered reads can run concurrently each other and with buffered writes, + but buffered writes cannot run concurrently with each other. + + 2) Direct reads and writes. + + Direct (and unbuffered) reads and writes can run concurrently since they do + not share local buffering (i.e. the pagecache) and, in a network + filesystem, are expected to have exclusion managed on the server (though + this may not be the case for, say, Ceph). + + 3) Other major inode modifying operations (e.g. truncate, fallocate). + + These should just access i_rwsem directly. + + 4) mmap(). + + mmap'd accesses might operate concurrently with any of the other classes. + They might form the buffer for an intra-file loopback DIO read/write. They + might be permitted on unbuffered files. + +Inode Writeback +--------------- + +Netfslib will pin resources on an inode for future writeback (such as pinning +use of an fscache cookie) when an inode is dirtied. However, this pinning +needs careful management. To manage the pinning, the following sequence +occurs: + + 1) An inode state flag ``I_PINNING_NETFS_WB`` is set by netfslib when the + pinning begins (when a folio is dirtied, for example) if the cache is + active to stop the cache structures from being discarded and the cache + space from being culled. This also prevents re-getting of cache resources + if the flag is already set. + + 2) This flag then cleared inside the inode lock during inode writeback in the + VM - and the fact that it was set is transferred to ``->unpinned_netfs_wb`` + in ``struct writeback_control``. + + 3) If ``->unpinned_netfs_wb`` is now set, the write_inode procedure is forced. + + 4) The filesystem's ``->write_inode()`` function is invoked to do the cleanup. + + 5) The filesystem invokes netfs to do its cleanup. + +To do the cleanup, netfslib provides a function to do the resource unpinning:: + + int netfs_unpin_writeback(struct inode *inode, struct writeback_control *wbc); + +If the filesystem doesn't need to do anything else, this may be set as a its +``.write_inode`` method. + +Further, if an inode is deleted, the filesystem's write_inode method may not +get called, so:: + + void netfs_clear_inode_writeback(struct inode *inode, const void *aux); -Buffered Read Helpers -===================== +must be called from ``->evict_inode()`` *before* ``clear_inode()`` is called. -The library provides a set of read helpers that handle the ->read_folio(), -->readahead() and much of the ->write_begin() VM operations and translate them -into a common call framework. -The following services are provided: +High-Level VFS API +================== - * Handle folios that span multiple pages. +Netfslib provides a number of sets of API calls for the filesystem to delegate +VFS operations to. Netfslib, in turn, will call out to the filesystem and the +cache to negotiate I/O sizes, issue RPCs and provide places for it to intervene +at various times. - * Insulate the netfs from VM interface changes. +Unlocked Read/Write Iter +------------------------ - * Allow the netfs to arbitrarily split reads up into pieces, even ones that - don't match folio sizes or folio alignments and that may cross folios. +The first API set is for the delegation of operations to netfslib when the +filesystem is called through the standard VFS read/write_iter methods:: - * Allow the netfs to expand a readahead request in both directions to meet its - needs. + ssize_t netfs_file_read_iter(struct kiocb *iocb, struct iov_iter *iter); + ssize_t netfs_file_write_iter(struct kiocb *iocb, struct iov_iter *from); + ssize_t netfs_buffered_read_iter(struct kiocb *iocb, struct iov_iter *iter); + ssize_t netfs_unbuffered_read_iter(struct kiocb *iocb, struct iov_iter *iter); + ssize_t netfs_unbuffered_write_iter(struct kiocb *iocb, struct iov_iter *from); - * Allow the netfs to partially fulfil a read, which will then be resubmitted. +They can be assigned directly to ``.read_iter`` and ``.write_iter``. They +perform the inode locking themselves and the first two will switch between +buffered I/O and DIO as appropriate. - * Handle local caching, allowing cached data and server-read data to be - interleaved for a single request. +Pre-Locked Read/Write Iter +-------------------------- - * Handle clearing of bufferage that isn't on the server. +The second API set is for the delegation of operations to netfslib when the +filesystem is called through the standard VFS methods, but needs to do some +other stuff before or after calling netfslib whilst still inside locked section +(e.g. Ceph negotiating caps). The unbuffered read function is:: - * Handle retrying of reads that failed, switching reads from the cache to the - server as necessary. + ssize_t netfs_unbuffered_read_iter_locked(struct kiocb *iocb, struct iov_iter *iter); - * In the future, this is a place that other services can be performed, such as - local encryption of data to be stored remotely or in the cache. +This must not be assigned directly to ``.read_iter`` and the filesystem is +responsible for performing the inode locking before calling it. In the case of +buffered read, the filesystem should use ``filemap_read()``. -From the network filesystem, the helpers require a table of operations. This -includes a mandatory method to issue a read operation along with a number of -optional methods. +There are three functions for writes:: + ssize_t netfs_buffered_write_iter_locked(struct kiocb *iocb, struct iov_iter *from, + struct netfs_group *netfs_group); + ssize_t netfs_perform_write(struct kiocb *iocb, struct iov_iter *iter, + struct netfs_group *netfs_group); + ssize_t netfs_unbuffered_write_iter_locked(struct kiocb *iocb, struct iov_iter *iter, + struct netfs_group *netfs_group); -Read Helper Functions +These must not be assigned directly to ``.write_iter`` and the filesystem is +responsible for performing the inode locking before calling them. + +The first two functions are for buffered writes; the first just adds some +standard write checks and jumps to the second, but if the filesystem wants to +do the checks itself, it can use the second directly. The third function is +for unbuffered or DIO writes. + +On all three write functions, there is a writeback group pointer (which should +be NULL if the filesystem doesn't use this). Writeback groups are set on +folios when they're modified. If a folio to-be-modified is already marked with +a different group, it is flushed first. The writeback API allows writing back +of a specific group. + +Memory-Mapped I/O API --------------------- -Three read helpers are provided:: +An API for support of mmap()'d I/O is provided:: + + vm_fault_t netfs_page_mkwrite(struct vm_fault *vmf, struct netfs_group *netfs_group); + +This allows the filesystem to delegate ``.page_mkwrite`` to netfslib. The +filesystem should not take the inode lock before calling it, but, as with the +locked write functions above, this does take a writeback group pointer. If the +page to be made writable is in a different group, it will be flushed first. + +Monolithic Files API +-------------------- + +There is also a special API set for files for which the content must be read in +a single RPC (and not written back) and is maintained as a monolithic blob +(e.g. an AFS directory), though it can be stored and updated in the local cache:: + + ssize_t netfs_read_single(struct inode *inode, struct file *file, struct iov_iter *iter); + void netfs_single_mark_inode_dirty(struct inode *inode); + int netfs_writeback_single(struct address_space *mapping, + struct writeback_control *wbc, + struct iov_iter *iter); + +The first function reads from a file into the given buffer, reading from the +cache in preference if the data is cached there; the second function allows the +inode to be marked dirty, causing a later writeback; and the third function can +be called from the writeback code to write the data to the cache, if there is +one. - void netfs_readahead(struct readahead_control *ractl); - int netfs_read_folio(struct file *file, - struct folio *folio); - int netfs_write_begin(struct netfs_inode *ctx, - struct file *file, - struct address_space *mapping, - loff_t pos, - unsigned int len, - struct folio **_folio, - void **_fsdata); +The inode should be marked ``NETFS_ICTX_SINGLE_NO_UPLOAD`` if this API is to be +used. The writeback function requires the buffer to be of ITER_FOLIOQ type. -Each corresponds to a VM address space operation. These operations use the -state in the per-inode context. +High-Level VM API +================== -For ->readahead() and ->read_folio(), the network filesystem just point directly -at the corresponding read helper; whereas for ->write_begin(), it may be a -little more complicated as the network filesystem might want to flush -conflicting writes or track dirty data and needs to put the acquired folio if -an error occurs after calling the helper. +Netfslib also provides a number of sets of API calls for the filesystem to +delegate VM operations to. Again, netfslib, in turn, will call out to the +filesystem and the cache to negotiate I/O sizes, issue RPCs and provide places +for it to intervene at various times:: -The helpers manage the read request, calling back into the network filesystem -through the supplied table of operations. Waits will be performed as -necessary before returning for helpers that are meant to be synchronous. + void netfs_readahead(struct readahead_control *); + int netfs_read_folio(struct file *, struct folio *); + int netfs_writepages(struct address_space *mapping, + struct writeback_control *wbc); + bool netfs_dirty_folio(struct address_space *mapping, struct folio *folio); + void netfs_invalidate_folio(struct folio *folio, size_t offset, size_t length); + bool netfs_release_folio(struct folio *folio, gfp_t gfp); -If an error occurs, the ->free_request() will be called to clean up the -netfs_io_request struct allocated. If some parts of the request are in -progress when an error occurs, the request will get partially completed if -sufficient data is read. +These are ``address_space_operations`` methods and can be set directly in the +operations table. -Additionally, there is:: +Deprecated PG_private_2 API +--------------------------- - * void netfs_subreq_terminated(struct netfs_io_subrequest *subreq, - ssize_t transferred_or_error, - bool was_async); +There is also a deprecated function for filesystems that still use the +``->write_begin`` method:: -which should be called to complete a read subrequest. This is given the number -of bytes transferred or a negative error code, plus a flag indicating whether -the operation was asynchronous (ie. whether the follow-on processing can be -done in the current context, given this may involve sleeping). + int netfs_write_begin(struct netfs_inode *inode, struct file *file, + struct address_space *mapping, loff_t pos, unsigned int len, + struct folio **_folio, void **_fsdata); +It uses the deprecated PG_private_2 flag and so should not be used. -Read Helper Structures ----------------------- -The read helpers make use of a couple of structures to maintain the state of -the read. The first is a structure that manages a read request as a whole:: +I/O Request API +=============== + +The I/O request API comprises a number of structures and a number of functions +that the filesystem may need to use. + +Request Structure +----------------- + +The request structure manages the request as a whole, holding some resources +and state on behalf of the filesystem and tracking the collection of results:: struct netfs_io_request { + enum netfs_io_origin origin; struct inode *inode; struct address_space *mapping; - struct netfs_cache_resources cache_resources; + struct netfs_group *group; + struct netfs_io_stream io_streams[]; void *netfs_priv; - loff_t start; - size_t len; - loff_t i_size; - const struct netfs_request_ops *netfs_ops; + void *netfs_priv2; + unsigned long long start; + unsigned long long len; + unsigned long long i_size; unsigned int debug_id; + unsigned long flags; ... }; -The above fields are the ones the netfs can use. They are: +Many of the fields are for internal use, but the fields shown here are of +interest to the filesystem: + + * ``origin`` + + The origin of the request (readahead, read_folio, DIO read, writeback, ...). * ``inode`` * ``mapping`` @@ -202,11 +524,19 @@ The above fields are the ones the netfs can use. They are: The inode and the address space of the file being read from. The mapping may or may not point to inode->i_data. - * ``cache_resources`` + * ``group`` + + The writeback group this request is dealing with or NULL. This holds a ref + on the group. + + * ``io_streams`` - Resources for the local cache to use, if present. + The parallel streams of subrequests available to the request. Currently two + are available, but this may be made extensible in future. ``NR_IO_STREAMS`` + indicates the size of the array. * ``netfs_priv`` + * ``netfs_priv2`` The network filesystem's private data. The value for this can be passed in to the helper functions or set during the request. @@ -221,37 +551,121 @@ The above fields are the ones the netfs can use. They are: The size of the file at the start of the request. - * ``netfs_ops`` - - A pointer to the operation table. The value for this is passed into the - helper functions. - * ``debug_id`` A number allocated to this operation that can be displayed in trace lines for reference. + * ``flags`` + + Flags for managing and controlling the operation of the request. Some of + these may be of interest to the filesystem: + + * ``NETFS_RREQ_RETRYING`` + + Netfslib sets this when generating retries. + + * ``NETFS_RREQ_PAUSE`` + + The filesystem can set this to request to pause the library's subrequest + issuing loop - but care needs to be taken as netfslib may also set it. + + * ``NETFS_RREQ_NONBLOCK`` + * ``NETFS_RREQ_BLOCKED`` + + Netfslib sets the first to indicate that non-blocking mode was set by the + caller and the filesystem can set the second to indicate that it would + have had to block. + + * ``NETFS_RREQ_USE_PGPRIV2`` + + The filesystem can set this if it wants to use PG_private_2 to track + whether a folio is being written to the cache. This is deprecated as + PG_private_2 is going to go away. + +If the filesystem wants more private data than is afforded by this structure, +then it should wrap it and provide its own allocator. + +Stream Structure +---------------- + +A request is comprised of one or more parallel streams and each stream may be +aimed at a different target. + +For read requests, only stream 0 is used. This can contain a mixture of +subrequests aimed at different sources. For write requests, stream 0 is used +for the server and stream 1 is used for the cache. For buffered writeback, +stream 0 is not enabled unless a normal dirty folio is encountered, at which +point ->begin_writeback() will be invoked and the filesystem can mark the +stream available. + +The stream struct looks like:: + + struct netfs_io_stream { + unsigned char stream_nr; + bool avail; + size_t sreq_max_len; + unsigned int sreq_max_segs; + unsigned int submit_extendable_to; + ... + }; + +A number of members are available for access/use by the filesystem: + + * ``stream_nr`` + + The number of the stream within the request. + + * ``avail`` + + True if the stream is available for use. The filesystem should set this on + stream zero if in ->begin_writeback(). + + * ``sreq_max_len`` + * ``sreq_max_segs`` + + These are set by the filesystem or the cache in ->prepare_read() or + ->prepare_write() for each subrequest to indicate the maximum number of + bytes and, optionally, the maximum number of segments (if not 0) that that + subrequest can support. + + * ``submit_extendable_to`` -The second structure is used to manage individual slices of the overall read -request:: + The size that a subrequest can be rounded up to beyond the EOF, given the + available buffer. This allows the cache to work out if it can do a DIO read + or write that straddles the EOF marker. + +Subrequest Structure +-------------------- + +Individual units of I/O are managed by the subrequest structure. These +represent slices of the overall request and run independently:: struct netfs_io_subrequest { struct netfs_io_request *rreq; - loff_t start; + struct iov_iter io_iter; + unsigned long long start; size_t len; size_t transferred; unsigned long flags; + short error; unsigned short debug_index; + unsigned char stream_nr; ... }; -Each subrequest is expected to access a single source, though the helpers will +Each subrequest is expected to access a single source, though the library will handle falling back from one source type to another. The members are: * ``rreq`` A pointer to the read request. + * ``io_iter`` + + An I/O iterator representing a slice of the buffer to be read into or + written from. + * ``start`` * ``len`` @@ -260,241 +674,300 @@ handle falling back from one source type to another. The members are: * ``transferred`` - The amount of data transferred so far of the length of this slice. The - network filesystem or cache should start the operation this far into the - slice. If a short read occurs, the helpers will call again, having updated - this to reflect the amount read so far. + The amount of data transferred so far for this subrequest. This should be + added to with the length of the transfer made by this issuance of the + subrequest. If this is less than ``len`` then the subrequest may be + reissued to continue. * ``flags`` - Flags pertaining to the read. There are two of interest to the filesystem - or cache: + Flags for managing the subrequest. There are a number of interest to the + filesystem or cache: + + * ``NETFS_SREQ_MADE_PROGRESS`` + + Set by the filesystem to indicates that at least one byte of data was read + or written. + + * ``NETFS_SREQ_HIT_EOF`` + + The filesystem should set this if a read hit the EOF on the file (in which + case ``transferred`` should stop at the EOF). Netfslib may expand the + subrequest out to the size of the folio containing the EOF on the off + chance that a third party change happened or a DIO read may have asked for + more than is available. The library will clear any excess pagecache. * ``NETFS_SREQ_CLEAR_TAIL`` - This can be set to indicate that the remainder of the slice, from - transferred to len, should be cleared. + The filesystem can set this to indicate that the remainder of the slice, + from transferred to len, should be cleared. Do not set if HIT_EOF is set. + + * ``NETFS_SREQ_NEED_RETRY`` + + The filesystem can set this to tell netfslib to retry the subrequest. + + * ``NETFS_SREQ_BOUNDARY`` + + This can be set by the filesystem on a subrequest to indicate that it ends + at a boundary with the filesystem structure (e.g. at the end of a Ceph + object). It tells netfslib not to retile subrequests across it. * ``NETFS_SREQ_SEEK_DATA_READ`` - This is a hint to the cache that it might want to try skipping ahead to - the next data (ie. using SEEK_DATA). + This is a hint from netfslib to the cache that it might want to try + skipping ahead to the next data (ie. using SEEK_DATA). + + * ``error`` + + This is for the filesystem to store result of the subrequest. It should be + set to 0 if successful and a negative error code otherwise. * ``debug_index`` + * ``stream_nr`` A number allocated to this slice that can be displayed in trace lines for - reference. + reference and the number of the request stream that it belongs to. +If necessary, the filesystem can get and put extra refs on the subrequest it is +given:: -Read Helper Operations ----------------------- + void netfs_get_subrequest(struct netfs_io_subrequest *subreq, + enum netfs_sreq_ref_trace what); + void netfs_put_subrequest(struct netfs_io_subrequest *subreq, + enum netfs_sreq_ref_trace what); -The network filesystem must provide the read helpers with a table of operations -through which it can issue requests and negotiate:: +using netfs trace codes to indicate the reason. Care must be taken, however, +as once control of the subrequest is returned to netfslib, the same subrequest +can be reissued/retried. + +Filesystem Methods +------------------ + +The filesystem sets a table of operations in ``netfs_inode`` for netfslib to +use:: struct netfs_request_ops { - void (*init_request)(struct netfs_io_request *rreq, struct file *file); + mempool_t *request_pool; + mempool_t *subrequest_pool; + int (*init_request)(struct netfs_io_request *rreq, struct file *file); void (*free_request)(struct netfs_io_request *rreq); + void (*free_subrequest)(struct netfs_io_subrequest *rreq); void (*expand_readahead)(struct netfs_io_request *rreq); - bool (*clamp_length)(struct netfs_io_subrequest *subreq); + int (*prepare_read)(struct netfs_io_subrequest *subreq); void (*issue_read)(struct netfs_io_subrequest *subreq); - bool (*is_still_valid)(struct netfs_io_request *rreq); - int (*check_write_begin)(struct file *file, loff_t pos, unsigned len, - struct folio **foliop, void **_fsdata); void (*done)(struct netfs_io_request *rreq); + void (*update_i_size)(struct inode *inode, loff_t i_size); + void (*post_modify)(struct inode *inode); + void (*begin_writeback)(struct netfs_io_request *wreq); + void (*prepare_write)(struct netfs_io_subrequest *subreq); + void (*issue_write)(struct netfs_io_subrequest *subreq); + void (*retry_request)(struct netfs_io_request *wreq, + struct netfs_io_stream *stream); + void (*invalidate_cache)(struct netfs_io_request *wreq); }; -The operations are as follows: - - * ``init_request()`` +The table starts with a pair of optional pointers to memory pools from which +requests and subrequests can be allocated. If these are not given, netfslib +has default pools that it will use instead. If the filesystem wraps the netfs +structs in its own larger structs, then it will need to use its own pools. +Netfslib will allocate directly from the pools. - [Optional] This is called to initialise the request structure. It is given - the file for reference. +The methods defined in the table are: + * ``init_request()`` * ``free_request()`` + * ``free_subrequest()`` - [Optional] This is called as the request is being deallocated so that the - filesystem can clean up any state it has attached there. + [Optional] A filesystem may implement these to initialise or clean up any + resources that it attaches to the request or subrequest. * ``expand_readahead()`` [Optional] This is called to allow the filesystem to expand the size of a - readahead read request. The filesystem gets to expand the request in both - directions, though it's not permitted to reduce it as the numbers may - represent an allocation already made. If local caching is enabled, it gets - to expand the request first. + readahead request. The filesystem gets to expand the request in both + directions, though it must retain the initial region as that may represent + an allocation already made. If local caching is enabled, it gets to expand + the request first. Expansion is communicated by changing ->start and ->len in the request structure. Note that if any change is made, ->len must be increased by at least as much as ->start is reduced. - * ``clamp_length()`` - - [Optional] This is called to allow the filesystem to reduce the size of a - subrequest. The filesystem can use this, for example, to chop up a request - that has to be split across multiple servers or to put multiple reads in - flight. - - This should return 0 on success and an error code on error. - - * ``issue_read()`` + * ``prepare_read()`` - [Required] The helpers use this to dispatch a subrequest to the server for - reading. In the subrequest, ->start, ->len and ->transferred indicate what - data should be read from the server. + [Optional] This is called to allow the filesystem to limit the size of a + subrequest. It may also limit the number of individual regions in iterator, + such as required by RDMA. This information should be set on stream zero in:: - There is no return value; the netfs_subreq_terminated() function should be - called to indicate whether or not the operation succeeded and how much data - it transferred. The filesystem also should not deal with setting folios - uptodate, unlocking them or dropping their refs - the helpers need to deal - with this as they have to coordinate with copying to the local cache. + rreq->io_streams[0].sreq_max_len + rreq->io_streams[0].sreq_max_segs - Note that the helpers have the folios locked, but not pinned. It is - possible to use the ITER_XARRAY iov iterator to refer to the range of the - inode that is being operated upon without the need to allocate large bvec - tables. + The filesystem can use this, for example, to chop up a request that has to + be split across multiple servers or to put multiple reads in flight. - * ``is_still_valid()`` + Zero should be returned on success and an error code otherwise. - [Optional] This is called to find out if the data just read from the local - cache is still valid. It should return true if it is still valid and false - if not. If it's not still valid, it will be reread from the server. + * ``issue_read()`` - * ``check_write_begin()`` + [Required] Netfslib calls this to dispatch a subrequest to the server for + reading. In the subrequest, ->start, ->len and ->transferred indicate what + data should be read from the server and ->io_iter indicates the buffer to be + used. - [Optional] This is called from the netfs_write_begin() helper once it has - allocated/grabbed the folio to be modified to allow the filesystem to flush - conflicting state before allowing it to be modified. + There is no return value; the ``netfs_read_subreq_terminated()`` function + should be called to indicate that the subrequest completed either way. + ->error, ->transferred and ->flags should be updated before completing. The + termination can be done asynchronously. - It may unlock and discard the folio it was given and set the caller's folio - pointer to NULL. It should return 0 if everything is now fine (``*foliop`` - left set) or the op should be retried (``*foliop`` cleared) and any other - error code to abort the operation. + Note: the filesystem must not deal with setting folios uptodate, unlocking + them or dropping their refs - the library deals with this as it may have to + stitch together the results of multiple subrequests that variously overlap + the set of folios. - * ``done`` + * ``done()`` - [Optional] This is called after the folios in the request have all been + [Optional] This is called after the folios in a read request have all been unlocked (and marked uptodate if applicable). + * ``update_i_size()`` + + [Optional] This is invoked by netfslib at various points during the write + paths to ask the filesystem to update its idea of the file size. If not + given, netfslib will set i_size and i_blocks and update the local cache + cookie. + + * ``post_modify()`` + + [Optional] This is called after netfslib writes to the pagecache or when it + allows an mmap'd page to be marked as writable. + + * ``begin_writeback()`` + + [Optional] Netfslib calls this when processing a writeback request if it + finds a dirty page that isn't simply marked NETFS_FOLIO_COPY_TO_CACHE, + indicating it must be written to the server. This allows the filesystem to + only set up writeback resources when it knows it's going to have to perform + a write. + + * ``prepare_write()`` + [Optional] This is called to allow the filesystem to limit the size of a + subrequest. It may also limit the number of individual regions in iterator, + such as required by RDMA. This information should be set on stream to which + the subrequest belongs:: -Read Helper Procedure ---------------------- - -The read helpers work by the following general procedure: - - * Set up the request. - - * For readahead, allow the local cache and then the network filesystem to - propose expansions to the read request. This is then proposed to the VM. - If the VM cannot fully perform the expansion, a partially expanded read will - be performed, though this may not get written to the cache in its entirety. - - * Loop around slicing chunks off of the request to form subrequests: - - * If a local cache is present, it gets to do the slicing, otherwise the - helpers just try to generate maximal slices. - - * The network filesystem gets to clamp the size of each slice if it is to be - the source. This allows rsize and chunking to be implemented. + rreq->io_streams[subreq->stream_nr].sreq_max_len + rreq->io_streams[subreq->stream_nr].sreq_max_segs - * The helpers issue a read from the cache or a read from the server or just - clears the slice as appropriate. + The filesystem can use this, for example, to chop up a request that has to + be split across multiple servers or to put multiple writes in flight. - * The next slice begins at the end of the last one. + This is not permitted to return an error. Instead, in the event of failure, + ``netfs_prepare_write_failed()`` must be called. - * As slices finish being read, they terminate. + * ``issue_write()`` - * When all the subrequests have terminated, the subrequests are assessed and - any that are short or have failed are reissued: + [Required] This is used to dispatch a subrequest to the server for writing. + In the subrequest, ->start, ->len and ->transferred indicate what data + should be written to the server and ->io_iter indicates the buffer to be + used. - * Failed cache requests are issued against the server instead. + There is no return value; the ``netfs_write_subreq_terminated()`` function + should be called to indicate that the subrequest completed either way. + ->error, ->transferred and ->flags should be updated before completing. The + termination can be done asynchronously. - * Failed server requests just fail. + Note: the filesystem must not deal with removing the dirty or writeback + marks on folios involved in the operation and should not take refs or pins + on them, but should leave retention to netfslib. - * Short reads against either source will be reissued against that source - provided they have transferred some more data: + * ``retry_request()`` - * The cache may need to skip holes that it can't do DIO from. + [Optional] Netfslib calls this at the beginning of a retry cycle. This + allows the filesystem to examine the state of the request, the subrequests + in the indicated stream and of its own data and make adjustments or + renegotiate resources. + + * ``invalidate_cache()`` - * If NETFS_SREQ_CLEAR_TAIL was set, a short read will be cleared to the - end of the slice instead of reissuing. + [Optional] This is called by netfslib to invalidate data stored in the local + cache in the event that writing to the local cache fails, providing updated + coherency data that netfs can't provide. - * Once the data is read, the folios that have been fully read/cleared: +Terminating a subrequest +------------------------ - * Will be marked uptodate. +When a subrequest completes, there are a number of functions that the cache or +subrequest can call to inform netfslib of the status change. One function is +provided to terminate a write subrequest at the preparation stage and acts +synchronously: - * If a cache is present, will be marked with PG_fscache. + * ``void netfs_prepare_write_failed(struct netfs_io_subrequest *subreq);`` - * Unlocked + Indicate that the ->prepare_write() call failed. The ``error`` field should + have been updated. - * Any folios that need writing to the cache will then have DIO writes issued. +Note that ->prepare_read() can return an error as a read can simply be aborted. +Dealing with writeback failure is trickier. - * Synchronous operations will wait for reading to be complete. +The other functions are used for subrequests that got as far as being issued: - * Writes to the cache will proceed asynchronously and the folios will have the - PG_fscache mark removed when that completes. + * ``void netfs_read_subreq_terminated(struct netfs_io_subrequest *subreq);`` - * The request structures will be cleaned up when everything has completed. + Tell netfslib that a read subrequest has terminated. The ``error``, + ``flags`` and ``transferred`` fields should have been updated. + * ``void netfs_write_subrequest_terminated(void *_op, ssize_t transferred_or_error);`` -Read Helper Cache API ---------------------- + Tell netfslib that a write subrequest has terminated. Either the amount of + data processed or the negative error code can be passed in. This is + can be used as a kiocb completion function. -When implementing a local cache to be used by the read helpers, two things are -required: some way for the network filesystem to initialise the caching for a -read request and a table of operations for the helpers to call. + * ``void netfs_read_subreq_progress(struct netfs_io_subrequest *subreq);`` -To begin a cache operation on an fscache object, the following function is -called:: + This is provided to optionally update netfslib on the incremental progress + of a read, allowing some folios to be unlocked early and does not actually + terminate the subrequest. The ``transferred`` field should have been + updated. - int fscache_begin_read_operation(struct netfs_io_request *rreq, - struct fscache_cookie *cookie); +Local Cache API +--------------- -passing in the request pointer and the cookie corresponding to the file. This -fills in the cache resources mentioned below. +Netfslib provides a separate API for a local cache to implement, though it +provides some somewhat similar routines to the filesystem request API. -The netfs_io_request object contains a place for the cache to hang its +Firstly, the netfs_io_request object contains a place for the cache to hang its state:: struct netfs_cache_resources { const struct netfs_cache_ops *ops; void *cache_priv; void *cache_priv2; + unsigned int debug_id; + unsigned int inval_counter; }; -This contains an operations table pointer and two private pointers. The -operation table looks like the following:: +This contains an operations table pointer and two private pointers plus the +debug ID of the fscache cookie for tracing purposes and an invalidation counter +that is cranked by calls to ``fscache_invalidate()`` allowing cache subrequests +to be invalidated after completion. + +The cache operation table looks like the following:: struct netfs_cache_ops { void (*end_operation)(struct netfs_cache_resources *cres); - void (*expand_readahead)(struct netfs_cache_resources *cres, loff_t *_start, size_t *_len, loff_t i_size); - enum netfs_io_source (*prepare_read)(struct netfs_io_subrequest *subreq, - loff_t i_size); - + loff_t i_size); int (*read)(struct netfs_cache_resources *cres, loff_t start_pos, struct iov_iter *iter, bool seek_data, netfs_io_terminated_t term_func, void *term_func_priv); - - int (*prepare_write)(struct netfs_cache_resources *cres, - loff_t *_start, size_t *_len, loff_t i_size, - bool no_space_allocated_yet); - - int (*write)(struct netfs_cache_resources *cres, - loff_t start_pos, - struct iov_iter *iter, - netfs_io_terminated_t term_func, - void *term_func_priv); - - int (*query_occupancy)(struct netfs_cache_resources *cres, - loff_t start, size_t len, size_t granularity, - loff_t *_data_start, size_t *_data_len); + void (*prepare_write_subreq)(struct netfs_io_subrequest *subreq); + void (*issue_write)(struct netfs_io_subrequest *subreq); }; With a termination handler function pointer:: @@ -511,10 +984,16 @@ The methods defined in the table are: * ``expand_readahead()`` - [Optional] Called at the beginning of a netfs_readahead() operation to allow - the cache to expand a request in either direction. This allows the cache to + [Optional] Called at the beginning of a readahead operation to allow the + cache to expand a request in either direction. This allows the cache to size the request appropriately for the cache granularity. + * ``prepare_read()`` + + [Required] Called to configure the next slice of a request. ->start and + ->len in the subrequest indicate where and how big the next slice can be; + the cache gets to reduce the length to match its granularity requirements. + The function is passed pointers to the start and length in its parameters, plus the size of the file for reference, and adjusts the start and length appropriately. It should return one of: @@ -528,12 +1007,6 @@ The methods defined in the table are: downloaded from the server or read from the cache - or whether slicing should be given up at the current point. - * ``prepare_read()`` - - [Required] Called to configure the next slice of a request. ->start and - ->len in the subrequest indicate where and how big the next slice can be; - the cache gets to reduce the length to match its granularity requirements. - * ``read()`` [Required] Called to read from the cache. The start file offset is given @@ -547,44 +1020,33 @@ The methods defined in the table are: indicating whether the termination is definitely happening in the caller's context. - * ``prepare_write()`` + * ``prepare_write_subreq()`` - [Required] Called to prepare a write to the cache to take place. This - involves checking to see whether the cache has sufficient space to honour - the write. ``*_start`` and ``*_len`` indicate the region to be written; the - region can be shrunk or it can be expanded to a page boundary either way as - necessary to align for direct I/O. i_size holds the size of the object and - is provided for reference. no_space_allocated_yet is set to true if the - caller is certain that no data has been written to that region - for example - if it tried to do a read from there already. + [Required] This is called to allow the cache to limit the size of a + subrequest. It may also limit the number of individual regions in iterator, + such as required by DIO/DMA. This information should be set on stream to + which the subrequest belongs:: - * ``write()`` + rreq->io_streams[subreq->stream_nr].sreq_max_len + rreq->io_streams[subreq->stream_nr].sreq_max_segs - [Required] Called to write to the cache. The start file offset is given - along with an iterator to write from, which gives the length also. - - Also provided is a pointer to a termination handler function and private - data to pass to that function. The termination function should be called - with the number of bytes transferred or an error code, plus a flag - indicating whether the termination is definitely happening in the caller's - context. + The filesystem can use this, for example, to chop up a request that has to + be split across multiple servers or to put multiple writes in flight. - * ``query_occupancy()`` + This is not permitted to return an error. In the event of failure, + ``netfs_prepare_write_failed()`` must be called. - [Required] Called to find out where the next piece of data is within a - particular region of the cache. The start and length of the region to be - queried are passed in, along with the granularity to which the answer needs - to be aligned. The function passes back the start and length of the data, - if any, available within that region. Note that there may be a hole at the - front. + * ``issue_write()`` - It returns 0 if some data was found, -ENODATA if there was no usable data - within the region or -ENOBUFS if there is no caching on this file. + [Required] This is used to dispatch a subrequest to the cache for writing. + In the subrequest, ->start, ->len and ->transferred indicate what data + should be written to the cache and ->io_iter indicates the buffer to be + used. -Note that these methods are passed a pointer to the cache resource structure, -not the read request structure as they could be used in other situations where -there isn't a read request structure as well, such as writing dirty data to the -cache. + There is no return value; the ``netfs_write_subreq_terminated()`` function + should be called to indicate that the subrequest completed either way. + ->error, ->transferred and ->flags should be updated before completing. The + termination can be done asynchronously. API Function Reference -- cgit v1.2.3 From 2e8bbfc11201b857410955d0f983be9660d87397 Mon Sep 17 00:00:00 2001 From: Wesley Cheng Date: Wed, 9 Apr 2025 10:48:14 -0700 Subject: dt-bindings: usb: qcom,dwc3: Add SM8750 compatible SM8750 uses the Synopsys DWC3 controller. Add this to the compatibles list to utilize the DWC3 QCOM and DWC3 core framework. Other than a revision bump to DWC3 controller rev2.00a, the controller on SM8750 does not add any additional vendor specific features compared to previous chipsets. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Wesley Cheng Signed-off-by: Melody Olvera Link: https://lore.kernel.org/r/20250409-sm8750_usb_master-v4-3-6ec621c98be6@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 64137c1619a6..a681208616f3 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -55,6 +55,7 @@ properties: - qcom,sm8450-dwc3 - qcom,sm8550-dwc3 - qcom,sm8650-dwc3 + - qcom,sm8750-dwc3 - qcom,x1e80100-dwc3 - qcom,x1e80100-dwc3-mp - const: qcom,dwc3 @@ -354,6 +355,7 @@ allOf: - qcom,sm8450-dwc3 - qcom,sm8550-dwc3 - qcom,sm8650-dwc3 + - qcom,sm8750-dwc3 then: properties: clocks: @@ -497,6 +499,7 @@ allOf: - qcom,sm8450-dwc3 - qcom,sm8550-dwc3 - qcom,sm8650-dwc3 + - qcom,sm8750-dwc3 then: properties: interrupts: -- cgit v1.2.3 From 6e07dd1354f4173f52a5a29e47ba6d0f32e70c6e Mon Sep 17 00:00:00 2001 From: Matthias Schiffer Date: Tue, 25 Mar 2025 14:18:48 +0100 Subject: dt-bindings: usb: dwc3: Allow connector in USB controller node Allow specifying the connector directly in the USB controller node, as allow in other USB controller bindings and commonly used for "gpio-usb-b-connector". Linux already supports this without driver changes. Signed-off-by: Matthias Schiffer Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250325131848.127438-1-matthias.schiffer@ew.tq-group.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml index 71249b6ba616..6c0b8b653824 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml @@ -390,6 +390,12 @@ properties: maximum: 8 default: 1 + connector: + $ref: /schemas/connector/usb-connector.yaml# + description: Connector for dual role switch + type: object + unevaluatedProperties: false + port: $ref: /schemas/graph.yaml#/properties/port description: -- cgit v1.2.3 From 1b4dab853768eef92fcffd57e18490e2d9641aaa Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 24 Mar 2025 13:51:42 +0100 Subject: dt-bindings: usb: smsc,usb3503: Correct indentation and style in DTS example DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250324125142.81910-1-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/smsc,usb3503.yaml | 90 +++++++++++----------- 1 file changed, 45 insertions(+), 45 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/smsc,usb3503.yaml b/Documentation/devicetree/bindings/usb/smsc,usb3503.yaml index 6156dc26e65c..18e35122dc1f 100644 --- a/Documentation/devicetree/bindings/usb/smsc,usb3503.yaml +++ b/Documentation/devicetree/bindings/usb/smsc,usb3503.yaml @@ -106,54 +106,54 @@ additionalProperties: false examples: - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - - usb-hub@8 { - compatible = "smsc,usb3503"; - reg = <0x08>; - connect-gpios = <&gpx3 0 1>; - disabled-ports = <2 3>; - intn-gpios = <&gpx3 4 1>; - reset-gpios = <&gpx3 5 1>; - initial-mode = <1>; - clocks = <&clks 80>; - clock-names = "refclk"; - }; - }; + i2c { + #address-cells = <1>; + #size-cells = <0>; + + usb-hub@8 { + compatible = "smsc,usb3503"; + reg = <0x08>; + connect-gpios = <&gpx3 0 1>; + disabled-ports = <2 3>; + intn-gpios = <&gpx3 4 1>; + reset-gpios = <&gpx3 5 1>; + initial-mode = <1>; + clocks = <&clks 80>; + clock-names = "refclk"; + }; + }; - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - - usb-hub@8 { - compatible = "smsc,usb3803"; - reg = <0x08>; - connect-gpios = <&gpx3 0 1>; - disabled-ports = <2 3>; - intn-gpios = <&gpx3 4 1>; - reset-gpios = <&gpx3 5 1>; - bypass-gpios = <&gpx3 6 1>; - initial-mode = <3>; - clocks = <&clks 80>; - clock-names = "refclk"; - }; - }; + i2c { + #address-cells = <1>; + #size-cells = <0>; + + usb-hub@8 { + compatible = "smsc,usb3803"; + reg = <0x08>; + connect-gpios = <&gpx3 0 1>; + disabled-ports = <2 3>; + intn-gpios = <&gpx3 4 1>; + reset-gpios = <&gpx3 5 1>; + bypass-gpios = <&gpx3 6 1>; + initial-mode = <3>; + clocks = <&clks 80>; + clock-names = "refclk"; + }; + }; - | - #include - - usb-hub { - /* I2C is not connected */ - compatible = "smsc,usb3503"; - initial-mode = <1>; /* initialize in HUB mode */ - disabled-ports = <1>; - intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ - reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ - connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */ - refclk-frequency = <19200000>; - }; + #include + + usb-hub { + /* I2C is not connected */ + compatible = "smsc,usb3503"; + initial-mode = <1>; /* initialize in HUB mode */ + disabled-ports = <1>; + intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ + connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */ + refclk-frequency = <19200000>; + }; ... -- cgit v1.2.3 From 54f30ae4a367cb9c9a07df133de9ccac744688c8 Mon Sep 17 00:00:00 2001 From: Xu Yang Date: Tue, 18 Mar 2025 23:09:05 +0800 Subject: dt-bindings: usb: chipidea: Add i.MX95 compatible string 'fsl,imx95-usb' The i.MX95 USB2.0 controller is mostly compatible with i.MX7D, except it requires a second interrupt for wakeup handling. Add the compatible string for the i.MX95 platform, add the iommus property, and enforce the interrupt property restriction. Keep the same restriction for existing compatible strings. Reviewed-by: Rob Herring (Arm) Reviewed-by: Frank Li Signed-off-by: Xu Yang Link: https://lore.kernel.org/r/20250318150908.1583652-1-xu.yang_2@nxp.com Signed-off-by: Greg Kroah-Hartman --- .../bindings/usb/chipidea,usb2-common.yaml | 3 +++ .../devicetree/bindings/usb/chipidea,usb2-imx.yaml | 24 +++++++++++++++++++++- 2 files changed, 26 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml b/Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml index d2a7d2ecf48a..10020af15afc 100644 --- a/Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml +++ b/Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml @@ -42,6 +42,9 @@ properties: phy_type: true + iommus: + maxItems: 1 + itc-setting: description: interrupt threshold control register control, the setting should be diff --git a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml index 8f6136f5d72e..51014955ab3c 100644 --- a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml +++ b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml @@ -41,6 +41,7 @@ properties: - fsl,imx8mm-usb - fsl,imx8mn-usb - fsl,imx93-usb + - fsl,imx95-usb - const: fsl,imx7d-usb - const: fsl,imx27-usb - items: @@ -54,7 +55,11 @@ properties: maxItems: 1 interrupts: - maxItems: 1 + minItems: 1 + items: + - description: USB controller interrupt or combine USB controller + and wakeup interrupts. + - description: Wakeup interrupt clocks: minItems: 1 @@ -191,6 +196,7 @@ allOf: contains: enum: - fsl,imx93-usb + - fsl,imx95-usb then: properties: clocks: @@ -238,6 +244,22 @@ allOf: maxItems: 1 clock-names: false + # imx95 soc use two interrupts + - if: + properties: + compatible: + contains: + enum: + - fsl,imx95-usb + then: + properties: + interrupts: + minItems: 2 + else: + properties: + interrupts: + maxItems: 1 + unevaluatedProperties: false examples: -- cgit v1.2.3 From bd3c096ce5e404ae26bf09d2383709fccb2062ba Mon Sep 17 00:00:00 2001 From: Xu Yang Date: Tue, 18 Mar 2025 23:09:06 +0800 Subject: dt-bindings: usb: usbmisc-imx: add support for i.MX95 platform Add compatible string "fsl,imx95-usbmisc" for i.MX95 platform and restriction on reg property. Reviewed-by: Rob Herring (Arm) Reviewed-by: Frank Li Signed-off-by: Xu Yang Link: https://lore.kernel.org/r/20250318150908.1583652-2-xu.yang_2@nxp.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/fsl,usbmisc.yaml | 23 +++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml b/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml index 0a6e7ac1b37e..019435540df0 100644 --- a/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml +++ b/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml @@ -34,6 +34,7 @@ properties: - fsl,imx8mm-usbmisc - fsl,imx8mn-usbmisc - fsl,imx8ulp-usbmisc + - fsl,imx95-usbmisc - const: fsl,imx7d-usbmisc - const: fsl,imx6q-usbmisc - items: @@ -45,7 +46,10 @@ properties: maxItems: 1 reg: - maxItems: 1 + minItems: 1 + items: + - description: Base and length of the Wrapper module register + - description: Base and length of the HSIO Block Control register '#index-cells': const: 1 @@ -56,6 +60,23 @@ required: - compatible - reg +allOf: + # imx95 soc needs use HSIO Block Control + - if: + properties: + compatible: + contains: + enum: + - fsl,imx95-usbmisc + then: + properties: + reg: + minItems: 2 + else: + properties: + reg: + maxItems: 1 + additionalProperties: false examples: -- cgit v1.2.3 From 0ed22827548583ad1b905c71d1d1cf96309d63bc Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 10 Apr 2025 10:00:56 +0200 Subject: dt-bindings: serial: snps-dw-apb-uart: Simplify DMA-less RZ/N1 rule There is no need to repeat all SoC-specific compatible values in the rule for DMA-less RZ/N1 variants. Use wildcard "{}" instead, to ease maintenance. Signed-off-by: Geert Uytterhoeven Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/90c7aa143beb6a28255b24e8ef8c96180d869cbb.1744271974.git.geert+renesas@glider.be Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml index 1aa3480d8d81..1ffe3834b0a8 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml @@ -17,9 +17,7 @@ allOf: properties: compatible: items: - - enum: - - renesas,r9a06g032-uart - - renesas,r9a06g033-uart + - {} - const: renesas,rzn1-uart - const: snps,dw-apb-uart then: -- cgit v1.2.3 From 2c0594f9f0629a8b4d46e7e1bd069a0bafc2e350 Mon Sep 17 00:00:00 2001 From: Alex Elder Date: Wed, 9 Apr 2025 14:22:11 -0500 Subject: dt-bindings: serial: 8250: support an optional second clock The SpacemiT UART driver requires a bus clock to be enabled in addition to the primary function clock. Add the option to specify two clocks for an 8250-compatible UART, named "core" and "bus". If both are needed, require them to be named. Signed-off-by: Alex Elder Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250409192213.1130181-2-elder@riscstar.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/serial/8250.yaml | 30 +++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/serial/8250.yaml b/Documentation/devicetree/bindings/serial/8250.yaml index dc0d52920575..33d2016b6509 100644 --- a/Documentation/devicetree/bindings/serial/8250.yaml +++ b/Documentation/devicetree/bindings/serial/8250.yaml @@ -135,7 +135,16 @@ properties: clock-frequency: true clocks: - maxItems: 1 + minItems: 1 + items: + - description: The core function clock + - description: An optional bus clock + + clock-names: + minItems: 1 + items: + - const: core + - const: bus resets: maxItems: 1 @@ -224,6 +233,25 @@ required: - reg - interrupts +if: + properties: + compatible: + contains: + const: spacemit,k1-uart +then: + required: [clock-names] + properties: + clocks: + minItems: 2 + clock-names: + minItems: 2 +else: + properties: + clocks: + maxItems: 1 + clock-names: + maxItems: 1 + unevaluatedProperties: false examples: -- cgit v1.2.3 From 25422e8f46c1fd147886f0dc8851eb66c9ba2d48 Mon Sep 17 00:00:00 2001 From: Thierry Bultel Date: Thu, 3 Apr 2025 23:29:05 +0200 Subject: dt-bindings: serial: Add compatible for Renesas RZ/T2H SoC in sci RSCI of RZ/T2H SoC (a.k.a r9a09g077), as a lot of similarities with SCI in other Renesas SoC like G2L, G3S, V2L; However, it has a different set of registers, and in addition to serial, this IP also supports SCIe (encoder), SmartCard, i2c and spi. This is why the 'renesas,sci' fallback for generic SCI does not apply for it. Reviewed-by: Rob Herring (Arm) Signed-off-by: Thierry Bultel Link: https://lore.kernel.org/r/20250403212919.1137670-4-thierry.bultel.yh@bp.renesas.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/serial/renesas,rsci.yaml | 78 ++++++++++++++++++++++ 1 file changed, 78 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/renesas,rsci.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml new file mode 100644 index 000000000000..ea879db5f485 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/renesas,rsci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RSCI Serial Communication Interface + +maintainers: + - Geert Uytterhoeven + - Thierry Bultel + +allOf: + - $ref: serial.yaml# + +properties: + compatible: + const: renesas,r9a09g077-rsci # RZ/T2H + + reg: + maxItems: 1 + + interrupts: + items: + - description: Error interrupt + - description: Receive buffer full interrupt + - description: Transmit buffer empty interrupt + - description: Transmit end interrupt + + interrupt-names: + items: + - const: eri + - const: rxi + - const: txi + - const: tei + + clocks: + maxItems: 1 + + clock-names: + const: fck # UART functional clock + + power-domains: + maxItems: 1 + + uart-has-rtscts: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - power-domains + +unevaluatedProperties: false + +examples: + - | + #include + #include + + aliases { + serial0 = &sci0; + }; + + sci0: serial@80005000 { + compatible = "renesas,r9a09g077-rsci"; + reg = <0x80005000 0x400>; + interrupts = , + , + , + ; + interrupt-names = "eri", "rxi", "txi", "tei"; + clocks = <&cpg CPG_MOD 108>; + clock-names = "fck"; + power-domains = <&cpg>; + }; -- cgit v1.2.3 From a61c16258a4720065972cf04fcfee1caa6ea5fc0 Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Thu, 10 Apr 2025 12:23:06 -0500 Subject: Documentation/amdgpu: Add Ryzen AI 350 series processors These have been announced so add them to the table. Link: https://www.amd.com/en/products/processors/laptop/ryzen/ai-300-series/amd-ryzen-ai-7-350.html Signed-off-by: Mario Limonciello Acked-by: Alex Deucher Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/apu-asic-info-table.csv | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/apu-asic-info-table.csv b/Documentation/gpu/amdgpu/apu-asic-info-table.csv index 5dd4b8762d19..094e76a65dc0 100644 --- a/Documentation/gpu/amdgpu/apu-asic-info-table.csv +++ b/Documentation/gpu/amdgpu/apu-asic-info-table.csv @@ -13,3 +13,4 @@ Ryzen 7x20 series, Mendocino, 3.1.6, 10.3.7, 3.1.1, 5.2.7, 13.0.8 Ryzen 7x40 series, Phoenix, 3.1.4, 11.0.1 / 11.0.4, 4.0.2, 6.0.1, 13.0.4 / 13.0.11 Ryzen 8x40 series, Hawk Point, 3.1.4, 11.0.1 / 11.0.4, 4.0.2, 6.0.1, 13.0.4 / 13.0.11 Ryzen AI 300 series, Strix Point, 3.5.0, 11.5.0, 4.0.5, 6.1.0, 14.0.0 +Ryzen AI 350 series, Krackan Point, 3.5.0, 11.5.2, 4.0.5, 6.1.2, 14.0.4 -- cgit v1.2.3 From 500d4b742e0cc712160054413e129a568467a7de Mon Sep 17 00:00:00 2001 From: Huan Tang Date: Fri, 11 Apr 2025 17:29:24 +0800 Subject: scsi: ufs: core: Add WB buffer resize support Follow JESD220G, support a WB buffer resize function through sysfs. The host can obtain resize hint and resize status, and enable the resize operation. Add three sysfs nodes: 1. wb_resize_enable 2. wb_resize_hint 3. wb_resize_status The detailed definition of the three nodes can be found in the sysfs documentation. Signed-off-by: Huan Tang Signed-off-by: Lu Hongfei Link: https://lore.kernel.org/r/20250411092924.1116-1-tanghuan@vivo.com Reviewed-by: Bart Van Assche Signed-off-by: Martin K. Petersen --- Documentation/ABI/testing/sysfs-driver-ufs | 49 ++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-driver-ufs b/Documentation/ABI/testing/sysfs-driver-ufs index ae0191295d29..e7b49bc894f5 100644 --- a/Documentation/ABI/testing/sysfs-driver-ufs +++ b/Documentation/ABI/testing/sysfs-driver-ufs @@ -1604,3 +1604,52 @@ Description: prevent the UFS from frequently performing clock gating/ungating. The attribute is read/write. + +What: /sys/bus/platform/drivers/ufshcd/*/wb_resize_enable +What: /sys/bus/platform/devices/*.ufs/wb_resize_enable +Date: April 2025 +Contact: Huan Tang +Description: + The host can enable the WriteBooster buffer resize by setting this + attribute. + + ======== ====================================== + idle There is no resize operation + decrease Decrease WriteBooster buffer size + increase Increase WriteBooster buffer size + ======== ====================================== + + The file is write only. + +What: /sys/bus/platform/drivers/ufshcd/*/attributes/wb_resize_hint +What: /sys/bus/platform/devices/*.ufs/attributes/wb_resize_hint +Date: April 2025 +Contact: Huan Tang +Description: + wb_resize_hint indicates hint information about which type of resize + for WriteBooster buffer is recommended by the device. + + ========= ====================================== + keep Recommend keep the buffer size + decrease Recommend to decrease the buffer size + increase Recommend to increase the buffer size + ========= ====================================== + + The file is read only. + +What: /sys/bus/platform/drivers/ufshcd/*/attributes/wb_resize_status +What: /sys/bus/platform/devices/*.ufs/attributes/wb_resize_status +Date: April 2025 +Contact: Huan Tang +Description: + The host can check the resize operation status of the WriteBooster + buffer by reading this attribute. + + ================ ======================================== + idle Resize operation is not issued + in_progress Resize operation in progress + complete_success Resize operation completed successfully + general_failure Resize operation general failure + ================ ======================================== + + The file is read only. -- cgit v1.2.3 From 2a63dd0edf388802074f1d4d6b588a3b4c380688 Mon Sep 17 00:00:00 2001 From: Kuniyuki Iwashima Date: Wed, 9 Apr 2025 19:36:45 -0700 Subject: net: Retire DCCP socket. DCCP was orphaned in 2021 by commit 054c4610bd05 ("MAINTAINERS: dccp: move Gerrit Renker to CREDITS"), which noted that the last maintainer had been inactive for five years. In recent years, it has become a playground for syzbot, and most changes to DCCP have been odd bug fixes triggered by syzbot. Apart from that, the only changes have been driven by treewide or networking API updates or adjustments related to TCP. Thus, in 2023, we announced we would remove DCCP in 2025 via commit b144fcaf46d4 ("dccp: Print deprecation notice."). Since then, only one individual has contacted the netdev mailing list. [0] There is ongoing research for Multipath DCCP. The repository is hosted on GitHub [1], and development is not taking place through the upstream community. While the repository is published under the GPLv2 license, the scheduling part remains proprietary, with a LICENSE file [2] stating: "This is not Open Source software." The researcher mentioned a plan to address the licensing issue, upstream the patches, and step up as a maintainer, but there has been no further communication since then. Maintaining DCCP for a decade without any real users has become a burden. Therefore, it's time to remove it. Removing DCCP will also provide significant benefits to TCP. It allows us to freely reorganize the layout of struct inet_connection_sock, which is currently shared with DCCP, and optimize it to reduce the number of cachelines accessed in the TCP fast path. Note that we keep DCCP netfilter modules as requested. [3] Link: https://lore.kernel.org/netdev/20230710182253.81446-1-kuniyu@amazon.com/T/#u #[0] Link: https://github.com/telekom/mp-dccp #[1] Link: https://github.com/telekom/mp-dccp/blob/mpdccp_v03_k5.10/net/dccp/non_gpl_scheduler/LICENSE #[2] Link: https://lore.kernel.org/netdev/Z_VQ0KlCRkqYWXa-@calendula/ #[3] Signed-off-by: Kuniyuki Iwashima Acked-by: Paul Moore (LSM and SELinux) Acked-by: Casey Schaufler Link: https://patch.msgid.link/20250410023921.11307-3-kuniyu@amazon.com Signed-off-by: Jakub Kicinski --- Documentation/admin-guide/bug-hunting.rst | 2 +- Documentation/networking/dccp.rst | 219 --------------------- Documentation/networking/index.rst | 1 - Documentation/networking/ip-sysctl.rst | 4 +- .../translations/zh_CN/admin-guide/bug-hunting.rst | 2 +- .../translations/zh_TW/admin-guide/bug-hunting.rst | 2 +- 6 files changed, 5 insertions(+), 225 deletions(-) delete mode 100644 Documentation/networking/dccp.rst (limited to 'Documentation') diff --git a/Documentation/admin-guide/bug-hunting.rst b/Documentation/admin-guide/bug-hunting.rst index ce6f4e8ca487..30858757c9f2 100644 --- a/Documentation/admin-guide/bug-hunting.rst +++ b/Documentation/admin-guide/bug-hunting.rst @@ -196,7 +196,7 @@ will see the assembler code for the routine shown, but if your kernel has debug symbols the C code will also be available. (Debug symbols can be enabled in the kernel hacking menu of the menu configuration.) For example:: - $ objdump -r -S -l --disassemble net/dccp/ipv4.o + $ objdump -r -S -l --disassemble net/ipv4/tcp.o .. note:: diff --git a/Documentation/networking/dccp.rst b/Documentation/networking/dccp.rst deleted file mode 100644 index 91e5c33ba3ff..000000000000 --- a/Documentation/networking/dccp.rst +++ /dev/null @@ -1,219 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -============= -DCCP protocol -============= - - -.. Contents - - Introduction - - Missing features - - Socket options - - Sysctl variables - - IOCTLs - - Other tunables - - Notes - - -Introduction -============ -Datagram Congestion Control Protocol (DCCP) is an unreliable, connection -oriented protocol designed to solve issues present in UDP and TCP, particularly -for real-time and multimedia (streaming) traffic. -It divides into a base protocol (RFC 4340) and pluggable congestion control -modules called CCIDs. Like pluggable TCP congestion control, at least one CCID -needs to be enabled in order for the protocol to function properly. In the Linux -implementation, this is the TCP-like CCID2 (RFC 4341). Additional CCIDs, such as -the TCP-friendly CCID3 (RFC 4342), are optional. -For a brief introduction to CCIDs and suggestions for choosing a CCID to match -given applications, see section 10 of RFC 4340. - -It has a base protocol and pluggable congestion control IDs (CCIDs). - -DCCP is a Proposed Standard (RFC 2026), and the homepage for DCCP as a protocol -is at http://www.ietf.org/html.charters/dccp-charter.html - - -Missing features -================ -The Linux DCCP implementation does not currently support all the features that are -specified in RFCs 4340...42. - -The known bugs are at: - - http://www.linuxfoundation.org/collaborate/workgroups/networking/todo#DCCP - -For more up-to-date versions of the DCCP implementation, please consider using -the experimental DCCP test tree; instructions for checking this out are on: -http://www.linuxfoundation.org/collaborate/workgroups/networking/dccp_testing#Experimental_DCCP_source_tree - - -Socket options -============== -DCCP_SOCKOPT_QPOLICY_ID sets the dequeuing policy for outgoing packets. It takes -a policy ID as argument and can only be set before the connection (i.e. changes -during an established connection are not supported). Currently, two policies are -defined: the "simple" policy (DCCPQ_POLICY_SIMPLE), which does nothing special, -and a priority-based variant (DCCPQ_POLICY_PRIO). The latter allows to pass an -u32 priority value as ancillary data to sendmsg(), where higher numbers indicate -a higher packet priority (similar to SO_PRIORITY). This ancillary data needs to -be formatted using a cmsg(3) message header filled in as follows:: - - cmsg->cmsg_level = SOL_DCCP; - cmsg->cmsg_type = DCCP_SCM_PRIORITY; - cmsg->cmsg_len = CMSG_LEN(sizeof(uint32_t)); /* or CMSG_LEN(4) */ - -DCCP_SOCKOPT_QPOLICY_TXQLEN sets the maximum length of the output queue. A zero -value is always interpreted as unbounded queue length. If different from zero, -the interpretation of this parameter depends on the current dequeuing policy -(see above): the "simple" policy will enforce a fixed queue size by returning -EAGAIN, whereas the "prio" policy enforces a fixed queue length by dropping the -lowest-priority packet first. The default value for this parameter is -initialised from /proc/sys/net/dccp/default/tx_qlen. - -DCCP_SOCKOPT_SERVICE sets the service. The specification mandates use of -service codes (RFC 4340, sec. 8.1.2); if this socket option is not set, -the socket will fall back to 0 (which means that no meaningful service code -is present). On active sockets this is set before connect(); specifying more -than one code has no effect (all subsequent service codes are ignored). The -case is different for passive sockets, where multiple service codes (up to 32) -can be set before calling bind(). - -DCCP_SOCKOPT_GET_CUR_MPS is read-only and retrieves the current maximum packet -size (application payload size) in bytes, see RFC 4340, section 14. - -DCCP_SOCKOPT_AVAILABLE_CCIDS is also read-only and returns the list of CCIDs -supported by the endpoint. The option value is an array of type uint8_t whose -size is passed as option length. The minimum array size is 4 elements, the -value returned in the optlen argument always reflects the true number of -built-in CCIDs. - -DCCP_SOCKOPT_CCID is write-only and sets both the TX and RX CCIDs at the same -time, combining the operation of the next two socket options. This option is -preferable over the latter two, since often applications will use the same -type of CCID for both directions; and mixed use of CCIDs is not currently well -understood. This socket option takes as argument at least one uint8_t value, or -an array of uint8_t values, which must match available CCIDS (see above). CCIDs -must be registered on the socket before calling connect() or listen(). - -DCCP_SOCKOPT_TX_CCID is read/write. It returns the current CCID (if set) or sets -the preference list for the TX CCID, using the same format as DCCP_SOCKOPT_CCID. -Please note that the getsockopt argument type here is ``int``, not uint8_t. - -DCCP_SOCKOPT_RX_CCID is analogous to DCCP_SOCKOPT_TX_CCID, but for the RX CCID. - -DCCP_SOCKOPT_SERVER_TIMEWAIT enables the server (listening socket) to hold -timewait state when closing the connection (RFC 4340, 8.3). The usual case is -that the closing server sends a CloseReq, whereupon the client holds timewait -state. When this boolean socket option is on, the server sends a Close instead -and will enter TIMEWAIT. This option must be set after accept() returns. - -DCCP_SOCKOPT_SEND_CSCOV and DCCP_SOCKOPT_RECV_CSCOV are used for setting the -partial checksum coverage (RFC 4340, sec. 9.2). The default is that checksums -always cover the entire packet and that only fully covered application data is -accepted by the receiver. Hence, when using this feature on the sender, it must -be enabled at the receiver, too with suitable choice of CsCov. - -DCCP_SOCKOPT_SEND_CSCOV sets the sender checksum coverage. Values in the - range 0..15 are acceptable. The default setting is 0 (full coverage), - values between 1..15 indicate partial coverage. - -DCCP_SOCKOPT_RECV_CSCOV is for the receiver and has a different meaning: it - sets a threshold, where again values 0..15 are acceptable. The default - of 0 means that all packets with a partial coverage will be discarded. - Values in the range 1..15 indicate that packets with minimally such a - coverage value are also acceptable. The higher the number, the more - restrictive this setting (see [RFC 4340, sec. 9.2.1]). Partial coverage - settings are inherited to the child socket after accept(). - -The following two options apply to CCID 3 exclusively and are getsockopt()-only. -In either case, a TFRC info struct (defined in ) is returned. - -DCCP_SOCKOPT_CCID_RX_INFO - Returns a ``struct tfrc_rx_info`` in optval; the buffer for optval and - optlen must be set to at least sizeof(struct tfrc_rx_info). - -DCCP_SOCKOPT_CCID_TX_INFO - Returns a ``struct tfrc_tx_info`` in optval; the buffer for optval and - optlen must be set to at least sizeof(struct tfrc_tx_info). - -On unidirectional connections it is useful to close the unused half-connection -via shutdown (SHUT_WR or SHUT_RD): this will reduce per-packet processing costs. - - -Sysctl variables -================ -Several DCCP default parameters can be managed by the following sysctls -(sysctl net.dccp.default or /proc/sys/net/dccp/default): - -request_retries - The number of active connection initiation retries (the number of - Requests minus one) before timing out. In addition, it also governs - the behaviour of the other, passive side: this variable also sets - the number of times DCCP repeats sending a Response when the initial - handshake does not progress from RESPOND to OPEN (i.e. when no Ack - is received after the initial Request). This value should be greater - than 0, suggested is less than 10. Analogue of tcp_syn_retries. - -retries1 - How often a DCCP Response is retransmitted until the listening DCCP - side considers its connecting peer dead. Analogue of tcp_retries1. - -retries2 - The number of times a general DCCP packet is retransmitted. This has - importance for retransmitted acknowledgments and feature negotiation, - data packets are never retransmitted. Analogue of tcp_retries2. - -tx_ccid = 2 - Default CCID for the sender-receiver half-connection. Depending on the - choice of CCID, the Send Ack Vector feature is enabled automatically. - -rx_ccid = 2 - Default CCID for the receiver-sender half-connection; see tx_ccid. - -seq_window = 100 - The initial sequence window (sec. 7.5.2) of the sender. This influences - the local ackno validity and the remote seqno validity windows (7.5.1). - Values in the range Wmin = 32 (RFC 4340, 7.5.2) up to 2^32-1 can be set. - -tx_qlen = 5 - The size of the transmit buffer in packets. A value of 0 corresponds - to an unbounded transmit buffer. - -sync_ratelimit = 125 ms - The timeout between subsequent DCCP-Sync packets sent in response to - sequence-invalid packets on the same socket (RFC 4340, 7.5.4). The unit - of this parameter is milliseconds; a value of 0 disables rate-limiting. - - -IOCTLS -====== -FIONREAD - Works as in udp(7): returns in the ``int`` argument pointer the size of - the next pending datagram in bytes, or 0 when no datagram is pending. - -SIOCOUTQ - Returns the number of unsent data bytes in the socket send queue as ``int`` - into the buffer specified by the argument pointer. - -Other tunables -============== -Per-route rto_min support - CCID-2 supports the RTAX_RTO_MIN per-route setting for the minimum value - of the RTO timer. This setting can be modified via the 'rto_min' option - of iproute2; for example:: - - > ip route change 10.0.0.0/24 rto_min 250j dev wlan0 - > ip route add 10.0.0.254/32 rto_min 800j dev wlan0 - > ip route show dev wlan0 - - CCID-3 also supports the rto_min setting: it is used to define the lower - bound for the expiry of the nofeedback timer. This can be useful on LANs - with very low RTTs (e.g., loopback, Gbit ethernet). - - -Notes -===== -DCCP does not travel through NAT successfully at present on many boxes. This is -because the checksum covers the pseudo-header as per TCP and UDP. Linux NAT -support for DCCP has been added. diff --git a/Documentation/networking/index.rst b/Documentation/networking/index.rst index c64133d309bf..ac90b82f3ce9 100644 --- a/Documentation/networking/index.rst +++ b/Documentation/networking/index.rst @@ -48,7 +48,6 @@ Contents: ax25 bonding cdc_mbim - dccp dctcp devmem dns_resolver diff --git a/Documentation/networking/ip-sysctl.rst b/Documentation/networking/ip-sysctl.rst index 5c63ab928b97..b43222ee57cf 100644 --- a/Documentation/networking/ip-sysctl.rst +++ b/Documentation/networking/ip-sysctl.rst @@ -37,8 +37,8 @@ ip_no_pmtu_disc - INTEGER Mode 3 is a hardened pmtu discover mode. The kernel will only accept fragmentation-needed errors if the underlying protocol can verify them besides a plain socket lookup. Current - protocols for which pmtu events will be honored are TCP, SCTP - and DCCP as they verify e.g. the sequence number or the + protocols for which pmtu events will be honored are TCP and + SCTP as they verify e.g. the sequence number or the association. This mode should not be enabled globally but is only intended to secure e.g. name servers in namespaces where TCP path mtu must still work but path MTU information of other diff --git a/Documentation/translations/zh_CN/admin-guide/bug-hunting.rst b/Documentation/translations/zh_CN/admin-guide/bug-hunting.rst index c3f6a83294dc..4b3432753eb9 100644 --- a/Documentation/translations/zh_CN/admin-guide/bug-hunting.rst +++ b/Documentation/translations/zh_CN/admin-guide/bug-hunting.rst @@ -188,7 +188,7 @@ objdump 编行。如果没有调试符号，您将看到所示例程的汇编程序代码，但是如果内核有调试 符号，C代码也将可见（调试符号可以在内核配置菜单的hacking项中启用）。例如:: - $ objdump -r -S -l --disassemble net/dccp/ipv4.o + $ objdump -r -S -l --disassemble net/ipv4/tcp.o .. note:: diff --git a/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst b/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst index b25ecc44d735..80ea5677ee52 100644 --- a/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst +++ b/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst @@ -191,7 +191,7 @@ objdump 編行。如果沒有調試符號，您將看到所示例程的彙編程序代碼，但是如果內核有調試 符號，C代碼也將可見（調試符號可以在內核配置菜單的hacking項中啓用）。例如:: - $ objdump -r -S -l --disassemble net/dccp/ipv4.o + $ objdump -r -S -l --disassemble net/ipv4/tcp.o .. note:: -- cgit v1.2.3 From d60007fc9b739d939d5b6148c25805f206c836f9 Mon Sep 17 00:00:00 2001 From: Keguang Zhang Date: Wed, 9 Apr 2025 18:29:31 +0800 Subject: ASoC: dt-bindings: Add Loongson-1 AC97 Controller Add devicetree binding document for Loongson-1 AC97 controller. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Keguang Zhang Link: https://patch.msgid.link/20250409-loongson1-ac97-v2-1-65d5db96a046@gmail.com Signed-off-by: Mark Brown --- .../bindings/sound/loongson,ls1b-ac97.yaml | 68 ++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/loongson,ls1b-ac97.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/loongson,ls1b-ac97.yaml b/Documentation/devicetree/bindings/sound/loongson,ls1b-ac97.yaml new file mode 100644 index 000000000000..1c6a2771f942 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/loongson,ls1b-ac97.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/loongson,ls1b-ac97.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson-1 AC97 Controller + +maintainers: + - Keguang Zhang + +description: + The Loongson-1 AC97 controller supports 2-channel stereo output and input. + It is paired with the DMA engine to handle playback and capture functions. + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + oneOf: + - const: loongson,ls1b-ac97 + - items: + - enum: + - loongson,ls1a-ac97 + - loongson,ls1c-ac97 + - const: loongson,ls1b-ac97 + + reg: + maxItems: 3 + + reg-names: + items: + - const: ac97 + - const: audio-tx + - const: audio-rx + + dmas: + maxItems: 2 + + dma-names: + items: + - const: tx + - const: rx + + '#sound-dai-cells': + const: 0 + +required: + - compatible + - reg + - reg-names + - dmas + - dma-names + - '#sound-dai-cells' + +unevaluatedProperties: false + +examples: + - | + audio-controller@1fe74000 { + compatible = "loongson,ls1b-ac97"; + reg = <0x1fe74000 0x60>, <0x1fe72420 0x4>, <0x1fe74c4c 0x4>; + reg-names = "ac97", "audio-tx", "audio-rx"; + dmas = <&dma 1>, <&dma 2>; + dma-names = "tx", "rx"; + #sound-dai-cells = <0>; + }; -- cgit v1.2.3 From 0142b45000457b9d112d40d5685d0898e51ed52f Mon Sep 17 00:00:00 2001 From: Keguang Zhang Date: Wed, 9 Apr 2025 18:29:32 +0800 Subject: ASoC: dt-bindings: Add Realtek ALC203 Codec Add devicetree binding document for Realtek ALC203 codec. Signed-off-by: Keguang Zhang Link: https://patch.msgid.link/20250409-loongson1-ac97-v2-2-65d5db96a046@gmail.com Reviewed-by: Krzysztof Kozlowski Signed-off-by: Mark Brown --- .../devicetree/bindings/sound/realtek,alc203.yaml | 36 ++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/realtek,alc203.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/realtek,alc203.yaml b/Documentation/devicetree/bindings/sound/realtek,alc203.yaml new file mode 100644 index 000000000000..6b90788b45eb --- /dev/null +++ b/Documentation/devicetree/bindings/sound/realtek,alc203.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/realtek,alc203.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek ALC203 AC97 Audio Codec + +maintainers: + - Keguang Zhang + +description: + ALC203 is a full duplex AC97 2.3 compatible stereo audio codec. + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + const: realtek,alc203 + + '#sound-dai-cells': + const: 0 + +required: + - compatible + - '#sound-dai-cells' + +unevaluatedProperties: false + +examples: + - | + audio-codec { + compatible = "realtek,alc203"; + #sound-dai-cells = <0>; + }; -- cgit v1.2.3 From 667ebcc13dd63f59e2a1132e0f54d2f3067597db Mon Sep 17 00:00:00 2001 From: ChiYuan Huang Date: Thu, 10 Apr 2025 08:58:10 +0800 Subject: ASoC: dt-bindings: Add bindings for Richtek rt9123 Document the ASoC Richtek rt9123. Signed-off-by: ChiYuan Huang Link: https://patch.msgid.link/4a0b67438f82e7d8ed9968cc90acf419fc9c22cf.1744245663.git.cy_huang@richtek.com Reviewed-by: "Rob Herring (Arm)" Signed-off-by: Mark Brown --- .../devicetree/bindings/sound/richtek,rt9123.yaml | 56 ++++++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/richtek,rt9123.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/richtek,rt9123.yaml b/Documentation/devicetree/bindings/sound/richtek,rt9123.yaml new file mode 100644 index 000000000000..5acb05cdfefd --- /dev/null +++ b/Documentation/devicetree/bindings/sound/richtek,rt9123.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/richtek,rt9123.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Richtek RT9123 Audio Amplifier + +maintainers: + - ChiYuan Huang + +description: + RT9123 is a 3.2W mono Class-D audio amplifier that features high efficiency + and performance with ultra-low quiescent current. The digital audio interface + support various formats, including I2S, left-justified, right-justified, and + TDM formats. + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + enum: + - richtek,rt9123 + + reg: + maxItems: 1 + + '#sound-dai-cells': + const: 0 + + enable-gpios: + maxItems: 1 + +required: + - compatible + - reg + - '#sound-dai-cells' + +unevaluatedProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + amplifier@5e { + compatible = "richtek,rt9123"; + reg = <0x5e>; + enable-gpios = <&gpio 26 GPIO_ACTIVE_HIGH>; + #sound-dai-cells = <0>; + }; + }; -- cgit v1.2.3 From 4a046b67d2d267daf884798ee8509a502abe7a58 Mon Sep 17 00:00:00 2001 From: ChiYuan Huang Date: Thu, 10 Apr 2025 08:58:12 +0800 Subject: ASoC: dt-bindings: Add bindings for Richtek rt9123p Document the ASoC Richtek rt9123p. Signed-off-by: ChiYuan Huang Link: https://patch.msgid.link/0c80e1c6165fee5e9884d541167eee0a7f676c06.1744245663.git.cy_huang@richtek.com Reviewed-by: "Rob Herring (Arm)" Signed-off-by: Mark Brown --- .../devicetree/bindings/sound/richtek,rt9123p.yaml | 48 ++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/richtek,rt9123p.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/richtek,rt9123p.yaml b/Documentation/devicetree/bindings/sound/richtek,rt9123p.yaml new file mode 100644 index 000000000000..693511dfdda4 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/richtek,rt9123p.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/richtek,rt9123p.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Richtek RT9123P Audio Amplifier + +maintainers: + - ChiYuan Huang + +description: + RT9123P is a RT9123 variant which does not support I2C control. + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + enum: + - richtek,rt9123p + + '#sound-dai-cells': + const: 0 + + enable-gpios: + maxItems: 1 + + enable-delay-ms: + description: + Delay time for 'ENABLE' pin changes intended to make I2S clocks ready to + prevent speaker pop noise. The unit is in millisecond. + +required: + - compatible + - '#sound-dai-cells' + +unevaluatedProperties: false + +examples: + - | + #include + + amplifier { + compatible = "richtek,rt9123p"; + enable-gpios = <&gpio 26 GPIO_ACTIVE_HIGH>; + #sound-dai-cells = <0>; + }; -- cgit v1.2.3 From 90cd430f04d0f2874f9c0fc75b9084f5162299c9 Mon Sep 17 00:00:00 2001 From: Binbin Zhou Date: Mon, 31 Mar 2025 14:53:49 +0800 Subject: dt-bindings: pwm: Add Loongson PWM controller MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add Loongson PWM controller binding with DT schema format using json-schema. Reviewed-by: Krzysztof Kozlowski Acked-by: Huacai Chen Signed-off-by: Binbin Zhou Link: https://lore.kernel.org/r/57e0cbd4b7ce37da94094205e28a2ec2256c7175.1743403075.git.zhoubinbin@loongson.cn Signed-off-by: Uwe Kleine-König --- .../devicetree/bindings/pwm/loongson,ls7a-pwm.yaml | 67 ++++++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/loongson,ls7a-pwm.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pwm/loongson,ls7a-pwm.yaml b/Documentation/devicetree/bindings/pwm/loongson,ls7a-pwm.yaml new file mode 100644 index 000000000000..5d64fb40a0d6 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/loongson,ls7a-pwm.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/loongson,ls7a-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson PWM Controller + +maintainers: + - Binbin Zhou + +description: + The Loongson PWM has one pulse width output signal and one pulse input + signal to be measured. + It can be found on Loongson-2K series cpus and Loongson LS7A bridge chips. + +allOf: + - $ref: pwm.yaml# + +properties: + compatible: + oneOf: + - const: loongson,ls7a-pwm + - items: + - enum: + - loongson,ls2k0500-pwm + - loongson,ls2k1000-pwm + - loongson,ls2k2000-pwm + - const: loongson,ls7a-pwm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + '#pwm-cells': + description: + The first cell must have a value of 0, which specifies the PWM output signal; + The second cell is the period in nanoseconds; + The third cell flag supported by this binding is PWM_POLARITY_INVERTED. + const: 3 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + pwm@1fe22000 { + compatible = "loongson,ls2k1000-pwm", "loongson,ls7a-pwm"; + reg = <0x1fe22000 0x10>; + interrupt-parent = <&liointc0>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk LOONGSON2_APB_CLK>; + #pwm-cells = <3>; + }; -- cgit v1.2.3 From abc43c0f3c3eaa7470004e4e8a190a57c612a686 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 7 Apr 2025 20:16:17 +0100 Subject: dt-bindings: soc: renesas: Document Renesas RZ/V2N SoC variants and EVK Document the Renesas RZ/V2N (R9A09G056) SoC variants, distinguishing between configurations with and without specific hardware features such as GPU, ISP, and cryptographic extensions. Also, document the "renesas,rzv2n-evk" compatible string for the RZ/V2N EVK board. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250407191628.323613-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- .../devicetree/bindings/soc/renesas/renesas.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml index 51a4c48eea6d..0389355b9eca 100644 --- a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml +++ b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml @@ -551,6 +551,21 @@ properties: - renesas,r9a09g047e58 # Quad Cortex-A55 + Cortex-M33 + Ethos-U55 (21mm BGA) - const: renesas,r9a09g047 + - description: RZ/V2N (R9A09G056) + items: + - enum: + - renesas,rzv2n-evk # RZ/V2N EVK (RTK0EF0186C03000BJ) + - enum: + - renesas,r9a09g056n41 # RZ/V2N + - renesas,r9a09g056n42 # RZ/V2N with Mali-G31 support + - renesas,r9a09g056n43 # RZ/V2N with Mali-C55 support + - renesas,r9a09g056n44 # RZ/V2N with Mali-G31 + Mali-C55 support + - renesas,r9a09g056n45 # RZ/V2N with cryptographic extension support + - renesas,r9a09g056n46 # RZ/V2N with Mali-G31 + cryptographic extension support + - renesas,r9a09g056n47 # RZ/V2N with Mali-C55 + cryptographic extension support + - renesas,r9a09g056n48 # RZ/V2N with Mali-G31 + Mali-C55 + cryptographic extension support + - const: renesas,r9a09g056 + - description: RZ/V2H(P) (R9A09G057) items: - enum: -- cgit v1.2.3 From dc7af24bd60bdced496d03473e67ce5eb51236a5 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 7 Apr 2025 20:16:19 +0100 Subject: dt-bindings: soc: renesas: Document SYS for RZ/V2N SoC Add the RZ/V2N (R9A09G056) variant to the existing RZ/V2H(P) System Controller (SYS) binding, as both IPs are very similar. However, they have different SoC IDs, and the RZ/V2N does not have PCIE1 configuration registers, unlike the RZ/V2H(P) SYS IP. To handle these differences, introduce a new compatible string `renesas,r9a09g056-sys`. Signed-off-by: Lad Prabhakar Acked-by: Rob Herring (Arm) Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250407191628.323613-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml index e0f7503a9f35..c41dcaea568a 100644 --- a/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml +++ b/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml @@ -25,6 +25,7 @@ properties: items: - enum: - renesas,r9a09g047-sys # RZ/G3E + - renesas,r9a09g056-sys # RZ/V2N - renesas,r9a09g057-sys # RZ/V2H reg: -- cgit v1.2.3 From c04269c02273b24398590398c0b73605c72f17ac Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 7 Apr 2025 20:16:22 +0100 Subject: dt-bindings: clock: renesas: Document RZ/V2N SoC CPG Document the device tree bindings for the Renesas RZ/V2N (R9A09G056) SoC Clock Pulse Generator (CPG). Update `renesas,rzv2h-cpg.yaml` to include the compatible string for RZ/V2N SoC and adjust the title and description accordingly. Additionally, introduce `renesas,r9a09g056-cpg.h` to define core clock constants for the RZ/V2N SoC. Note the existing RZ/V2H(P) family-specific clock driver will be reused for this SoC. Signed-off-by: Lad Prabhakar Acked-by: Rob Herring (Arm) Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250407191628.323613-7-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/clock/renesas,rzv2h-cpg.yaml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/renesas,rzv2h-cpg.yaml b/Documentation/devicetree/bindings/clock/renesas,rzv2h-cpg.yaml index c3fe76abd549..f261445bf341 100644 --- a/Documentation/devicetree/bindings/clock/renesas,rzv2h-cpg.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,rzv2h-cpg.yaml @@ -4,13 +4,13 @@ $id: http://devicetree.org/schemas/clock/renesas,rzv2h-cpg.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Renesas RZ/{G3E,V2H(P)} Clock Pulse Generator (CPG) +title: Renesas RZ/{G3E,V2H(P),V2N} Clock Pulse Generator (CPG) maintainers: - Lad Prabhakar description: - On Renesas RZ/{G3E,V2H(P)} SoCs, the CPG (Clock Pulse Generator) handles + On Renesas RZ/{G3E,V2H(P),V2N} SoCs, the CPG (Clock Pulse Generator) handles generation and control of clock signals for the IP modules, generation and control of resets, and control over booting, low power consumption and power supply domains. @@ -19,6 +19,7 @@ properties: compatible: enum: - renesas,r9a09g047-cpg # RZ/G3E + - renesas,r9a09g056-cpg # RZ/V2N - renesas,r9a09g057-cpg # RZ/V2H reg: -- cgit v1.2.3 From 626acded47269bd0aae73e80a0448256924e3bf8 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 7 Apr 2025 20:16:25 +0100 Subject: dt-bindings: pinctrl: renesas: Document RZ/V2N SoC Add documentation for the pin controller found on the Renesas RZ/V2N (R9A09G056) SoC. The RZ/V2N PFC differs slightly from the RZ/G2L family and is almost identical to the RZ/V2H(P) SoC, except that the RZ/V2H(P) SoC has an additional dedicated pin. To account for this, a SoC-specific compatible string, 'renesas,r9a09g056-pinctrl', is introduced for the RZ/V2N SoC. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250407191628.323613-10-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml index 768bb3c2b456..5156d54b240b 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml @@ -27,6 +27,7 @@ properties: - renesas,r9a07g044-pinctrl # RZ/G2{L,LC} - renesas,r9a08g045-pinctrl # RZ/G3S - renesas,r9a09g047-pinctrl # RZ/G3E + - renesas,r9a09g056-pinctrl # RZ/V2N - renesas,r9a09g057-pinctrl # RZ/V2H(P) - items: @@ -145,6 +146,7 @@ allOf: contains: enum: - renesas,r9a09g047-pinctrl + - renesas,r9a09g056-pinctrl - renesas,r9a09g057-pinctrl then: properties: -- cgit v1.2.3 From 07cb8c324b63c3e09245b9a8c4ca805a8ca1c8e6 Mon Sep 17 00:00:00 2001 From: Cristian Marussi Date: Mon, 10 Mar 2025 18:08:11 +0000 Subject: firmware: arm_scmi: Add polling support to raw mode Provide a couple of additional debugfs entries to enable polling-mode on the waiting path of injected messages: message_poll will cause the system to poll while waiting for the reply, while message_poll_async will send an asynchronous message, as usual, and will use polling mode for the immediate synchronous part of the async command. Signed-off-by: Cristian Marussi Message-Id: <20250310180811.1463539-1-cristian.marussi@arm.com> Signed-off-by: Sudeep Holla --- Documentation/ABI/testing/debugfs-scmi-raw | 91 ++++++++++++++++++++++++++++++ 1 file changed, 91 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/debugfs-scmi-raw b/Documentation/ABI/testing/debugfs-scmi-raw index 97678cc9535c..5847b96b3896 100644 --- a/Documentation/ABI/testing/debugfs-scmi-raw +++ b/Documentation/ABI/testing/debugfs-scmi-raw @@ -31,6 +31,42 @@ Description: SCMI Raw asynchronous message injection/snooping facility; write (receiving an EOF at each message boundary). Users: Debugging, any userspace test suite +What: /sys/kernel/debug/scmi//raw/message_poll +Date: June 2025 +KernelVersion: 6.16 +Contact: cristian.marussi@arm.com +Description: SCMI Raw message injection/snooping facility using polling mode; + write a complete SCMI command message (header included) in + little-endian binary format to have it sent to the configured + backend SCMI server for instance , using polling mode on + the reception path. (if transport is polling capable) + Any subsequently received response can be read from this same + entry if it arrived within the configured timeout. + Each write to the entry causes one command request to be built + and sent while the replies are read back one message at time + (receiving an EOF at each message boundary). +Users: Debugging, any userspace test suite + +What: /sys/kernel/debug/scmi//raw/message_poll_async +Date: June 2025 +KernelVersion: 6.16 +Contact: cristian.marussi@arm.com +Description: SCMI Raw asynchronous message injection/snooping facility using + polling-mode; write a complete SCMI asynchronous command message + (header included) in little-endian binary format to have it sent + to the configured backend SCMI server for instance , using + polling-mode on the reception path of the immediate part of the + asynchronous command. (if transport is polling capable) + Any subsequently received response can be read from this same + entry if it arrived within the configured timeout. + Any additional delayed response received afterwards can be read + from this same entry too if it arrived within the configured + timeout. + Each write to the entry causes one command request to be built + and sent while the replies are read back one message at time + (receiving an EOF at each message boundary). +Users: Debugging, any userspace test suite + What: /sys/kernel/debug/scmi//raw/errors Date: March 2023 KernelVersion: 6.3 @@ -115,3 +151,58 @@ Description: SCMI Raw asynchronous message injection/snooping facility; write exist only if the transport is configured to have more than one default channel. Users: Debugging, any userspace test suite + + +What: /sys/kernel/debug/scmi//raw/channels//message_poll +Date: June 2025 +KernelVersion: 6.16 +Contact: cristian.marussi@arm.com +Description: SCMI Raw message injection/snooping facility using polling mode; + write a complete SCMI command message (header included) in + little-endian binary format to have it sent to the configured + backend SCMI server for instance through the transport + channel, using polling mode on the reception path. + (if transport is polling capable) + Any subsequently received response can be read from this same + entry if it arrived on channel within the configured + timeout. + Each write to the entry causes one command request to be built + and sent while the replies are read back one message at time + (receiving an EOF at each message boundary). + Channel identifier matches the SCMI protocol number which + has been associated with this transport channel in the DT + description, with base protocol number 0x10 being the default + channel for this instance. + Note that these per-channel entries rooted at <..>/channels + exist only if the transport is configured to have more than + one default channel. +Users: Debugging, any userspace test suite + +What: /sys/kernel/debug/scmi//raw/channels//message_poll_async +Date: June 2025 +KernelVersion: 6.16 +Contact: cristian.marussi@arm.com +Description: SCMI Raw asynchronous message injection/snooping facility using + polling-mode; write a complete SCMI asynchronous command message + (header included) in little-endian binary format to have it sent + to the configured backend SCMI server for instance through + the transport channel, using polling mode on the reception + path of the immediate part of the asynchronous command. + (if transport is polling capable) + Any subsequently received response can be read from this same + entry if it arrived on channel within the configured + timeout. + Any additional delayed response received afterwards can be read + from this same entry too if it arrived within the configured + timeout. + Each write to the entry causes one command request to be built + and sent while the replies are read back one message at time + (receiving an EOF at each message boundary). + Channel identifier matches the SCMI protocol number which + has been associated with this transport channel in the DT + description, with base protocol number 0x10 being the default + channel for this instance. + Note that these per-channel entries rooted at <..>/channels + exist only if the transport is configured to have more than + one default channel. +Users: Debugging, any userspace test suite -- cgit v1.2.3 From 73b7a51b74450be62f90b3045ff85d28a0e8877e Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 8 Apr 2025 16:44:26 +0800 Subject: dt-bindings: firmware: Add i.MX95 SCMI LMM and CPU protocol Add i.MX SCMI Extension protocols bindings for: - Logic Machine Management(LMM) Protocol intended for boot, shutdown, and reset of other logical machines (LM). It is usually used to allow one LM to manager another used as an offload or accelerator engine.. - CPU Protocol. allows an agent to start or stop a CPU. It is used to manage auxiliary CPUs in an LM (e.g. additional cores in an AP cluster). Reviewed-by: Rob Herring (Arm) Signed-off-by: Peng Fan Message-Id: <20250408-imx-lmm-cpu-v4-2-4c5f4a456e49@nxp.com> Signed-off-by: Sudeep Holla --- .../bindings/firmware/nxp,imx95-scmi.yaml | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi.yaml b/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi.yaml index 1a95010a546b..2bda2e0e1369 100644 --- a/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi.yaml +++ b/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi.yaml @@ -11,6 +11,18 @@ maintainers: - Peng Fan properties: + protocol@80: + description: + SCMI LMM protocol which is for boot, shutdown, and reset of other logical + machines (LM). It is usually used to allow one LM to manage another used + as an offload or accelerator engine. + $ref: '/schemas/firmware/arm,scmi.yaml#/$defs/protocol-node' + unevaluatedProperties: false + + properties: + reg: + const: 0x80 + protocol@81: $ref: '/schemas/firmware/arm,scmi.yaml#/$defs/protocol-node' unevaluatedProperties: false @@ -19,6 +31,17 @@ properties: reg: const: 0x81 + protocol@82: + description: + SCMI CPU Protocol which allows an agent to start or stop a CPU. It is + used to manage auxiliary CPUs in a LM. + $ref: '/schemas/firmware/arm,scmi.yaml#/$defs/protocol-node' + unevaluatedProperties: false + + properties: + reg: + const: 0x82 + protocol@84: $ref: '/schemas/firmware/arm,scmi.yaml#/$defs/protocol-node' unevaluatedProperties: false -- cgit v1.2.3 From ba3297872a237c8949e812ffa72c64e81da38cec Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 10 Apr 2025 16:40:15 +0200 Subject: dt-bindings: soc: mediatek: dvfsrc: Add support for MT6893 Add a compatible for the MediaTek Dimensity 1200 (MT6893) SoC's DVFSRC hardware, introducing capability to communicate with it. Even though this SoC uses the same basic version of the DVFSRC IP as MT8195, the vcore-vdram parameters are different, hence no fallback compatibility is possible. Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250410144019.475930-2-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno --- .../devicetree/bindings/soc/mediatek/mediatek,mt8183-dvfsrc.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt8183-dvfsrc.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt8183-dvfsrc.yaml index 1ad5b61b249f..4c96d4917967 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt8183-dvfsrc.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt8183-dvfsrc.yaml @@ -23,6 +23,7 @@ properties: compatible: oneOf: - enum: + - mediatek,mt6893-dvfsrc - mediatek,mt8183-dvfsrc - mediatek,mt8195-dvfsrc - items: -- cgit v1.2.3 From fb42d8dcbc3f01782b4df4ef2b69ec5a902d992e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= Date: Tue, 8 Apr 2025 13:57:47 -0400 Subject: docs: automarkup: Move common logic to add and resolve xref to helper MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Several of the markup functions contain the same code, calling into sphinx's pending_xref and resolve_xref functions to add and resolve a cross-reference, with only a few of the parameters changed (domain, reference type, markup content). Move this logic to its own function and reuse it in the markup functions. No functional change. Signed-off-by: Nícolas F. R. A. Prado Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250408-automarkup-resolve-xref-helper-v2-1-e0a9b8fc7fdd@collabora.com --- Documentation/sphinx/automarkup.py | 97 ++++++++++---------------------------- 1 file changed, 24 insertions(+), 73 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/automarkup.py b/Documentation/sphinx/automarkup.py index ecf54d22e9dc..fd633f7a0bc3 100644 --- a/Documentation/sphinx/automarkup.py +++ b/Documentation/sphinx/automarkup.py @@ -128,13 +128,8 @@ def note_failure(target): # own C role, but both match the same regex, so we try both. # def markup_func_ref_sphinx3(docname, app, match): - cdom = app.env.domains['c'] - # - # Go through the dance of getting an xref out of the C domain - # base_target = match.group(2) target_text = nodes.Text(match.group(0)) - xref = None possible_targets = [base_target] # Check if this document has a namespace, and if so, try # cross-referencing inside it first. @@ -146,22 +141,8 @@ def markup_func_ref_sphinx3(docname, app, match): if (target not in Skipfuncs) and not failure_seen(target): lit_text = nodes.literal(classes=['xref', 'c', 'c-func']) lit_text += target_text - pxref = addnodes.pending_xref('', refdomain = 'c', - reftype = 'function', - reftarget = target, - modname = None, - classname = None) - # - # XXX The Latex builder will throw NoUri exceptions here, - # work around that by ignoring them. - # - try: - xref = cdom.resolve_xref(app.env, docname, app.builder, - 'function', target, pxref, - lit_text) - except NoUri: - xref = None - + xref = add_and_resolve_xref(app, docname, 'c', 'function', + target, contnode=lit_text) if xref: return xref note_failure(target) @@ -188,13 +169,8 @@ def markup_c_ref(docname, app, match): RE_typedef: 'type', } - cdom = app.env.domains['c'] - # - # Go through the dance of getting an xref out of the C domain - # base_target = match.group(2) target_text = nodes.Text(match.group(0)) - xref = None possible_targets = [base_target] # Check if this document has a namespace, and if so, try # cross-referencing inside it first. @@ -206,21 +182,9 @@ def markup_c_ref(docname, app, match): if not (match.re == RE_function and target in Skipfuncs): lit_text = nodes.literal(classes=['xref', 'c', class_str[match.re]]) lit_text += target_text - pxref = addnodes.pending_xref('', refdomain = 'c', - reftype = reftype_str[match.re], - reftarget = target, modname = None, - classname = None) - # - # XXX The Latex builder will throw NoUri exceptions here, - # work around that by ignoring them. - # - try: - xref = cdom.resolve_xref(app.env, docname, app.builder, - reftype_str[match.re], target, pxref, - lit_text) - except NoUri: - xref = None - + xref = add_and_resolve_xref(app, docname, 'c', + reftype_str[match.re], target, + contnode=lit_text) if xref: return xref @@ -231,30 +195,12 @@ def markup_c_ref(docname, app, match): # cross reference to that page # def markup_doc_ref(docname, app, match): - stddom = app.env.domains['std'] - # - # Go through the dance of getting an xref out of the std domain - # absolute = match.group(1) target = match.group(2) if absolute: target = "/" + target - xref = None - pxref = addnodes.pending_xref('', refdomain = 'std', reftype = 'doc', - reftarget = target, modname = None, - classname = None, refexplicit = False) - # - # XXX The Latex builder will throw NoUri exceptions here, - # work around that by ignoring them. - # - try: - xref = stddom.resolve_xref(app.env, docname, app.builder, 'doc', - target, pxref, None) - except NoUri: - xref = None - # - # Return the xref if we got it; otherwise just return the plain text. - # + + xref = add_and_resolve_xref(app, docname, 'std', 'doc', target) if xref: return xref else: @@ -265,10 +211,6 @@ def markup_doc_ref(docname, app, match): # with a cross reference to that page # def markup_abi_ref(docname, app, match, warning=False): - stddom = app.env.domains['std'] - # - # Go through the dance of getting an xref out of the std domain - # kernel_abi = get_kernel_abi() fname = match.group(1) @@ -280,7 +222,18 @@ def markup_abi_ref(docname, app, match, warning=False): kernel_abi.log.warning("%s not found", fname) return nodes.Text(match.group(0)) - pxref = addnodes.pending_xref('', refdomain = 'std', reftype = 'ref', + xref = add_and_resolve_xref(app, docname, 'std', 'ref', target) + if xref: + return xref + else: + return nodes.Text(match.group(0)) + +def add_and_resolve_xref(app, docname, domain, reftype, target, contnode=None): + # + # Go through the dance of getting an xref out of the corresponding domain + # + dom_obj = app.env.domains[domain] + pxref = addnodes.pending_xref('', refdomain = domain, reftype = reftype, reftarget = target, modname = None, classname = None, refexplicit = False) @@ -289,17 +242,15 @@ def markup_abi_ref(docname, app, match, warning=False): # work around that by ignoring them. # try: - xref = stddom.resolve_xref(app.env, docname, app.builder, 'ref', - target, pxref, None) + xref = dom_obj.resolve_xref(app.env, docname, app.builder, reftype, + target, pxref, contnode) except NoUri: xref = None - # - # Return the xref if we got it; otherwise just return the plain text. - # + if xref: return xref - else: - return nodes.Text(match.group(0)) + + return None # # Variant of markup_abi_ref() that warns whan a reference is not found -- cgit v1.2.3 From 3fa3b20ba15cddc4462e64a79d779ad3b2d0d4e1 Mon Sep 17 00:00:00 2001 From: James Addison Date: Mon, 7 Apr 2025 21:51:20 +0200 Subject: docs: Disambiguate a pair of rST labels According to the reStructuredText documentation, internal hyperlink targets[1] are intended to resolve within the current document. Sphinx has a bug that causes internal hyperlinks declared with duplicate names to resolve nondeterministically, producing incorrect documentation. Sphinx does not yet emit a warning when these duplicate target names are declared. To improve the reproducibility and correctness of the HTML documentation, disambiguate two labels both previously titled "submit_improvements". [1] - https://docutils.sourceforge.io/docs/ref/rst/restructuredtext.html#hyperlink-targets Link: https://github.com/sphinx-doc/sphinx/issues/13383 Signed-off-by: James Addison Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250407195120.331103-2-jvanderwaa@redhat.com --- Documentation/admin-guide/quickly-build-trimmed-linux.rst | 4 ++-- Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/quickly-build-trimmed-linux.rst b/Documentation/admin-guide/quickly-build-trimmed-linux.rst index 07cfd8863b46..4a5ffb0996a3 100644 --- a/Documentation/admin-guide/quickly-build-trimmed-linux.rst +++ b/Documentation/admin-guide/quickly-build-trimmed-linux.rst @@ -347,7 +347,7 @@ again. [:ref:`details`] -.. _submit_improvements: +.. _submit_improvements_qbtl: Did you run into trouble following any of the above steps that is not cleared up by the reference section below? Or do you have ideas how to improve the text? @@ -1070,7 +1070,7 @@ complicated, and harder to follow. That being said: this of course is a balancing act. Hence, if you think an additional use-case is worth describing, suggest it to the maintainers of this -document, as :ref:`described above `. +document, as :ref:`described above `. .. diff --git a/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst b/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst index 03c55151346c..d8946b084b1e 100644 --- a/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst +++ b/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst @@ -267,7 +267,7 @@ culprit might be known already. For further details on what actually qualifies as a regression check out Documentation/admin-guide/reporting-regressions.rst. If you run into any problems while following this guide or have ideas how to -improve it, :ref:`please let the kernel developers know `. +improve it, :ref:`please let the kernel developers know `. .. _introprep_bissbs: @@ -1055,7 +1055,7 @@ follow these instructions. [:ref:`details `] -.. _submit_improvements: +.. _submit_improvements_vbbr: Conclusion ---------- -- cgit v1.2.3 From e54ac586674da862967fee790471fd33b81b29e7 Mon Sep 17 00:00:00 2001 From: Randy Dunlap Date: Fri, 4 Apr 2025 17:14:47 -0700 Subject: cpufreq: editing corrections to cpufreq.rst Change a few words and abbreviations/punctuation. Change one echo command to include a trailing '`'. Signed-off-by: Randy Dunlap Cc: Rafael J. Wysocki Cc: Viresh Kumar Cc: linux-pm@vger.kernel.org Cc: Jonathan Corbet Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250405001447.4039463-1-rdunlap@infradead.org --- Documentation/admin-guide/pm/cpufreq.rst | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/pm/cpufreq.rst b/Documentation/admin-guide/pm/cpufreq.rst index 3950583f2b15..2d74af7f0efe 100644 --- a/Documentation/admin-guide/pm/cpufreq.rst +++ b/Documentation/admin-guide/pm/cpufreq.rst @@ -231,7 +231,7 @@ are the following: present). The existence of the limit may be a result of some (often unintentional) - BIOS settings, restrictions coming from a service processor or another + BIOS settings, restrictions coming from a service processor or other BIOS/HW-based mechanisms. This does not cover ACPI thermal limitations which can be discovered @@ -258,8 +258,8 @@ are the following: extension on ARM). If one cannot be determined, this attribute should not be present. - Note, that failed attempt to retrieve current frequency for a given - CPU(s) will result in an appropriate error, i.e: EAGAIN for CPU that + Note that failed attempt to retrieve current frequency for a given + CPU(s) will result in an appropriate error, i.e.: EAGAIN for CPU that remains idle (raised on ARM). ``cpuinfo_max_freq`` @@ -499,7 +499,7 @@ This governor exposes the following tunables: represented by it to be 1.5 times as high as the transition latency (the default):: - # echo `$(($(cat cpuinfo_transition_latency) * 3 / 2)) > ondemand/sampling_rate + # echo `$(($(cat cpuinfo_transition_latency) * 3 / 2))` > ondemand/sampling_rate ``up_threshold`` If the estimated CPU load is above this value (in percent), the governor -- cgit v1.2.3 From dd0808ab40ca4c00e1c3cae85614f1a42b3df882 Mon Sep 17 00:00:00 2001 From: Kevin Paul Reddy Janagari Date: Sat, 5 Apr 2025 22:21:16 +0530 Subject: Added usb_string function to a namespace with reference to WARNING: Duplicate C declaration, also defined at driver-api/usb/gadget:804 There is a function usb_string in the file message.c, there is also a struct usb_string in the kernel api headers. The docs is unable to index the function as the index is occupied by struct This fix adds messgae.c to the usb_core namespace (in docs) hence providing usb_sting a unique index usb_core.usb_string() Signed-off-by: Kevin Paul Reddy Janagari Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250405165116.147958-1-kevinpaul468@gmail.com --- Documentation/driver-api/usb/usb.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/driver-api/usb/usb.rst b/Documentation/driver-api/usb/usb.rst index 89f9c37bb979..976fb4221062 100644 --- a/Documentation/driver-api/usb/usb.rst +++ b/Documentation/driver-api/usb/usb.rst @@ -161,6 +161,7 @@ rely on 64bit DMA to eliminate another kind of bounce buffer. .. kernel-doc:: drivers/usb/core/urb.c :export: +.. c:namespace:: usb_core .. kernel-doc:: drivers/usb/core/message.c :export: -- cgit v1.2.3 From 1af310951e61471504c445d5023cdae27e2cc1d8 Mon Sep 17 00:00:00 2001 From: Chih Yun Lin Date: Sun, 30 Mar 2025 16:45:18 +0800 Subject: docs: hid: Fix typo in intel-thc-hid.rst Corrected the spelling of "triggerred" to "triggered" and "flexiblity" to "flexibility". Signed-off-by: Chih Yun Lin Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250330084518.20916-1-noralin249@gmail.com --- Documentation/hid/intel-thc-hid.rst | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/hid/intel-thc-hid.rst b/Documentation/hid/intel-thc-hid.rst index 6c417205ac6a..dc9250787fc5 100644 --- a/Documentation/hid/intel-thc-hid.rst +++ b/Documentation/hid/intel-thc-hid.rst @@ -182,7 +182,7 @@ value and use PIO write (by setting SubIP write opcode) to do a write operation. THC also includes two GPIO pins, one for interrupt and the other for device reset control. -Interrupt line can be configured to either level triggerred or edge triggerred by setting MMIO +Interrupt line can be configured to either level triggered or edge triggered by setting MMIO Control register. Reset line is controlled by BIOS (or EFI) through ACPI _RST method, driver needs to call this @@ -302,10 +302,10 @@ waiting for interrupt ready then read out the data from system memory. 3.3.2 Software DMA channel ~~~~~~~~~~~~~~~~~~~~~~~~~~ -THC supports a software triggerred RxDMA mode to read the touch data from touch IC. This SW RxDMA +THC supports a software triggered RxDMA mode to read the touch data from touch IC. This SW RxDMA is the 3rd THC RxDMA engine with the similar functionalities as the existing two RxDMAs, the only -difference is this SW RxDMA is triggerred by software, and RxDMA2 is triggerred by external Touch IC -interrupt. It gives a flexiblity to software driver to use RxDMA read Touch IC data in any time. +difference is this SW RxDMA is triggered by software, and RxDMA2 is triggered by external Touch IC +interrupt. It gives a flexibility to software driver to use RxDMA read Touch IC data in any time. Before software starts a SW RxDMA, it shall stop the 1st and 2nd RxDMA, clear PRD read/write pointer and quiesce the device interrupt (THC_DEVINT_QUIESCE_HW_STS = 1), other operations are the same with -- cgit v1.2.3 From 0cc9e7cae3e0986800adae75e0162d5e8e17eef8 Mon Sep 17 00:00:00 2001 From: Tomas Glozar Date: Tue, 11 Mar 2025 12:49:33 +0100 Subject: Documentation/rtla: Fix duplicate text about timerlat tracer A passage about how the timerlat tracer outputs information is included in both common_timerlat_description.rst and rtla-timerlat.rst, leading it to be displayed twice in the rtla-timerlat page. Remove the duplicate passage from rtla-timerlat.rst. Fixes: 29380d4055e5 ("rtla: Add rtla timerlat documentation") Signed-off-by: Tomas Glozar Reviewed-by: Luis Claudio R. Goncalves Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250311114936.148012-2-tglozar@redhat.com --- Documentation/tools/rtla/rtla-timerlat.rst | 3 --- 1 file changed, 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/tools/rtla/rtla-timerlat.rst b/Documentation/tools/rtla/rtla-timerlat.rst index 44a49e6f302b..b334fb00ba0e 100644 --- a/Documentation/tools/rtla/rtla-timerlat.rst +++ b/Documentation/tools/rtla/rtla-timerlat.rst @@ -16,9 +16,6 @@ DESCRIPTION .. include:: common_timerlat_description.rst -The *timerlat* tracer outputs information in two ways. It periodically -prints the timer latency at the timer *IRQ* handler and the *Thread* handler. -It also provides information for each noise via the **osnoise:** tracepoints. The **rtla timerlat top** mode displays a summary of the periodic output from the *timerlat* tracer. The **rtla hist hist** mode displays a histogram of each tracer event occurrence. For further details, please refer to the -- cgit v1.2.3 From caa42c6df3c4368ab43adfb8e78a6240177cd989 Mon Sep 17 00:00:00 2001 From: Tomas Glozar Date: Tue, 11 Mar 2025 12:49:34 +0100 Subject: Documentation/rtla: Fix typo in rtla-timerlat.rst The file says "rtla hist hist mode" instead of "rtla timerlat hist mode". Fix the typo. Fixes: 29380d4055e5 ("rtla: Add rtla timerlat documentation") Signed-off-by: Tomas Glozar Reviewed-by: Luis Claudio R. Goncalves Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250311114936.148012-3-tglozar@redhat.com --- Documentation/tools/rtla/rtla-timerlat.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/tools/rtla/rtla-timerlat.rst b/Documentation/tools/rtla/rtla-timerlat.rst index b334fb00ba0e..20e2d259467f 100644 --- a/Documentation/tools/rtla/rtla-timerlat.rst +++ b/Documentation/tools/rtla/rtla-timerlat.rst @@ -17,9 +17,9 @@ DESCRIPTION .. include:: common_timerlat_description.rst The **rtla timerlat top** mode displays a summary of the periodic output -from the *timerlat* tracer. The **rtla hist hist** mode displays a histogram -of each tracer event occurrence. For further details, please refer to the -respective man page. +from the *timerlat* tracer. The **rtla timerlat hist** mode displays +a histogram of each tracer event occurrence. For further details, please +refer to the respective man page. MODES ===== -- cgit v1.2.3 From e7d3b24e3402db90d13725d89462af468df1a552 Mon Sep 17 00:00:00 2001 From: Tomas Glozar Date: Tue, 11 Mar 2025 12:49:35 +0100 Subject: Documentation/rtla: Fix typo in common_timerlat_description.rst Fix "it enable" to "it enables". Fixes: 29380d4055e5 ("rtla: Add rtla timerlat documentation") Signed-off-by: Tomas Glozar Reviewed-by: Luis Claudio R. Goncalves Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250311114936.148012-4-tglozar@redhat.com --- Documentation/tools/rtla/common_timerlat_description.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/tools/rtla/common_timerlat_description.rst b/Documentation/tools/rtla/common_timerlat_description.rst index 321201cb8597..8cd3e717baa8 100644 --- a/Documentation/tools/rtla/common_timerlat_description.rst +++ b/Documentation/tools/rtla/common_timerlat_description.rst @@ -6,5 +6,5 @@ debugging of operating system timer latency. The *timerlat* tracer outputs information in two ways. It periodically prints the timer latency at the timer *IRQ* handler and the *Thread* -handler. It also enable the trace of the most relevant information via +handler. It also enables the trace of the most relevant information via **osnoise:** tracepoints. -- cgit v1.2.3 From 770840a0e7e88a5bd74e64f23e3a9021d045caef Mon Sep 17 00:00:00 2001 From: Tomas Glozar Date: Tue, 11 Mar 2025 12:49:36 +0100 Subject: Documentation/rtla: Include BPF sample collection Add dependencies needed to build rtla with BPF sample collection support to README, and document both ways of sample collection in the manpages. Signed-off-by: Tomas Glozar Acked-by: Steven Rostedt (Google) Reviewed-by: Luis Claudio R. Goncalves Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250311114936.148012-5-tglozar@redhat.com --- Documentation/tools/rtla/common_timerlat_description.rst | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/tools/rtla/common_timerlat_description.rst b/Documentation/tools/rtla/common_timerlat_description.rst index 8cd3e717baa8..49fcae3ffdec 100644 --- a/Documentation/tools/rtla/common_timerlat_description.rst +++ b/Documentation/tools/rtla/common_timerlat_description.rst @@ -8,3 +8,11 @@ The *timerlat* tracer outputs information in two ways. It periodically prints the timer latency at the timer *IRQ* handler and the *Thread* handler. It also enables the trace of the most relevant information via **osnoise:** tracepoints. + +The **rtla timerlat** tool sets the options of the *timerlat* tracer +and collects and displays a summary of the results. By default, +the collection is done synchronously in kernel space using a dedicated +BPF program attached to the *timerlat* tracer. If either BPF or +the **osnoise:timerlat_sample** tracepoint it attaches to is +unavailable, the **rtla timerlat** tool falls back to using tracefs to +process the data asynchronously in user space. -- cgit v1.2.3 From 960c7d67879dd1e65e181b5347ce0b0c3758d6e2 Mon Sep 17 00:00:00 2001 From: Andres Urian Florez Date: Mon, 24 Mar 2025 11:45:58 -0500 Subject: docs/sp_SP: fix links to mailing list services With the changes in the way mailing lists are hostet at kernel.org, there is a need to sync the Spanish documentation to: 1. fix links that are pointing at the outdated resources 2. remove an outdated patchbomb admonition Signed-off-by: Andres Urian Florez Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250324164613.12639-1-andres.emb.sys@gmail.com --- Documentation/translations/sp_SP/process/2.Process.rst | 11 ++++++----- Documentation/translations/sp_SP/process/howto.rst | 10 +++++----- Documentation/translations/sp_SP/process/kernel-docs.rst | 5 ++--- .../translations/sp_SP/process/submitting-patches.rst | 13 +++++-------- 4 files changed, 18 insertions(+), 21 deletions(-) (limited to 'Documentation') diff --git a/Documentation/translations/sp_SP/process/2.Process.rst b/Documentation/translations/sp_SP/process/2.Process.rst index 5993eed71563..c21b0134cfa1 100644 --- a/Documentation/translations/sp_SP/process/2.Process.rst +++ b/Documentation/translations/sp_SP/process/2.Process.rst @@ -428,13 +428,14 @@ los desarrolladores, que corren el riesgo de quedar enterrados bajo una carga de correo electrónico, incumplir las convenciones utilizadas en las listas de Linux, o ambas cosas. -La mayoría de las listas de correo del kernel se ejecutan en -vger.kernel.org; la lista principal se puede encontrar en: +La mayoría de las listas de correo del kernel se alojan en kernel.org; la +lista principal se puede encontrar en: - http://vger.kernel.org/vger-lists.html + https://subspace.kernel.org -Sim embargo, hay listas alojadas en otros lugares; varios de ellos se -encuentran en redhat.com/mailman/listinfo. +Sin embargo, hay listas alojadas en otros lugares; consulte el archivo +MAINTAINERS para obtener la lista relevante para cualquier subsistema en +particular. La lista de correo principal para el desarrollo del kernel es, por supuesto, linux-kernel. Esta lista es un lugar intimidante; el volumen diff --git a/Documentation/translations/sp_SP/process/howto.rst b/Documentation/translations/sp_SP/process/howto.rst index 72ea855ac9dc..e1a6e6a52ae4 100644 --- a/Documentation/translations/sp_SP/process/howto.rst +++ b/Documentation/translations/sp_SP/process/howto.rst @@ -334,7 +334,7 @@ con el árbol principal, necesitan probar su integración. Para ello, existe un repositorio especial de pruebas en el que se encuentran casi todos los árboles de subsistema, actualizado casi a diario: - https://git.kernel.org/?p=linux/kernel/git/next/linux-next.git + https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git De esta manera, linux-next ofrece una perspectiva resumida de lo que se espera que entre en el kernel principal en el próximo período de "merge" @@ -378,13 +378,13 @@ desarrolladores del kernel participan en la lista de correo del kernel de Linux. Detalles sobre cómo para suscribirse y darse de baja de la lista se pueden encontrar en: - http://vger.kernel.org/vger-lists.html#linux-kernel + https://subspace.kernel.org/subscribing.html Existen archivos de la lista de correo en la web en muchos lugares distintos. Utilice un motor de búsqueda para encontrar estos archivos. Por ejemplo: - http://dir.gmane.org/gmane.linux.kernel + https://lore.kernel.org/linux-kernel/ Es muy recomendable que busque en los archivos sobre el tema que desea tratar, antes de publicarlo en la lista. Un montón de cosas ya discutidas @@ -398,13 +398,13 @@ los diferentes grupos. Muchas de las listas están alojadas en kernel.org. La información sobre estas puede ser encontrada en: - http://vger.kernel.org/vger-lists.html + https://subspace.kernel.org Recuerde mantener buenos hábitos de comportamiento al usar las listas. Aunque un poco cursi, la siguiente URL tiene algunas pautas simples para interactuar con la lista (o cualquier lista): - http://www.albion.com/netiquette/ + https://subspace.kernel.org/etiquette.html Si varias personas responden a su correo, el CC (lista de destinatarios) puede hacerse bastante grande. No elimine a nadie de la lista CC: sin una diff --git a/Documentation/translations/sp_SP/process/kernel-docs.rst b/Documentation/translations/sp_SP/process/kernel-docs.rst index a62c6854f59b..b9e0ca4be324 100644 --- a/Documentation/translations/sp_SP/process/kernel-docs.rst +++ b/Documentation/translations/sp_SP/process/kernel-docs.rst @@ -170,9 +170,8 @@ Recursos varios * Título: **linux-kernel mailing list archives and search engines** - :URL: http://vger.kernel.org/vger-lists.html - :URL: http://www.uwsg.indiana.edu/hypermail/linux/kernel/index.html - :URL: http://groups.google.com/group/mlist.linux.kernel + :URL: https://subspace.kernel.org + :URL: https://lore.kernel.org :Palabras Clave: linux-kernel, archives, buscar, search, archivos. :Descripción: Algunos de los archivadores de listas de correo del kernel de Linux. Si usted tiene uno mejor/otro, por favor hágamelo diff --git a/Documentation/translations/sp_SP/process/submitting-patches.rst b/Documentation/translations/sp_SP/process/submitting-patches.rst index 328ec80bd61d..ecb08b14c2c0 100644 --- a/Documentation/translations/sp_SP/process/submitting-patches.rst +++ b/Documentation/translations/sp_SP/process/submitting-patches.rst @@ -136,11 +136,11 @@ algo documentado en la web, referencie esto. Cuando se vincule a archivos de listas de correo, preferiblemente use el servicio de archivador de mensajes lore.kernel.org. Para crear la URL del -enlace, utilice el contenido del encabezado ("header") ``Message-Id`` del +enlace, utilice el contenido del encabezado ("header") ``Message-ID`` del mensaje sin los corchetes angulares que lo rodean. Por ejemplo:: - Link: https://lore.kernel.org/r/30th.anniversary.repost@klaava.Helsinki.FI/ + Link: https://lore.kernel.org/30th.anniversary.repost@klaava.Helsinki.FI Verifique el enlace para asegurarse de que realmente funciona y apunta al mensaje correspondiente. @@ -257,10 +257,10 @@ archivo MAINTAINERS una lista específica de los subsistemas; su parche probablemente recibirá más atención allí. Sin embargo, no envíe spam a listas no relacionadas. -Muchas listas relacionadas con el kernel están alojadas en vger.kernel.org; +Muchas listas relacionadas con el kernel están alojadas en kernel.org; puedes encontrar un listado de estas en -http://vger.kernel.org/vger-lists.html. Existen listas relacionadas con el -kernel alojadas en otros lugares, no obstante. +https://subspace.kernel.org. Existen listas relacionadas con el kernel +alojadas en otros lugares, no obstante. ¡No envíe más de 15 parches a la vez a las listas de correo de vger! @@ -907,9 +907,6 @@ Referencias -NO!!!! Gente, no mas bombas enormes de parches a linux-kernel@vger.kernel.org! - - Kernel Documentation/process/coding-style.rst Email de Linus Torvalds sobre la forma canónica de los parches: -- cgit v1.2.3 From 43e9076a00b17cf8115b4bd4d3b2be33a44245ca Mon Sep 17 00:00:00 2001 From: Ammar Askar Date: Tue, 18 Mar 2025 19:53:31 -0400 Subject: docs: Fix conflicting contributor identity info In commit d4563201f33a ("Documentation: simplify and clarify DCO contribution example language"), the patch submission documentation was updated to remove the note about pseudonyms and instead simplify it to allow "known identities". The process documentation still explicitly prohibits pseudonymous contributors. This patch changes the process documentation to line up with the submitting patches document. Signed-off-by: Ammar Askar Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/20250318235331.3566174-1-ammar@ammaraskar.com --- Documentation/process/1.Intro.rst | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/process/1.Intro.rst b/Documentation/process/1.Intro.rst index c3d0270bbfb3..25ca49f7ae4d 100644 --- a/Documentation/process/1.Intro.rst +++ b/Documentation/process/1.Intro.rst @@ -251,12 +251,12 @@ there is no prospect of a migration to version 3 of the GPL in the foreseeable future. It is imperative that all code contributed to the kernel be legitimately -free software. For that reason, code from anonymous (or pseudonymous) -contributors will not be accepted. All contributors are required to "sign -off" on their code, stating that the code can be distributed with the -kernel under the GPL. Code which has not been licensed as free software by -its owner, or which risks creating copyright-related problems for the -kernel (such as code which derives from reverse-engineering efforts lacking +free software. For that reason, code from contributors without a known +identity or anonymous contributors will not be accepted. All contributors are +required to "sign off" on their code, stating that the code can be distributed +with the kernel under the GPL. Code which has not been licensed as free +software by its owner, or which risks creating copyright-related problems for +the kernel (such as code which derives from reverse-engineering efforts lacking proper safeguards) cannot be contributed. Questions about copyright-related issues are common on Linux development -- cgit v1.2.3 From 9fe5a0790af6af619940a2819aabe8f6fb30700c Mon Sep 17 00:00:00 2001 From: Inochi Amaoto Date: Mon, 14 Apr 2025 06:49:12 +0800 Subject: dt-bindings: interrupt-controller: Add Sophgo SG2044 MSI controller Like SG2042, SG2044 also uses an external MSI controller to provide MSI interrupt for PCIe controllers. The difference between these two MSI controllers are: 1. SG2044 acks the interrupt by writing 0, SG2042 by setting the bit related to the interrupt. 2. SG2044 uses interrupt number modulo 32 as MSI message data, but SG2042 uses the bit related to the interrupt. Add support for the SG2044 MSI controller. Signed-off-by: Inochi Amaoto Signed-off-by: Thomas Gleixner Tested-by: Chen Wang # SG2042 Reviewed-by: Chen Wang Acked-by: Conor Dooley Link: https://lore.kernel.org/all/20250413224922.69719-2-inochiama@gmail.com --- .../devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml index e1ffd55fa7bf..f6b8b1d92f79 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml @@ -18,7 +18,9 @@ allOf: properties: compatible: - const: sophgo,sg2042-msi + enum: + - sophgo,sg2042-msi + - sophgo,sg2044-msi reg: items: -- cgit v1.2.3 From 097f171f98289cf737437599c40b0d1e81266e9e Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Wed, 9 Apr 2025 18:42:46 -0700 Subject: net: convert dev->rtnl_link_state to a bool netdevice reg_state was split into two 16 bit enums back in 2010 in commit a2835763e130 ("rtnetlink: handle rtnl_link netlink notifications manually"). Since the split the fields have been moved apart, and last year we converted reg_state to a normal u8 in commit 4d42b37def70 ("net: convert dev->reg_state to u8"). rtnl_link_state being a 16 bitfield makes no sense. Convert it to a single bool, it seems very unlikely after 15 years that we'll need more values in it. We could drop dev->rtnl_link_ops from the conditions but feels like having it there more clearly points at the reason for this hack. Acked-by: Stanislav Fomichev Link: https://patch.msgid.link/20250410014246.780885-1-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/networking/net_cachelines/net_device.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/networking/net_cachelines/net_device.rst b/Documentation/networking/net_cachelines/net_device.rst index 6327e689e8a8..ca8605eb82ff 100644 --- a/Documentation/networking/net_cachelines/net_device.rst +++ b/Documentation/networking/net_cachelines/net_device.rst @@ -131,7 +131,7 @@ struct ref_tracker_dir refcnt_tracker struct list_head link_watch_list enum:8 reg_state bool dismantle -enum:16 rtnl_link_state +bool rtnl_link_initilizing bool needs_free_netdev void*priv_destructor struct net_device struct netpoll_info* npinfo read_mostly napi_poll/napi_poll_lock -- cgit v1.2.3 From f9c1120d9b5e65ded82dccb7ebf22bc9739419b0 Mon Sep 17 00:00:00 2001 From: Siddharth Vadapalli Date: Fri, 11 Apr 2025 11:39:16 +0530 Subject: dt-bindings: net: ethernet-controller: add 5000M speed to fixed-link A link speed of 5000 Mbps is a valid speed for a fixed-link mode of operation. Hence, update the bindings to include the same. Signed-off-by: Siddharth Vadapalli Reviewed-by: Andrew Lunn Link: https://patch.msgid.link/20250411060917.633769-2-s-vadapalli@ti.com Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/ethernet-controller.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml index 45819b235800..61e51ea58a98 100644 --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -197,7 +197,7 @@ properties: description: Link speed. $ref: /schemas/types.yaml#/definitions/uint32 - enum: [10, 100, 1000, 2500, 10000] + enum: [10, 100, 1000, 2500, 5000, 10000] full-duplex: $ref: /schemas/types.yaml#/definitions/flag -- cgit v1.2.3 From 8b36a102c1a17d8dabc846e3ded41fe17e9ad4e2 Mon Sep 17 00:00:00 2001 From: Siddharth Vadapalli Date: Fri, 11 Apr 2025 11:39:17 +0530 Subject: dt-bindings: net: ti: k3-am654-cpsw-nuss: evaluate fixed-link property Since the fixed-link (phyless) mode of operation is supported by the CPSW MAC, include "fixed-link" in the set of properties to be evaluated. Signed-off-by: Siddharth Vadapalli Link: https://patch.msgid.link/20250411060917.633769-3-s-vadapalli@ti.com Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml index b11894fbaec4..7b3d948f187d 100644 --- a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml +++ b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml @@ -143,6 +143,8 @@ properties: label: description: label associated with this port + fixed-link: true + ti,mac-only: $ref: /schemas/types.yaml#/definitions/flag description: -- cgit v1.2.3 From 28a79fc9b03e4ed89b65e5300091e7ed55e13192 Mon Sep 17 00:00:00 2001 From: David Howells Date: Fri, 11 Apr 2025 10:52:46 +0100 Subject: rxrpc: kdoc: Update function descriptions and add link from rxrpc.rst Update the kerneldoc function descriptions to add "Return:" sections for AF_RXRPC exported functions that have return values to stop the kdoc builder from throwing warnings. Also add links from the rxrpc.rst API doc to add a function API reference at the end. (Note that the API doc really needs updating, but that's beyond this patchset). Signed-off-by: David Howells cc: Marc Dionne cc: Simon Horman cc: linux-afs@lists.infradead.org Link: https://patch.msgid.link/20250411095303.2316168-2-dhowells@redhat.com Signed-off-by: Jakub Kicinski --- Documentation/networking/rxrpc.rst | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/rxrpc.rst b/Documentation/networking/rxrpc.rst index e807e18ba32a..2680abd1cb26 100644 --- a/Documentation/networking/rxrpc.rst +++ b/Documentation/networking/rxrpc.rst @@ -1172,3 +1172,14 @@ adjusted through sysctls in /proc/net/rxrpc/: header plus exactly 1412 bytes of data. The terminal packet must contain a four byte header plus any amount of data. In any event, a jumbo packet may not exceed rxrpc_rx_mtu in size. + + +API Function Reference +====================== + +.. kernel-doc:: net/rxrpc/af_rxrpc.c +.. kernel-doc:: net/rxrpc/key.c +.. kernel-doc:: net/rxrpc/peer_object.c +.. kernel-doc:: net/rxrpc/recvmsg.c +.. kernel-doc:: net/rxrpc/sendmsg.c +.. kernel-doc:: net/rxrpc/server_key.c -- cgit v1.2.3 From 5800b1cf3fd8ccab752a101865be1e76dac33142 Mon Sep 17 00:00:00 2001 From: David Howells Date: Fri, 11 Apr 2025 10:52:49 +0100 Subject: rxrpc: Allow CHALLENGEs to the passed to the app for a RESPONSE Allow the app to request that CHALLENGEs be passed to it through an out-of-band queue that allows recvmsg() to pick it up so that the app can add data to it with sendmsg(). This will allow the application (AFS or userspace) to interact with the process if it wants to and put values into user-defined fields. This will be used by AFS when talking to a fileserver to supply that fileserver with a crypto key by which callback RPCs can be encrypted (ie. notifications from the fileserver to the client). Signed-off-by: David Howells cc: Marc Dionne cc: Simon Horman cc: linux-afs@lists.infradead.org Link: https://patch.msgid.link/20250411095303.2316168-5-dhowells@redhat.com Signed-off-by: Jakub Kicinski --- Documentation/networking/rxrpc.rst | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/rxrpc.rst b/Documentation/networking/rxrpc.rst index 2680abd1cb26..eb941b2577dd 100644 --- a/Documentation/networking/rxrpc.rst +++ b/Documentation/networking/rxrpc.rst @@ -1179,7 +1179,9 @@ API Function Reference .. kernel-doc:: net/rxrpc/af_rxrpc.c .. kernel-doc:: net/rxrpc/key.c +.. kernel-doc:: net/rxrpc/oob.c .. kernel-doc:: net/rxrpc/peer_object.c .. kernel-doc:: net/rxrpc/recvmsg.c +.. kernel-doc:: net/rxrpc/rxkad.c .. kernel-doc:: net/rxrpc/sendmsg.c .. kernel-doc:: net/rxrpc/server_key.c -- cgit v1.2.3 From 9d1d2b59341f58126a69b51f9f5f8ccb9f12e54a Mon Sep 17 00:00:00 2001 From: David Howells Date: Fri, 11 Apr 2025 10:52:53 +0100 Subject: rxrpc: rxgk: Implement the yfs-rxgk security class (GSSAPI) Implement the basic parts of the yfs-rxgk security class (security index 6) to support GSSAPI-negotiated security. Signed-off-by: David Howells cc: Marc Dionne cc: Herbert Xu cc: Chuck Lever cc: Simon Horman cc: linux-afs@lists.infradead.org Link: https://patch.msgid.link/20250411095303.2316168-9-dhowells@redhat.com Signed-off-by: Jakub Kicinski --- Documentation/networking/rxrpc.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/networking/rxrpc.rst b/Documentation/networking/rxrpc.rst index eb941b2577dd..a01f0c81ca4b 100644 --- a/Documentation/networking/rxrpc.rst +++ b/Documentation/networking/rxrpc.rst @@ -1182,6 +1182,7 @@ API Function Reference .. kernel-doc:: net/rxrpc/oob.c .. kernel-doc:: net/rxrpc/peer_object.c .. kernel-doc:: net/rxrpc/recvmsg.c +.. kernel-doc:: net/rxrpc/rxgk.c .. kernel-doc:: net/rxrpc/rxkad.c .. kernel-doc:: net/rxrpc/sendmsg.c .. kernel-doc:: net/rxrpc/server_key.c -- cgit v1.2.3 From d03539d5c2dec9b028297c15e57bd3c01d0d9c0d Mon Sep 17 00:00:00 2001 From: David Howells Date: Fri, 11 Apr 2025 10:52:56 +0100 Subject: rxrpc: Display security params in the afs_cb_call tracepoint Make the afs_cb_call tracepoint display some security parameters to make debugging easier. Signed-off-by: David Howells cc: Marc Dionne cc: Simon Horman cc: linux-afs@lists.infradead.org Link: https://patch.msgid.link/20250411095303.2316168-12-dhowells@redhat.com Signed-off-by: Jakub Kicinski --- Documentation/networking/rxrpc.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/networking/rxrpc.rst b/Documentation/networking/rxrpc.rst index a01f0c81ca4b..fe2ea73be441 100644 --- a/Documentation/networking/rxrpc.rst +++ b/Documentation/networking/rxrpc.rst @@ -1178,6 +1178,7 @@ API Function Reference ====================== .. kernel-doc:: net/rxrpc/af_rxrpc.c +.. kernel-doc:: net/rxrpc/call_object.c .. kernel-doc:: net/rxrpc/key.c .. kernel-doc:: net/rxrpc/oob.c .. kernel-doc:: net/rxrpc/peer_object.c -- cgit v1.2.3 From 98a4109320f9b7007475a9d6706d3434cd8aafb4 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 10 Apr 2025 16:39:57 +0200 Subject: dt-bindings: memory: mtk-smi: Add support for MT6893 Add support for the Smart Multimedia Interface's Common and Local Arbiter HW as found in the MediaTek Dimensity 1200 (MT6893) SoC. Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250410143958.475846-2-angelogioacchino.delregno@collabora.com Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/memory-controllers/mediatek,smi-common.yaml | 1 + .../devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml | 1 + 2 files changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml index 2f36ac23604c..0762e0ff66ef 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml @@ -33,6 +33,7 @@ properties: - mediatek,mt2712-smi-common - mediatek,mt6779-smi-common - mediatek,mt6795-smi-common + - mediatek,mt6893-smi-common - mediatek,mt8167-smi-common - mediatek,mt8173-smi-common - mediatek,mt8183-smi-common diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml index 2381660b324c..2e7fac4b5094 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml @@ -21,6 +21,7 @@ properties: - mediatek,mt2712-smi-larb - mediatek,mt6779-smi-larb - mediatek,mt6795-smi-larb + - mediatek,mt6893-smi-larb - mediatek,mt8167-smi-larb - mediatek,mt8173-smi-larb - mediatek,mt8183-smi-larb -- cgit v1.2.3 From 2971de063fa56c18b2720ab19bdebca23cd96471 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 18 Dec 2024 11:53:18 +0100 Subject: dt-bindings: display: mediatek: Add compatibles for MT8188 MDP3 Add compatible strings for the AAL, COLOR, MERGE and PADDING hardware components found in MediaTek's MT8188 SoC. This hardware is compatible with MT8195. Acked-by: Nicolas Dufresne Acked-by: Chun-Kuang Hu Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20241218105320.38980-2-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno --- .../devicetree/bindings/display/mediatek/mediatek,aal.yaml | 4 ++++ .../devicetree/bindings/display/mediatek/mediatek,color.yaml | 4 ++++ .../devicetree/bindings/display/mediatek/mediatek,merge.yaml | 4 ++++ .../devicetree/bindings/display/mediatek/mediatek,padding.yaml | 10 +++++++--- 4 files changed, 19 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml index 5d2089dc596e..daf90ebb39bf 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml @@ -25,6 +25,10 @@ properties: - mediatek,mt8173-disp-aal - mediatek,mt8183-disp-aal - mediatek,mt8195-mdp3-aal + - items: + - enum: + - mediatek,mt8188-mdp3-aal + - const: mediatek,mt8195-mdp3-aal - items: - enum: - mediatek,mt2712-disp-aal diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml index 6160439ce4d7..5564f4063317 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml @@ -27,6 +27,10 @@ properties: - mediatek,mt8167-disp-color - mediatek,mt8173-disp-color - mediatek,mt8195-mdp3-color + - items: + - enum: + - mediatek,mt8188-mdp3-color + - const: mediatek,mt8195-mdp3-color - items: - enum: - mediatek,mt7623-disp-color diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml index 0de9f64f3f84..3798a25402d3 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml @@ -25,6 +25,10 @@ properties: - mediatek,mt8173-disp-merge - mediatek,mt8195-disp-merge - mediatek,mt8195-mdp3-merge + - items: + - enum: + - mediatek,mt8188-mdp3-merge + - const: mediatek,mt8195-mdp3-merge - items: - const: mediatek,mt6795-disp-merge - const: mediatek,mt8173-disp-merge diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml index be07bbdc54e3..86787866ced0 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml @@ -20,9 +20,13 @@ description: properties: compatible: - enum: - - mediatek,mt8188-disp-padding - - mediatek,mt8195-mdp3-padding + oneOf: + - enum: + - mediatek,mt8188-disp-padding + - mediatek,mt8195-mdp3-padding + - items: + - const: mediatek,mt8188-mdp3-padding + - const: mediatek,mt8195-mdp3-padding reg: maxItems: 1 -- cgit v1.2.3 From cfb00dfa1b778a8037faf6973cca226e5ad4f45a Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 18 Dec 2024 11:53:19 +0100 Subject: dt-bindings: media: mediatek: mdp3: Add compatibles for MT8188 MDP3 Add compatible strings for the FG, HDR, RSZ, STITCH, TCC, TDSHP and WROT hardware components found in MediaTek's MT8188 SoC. This hardware is compatible with MT8195. Acked-by: Nicolas Dufresne Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20241218105320.38980-3-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml | 8 ++++++-- Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml | 8 ++++++-- Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml | 1 + Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml | 8 ++++++-- Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml | 8 ++++++-- Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml | 8 ++++++-- Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml | 1 + 7 files changed, 32 insertions(+), 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml index 03f31b009085..40fda59fa8a8 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml @@ -16,8 +16,12 @@ description: properties: compatible: - enum: - - mediatek,mt8195-mdp3-fg + oneOf: + - enum: + - mediatek,mt8195-mdp3-fg + - items: + - const: mediatek,mt8188-mdp3-fg + - const: mediatek,mt8195-mdp3-fg reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml index d4609bba6578..d9f926c20220 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml @@ -16,8 +16,12 @@ description: properties: compatible: - enum: - - mediatek,mt8195-mdp3-hdr + oneOf: + - enum: + - mediatek,mt8195-mdp3-hdr + - items: + - const: mediatek,mt8188-mdp3-hdr + - const: mediatek,mt8195-mdp3-hdr reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml index f5676bec4326..8124c39d73e9 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml @@ -20,6 +20,7 @@ properties: - mediatek,mt8183-mdp3-rsz - items: - enum: + - mediatek,mt8188-mdp3-rsz - mediatek,mt8195-mdp3-rsz - const: mediatek,mt8183-mdp3-rsz diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml index d815bea29154..1d8e7e202c42 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml @@ -16,8 +16,12 @@ description: properties: compatible: - enum: - - mediatek,mt8195-mdp3-stitch + oneOf: + - enum: + - mediatek,mt8195-mdp3-stitch + - items: + - const: mediatek,mt8188-mdp3-stitch + - const: mediatek,mt8195-mdp3-stitch reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml index 14ea556d4f82..6cff7c073ce4 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml @@ -17,8 +17,12 @@ description: properties: compatible: - enum: - - mediatek,mt8195-mdp3-tcc + oneOf: + - enum: + - mediatek,mt8195-mdp3-tcc + - items: + - const: mediatek,mt8188-mdp3-tcc + - const: mediatek,mt8195-mdp3-tcc reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml index 8ab7f2d8e148..cdfa27324738 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml @@ -16,8 +16,12 @@ description: properties: compatible: - enum: - - mediatek,mt8195-mdp3-tdshp + oneOf: + - enum: + - mediatek,mt8195-mdp3-tdshp + - items: + - const: mediatek,mt8188-mdp3-tdshp + - const: mediatek,mt8195-mdp3-tdshp reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml index 53a679338402..b6269f4f9fd6 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml @@ -20,6 +20,7 @@ properties: - mediatek,mt8183-mdp3-wrot - items: - enum: + - mediatek,mt8188-mdp3-wrot - mediatek,mt8195-mdp3-wrot - const: mediatek,mt8183-mdp3-wrot -- cgit v1.2.3 From 136fa80169c63130d5ce3c24ab8045c59e684e4f Mon Sep 17 00:00:00 2001 From: Xianwei Zhao Date: Thu, 3 Apr 2025 16:33:14 +0800 Subject: dt-bindings: pinctl: amlogic,pinctrl-a4: Add compatible string for A5 Amlogic A5 SoCs uses the same pintrl controller as A4 SoCs. There is no need for an extra compatible line in the driver, but add A5 compatible line for documentation. Acked-by: Conor Dooley Signed-off-by: Xianwei Zhao Link: https://lore.kernel.org/20250403-a5-pinctrl-v3-1-a8c067e22295@amlogic.com Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml index 8eb50cad61d5..c36b6fe377ad 100644 --- a/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml +++ b/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml @@ -14,7 +14,12 @@ allOf: properties: compatible: - const: amlogic,pinctrl-a4 + oneOf: + - const: amlogic,pinctrl-a4 + - items: + - enum: + - amlogic,pinctrl-a5 + - const: amlogic,pinctrl-a4 "#address-cells": const: 2 -- cgit v1.2.3 From 336bac5e0892d0a24b55e7569981e641b23aef9a Mon Sep 17 00:00:00 2001 From: "Ritesh Harjani (IBM)" Date: Sat, 12 Apr 2025 10:06:34 +0530 Subject: Documentation: iomap: Add missing flags description Let's document the use of these flags in iomap design doc where other flags are defined too - - IOMAP_F_BOUNDARY was added by XFS to prevent merging of I/O and I/O completions across RTG boundaries. - IOMAP_F_ATOMIC_BIO was added for supporting atomic I/O operations for filesystems to inform the iomap that it needs HW-offload based mechanism for torn-write protection. While we are at it, let's also fix the description of IOMAP_F_PRIVATE flag after a recent: commit 923936efeb74b3 ("iomap: Fix conflicting values of iomap flags") Signed-off-by: "Ritesh Harjani (IBM)" Link: https://lore.kernel.org/8d8534a704c4f162f347a84830710db32a927b2e.1744432270.git.ritesh.list@gmail.com Reviewed-by: "Darrick J. Wong" Signed-off-by: Christian Brauner --- Documentation/filesystems/iomap/design.rst | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/iomap/design.rst b/Documentation/filesystems/iomap/design.rst index e29651a42eec..f2df9b6df988 100644 --- a/Documentation/filesystems/iomap/design.rst +++ b/Documentation/filesystems/iomap/design.rst @@ -243,13 +243,25 @@ The fields are as follows: regular file data. This is only useful for FIEMAP. - * **IOMAP_F_PRIVATE**: Starting with this value, the upper bits can - be set by the filesystem for its own purposes. + * **IOMAP_F_BOUNDARY**: This indicates I/O and its completion must not be + merged with any other I/O or completion. Filesystems must use this when + submitting I/O to devices that cannot handle I/O crossing certain LBAs + (e.g. ZNS devices). This flag applies only to buffered I/O writeback; all + other functions ignore it. + + * **IOMAP_F_PRIVATE**: This flag is reserved for filesystem private use. * **IOMAP_F_ANON_WRITE**: Indicates that (write) I/O does not have a target block assigned to it yet and the file system will do that in the bio submission handler, splitting the I/O as needed. + * **IOMAP_F_ATOMIC_BIO**: This indicates write I/O must be submitted with the + ``REQ_ATOMIC`` flag set in the bio. Filesystems need to set this flag to + inform iomap that the write I/O operation requires torn-write protection + based on HW-offload mechanism. They must also ensure that mapping updates + upon the completion of the I/O must be performed in a single metadata + update. + These flags can be set by iomap itself during file operations. The filesystem should supply an ``->iomap_end`` function if it needs to observe these flags: -- cgit v1.2.3 From 8f20a2bfa4b7a2ddfd4890ca220012cbe263c97f Mon Sep 17 00:00:00 2001 From: Mohsin Bashir Date: Thu, 10 Apr 2025 00:08:56 -0700 Subject: eth: fbnic: add coverage for hw queue stats This patch provides support for hardware queue stats and covers packet errors for RX-DMA engine, RCQ drops and BDQ drops. The packet errors are also aggregated with the `rx_errors` stats in the `rtnl_link_stats` as well as with the `hw_drops` in the queue API. The RCQ and BDQ drops are aggregated with `rx_over_errors` in the `rtnl_link_stats` as well as with the `hw_drop_overruns` in the queue API. ethtool -S eth0 | grep -E 'rde' rde_0_pkt_err: 0 rde_0_pkt_cq_drop: 0 rde_0_pkt_bdq_drop: 0 --- --- rde_127_pkt_err: 0 rde_127_pkt_cq_drop: 0 rde_127_pkt_bdq_drop: 0 Signed-off-by: Jakub Kicinski Signed-off-by: Mohsin Bashir Reviewed-by: Simon Horman Link: https://patch.msgid.link/20250410070859.4160768-3-mohsin.bashr@gmail.com Signed-off-by: Paolo Abeni --- Documentation/networking/device_drivers/ethernet/meta/fbnic.rst | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst index 04e0595bb0a7..bc7f2fef2875 100644 --- a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst +++ b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst @@ -44,6 +44,15 @@ RPC (Rx parser) - ``rpc_out_of_hdr_err``: frames where header was larger than parsable region - ``ovr_size_err``: oversized frames +Hardware Queues +~~~~~~~~~~~~~~~ + +1. RX DMA Engine: + + - ``rde_[i]_pkt_err``: packets with MAC EOP, RPC parser, RXB truncation, or RDE frame truncation errors. These error are flagged in the packet metadata because of cut-through support but the actual drop happens once PCIE/RDE is reached. + - ``rde_[i]_pkt_cq_drop``: packets dropped because RCQ is full + - ``rde_[i]_pkt_bdq_drop``: packets dropped because HPQ or PPQ ran out of host buffer + PCIe ~~~~ -- cgit v1.2.3 From 986c63a0295e498b2afb38c6e969a3e0b41455d6 Mon Sep 17 00:00:00 2001 From: Mohsin Bashir Date: Thu, 10 Apr 2025 00:08:57 -0700 Subject: eth: fbnic: add coverage for RXB stats This patch provides coverage to the RXB (RX Buffer) stats. RXB stats are divided into 3 sections: RXB enqueue, RXB FIFO, and RXB dequeue stats. The RXB enqueue/dequeue stats are indexed from 0-3 and cater for the input/output counters whereas, the RXB fifo stats are indexed from 0-7. The RXB also supports pause frame stats counters which we are leaving for a later patch. ethtool -S eth0 | grep rxb rxb_integrity_err0: 0 rxb_mac_err0: 0 rxb_parser_err0: 0 rxb_frm_err0: 0 rxb_drbo0_frames: 1433543 rxb_drbo0_bytes: 775949081 --- --- rxb_intf3_frames: 1195711 rxb_intf3_bytes: 739650210 rxb_pbuf3_frames: 1195711 rxb_pbuf3_bytes: 765948092 Signed-off-by: Jakub Kicinski Signed-off-by: Mohsin Bashir Reviewed-by: Simon Horman Link: https://patch.msgid.link/20250410070859.4160768-4-mohsin.bashr@gmail.com Signed-off-by: Paolo Abeni --- .../device_drivers/ethernet/meta/fbnic.rst | 26 ++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst index bc7f2fef2875..8ba94ae95db9 100644 --- a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst +++ b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst @@ -31,6 +31,32 @@ separate entry. Statistics ---------- +RXB (RX Buffer) Enqueue +~~~~~~~~~~~~~~~~~~~~~~~ + + - ``rxb_integrity_err[i]``: frames enqueued with integrity errors (e.g., multi-bit ECC errors) on RXB input i + - ``rxb_mac_err[i]``: frames enqueued with MAC end-of-frame errors (e.g., bad FCS) on RXB input i + - ``rxb_parser_err[i]``: frames experienced RPC parser errors + - ``rxb_frm_err[i]``: frames experienced signaling errors (e.g., missing end-of-packet/start-of-packet) on RXB input i + - ``rxb_drbo[i]_frames``: frames received at RXB input i + - ``rxb_drbo[i]_bytes``: bytes received at RXB input i + +RXB (RX Buffer) FIFO +~~~~~~~~~~~~~~~~~~~~ + + - ``rxb_fifo[i]_drop``: transitions into the drop state on RXB pool i + - ``rxb_fifo[i]_dropped_frames``: frames dropped on RXB pool i + - ``rxb_fifo[i]_ecn``: transitions into the ECN mark state on RXB pool i + - ``rxb_fifo[i]_level``: current occupancy of RXB pool i + +RXB (RX Buffer) Dequeue +~~~~~~~~~~~~~~~~~~~~~~~ + + - ``rxb_intf[i]_frames``: frames sent to the output i + - ``rxb_intf[i]_bytes``: bytes sent to the output i + - ``rxb_pbuf[i]_frames``: frames sent to output i from the perspective of internal packet buffer + - ``rxb_pbuf[i]_bytes``: bytes sent to output i from the perspective of internal packet buffer + RPC (Rx parser) ~~~~~~~~~~~~~~~ -- cgit v1.2.3 From 5f8bd2ce8269b055accc1653609186c9c3beb102 Mon Sep 17 00:00:00 2001 From: Mohsin Bashir Date: Thu, 10 Apr 2025 00:08:58 -0700 Subject: eth: fbnic: add support for TMI stats This patch add coverage for TMI stats including PTP stats and drop stats. PTP stats include illegal requests, bad timestamp and good timestamps. The bad timestamp and illegal request counters are reported under as `error` via `ethtool -T` Both these counters are individually being reported via `ethtool -S` The good timestamp stats are being reported as `pkts` via `ethtool -T` ethtool -S eth0 | grep "ptp" ptp_illegal_req: 0 ptp_good_ts: 0 ptp_bad_ts: 0 Signed-off-by: Jakub Kicinski Signed-off-by: Mohsin Bashir Reviewed-by: Simon Horman Link: https://patch.msgid.link/20250410070859.4160768-5-mohsin.bashr@gmail.com Signed-off-by: Paolo Abeni --- Documentation/networking/device_drivers/ethernet/meta/fbnic.rst | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst index 8ba94ae95db9..02339818cb8d 100644 --- a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst +++ b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst @@ -31,6 +31,13 @@ separate entry. Statistics ---------- +TX MAC Interface +~~~~~~~~~~~~~~~~ + + - ``ptp_illegal_req``: packets sent to the NIC with PTP request bit set but routed to BMC/FW + - ``ptp_good_ts``: packets successfully routed to MAC with PTP request bit set + - ``ptp_bad_ts``: packets destined for MAC with PTP request bit set but aborted because of some error (e.g., DMA read error) + RXB (RX Buffer) Enqueue ~~~~~~~~~~~~~~~~~~~~~~~ -- cgit v1.2.3 From f2957147ae7a1780217bb2f7b29f4d9ae14ef4b8 Mon Sep 17 00:00:00 2001 From: Mohsin Bashir Date: Thu, 10 Apr 2025 00:08:59 -0700 Subject: eth: fbnic: add support for TTI HW stats Add coverage for the TX Extension (TEI) Interface (TTI) stats. We are tracking packets and control message drops because of credit exhaustion on the TX interface. Signed-off-by: Jakub Kicinski Signed-off-by: Mohsin Bashir Reviewed-by: Simon Horman Link: https://patch.msgid.link/20250410070859.4160768-6-mohsin.bashr@gmail.com Signed-off-by: Paolo Abeni --- Documentation/networking/device_drivers/ethernet/meta/fbnic.rst | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst index 02339818cb8d..3483e498c08e 100644 --- a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst +++ b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst @@ -38,6 +38,13 @@ TX MAC Interface - ``ptp_good_ts``: packets successfully routed to MAC with PTP request bit set - ``ptp_bad_ts``: packets destined for MAC with PTP request bit set but aborted because of some error (e.g., DMA read error) +TX Extension (TEI) Interface (TTI) +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + - ``tti_cm_drop``: control messages dropped at the TX Extension (TEI) Interface because of credit starvation + - ``tti_frame_drop``: packets dropped at the TX Extension (TEI) Interface because of credit starvation + - ``tti_tbi_drop``: packets dropped at the TX BMC Interface (TBI) because of credit starvation + RXB (RX Buffer) Enqueue ~~~~~~~~~~~~~~~~~~~~~~~ -- cgit v1.2.3 From 289198fb51420def0f6fa88ed5808d0d38120ad0 Mon Sep 17 00:00:00 2001 From: Raviteja Laggyshetty Date: Tue, 15 Apr 2025 09:53:37 +0000 Subject: dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P Add Epoch Subsystem (EPSS) L3 interconnect provider binding on SA8775P SoCs. The L3 instance on the SA8775P SoC is similar to those on SoCs like SM8250 and SC7280. These SoCs use the PERF register instead of L3_REG for programming the performance level, which is managed in the data associated with the target-specific compatibles. Since the hardware remains the same across all EPSS-supporting SoCs, the generic compatible is retained for all SoCs. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Raviteja Laggyshetty Link: https://lore.kernel.org/r/20250415095343.32125-2-quic_rlaggysh@quicinc.com Signed-off-by: Georgi Djakov --- Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml index 4ac0863205b3..cd4bb912e0dc 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml @@ -28,6 +28,7 @@ properties: - const: qcom,osm-l3 - items: - enum: + - qcom,sa8775p-epss-l3 - qcom,sc7280-epss-l3 - qcom,sc8280xp-epss-l3 - qcom,sm6375-cpucp-l3 -- cgit v1.2.3 From 2c01d90998598b5f48b4ccdfdd3e7d407d094613 Mon Sep 17 00:00:00 2001 From: Matt Coster Date: Thu, 10 Apr 2025 10:55:00 +0100 Subject: dt-bindings: gpu: img: Future-proofing enhancements The first compatible strings added for the AXE-1-16M are not sufficient to accurately describe all the IMG Rogue GPUs. The current "img,img-axe" string refers to the entire family of Series AXE GPUs, but this is primarily a marketing term and does not denote a level of hardware similarity any greater than just "Rogue". The more specific "img,img-axe-1-16m" string refers to individual AXE-1-16M GPU. For example, unlike the rest of the Series AXE GPUs, the AXE-1-16M only uses a single power domain. The situation is actually slightly worse than described in the first paragraph, since many "series" (such as Series BXS found in the TI AM68 among others and added later in this series) contain cores with both Rogue and Volcanic architectures. Besides attempting to move away from vague groupings defined only by marketing terms, we want to draw a line between properties inherent to the IP core and choices made by the silicon vendor at integration time. For instance, the number of power domains is a property of the IP core, whereas the decision to use one or multiple clocks is a vendor one. In the original compatible strings, we must use "ti,am62-gpu" to constrain both of these properties since the number of power domains cannot be fixed for "img,img-axe". Work is currently underway to add support for volcanic-based Imagination GPUs, for which bindings will be added in "img,powervr-volcanic.yaml". As alluded to previously, the split between rogue and volcanic cores is non-obvious at times, so add a generic top-level "img,img-rogue" compatible string here to allow for simpler differentiation in devicetrees without referring back to the bindings. The currently supported GPU (AXE-1-16M) only requires a single power domain. Subsequent patches will add support for BXS-4-64 MC1, which has two power domains. Add infrastructure now to allow for this. Also allow the dma-coherent property to be added to IMG Rogue GPUs, which are DMA devices. The decision for coherency is made at integration time and this property should be applied wherever it accurately describes the vendor integration. Note that the new required properties for power domains are conditional on the new base compatible string to avoid an ABI break. Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-1-eda620c5865f@imgtec.com Signed-off-by: Matt Coster --- .../devicetree/bindings/gpu/img,powervr-rogue.yaml | 43 +++++++++++++++++++--- 1 file changed, 38 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml index 256e252f8087..e1056bf2af84 100644 --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml @@ -12,10 +12,23 @@ maintainers: properties: compatible: - items: - - enum: - - ti,am62-gpu - - const: img,img-axe # IMG AXE GPU model/revision is fully discoverable + oneOf: + - items: + - enum: + - ti,am62-gpu + - const: img,img-axe-1-16m + # This deprecated element must be kept around to allow old kernels to + # work with newer dts. + - const: img,img-axe + - const: img,img-rogue + + # This legacy combination of compatible strings was introduced early on + # before the more specific GPU identifiers were used. + - items: + - enum: + - ti,am62-gpu + - const: img,img-axe + deprecated: true reg: maxItems: 1 @@ -37,6 +50,12 @@ properties: power-domains: maxItems: 1 + power-domain-names: + items: + - const: a + + dma-coherent: true + required: - compatible - reg @@ -47,6 +66,18 @@ required: additionalProperties: false allOf: + # Constraints added alongside the new compatible strings that would otherwise + # create an ABI break. + - if: + properties: + compatible: + contains: + const: img,img-rogue + then: + required: + - power-domains + - power-domain-names + - if: properties: compatible: @@ -64,10 +95,12 @@ examples: #include gpu@fd00000 { - compatible = "ti,am62-gpu", "img,img-axe"; + compatible = "ti,am62-gpu", "img,img-axe-1-16m", "img,img-axe", + "img,img-rogue"; reg = <0x0fd00000 0x20000>; clocks = <&k3_clks 187 0>; clock-names = "core"; interrupts = ; power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>; + power-domain-names = "a"; }; -- cgit v1.2.3 From 86e3f3a694903bc77f6e80ed0de2c9384c5bb9be Mon Sep 17 00:00:00 2001 From: Matt Coster Date: Thu, 10 Apr 2025 10:55:01 +0100 Subject: dt-bindings: gpu: img: Add BXS-4-64 devicetree bindings Unlike AXE-1-16M, BXS-4-64 uses two power domains. Like the existing AXE-1-16M integration, BXS-4-64 uses the single clock integration in the TI k3-j721s2. Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-2-eda620c5865f@imgtec.com Signed-off-by: Matt Coster --- .../devicetree/bindings/gpu/img,powervr-rogue.yaml | 38 ++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml index e1056bf2af84..0fb2cd939aa4 100644 --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml @@ -21,6 +21,11 @@ properties: # work with newer dts. - const: img,img-axe - const: img,img-rogue + - items: + - enum: + - ti,j721s2-gpu + - const: img,img-bxs-4-64 + - const: img,img-rogue # This legacy combination of compatible strings was introduced early on # before the more specific GPU identifiers were used. @@ -48,11 +53,14 @@ properties: maxItems: 1 power-domains: - maxItems: 1 + minItems: 1 + maxItems: 2 power-domain-names: items: - const: a + - const: b + minItems: 1 dma-coherent: true @@ -82,7 +90,33 @@ allOf: properties: compatible: contains: - const: ti,am62-gpu + const: img,img-axe-1-16m + then: + properties: + power-domains: + maxItems: 1 + power-domain-names: + maxItems: 1 + + - if: + properties: + compatible: + contains: + const: img,img-bxs-4-64 + then: + properties: + power-domains: + minItems: 2 + power-domain-names: + minItems: 2 + + - if: + properties: + compatible: + contains: + enum: + - ti,am62-gpu + - ti,j721s2-gpu then: properties: clocks: -- cgit v1.2.3 From 7dbd93137153dac561c74f4aa80d9280486011e7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=2E=20Neusch=C3=A4fer?= Date: Tue, 8 Apr 2025 21:13:12 +0200 Subject: dt-bindings: net: wireless: Add Realtek RTL8188ETV USB WiFi MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is an on-board USB device that requires a 3.3V supply. Signed-off-by: J. Neuschäfer Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250408-rtl-onboard-v2-1-0b6730b90e31@posteo.net Signed-off-by: Greg Kroah-Hartman --- .../bindings/net/wireless/realtek,rtl8188e.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/wireless/realtek,rtl8188e.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/wireless/realtek,rtl8188e.yaml b/Documentation/devicetree/bindings/net/wireless/realtek,rtl8188e.yaml new file mode 100644 index 000000000000..2769731e0708 --- /dev/null +++ b/Documentation/devicetree/bindings/net/wireless/realtek,rtl8188e.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/wireless/realtek,rtl8188e.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek RTL8188E USB WiFi + +maintainers: + - J. Neuschäfer + +description: + Realtek RTL8188E is a family of USB-connected 2.4 GHz WiFi modules. + +allOf: + - $ref: /schemas/usb/usb-device.yaml# + +properties: + compatible: + const: usbbda,179 # RTL8188ETV + + reg: true + + vdd-supply: + description: + Regulator for the 3V3 supply. + +required: + - compatible + - reg + - vdd-supply + +additionalProperties: false + +examples: + - | + #include + + usb { + #address-cells = <1>; + #size-cells = <0>; + + wifi: wifi@1 { + compatible = "usbbda,179"; + reg = <1>; + vdd-supply = <&vcc3v3>; + }; + }; + +... -- cgit v1.2.3 From 41c6960617b29ba16672d3ae607c7af0de24fe11 Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Sat, 12 Apr 2025 23:33:12 +0300 Subject: dt-bindings: usb: samsung,exynos-dwc3: add exynos2200 compatible The Exynos2200 SoC has a DWC3 compatible USB controller and can reuse the existing Exynos glue. Update the dt schema to include the samsung,exynos2200-dwusb3 compatible for it. Signed-off-by: Ivaylo Ivanov Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250412203313.738429-2-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/samsung,exynos-dwc3.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml b/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml index 256bee2a03ca..892545b477ac 100644 --- a/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml @@ -14,6 +14,7 @@ properties: oneOf: - enum: - google,gs101-dwusb3 + - samsung,exynos2200-dwusb3 - samsung,exynos5250-dwusb3 - samsung,exynos5433-dwusb3 - samsung,exynos7-dwusb3 @@ -79,6 +80,19 @@ allOf: required: - vdd10-supply + - if: + properties: + compatible: + contains: + const: samsung,exynos2200-dwusb3 + then: + properties: + clocks: + maxItems: 1 + clock-names: + items: + - const: link_aclk + - if: properties: compatible: -- cgit v1.2.3 From 6e762f7b8edc785405923d5dc002d2b76d4a9739 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Mon, 14 Apr 2025 20:21:51 -0500 Subject: dt-bindings: usb: Introduce qcom,snps-dwc3 The Qualcomm USB glue is not separate of the Synopsys DWC3 core and several of the snps,dwc3 properties (such as clocks and reset) conflicts in expectation with the Qualcomm integration. Using the newly split out Synopsys DWC3 core properties, describe the Qualcomm USB block in a single block. The new binding is a copy of qcom,dwc3 with the needed modifications. It would have been convenient to retain the two structures with the same compatibles, but as there exist no way to select a binding based on the absence of a subnode/patternProperty, a new generic compatible is introduced to describe this binding. To avoid redefining all the platform-specific compatibles, "select" is used to tell the DeviceTree validator which binding to use solely on the generic compatible. (Otherwise if the specific compatible matches during validation, the generic one must match as well) Mark qcom,dwc3 deprecated, to favor expressing future platforms using the new combined binding. Reviewed-by: Rob Herring (Arm) Tested-by: Neil Armstrong # on SM8650-QRD Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20250414-dwc3-refactor-v7-2-f015b358722d@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/qcom,dwc3.yaml | 13 +- .../devicetree/bindings/usb/qcom,snps-dwc3.yaml | 622 +++++++++++++++++++++ 2 files changed, 634 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index a681208616f3..a792434c59db 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -4,11 +4,22 @@ $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm SuperSpeed DWC3 USB SoC controller +title: Legacy Qualcomm SuperSpeed DWC3 USB SoC controller maintainers: - Wesley Cheng +# Use the combined qcom,snps-dwc3 instead +deprecated: true + +select: + properties: + compatible: + contains: + const: qcom,dwc3 + required: + - compatible + properties: compatible: items: diff --git a/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml new file mode 100644 index 000000000000..8dac5eba61b4 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml @@ -0,0 +1,622 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/qcom,snps-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SuperSpeed DWC3 USB SoC controller + +maintainers: + - Wesley Cheng + +description: + Describes the Qualcomm USB block, based on Synopsys DWC3. + +select: + properties: + compatible: + contains: + const: qcom,snps-dwc3 + required: + - compatible + +properties: + compatible: + items: + - enum: + - qcom,ipq4019-dwc3 + - qcom,ipq5018-dwc3 + - qcom,ipq5332-dwc3 + - qcom,ipq5424-dwc3 + - qcom,ipq6018-dwc3 + - qcom,ipq8064-dwc3 + - qcom,ipq8074-dwc3 + - qcom,ipq9574-dwc3 + - qcom,msm8953-dwc3 + - qcom,msm8994-dwc3 + - qcom,msm8996-dwc3 + - qcom,msm8998-dwc3 + - qcom,qcm2290-dwc3 + - qcom,qcs404-dwc3 + - qcom,qcs615-dwc3 + - qcom,qcs8300-dwc3 + - qcom,qdu1000-dwc3 + - qcom,sa8775p-dwc3 + - qcom,sar2130p-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sc8180x-dwc3 + - qcom,sc8180x-dwc3-mp + - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp + - qcom,sdm660-dwc3 + - qcom,sdm670-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 + - qcom,sm4250-dwc3 + - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 + - qcom,sm6350-dwc3 + - qcom,sm6375-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8350-dwc3 + - qcom,sm8450-dwc3 + - qcom,sm8550-dwc3 + - qcom,sm8650-dwc3 + - qcom,x1e80100-dwc3 + - const: qcom,snps-dwc3 + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + required-opps: + maxItems: 1 + + clocks: + description: | + Several clocks are used, depending on the variant. Typical ones are:: + - cfg_noc:: System Config NOC clock. + - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >= + 60MHz for HS operation. + - iface:: System bus AXI clock. + - sleep:: Sleep clock, used for wakeup when USB3 core goes into low + power mode (U3). + - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host + mode. Its frequency should be 19.2MHz. + minItems: 1 + maxItems: 9 + + clock-names: + minItems: 1 + maxItems: 9 + + dma-coherent: true + + iommus: + maxItems: 1 + + resets: + maxItems: 1 + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: usb-ddr + - const: apps-usb + + interrupts: + description: | + Different types of interrupts are used based on HS PHY used on target: + - dwc_usb3: Core DWC3 interrupt + - pwr_event: Used for wakeup based on other power events. + - hs_phy_irq: Apart from DP/DM/QUSB2 PHY interrupts, there is + hs_phy_irq which is not triggered by default and its + functionality is mutually exclusive to that of + {dp/dm}_hs_phy_irq and qusb2_phy_irq. + - qusb2_phy: SoCs with QUSB2 PHY do not have separate DP/DM IRQs and + expose only a single IRQ whose behavior can be modified + by the QUSB2PHY_INTR_CTRL register. The required DPSE/ + DMSE configuration is done in QUSB2PHY_INTR_CTRL register + of PHY address space. + - {dp/dm}_hs_phy_irq: These IRQ's directly reflect changes on the DP/ + DM pads of the SoC. These are used for wakeup + only on SoCs with non-QUSB2 targets with + exception of SDM670/SDM845/SM6350. + - ss_phy_irq: Used for remote wakeup in Super Speed mode of operation. + minItems: 3 + maxItems: 19 + + interrupt-names: + minItems: 3 + maxItems: 19 + + qcom,select-utmi-as-pipe-clk: + description: + If present, disable USB3 pipe_clk requirement. + Used when dwc3 operates without SSPHY and only + HS/FS/LS modes are supported. + type: boolean + + wakeup-source: true + +# Required child node: + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + +allOf: + - $ref: snps,dwc3-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq4019-dwc3 + - qcom,ipq5332-dwc3 + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq8064-dwc3 + then: + properties: + clocks: + items: + - description: Master/Core clock, has to be >= 125 MHz + for SS operation and >= 60MHz for HS operation. + clock-names: + items: + - const: core + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq9574-dwc3 + - qcom,msm8953-dwc3 + - qcom,msm8996-dwc3 + - qcom,msm8998-dwc3 + - qcom,qcs8300-dwc3 + - qcom,sa8775p-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sdm670-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 + - qcom,sm6350-dwc3 + then: + properties: + clocks: + maxItems: 5 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq6018-dwc3 + then: + properties: + clocks: + minItems: 3 + maxItems: 4 + clock-names: + oneOf: + - items: + - const: core + - const: sleep + - const: mock_utmi + - items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq8074-dwc3 + - qcom,qdu1000-dwc3 + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq5018-dwc3 + - qcom,msm8994-dwc3 + - qcom,qcs404-dwc3 + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: core + - const: iface + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp + - qcom,x1e80100-dwc3 + - qcom,x1e80100-dwc3-mp + then: + properties: + clocks: + maxItems: 9 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: noc_aggr + - const: noc_aggr_north + - const: noc_aggr_south + - const: noc_sys + + - if: + properties: + compatible: + contains: + enum: + - qcom,sdm660-dwc3 + then: + properties: + clocks: + minItems: 4 + maxItems: 5 + clock-names: + oneOf: + - items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,qcm2290-dwc3 + - qcom,qcs615-dwc3 + - qcom,sar2130p-dwc3 + - qcom,sc8180x-dwc3 + - qcom,sc8180x-dwc3-mp + - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8450-dwc3 + - qcom,sm8550-dwc3 + - qcom,sm8650-dwc3 + then: + properties: + clocks: + minItems: 6 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: xo + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8350-dwc3 + then: + properties: + clocks: + minItems: 5 + maxItems: 6 + clock-names: + minItems: 5 + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: xo + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq5018-dwc3 + - qcom,ipq6018-dwc3 + - qcom,ipq8074-dwc3 + - qcom,msm8953-dwc3 + - qcom,msm8998-dwc3 + then: + properties: + interrupts: + minItems: 3 + maxItems: 4 + interrupt-names: + minItems: 3 + items: + - const: dwc_usb3 + - const: pwr_event + - const: qusb2_phy + - const: ss_phy_irq + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8996-dwc3 + - qcom,qcs404-dwc3 + - qcom,sdm660-dwc3 + - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 + then: + properties: + interrupts: + minItems: 4 + maxItems: 5 + interrupt-names: + minItems: 4 + items: + - const: dwc_usb3 + - const: pwr_event + - const: qusb2_phy + - const: hs_phy_irq + - const: ss_phy_irq + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq5332-dwc3 + then: + properties: + interrupts: + maxItems: 4 + interrupt-names: + items: + - const: dwc_usb3 + - const: pwr_event + - const: dp_hs_phy_irq + - const: dm_hs_phy_irq + + - if: + properties: + compatible: + contains: + enum: + - qcom,x1e80100-dwc3 + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + items: + - const: dwc_usb3 + - const: pwr_event + - const: dp_hs_phy_irq + - const: dm_hs_phy_irq + - const: ss_phy_irq + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq4019-dwc3 + - qcom,ipq8064-dwc3 + - qcom,msm8994-dwc3 + - qcom,qcs615-dwc3 + - qcom,qcs8300-dwc3 + - qcom,qdu1000-dwc3 + - qcom,sa8775p-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sc8180x-dwc3 + - qcom,sc8280xp-dwc3 + - qcom,sdm670-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 + - qcom,sm4250-dwc3 + - qcom,sm6350-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8350-dwc3 + - qcom,sm8450-dwc3 + - qcom,sm8550-dwc3 + - qcom,sm8650-dwc3 + then: + properties: + interrupts: + minItems: 5 + maxItems: 6 + interrupt-names: + minItems: 5 + items: + - const: dwc_usb3 + - const: pwr_event + - const: hs_phy_irq + - const: dp_hs_phy_irq + - const: dm_hs_phy_irq + - const: ss_phy_irq + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8180x-dwc3-mp + - qcom,x1e80100-dwc3-mp + then: + properties: + interrupts: + minItems: 11 + maxItems: 11 + interrupt-names: + items: + - const: dwc_usb3 + - const: pwr_event_1 + - const: pwr_event_2 + - const: hs_phy_1 + - const: hs_phy_2 + - const: dp_hs_phy_1 + - const: dm_hs_phy_1 + - const: dp_hs_phy_2 + - const: dm_hs_phy_2 + - const: ss_phy_1 + - const: ss_phy_2 + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8280xp-dwc3-mp + then: + properties: + interrupts: + minItems: 19 + maxItems: 19 + interrupt-names: + items: + - const: dwc_usb3 + - const: pwr_event_1 + - const: pwr_event_2 + - const: pwr_event_3 + - const: pwr_event_4 + - const: hs_phy_1 + - const: hs_phy_2 + - const: hs_phy_3 + - const: hs_phy_4 + - const: dp_hs_phy_1 + - const: dm_hs_phy_1 + - const: dp_hs_phy_2 + - const: dm_hs_phy_2 + - const: dp_hs_phy_3 + - const: dm_hs_phy_3 + - const: dp_hs_phy_4 + - const: dm_hs_phy_4 + - const: ss_phy_1 + - const: ss_phy_2 + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + soc { + #address-cells = <2>; + #size-cells = <2>; + + usb@a600000 { + compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0x100000>; + + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>, + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; + + assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>; + assigned-clock-rates = <19200000>, <150000000>; + + interrupts = , + , + , + , + , + ; + interrupt-names = "dwc_usb3", "pwr_event", "hs_phy_irq", + "dp_hs_phy_irq", "dm_hs_phy_irq", "ss_phy_irq"; + + power-domains = <&gcc USB30_PRIM_GDSC>; + + resets = <&gcc GCC_USB30_PRIM_BCR>; + + iommus = <&apps_smmu 0x740 0>; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; +... -- cgit v1.2.3 From ac03495d7359285a007ec4fdc08d3843bb5d6b7e Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 15 Apr 2025 12:50:15 +0100 Subject: ASoC: dt-bindings: Add Cirrus Logic CS48L32 audio DSP The CS48L32 is an Audio DSP with microphone inputs and SPI control interface. It has a programmable DSP and a variety of power-efficient fixed-function audio processors, with configurable digital mixing and routing. Most properties are core properties: supply regulators, gpios, clocks, interrupt parent and SPI interface. The custom properties define the configuration of the microphone inputs to match what is physically attached to them. Signed-off-by: Richard Fitzgerald Reviewed-by: "Rob Herring (Arm)" Link: https://patch.msgid.link/20250415115016.505777-2-rf@opensource.cirrus.com Signed-off-by: Mark Brown --- .../devicetree/bindings/sound/cirrus,cs48l32.yaml | 195 +++++++++++++++++++++ 1 file changed, 195 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/cirrus,cs48l32.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs48l32.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs48l32.yaml new file mode 100644 index 000000000000..bf087b57aaf6 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/cirrus,cs48l32.yaml @@ -0,0 +1,195 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/cirrus,cs48l32.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cirrus Logic CS48L32 audio DSP. + +maintainers: + - patches@opensource.cirrus.com + +description: | + The CS48L32 is a high-performance low-power audio DSP for smartphones and + other portable audio devices. The CS48L32 combines a programmable Halo Core + DSP with a variety of power-efficient fixed-function audio processors. + + See also the binding headers: + + include/dt-bindings/sound/cs48l32.yaml + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + - $ref: dai-common.yaml# + +properties: + compatible: + enum: + - cirrus,cs48l32 + + reg: + description: SPI chip-select number. + maxItems: 1 + + spi-max-frequency: + maximum: 25000000 + + vdd-a-supply: + description: Regulator supplying VDD_A + + vdd-d-supply: + description: Regulator supplying VDD_D + + vdd-io-supply: + description: Regulator supplying VDD_IO + + vdd-cp-supply: + description: Regulator supplying VDD_CP + + reset-gpios: + description: + One entry specifying the GPIO controlling /RESET. Although optional, + it is strongly recommended to use a hardware reset. + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: The clock supplied on MCLK1 + + clock-names: + const: mclk1 + + '#sound-dai-cells': + const: 1 + + cirrus,in-type: + description: | + A list of input type settings for each ADC input. + Inputs are one of these types: + CS48L32_IN_TYPE_DIFF : analog differential (default) + CS48L32_IN_TYPE_SE : analog single-ended + + The type of the left (L) and right (R) channel on each input is + independently configured, as are the two groups of pins muxable to + the input (referred to in the datasheet as "1" and "2"). + + $ref: /schemas/types.yaml#/definitions/uint32-array + items: + - description: + IN1L_1 analog input type. One of the CS48L32_IN_TYPE_xxx. + minimum: 0 + maximum: 1 + default: 0 + - description: + IN1R_1 analog input type. One of the CS48L32_IN_TYPE_xxx. + minimum: 0 + maximum: 1 + default: 0 + - description: + IN1L_2 analog input type. One of the CS48L32_IN_TYPE_xxx. + minimum: 0 + maximum: 1 + default: 0 + - description: + IN1R_2 analog input type. One of the CS48L32_IN_TYPE_xxx. + minimum: 0 + maximum: 1 + default: 0 + + cirrus,pdm-sup: + description: | + Indicate which MICBIAS output supplies bias to the microphone. + There is one cell per input (IN1, IN2, ...). + + One of the CS48L32_MICBIAS_xxx values. + CS48L32_PDM_SUP_VOUT_MIC : mic biased from VOUT_MIC + CS48L32_PDM_SUP_MICBIAS1 : mic biased from MICBIAS1 + + Also see the INn_PDM_SUP field in the datasheet. + $ref: /schemas/types.yaml#/definitions/uint32-array + items: + - description: IN1 PDM supply source + minimum: 0 + maximum: 1 + default: 0 + - description: IN2 PDM supply source + minimum: 0 + maximum: 1 + default: 0 + +required: + - compatible + - reg + - vdd-a-supply + - vdd-d-supply + - vdd-io-supply + - vdd-cp-supply + +additionalProperties: false + +examples: + - | + #include + + spi@e0006000 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0xe0006000 0x1000>; + + codec@1 { + compatible = "cirrus,cs48l32"; + + reg = <0x1>; + spi-max-frequency = <2500000>; + + vdd-a-supply = <®ulator_1v8>; + vdd-d-supply = <®ulator_1v2>; + vdd-io-supply = <®ulator_1v8>; + vdd-cp-supply = <®ulator_1v8>; + + reset-gpios = <&gpio 0 0>; + + clocks = <&clks 0>; + clock-names = "mclk1"; + + interrupt-parent = <&gpio0>; + interrupts = <56 8>; + + #sound-dai-cells = <1>; + + cirrus,in-type = < + CS48L32_IN_TYPE_DIFF CS48L32_IN_TYPE_DIFF + CS48L32_IN_TYPE_SE CS48L32_IN_TYPE_SE + >; + + cirrus,pdm-sup = < + CS48L32_PDM_SUP_MICBIAS1 CS48L32_PDM_SUP_MICBIAS1 + >; + }; + }; + +# +# Minimal config +# + - | + #include + + spi@e0006000 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0xe0006000 0x1000>; + + codec@1 { + compatible = "cirrus,cs48l32"; + + reg = <0x1>; + + vdd-a-supply = <®ulator_1v8>; + vdd-d-supply = <®ulator_1v2>; + vdd-io-supply = <®ulator_1v8>; + vdd-cp-supply = <®ulator_1v8>; + }; + }; -- cgit v1.2.3 From a0285236ab93fdfdd1008afaa04561d142d6c276 Mon Sep 17 00:00:00 2001 From: Jedrzej Jagielski Date: Thu, 10 Apr 2025 14:59:56 +0200 Subject: ixgbe: add initial devlink support Add an initial support for devlink interface to ixgbe driver. Similarly to i40e driver the implementation doesn't enable devlink to manage device-wide configuration. Devlink instance is created for each physical function of PCIe device. Create separate directory for devlink related ixgbe files and use naming scheme similar to the one used in the ice driver. Add a stub for Documentation, to be extended by further patches. Change struct ixgbe_adapter allocation to be done by devlink (Przemek), as suggested by Jiri. Reviewed-by: Mateusz Polchlopek Co-developed-by: Przemek Kitszel Signed-off-by: Przemek Kitszel Tested-by: Bharath R Signed-off-by: Jedrzej Jagielski Signed-off-by: Tony Nguyen --- Documentation/networking/devlink/index.rst | 1 + Documentation/networking/devlink/ixgbe.rst | 8 ++++++++ 2 files changed, 9 insertions(+) create mode 100644 Documentation/networking/devlink/ixgbe.rst (limited to 'Documentation') diff --git a/Documentation/networking/devlink/index.rst b/Documentation/networking/devlink/index.rst index 948c8c44e233..8319f43b5933 100644 --- a/Documentation/networking/devlink/index.rst +++ b/Documentation/networking/devlink/index.rst @@ -84,6 +84,7 @@ parameters, info versions, and other features it supports. i40e ionic ice + ixgbe mlx4 mlx5 mlxsw diff --git a/Documentation/networking/devlink/ixgbe.rst b/Documentation/networking/devlink/ixgbe.rst new file mode 100644 index 000000000000..c04ac51c6d85 --- /dev/null +++ b/Documentation/networking/devlink/ixgbe.rst @@ -0,0 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0 + +===================== +ixgbe devlink support +===================== + +This document describes the devlink features implemented by the ``ixgbe`` +device driver. -- cgit v1.2.3 From f6b588af3d575acba469f15ef519ae4befb0ad63 Mon Sep 17 00:00:00 2001 From: Jedrzej Jagielski Date: Thu, 10 Apr 2025 14:59:57 +0200 Subject: ixgbe: add handler for devlink .info_get() Provide devlink .info_get() callback implementation to allow the driver to report detailed version information. The following info is reported: "serial_number" -> The PCI DSN of the adapter "fw.bundle_id" -> Unique identifier for the combined flash image "fw.undi" -> Version of the Option ROM containing the UEFI driver "board.id" -> The PBA ID string Reviewed-by: Mateusz Polchlopek Tested-by: Bharath R Signed-off-by: Jedrzej Jagielski Signed-off-by: Tony Nguyen --- Documentation/networking/devlink/ixgbe.rst | 32 ++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/devlink/ixgbe.rst b/Documentation/networking/devlink/ixgbe.rst index c04ac51c6d85..b63645de37e8 100644 --- a/Documentation/networking/devlink/ixgbe.rst +++ b/Documentation/networking/devlink/ixgbe.rst @@ -6,3 +6,35 @@ ixgbe devlink support This document describes the devlink features implemented by the ``ixgbe`` device driver. + +Info versions +============= + +The ``ixgbe`` driver reports the following versions + +.. list-table:: devlink info versions implemented + :widths: 5 5 5 90 + + * - Name + - Type + - Example + - Description + * - ``board.id`` + - fixed + - H49289-000 + - The Product Board Assembly (PBA) identifier of the board. + * - ``fw.undi`` + - running + - 1.1937.0 + - Version of the Option ROM containing the UEFI driver. The version is + reported in ``major.minor.patch`` format. The major version is + incremented whenever a major breaking change occurs, or when the + minor version would overflow. The minor version is incremented for + non-breaking changes and reset to 1 when the major version is + incremented. The patch version is normally 0 but is incremented when + a fix is delivered as a patch against an older base Option ROM. + * - ``fw.bundle_id`` + - running + - 0x80000d0d + - Unique identifier of the firmware image file that was loaded onto + the device. Also referred to as the EETRACK identifier of the NVM. -- cgit v1.2.3 From 8210ff738077ed3581e022e5cc8721aa041d42cb Mon Sep 17 00:00:00 2001 From: Jedrzej Jagielski Date: Thu, 10 Apr 2025 15:00:01 +0200 Subject: ixgbe: add .info_get extension specific for E610 devices E610 devices give possibility to show more detailed info than the previous boards. Extend reporting NVM info with following pieces: fw.mgmt.api -> version number of the API fw.mgmt.build -> identifier of the source for the FW fw.mgmt.srev -> number defining FW's security revision fw.psid.api -> version defining the format of the flash contents fw.undi.srev -> number defining OROM's security revision fw.netlist -> version of the netlist module fw.netlist.build -> first 4 bytes of the netlist hash Co-developed-by: Slawomir Mrozowicz Signed-off-by: Slawomir Mrozowicz Co-developed-by: Piotr Kwapulinski Signed-off-by: Piotr Kwapulinski Signed-off-by: Jedrzej Jagielski Signed-off-by: Tony Nguyen --- Documentation/networking/devlink/devlink-info.rst | 4 +++ Documentation/networking/devlink/ixgbe.rst | 38 +++++++++++++++++++++++ 2 files changed, 42 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/devlink/devlink-info.rst b/Documentation/networking/devlink/devlink-info.rst index 23073bc219d8..dd6adc4d0559 100644 --- a/Documentation/networking/devlink/devlink-info.rst +++ b/Documentation/networking/devlink/devlink-info.rst @@ -86,6 +86,10 @@ In case software/firmware components are loaded from the disk (e.g. ``/lib/firmware``) only the running version should be reported via the kernel API. +Please note that any security versions reported via devlink are purely +informational. Devlink does not use a secure channel to communicate with +the device. + Generic Versions ================ diff --git a/Documentation/networking/devlink/ixgbe.rst b/Documentation/networking/devlink/ixgbe.rst index b63645de37e8..97692df50cfe 100644 --- a/Documentation/networking/devlink/ixgbe.rst +++ b/Documentation/networking/devlink/ixgbe.rst @@ -10,6 +10,10 @@ device driver. Info versions ============= +Any of the versions dealing with the security presented by ``devlink-info`` +is purely informational. Devlink does not use a secure channel to communicate +with the device. + The ``ixgbe`` driver reports the following versions .. list-table:: devlink info versions implemented @@ -33,8 +37,42 @@ The ``ixgbe`` driver reports the following versions non-breaking changes and reset to 1 when the major version is incremented. The patch version is normally 0 but is incremented when a fix is delivered as a patch against an older base Option ROM. + * - ``fw.undi.srev`` + - running + - 4 + - Number indicating the security revision of the Option ROM. * - ``fw.bundle_id`` - running - 0x80000d0d - Unique identifier of the firmware image file that was loaded onto the device. Also referred to as the EETRACK identifier of the NVM. + * - ``fw.mgmt.api`` + - running + - 1.5.1 + - 3-digit version number (major.minor.patch) of the API exported over + the AdminQ by the management firmware. Used by the driver to + identify what commands are supported. Historical versions of the + kernel only displayed a 2-digit version number (major.minor). + * - ``fw.mgmt.build`` + - running + - 0x305d955f + - Unique identifier of the source for the management firmware. + * - ``fw.mgmt.srev`` + - running + - 3 + - Number indicating the security revision of the firmware. + * - ``fw.psid.api`` + - running + - 0.80 + - Version defining the format of the flash contents. + * - ``fw.netlist`` + - running + - 1.1.2000-6.7.0 + - The version of the netlist module. This module defines the device's + Ethernet capabilities and default settings, and is used by the + management firmware as part of managing link and device + connectivity. + * - ``fw.netlist.build`` + - running + - 0xee16ced7 + - The first 4 bytes of the hash of the netlist module contents. -- cgit v1.2.3 From a0f45672d5e14af053d2dc5f552381351f6eeac0 Mon Sep 17 00:00:00 2001 From: Jedrzej Jagielski Date: Thu, 10 Apr 2025 15:00:04 +0200 Subject: ixgbe: add device flash update via devlink Use the pldmfw library to implement device flash update for the Intel ixgbe networking device driver specifically for E610 devices. This support uses the devlink flash update interface. Using the pldmfw library, the provided firmware file will be scanned for the three major components, "fw.undi" for the Option ROM, "fw.mgmt" for the main NVM module containing the primary device firmware, and "fw.netlist" containing the netlist module. The flash is separated into two banks, the active bank containing the running firmware, and the inactive bank which we use for update. Each module is updated in a staged process. First, the inactive bank is erased, preparing the device for update. Second, the contents of the component are copied to the inactive portion of the flash. After all components are updated, the driver signals the device to switch the active bank during the next EMP reset. With this implementation, basic flash update for the E610 hardware is supported. Reviewed-by: Jacob Keller Tested-by: Bharath R Co-developed-by: Slawomir Mrozowicz Signed-off-by: Slawomir Mrozowicz Co-developed-by: Piotr Kwapulinski Signed-off-by: Piotr Kwapulinski Co-developed-by: Stefan Wegrzyn Signed-off-by: Stefan Wegrzyn Signed-off-by: Jedrzej Jagielski Signed-off-by: Tony Nguyen --- Documentation/networking/devlink/ixgbe.rst | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/devlink/ixgbe.rst b/Documentation/networking/devlink/ixgbe.rst index 97692df50cfe..3fd2584b2bf0 100644 --- a/Documentation/networking/devlink/ixgbe.rst +++ b/Documentation/networking/devlink/ixgbe.rst @@ -76,3 +76,30 @@ The ``ixgbe`` driver reports the following versions - running - 0xee16ced7 - The first 4 bytes of the hash of the netlist module contents. + +Flash Update +============ + +The ``ixgbe`` driver implements support for flash update using the +``devlink-flash`` interface. It supports updating the device flash using a +combined flash image that contains the ``fw.mgmt``, ``fw.undi``, and +``fw.netlist`` components. + +.. list-table:: List of supported overwrite modes + :widths: 5 95 + + * - Bits + - Behavior + * - ``DEVLINK_FLASH_OVERWRITE_SETTINGS`` + - Do not preserve settings stored in the flash components being + updated. This includes overwriting the port configuration that + determines the number of physical functions the device will + initialize with. + * - ``DEVLINK_FLASH_OVERWRITE_SETTINGS`` and ``DEVLINK_FLASH_OVERWRITE_IDENTIFIERS`` + - Do not preserve either settings or identifiers. Overwrite everything + in the flash with the contents from the provided image, without + performing any preservation. This includes overwriting device + identifying fields such as the MAC address, Vital product Data (VPD) area, + and device serial number. It is expected that this combination be used with an + image customized for the specific device. + -- cgit v1.2.3 From c9e563cae19e529abcc2cb90b4b793952f209260 Mon Sep 17 00:00:00 2001 From: Jedrzej Jagielski Date: Thu, 10 Apr 2025 15:00:05 +0200 Subject: ixgbe: add support for devlink reload The E610 adapters contain an embedded chip with firmware which can be updated using devlink flash. The firmware which runs on this chip is referred to as the Embedded Management Processor firmware (EMP firmware). Activating the new firmware image currently requires that the system be rebooted. This is not ideal as rebooting the system can cause unwanted downtime. The EMP firmware itself can be reloaded by issuing a special update to the device called an Embedded Management Processor reset (EMP reset). This reset causes the device to reset and reload the EMP firmware. Implement support for devlink reload with the "fw_activate" flag. This allows user space to request the firmware be activated immediately. Reviewed-by: Mateusz Polchlopek Tested-by: Bharath R Co-developed-by: Slawomir Mrozowicz Signed-off-by: Slawomir Mrozowicz Co-developed-by: Piotr Kwapulinski Signed-off-by: Piotr Kwapulinski Co-developed-by: Stefan Wegrzyn Signed-off-by: Stefan Wegrzyn Signed-off-by: Jedrzej Jagielski Signed-off-by: Tony Nguyen --- Documentation/networking/devlink/ixgbe.rst | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/devlink/ixgbe.rst b/Documentation/networking/devlink/ixgbe.rst index 3fd2584b2bf0..3fce291348fa 100644 --- a/Documentation/networking/devlink/ixgbe.rst +++ b/Documentation/networking/devlink/ixgbe.rst @@ -103,3 +103,20 @@ combined flash image that contains the ``fw.mgmt``, ``fw.undi``, and and device serial number. It is expected that this combination be used with an image customized for the specific device. +Reload +====== + +The ``ixgbe`` driver supports activating new firmware after a flash update +using ``DEVLINK_CMD_RELOAD`` with the ``DEVLINK_RELOAD_ACTION_FW_ACTIVATE`` +action. + +.. code:: shell + + $ devlink dev reload pci/0000:01:00.0 reload action fw_activate + +The new firmware is activated by issuing a device specific Embedded +Management Processor reset which requests the device to reset and reload the +EMP firmware image. + +The driver does not currently support reloading the driver via +``DEVLINK_RELOAD_ACTION_DRIVER_REINIT``. -- cgit v1.2.3 From 6cf6b0a6f204e8b10e2b69e74953f029ea83a8a9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= Date: Tue, 15 Apr 2025 09:03:06 +0200 Subject: kunit: tool: Implement listing of available architectures MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit To implement custom scripting around kunit.py it is useful to get a list of available architectures. While it is possible to manually inspect tools/testing/kunit/qemu_configs/, this is annoying to implement and introduces a dependency on a kunit.py implementation detail. Introduce 'kunit.py run --arch help' which lists all known architectures in an easy to parse list. This is equivalent on how QEMU implements listing of possible argument values. Link: https://lore.kernel.org/r/20250415-kunit-list-v2-1-aa452cd317ae@linutronix.de Signed-off-by: Thomas Weißschuh Reviewed-by: Rae Moar Reviewed-by: David Gow Signed-off-by: Shuah Khan --- Documentation/dev-tools/kunit/run_wrapper.rst | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/dev-tools/kunit/run_wrapper.rst b/Documentation/dev-tools/kunit/run_wrapper.rst index 19ddf5e07013..6697c71ee8ca 100644 --- a/Documentation/dev-tools/kunit/run_wrapper.rst +++ b/Documentation/dev-tools/kunit/run_wrapper.rst @@ -182,6 +182,8 @@ via UML. To run tests on qemu, by default it requires two flags: is ignored), the tests will run via UML. Non-UML architectures, for example: i386, x86_64, arm and so on; run on qemu. + ``--arch help`` lists all valid ``--arch`` values. + - ``--cross_compile``: Specifies the Kbuild toolchain. It passes the same argument as passed to the ``CROSS_COMPILE`` variable used by Kbuild. As a reminder, this will be the prefix for the toolchain -- cgit v1.2.3 From 06d99fcf1f87d5b6bf1c7dd0f7ec422304a47f31 Mon Sep 17 00:00:00 2001 From: Craig McQueen Date: Mon, 17 Mar 2025 13:26:30 +1100 Subject: leds: led-triggers: Improvements for default trigger Accept "default" written to sysfs trigger attr. If the text "default" is written to the LED's sysfs 'trigger' attr, then call led_trigger_set_default() to set the LED to its default trigger. If the default trigger is set to "none", then led_trigger_set_default() will remove a trigger. This is in contrast to the default trigger being unset, in which case led_trigger_set_default() does nothing. Signed-off-by: Craig McQueen Reviewed-by: Jacek Anaszewski Link: https://lore.kernel.org/r/20250317022630.424015-1-craig@mcqueen.au Signed-off-by: Lee Jones --- Documentation/ABI/testing/sysfs-class-led | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-class-led b/Documentation/ABI/testing/sysfs-class-led index 2e24ac3bd7ef..0313b82644f2 100644 --- a/Documentation/ABI/testing/sysfs-class-led +++ b/Documentation/ABI/testing/sysfs-class-led @@ -72,6 +72,12 @@ Description: /sys/class/leds/ once a given trigger is selected. For their documentation see `sysfs-class-led-trigger-*`. + Writing "none" removes the trigger for this LED. + + Writing "default" sets the trigger to the LED's default trigger + (which would often be configured in the device tree for the + hardware). + What: /sys/class/leds//inverted Date: January 2011 KernelVersion: 2.6.38 -- cgit v1.2.3 From ca72d5ef59513c448f03d20a58e1942af6441b44 Mon Sep 17 00:00:00 2001 From: Manuel Fombuena Date: Tue, 25 Feb 2025 22:02:28 +0000 Subject: Documentation: leds: Remove .rst extension for leds-st1202 on index No other LED driver is listed on index.rst with the extension .rst. Remove it. Fixes: b1816b22381b ("Documentation:leds: Add leds-st1202.rst") Signed-off-by: Manuel Fombuena Link: https://lore.kernel.org/r/CWLP123MB5473137572529F99746F4AC4C5C32@CWLP123MB5473.GBRP123.PROD.OUTLOOK.COM Signed-off-by: Lee Jones --- Documentation/leds/index.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/leds/index.rst b/Documentation/leds/index.rst index 0ab0a2128a11..76fae171039c 100644 --- a/Documentation/leds/index.rst +++ b/Documentation/leds/index.rst @@ -28,5 +28,5 @@ LEDs leds-mlxcpld leds-mt6370-rgb leds-sc27xx - leds-st1202.rst + leds-st1202 leds-qcom-lpg -- cgit v1.2.3 From af3a1b6a18258168f09e4ebc014b368bb0e845b0 Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Mon, 17 Mar 2025 15:55:40 +0200 Subject: Documentation: admin-guide: pm: Document intel_idle C1 demotion Document the intel_idle driver sysfs file for enabling/disabling C1 demotion. Signed-off-by: Artem Bityutskiy Link: https://patch.msgid.link/20250317135541.1471754-3-dedekind1@gmail.com Signed-off-by: Rafael J. Wysocki --- Documentation/admin-guide/pm/intel_idle.rst | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/pm/intel_idle.rst b/Documentation/admin-guide/pm/intel_idle.rst index 5940528146eb..ed6f055d4b14 100644 --- a/Documentation/admin-guide/pm/intel_idle.rst +++ b/Documentation/admin-guide/pm/intel_idle.rst @@ -38,6 +38,27 @@ instruction at all. only way to pass early-configuration-time parameters to it is via the kernel command line. +Sysfs Interface +=============== + +The ``intel_idle`` driver exposes the following ``sysfs`` attributes in +``/sys/devices/system/cpu/cpuidle/``: + +``intel_c1_demotion`` + Enable or disable C1 demotion for all CPUs in the system. This file is + only exposed on platforms that support the C1 demotion feature and where + it was tested. Value 0 means that C1 demotion is disabled, value 1 means + that it is enabled. Write 0 or 1 to disable or enable C1 demotion for + all CPUs. + + The C1 demotion feature involves the platform firmware demoting deep + C-state requests from the OS (e.g., C6 requests) to C1. The idea is that + firmware monitors CPU wake-up rate, and if it is higher than a + platform-specific threshold, the firmware demotes deep C-state requests + to C1. For example, Linux requests C6, but firmware noticed too many + wake-ups per second, and it keeps the CPU in C1. When the CPU stays in + C1 long enough, the platform promotes it back to C6. This may improve + some workloads' performance, but it may also increase power consumption. .. _intel-idle-enumeration-of-states: -- cgit v1.2.3 From e80e1342eabaac86da02f2c74fffc010e4f68c55 Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Mon, 17 Mar 2025 15:55:41 +0200 Subject: Documentation: ABI: testing: document the new cpuidle sysfs file Mention the new 'intel_c1_demotion' sysfs file in the "cpuidle" section and refer to "Documentation/admin-guide/pm/intel_idle.rst" for more information. Signed-off-by: Artem Bityutskiy Link: https://patch.msgid.link/20250317135541.1471754-4-dedekind1@gmail.com Signed-off-by: Rafael J. Wysocki --- Documentation/ABI/testing/sysfs-devices-system-cpu | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu index 206079d3bd5b..6c4934d3f4db 100644 --- a/Documentation/ABI/testing/sysfs-devices-system-cpu +++ b/Documentation/ABI/testing/sysfs-devices-system-cpu @@ -111,6 +111,7 @@ What: /sys/devices/system/cpu/cpuidle/available_governors /sys/devices/system/cpu/cpuidle/current_driver /sys/devices/system/cpu/cpuidle/current_governor /sys/devices/system/cpu/cpuidle/current_governer_ro + /sys/devices/system/cpu/cpuidle/intel_c1_demotion Date: September 2007 Contact: Linux kernel mailing list Description: Discover cpuidle policy and mechanism @@ -132,7 +133,11 @@ Description: Discover cpuidle policy and mechanism current_governor_ro: (RO) displays current idle policy. - See Documentation/admin-guide/pm/cpuidle.rst and + intel_c1_demotion: (RW) enables/disables the C1 demotion + feature on Intel CPUs. + + See Documentation/admin-guide/pm/cpuidle.rst, + Documentation/admin-guide/pm/intel_idle.rst, and Documentation/driver-api/pm/cpuidle.rst for more information. -- cgit v1.2.3 From 43eca05b6a3b917c600e10cc6b06bfa57fa57401 Mon Sep 17 00:00:00 2001 From: Cosmin Ratiu Date: Fri, 11 Apr 2025 10:49:56 +0300 Subject: xfrm: Add explicit dev to .xdo_dev_state_{add,delete,free} Previously, device driver IPSec offload implementations would fall into two categories: 1. Those that used xso.dev to determine the offload device. 2. Those that used xso.real_dev to determine the offload device. The first category didn't work with bonding while the second did. In a non-bonding setup the two pointers are the same. This commit adds explicit pointers for the offload netdevice to .xdo_dev_state_add() / .xdo_dev_state_delete() / .xdo_dev_state_free() which eliminates the confusion and allows drivers from the first category to work with bonding. xso.real_dev now becomes a private pointer managed by the bonding driver. Signed-off-by: Cosmin Ratiu Reviewed-by: Leon Romanovsky Reviewed-by: Nikolay Aleksandrov Signed-off-by: Steffen Klassert --- Documentation/networking/xfrm_device.rst | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/xfrm_device.rst b/Documentation/networking/xfrm_device.rst index 7f24c09f2694..122204da0fff 100644 --- a/Documentation/networking/xfrm_device.rst +++ b/Documentation/networking/xfrm_device.rst @@ -65,9 +65,13 @@ Callbacks to implement /* from include/linux/netdevice.h */ struct xfrmdev_ops { /* Crypto and Packet offload callbacks */ - int (*xdo_dev_state_add) (struct xfrm_state *x, struct netlink_ext_ack *extack); - void (*xdo_dev_state_delete) (struct xfrm_state *x); - void (*xdo_dev_state_free) (struct xfrm_state *x); + int (*xdo_dev_state_add)(struct net_device *dev, + struct xfrm_state *x, + struct netlink_ext_ack *extack); + void (*xdo_dev_state_delete)(struct net_device *dev, + struct xfrm_state *x); + void (*xdo_dev_state_free)(struct net_device *dev, + struct xfrm_state *x); bool (*xdo_dev_offload_ok) (struct sk_buff *skb, struct xfrm_state *x); void (*xdo_dev_state_advance_esn) (struct xfrm_state *x); -- cgit v1.2.3 From cb58d39f3998aac05612b16e86d70833343da6c6 Mon Sep 17 00:00:00 2001 From: Vaibhav Jain Date: Wed, 16 Apr 2025 21:57:31 +0530 Subject: powerpc: Document APIv2 KVM hcall spec for Hostwide counters Update kvm-nested APIv2 documentation to include five new Guest-State-Elements to fetch the hostwide counters. These counters are per L1-Lpar and indicate the amount of Heap/Page-table memory allocated, available and Page-table memory reclaimed for all L2-Guests active instances Reviewed-by: Bagas Sanjaya Tested-by: Gautam Menghani Signed-off-by: Vaibhav Jain Signed-off-by: Madhavan Srinivasan Link: https://patch.msgid.link/20250416162740.93143-2-vaibhav@linux.ibm.com --- Documentation/arch/powerpc/kvm-nested.rst | 40 +++++++++++++++++++++++-------- 1 file changed, 30 insertions(+), 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/arch/powerpc/kvm-nested.rst b/Documentation/arch/powerpc/kvm-nested.rst index 5defd13cc6c1..574592505604 100644 --- a/Documentation/arch/powerpc/kvm-nested.rst +++ b/Documentation/arch/powerpc/kvm-nested.rst @@ -208,13 +208,9 @@ associated values for each ID in the GSB:: flags: Bit 0: getGuestWideState: Request state of the Guest instead of an individual VCPU. - Bit 1: takeOwnershipOfVcpuState Indicate the L1 is taking - over ownership of the VCPU state and that the L0 can free - the storage holding the state. The VCPU state will need to - be returned to the Hypervisor via H_GUEST_SET_STATE prior - to H_GUEST_RUN_VCPU being called for this VCPU. The data - returned in the dataBuffer is in a Hypervisor internal - format. + Bit 1: getHostWideState: Request stats of the Host. This causes + the guestId and vcpuId parameters to be ignored and attempting + to get the VCPU/Guest state will cause an error. Bits 2-63: Reserved guestId: ID obtained from H_GUEST_CREATE vcpuId: ID of the vCPU pass to H_GUEST_CREATE_VCPU @@ -406,9 +402,10 @@ the partition like the timebase offset and partition scoped page table information. +--------+-------+----+--------+----------------------------------+ -| ID | Size | RW | Thread | Details | -| | Bytes | | Guest | | -| | | | Scope | | +| ID | Size | RW |(H)ost | Details | +| | Bytes | |(G)uest | | +| | | |(T)hread| | +| | | |Scope | | +========+=======+====+========+==================================+ | 0x0000 | | RW | TG | NOP element | +--------+-------+----+--------+----------------------------------+ @@ -434,6 +431,29 @@ table information. | | | | |- 0x8 Table size. | +--------+-------+----+--------+----------------------------------+ | 0x0007-| | | | Reserved | +| 0x07FF | | | | | ++--------+-------+----+--------+----------------------------------+ +| 0x0800 | 0x08 | R | H | Current usage in bytes of the | +| | | | | L0's Guest Management Space | +| | | | | for an L1-Lpar. | ++--------+-------+----+--------+----------------------------------+ +| 0x0801 | 0x08 | R | H | Max bytes available in the | +| | | | | L0's Guest Management Space for | +| | | | | an L1-Lpar | ++--------+-------+----+--------+----------------------------------+ +| 0x0802 | 0x08 | R | H | Current usage in bytes of the | +| | | | | L0's Guest Page Table Management | +| | | | | Space for an L1-Lpar | ++--------+-------+----+--------+----------------------------------+ +| 0x0803 | 0x08 | R | H | Max bytes available in the L0's | +| | | | | Guest Page Table Management | +| | | | | Space for an L1-Lpar | ++--------+-------+----+--------+----------------------------------+ +| 0x0804 | 0x08 | R | H | Cumulative Reclaimed bytes from | +| | | | | L0 Guest's Page Table Management | +| | | | | Space due to overcommit | ++--------+-------+----+--------+----------------------------------+ +| 0x0805-| | | | Reserved | | 0x0BFF | | | | | +--------+-------+----+--------+----------------------------------+ | 0x0C00 | 0x10 | RW | T |Run vCPU Input Buffer: | -- cgit v1.2.3 From 61e312a001a394a93998c353af859841ddf50d5d Mon Sep 17 00:00:00 2001 From: Haylen Chu Date: Wed, 16 Apr 2025 13:54:01 +0000 Subject: dt-bindings: soc: spacemit: Add spacemit,k1-syscon Document APMU, MPMU and APBC syscons found on SpacemiT K1 SoC, which are capable of generating clock and reset signals. Additionally, APMU and MPMU manage power domains. Signed-off-by: Haylen Chu Reviewed-by: Krzysztof Kozlowski Reviewed-by: Alex Elder Reviewed-by: Yixun Lan Link: https://lore.kernel.org/r/20250416135406.16284-2-heylenay@4d2.org Signed-off-by: Yixun Lan --- .../bindings/soc/spacemit/spacemit,k1-syscon.yaml | 80 ++++++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml b/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml new file mode 100644 index 000000000000..30aaf49da03d --- /dev/null +++ b/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/spacemit/spacemit,k1-syscon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SpacemiT K1 SoC System Controller + +maintainers: + - Haylen Chu + +description: + System controllers found on SpacemiT K1 SoC, which are capable of + clock, reset and power-management functions. + +properties: + compatible: + enum: + - spacemit,k1-syscon-apbc + - spacemit,k1-syscon-apmu + - spacemit,k1-syscon-mpmu + + reg: + maxItems: 1 + + clocks: + maxItems: 4 + + clock-names: + items: + - const: osc + - const: vctcxo_1m + - const: vctcxo_3m + - const: vctcxo_24m + + "#clock-cells": + const: 1 + description: + See for valid indices. + + "#power-domain-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - "#clock-cells" + - "#reset-cells" + +allOf: + - if: + properties: + compatible: + contains: + const: spacemit,k1-syscon-apbc + then: + properties: + "#power-domain-cells": false + else: + required: + - "#power-domain-cells" + +additionalProperties: false + +examples: + - | + system-controller@d4050000 { + compatible = "spacemit,k1-syscon-mpmu"; + reg = <0xd4050000 0x209c>; + clocks = <&osc>, <&vctcxo_1m>, <&vctcxo_3m>, <&vctcxo_24m>; + clock-names = "osc", "vctcxo_1m", "vctcxo_3m", "vctcxo_24m"; + #clock-cells = <1>; + #power-domain-cells = <1>; + #reset-cells = <1>; + }; -- cgit v1.2.3 From 8090804045066ab8cd92737c8e2adfb46f166c0f Mon Sep 17 00:00:00 2001 From: Haylen Chu Date: Wed, 16 Apr 2025 13:54:02 +0000 Subject: dt-bindings: clock: spacemit: Add spacemit,k1-pll Add definition for the PLL found on SpacemiT K1 SoC, which takes the external 24MHz oscillator as input and generates clocks in various frequencies for the system. Signed-off-by: Haylen Chu Reviewed-by: Krzysztof Kozlowski Reviewed-by: Alex Elder Reviewed-by: Yixun Lan Link: https://lore.kernel.org/r/20250416135406.16284-3-heylenay@4d2.org Signed-off-by: Yixun Lan --- .../devicetree/bindings/clock/spacemit,k1-pll.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml b/Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml new file mode 100644 index 000000000000..06bafd68c00a --- /dev/null +++ b/Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/spacemit,k1-pll.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SpacemiT K1 PLL + +maintainers: + - Haylen Chu + +properties: + compatible: + const: spacemit,k1-pll + + reg: + maxItems: 1 + + clocks: + description: External 24MHz oscillator + + spacemit,mpmu: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the "Main PMU (MPMU)" syscon. It is used to check PLL + lock status. + + "#clock-cells": + const: 1 + description: + See for valid indices. + +required: + - compatible + - reg + - clocks + - spacemit,mpmu + - "#clock-cells" + +additionalProperties: false + +examples: + - | + clock-controller@d4090000 { + compatible = "spacemit,k1-pll"; + reg = <0xd4090000 0x1000>; + clocks = <&vctcxo_24m>; + spacemit,mpmu = <&sysctl_mpmu>; + #clock-cells = <1>; + }; -- cgit v1.2.3 From 182f7443e53d4c633e1b47bdca57600a91c9bbb8 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Tue, 15 Apr 2025 12:42:59 +0200 Subject: dt-bindings: display: mediatek: Add binding for HDMIv2 DDC Add a binding for the Display Data Channel (DDC) IP in MediaTek SoCs with version 2 HDMI TX IP. Reviewed-by: Rob Herring (Arm) Reviewed-by: CK Hu Signed-off-by: AngeloGioacchino Del Regno Link: https://patchwork.kernel.org/project/dri-devel/patch/20250415104321.51149-2-angelogioacchino.delregno@collabora.com/ Signed-off-by: Chun-Kuang Hu --- .../display/mediatek/mediatek,mt8195-hdmi-ddc.yaml | 41 ++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml new file mode 100644 index 000000000000..bde4dc556d4f --- /dev/null +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek HDMI MT8195 series HDMI Display Data Channel (DDC) + +maintainers: + - AngeloGioacchino Del Regno + - CK Hu + +properties: + compatible: + oneOf: + - const: mediatek,mt8195-hdmi-ddc + - items: + - const: mediatek,mt8188-hdmi-ddc + - const: mediatek,mt8195-hdmi-ddc + + clocks: + maxItems: 1 + + power-domains: + maxItems: 1 + +required: + - compatible + - clocks + +additionalProperties: false + +examples: + - | + hdmi { + hdmi_ddc: i2c { + compatible = "mediatek,mt8195-hdmi-ddc"; + clocks = <&clk26m>; + }; + }; +... -- cgit v1.2.3 From 8745e78c8a06b817a9a315817eb83090c92bfd9b Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Tue, 15 Apr 2025 12:43:00 +0200 Subject: dt-bindings: display: mediatek: Add binding for MT8195 HDMI-TX v2 Add a binding for the HDMI TX v2 Encoder found in MediaTek MT8195 and MT8188 SoCs. This fully supports the HDMI Specification 2.0b, hence it provides support for 3D-HDMI, Polarity inversion, up to 16 bits Deep Color, color spaces including RGB444, YCBCR420/422/444 (ITU601/ITU709) and xvYCC, with output resolutions up to 3840x2160p@60Hz. Moreover, it also supports HDCP 1.4 and 2.3, Variable Refresh Rate (VRR) and Consumer Electronics Control (CEC). This IP also includes support for HDMI Audio, including IEC60958 and IEC61937 SPDIF, 8-channel PCM, DSD, and other lossless audio according to HDMI 2.0. Reviewed-by: Rob Herring (Arm) Reviewed-by: CK Hu Signed-off-by: AngeloGioacchino Del Regno Link: https://patchwork.kernel.org/project/dri-devel/patch/20250415104321.51149-3-angelogioacchino.delregno@collabora.com/ Signed-off-by: Chun-Kuang Hu --- .../display/mediatek/mediatek,mt8195-hdmi.yaml | 151 +++++++++++++++++++++ 1 file changed, 151 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi.yaml new file mode 100644 index 000000000000..1b382f99d3ce --- /dev/null +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi.yaml @@ -0,0 +1,151 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/mediatek/mediatek,mt8195-hdmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT8195 series HDMI-TX Encoder + +maintainers: + - AngeloGioacchino Del Regno + - CK Hu + +description: + The MediaTek HDMI-TX v2 encoder can generate HDMI format data based on + the HDMI Specification 2.0b. + +properties: + compatible: + enum: + - mediatek,mt8188-hdmi-tx + - mediatek,mt8195-hdmi-tx + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: HDMI Peripheral Bus (APB) clock + - description: HDCP and HDMI_TOP clock + - description: HDCP, HDMI_TOP and HDMI Audio reference clock + - description: VPP HDMI Split clock + + clock-names: + items: + - const: bus + - const: hdcp + - const: hdcp24m + - const: hdmi-split + + i2c: + type: object + $ref: /schemas/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml + unevaluatedProperties: false + description: HDMI DDC I2C controller + + phys: + maxItems: 1 + description: PHY providing clocking TMDS and pixel to controller + + phy-names: + items: + - const: hdmi + + power-domains: + maxItems: 1 + + '#sound-dai-cells': + const: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: + Input port, usually connected to the output port of a DPI + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: + Output port that must be connected either to the input port of + a HDMI connector node containing a ddc-i2c-bus, or to the input + port of an attached bridge chip, such as a SlimPort transmitter. + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - power-domains + - phys + - phy-names + - ports + +allOf: + - $ref: /schemas/sound/dai-common.yaml# + +additionalProperties: false + +examples: + - | + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + hdmi@1c300000 { + compatible = "mediatek,mt8195-hdmi-tx"; + reg = <0 0x1c300000 0 0x1000>; + clocks = <&topckgen CLK_TOP_HDMI_APB>, + <&topckgen CLK_TOP_HDCP>, + <&topckgen CLK_TOP_HDCP_24M>, + <&vppsys1 CLK_VPP1_VPP_SPLIT_HDMI>; + clock-names = "bus", "hdcp", "hdcp24m", "hdmi-split"; + interrupts = ; + phys = <&hdmi_phy>; + phy-names = "hdmi"; + power-domains = <&spm MT8195_POWER_DOMAIN_HDMI_TX>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_pins>; + #sound-dai-cells = <1>; + + hdmitx_ddc: i2c { + compatible = "mediatek,mt8195-hdmi-ddc"; + clocks = <&clk26m>; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + hdmi_in: endpoint { + remote-endpoint = <&dpi1_out>; + }; + }; + + port@1 { + reg = <1>; + + hdmi_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; + }; + }; -- cgit v1.2.3 From 49593c298cf7f5dd360f029356bcbbcbff406d6f Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 15 Apr 2025 10:26:53 -0700 Subject: docs: networking: clarify intended audience of netdevices.rst The netdevices doc is dangerously broad. At least make it clear that it's intended for developers, not for users. Acked-by: Stanislav Fomichev Link: https://patch.msgid.link/20250415172653.811147-1-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/networking/netdevices.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/networking/netdevices.rst b/Documentation/networking/netdevices.rst index f87bb55b4afe..77fe1f7b93be 100644 --- a/Documentation/networking/netdevices.rst +++ b/Documentation/networking/netdevices.rst @@ -8,7 +8,7 @@ Network Devices, the Kernel, and You! Introduction ============ The following is a random collection of documentation regarding -network devices. +network devices. It is intended for driver developers. struct net_device lifetime rules ================================ -- cgit v1.2.3 From 43d869ac25f17923473a03dcf001af073b7c0a56 Mon Sep 17 00:00:00 2001 From: Haren Myneni Date: Wed, 16 Apr 2025 15:57:37 -0700 Subject: powerpc/pseries: Define papr_indices_io_block for papr-indices ioctls To issue ibm,get-indices, ibm,set-dynamic-indicator and ibm,get-dynamic-sensor-state in the user space, the RMO buffer is allocated for the work area which is restricted under system lockdown. So instead of user space execution, the kernel will provide /dev/papr-indices interface to execute these RTAS calls. The user space assigns data in papr_indices_io_block struct depends on the specific HCALL and passes to the following ioctls: PAPR_INDICES_IOC_GET: Use for ibm,get-indices. Returns a get-indices handle fd to read data. PAPR_DYNAMIC_SENSOR_IOC_GET: Use for ibm,get-dynamic-sensor-state. Updates the sensor state in papr_indices_io_block.dynamic_param.state PAPR_DYNAMIC_INDICATOR_IOC_SET: Use for ibm,set-dynamic-indicator. Sets the new state for the input indicator. Signed-off-by: Haren Myneni Tested-by: Sathvika Vasireddy Signed-off-by: Madhavan Srinivasan Link: https://patch.msgid.link/20250416225743.596462-3-haren@linux.ibm.com --- Documentation/userspace-api/ioctl/ioctl-number.rst | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/userspace-api/ioctl/ioctl-number.rst b/Documentation/userspace-api/ioctl/ioctl-number.rst index 7a1409ecc238..638dc4034483 100644 --- a/Documentation/userspace-api/ioctl/ioctl-number.rst +++ b/Documentation/userspace-api/ioctl/ioctl-number.rst @@ -366,6 +366,8 @@ Code Seq# Include File Comments 0xB2 01-02 arch/powerpc/include/uapi/asm/papr-sysparm.h powerpc/pseries system parameter API +0xB2 03-05 arch/powerpc/include/uapi/asm/papr-indices.h powerpc/pseries indices API + 0xB3 00 linux/mmc/ioctl.h 0xB4 00-0F linux/gpio.h 0xB5 00-0F uapi/linux/rpmsg.h -- cgit v1.2.3 From 8aa9efc0be667f5b982acffaf256100e97bcff03 Mon Sep 17 00:00:00 2001 From: Haren Myneni Date: Wed, 16 Apr 2025 15:57:41 -0700 Subject: powerpc/pseries: Add papr-platform-dump character driver for dump retrieval ibm,platform-dump RTAS call in combination with writable mapping /dev/mem is issued to collect platform dump from the hypervisor and may need multiple calls to get the complete dump. The current implementation uses rtas_platform_dump() API provided by librtas library to issue these RTAS calls. But /dev/mem access by the user space is prohibited under system lockdown. The solution should be to restrict access to RTAS function in user space and provide kernel interfaces to collect dump. This patch adds papr-platform-dump character driver and expose standard interfaces such as open / ioctl/ read to user space in ways that are compatible with lockdown. PAPR (7.3.3.4.1 ibm,platform-dump) provides a method to obtain the complete dump: - Each dump will be identified by ID called dump tag. - A sequence of RTAS calls have to be issued until retrieve the complete dump. The hypervisor expects the first RTAS call with the sequence 0 and the subsequent calls with the sequence number returned from the previous calls. - The hypervisor returns "dump complete" status once the complete dump is retrieved. But expects one more RTAS call from the partition with the NULL buffer to invalidate dump which means the dump will be removed in the hypervisor. - Sequence of calls are allowed with different dump IDs at the same time but not with the same dump ID. Expose these interfaces to user space with a /dev/papr-platform-dump character device using the following programming model: int devfd = open("/dev/papr-platform-dump", O_RDONLY); int fd = ioctl(devfd,PAPR_PLATFORM_DUMP_IOC_CREATE_HANDLE, &dump_id) - Restrict user space to access with the same dump ID. Typically we do not expect user space requests the dump again for the same dump ID. char *buf = malloc(size); length = read(fd, buf, size); - size should be minimum 1K based on PAPR and <= 4K based on RTAS work area size. It will be restrict to RTAS work area size. Using 4K work area based on the current implementation in librtas library - Each read call issue RTAS call to get the data based on the size requirement and returns bytes returned from the hypervisor - If the previous call returns dump complete status, the next read returns 0 like EOF. ret = ioctl(PAPR_PLATFORM_DUMP_IOC_INVALIDATE, &dump_id) - RTAS call with NULL buffer to invalidates the dump. The read API should use the file descriptor obtained from ioctl based on dump ID so that gets dump contents for the corresponding dump ID. Implemented support in librtas (rtas_platform_dump()) for this new ABI to support system lockdown. Signed-off-by: Haren Myneni Tested-by: Sathvika Vasireddy Signed-off-by: Madhavan Srinivasan Link: https://patch.msgid.link/20250416225743.596462-7-haren@linux.ibm.com --- Documentation/userspace-api/ioctl/ioctl-number.rst | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/userspace-api/ioctl/ioctl-number.rst b/Documentation/userspace-api/ioctl/ioctl-number.rst index 638dc4034483..c4a6266105ec 100644 --- a/Documentation/userspace-api/ioctl/ioctl-number.rst +++ b/Documentation/userspace-api/ioctl/ioctl-number.rst @@ -368,6 +368,8 @@ Code Seq# Include File Comments 0xB2 03-05 arch/powerpc/include/uapi/asm/papr-indices.h powerpc/pseries indices API +0xB2 06-07 arch/powerpc/include/uapi/asm/papr-platform-dump.h powerpc/pseries Platform Dump API + 0xB3 00 linux/mmc/ioctl.h 0xB4 00-0F linux/gpio.h 0xB5 00-0F uapi/linux/rpmsg.h -- cgit v1.2.3 From 86900ab620a42396a749b506d4a187820fc3fabe Mon Sep 17 00:00:00 2001 From: Haren Myneni Date: Wed, 16 Apr 2025 15:57:42 -0700 Subject: powerpc/pseries: Add a char driver for physical-attestation RTAS The RTAS call ibm,physical-attestation is used to retrieve information about the trusted boot state of the firmware and hypervisor on the system, and also Trusted Platform Modules (TPM) data if the system is TCG 2.0 compliant. This RTAS interface expects the caller to define different command structs such as RetrieveTPMLog, RetrievePlatformCertificat and etc, in a work area with a maximum size of 4K bytes and the response buffer will be returned in the same work area. The current implementation of this RTAS function is in the user space but allocation of the work area is restricted with the system lockdown. So this patch implements this RTAS function in the kernel and expose to the user space with open/ioctl/read interfaces. PAPR (2.13+ 21.3 ibm,physical-attestation) defines RTAS function: - Pass the command struct to obtain the response buffer for the specific command. - This RTAS function is sequence RTAS call and has to issue RTAS call multiple times to get the complete response buffer (max 64K). The hypervisor expects the first RTAS call with the sequence 1 and the subsequent calls with the sequence number returned from the previous calls. Expose these interfaces to user space with a /dev/papr-physical-attestation character device using the following programming model: int devfd = open("/dev/papr-physical-attestation"); int fd = ioctl(devfd, PAPR_PHY_ATTEST_IOC_HANDLE, struct papr_phy_attest_io_block); - The user space defines the command struct and requests the response for any command. - Obtain the complete response buffer and returned the buffer as blob to the command specific FD. size = read(fd, buf, len); - Can retrieve the response buffer once or multiple times until the end of BLOB buffer. Implemented this new kernel ABI support in librtas library for system lockdown Signed-off-by: Haren Myneni Signed-off-by: Madhavan Srinivasan Link: https://patch.msgid.link/20250416225743.596462-8-haren@linux.ibm.com --- Documentation/userspace-api/ioctl/ioctl-number.rst | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/userspace-api/ioctl/ioctl-number.rst b/Documentation/userspace-api/ioctl/ioctl-number.rst index c4a6266105ec..017a23aeadc3 100644 --- a/Documentation/userspace-api/ioctl/ioctl-number.rst +++ b/Documentation/userspace-api/ioctl/ioctl-number.rst @@ -370,6 +370,8 @@ Code Seq# Include File Comments 0xB2 06-07 arch/powerpc/include/uapi/asm/papr-platform-dump.h powerpc/pseries Platform Dump API +0xB2 08 arch/powerpc/include/uapi/asm/papr-physical-attestation.h powerpc/pseries Physical Attestation API + 0xB3 00 linux/mmc/ioctl.h 0xB4 00-0F linux/gpio.h 0xB5 00-0F uapi/linux/rpmsg.h -- cgit v1.2.3 From 5d7c4697b07b21f790869b18b5d27c0c59f2fd6c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 24 Mar 2025 13:51:04 +0100 Subject: dt-bindings: pinctrl: mediatek: Drop unrelated nodes from DTS example Binding example should not contain other nodes, e.g. consumers of pinctrl of, because this is completely redundant and adds unnecessary bloat. Signed-off-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/20250324125105.81774-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij --- .../devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml | 10 ---------- .../devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml | 5 ----- 2 files changed, 15 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml index bccff08a5ba3..5f2808212f39 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml @@ -136,16 +136,6 @@ examples: #address-cells = <2>; #size-cells = <2>; - syscfg_pctl_a: syscfg-pctl-a@10005000 { - compatible = "mediatek,mt8135-pctl-a-syscfg", "syscon"; - reg = <0 0x10005000 0 0x1000>; - }; - - syscfg_pctl_b: syscfg-pctl-b@1020c020 { - compatible = "mediatek,mt8135-pctl-b-syscfg", "syscon"; - reg = <0 0x1020C020 0 0x1000>; - }; - pinctrl@1c20800 { compatible = "mediatek,mt8135-pinctrl"; reg = <0 0x1000B000 0 0x1000>; diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml index 3bbc00df5548..f4bab7a132d3 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml @@ -245,9 +245,4 @@ examples: }; }; }; - - mmc0 { - pinctrl-0 = <&mmc0_pins_default>; - pinctrl-names = "default"; - }; }; -- cgit v1.2.3 From 31d820fe4244fbb708efc979554f2adf568513c4 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 24 Mar 2025 13:51:05 +0100 Subject: dt-bindings: pinctrl: mediatek: Correct indentation and style in DTS example DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/20250324125105.81774-2-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij --- .../bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml | 85 ++++++++-------------- .../bindings/pinctrl/mediatek,mt7622-pinctrl.yaml | 56 +++++++------- .../bindings/pinctrl/mediatek,mt8183-pinctrl.yaml | 70 +++++++++--------- .../bindings/pinctrl/mediatek,mt8192-pinctrl.yaml | 78 ++++++++++---------- 4 files changed, 134 insertions(+), 155 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml index 5f2808212f39..b9680b896f12 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml @@ -137,64 +137,43 @@ examples: #size-cells = <2>; pinctrl@1c20800 { - compatible = "mediatek,mt8135-pinctrl"; - reg = <0 0x1000B000 0 0x1000>; - mediatek,pctl-regmap = <&syscfg_pctl_a>, <&syscfg_pctl_b>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = , - , - ; - - i2c0_pins_a: i2c0-pins { - pins1 { - pinmux = , - ; - bias-disable; + compatible = "mediatek,mt8135-pinctrl"; + reg = <0 0x1000B000 0 0x1000>; + mediatek,pctl-regmap = <&syscfg_pctl_a>, <&syscfg_pctl_b>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = , + , + ; + + i2c0_pins_a: i2c0-pins { + pins1 { + pinmux = , + ; + bias-disable; + }; }; - }; - i2c1_pins_a: i2c1-pins { - pins { - pinmux = , - ; - bias-pull-up = ; + i2c1_pins_a: i2c1-pins { + pins { + pinmux = , + ; + bias-pull-up = ; + }; }; - }; - i2c2_pins_a: i2c2-pins { - pins1 { - pinmux = ; - bias-pull-down; - }; - - pins2 { - pinmux = ; - bias-pull-up; - }; - }; - - i2c3_pins_a: i2c3-pins { - pins1 { - pinmux = , - ; - bias-pull-up = ; - }; - - pins2 { - pinmux = , - ; - output-low; - bias-pull-up = ; - }; + i2c2_pins_a: i2c2-pins { + pins1 { + pinmux = ; + bias-pull-down; + }; - pins3 { - pinmux = , - ; - drive-strength = <32>; + pins2 { + pinmux = ; + bias-pull-up; + }; }; - }; }; }; diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml index d74cae9d4d65..9acca85184fa 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml @@ -366,34 +366,34 @@ examples: #size-cells = <2>; pio: pinctrl@10211000 { - compatible = "mediatek,mt7622-pinctrl"; - reg = <0 0x10211000 0 0x1000>; - gpio-controller; - #gpio-cells = <2>; - - pinctrl_eth_default: eth-pins { - mux-mdio { - groups = "mdc_mdio"; - function = "eth"; - drive-strength = <12>; + compatible = "mediatek,mt7622-pinctrl"; + reg = <0 0x10211000 0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + + pinctrl_eth_default: eth-pins { + mux-mdio { + groups = "mdc_mdio"; + function = "eth"; + drive-strength = <12>; + }; + + mux-gmac2 { + groups = "rgmii_via_gmac2"; + function = "eth"; + drive-strength = <12>; + }; + + mux-esw { + groups = "esw"; + function = "eth"; + drive-strength = <8>; + }; + + conf-mdio { + pins = "MDC"; + bias-pull-up; + }; }; - - mux-gmac2 { - groups = "rgmii_via_gmac2"; - function = "eth"; - drive-strength = <12>; - }; - - mux-esw { - groups = "esw"; - function = "eth"; - drive-strength = <8>; - }; - - conf-mdio { - pins = "MDC"; - bias-pull-up; - }; - }; }; }; diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml index 8507bd15f243..464879274cae 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml @@ -195,43 +195,43 @@ examples: #size-cells = <2>; pio: pinctrl@10005000 { - compatible = "mediatek,mt8183-pinctrl"; - reg = <0 0x10005000 0 0x1000>, - <0 0x11f20000 0 0x1000>, - <0 0x11e80000 0 0x1000>, - <0 0x11e70000 0 0x1000>, - <0 0x11e90000 0 0x1000>, - <0 0x11d30000 0 0x1000>, - <0 0x11d20000 0 0x1000>, - <0 0x11c50000 0 0x1000>, - <0 0x11f30000 0 0x1000>, - <0 0x1000b000 0 0x1000>; - reg-names = "iocfg0", "iocfg1", "iocfg2", - "iocfg3", "iocfg4", "iocfg5", - "iocfg6", "iocfg7", "iocfg8", - "eint"; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pio 0 0 192>; - interrupt-controller; - interrupts = ; - #interrupt-cells = <2>; - - i2c0_pins_a: i2c0-pins { - pins1 { - pinmux = , - ; - mediatek,pull-up-adv = <3>; - drive-strength-microamp = <1000>; + compatible = "mediatek,mt8183-pinctrl"; + reg = <0 0x10005000 0 0x1000>, + <0 0x11f20000 0 0x1000>, + <0 0x11e80000 0 0x1000>, + <0 0x11e70000 0 0x1000>, + <0 0x11e90000 0 0x1000>, + <0 0x11d30000 0 0x1000>, + <0 0x11d20000 0 0x1000>, + <0 0x11c50000 0 0x1000>, + <0 0x11f30000 0 0x1000>, + <0 0x1000b000 0 0x1000>; + reg-names = "iocfg0", "iocfg1", "iocfg2", + "iocfg3", "iocfg4", "iocfg5", + "iocfg6", "iocfg7", "iocfg8", + "eint"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pio 0 0 192>; + interrupt-controller; + interrupts = ; + #interrupt-cells = <2>; + + i2c0_pins_a: i2c0-pins { + pins1 { + pinmux = , + ; + mediatek,pull-up-adv = <3>; + drive-strength-microamp = <1000>; + }; }; - }; - i2c1_pins_a: i2c1-pins { - pins { - pinmux = , - ; - mediatek,pull-down-adv = <2>; + i2c1_pins_a: i2c1-pins { + pins { + pinmux = , + ; + mediatek,pull-down-adv = <2>; + }; }; - }; }; }; diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml index 1686427eb854..949dcd6fd847 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml @@ -142,43 +142,43 @@ additionalProperties: false examples: - | - #include - #include - pio: pinctrl@10005000 { - compatible = "mediatek,mt8192-pinctrl"; - reg = <0x10005000 0x1000>, - <0x11c20000 0x1000>, - <0x11d10000 0x1000>, - <0x11d30000 0x1000>, - <0x11d40000 0x1000>, - <0x11e20000 0x1000>, - <0x11e70000 0x1000>, - <0x11ea0000 0x1000>, - <0x11f20000 0x1000>, - <0x11f30000 0x1000>, - <0x1000b000 0x1000>; - reg-names = "iocfg0", "iocfg_rm", "iocfg_bm", - "iocfg_bl", "iocfg_br", "iocfg_lm", - "iocfg_lb", "iocfg_rt", "iocfg_lt", - "iocfg_tl", "eint"; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pio 0 0 220>; - interrupt-controller; - interrupts = ; - #interrupt-cells = <2>; - - spi1-default-pins { - pins-cs-mosi-clk { - pinmux = , - , - ; - bias-disable; - }; - - pins-miso { - pinmux = ; - bias-pull-down; - }; - }; + #include + #include + pio: pinctrl@10005000 { + compatible = "mediatek,mt8192-pinctrl"; + reg = <0x10005000 0x1000>, + <0x11c20000 0x1000>, + <0x11d10000 0x1000>, + <0x11d30000 0x1000>, + <0x11d40000 0x1000>, + <0x11e20000 0x1000>, + <0x11e70000 0x1000>, + <0x11ea0000 0x1000>, + <0x11f20000 0x1000>, + <0x11f30000 0x1000>, + <0x1000b000 0x1000>; + reg-names = "iocfg0", "iocfg_rm", "iocfg_bm", + "iocfg_bl", "iocfg_br", "iocfg_lm", + "iocfg_lb", "iocfg_rt", "iocfg_lt", + "iocfg_tl", "eint"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pio 0 0 220>; + interrupt-controller; + interrupts = ; + #interrupt-cells = <2>; + + spi1-default-pins { + pins-cs-mosi-clk { + pinmux = , + , + ; + bias-disable; }; + + pins-miso { + pinmux = ; + bias-pull-down; + }; + }; + }; -- cgit v1.2.3 From 7acdd10e2219fe17a4af0b8a3846ebe6b42055b5 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 10 Apr 2025 16:40:42 +0200 Subject: dt-bindings: pinctrl: mediatek: Add support for MT6893 Add bindings for the pin controller found in the MediaTek Dimensity 1200 (MT6983) SoC. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/20250410144044.476060-2-angelogioacchino.delregno@collabora.com Signed-off-by: Linus Walleij --- .../bindings/pinctrl/mediatek,mt6893-pinctrl.yaml | 193 +++++++++++++++++++++ 1 file changed, 193 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/mediatek,mt6893-pinctrl.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6893-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6893-pinctrl.yaml new file mode 100644 index 000000000000..fa189fe00624 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6893-pinctrl.yaml @@ -0,0 +1,193 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/mediatek,mt6893-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6893 Pin Controller + +maintainers: + - AngeloGioacchino Del Regno + +description: + The MediaTek's MT6893 Pin controller is used to control SoC pins. + +properties: + compatible: + const: mediatek,mt6893-pinctrl + + reg: + items: + - description: pin controller base + - description: rm group IO + - description: bm group IO + - description: lm group IO + - description: lb group IO + - description: rt group IO + - description: lt group IO + - description: tm group IO + - description: External Interrupt (EINT) controller base + + reg-names: + items: + - const: base + - const: rm + - const: bm + - const: lm + - const: lb + - const: rt + - const: lt + - const: tm + - const: eint + + gpio-controller: true + + '#gpio-cells': + description: + Number of cells in GPIO specifier. Since the generic GPIO binding is used, + the amount of cells must be specified as 2. See the below mentioned gpio + binding representation for description of particular cells. + const: 2 + + gpio-ranges: + maxItems: 1 + + gpio-line-names: true + + interrupts: + description: The interrupt outputs to sysirq + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + +# PIN CONFIGURATION NODES +patternProperties: + '-pins$': + type: object + additionalProperties: false + + patternProperties: + '^pins': + type: object + allOf: + - $ref: /schemas/pinctrl/pincfg-node.yaml + - $ref: /schemas/pinctrl/pinmux-node.yaml + description: + A pinctrl node should contain at least one subnodes representing the + pinctrl groups available on the machine. Each subnode will list the + pins it needs, and how they should be configured, with regard to muxer + configuration, pullups, drive strength, input enable/disable and input + schmitt. + + properties: + pinmux: + description: + Integer array, represents gpio pin number and mux setting. + Supported pin number and mux are defined as macros in + arch/arm64/boot/dts/mediatek/mt8196-pinfunc.h for this SoC. + + drive-strength: + enum: [2, 4, 6, 8, 10, 12, 14, 16] + + drive-strength-microamp: + enum: [125, 250, 500, 1000] + + bias-pull-down: + oneOf: + - type: boolean + - enum: [75000, 5000] + description: Pull down RSEL type resistance values (in ohms) + description: + For normal pull down type there is no need to specify a resistance + value, hence this can be specified as a boolean property. + For RSEL pull down type a resistance value (in ohms) can be added. + + bias-pull-up: + oneOf: + - type: boolean + - enum: [10000, 5000, 4000, 3000] + description: Pull up RSEL type resistance values (in ohms) + description: + For normal pull up type there is no need to specify a resistance + value, hence this can be specified as a boolean property. + For RSEL pull up type a resistance value (in ohms) can be added. + + bias-disable: true + + output-high: true + + output-low: true + + input-enable: true + + input-disable: true + + input-schmitt-enable: true + + input-schmitt-disable: true + + required: + - pinmux + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - gpio-controller + - '#gpio-cells' + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include + #include + #define PINMUX_GPIO0__FUNC_GPIO0 (MTK_PIN_NO(0) | 0) + #define PINMUX_GPIO99__FUNC_SCL0 (MTK_PIN_NO(99) | 1) + #define PINMUX_GPIO100__FUNC_SDA0 (MTK_PIN_NO(100) | 1) + + pio: pinctrl@10005000 { + compatible = "mediatek,mt6893-pinctrl"; + reg = <0x10005000 0x1000>, + <0x11c20000 0x0200>, + <0x11d10000 0x0200>, + <0x11e20000 0x0200>, + <0x11e70000 0x0200>, + <0x11ea0000 0x0200>, + <0x11f20000 0x0200>, + <0x11f30000 0x0200>, + <0x1100b000 0x1000>; + reg-names = "base", "rm", "bm", "lm", "lb", "rt", + "lt", "tm", "eint"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pio 0 0 220>; + interrupt-controller; + interrupts = ; + #interrupt-cells = <2>; + + gpio-pins { + pins { + pinmux = ; + bias-pull-up = <4000>; + drive-strength = <6>; + }; + }; + + i2c0-pins { + pins-bus { + pinmux = , + ; + bias-pull-down = <75000>; + drive-strength-microamp = <1000>; + }; + }; + }; -- cgit v1.2.3 From 4c9891e588692f2b78132f4de3e3d639b7e84210 Mon Sep 17 00:00:00 2001 From: Cathy Xu Date: Mon, 14 Apr 2025 16:59:26 +0800 Subject: dt-bindings: pinctrl: mediatek: Add support for mt8196 Add the new binding document for pinctrl on MediaTek mt8196. Signed-off-by: Guodong Liu Signed-off-by: Cathy Xu Reviewed-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/20250414090215.16091-2-ot_cathy.xu@mediatek.com Signed-off-by: Linus Walleij --- .../bindings/pinctrl/mediatek,mt8196-pinctrl.yaml | 236 +++++++++++++++++++++ 1 file changed, 236 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/mediatek,mt8196-pinctrl.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8196-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8196-pinctrl.yaml new file mode 100644 index 000000000000..9082bd625e2f --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8196-pinctrl.yaml @@ -0,0 +1,236 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8196-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT8196 Pin Controller + +maintainers: + - Lei Xue + - Cathy Xu + +description: + The MediaTek's MT8196 Pin controller is used to control SoC pins. + +properties: + compatible: + const: mediatek,mt8196-pinctrl + + reg: + items: + - description: gpio base + - description: rt group IO + - description: rm1 group IO + - description: rm2 group IO + - description: rb group IO + - description: bm1 group IO + - description: bm2 group IO + - description: bm3 group IO + - description: lt group IO + - description: lm1 group IO + - description: lm2 group IO + - description: lb1 group IO + - description: lb2 group IO + - description: tm1 group IO + - description: tm2 group IO + - description: tm3 group IO + - description: eint0 group IO + - description: eint1 group IO + - description: eint2 group IO + - description: eint3 group IO + - description: eint4 group IO + + reg-names: + items: + - const: base + - const: rt + - const: rm1 + - const: rm2 + - const: rb + - const: bm1 + - const: bm2 + - const: bm3 + - const: lt + - const: lm1 + - const: lm2 + - const: lb1 + - const: lb2 + - const: tm1 + - const: tm2 + - const: tm3 + - const: eint0 + - const: eint1 + - const: eint2 + - const: eint3 + - const: eint4 + + interrupts: + description: The interrupt outputs to sysirq. + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + gpio-controller: true + + '#gpio-cells': + description: + Number of cells in GPIO specifier, should be two. The first cell is the + pin number, the second cell is used to specify optional parameters which + are defined in . + const: 2 + + gpio-ranges: + maxItems: 1 + + gpio-line-names: true + +# PIN CONFIGURATION NODES +patternProperties: + '-pins$': + type: object + additionalProperties: false + + patternProperties: + '^pins': + type: object + $ref: /schemas/pinctrl/pincfg-node.yaml + additionalProperties: false + description: + A pinctrl node should contain at least one subnode representing the + pinctrl groups available on the machine. Each subnode will list the + pins it needs, and how they should be configured, with regard to muxer + configuration, pullups, drive strength, input enable/disable and input + schmitt. + + properties: + pinmux: + description: + Integer array, represents gpio pin number and mux setting. + Supported pin number and mux varies for different SoCs, and are + defined as macros in arch/arm64/boot/dts/mediatek/mt8196-pinfunc.h + directly, for this SoC. + + drive-strength: + enum: [2, 4, 6, 8, 10, 12, 14, 16] + + bias-pull-down: + oneOf: + - type: boolean + - enum: [100, 101, 102, 103] + description: mt8196 pull down PUPD/R0/R1 type define value. + - enum: [75000, 5000] + description: mt8196 pull down RSEL type si unit value(ohm). + description: | + For pull down type is normal, it doesn't need add R1R0 define + and resistance value. + For pull down type is PUPD/R0/R1 type, it can add R1R0 define to + set different resistance. It can support "MTK_PUPD_SET_R1R0_00" & + "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & + "MTK_PUPD_SET_R1R0_11" define in mt8196. + For pull down type is PD/RSEL, it can add resistance value(ohm) + to set different resistance by identifying property + "mediatek,rsel-resistance-in-si-unit". It can support resistance + value(ohm) "75000" & "5000" in mt8196. + + bias-pull-up: + oneOf: + - type: boolean + - enum: [100, 101, 102, 103] + description: mt8196 pull up PUPD/R0/R1 type define value. + - enum: [1000, 1500, 2000, 3000, 4000, 5000, 75000] + description: mt8196 pull up RSEL type si unit value(ohm). + description: | + For pull up type is normal, it don't need add R1R0 define + and resistance value. + For pull up type is PUPD/R0/R1 type, it can add R1R0 define to + set different resistance. It can support "MTK_PUPD_SET_R1R0_00" & + "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & + "MTK_PUPD_SET_R1R0_11" define in mt8196. + For pull up type is PU/RSEL, it can add resistance value(ohm) + to set different resistance by identifying property + "mediatek,rsel-resistance-in-si-unit". It can support resistance + value(ohm) "1000" & "1500" & "2000" & "3000" & "4000" & "5000" & + "75000" in mt8196. + + bias-disable: true + + output-high: true + + output-low: true + + input-enable: true + + input-disable: true + + input-schmitt-enable: true + + input-schmitt-disable: true + + required: + - pinmux + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - gpio-controller + - '#gpio-cells' + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include + #include + #define PINMUX_GPIO99__FUNC_SCL0 (MTK_PIN_NO(99) | 1) + #define PINMUX_GPIO100__FUNC_SDA0 (MTK_PIN_NO(100) | 1) + + pio: pinctrl@1002d000 { + compatible = "mediatek,mt8196-pinctrl"; + reg = <0x1002d000 0x1000>, + <0x12000000 0x1000>, + <0x12020000 0x1000>, + <0x12040000 0x1000>, + <0x12060000 0x1000>, + <0x12820000 0x1000>, + <0x12840000 0x1000>, + <0x12860000 0x1000>, + <0x13000000 0x1000>, + <0x13020000 0x1000>, + <0x13040000 0x1000>, + <0x130f0000 0x1000>, + <0x13110000 0x1000>, + <0x13800000 0x1000>, + <0x13820000 0x1000>, + <0x13860000 0x1000>, + <0x12080000 0x1000>, + <0x12880000 0x1000>, + <0x13080000 0x1000>, + <0x13880000 0x1000>, + <0x1c54a000 0x1000>; + reg-names = "base", "rt", "rm1", "rm2", "rb" , "bm1", + "bm2", "bm3", "lt", "lm1", "lm2", "lb1", + "lb2", "tm1", "tm2", "tm3", "eint0", "eint1", + "eint2", "eint3", "eint4"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pio 0 0 271>; + interrupt-controller; + interrupts = ; + #interrupt-cells = <2>; + + i2c0-pins { + pins { + pinmux = , + ; + bias-disable; + }; + }; + }; -- cgit v1.2.3 From 829d06ba6c502b8c2c7390463fb21d12b4e9b2a5 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Wed, 16 Apr 2025 11:08:46 -0400 Subject: dt-bindings: pinctrl: convert fsl,vf610-pinctrl.txt to yaml format Convert fsl,vf610-pinctrl.txt to yaml format. Additional changes: - subnode name force pattern to 'grp$' to align other imx chips. Reviewed-by: Rob Herring (Arm) Signed-off-by: Frank Li Link: https://lore.kernel.org/20250416150847.3422218-1-Frank.Li@nxp.com Signed-off-by: Linus Walleij --- .../bindings/pinctrl/fsl,vf610-iomuxc.yaml | 83 ++++++++++++++++++++++ .../bindings/pinctrl/fsl,vf610-pinctrl.txt | 41 ----------- 2 files changed, 83 insertions(+), 41 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,vf610-iomuxc.yaml delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,vf610-pinctrl.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,vf610-iomuxc.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,vf610-iomuxc.yaml new file mode 100644 index 000000000000..3e13587df310 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,vf610-iomuxc.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/fsl,vf610-iomuxc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale Vybrid VF610 IOMUX Controller + +description: + Please refer to fsl,imx-pinctrl.txt in this directory for common binding part + and usage. + +maintainers: + - Frank Li + +properties: + compatible: + const: fsl,vf610-iomuxc + + reg: + maxItems: 1 + +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + fsl,pins: + description: + two integers array, represents a group of pins mux and config setting. + The format is fsl,pins = , PIN_FUNC_ID is a pin + working on a specific function, CONFIG is the pad setting value such + as pull-up, speed, ode for this pin. Please refer to Vybrid VF610 + datasheet for the valid pad config settings. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: + PIN_FUN_ID refer to vf610-pinfunc.h in device tree source folder + for all available PIN_FUNC_ID for Vybrid VF610. + - description: | + CONFIG bits definition is + PAD_CTL_SPEED_LOW (1 << 12) + PAD_CTL_SPEED_MED (2 << 12) + PAD_CTL_SPEED_HIGH (3 << 12) + PAD_CTL_SRE_FAST (1 << 11) + PAD_CTL_SRE_SLOW (0 << 11) + PAD_CTL_ODE (1 << 10) + PAD_CTL_HYS (1 << 9) + PAD_CTL_DSE_DISABLE (0 << 6) + PAD_CTL_DSE_150ohm (1 << 6) + PAD_CTL_DSE_75ohm (2 << 6) + PAD_CTL_DSE_50ohm (3 << 6) + PAD_CTL_DSE_37ohm (4 << 6) + PAD_CTL_DSE_30ohm (5 << 6) + PAD_CTL_DSE_25ohm (6 << 6) + PAD_CTL_DSE_20ohm (7 << 6) + PAD_CTL_PUS_100K_DOWN (0 << 4) + PAD_CTL_PUS_47K_UP (1 << 4) + PAD_CTL_PUS_100K_UP (2 << 4) + PAD_CTL_PUS_22K_UP (3 << 4) + PAD_CTL_PKE (1 << 3) + PAD_CTL_PUE (1 << 2) + PAD_CTL_OBE_ENABLE (1 << 1) + PAD_CTL_IBE_ENABLE (1 << 0) + PAD_CTL_OBE_IBE_ENABLE (3 << 0) + + required: + - fsl,pins + + additionalProperties: false + +required: + - compatible + - reg + +allOf: + - $ref: pinctrl.yaml# + +unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,vf610-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,vf610-pinctrl.txt deleted file mode 100644 index ddcdeb697c29..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/fsl,vf610-pinctrl.txt +++ /dev/null @@ -1,41 +0,0 @@ -Freescale Vybrid VF610 IOMUX Controller - -Please refer to fsl,imx-pinctrl.txt in this directory for common binding part -and usage. - -Required properties: -- compatible: "fsl,vf610-iomuxc" -- fsl,pins: two integers array, represents a group of pins mux and config - setting. The format is fsl,pins = , PIN_FUNC_ID is - a pin working on a specific function, CONFIG is the pad setting value - such as pull-up, speed, ode for this pin. Please refer to Vybrid VF610 - datasheet for the valid pad config settings. - -CONFIG bits definition: -PAD_CTL_SPEED_LOW (1 << 12) -PAD_CTL_SPEED_MED (2 << 12) -PAD_CTL_SPEED_HIGH (3 << 12) -PAD_CTL_SRE_FAST (1 << 11) -PAD_CTL_SRE_SLOW (0 << 11) -PAD_CTL_ODE (1 << 10) -PAD_CTL_HYS (1 << 9) -PAD_CTL_DSE_DISABLE (0 << 6) -PAD_CTL_DSE_150ohm (1 << 6) -PAD_CTL_DSE_75ohm (2 << 6) -PAD_CTL_DSE_50ohm (3 << 6) -PAD_CTL_DSE_37ohm (4 << 6) -PAD_CTL_DSE_30ohm (5 << 6) -PAD_CTL_DSE_25ohm (6 << 6) -PAD_CTL_DSE_20ohm (7 << 6) -PAD_CTL_PUS_100K_DOWN (0 << 4) -PAD_CTL_PUS_47K_UP (1 << 4) -PAD_CTL_PUS_100K_UP (2 << 4) -PAD_CTL_PUS_22K_UP (3 << 4) -PAD_CTL_PKE (1 << 3) -PAD_CTL_PUE (1 << 2) -PAD_CTL_OBE_ENABLE (1 << 1) -PAD_CTL_IBE_ENABLE (1 << 0) -PAD_CTL_OBE_IBE_ENABLE (3 << 0) - -Please refer to vf610-pinfunc.h in device tree source folder -for all available PIN_FUNC_ID for Vybrid VF610. -- cgit v1.2.3 From 9549d22684f19919f23576977830eca3d7b0cd90 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Wed, 26 Feb 2025 14:45:20 +0000 Subject: dt-bindings: pwm: Add RZ/G2L GPT binding MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add device tree bindings for the General PWM Timer (GPT). Reviewed-by: Rob Herring Signed-off-by: Biju Das Link: https://lore.kernel.org/r/20250226144531.176819-2-biju.das.jz@bp.renesas.com Signed-off-by: Uwe Kleine-König --- .../devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml | 378 +++++++++++++++++++++ 1 file changed, 378 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml b/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml new file mode 100644 index 000000000000..13b807765a30 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml @@ -0,0 +1,378 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/renesas,rzg2l-gpt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/G2L General PWM Timer (GPT) + +maintainers: + - Biju Das + +description: | + RZ/G2L General PWM Timer (GPT) composed of 8 channels with 32-bit timer + (GPT32E). It supports the following functions + * 32 bits x 8 channels. + * Up-counting or down-counting (saw waves) or up/down-counting + (triangle waves) for each counter. + * Clock sources independently selectable for each channel. + * Two I/O pins per channel. + * Two output compare/input capture registers per channel. + * For the two output compare/input capture registers of each channel, + four registers are provided as buffer registers and are capable of + operating as comparison registers when buffering is not in use. + * In output compare operation, buffer switching can be at crests or + troughs, enabling the generation of laterally asymmetric PWM waveforms. + * Registers for setting up frame cycles in each channel (with capability + for generating interrupts at overflow or underflow) + * Generation of dead times in PWM operation. + * Synchronous starting, stopping and clearing counters for arbitrary + channels. + * Starting, stopping, clearing and up/down counters in response to input + level comparison. + * Starting, clearing, stopping and up/down counters in response to a + maximum of four external triggers. + * Output pin disable function by dead time error and detected + short-circuits between output pins. + * A/D converter start triggers can be generated (GPT32E0 to GPT32E3) + * Enables the noise filter for input capture and external trigger + operation. + + The below pwm channels are supported. + pwm0 - GPT32E0.GTIOC0A channel + pwm1 - GPT32E0.GTIOC0B channel + pwm2 - GPT32E1.GTIOC1A channel + pwm3 - GPT32E1.GTIOC1B channel + pwm4 - GPT32E2.GTIOC2A channel + pwm5 - GPT32E2.GTIOC2B channel + pwm6 - GPT32E3.GTIOC3A channel + pwm7 - GPT32E3.GTIOC3B channel + pwm8 - GPT32E4.GTIOC4A channel + pwm9 - GPT32E4.GTIOC4B channel + pwm10 - GPT32E5.GTIOC5A channel + pwm11 - GPT32E5.GTIOC5B channel + pwm12 - GPT32E6.GTIOC6A channel + pwm13 - GPT32E6.GTIOC6B channel + pwm14 - GPT32E7.GTIOC7A channel + pwm15 - GPT32E7.GTIOC7B channel + +properties: + compatible: + items: + - enum: + - renesas,r9a07g044-gpt # RZ/G2{L,LC} + - renesas,r9a07g054-gpt # RZ/V2L + - const: renesas,rzg2l-gpt + + reg: + maxItems: 1 + + '#pwm-cells': + const: 3 + + interrupts: + items: + - description: GPT32E0.GTCCRA input capture/compare match + - description: GPT32E0.GTCCRB input capture/compare + - description: GPT32E0.GTCCRC compare match + - description: GPT32E0.GTCCRD compare match + - description: GPT32E0.GTCCRE compare match + - description: GPT32E0.GTCCRF compare match + - description: GPT32E0.GTADTRA compare match + - description: GPT32E0.GTADTRB compare match + - description: GPT32E0.GTCNT overflow/GTPR compare match + - description: GPT32E0.GTCNT underflow + - description: GPT32E1.GTCCRA input capture/compare match + - description: GPT32E1.GTCCRB input capture/compare + - description: GPT32E1.GTCCRC compare match + - description: GPT32E1.GTCCRD compare match + - description: GPT32E1.GTCCRE compare match + - description: GPT32E1.GTCCRF compare match + - description: GPT32E1.GTADTRA compare match + - description: GPT32E1.GTADTRB compare match + - description: GPT32E1.GTCNT overflow/GTPR compare match + - description: GPT32E1.GTCNT underflow + - description: GPT32E2.GTCCRA input capture/compare match + - description: GPT32E2.GTCCRB input capture/compare + - description: GPT32E2.GTCCRC compare match + - description: GPT32E2.GTCCRD compare match + - description: GPT32E2.GTCCRE compare match + - description: GPT32E2.GTCCRF compare match + - description: GPT32E2.GTADTRA compare match + - description: GPT32E2.GTADTRB compare match + - description: GPT32E2.GTCNT overflow/GTPR compare match + - description: GPT32E2.GTCNT underflow + - description: GPT32E3.GTCCRA input capture/compare match + - description: GPT32E3.GTCCRB input capture/compare + - description: GPT32E3.GTCCRC compare match + - description: GPT32E3.GTCCRD compare match + - description: GPT32E3.GTCCRE compare match + - description: GPT32E3.GTCCRF compare match + - description: GPT32E3.GTADTRA compare match + - description: GPT32E3.GTADTRB compare match + - description: GPT32E3.GTCNT overflow/GTPR compare match + - description: GPT32E3.GTCNT underflow + - description: GPT32E4.GTCCRA input capture/compare match + - description: GPT32E4.GTCCRB input capture/compare + - description: GPT32E4.GTCCRC compare match + - description: GPT32E4.GTCCRD compare match + - description: GPT32E4.GTCCRE compare match + - description: GPT32E4.GTCCRF compare match + - description: GPT32E4.GTADTRA compare match + - description: GPT32E4.GTADTRB compare match + - description: GPT32E4.GTCNT overflow/GTPR compare match + - description: GPT32E4.GTCNT underflow + - description: GPT32E5.GTCCRA input capture/compare match + - description: GPT32E5.GTCCRB input capture/compare + - description: GPT32E5.GTCCRC compare match + - description: GPT32E5.GTCCRD compare match + - description: GPT32E5.GTCCRE compare match + - description: GPT32E5.GTCCRF compare match + - description: GPT32E5.GTADTRA compare match + - description: GPT32E5.GTADTRB compare match + - description: GPT32E5.GTCNT overflow/GTPR compare match + - description: GPT32E5.GTCNT underflow + - description: GPT32E6.GTCCRA input capture/compare match + - description: GPT32E6.GTCCRB input capture/compare + - description: GPT32E6.GTCCRC compare match + - description: GPT32E6.GTCCRD compare match + - description: GPT32E6.GTCCRE compare match + - description: GPT32E6.GTCCRF compare match + - description: GPT32E6.GTADTRA compare match + - description: GPT32E6.GTADTRB compare match + - description: GPT32E6.GTCNT overflow/GTPR compare match + - description: GPT32E6.GTCNT underflow + - description: GPT32E7.GTCCRA input capture/compare match + - description: GPT32E7.GTCCRB input capture/compare + - description: GPT32E7.GTCCRC compare match + - description: GPT32E7.GTCCRD compare match + - description: GPT32E7.GTCCRE compare match + - description: GPT32E7.GTCCRF compare match + - description: GPT32E7.GTADTRA compare match + - description: GPT32E7.GTADTRB compare match + - description: GPT32E7.GTCNT overflow/GTPR compare match + - description: GPT32E7.GTCNT underflow + + interrupt-names: + items: + - const: ccmpa0 + - const: ccmpb0 + - const: cmpc0 + - const: cmpd0 + - const: cmpe0 + - const: cmpf0 + - const: adtrga0 + - const: adtrgb0 + - const: ovf0 + - const: unf0 + - const: ccmpa1 + - const: ccmpb1 + - const: cmpc1 + - const: cmpd1 + - const: cmpe1 + - const: cmpf1 + - const: adtrga1 + - const: adtrgb1 + - const: ovf1 + - const: unf1 + - const: ccmpa2 + - const: ccmpb2 + - const: cmpc2 + - const: cmpd2 + - const: cmpe2 + - const: cmpf2 + - const: adtrga2 + - const: adtrgb2 + - const: ovf2 + - const: unf2 + - const: ccmpa3 + - const: ccmpb3 + - const: cmpc3 + - const: cmpd3 + - const: cmpe3 + - const: cmpf3 + - const: adtrga3 + - const: adtrgb3 + - const: ovf3 + - const: unf3 + - const: ccmpa4 + - const: ccmpb4 + - const: cmpc4 + - const: cmpd4 + - const: cmpe4 + - const: cmpf4 + - const: adtrga4 + - const: adtrgb4 + - const: ovf4 + - const: unf4 + - const: ccmpa5 + - const: ccmpb5 + - const: cmpc5 + - const: cmpd5 + - const: cmpe5 + - const: cmpf5 + - const: adtrga5 + - const: adtrgb5 + - const: ovf5 + - const: unf5 + - const: ccmpa6 + - const: ccmpb6 + - const: cmpc6 + - const: cmpd6 + - const: cmpe6 + - const: cmpf6 + - const: adtrga6 + - const: adtrgb6 + - const: ovf6 + - const: unf6 + - const: ccmpa7 + - const: ccmpb7 + - const: cmpc7 + - const: cmpd7 + - const: cmpe7 + - const: cmpf7 + - const: adtrga7 + - const: adtrgb7 + - const: ovf7 + - const: unf7 + + clocks: + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - power-domains + - resets + +allOf: + - $ref: pwm.yaml# + +additionalProperties: false + +examples: + - | + #include + #include + + gpt: pwm@10048000 { + compatible = "renesas,r9a07g044-gpt", "renesas,rzg2l-gpt"; + reg = <0x10048000 0x800>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "ccmpa0", "ccmpb0", "cmpc0", "cmpd0", + "cmpe0", "cmpf0", "adtrga0", "adtrgb0", + "ovf0", "unf0", + "ccmpa1", "ccmpb1", "cmpc1", "cmpd1", + "cmpe1", "cmpf1", "adtrga1", "adtrgb1", + "ovf1", "unf1", + "ccmpa2", "ccmpb2", "cmpc2", "cmpd2", + "cmpe2", "cmpf2", "adtrga2", "adtrgb2", + "ovf2", "unf2", + "ccmpa3", "ccmpb3", "cmpc3", "cmpd3", + "cmpe3", "cmpf3", "adtrga3", "adtrgb3", + "ovf3", "unf3", + "ccmpa4", "ccmpb4", "cmpc4", "cmpd4", + "cmpe4", "cmpf4", "adtrga4", "adtrgb4", + "ovf4", "unf4", + "ccmpa5", "ccmpb5", "cmpc5", "cmpd5", + "cmpe5", "cmpf5", "adtrga5", "adtrgb5", + "ovf5", "unf5", + "ccmpa6", "ccmpb6", "cmpc6", "cmpd6", + "cmpe6", "cmpf6", "adtrga6", "adtrgb6", + "ovf6", "unf6", + "ccmpa7", "ccmpb7", "cmpc7", "cmpd7", + "cmpe7", "cmpf7", "adtrga7", "adtrgb7", + "ovf7", "unf7"; + clocks = <&cpg CPG_MOD R9A07G044_GPT_PCLK>; + power-domains = <&cpg>; + resets = <&cpg R9A07G044_GPT_RST_C>; + #pwm-cells = <3>; + }; -- cgit v1.2.3 From b7a63391aa982295bbb3125e7d4470f51f31ff0f Mon Sep 17 00:00:00 2001 From: Antonio Quartulli Date: Tue, 15 Apr 2025 13:17:19 +0200 Subject: ovpn: add basic netlink support This commit introduces basic netlink support with family registration/unregistration functionalities and stub pre/post-doit. More importantly it introduces the YAML uAPI description along with its auto-generated files: - include/uapi/linux/ovpn.h - drivers/net/ovpn/netlink-gen.c - drivers/net/ovpn/netlink-gen.h Reviewed-by: Donald Hunter Signed-off-by: Antonio Quartulli Link: https://patch.msgid.link/20250415-b4-ovpn-v26-2-577f6097b964@openvpn.net Reviewed-by: Sabrina Dubroca Tested-by: Oleksandr Natalenko Signed-off-by: Paolo Abeni --- Documentation/netlink/specs/ovpn.yaml | 367 ++++++++++++++++++++++++++++++++++ 1 file changed, 367 insertions(+) create mode 100644 Documentation/netlink/specs/ovpn.yaml (limited to 'Documentation') diff --git a/Documentation/netlink/specs/ovpn.yaml b/Documentation/netlink/specs/ovpn.yaml new file mode 100644 index 000000000000..096c51f0c69a --- /dev/null +++ b/Documentation/netlink/specs/ovpn.yaml @@ -0,0 +1,367 @@ +# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) +# +# Author: Antonio Quartulli +# +# Copyright (c) 2024-2025, OpenVPN Inc. +# + +name: ovpn + +protocol: genetlink + +doc: Netlink protocol to control OpenVPN network devices + +definitions: + - + type: const + name: nonce-tail-size + value: 8 + - + type: enum + name: cipher-alg + entries: [ none, aes-gcm, chacha20-poly1305 ] + - + type: enum + name: del-peer-reason + entries: + - teardown + - userspace + - expired + - transport-error + - transport-disconnect + - + type: enum + name: key-slot + entries: [ primary, secondary ] + +attribute-sets: + - + name: peer + attributes: + - + name: id + type: u32 + doc: >- + The unique ID of the peer in the device context. To be used to identify + peers during operations for a specific device + checks: + max: 0xFFFFFF + - + name: remote-ipv4 + type: u32 + doc: The remote IPv4 address of the peer + byte-order: big-endian + display-hint: ipv4 + - + name: remote-ipv6 + type: binary + doc: The remote IPv6 address of the peer + display-hint: ipv6 + checks: + exact-len: 16 + - + name: remote-ipv6-scope-id + type: u32 + doc: The scope id of the remote IPv6 address of the peer (RFC2553) + - + name: remote-port + type: u16 + doc: The remote port of the peer + byte-order: big-endian + checks: + min: 1 + - + name: socket + type: u32 + doc: The socket to be used to communicate with the peer + - + name: socket-netnsid + type: s32 + doc: The ID of the netns the socket assigned to this peer lives in + - + name: vpn-ipv4 + type: u32 + doc: The IPv4 address assigned to the peer by the server + byte-order: big-endian + display-hint: ipv4 + - + name: vpn-ipv6 + type: binary + doc: The IPv6 address assigned to the peer by the server + display-hint: ipv6 + checks: + exact-len: 16 + - + name: local-ipv4 + type: u32 + doc: The local IPv4 to be used to send packets to the peer (UDP only) + byte-order: big-endian + display-hint: ipv4 + - + name: local-ipv6 + type: binary + doc: The local IPv6 to be used to send packets to the peer (UDP only) + display-hint: ipv6 + checks: + exact-len: 16 + - + name: local-port + type: u16 + doc: The local port to be used to send packets to the peer (UDP only) + byte-order: big-endian + checks: + min: 1 + - + name: keepalive-interval + type: u32 + doc: >- + The number of seconds after which a keep alive message is sent to the + peer + - + name: keepalive-timeout + type: u32 + doc: >- + The number of seconds from the last activity after which the peer is + assumed dead + - + name: del-reason + type: u32 + doc: The reason why a peer was deleted + enum: del-peer-reason + - + name: vpn-rx-bytes + type: uint + doc: Number of bytes received over the tunnel + - + name: vpn-tx-bytes + type: uint + doc: Number of bytes transmitted over the tunnel + - + name: vpn-rx-packets + type: uint + doc: Number of packets received over the tunnel + - + name: vpn-tx-packets + type: uint + doc: Number of packets transmitted over the tunnel + - + name: link-rx-bytes + type: uint + doc: Number of bytes received at the transport level + - + name: link-tx-bytes + type: uint + doc: Number of bytes transmitted at the transport level + - + name: link-rx-packets + type: uint + doc: Number of packets received at the transport level + - + name: link-tx-packets + type: uint + doc: Number of packets transmitted at the transport level + - + name: keyconf + attributes: + - + name: peer-id + type: u32 + doc: >- + The unique ID of the peer in the device context. To be used to + identify peers during key operations + checks: + max: 0xFFFFFF + - + name: slot + type: u32 + doc: The slot where the key should be stored + enum: key-slot + - + name: key-id + doc: >- + The unique ID of the key in the peer context. Used to fetch the + correct key upon decryption + type: u32 + checks: + max: 7 + - + name: cipher-alg + type: u32 + doc: The cipher to be used when communicating with the peer + enum: cipher-alg + - + name: encrypt-dir + type: nest + doc: Key material for encrypt direction + nested-attributes: keydir + - + name: decrypt-dir + type: nest + doc: Key material for decrypt direction + nested-attributes: keydir + - + name: keydir + attributes: + - + name: cipher-key + type: binary + doc: The actual key to be used by the cipher + checks: + max-len: 256 + - + name: nonce-tail + type: binary + doc: >- + Random nonce to be concatenated to the packet ID, in order to + obtain the actual cipher IV + checks: + exact-len: nonce-tail-size + - + name: ovpn + attributes: + - + name: ifindex + type: u32 + doc: Index of the ovpn interface to operate on + - + name: peer + type: nest + doc: >- + The peer object containing the attributed of interest for the specific + operation + nested-attributes: peer + - + name: keyconf + type: nest + doc: Peer specific cipher configuration + nested-attributes: keyconf + +operations: + list: + - + name: peer-new + attribute-set: ovpn + flags: [ admin-perm ] + doc: Add a remote peer + do: + pre: ovpn-nl-pre-doit + post: ovpn-nl-post-doit + request: + attributes: + - ifindex + - peer + - + name: peer-set + attribute-set: ovpn + flags: [ admin-perm ] + doc: modify a remote peer + do: + pre: ovpn-nl-pre-doit + post: ovpn-nl-post-doit + request: + attributes: + - ifindex + - peer + - + name: peer-get + attribute-set: ovpn + flags: [ admin-perm ] + doc: Retrieve data about existing remote peers (or a specific one) + do: + pre: ovpn-nl-pre-doit + post: ovpn-nl-post-doit + request: + attributes: + - ifindex + - peer + reply: + attributes: + - peer + dump: + request: + attributes: + - ifindex + reply: + attributes: + - peer + - + name: peer-del + attribute-set: ovpn + flags: [ admin-perm ] + doc: Delete existing remote peer + do: + pre: ovpn-nl-pre-doit + post: ovpn-nl-post-doit + request: + attributes: + - ifindex + - peer + - + name: peer-del-ntf + doc: Notification about a peer being deleted + notify: peer-get + mcgrp: peers + + - + name: key-new + attribute-set: ovpn + flags: [ admin-perm ] + doc: Add a cipher key for a specific peer + do: + pre: ovpn-nl-pre-doit + post: ovpn-nl-post-doit + request: + attributes: + - ifindex + - keyconf + - + name: key-get + attribute-set: ovpn + flags: [ admin-perm ] + doc: Retrieve non-sensitive data about peer key and cipher + do: + pre: ovpn-nl-pre-doit + post: ovpn-nl-post-doit + request: + attributes: + - ifindex + - keyconf + reply: + attributes: + - keyconf + - + name: key-swap + attribute-set: ovpn + flags: [ admin-perm ] + doc: Swap primary and secondary session keys for a specific peer + do: + pre: ovpn-nl-pre-doit + post: ovpn-nl-post-doit + request: + attributes: + - ifindex + - keyconf + - + name: key-swap-ntf + notify: key-get + doc: >- + Notification about key having exhausted its IV space and requiring + renegotiation + mcgrp: peers + - + name: key-del + attribute-set: ovpn + flags: [ admin-perm ] + doc: Delete cipher key for a specific peer + do: + pre: ovpn-nl-pre-doit + post: ovpn-nl-post-doit + request: + attributes: + - ifindex + - keyconf + +mcast-groups: + list: + - + name: peers -- cgit v1.2.3 From c2d950c4672a012ea9765c15a389cdcdf919f652 Mon Sep 17 00:00:00 2001 From: Antonio Quartulli Date: Tue, 15 Apr 2025 13:17:20 +0200 Subject: ovpn: add basic interface creation/destruction/management routines Add basic infrastructure for handling ovpn interfaces. Tested-by: Donald Hunter Signed-off-by: Antonio Quartulli Link: https://patch.msgid.link/20250415-b4-ovpn-v26-3-577f6097b964@openvpn.net Reviewed-by: Sabrina Dubroca Tested-by: Oleksandr Natalenko Signed-off-by: Paolo Abeni --- Documentation/netlink/specs/rt-link.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-link.yaml b/Documentation/netlink/specs/rt-link.yaml index 31238455f8e9..a50d9d7d882e 100644 --- a/Documentation/netlink/specs/rt-link.yaml +++ b/Documentation/netlink/specs/rt-link.yaml @@ -938,6 +938,12 @@ definitions: entries: - name: none - name: default + - + name: ovpn-mode + type: enum + entries: + - p2p + - mp attribute-sets: - @@ -2272,6 +2278,13 @@ attribute-sets: - name: tailroom type: u16 + - + name: linkinfo-ovpn-attrs + attributes: + - + name: mode + type: u8 + enum: ovpn-mode sub-messages: - @@ -2322,6 +2335,9 @@ sub-messages: - value: netkit attribute-set: linkinfo-netkit-attrs + - + value: ovpn + attribute-set: linkinfo-ovpn-attrs - name: linkinfo-member-data-msg formats: -- cgit v1.2.3 From 95f6208b20e4d0b427d32e5881be4257a3aab3c8 Mon Sep 17 00:00:00 2001 From: Julien Massot Date: Thu, 17 Apr 2025 10:44:35 +0200 Subject: ASoC: dt-bindings: mt8195: add compatible mt8195_mt6359 Make it also compatible for platform without external codecs. Signed-off-by: Julien Massot Reviewed-by: AngeloGioacchino Del Regno Link: https://patch.msgid.link/20250417-mt8395-audio-sof-v1-4-30587426e5dd@collabora.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml b/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml index 2af1d8ffbd8b..54a53d15f40c 100644 --- a/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml +++ b/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml @@ -21,6 +21,7 @@ properties: - mediatek,mt8195_mt6359_rt1019_rt5682 - mediatek,mt8195_mt6359_rt1011_rt5682 - mediatek,mt8195_mt6359_max98390_rt5682 + - mediatek,mt8195_mt6359 model: $ref: /schemas/types.yaml#/definitions/string -- cgit v1.2.3 From 5b974f53424d16165b606e2e2f9208d450a5723c Mon Sep 17 00:00:00 2001 From: Julien Massot Date: Thu, 17 Apr 2025 10:44:36 +0200 Subject: ASoC: dt-bindings: mt8195: add missing audio routing and link-name Add missing DL_SRC_BE link,as well as Headphone L/R that are provided by mt6359. Signed-off-by: Julien Massot Reviewed-by: AngeloGioacchino Del Regno Link: https://patch.msgid.link/20250417-mt8395-audio-sof-v1-5-30587426e5dd@collabora.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml b/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml index 54a53d15f40c..356e1feee962 100644 --- a/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml +++ b/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml @@ -45,6 +45,8 @@ properties: - Right Spk # Sources + - Headphone L + - Headphone R - Headset Mic - HPOL - HPOR @@ -89,6 +91,7 @@ patternProperties: link-name: description: Indicates dai-link name and PCM stream name enum: + - DL_SRC_BE - DPTX_BE - ETDM1_IN_BE - ETDM2_IN_BE -- cgit v1.2.3 From 26bb7614fa04278abbf0902d516b884677c12e86 Mon Sep 17 00:00:00 2001 From: Yixun Lan Date: Sat, 12 Apr 2025 07:31:28 +0800 Subject: dt-bindings: gpio: spacemit: add support for K1 SoC The GPIO controller of K1 support basic functions as input/output, all pins can be used as interrupt which route to one IRQ line, trigger type can be select between rising edge, falling edge, or both. There are four GPIO banks, each consisting of 32 pins. Reviewed-by: Linus Walleij Reviewed-by: Rob Herring (Arm) Signed-off-by: Yixun Lan Link: https://lore.kernel.org/r/20250412-03-k1-gpio-v8-1-1c6862d272ec@gentoo.org Signed-off-by: Bartosz Golaszewski --- .../devicetree/bindings/gpio/spacemit,k1-gpio.yaml | 96 ++++++++++++++++++++++ 1 file changed, 96 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml b/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml new file mode 100644 index 000000000000..ec0232e72c71 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/spacemit,k1-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SpacemiT K1 GPIO controller + +maintainers: + - Yixun Lan + +description: + The controller's registers are organized as sets of eight 32-bit + registers with each set of port controlling 32 pins. A single + interrupt line is shared for all of the pins by the controller. + +properties: + $nodename: + pattern: "^gpio@[0-9a-f]+$" + + compatible: + const: spacemit,k1-gpio + + reg: + maxItems: 1 + + clocks: + items: + - description: GPIO Core Clock + - description: GPIO Bus Clock + + clock-names: + items: + - const: core + - const: bus + + resets: + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 3 + description: + The first two cells are the GPIO bank index and offset inside the bank, + the third cell should specify GPIO flag. + + gpio-ranges: true + + interrupts: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 3 + description: + The first two cells are the GPIO bank index and offset inside the bank, + the third cell should specify interrupt flag. The controller does not + support level interrupts, so flags of IRQ_TYPE_LEVEL_HIGH, + IRQ_TYPE_LEVEL_LOW should not be used. + Refer for valid flags. + +required: + - compatible + - reg + - clocks + - clock-names + - gpio-controller + - "#gpio-cells" + - interrupts + - interrupt-controller + - "#interrupt-cells" + - gpio-ranges + +additionalProperties: false + +examples: + - | + gpio@d4019000 { + compatible = "spacemit,k1-gpio"; + reg = <0xd4019000 0x800>; + clocks =<&ccu 9>, <&ccu 61>; + clock-names = "core", "bus"; + gpio-controller; + #gpio-cells = <3>; + interrupts = <58>; + interrupt-controller; + interrupt-parent = <&plic>; + #interrupt-cells = <3>; + gpio-ranges = <&pinctrl 0 0 0 32>, + <&pinctrl 1 0 32 32>, + <&pinctrl 2 0 64 32>, + <&pinctrl 3 0 96 32>; + }; +... -- cgit v1.2.3 From 52edd094750a0a08cb54321df07d9cddbdd2b17c Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 10 Apr 2025 16:40:07 +0200 Subject: dt-bindings: iommu: mediatek: Add binding for MT6893 MM IOMMU Add binding for the MediaTek Dimensity 1200 (MT6893) SoC's MultiMedia (MM) IOMMU. Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250410144008.475888-2-angelogioacchino.delregno@collabora.com Signed-off-by: Joerg Roedel --- Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml index ea6b0f5f24de..75750c64157c 100644 --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml @@ -74,6 +74,7 @@ properties: - mediatek,mt2712-m4u # generation two - mediatek,mt6779-m4u # generation two - mediatek,mt6795-m4u # generation two + - mediatek,mt6893-iommu-mm # generation two - mediatek,mt8167-m4u # generation two - mediatek,mt8173-m4u # generation two - mediatek,mt8183-m4u # generation two @@ -131,6 +132,7 @@ properties: dt-binding/memory/mt2712-larb-port.h for mt2712, dt-binding/memory/mt6779-larb-port.h for mt6779, dt-binding/memory/mt6795-larb-port.h for mt6795, + dt-binding/memory/mediatek,mt6893-memory-port.h for mt6893, dt-binding/memory/mt8167-larb-port.h for mt8167, dt-binding/memory/mt8173-larb-port.h for mt8173, dt-binding/memory/mt8183-larb-port.h for mt8183, @@ -157,6 +159,7 @@ allOf: - mediatek,mt2701-m4u - mediatek,mt2712-m4u - mediatek,mt6795-m4u + - mediatek,mt6893-iommu-mm - mediatek,mt8173-m4u - mediatek,mt8186-iommu-mm - mediatek,mt8188-iommu-vdo @@ -173,6 +176,7 @@ allOf: properties: compatible: enum: + - mediatek,mt6893-iommu-mm - mediatek,mt8186-iommu-mm - mediatek,mt8188-iommu-vdo - mediatek,mt8188-iommu-vpp -- cgit v1.2.3 From c4771efa841666f5a202d1d651e2f0fcb315ee7e Mon Sep 17 00:00:00 2001 From: Robin Murphy Date: Wed, 12 Mar 2025 12:05:09 +0000 Subject: dt-bindings: dma: Add Arm DMA-350 Arm CoreLink DMA-350 is a pleasantly straightforward DMA controller which, although highly configurable, lends itself to a simple binding thanks to plenty of self-describing ID registers. Reviewed-by: Rob Herring (Arm) Signed-off-by: Robin Murphy Link: https://lore.kernel.org/r/15830b2a8ff9721e364f30f93ea3993139b0103b.1741780808.git.robin.murphy@arm.com Signed-off-by: Vinod Koul --- .../devicetree/bindings/dma/arm,dma-350.yaml | 44 ++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/arm,dma-350.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/dma/arm,dma-350.yaml b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml new file mode 100644 index 000000000000..429f682f15d8 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/arm,dma-350.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Arm CoreLink DMA-350 Controller + +maintainers: + - Robin Murphy + +allOf: + - $ref: dma-controller.yaml# + +properties: + compatible: + const: arm,dma-350 + + reg: + items: + - description: Base and size of the full register map + + interrupts: + minItems: 1 + items: + - description: Channel 0 interrupt + - description: Channel 1 interrupt + - description: Channel 2 interrupt + - description: Channel 3 interrupt + - description: Channel 4 interrupt + - description: Channel 5 interrupt + - description: Channel 6 interrupt + - description: Channel 7 interrupt + + "#dma-cells": + const: 1 + description: The cell is the trigger input number + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false -- cgit v1.2.3 From 12ad686ffdf51920000e7353351b163f3851c474 Mon Sep 17 00:00:00 2001 From: Luca Ceresoli Date: Fri, 11 Apr 2025 21:19:44 +0200 Subject: dt-bindings: display: simple: Add Tianma P0700WXF1MBAA panel Add the Tianma Micro-electronics P0700WXF1MBAA 7.0" LVDS LCD TFT panel. Acked-by: Conor Dooley Signed-off-by: Luca Ceresoli Link: https://lore.kernel.org/r/20250411-tianma-p0700wxf1mbaa-v3-1-acbefe9ea669@bootlin.com Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20250411-tianma-p0700wxf1mbaa-v3-1-acbefe9ea669@bootlin.com --- Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index b71ad32270d4..5542c9229d54 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -288,6 +288,8 @@ properties: - startek,kd070wvfpa # Team Source Display Technology TST043015CMHX 4.3" WQVGA TFT LCD panel - team-source-display,tst043015cmhx + # Tianma Micro-electronics P0700WXF1MBAA 7.0" WXGA (1280x800) LVDS TFT LCD panel + - tianma,p0700wxf1mbaa # Tianma Micro-electronics TM070JDHG30 7.0" WXGA TFT LCD panel - tianma,tm070jdhg30 # Tianma Micro-electronics TM070JDHG34-00 7.0" WXGA (1280x800) LVDS TFT LCD panel -- cgit v1.2.3 From a1958a56e52c87aea94c5cb0c08fe61ede929e7c Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Mon, 14 Apr 2025 10:29:16 +0200 Subject: dt-bindings: vendor-prefixes: Add Shenzhen Aoly Technology Co., Ltd. Aoly is a manufacturer of LCD/IPS displays based in Shenzhen, Mainland China. Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250410072456.387562-2-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20250414082918.30298-2-angelogioacchino.delregno@collabora.com Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20250414082918.30298-2-angelogioacchino.delregno@collabora.com --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 86f6a19b28ae..6136c8832a66 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -129,6 +129,8 @@ patternProperties: description: Andes Technology Corporation "^anvo,.*": description: Anvo-Systems Dresden GmbH + "^aoly,.*": + description: Shenzhen Aoly Technology Co., Ltd. "^aosong,.*": description: Guangzhou Aosong Electronic Co., Ltd. "^apm,.*": -- cgit v1.2.3 From a424c93db7ea8ffd18c6c170501bb898abf05932 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Mon, 14 Apr 2025 10:29:17 +0200 Subject: dt-bindings: display: panel: Add Himax HX8279/HX8279-D DDIC panels Himax HX8279 is a Display DriverIC suitable for driving LCD MIPI-DSI panels. Describe this DriverIC, the Startek KD070FHFID078 panel found on newer revisions of the MediaTek Genio 510/700/1200 Evaluation Kits (EVK), and the Aoly SL101PM1794FOG-V15 found on some i.MX8MM boards. Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250410072456.387562-3-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20250414082918.30298-3-angelogioacchino.delregno@collabora.com Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20250414082918.30298-3-angelogioacchino.delregno@collabora.com --- .../bindings/display/panel/himax,hx8279.yaml | 75 ++++++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/himax,hx8279.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx8279.yaml b/Documentation/devicetree/bindings/display/panel/himax,hx8279.yaml new file mode 100644 index 000000000000..f619aea82bdf --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/himax,hx8279.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/himax,hx8279.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Himax HX8279/HX8279-D based MIPI-DSI panels + +maintainers: + - AngeloGioacchino Del Regno + +description: + The Himax HX8279 is a 1803 channel outputs source driver with MIPI + TCON, which generates the horizontal and vertical control timing to + the source and gate drivers. + This DriverIC is most suitable for 1200x1920, 1080x1920, 1200x1600, + and 600x1024 panels and outputs full RGB888 over two or four lanes, + single or dual, MIPI-DSI video interface. + +allOf: + - $ref: panel-common-dual.yaml# + +properties: + compatible: + items: + - enum: + - aoly,sl101pm1794fog-v15 + - startek,kd070fhfid078 + - const: himax,hx8279 + + reg: + maxItems: 1 + + iovcc-supply: + description: I/O voltage supply + + vdd-supply: + description: Panel power supply + +required: + - compatible + - reg + - backlight + - reset-gpios + - iovcc-supply + - vdd-supply + +unevaluatedProperties: false + +examples: + - | + #include + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "startek,kd070fhfid078", "himax,hx8279"; + reg = <0>; + backlight = <&backlight>; + enable-gpios = <&pio 25 GPIO_ACTIVE_HIGH>; + reset-gpios = <&pio 45 GPIO_ACTIVE_HIGH>; + iovcc-supply = <&vreg_lcm_vio>; + vdd-supply = <&vreg_lcm_vdd>; + + port { + panel_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + }; + }; + +... -- cgit v1.2.3 From 7a5d0cbd8b19403ededbe84f21780f70632d1e09 Mon Sep 17 00:00:00 2001 From: Alexander Baransky Date: Mon, 14 Apr 2025 20:26:31 +0300 Subject: dt-bindings: display: panel: Add Visionox G2647FB105 Add a DT binding for the Visionox G2647FB105, a 6.47 inch 1080x2340 MIPI-DSI CMD mode AMOLED panel used in: - Xiaomi Mi Note 10 / CC9 Pro (sm7150-xiaomi-tucana) - Xiaomi Mi Note 10 Lite (sm7150-xiaomi-toco) Xiaomi likes to use different panels in various revisions of the same device. A factory panel even can be replaced with another model in a service center. So, the power configuration of this panel is similar to some Samsung AMOLED panels, e.g. samsung,ams639rq08, which can be found on other sm7150 Xiaomi devices. Even though Samsung panels weren't used in sm7150-xiaomi-tucana and toco, the described voltage rails exist (confirmed by schematics of the device). Signed-off-by: Alexander Baransky Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250414172637.197792-2-sanyapilot496@gmail.com Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20250414172637.197792-2-sanyapilot496@gmail.com --- .../display/panel/visionox,g2647fb105.yaml | 79 ++++++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/visionox,g2647fb105.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/visionox,g2647fb105.yaml b/Documentation/devicetree/bindings/display/panel/visionox,g2647fb105.yaml new file mode 100644 index 000000000000..49dcd9b8f670 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/visionox,g2647fb105.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/visionox,g2647fb105.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Visionox G2647FB105 6.47" 1080x2340 MIPI-DSI Panel + +maintainers: + - Alexander Baransky + +description: + The Visionox G2647FB105 is a 6.47 inch 1080x2340 MIPI-DSI CMD mode OLED panel. + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: visionox,g2647fb105 + + reg: + maxItems: 1 + + vdd3p3-supply: + description: 3.3V source voltage rail + + vddio-supply: + description: I/O source voltage rail + + vsn-supply: + description: Negative source voltage rail + + vsp-supply: + description: Positive source voltage rail + + reset-gpios: true + port: true + +required: + - compatible + - reg + - vdd3p3-supply + - vddio-supply + - vsn-supply + - vsp-supply + - reset-gpios + - port + +additionalProperties: false + +examples: + - | + #include + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "visionox,g2647fb105"; + reg = <0>; + + vdd3p3-supply = <&vreg_l7c_3p0>; + vddio-supply = <&vreg_l13a_1p8>; + vsn-supply = <&vreg_ibb>; + vsp-supply = <&vreg_lab>; + + reset-gpios = <&pm6150l_gpios 9 GPIO_ACTIVE_LOW>; + + port { + panel_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; + }; + +... -- cgit v1.2.3 From 4cc9cf2f437ccf6915100c2f38f63cfb1abad6f9 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 17 Apr 2025 13:16:31 +0200 Subject: spi: dt-bindings: Fix description mentioning a removed property 'spi-cpha' was removed from this file. So, replace it in the description with an existing example. Reformat the paragraph to adhere to max line length. Fixes: 233363aba72a ("spi/panel: dt-bindings: drop CPHA and CPOL from common properties") Signed-off-by: Wolfram Sang Link: https://patch.msgid.link/20250417111630.53084-2-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown --- .../devicetree/bindings/spi/spi-peripheral-props.yaml | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml index 0bb443b8decd..8fc17e16efb2 100644 --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml @@ -8,12 +8,13 @@ title: Peripheral-specific properties for a SPI bus. description: Many SPI controllers need to add properties to peripheral devices. They could - be common properties like spi-max-frequency, spi-cpha, etc. or they could be - controller specific like delay in clock or data lines, etc. These properties - need to be defined in the peripheral node because they are per-peripheral and - there can be multiple peripherals attached to a controller. All those - properties are listed here. The controller specific properties should go in - their own separate schema that should be referenced from here. + be common properties like spi-max-frequency, spi-cs-high, etc. or they could + be controller specific like delay in clock or data lines, etc. These + properties need to be defined in the peripheral node because they are + per-peripheral and there can be multiple peripherals attached to a + controller. All those properties are listed here. The controller specific + properties should go in their own separate schema that should be referenced + from here. maintainers: - Mark Brown -- cgit v1.2.3 From 22cbc1ee268b7ec0000848708944daa61c6e4909 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 15 Apr 2025 20:04:47 -0700 Subject: netdev: fix the locking for netdev notifications Kuniyuki reports that the assert for netdev lock fires when there are netdev event listeners (otherwise we skip the netlink event generation). Correct the locking when coming from the notifier. The NETDEV_XDP_FEAT_CHANGE notifier is already fully locked, it's the documentation that's incorrect. Fixes: 99e44f39a8f7 ("netdev: depend on netdev->lock for xdp features") Reported-by: syzkaller Reported-by: Kuniyuki Iwashima Link: https://lore.kernel.org/20250410171019.62128-1-kuniyu@amazon.com Acked-by: Stanislav Fomichev Link: https://patch.msgid.link/20250416030447.1077551-1-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/networking/netdevices.rst | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/networking/netdevices.rst b/Documentation/networking/netdevices.rst index 77fe1f7b93be..7ebb6c36482d 100644 --- a/Documentation/networking/netdevices.rst +++ b/Documentation/networking/netdevices.rst @@ -387,12 +387,14 @@ For device drivers that implement shaping or queue management APIs, some of the notifiers (``enum netdev_cmd``) are running under the netdev instance lock. +The following netdev notifiers are always run under the instance lock: +* ``NETDEV_XDP_FEAT_CHANGE`` + For devices with locked ops, currently only the following notifiers are running under the lock: * ``NETDEV_CHANGE`` * ``NETDEV_REGISTER`` * ``NETDEV_UP`` -* ``NETDEV_XDP_FEAT_CHANGE`` The following notifiers are running without the lock: * ``NETDEV_UNREGISTER`` -- cgit v1.2.3 From c574db0b68a600f9548f0ef7bcba723562713587 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Wed, 2 Apr 2025 17:01:57 +0530 Subject: dt-bindings: soc: ti: ti,j721e-system-controller: Add PCIe ctrl property Add a pattern property for pcie-ctrl which can be part of this controller. Signed-off-by: Andrew Davis [j-choudhary@ti.com: Change description and add example] Signed-off-by: Jayesh Choudhary Reviewed-by: Siddharth Vadapalli Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250402113201.151195-2-j-choudhary@ti.com Signed-off-by: Nishanth Menon --- .../devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml index 378e9cc5fac2..13b6b6fa5dee 100644 --- a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml +++ b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml @@ -68,6 +68,11 @@ patternProperties: description: The node corresponding to SoC chip identification. + "^pcie-ctrl@[0-9a-f]+$": + type: object + description: + The node corresponding to PCIe control register. + required: - compatible - reg @@ -110,5 +115,10 @@ examples: compatible = "ti,am654-chipid"; reg = <0x14 0x4>; }; + + pcie0_ctrl: pcie-ctrl@4070 { + compatible = "ti,j784s4-pcie-ctrl", "syscon"; + reg = <0x4070 0x4>; + }; }; ... -- cgit v1.2.3 From 3a5ff313ac521ff034f07ea6687ffb3f2229d62a Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Tue, 15 Apr 2025 17:59:39 -0500 Subject: dt-bindings: arm: ti: Add PocketBeagle2 This board is based on ti,am625 family using the am6232 and am6254 variations. https://www.beagleboard.org/boards/pocketbeagle-2 https://openbeagle.org/pocketbeagle/pocketbeagle-2 Signed-off-by: Robert Nelson Reviewed-by: Dhruva Gole Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250415225940.3899486-1-robertcnelson@gmail.com Signed-off-by: Nishanth Menon --- Documentation/devicetree/bindings/arm/ti/k3.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index 18f155cd06c8..b7f6cd8d4b9e 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -46,6 +46,7 @@ properties: - description: K3 AM625 SoC items: - enum: + - beagle,am62-pocketbeagle2 - beagle,am625-beagleplay - ti,am625-sk - ti,am62-lp-sk -- cgit v1.2.3 From 35c6e493bd54fcc92ca4e4d15e2a8e365ba4dde4 Mon Sep 17 00:00:00 2001 From: Romain Gantois Date: Thu, 6 Mar 2025 17:23:22 +0100 Subject: dt-bindings: misc: Describe TI FPC202 dual port controller The FPC202 dual port controller serves as a low speed signal aggregator for common port types, notably SFP. It provides access to I2C and low-speed GPIO signals of a downstream device through a single upstream control interface. Up to two logical I2C addresses can be accessed on each of the FPC202's ports. The port controller acts as an I2C translator (ATR). It converts addresses of incoming and outgoing I2C transactions. One use case of this is accessing two SFP modules at logical address 0x50 from the same upstream I2C controller, using two different client aliases. Reviewed-by: Conor Dooley Tested-by: Tomi Valkeinen Signed-off-by: Romain Gantois Acked-by: Andi Shyti Signed-off-by: Wolfram Sang --- .../devicetree/bindings/misc/ti,fpc202.yaml | 94 ++++++++++++++++++++++ 1 file changed, 94 insertions(+) create mode 100644 Documentation/devicetree/bindings/misc/ti,fpc202.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/misc/ti,fpc202.yaml b/Documentation/devicetree/bindings/misc/ti,fpc202.yaml new file mode 100644 index 000000000000..a8cb10f2d0df --- /dev/null +++ b/Documentation/devicetree/bindings/misc/ti,fpc202.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/ti,fpc202.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI FPC202 dual port controller with expanded IOs + +maintainers: + - Romain Gantois + +allOf: + - $ref: /schemas/i2c/i2c-atr.yaml# + +properties: + compatible: + const: ti,fpc202 + + reg: + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + enable-gpios: + description: + Specifier for the GPIO connected to the EN pin. + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +patternProperties: + "^i2c@[0-1]$": + $ref: /schemas/i2c/i2c-controller.yaml# + description: Downstream device ports 0 and 1 + + properties: + reg: + maxItems: 1 + description: + Downstream port ID + + required: + - "#address-cells" + - "#size-cells" + - reg + + unevaluatedProperties: false + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + - "#address-cells" + - "#size-cells" + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + i2c-atr@f { + compatible = "ti,fpc202"; + reg = <0xf>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + }; + }; +... -- cgit v1.2.3 From 494b26086f75835722bf8ccb9312bda814a9cb4d Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Thu, 27 Feb 2025 19:10:43 +0530 Subject: dt-bindings: PCI: qcom,pcie-sm8150: Add 'global' interrupt 'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-1-2b70a7819d1e@linaro.org --- Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml index 9d569644fda9..a604f2a79de3 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml @@ -49,9 +49,10 @@ properties: interrupts: minItems: 8 - maxItems: 8 + maxItems: 9 interrupt-names: + minItems: 8 items: - const: msi0 - const: msi1 @@ -61,6 +62,7 @@ properties: - const: msi5 - const: msi6 - const: msi7 + - const: global resets: maxItems: 1 @@ -128,9 +130,10 @@ examples: , , , - ; + , + ; interrupt-names = "msi0", "msi1", "msi2", "msi3", - "msi4", "msi5", "msi6", "msi7"; + "msi4", "msi5", "msi6", "msi7", "global"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ -- cgit v1.2.3 From bfc1752fbbe78cbe10976e5beb52311043a38173 Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Thu, 27 Feb 2025 19:10:45 +0530 Subject: dt-bindings: PCI: qcom,pcie-sm8250: Add 'global' interrupt 'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-3-2b70a7819d1e@linaro.org --- Documentation/devicetree/bindings/pci/qcom,pcie-sm8250.yaml | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8250.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8250.yaml index 4d060bce6f9d..af4dae68d508 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8250.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8250.yaml @@ -61,9 +61,10 @@ properties: interrupts: minItems: 8 - maxItems: 8 + maxItems: 9 interrupt-names: + minItems: 8 items: - const: msi0 - const: msi1 @@ -73,6 +74,7 @@ properties: - const: msi5 - const: msi6 - const: msi7 + - const: global resets: maxItems: 1 @@ -143,9 +145,10 @@ examples: , , , - ; + , + ; interrupt-names = "msi0", "msi1", "msi2", "msi3", - "msi4", "msi5", "msi6", "msi7"; + "msi4", "msi5", "msi6", "msi7", "global"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ -- cgit v1.2.3 From 985b22d2f88cba382345b373322b669d75ec50fc Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Thu, 27 Feb 2025 19:10:47 +0530 Subject: dt-bindings: PCI: qcom,pcie-sm8350: Add 'global' interrupt 'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-5-2b70a7819d1e@linaro.org --- Documentation/devicetree/bindings/pci/qcom,pcie-sm8350.yaml | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8350.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8350.yaml index 2a4cc41fc710..dde3079adbb3 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8350.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8350.yaml @@ -51,9 +51,10 @@ properties: interrupts: minItems: 8 - maxItems: 8 + maxItems: 9 interrupt-names: + minItems: 8 items: - const: msi0 - const: msi1 @@ -63,6 +64,7 @@ properties: - const: msi5 - const: msi6 - const: msi7 + - const: global resets: maxItems: 1 @@ -132,9 +134,10 @@ examples: , , , - ; + , + ; interrupt-names = "msi0", "msi1", "msi2", "msi3", - "msi4", "msi5", "msi6", "msi7"; + "msi4", "msi5", "msi6", "msi7", "global"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ -- cgit v1.2.3 From 236d500c67e26ab3a7b58d4a90fde182f7c57279 Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Thu, 27 Feb 2025 19:10:49 +0530 Subject: dt-bindings: PCI: qcom,pcie-sa8775p: Add 'global' interrupt 'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-7-2b70a7819d1e@linaro.org --- Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml index efde49d1bef8..e3fa232da2ca 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml @@ -45,9 +45,10 @@ properties: interrupts: minItems: 8 - maxItems: 8 + maxItems: 9 interrupt-names: + minItems: 8 items: - const: msi0 - const: msi1 @@ -57,6 +58,7 @@ properties: - const: msi5 - const: msi6 - const: msi7 + - const: global resets: maxItems: 1 @@ -129,7 +131,8 @@ examples: , , , - ; + , + ; interrupt-names = "msi0", "msi1", "msi2", @@ -137,7 +140,8 @@ examples: "msi4", "msi5", "msi6", - "msi7"; + "msi7", + "global"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>, -- cgit v1.2.3 From 54340357c0096aa2e10036c88c9a4cd9048306f9 Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Thu, 27 Feb 2025 19:10:51 +0530 Subject: dt-bindings: PCI: qcom,pcie-sc7280: Add 'global' interrupt 'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-9-2b70a7819d1e@linaro.org --- Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml index 76cb9fbfd476..ff508f592a1a 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml @@ -54,9 +54,10 @@ properties: interrupts: minItems: 8 - maxItems: 8 + maxItems: 9 interrupt-names: + minItems: 8 items: - const: msi0 - const: msi1 @@ -66,6 +67,7 @@ properties: - const: msi5 - const: msi6 - const: msi7 + - const: global resets: maxItems: 1 @@ -149,9 +151,10 @@ examples: , , , - ; + , + ; interrupt-names = "msi0", "msi1", "msi2", "msi3", - "msi4", "msi5", "msi6", "msi7"; + "msi4", "msi5", "msi6", "msi7", "global"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, -- cgit v1.2.3 From ff9be267fee89de9d9972677739396445d2d2499 Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Thu, 27 Feb 2025 19:10:53 +0530 Subject: dt-bindings: PCI: qcom: Add 'global' interrupt for SDM845 SoC 'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-11-2b70a7819d1e@linaro.org --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 8f628939209e..a34e141a7292 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -602,8 +602,9 @@ allOf: - properties: interrupts: minItems: 8 - maxItems: 8 + maxItems: 9 interrupt-names: + minItems: 8 items: - const: msi0 - const: msi1 @@ -613,6 +614,7 @@ allOf: - const: msi5 - const: msi6 - const: msi7 + - const: global - if: properties: -- cgit v1.2.3 From c9dc3a0996608969fe00eeb78bf98e2bed5fca41 Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Thu, 27 Feb 2025 19:10:56 +0530 Subject: dt-bindings: PCI: qcom: Allow MSM8998 to use 8 MSI and one 'global' interrupt MSM8998 has 8 MSI SPI and one 'global' interrupt. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-14-2b70a7819d1e@linaro.org --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index a34e141a7292..1b875d7441dd 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -590,6 +590,7 @@ allOf: contains: enum: - qcom,pcie-msm8996 + - qcom,pcie-msm8998 - qcom,pcie-sdm845 then: oneOf: -- cgit v1.2.3 From 90fe2c27577d0914a00787e99d9163d87a8011f6 Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Thu, 27 Feb 2025 19:10:58 +0530 Subject: dt-bindings: PCI: qcom: Allow IPQ8074 to use 8 MSI and one 'global' interrupt IPA8074 has 8 MSI SPI and one 'global' interrupt. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-16-2b70a7819d1e@linaro.org --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 1b875d7441dd..804124aad03c 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -589,6 +589,8 @@ allOf: compatible: contains: enum: + - qcom,pcie-ipq8074 + - qcom,pcie-ipq8074-gen3 - qcom,pcie-msm8996 - qcom,pcie-msm8998 - qcom,pcie-sdm845 @@ -628,8 +630,6 @@ allOf: - qcom,pcie-ipq6018 - qcom,pcie-ipq8064 - qcom,pcie-ipq8064-v2 - - qcom,pcie-ipq8074 - - qcom,pcie-ipq8074-gen3 - qcom,pcie-qcs404 then: properties: -- cgit v1.2.3 From 37974556170cb0027d6c21b4080fc713e1ba1e9b Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Thu, 27 Feb 2025 19:11:00 +0530 Subject: dt-bindings: PCI: qcom: Allow IPQ6018 to use 8 MSI and one 'global' interrupt IPQ6018 has 8 MSI SPI and one 'global' interrupt. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-18-2b70a7819d1e@linaro.org --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 804124aad03c..e20f142316cc 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -589,6 +589,7 @@ allOf: compatible: contains: enum: + - qcom,pcie-ipq6018 - qcom,pcie-ipq8074 - qcom,pcie-ipq8074-gen3 - qcom,pcie-msm8996 @@ -627,7 +628,6 @@ allOf: - qcom,pcie-apq8064 - qcom,pcie-apq8084 - qcom,pcie-ipq4019 - - qcom,pcie-ipq6018 - qcom,pcie-ipq8064 - qcom,pcie-ipq8064-v2 - qcom,pcie-qcs404 -- cgit v1.2.3 From cc9f71da538dce00dfdef08166f92ee315003356 Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Thu, 27 Feb 2025 19:11:02 +0530 Subject: dt-bindings: PCI: qcom,pcie-sc8180x: Add 'global' interrupt 'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-20-2b70a7819d1e@linaro.org --- Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml index baf1813ec0ac..331fc25d7a17 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml @@ -49,9 +49,10 @@ properties: interrupts: minItems: 8 - maxItems: 8 + maxItems: 9 interrupt-names: + minItems: 8 items: - const: msi0 - const: msi1 @@ -61,6 +62,7 @@ properties: - const: msi5 - const: msi6 - const: msi7 + - const: global resets: maxItems: 1 @@ -136,7 +138,8 @@ examples: , , , - ; + , + ; interrupt-names = "msi0", "msi1", "msi2", @@ -144,7 +147,8 @@ examples: "msi4", "msi5", "msi6", - "msi7"; + "msi7", + "global"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ -- cgit v1.2.3 From 6b7f49be74758a60b760d6c19a48f65a23511dbe Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Tue, 1 Apr 2025 10:17:02 +0100 Subject: dt-bindings: pci: apple,pcie: Add t6020 compatible string t6020 adds some register ranges compared to t8103, so requires a new compatible as well as the new PHY registers. Thanks to Mark and Rob for their helpful suggestions in updating the binding. Suggested-by: Mark Kettenis Suggested-by: Rob Herring Signed-off-by: Alyssa Rosenzweig [maz: added PHY registers, constraints] Signed-off-by: Marc Zyngier Signed-off-by: Manivannan Sadhasivam Tested-by: Janne Grunau Reviewed-by: Rob Herring (Arm) Acked-by: Manivannan Sadhasivam Acked-by: Alyssa Rosenzweig Link: https://patch.msgid.link/20250401091713.2765724-3-maz@kernel.org --- .../devicetree/bindings/pci/apple,pcie.yaml | 33 +++++++++++++++++----- 1 file changed, 26 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/apple,pcie.yaml b/Documentation/devicetree/bindings/pci/apple,pcie.yaml index c8775f9cb071..c0852be04f6d 100644 --- a/Documentation/devicetree/bindings/pci/apple,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/apple,pcie.yaml @@ -17,6 +17,10 @@ description: | implements its root ports. But the ATU found on most DesignWare PCIe host bridges is absent. + On systems derived from T602x, the PHY registers are in a region + separate from the port registers. In that case, there is one PHY + register range per port register range. + All root ports share a single ECAM space, but separate GPIOs are used to take the PCI devices on those ports out of reset. Therefore the standard "reset-gpios" and "max-link-speed" properties appear on @@ -30,16 +34,18 @@ description: | properties: compatible: - items: - - enum: - - apple,t8103-pcie - - apple,t8112-pcie - - apple,t6000-pcie - - const: apple,pcie + oneOf: + - items: + - enum: + - apple,t8103-pcie + - apple,t8112-pcie + - apple,t6000-pcie + - const: apple,pcie + - const: apple,t6020-pcie reg: minItems: 3 - maxItems: 6 + maxItems: 10 reg-names: minItems: 3 @@ -50,6 +56,10 @@ properties: - const: port1 - const: port2 - const: port3 + - const: phy0 + - const: phy1 + - const: phy2 + - const: phy3 ranges: minItems: 2 @@ -98,6 +108,15 @@ allOf: maxItems: 5 interrupts: maxItems: 3 + - if: + properties: + compatible: + contains: + const: apple,t6020-pcie + then: + properties: + reg-names: + minItems: 10 examples: - | -- cgit v1.2.3 From 46b0caaad3a5aed817a02b239d4cb4392c2a5dea Mon Sep 17 00:00:00 2001 From: Damon Ding Date: Mon, 10 Mar 2025 18:41:05 +0800 Subject: dt-bindings: display: rockchip: analogix-dp: Add support to get panel from the DP AUX bus According to Documentation/devicetree/bindings/display/dp-aux-bus.yaml, it is a good way to get panel through the DP AUX bus. Acked-by: Krzysztof Kozlowski Signed-off-by: Damon Ding Link: https://lore.kernel.org/r/20250310104114.2608063-5-damon.ding@rock-chips.com Signed-off-by: Dmitry Baryshkov --- .../devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml index 60dedf9b2be7..eaf4e67e232e 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml @@ -41,6 +41,9 @@ properties: description: This SoC makes use of GRF regs. + aux-bus: + $ref: /schemas/display/dp-aux-bus.yaml# + required: - compatible - clocks -- cgit v1.2.3 From f855146263b14abadd8d5bd0e280e54fbab3bd18 Mon Sep 17 00:00:00 2001 From: Damon Ding Date: Mon, 10 Mar 2025 18:41:10 +0800 Subject: dt-bindings: display: rockchip: analogix-dp: Add support for RK3588 Compared with RK3288/RK3399, the HBR2 link rate support is the main improvement of RK3588 eDP TX controller, and there are also two independent eDP display interfaces on RK3588 Soc. The newly added 'apb' reset is to ensure the APB bus of eDP controller works well on the RK3588 SoC. Reviewed-by: Rob Herring (Arm) Signed-off-by: Damon Ding Link: https://lore.kernel.org/r/20250310104114.2608063-10-damon.ding@rock-chips.com Signed-off-by: Dmitry Baryshkov --- .../display/rockchip/rockchip,analogix-dp.yaml | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml index eaf4e67e232e..d99b23b88cc5 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml @@ -15,6 +15,7 @@ properties: enum: - rockchip,rk3288-dp - rockchip,rk3399-edp + - rockchip,rk3588-edp clocks: minItems: 2 @@ -31,10 +32,14 @@ properties: maxItems: 1 resets: - maxItems: 1 + minItems: 1 + maxItems: 2 reset-names: - const: dp + minItems: 1 + items: + - const: dp + - const: apb rockchip,grf: $ref: /schemas/types.yaml#/definitions/phandle @@ -55,6 +60,19 @@ required: allOf: - $ref: /schemas/display/bridge/analogix,dp.yaml# + - if: + properties: + compatible: + contains: + enum: + - rockchip,rk3588-edp + then: + properties: + resets: + minItems: 2 + reset-names: + minItems: 2 + unevaluatedProperties: false examples: -- cgit v1.2.3 From 296b67059e3026125a1ca942f5506e6ca051749e Mon Sep 17 00:00:00 2001 From: Zijun Hu Date: Fri, 11 Apr 2025 23:31:40 +0800 Subject: fs/fs_parse: Delete macro fsparam_u32hex() Delete macro fsparam_u32hex() since: - it has no caller. - it uses as type @fs_param_is_u32_hex which is never defined, so will cause compile error when caller uses it. Signed-off-by: Zijun Hu Link: https://lore.kernel.org/20250411-fix_fs-v2-1-5d3395c102e4@quicinc.com Reviewed-by: Jan Kara Signed-off-by: Christian Brauner --- Documentation/filesystems/mount_api.rst | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/mount_api.rst b/Documentation/filesystems/mount_api.rst index d92c276f1575..47dafbb7427e 100644 --- a/Documentation/filesystems/mount_api.rst +++ b/Documentation/filesystems/mount_api.rst @@ -671,7 +671,6 @@ The members are as follows: fsparam_bool() fs_param_is_bool fsparam_u32() fs_param_is_u32 fsparam_u32oct() fs_param_is_u32_octal - fsparam_u32hex() fs_param_is_u32_hex fsparam_s32() fs_param_is_s32 fsparam_u64() fs_param_is_u64 fsparam_enum() fs_param_is_enum -- cgit v1.2.3 From d1f482108a2cff2b9c6ebebc40b157aaeb8213b3 Mon Sep 17 00:00:00 2001 From: Zijun Hu Date: Tue, 15 Apr 2025 20:25:00 +0800 Subject: fs/fs_parse: Remove unused and problematic validate_constant_table() Remove validate_constant_table() since: - It has no caller. - It has below 3 bugs for good constant table array array[] which must end with a empty entry, and take below invocation for explaination: validate_constant_table(array, ARRAY_SIZE(array), ...) - Always return wrong value due to the last empty entry. - Imprecise error message for missorted case. - Potential NULL pointer dereference since the last pr_err() may use @tbl[i].name NULL pointer to print the last empty entry's name. Signed-off-by: Zijun Hu Link: https://lore.kernel.org/20250415-fix_fs-v4-1-5d575124a3ff@quicinc.com Reviewed-by: Jan Kara Signed-off-by: Christian Brauner --- Documentation/filesystems/mount_api.rst | 15 --------------- 1 file changed, 15 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/mount_api.rst b/Documentation/filesystems/mount_api.rst index 47dafbb7427e..e149b89118c8 100644 --- a/Documentation/filesystems/mount_api.rst +++ b/Documentation/filesystems/mount_api.rst @@ -752,21 +752,6 @@ process the parameters it is given. If a match is found, the corresponding value is returned. If a match isn't found, the not_found value is returned instead. - * :: - - bool validate_constant_table(const struct constant_table *tbl, - size_t tbl_size, - int low, int high, int special); - - Validate a constant table. Checks that all the elements are appropriately - ordered, that there are no duplicates and that the values are between low - and high inclusive, though provision is made for one allowable special - value outside of that range. If no special value is required, special - should just be set to lie inside the low-to-high range. - - If all is good, true is returned. If the table is invalid, errors are - logged to the kernel log buffer and false is returned. - * :: bool fs_validate_description(const char *name, -- cgit v1.2.3 From 1938479b2720ebc05aab349c7dc0a53921ff7c87 Mon Sep 17 00:00:00 2001 From: Hector Martin Date: Tue, 8 Apr 2025 12:17:57 +0530 Subject: lib/vsprintf: Add support for generic FourCCs by extending %p4cc %p4cc is designed for DRM/V4L2 FourCCs with their specific quirks, but it's useful to be able to print generic 4-character codes formatted as an integer. Extend it to add format specifiers for printing generic 32-bit FourCCs with various endian semantics: %p4ch Host byte order %p4cn Network byte order %p4cl Little-endian %p4cb Big-endian The endianness determines how bytes are interpreted as a u32, and the FourCC is then always printed MSByte-first (this is the opposite of V4L/DRM FourCCs). This covers most practical cases, e.g. %p4cn would allow printing LSByte-first FourCCs stored in host endian order (other than the hex form being in character order, not the integer value). Acked-by: Rasmus Villemoes Reviewed-by: Andy Shevchenko Reviewed-by: Petr Mladek Tested-by: Petr Mladek Signed-off-by: Hector Martin Signed-off-by: Aditya Garg Reviewed-by: Kees Cook Link: https://lore.kernel.org/r/PN3PR01MB9597B01823415CB7FCD3BC27B8B52@PN3PR01MB9597.INDPRD01.PROD.OUTLOOK.COM Signed-off-by: Alyssa Rosenzweig --- Documentation/core-api/printk-formats.rst | 32 +++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'Documentation') diff --git a/Documentation/core-api/printk-formats.rst b/Documentation/core-api/printk-formats.rst index 4bdc394e86af..125fd0397510 100644 --- a/Documentation/core-api/printk-formats.rst +++ b/Documentation/core-api/printk-formats.rst @@ -648,6 +648,38 @@ Examples:: %p4cc Y10 little-endian (0x20303159) %p4cc NV12 big-endian (0xb231564e) +Generic FourCC code +------------------- + +:: + %p4c[hnlb] gP00 (0x67503030) + +Print a generic FourCC code, as both ASCII characters and its numerical +value as hexadecimal. + +The generic FourCC code is always printed in the big-endian format, +the most significant byte first. This is the opposite of V4L/DRM FourCCs. + +The additional ``h``, ``n``, ``l``, and ``b`` specifiers define what +endianness is used to load the stored bytes. The data might be interpreted +using the host byte order, network byte order, little-endian, or big-endian. + +Passed by reference. + +Examples for a little-endian machine, given &(u32)0x67503030:: + + %p4ch gP00 (0x67503030) + %p4cn 00Pg (0x30305067) + %p4cl gP00 (0x67503030) + %p4cb 00Pg (0x30305067) + +Examples for a big-endian machine, given &(u32)0x67503030:: + + %p4ch gP00 (0x67503030) + %p4cn 00Pg (0x30305067) + %p4cl 00Pg (0x30305067) + %p4cb gP00 (0x67503030) + Rust ---- -- cgit v1.2.3 From 33583537dd5f48d76391ecebe0648151309d2687 Mon Sep 17 00:00:00 2001 From: Purva Yeshi Date: Wed, 16 Apr 2025 09:40:49 +0700 Subject: Documentation: trace: Reduce toctree depth Reduce toctree depth from 2 to 1 so that only docs titles are listed in the toctree. Signed-off-by: Purva Yeshi Link: https://lore.kernel.org/r/20250318113230.24950-1-purvayeshi550@gmail.com [Bagas: massage commit message] Signed-off-by: Bagas Sanjaya Acked-by: Steven Rostedt (Google) Signed-off-by: Jonathan Corbet --- Documentation/trace/index.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/trace/index.rst b/Documentation/trace/index.rst index 2c991dc96ace..fecc4adf70a8 100644 --- a/Documentation/trace/index.rst +++ b/Documentation/trace/index.rst @@ -3,7 +3,7 @@ Linux Tracing Technologies ========================== .. toctree:: - :maxdepth: 2 + :maxdepth: 1 ftrace-design tracepoint-analysis -- cgit v1.2.3 From f0ba72e65516d1d86f40c79a49c4ba01c9555592 Mon Sep 17 00:00:00 2001 From: Purva Yeshi Date: Wed, 16 Apr 2025 09:40:50 +0700 Subject: Documentation: trace: Refactor toctree Refactor table of contents of kernel tracing subsystem docs to improve clarity, structure, and organization: - Reformat sections and add appropriate headings - Improve section grouping and refine descriptions for each group - Add docs intro paragraph Signed-off-by: Purva Yeshi Link: https://lore.kernel.org/r/20250318113230.24950-2-purvayeshi550@gmail.com [Bagas: massage commit message and address reviews] Co-developed-by: Bagas Sanjaya Signed-off-by: Bagas Sanjaya Acked-by: Steven Rostedt (Google) Signed-off-by: Jonathan Corbet --- Documentation/trace/index.rst | 96 +++++++++++++++++++++++++++++++++++-------- 1 file changed, 80 insertions(+), 16 deletions(-) (limited to 'Documentation') diff --git a/Documentation/trace/index.rst b/Documentation/trace/index.rst index fecc4adf70a8..cc1dc5a087e8 100644 --- a/Documentation/trace/index.rst +++ b/Documentation/trace/index.rst @@ -1,39 +1,103 @@ -========================== -Linux Tracing Technologies -========================== +================================ +Linux Tracing Technologies Guide +================================ + +Tracing in the Linux kernel is a powerful mechanism that allows +developers and system administrators to analyze and debug system +behavior. This guide provides documentation on various tracing +frameworks and tools available in the Linux kernel. + +Introduction to Tracing +----------------------- + +This section provides an overview of Linux tracing mechanisms +and debugging approaches. .. toctree:: :maxdepth: 1 - ftrace-design + debugging + tracepoints tracepoint-analysis + ring-buffer-map + +Core Tracing Frameworks +----------------------- + +The following are the primary tracing frameworks integrated into +the Linux kernel. + +.. toctree:: + :maxdepth: 1 + ftrace + ftrace-design ftrace-uses - fprobe kprobes kprobetrace - uprobetracer fprobetrace - tracepoints + fprobe + ring-buffer-design + +Event Tracing and Analysis +-------------------------- + +A detailed explanation of event tracing mechanisms and their +applications. + +.. toctree:: + :maxdepth: 1 + events events-kmem events-power events-nmi events-msr - mmiotrace + boottime-trace histogram histogram-design - boottime-trace - debugging - hwlat_detector - osnoise-tracer - timerlat-tracer + +Hardware and Performance Tracing +-------------------------------- + +This section covers tracing features that monitor hardware +interactions and system performance. + +.. toctree:: + :maxdepth: 1 + intel_th - ring-buffer-design - ring-buffer-map stm sys-t coresight/index - user_events rv/index hisi-ptt + mmiotrace + hwlat_detector + osnoise-tracer + timerlat-tracer + +User-Space Tracing +------------------ + +These tools allow tracing user-space applications and +interactions. + +.. toctree:: + :maxdepth: 1 + + user_events + uprobetracer + +Additional Resources +-------------------- + +For more details, refer to the respective documentation of each +tracing tool and framework. + +.. only:: subproject and html + + Indices + ======= + + * :ref:`genindex` -- cgit v1.2.3 From 9d9bec3d90e3abf7340210172d9ce5dcdef93c14 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 15 Apr 2025 11:12:51 +0800 Subject: docs: sphinx: kerneldoc: Use python class if available Better integrate with the new kernel-doc tool by calling the Python classes directly if KERNELDOC=scripts/kernel-doc.py. This way, warnings won't be duplicated anymore, as files will be parsed only once. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Link: https://lore.kernel.org/r/1556a6c005d8e0fafa951f74725e984e1c7459bf.1744685912.git.mchehab+huawei@kernel.org --- Documentation/sphinx/kerneldoc.py | 138 +++++++++++++++++++++++++++++++++++--- 1 file changed, 130 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kerneldoc.py b/Documentation/sphinx/kerneldoc.py index 344789ed9ea2..27baf28fb754 100644 --- a/Documentation/sphinx/kerneldoc.py +++ b/Documentation/sphinx/kerneldoc.py @@ -41,7 +41,14 @@ import sphinx from sphinx.util.docutils import switch_source_input from sphinx.util import logging +srctree = os.path.abspath(os.environ["srctree"]) +sys.path.insert(0, os.path.join(srctree, "scripts/lib/kdoc")) + +from kdoc_files import KernelFiles +from kdoc_output import RestFormat + __version__ = '1.0' +use_kfiles = False def cmd_str(cmd): """ @@ -82,11 +89,32 @@ class KernelDocDirective(Directive): logger = logging.getLogger('kerneldoc') verbose = 0 - def run(self): + parse_args = {} + msg_args = {} + + def handle_args(self): + env = self.state.document.settings.env cmd = [env.config.kerneldoc_bin, '-rst', '-enable-lineno'] filename = env.config.kerneldoc_srctree + '/' + self.arguments[0] + + # Arguments used by KernelFiles.parse() function + self.parse_args = { + "file_list": [filename], + "export_file": [] + } + + # Arguments used by KernelFiles.msg() function + self.msg_args = { + "enable_lineno": True, + "export": False, + "internal": False, + "symbol": [], + "nosymbol": [], + "no_doc_sections": False + } + export_file_patterns = [] verbose = os.environ.get("V") @@ -99,7 +127,8 @@ class KernelDocDirective(Directive): # Tell sphinx of the dependency env.note_dependency(os.path.abspath(filename)) - tab_width = self.options.get('tab-width', self.state.document.settings.tab_width) + self.tab_width = self.options.get('tab-width', + self.state.document.settings.tab_width) # 'function' is an alias of 'identifiers' if 'functions' in self.options: @@ -108,12 +137,16 @@ class KernelDocDirective(Directive): # FIXME: make this nicer and more robust against errors if 'export' in self.options: cmd += ['-export'] + self.msg_args["export"] = True export_file_patterns = str(self.options.get('export')).split() elif 'internal' in self.options: cmd += ['-internal'] + self.msg_args["internal"] = True export_file_patterns = str(self.options.get('internal')).split() elif 'doc' in self.options: - cmd += ['-function', str(self.options.get('doc'))] + func = str(self.options.get('doc')) + cmd += ['-function', func] + self.msg_args["symbol"].append(func) elif 'identifiers' in self.options: identifiers = self.options.get('identifiers').split() if identifiers: @@ -123,8 +156,10 @@ class KernelDocDirective(Directive): continue cmd += ['-function', i] + self.msg_args["symbol"].append(i) else: cmd += ['-no-doc-sections'] + self.msg_args["no_doc_sections"] = True if 'no-identifiers' in self.options: no_identifiers = self.options.get('no-identifiers').split() @@ -135,6 +170,7 @@ class KernelDocDirective(Directive): continue cmd += ['-nosymbol', i] + self.msg_args["nosymbol"].append(i) for pattern in export_file_patterns: pattern = pattern.rstrip("\\").strip() @@ -144,12 +180,29 @@ class KernelDocDirective(Directive): for f in glob.glob(env.config.kerneldoc_srctree + '/' + pattern): env.note_dependency(os.path.abspath(f)) cmd += ['-export-file', f] + self.parse_args["export_file"].append(f) + + # Export file is needed by both parse and msg, as kernel-doc + # cache exports. + self.msg_args["export_file"] = self.parse_args["export_file"] cmd += [filename] + return cmd + + def run_cmd(self): + """ + Execute an external kernel-doc command. + """ + + env = self.state.document.settings.env + cmd = self.handle_args() + if self.verbose >= 1: print(cmd_str(cmd)) + node = nodes.section() + try: self.logger.verbose("calling kernel-doc '%s'" % (" ".join(cmd))) @@ -167,7 +220,29 @@ class KernelDocDirective(Directive): elif env.config.kerneldoc_verbosity > 0: sys.stderr.write(err) - lines = statemachine.string2lines(out, tab_width, convert_whitespace=True) + except Exception as e: # pylint: disable=W0703 + self.logger.warning("kernel-doc '%s' processing failed with: %s" % + (" ".join(cmd), str(e))) + return [nodes.error(None, nodes.paragraph(text = "kernel-doc missing"))] + + filenames = self.parse_args["file_list"] + for filename in filenames: + ret = self.parse_msg(filename, node, out, cmd) + if ret: + return ret + + return node.children + + def parse_msg(self, filename, node, out, cmd): + """ + Handles a kernel-doc output for a given file + """ + + env = self.state.document.settings.env + + try: + lines = statemachine.string2lines(out, self.tab_width, + convert_whitespace=True) result = ViewList() lineoffset = 0; @@ -183,20 +258,65 @@ class KernelDocDirective(Directive): result.append(line, doc + ": " + filename, lineoffset) lineoffset += 1 - node = nodes.section() self.do_parse(result, node) - return node.children - except Exception as e: # pylint: disable=W0703 self.logger.warning("kernel-doc '%s' processing failed with: %s" % - (" ".join(cmd), str(e))) + (cmd_str(cmd), str(e))) return [nodes.error(None, nodes.paragraph(text = "kernel-doc missing"))] + return None + + def run_kdoc(self, kfiles): + """ + Execute kernel-doc classes directly instead of running as a separate + command. + """ + + cmd = self.handle_args() + env = self.state.document.settings.env + + node = nodes.section() + + kfiles.parse(**self.parse_args) + filenames = self.parse_args["file_list"] + + for filename, out in kfiles.msg(**self.msg_args, filenames=filenames): + if self.verbose >= 1: + print(cmd_str(cmd)) + + ret = self.parse_msg(filename, node, out, cmd) + if ret: + return ret + + return node.children + + def run(self): + global use_kfiles + + if use_kfiles: + out_style = RestFormat() + kfiles = KernelFiles(out_style=out_style, logger=self.logger) + return self.run_kdoc(kfiles) + else: + return self.run_cmd() + def do_parse(self, result, node): with switch_source_input(self.state, result): self.state.nested_parse(result, 0, node, match_titles=1) +def setup_kfiles(app): + global use_kfiles + + kerneldoc_bin = app.env.config.kerneldoc_bin + + if kerneldoc_bin and kerneldoc_bin.endswith("kernel-doc.py"): + print("Using Python kernel-doc") + use_kfiles = True + else: + print(f"Using {kerneldoc_bin}") + + def setup(app): app.add_config_value('kerneldoc_bin', None, 'env') app.add_config_value('kerneldoc_srctree', None, 'env') @@ -204,6 +324,8 @@ def setup(app): app.add_directive('kernel-doc', KernelDocDirective) + app.connect('builder-inited', setup_kfiles) + return dict( version = __version__, parallel_read_safe = True, -- cgit v1.2.3 From 4e2c719782a84702db7fc2dc07ced796f308fec7 Mon Sep 17 00:00:00 2001 From: Dave Hansen Date: Tue, 22 Apr 2025 08:32:47 +0200 Subject: x86/cpu: Help users notice when running old Intel microcode Old microcode is bad for users and for kernel developers. For users, it exposes them to known fixed security and/or functional issues. These obviously rarely result in instant dumpster fires in every environment. But it is as important to keep your microcode up to date as it is to keep your kernel up to date. Old microcode also makes kernels harder to debug. A developer looking at an oops need to consider kernel bugs, known CPU issues and unknown CPU issues as possible causes. If they know the microcode is up to date, they can mostly eliminate known CPU issues as the cause. Make it easier to tell if CPU microcode is out of date. Add a list of released microcode. If the loaded microcode is older than the release, tell users in a place that folks can find it: /sys/devices/system/cpu/vulnerabilities/old_microcode Tell kernel kernel developers about it with the existing taint flag: TAINT_CPU_OUT_OF_SPEC == Discussion == When a user reports a potential kernel issue, it is very common to ask them to reproduce the issue on mainline. Running mainline, they will (independently from the distro) acquire a more up-to-date microcode version list. If their microcode is old, they will get a warning about the taint and kernel developers can take that into consideration when debugging. Just like any other entry in "vulnerabilities/", users are free to make their own assessment of their exposure. == Microcode Revision Discussion == The microcode versions in the table were generated from the Intel microcode git repo: 8ac9378a8487 ("microcode-20241112 Release") which as of this writing lags behind the latest microcode-20250211. It can be argued that the versions that the kernel picks to call "old" should be a revision or two old. Which specific version is picked is less important to me than picking *a* version and enforcing it. This repository contains only microcode versions that Intel has deemed to be OS-loadable. It is quite possible that the BIOS has loaded a newer microcode than the latest in this repo. If this happens, the system is considered to have new microcode, not old. Specifically, the sysfs file and taint flag answer the question: Is the CPU running on the latest OS-loadable microcode, or something even later that the BIOS loaded? In other words, Intel never publishes an authoritative list of CPUs and latest microcode revisions. Until it does, this is the best that Linux can do. Also note that the "intel-ucode-defs.h" file is simple, ugly and has lots of magic numbers. That's on purpose and should allow a single file to be shared across lots of stable kernel regardless of if they have the new "VFM" infrastructure or not. It was generated with a dumb script. == FAQ == Q: Does this tell me if my system is secure or insecure? A: No. It only tells you if your microcode was old when the system booted. Q: Should the kernel warn if the microcode list itself is too old? A: No. New kernels will get new microcode lists, both mainline and stable. The only way to have an old list is to be running an old kernel in which case you have bigger problems. Q: Is this for security or functional issues? A: Both. Q: If a given microcode update only has functional problems but no security issues, will it be considered old? A: Yes. All microcode image versions within a microcode release are treated identically. Intel appears to make security updates without disclosing them in the release notes. Thus, all updates are considered to be security-relevant. Q: Who runs old microcode? A: Anybody with an old distro. This happens all the time inside of Intel where there are lots of weird systems in labs that might not be getting regular distro updates and might also be running rather exotic microcode images. Q: If I update my microcode after booting will it stop saying "Vulnerable"? A: No. Just like all the other vulnerabilies, you need to reboot before the kernel will reassess your vulnerability. Signed-off-by: Dave Hansen Signed-off-by: Ingo Molnar Cc: "Ahmed S. Darwish" Cc: Andrew Cooper Cc: Andy Lutomirski Cc: Brian Gerst Cc: John Ogness Cc: Josh Poimboeuf Cc: Juergen Gross Cc: H. Peter Anvin Cc: Kees Cook Cc: Linus Torvalds Link: https://lore.kernel.org/all/20250421195659.CF426C07%40davehans-spike.ostc.intel.com (cherry picked from commit 9127865b15eb0a1bd05ad7efe29489c44394bdc1) --- Documentation/ABI/testing/sysfs-devices-system-cpu | 1 + Documentation/admin-guide/hw-vuln/old_microcode.rst | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+) create mode 100644 Documentation/admin-guide/hw-vuln/old_microcode.rst (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu index 206079d3bd5b..766a9747b154 100644 --- a/Documentation/ABI/testing/sysfs-devices-system-cpu +++ b/Documentation/ABI/testing/sysfs-devices-system-cpu @@ -516,6 +516,7 @@ What: /sys/devices/system/cpu/vulnerabilities /sys/devices/system/cpu/vulnerabilities/mds /sys/devices/system/cpu/vulnerabilities/meltdown /sys/devices/system/cpu/vulnerabilities/mmio_stale_data + /sys/devices/system/cpu/vulnerabilities/old_microcode /sys/devices/system/cpu/vulnerabilities/reg_file_data_sampling /sys/devices/system/cpu/vulnerabilities/retbleed /sys/devices/system/cpu/vulnerabilities/spec_store_bypass diff --git a/Documentation/admin-guide/hw-vuln/old_microcode.rst b/Documentation/admin-guide/hw-vuln/old_microcode.rst new file mode 100644 index 000000000000..6ded8f86b8d0 --- /dev/null +++ b/Documentation/admin-guide/hw-vuln/old_microcode.rst @@ -0,0 +1,21 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============= +Old Microcode +============= + +The kernel keeps a table of released microcode. Systems that had +microcode older than this at boot will say "Vulnerable". This means +that the system was vulnerable to some known CPU issue. It could be +security or functional, the kernel does not know or care. + +You should update the CPU microcode to mitigate any exposure. This is +usually accomplished by updating the files in +/lib/firmware/intel-ucode/ via normal distribution updates. Intel also +distributes these files in a github repo: + + https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files.git + +Just like all the other hardware vulnerabilities, exposure is +determined at boot. Runtime microcode updates do not change the status +of this vulnerability. -- cgit v1.2.3 From 6147c5f081708485e32c656931f6a57b14618fcc Mon Sep 17 00:00:00 2001 From: Thierry Bultel Date: Thu, 3 Apr 2025 23:29:03 +0200 Subject: dt-bindings: soc: renesas: Add Renesas RZ/T2H (R9A09G077) SoC Add RZ/T2H (R9A09G077), its variants, and the RZT2H-EVK evaluation board in documentation. Acked-by: "Rob Herring (Arm)" Signed-off-by: Thierry Bultel Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250403212919.1137670-2-thierry.bultel.yh@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/soc/renesas/renesas.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml index 51a4c48eea6d..6874f425bf1f 100644 --- a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml +++ b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml @@ -570,6 +570,16 @@ properties: - const: renesas,r9a09g057h48 - const: renesas,r9a09g057 + - description: RZ/T2H (R9A09G077) + items: + - enum: + - renesas,rzt2h-evk # RZ/T2H Evaluation Board + - enum: + - renesas,r9a09g077m04 # RZ/T2H with Single Cortex-A55 + Dual Cortex-R52 - no security + - renesas,r9a09g077m24 # RZ/T2H with Dual Cortex-A55 + Dual Cortex-R52 - no security + - renesas,r9a09g077m44 # RZ/T2H with Quad Cortex-A55 + Dual Cortex-R52 - no security + - const: renesas,r9a09g077 + additionalProperties: true ... -- cgit v1.2.3 From ddcbc9d3f19a43de048b03eb43496d6a6c5a4d4f Mon Sep 17 00:00:00 2001 From: Chuan Liu Date: Tue, 15 Apr 2025 10:45:25 +0800 Subject: dt-bindings: soc: amlogic: C3 supports clk-measure C3 adds support for clk-measure. Acked-by: Rob Herring (Arm) Signed-off-by: Chuan Liu Link: https://lore.kernel.org/r/20250415-clk-measure-v3-2-9b8551dd33b4@amlogic.com Signed-off-by: Neil Armstrong --- .../devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml index 77c281153010..275afe7fe374 100644 --- a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml +++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml @@ -22,6 +22,7 @@ properties: - amlogic,meson-axg-clk-measure - amlogic,meson-g12a-clk-measure - amlogic,meson-sm1-clk-measure + - amlogic,c3-clk-measure reg: maxItems: 1 -- cgit v1.2.3 From fb80ff25d57781d18adbe63c2a0170290144311a Mon Sep 17 00:00:00 2001 From: Chuan Liu Date: Tue, 15 Apr 2025 10:45:26 +0800 Subject: dt-bindings: soc: amlogic: S4 supports clk-measure S4 adds support for clk-measure. Acked-by: Rob Herring (Arm) Signed-off-by: Chuan Liu Link: https://lore.kernel.org/r/20250415-clk-measure-v3-3-9b8551dd33b4@amlogic.com Signed-off-by: Neil Armstrong --- .../devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml index 275afe7fe374..39d4637c2d08 100644 --- a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml +++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml @@ -23,6 +23,7 @@ properties: - amlogic,meson-g12a-clk-measure - amlogic,meson-sm1-clk-measure - amlogic,c3-clk-measure + - amlogic,s4-clk-measure reg: maxItems: 1 -- cgit v1.2.3 From 0c9f82446123635cfbb8ceeca074f2dce6a0ccae Mon Sep 17 00:00:00 2001 From: Shengjiu Wang Date: Fri, 18 Apr 2025 13:30:50 +0800 Subject: ASoC: dt-bindings: fsl,mqs: Document audio graph port This device can be used in conjunction with audio-graph-card to provide an endpoint for binding with the other side of the audio link. Signed-off-by: Shengjiu Wang Acked-by: "Rob Herring (Arm)" Link: https://patch.msgid.link/20250418053050.2755249-1-shengjiu.wang@nxp.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/sound/fsl,mqs.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/fsl,mqs.yaml b/Documentation/devicetree/bindings/sound/fsl,mqs.yaml index d1ac84e518a0..1415247c92c8 100644 --- a/Documentation/devicetree/bindings/sound/fsl,mqs.yaml +++ b/Documentation/devicetree/bindings/sound/fsl,mqs.yaml @@ -52,6 +52,10 @@ properties: resets: maxItems: 1 + port: + $ref: audio-graph-port.yaml# + unevaluatedProperties: false + required: - compatible - clocks -- cgit v1.2.3 From 93d968adbba3d30c625149d7aa12369a42b89d3e Mon Sep 17 00:00:00 2001 From: Xianwei Zhao Date: Mon, 17 Mar 2025 15:16:52 +0800 Subject: dt-bindings: arm: amlogic: add S6 support Document the new S6 SoC/board device tree bindings. Amlogic S6 is an advanced application processor designed for hybrid OTT/IP Set Top Box and high-end media box applications. Signed-off-by: Xianwei Zhao Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250317-s6-s7-basic-v1-1-d653384e41f3@amlogic.com Signed-off-by: Neil Armstrong --- Documentation/devicetree/bindings/arm/amlogic.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml index 0647851ae1f5..67423c838719 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -237,6 +237,12 @@ properties: - amlogic,aq222 - const: amlogic,s4 + - description: Boards with the Amlogic S6 S905X5 SoC + items: + - enum: + - amlogic,bl209 + - const: amlogic,s6 + - description: Boards with the Amlogic T7 A311D2 SoC items: - enum: -- cgit v1.2.3 From 5c9871f98b187747a873dad2773493f2117b5203 Mon Sep 17 00:00:00 2001 From: Xianwei Zhao Date: Mon, 17 Mar 2025 15:16:53 +0800 Subject: dt-bindings: arm: amlogic: add S7 support Document the new S7 SoC/board device tree bindings. Amlogic S7 is an advanced application processor designed for hybrid OTT/IP Set Top Box and high-end media box applications. Signed-off-by: Xianwei Zhao Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250317-s6-s7-basic-v1-2-d653384e41f3@amlogic.com Signed-off-by: Neil Armstrong --- Documentation/devicetree/bindings/arm/amlogic.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml index 67423c838719..9a6e98b55685 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -243,6 +243,12 @@ properties: - amlogic,bl209 - const: amlogic,s6 + - description: Boards with the Amlogic S7 S805X3 SoC + items: + - enum: + - amlogic,bp201 + - const: amlogic,s7 + - description: Boards with the Amlogic T7 A311D2 SoC items: - enum: -- cgit v1.2.3 From c0c89503f6b722d9eb450ce1cfe52f785be07cfd Mon Sep 17 00:00:00 2001 From: Xianwei Zhao Date: Mon, 17 Mar 2025 15:16:54 +0800 Subject: dt-bindings: arm: amlogic: add S7D support Document the new S7D SoC/board device tree bindings. Amlogic S7D is an advanced application processor designed for hybrid OTT/IP Set Top Box and high-end media box applications. Signed-off-by: Xianwei Zhao Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250317-s6-s7-basic-v1-3-d653384e41f3@amlogic.com Signed-off-by: Neil Armstrong --- Documentation/devicetree/bindings/arm/amlogic.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml index 9a6e98b55685..0c84c56855ba 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -249,6 +249,12 @@ properties: - amlogic,bp201 - const: amlogic,s7 + - description: Boards with the Amlogic S7D S905X5M SoC + items: + - enum: + - amlogic,bm202 + - const: amlogic,s7d + - description: Boards with the Amlogic T7 A311D2 SoC items: - enum: -- cgit v1.2.3 From fd55908d3278300ec4cbbacbfb07748bb9166314 Mon Sep 17 00:00:00 2001 From: Nicolas Frattaroli Date: Thu, 10 Apr 2025 21:39:57 +0200 Subject: ASoC: dt-bindings: add schema for rockchip SAI controllers Rockchip introduced a new audio controller called the "Serial Audio Interface", or "SAI" for short, on some of their newer SoCs. In particular, this controller is used several times on the RK3576 SoC. Add a schema for it, with only an RK3576 compatible for now. Other SoCs may follow as mainline support for them lands. Signed-off-by: Nicolas Frattaroli Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250410-rk3576-sai-v2-5-c64608346be3@collabora.com Signed-off-by: Mark Brown --- .../bindings/sound/rockchip,rk3576-sai.yaml | 144 +++++++++++++++++++++ 1 file changed, 144 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/rockchip,rk3576-sai.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3576-sai.yaml b/Documentation/devicetree/bindings/sound/rockchip,rk3576-sai.yaml new file mode 100644 index 000000000000..149da9a91451 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/rockchip,rk3576-sai.yaml @@ -0,0 +1,144 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/rockchip,rk3576-sai.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip Serial Audio Interface Controller + +description: + The Rockchip Serial Audio Interface (SAI) controller is a flexible audio + controller that implements the I2S, I2S/TDM and the PDM standards. + +maintainers: + - Nicolas Frattaroli + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + const: rockchip,rk3576-sai + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + dmas: + minItems: 1 + maxItems: 2 + + dma-names: + minItems: 1 + items: + - enum: [tx, rx] + - const: rx + + clocks: + items: + - description: master audio clock + - description: AHB clock driving the interface + + clock-names: + items: + - const: mclk + - const: hclk + + resets: + minItems: 1 + items: + - description: reset for the mclk domain + - description: reset for the hclk domain + + reset-names: + minItems: 1 + items: + - const: m + - const: h + + port: + $ref: audio-graph-port.yaml# + unevaluatedProperties: false + + power-domains: + maxItems: 1 + + "#sound-dai-cells": + const: 0 + + rockchip,sai-rx-route: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + Defines the mapping of the controller's SDI ports to actual input lanes, + as well as the number of input lanes. + rockchip,sai-rx-route = <3> would mean sdi3 is receiving from data0, and + that there is only one receiving lane. + This property's absence is to be understood as only one receiving lane + being used if the controller has capture capabilities. + maxItems: 4 + items: + minimum: 0 + maximum: 3 + + rockchip,sai-tx-route: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + Defines the mapping of the controller's SDO ports to actual output lanes, + as well as the number of output lanes. + rockchip,sai-tx-route = <3> would mean sdo3 is sending to data0, and + that there is only one transmitting lane. + This property's absence is to be understood as only one transmitting lane + being used if the controller has playback capabilities. + maxItems: 4 + items: + minimum: 0 + maximum: 3 + +required: + - compatible + - reg + - dmas + - dma-names + - clocks + - clock-names + - "#sound-dai-cells" + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #include + + bus { + #address-cells = <2>; + #size-cells = <2>; + sai1: sai@2a610000 { + compatible = "rockchip,rk3576-sai"; + reg = <0x0 0x2a610000 0x0 0x1000>; + interrupts = ; + clocks = <&cru MCLK_SAI1_8CH>, <&cru HCLK_SAI1_8CH>; + clock-names = "mclk", "hclk"; + dmas = <&dmac0 2>, <&dmac0 3>; + dma-names = "tx", "rx"; + power-domains = <&power RK3576_PD_AUDIO>; + resets = <&cru SRST_M_SAI1_8CH>, <&cru SRST_H_SAI1_8CH>; + reset-names = "m", "h"; + pinctrl-names = "default"; + pinctrl-0 = <&sai1m0_lrck + &sai1m0_sclk + &sai1m0_sdi0 + &sai1m0_sdo0 + &sai1m0_sdo1 + &sai1m0_sdo2 + &sai1m0_sdo3>; + rockchip,sai-tx-route = <3 1 2 0>; + #sound-dai-cells = <0>; + }; + }; -- cgit v1.2.3 From 273fc608bdabf8e42457518a310b2475dfa4f5b9 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 10 Apr 2025 10:47:33 -0500 Subject: dt-bindings: arm/cpus: Add schemas for "enable-method" dependencies Replace the prose for properties dependent on specific "enable-method" values with schemas defining the same requirements. Both "qcom,acc" and "qcom,saw" properties appear to be required for any of the Qualcomm enable-method values, so the schema is a bit simpler than what the text said. The properties are also needed on some Qualcomm platforms with other enable-method values. It's limited to Cortex A53 based platforms so use that to disable the properties. The references to arm/msm/qcom,saw2.txt and arm/msm/qcom,kpss-acc.txt are out of date, so just drop them. Reviewed-by: Sudeep Holla Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-12-63d7dc9ddd0a@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 92 ++++++++++++++-------- .../devicetree/bindings/soc/qcom/qcom,saw2.yaml | 3 +- 2 files changed, 61 insertions(+), 34 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 2e666b2a4dcd..03eb72cb7b30 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -273,8 +273,6 @@ properties: description: The DT specification defines this as 64-bit always, but some 32-bit Arm systems have used a 32-bit value which must be supported. - Required for systems that have an "enable-method" - property value of "spin-table". cpu-idle-states: $ref: /schemas/types.yaml#/definitions/phandle-array @@ -333,24 +331,13 @@ properties: qcom,saw: $ref: /schemas/types.yaml#/definitions/phandle - description: | - Specifies the SAW* node associated with this CPU. - - Required for systems that have an "enable-method" property - value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2" - - * arm/msm/qcom,saw2.txt + description: + Specifies the SAW node associated with this CPU. qcom,acc: $ref: /schemas/types.yaml#/definitions/phandle - description: | - Specifies the ACC* node associated with this CPU. - - Required for systems that have an "enable-method" property - value of "qcom,kpss-acc-v1", "qcom,kpss-acc-v2", "qcom,msm8226-smp" or - "qcom,msm8916-smp". - - * arm/msm/qcom,kpss-acc.txt + description: + Specifies the ACC node associated with this CPU. rockchip,pmu: $ref: /schemas/types.yaml#/definitions/phandle @@ -378,22 +365,61 @@ properties: formed by encoding the target CPU id into the low bits of the physical start address it should jump to. -if: - # If the enable-method property contains one of those values - properties: - enable-method: - contains: - enum: - - brcm,bcm11351-cpu-method - - brcm,bcm23550 - - brcm,bcm-nsp-smp - # and if enable-method is present - required: - - enable-method - -then: - required: - - secondary-boot-reg +allOf: + - if: + # If the enable-method property contains one of those values + properties: + enable-method: + contains: + enum: + - brcm,bcm11351-cpu-method + - brcm,bcm23550 + - brcm,bcm-nsp-smp + # and if enable-method is present + required: + - enable-method + then: + required: + - secondary-boot-reg + - if: + properties: + enable-method: + enum: + - spin-table + - renesas,r9a06g032-smp + required: + - enable-method + then: + required: + - cpu-release-addr + - if: + properties: + enable-method: + enum: + - qcom,kpss-acc-v1 + - qcom,kpss-acc-v2 + - qcom,msm8226-smp + - qcom,msm8916-smp + required: + - enable-method + then: + required: + - qcom,acc + - qcom,saw + else: + if: + # 2 Qualcomm platforms bootloaders need qcom,acc and qcom,saw yet use + # "spin-table" or "psci" enable-methods. Disallowing the properties for + # all other CPUs is the best we can do as there's not any way to + # distinguish these Qualcomm platforms. + not: + properties: + compatible: + const: arm,cortex-a53 + then: + properties: + qcom,acc: false + qcom,saw: false required: - device_type diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml index ca4bce817273..c2f1f5946cfa 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml @@ -73,9 +73,10 @@ examples: #size-cells = <0>; cpu@0 { - compatible = "qcom,kryo"; + compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "qcom,kpss-acc-v2"; + qcom,acc = <&acc0>; qcom,saw = <&saw0>; reg = <0x0>; operating-points-v2 = <&cpu_opp_table>; -- cgit v1.2.3 From e4554b052b4ce9a76f1772b84e8fa58673de340c Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 10 Apr 2025 10:47:34 -0500 Subject: dt-bindings: arm/cpus: Re-wrap 'description' entries Some of the 'description' entries have odd line wrapping and incorrect YAML block modifiers. The 'description' entries should typically wrap at 80 chars. Reformat the entries to follow that along with using '>' modifiers as appropriate. Reviewed-by: Sudeep Holla Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-13-63d7dc9ddd0a@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 85 +++++++++++-------------- 1 file changed, 36 insertions(+), 49 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 03eb72cb7b30..423f0792b030 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -10,9 +10,9 @@ maintainers: - Lorenzo Pieralisi description: |+ - The device tree allows to describe the layout of CPUs in a system through - the "cpus" node, which in turn contains a number of subnodes (ie "cpu") - defining properties for every cpu. + The device tree allows to describe the layout of CPUs in a system through the + "cpus" node, which in turn contains a number of subnodes (ie "cpu") defining + properties for every cpu. Bindings for CPU nodes follow the Devicetree Specification, available from: @@ -41,45 +41,40 @@ description: |+ properties: reg: maxItems: 1 - description: | - Usage and definition depend on ARM architecture version and - configuration: + description: > + Usage and definition depend on ARM architecture version and configuration: - On uniprocessor ARM architectures previous to v7 - this property is required and must be set to 0. + On uniprocessor ARM architectures previous to v7 this property is required + and must be set to 0. - On ARM 11 MPcore based systems this property is - required and matches the CPUID[11:0] register bits. + On ARM 11 MPcore based systems this property is required and matches the + CPUID[11:0] register bits. - Bits [11:0] in the reg cell must be set to - bits [11:0] in CPU ID register. + Bits [11:0] in the reg cell must be set to bits [11:0] in CPU ID register. All other bits in the reg cell must be set to 0. - On 32-bit ARM v7 or later systems this property is - required and matches the CPU MPIDR[23:0] register - bits. + On 32-bit ARM v7 or later systems this property is required and matches + the CPU MPIDR[23:0] register bits. - Bits [23:0] in the reg cell must be set to - bits [23:0] in MPIDR. + Bits [23:0] in the reg cell must be set to bits [23:0] in MPIDR. All other bits in the reg cell must be set to 0. - On ARM v8 64-bit systems this property is required - and matches the MPIDR_EL1 register affinity bits. + On ARM v8 64-bit systems this property is required and matches the + MPIDR_EL1 register affinity bits. * If cpus node's #address-cells property is set to 2 - The first reg cell bits [7:0] must be set to - bits [39:32] of MPIDR_EL1. + The first reg cell bits [7:0] must be set to bits [39:32] of + MPIDR_EL1. - The second reg cell bits [23:0] must be set to - bits [23:0] of MPIDR_EL1. + The second reg cell bits [23:0] must be set to bits [23:0] of + MPIDR_EL1. * If cpus node's #address-cells property is set to 1 - The reg cell bits [23:0] must be set to bits [23:0] - of MPIDR_EL1. + The reg cell bits [23:0] must be set to bits [23:0] of MPIDR_EL1. All other bits in the reg cells must be set to 0. @@ -278,29 +273,26 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle-array items: maxItems: 1 - description: | - List of phandles to idle state nodes supported - by this cpu (see ./idle-states.yaml). + description: + List of phandles to idle state nodes supported by this cpu (see + ./idle-states.yaml). capacity-dmips-mhz: description: u32 value representing CPU capacity (see ../cpu/cpu-capacity.txt) in - DMIPS/MHz, relative to highest capacity-dmips-mhz - in the system. + DMIPS/MHz, relative to highest capacity-dmips-mhz in the system. cci-control-port: true dynamic-power-coefficient: $ref: /schemas/types.yaml#/definitions/uint32 - description: - A u32 value that represents the running time dynamic - power coefficient in units of uW/MHz/V^2. The - coefficient can either be calculated from power + description: > + A u32 value that represents the running time dynamic power coefficient in + units of uW/MHz/V^2. The coefficient can either be calculated from power measurements or derived by analysis. - The dynamic power consumption of the CPU is - proportional to the square of the Voltage (V) and - the clock frequency (f). The coefficient is used to + The dynamic power consumption of the CPU is proportional to the square of + the Voltage (V) and the clock frequency (f). The coefficient is used to calculate the dynamic power as below - Pdyn = dynamic-power-coefficient * V^2 * f @@ -309,10 +301,6 @@ properties: performance-domains: maxItems: 1 - description: - List of phandles and performance domain specifiers, as defined by - bindings of the performance domain provider. See also - dvfs/performance-domain.yaml. power-domains: description: @@ -341,22 +329,21 @@ properties: rockchip,pmu: $ref: /schemas/types.yaml#/definitions/phandle - description: | + description: > Specifies the syscon node controlling the cpu core power domains. - Optional for systems that have an "enable-method" - property value of "rockchip,rk3066-smp" - While optional, it is the preferred way to get access to - the cpu-core power-domains. + Optional for systems that have an "enable-method" property value of + "rockchip,rk3066-smp". While optional, it is the preferred way to get + access to the cpu-core power-domains. secondary-boot-reg: $ref: /schemas/types.yaml#/definitions/uint32 - description: | + description: > Required for systems that have an "enable-method" property value of "brcm,bcm11351-cpu-method", "brcm,bcm23550" or "brcm,bcm-nsp-smp". - This includes the following SoCs: | - BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664, BCM23550 + This includes the following SoCs: + BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664, BCM23550, BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312 The secondary-boot-reg property is a u32 value that specifies the -- cgit v1.2.3 From f879ee2ce0d46327e90f61c5dc85fb13a740de10 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 10 Apr 2025 10:47:35 -0500 Subject: dt-bindings: Reference opp-v1 schema in CPU schemas The opp-v1 binding is only used in MIPS and arm32 CPU nodes, so add a $ref to it in the CPU schemas and drop the "select". As opp-v1 has long been deprecated, mark it as such. Acked-by: Viresh Kumar Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Sudeep Holla Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-14-63d7dc9ddd0a@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 1 + Documentation/devicetree/bindings/mips/cpus.yaml | 3 ++- Documentation/devicetree/bindings/opp/opp-v1.yaml | 2 +- 3 files changed, 4 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 423f0792b030..042fe0cb4a12 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -353,6 +353,7 @@ properties: physical start address it should jump to. allOf: + - $ref: /schemas/opp/opp-v1.yaml# - if: # If the enable-method property contains one of those values properties: diff --git a/Documentation/devicetree/bindings/mips/cpus.yaml b/Documentation/devicetree/bindings/mips/cpus.yaml index a85137add668..471373ad0cfb 100644 --- a/Documentation/devicetree/bindings/mips/cpus.yaml +++ b/Documentation/devicetree/bindings/mips/cpus.yaml @@ -50,6 +50,7 @@ properties: device_type: true allOf: + - $ref: /schemas/opp/opp-v1.yaml# - if: properties: compatible: @@ -68,7 +69,7 @@ required: - compatible - reg -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/opp/opp-v1.yaml b/Documentation/devicetree/bindings/opp/opp-v1.yaml index 07e26c267815..1b59b103dab6 100644 --- a/Documentation/devicetree/bindings/opp/opp-v1.yaml +++ b/Documentation/devicetree/bindings/opp/opp-v1.yaml @@ -18,7 +18,7 @@ description: |+ This binding only supports voltage-frequency pairs. -select: true +deprecated: true properties: operating-points: -- cgit v1.2.3 From 80728bfa8c79b81eeea305f555fe5582d1907286 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 10 Apr 2025 10:47:36 -0500 Subject: dt-bindings: arm/cpus: Add missing properties The Arm CPU schema is missing a number of properties already in use. This has gone unnoticed as extra properties have not been restricted. Add a missing reference to cpu.yaml, and add all the missing properties. As "clock-latency" and "voltage-tolerance" are related to opp-v1, add those properties to the opp-v1.yaml schema. With this, other properties can be prevented from creeping in with 'unevaluatedProperties: false'. Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Sudeep Holla Acked-by: Viresh Kumar Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-15-63d7dc9ddd0a@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 46 ++++++++++++++++++++++- Documentation/devicetree/bindings/opp/opp-v1.yaml | 16 ++++++++ 2 files changed, 61 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 042fe0cb4a12..2efad337f860 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -299,6 +299,16 @@ properties: where voltage is in V, frequency is in MHz. + interconnects: + minItems: 1 + maxItems: 2 + + nvmem-cells: + maxItems: 1 + + nvmem-cell-names: + const: speed_grade + performance-domains: maxItems: 1 @@ -317,6 +327,31 @@ properties: corresponding to the index of an SCMI performance domain provider, must be "perf". + resets: + maxItems: 1 + + arm-supply: + deprecated: true + description: Use 'cpu-supply' instead + + cpu0-supply: + deprecated: true + description: Use 'cpu-supply' instead + + mem-supply: true + + proc-supply: + deprecated: true + description: Use 'cpu-supply' instead + + sram-supply: + deprecated: true + description: Use 'mem-supply' instead + + mediatek,cci: + $ref: /schemas/types.yaml#/definitions/phandle + description: Link to Mediatek Cache Coherent Interconnect + qcom,saw: $ref: /schemas/types.yaml#/definitions/phandle description: @@ -327,6 +362,11 @@ properties: description: Specifies the ACC node associated with this CPU. + qcom,freq-domain: + description: Specifies the QCom CPUFREQ HW associated with the CPU. + $ref: /schemas/types.yaml#/definitions/phandle-array + maxItems: 1 + rockchip,pmu: $ref: /schemas/types.yaml#/definitions/phandle description: > @@ -352,7 +392,11 @@ properties: formed by encoding the target CPU id into the low bits of the physical start address it should jump to. + thermal-idle: + type: object + allOf: + - $ref: /schemas/cpu.yaml# - $ref: /schemas/opp/opp-v1.yaml# - if: # If the enable-method property contains one of those values @@ -417,7 +461,7 @@ required: dependencies: rockchip,pmu: [enable-method] -additionalProperties: true +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/opp/opp-v1.yaml b/Documentation/devicetree/bindings/opp/opp-v1.yaml index 1b59b103dab6..61c080e50859 100644 --- a/Documentation/devicetree/bindings/opp/opp-v1.yaml +++ b/Documentation/devicetree/bindings/opp/opp-v1.yaml @@ -21,6 +21,18 @@ description: |+ deprecated: true properties: + clock-latency: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The latency in nanoseconds for clock changes. Use OPP tables for new + designs instead. + + voltage-tolerance: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 10 + description: + The voltage tolerance in percent. Use OPP tables for new designs instead. + operating-points: $ref: /schemas/types.yaml#/definitions/uint32-matrix items: @@ -28,8 +40,12 @@ properties: - description: Frequency in kHz - description: Voltage for OPP in uV +dependencies: + clock-latency: [ operating-points ] + voltage-tolerance: [ operating-points ] additionalProperties: true + examples: - | cpus { -- cgit v1.2.3 From bfec39eb078233f15141b95368c7829463756762 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 10 Apr 2025 10:47:37 -0500 Subject: dt-bindings: arm/cpus: Add power-domains constraints The "power-domains" and "power-domains-names" properties are missing any constraints. Add the constraints and drop the generic descriptions. Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Ulf Hansson Reviewed-by: Sudeep Holla Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-16-63d7dc9ddd0a@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 2efad337f860..07f0227cf804 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -313,19 +313,15 @@ properties: maxItems: 1 power-domains: - description: - List of phandles and PM domain specifiers, as defined by bindings of the - PM domain provider (see also ../power_domain.txt). + maxItems: 1 power-domain-names: description: - A list of power domain name strings sorted in the same order as the - power-domains property. - For PSCI based platforms, the name corresponding to the index of the PSCI PM domain provider, must be "psci". For SCMI based platforms, the name corresponding to the index of an SCMI performance domain provider, must be "perf". + enum: [ psci, perf, cpr ] resets: maxItems: 1 -- cgit v1.2.3 From a172b5de41d9857dff7cca21942a6bc09a4e03af Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 10 Apr 2025 10:47:38 -0500 Subject: dt-bindings: cpufreq: Drop redundant Mediatek binding The Mediatek CPUFreq binding document just describes properties from the CPU node which the driver uses. This is redundant as all the properties are described in the arm/cpus.yaml schema. Signed-off-by: Rob Herring (Arm) Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Sudeep Holla Acked-by: Viresh Kumar Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-17-63d7dc9ddd0a@kernel.org --- .../bindings/cpufreq/cpufreq-mediatek.txt | 250 --------------------- 1 file changed, 250 deletions(-) delete mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt deleted file mode 100644 index e0a4ba599abc..000000000000 --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt +++ /dev/null @@ -1,250 +0,0 @@ -Binding for MediaTek's CPUFreq driver -===================================== - -Required properties: -- clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names. -- clock-names: Should contain the following: - "cpu" - The multiplexer for clock input of CPU cluster. - "intermediate" - A parent of "cpu" clock which is used as "intermediate" clock - source (usually MAINPLL) when the original CPU PLL is under - transition and not stable yet. - Please refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for - generic clock consumer properties. -- operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp-v2.yaml - for detail. -- proc-supply: Regulator for Vproc of CPU cluster. - -Optional properties: -- sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver - needs to do "voltage tracking" to step by step scale up/down Vproc and - Vsram to fit SoC specific needs. When absent, the voltage scaling - flow is handled by hardware, hence no software "voltage tracking" is - needed. -- mediatek,cci: - Used to confirm the link status between cpufreq and mediatek cci. Because - cpufreq and mediatek cci could share the same regulator in some MediaTek SoCs. - To prevent the issue of high frequency and low voltage, we need to use this - property to make sure mediatek cci is ready. - For details of mediatek cci, please refer to - Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml -- #cooling-cells: - For details, please refer to - Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml - -Example 1 (MT7623 SoC): - - cpu_opp_table: opp_table { - compatible = "operating-points-v2"; - opp-shared; - - opp-598000000 { - opp-hz = /bits/ 64 <598000000>; - opp-microvolt = <1050000>; - }; - - opp-747500000 { - opp-hz = /bits/ 64 <747500000>; - opp-microvolt = <1050000>; - }; - - opp-1040000000 { - opp-hz = /bits/ 64 <1040000000>; - opp-microvolt = <1150000>; - }; - - opp-1196000000 { - opp-hz = /bits/ 64 <1196000000>; - opp-microvolt = <1200000>; - }; - - opp-1300000000 { - opp-hz = /bits/ 64 <1300000000>; - opp-microvolt = <1300000>; - }; - }; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x0>; - clocks = <&infracfg CLK_INFRA_CPUSEL>, - <&apmixedsys CLK_APMIXED_MAINPLL>; - clock-names = "cpu", "intermediate"; - operating-points-v2 = <&cpu_opp_table>; - #cooling-cells = <2>; - }; - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x1>; - operating-points-v2 = <&cpu_opp_table>; - }; - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x2>; - operating-points-v2 = <&cpu_opp_table>; - }; - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x3>; - operating-points-v2 = <&cpu_opp_table>; - }; - -Example 2 (MT8173 SoC): - cpu_opp_table_a: opp_table_a { - compatible = "operating-points-v2"; - opp-shared; - - opp-507000000 { - opp-hz = /bits/ 64 <507000000>; - opp-microvolt = <859000>; - }; - - opp-702000000 { - opp-hz = /bits/ 64 <702000000>; - opp-microvolt = <908000>; - }; - - opp-1001000000 { - opp-hz = /bits/ 64 <1001000000>; - opp-microvolt = <983000>; - }; - - opp-1105000000 { - opp-hz = /bits/ 64 <1105000000>; - opp-microvolt = <1009000>; - }; - - opp-1183000000 { - opp-hz = /bits/ 64 <1183000000>; - opp-microvolt = <1028000>; - }; - - opp-1404000000 { - opp-hz = /bits/ 64 <1404000000>; - opp-microvolt = <1083000>; - }; - - opp-1508000000 { - opp-hz = /bits/ 64 <1508000000>; - opp-microvolt = <1109000>; - }; - - opp-1573000000 { - opp-hz = /bits/ 64 <1573000000>; - opp-microvolt = <1125000>; - }; - }; - - cpu_opp_table_b: opp_table_b { - compatible = "operating-points-v2"; - opp-shared; - - opp-507000000 { - opp-hz = /bits/ 64 <507000000>; - opp-microvolt = <828000>; - }; - - opp-702000000 { - opp-hz = /bits/ 64 <702000000>; - opp-microvolt = <867000>; - }; - - opp-1001000000 { - opp-hz = /bits/ 64 <1001000000>; - opp-microvolt = <927000>; - }; - - opp-1209000000 { - opp-hz = /bits/ 64 <1209000000>; - opp-microvolt = <968000>; - }; - - opp-1404000000 { - opp-hz = /bits/ 64 <1007000000>; - opp-microvolt = <1028000>; - }; - - opp-1612000000 { - opp-hz = /bits/ 64 <1612000000>; - opp-microvolt = <1049000>; - }; - - opp-1807000000 { - opp-hz = /bits/ 64 <1807000000>; - opp-microvolt = <1089000>; - }; - - opp-1989000000 { - opp-hz = /bits/ 64 <1989000000>; - opp-microvolt = <1125000>; - }; - }; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x000>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&infracfg CLK_INFRA_CA53SEL>, - <&apmixedsys CLK_APMIXED_MAINPLL>; - clock-names = "cpu", "intermediate"; - operating-points-v2 = <&cpu_opp_table_a>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x001>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&infracfg CLK_INFRA_CA53SEL>, - <&apmixedsys CLK_APMIXED_MAINPLL>; - clock-names = "cpu", "intermediate"; - operating-points-v2 = <&cpu_opp_table_a>; - }; - - cpu2: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a72"; - reg = <0x100>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&infracfg CLK_INFRA_CA72SEL>, - <&apmixedsys CLK_APMIXED_MAINPLL>; - clock-names = "cpu", "intermediate"; - operating-points-v2 = <&cpu_opp_table_b>; - }; - - cpu3: cpu@101 { - device_type = "cpu"; - compatible = "arm,cortex-a72"; - reg = <0x101>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&infracfg CLK_INFRA_CA72SEL>, - <&apmixedsys CLK_APMIXED_MAINPLL>; - clock-names = "cpu", "intermediate"; - operating-points-v2 = <&cpu_opp_table_b>; - }; - - &cpu0 { - proc-supply = <&mt6397_vpca15_reg>; - }; - - &cpu1 { - proc-supply = <&mt6397_vpca15_reg>; - }; - - &cpu2 { - proc-supply = <&da9211_vcpu_reg>; - sram-supply = <&mt6397_vsramca7_reg>; - }; - - &cpu3 { - proc-supply = <&da9211_vcpu_reg>; - sram-supply = <&mt6397_vsramca7_reg>; - }; -- cgit v1.2.3 From 65e079fd1a6a293ecfdca77f69773a9f2d8f0108 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 10 Apr 2025 18:25:05 -0400 Subject: dt-bindings: counter: Convert ftm-quaddec.txt to yaml format Convert ftm-quaddec.txt to yaml format. Additional changes: - Remove "status" at example. - Remove label at example. Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250410222509.3242241-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- .../bindings/counter/fsl,ftm-quaddec.yaml | 36 ++++++++++++++++++++++ .../devicetree/bindings/counter/ftm-quaddec.txt | 18 ----------- 2 files changed, 36 insertions(+), 18 deletions(-) create mode 100644 Documentation/devicetree/bindings/counter/fsl,ftm-quaddec.yaml delete mode 100644 Documentation/devicetree/bindings/counter/ftm-quaddec.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/counter/fsl,ftm-quaddec.yaml b/Documentation/devicetree/bindings/counter/fsl,ftm-quaddec.yaml new file mode 100644 index 000000000000..384ca63b64d5 --- /dev/null +++ b/Documentation/devicetree/bindings/counter/fsl,ftm-quaddec.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/counter/fsl,ftm-quaddec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: FlexTimer Quadrature decoder counter + +description: + Exposes a simple counter for the quadrature decoder mode. + +maintainers: + - Frank Li + +properties: + compatible: + const: fsl,ftm-quaddec + + reg: + maxItems: 1 + + big-endian: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + counter@29d0000 { + compatible = "fsl,ftm-quaddec"; + reg = <0x29d0000 0x10000>; + big-endian; + }; diff --git a/Documentation/devicetree/bindings/counter/ftm-quaddec.txt b/Documentation/devicetree/bindings/counter/ftm-quaddec.txt deleted file mode 100644 index 4d18cd722074..000000000000 --- a/Documentation/devicetree/bindings/counter/ftm-quaddec.txt +++ /dev/null @@ -1,18 +0,0 @@ -FlexTimer Quadrature decoder counter - -This driver exposes a simple counter for the quadrature decoder mode. - -Required properties: -- compatible: Must be "fsl,ftm-quaddec". -- reg: Must be set to the memory region of the flextimer. - -Optional property: -- big-endian: Access the device registers in big-endian mode. - -Example: - counter0: counter@29d0000 { - compatible = "fsl,ftm-quaddec"; - reg = <0x0 0x29d0000 0x0 0x10000>; - big-endian; - status = "disabled"; - }; -- cgit v1.2.3 From 3fb7bebcb6e5aefd45f6c7fba3ebb9adc11f706a Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 10 Apr 2025 15:13:22 -0500 Subject: dt-bindings: Remove obsolete cpu-topology.txt The cpu topology binding is now covered by the dtschema cpu-map.yaml schema with all the relevant descriptions moved to it. Link: https://lore.kernel.org/r/20250410201325.962203-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/cpu/cpu-topology.txt | 553 --------------------- 1 file changed, 553 deletions(-) delete mode 100644 Documentation/devicetree/bindings/cpu/cpu-topology.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/cpu/cpu-topology.txt b/Documentation/devicetree/bindings/cpu/cpu-topology.txt deleted file mode 100644 index 9bd530a35d14..000000000000 --- a/Documentation/devicetree/bindings/cpu/cpu-topology.txt +++ /dev/null @@ -1,553 +0,0 @@ -=========================================== -CPU topology binding description -=========================================== - -=========================================== -1 - Introduction -=========================================== - -In a SMP system, the hierarchy of CPUs is defined through three entities that -are used to describe the layout of physical CPUs in the system: - -- socket -- cluster -- core -- thread - -The bottom hierarchy level sits at core or thread level depending on whether -symmetric multi-threading (SMT) is supported or not. - -For instance in a system where CPUs support SMT, "cpu" nodes represent all -threads existing in the system and map to the hierarchy level "thread" above. -In systems where SMT is not supported "cpu" nodes represent all cores present -in the system and map to the hierarchy level "core" above. - -CPU topology bindings allow one to associate cpu nodes with hierarchical groups -corresponding to the system hierarchy; syntactically they are defined as device -tree nodes. - -Currently, only ARM/RISC-V intend to use this cpu topology binding but it may be -used for any other architecture as well. - -The cpu nodes, as per bindings defined in [4], represent the devices that -correspond to physical CPUs and are to be mapped to the hierarchy levels. - -A topology description containing phandles to cpu nodes that are not compliant -with bindings standardized in [4] is therefore considered invalid. - -=========================================== -2 - cpu-map node -=========================================== - -The ARM/RISC-V CPU topology is defined within the cpu-map node, which is a direct -child of the cpus node and provides a container where the actual topology -nodes are listed. - -- cpu-map node - - Usage: Optional - On SMP systems provide CPUs topology to the OS. - Uniprocessor systems do not require a topology - description and therefore should not define a - cpu-map node. - - Description: The cpu-map node is just a container node where its - subnodes describe the CPU topology. - - Node name must be "cpu-map". - - The cpu-map node's parent node must be the cpus node. - - The cpu-map node's child nodes can be: - - - one or more cluster nodes or - - one or more socket nodes in a multi-socket system - - Any other configuration is considered invalid. - -The cpu-map node can only contain 4 types of child nodes: - -- socket node -- cluster node -- core node -- thread node - -whose bindings are described in paragraph 3. - -The nodes describing the CPU topology (socket/cluster/core/thread) can -only be defined within the cpu-map node and every core/thread in the -system must be defined within the topology. Any other configuration is -invalid and therefore must be ignored. - -=========================================== -2.1 - cpu-map child nodes naming convention -=========================================== - -cpu-map child nodes must follow a naming convention where the node name -must be "socketN", "clusterN", "coreN", "threadN" depending on the node type -(ie socket/cluster/core/thread) (where N = {0, 1, ...} is the node number; nodes -which are siblings within a single common parent node must be given a unique and -sequential N value, starting from 0). -cpu-map child nodes which do not share a common parent node can have the same -name (ie same number N as other cpu-map child nodes at different device tree -levels) since name uniqueness will be guaranteed by the device tree hierarchy. - -=========================================== -3 - socket/cluster/core/thread node bindings -=========================================== - -Bindings for socket/cluster/cpu/thread nodes are defined as follows: - -- socket node - - Description: must be declared within a cpu-map node, one node - per physical socket in the system. A system can - contain single or multiple physical socket. - The association of sockets and NUMA nodes is beyond - the scope of this bindings, please refer [2] for - NUMA bindings. - - This node is optional for a single socket system. - - The socket node name must be "socketN" as described in 2.1 above. - A socket node can not be a leaf node. - - A socket node's child nodes must be one or more cluster nodes. - - Any other configuration is considered invalid. - -- cluster node - - Description: must be declared within a cpu-map node, one node - per cluster. A system can contain several layers of - clustering within a single physical socket and cluster - nodes can be contained in parent cluster nodes. - - The cluster node name must be "clusterN" as described in 2.1 above. - A cluster node can not be a leaf node. - - A cluster node's child nodes must be: - - - one or more cluster nodes; or - - one or more core nodes - - Any other configuration is considered invalid. - -- core node - - Description: must be declared in a cluster node, one node per core in - the cluster. If the system does not support SMT, core - nodes are leaf nodes, otherwise they become containers of - thread nodes. - - The core node name must be "coreN" as described in 2.1 above. - - A core node must be a leaf node if SMT is not supported. - - Properties for core nodes that are leaf nodes: - - - cpu - Usage: required - Value type: - Definition: a phandle to the cpu node that corresponds to the - core node. - - If a core node is not a leaf node (CPUs supporting SMT) a core node's - child nodes can be: - - - one or more thread nodes - - Any other configuration is considered invalid. - -- thread node - - Description: must be declared in a core node, one node per thread - in the core if the system supports SMT. Thread nodes are - always leaf nodes in the device tree. - - The thread node name must be "threadN" as described in 2.1 above. - - A thread node must be a leaf node. - - A thread node must contain the following property: - - - cpu - Usage: required - Value type: - Definition: a phandle to the cpu node that corresponds to - the thread node. - -=========================================== -4 - Example dts -=========================================== - -Example 1 (ARM 64-bit, 16-cpu system, two clusters of clusters in a single -physical socket): - -cpus { - #size-cells = <0>; - #address-cells = <2>; - - cpu-map { - socket0 { - cluster0 { - cluster0 { - core0 { - thread0 { - cpu = <&CPU0>; - }; - thread1 { - cpu = <&CPU1>; - }; - }; - - core1 { - thread0 { - cpu = <&CPU2>; - }; - thread1 { - cpu = <&CPU3>; - }; - }; - }; - - cluster1 { - core0 { - thread0 { - cpu = <&CPU4>; - }; - thread1 { - cpu = <&CPU5>; - }; - }; - - core1 { - thread0 { - cpu = <&CPU6>; - }; - thread1 { - cpu = <&CPU7>; - }; - }; - }; - }; - - cluster1 { - cluster0 { - core0 { - thread0 { - cpu = <&CPU8>; - }; - thread1 { - cpu = <&CPU9>; - }; - }; - core1 { - thread0 { - cpu = <&CPU10>; - }; - thread1 { - cpu = <&CPU11>; - }; - }; - }; - - cluster1 { - core0 { - thread0 { - cpu = <&CPU12>; - }; - thread1 { - cpu = <&CPU13>; - }; - }; - core1 { - thread0 { - cpu = <&CPU14>; - }; - thread1 { - cpu = <&CPU15>; - }; - }; - }; - }; - }; - }; - - CPU0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x0>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x1>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU2: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x100>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU3: cpu@101 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x101>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU4: cpu@10000 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x10000>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU5: cpu@10001 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x10001>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU6: cpu@10100 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x10100>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU7: cpu@10101 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x10101>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU8: cpu@100000000 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x0>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU9: cpu@100000001 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x1>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU10: cpu@100000100 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x100>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU11: cpu@100000101 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x101>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU12: cpu@100010000 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x10000>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU13: cpu@100010001 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x10001>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU14: cpu@100010100 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x10100>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU15: cpu@100010101 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x10101>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; -}; - -Example 2 (ARM 32-bit, dual-cluster, 8-cpu system, no SMT): - -cpus { - #size-cells = <0>; - #address-cells = <1>; - - cpu-map { - cluster0 { - core0 { - cpu = <&CPU0>; - }; - core1 { - cpu = <&CPU1>; - }; - core2 { - cpu = <&CPU2>; - }; - core3 { - cpu = <&CPU3>; - }; - }; - - cluster1 { - core0 { - cpu = <&CPU4>; - }; - core1 { - cpu = <&CPU5>; - }; - core2 { - cpu = <&CPU6>; - }; - core3 { - cpu = <&CPU7>; - }; - }; - }; - - CPU0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x0>; - }; - - CPU1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x1>; - }; - - CPU2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x2>; - }; - - CPU3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x3>; - }; - - CPU4: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x100>; - }; - - CPU5: cpu@101 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x101>; - }; - - CPU6: cpu@102 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x102>; - }; - - CPU7: cpu@103 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x103>; - }; -}; - -Example 3: HiFive Unleashed (RISC-V 64 bit, 4 core system) - -{ - #address-cells = <2>; - #size-cells = <2>; - compatible = "sifive,fu540g", "sifive,fu500"; - model = "sifive,hifive-unleashed-a00"; - - ... - cpus { - #address-cells = <1>; - #size-cells = <0>; - cpu-map { - socket0 { - cluster0 { - core0 { - cpu = <&CPU1>; - }; - core1 { - cpu = <&CPU2>; - }; - core2 { - cpu0 = <&CPU2>; - }; - core3 { - cpu0 = <&CPU3>; - }; - }; - }; - }; - - CPU1: cpu@1 { - device_type = "cpu"; - compatible = "sifive,rocket0", "riscv"; - reg = <0x1>; - } - - CPU2: cpu@2 { - device_type = "cpu"; - compatible = "sifive,rocket0", "riscv"; - reg = <0x2>; - } - CPU3: cpu@3 { - device_type = "cpu"; - compatible = "sifive,rocket0", "riscv"; - reg = <0x3>; - } - CPU4: cpu@4 { - device_type = "cpu"; - compatible = "sifive,rocket0", "riscv"; - reg = <0x4>; - } - } -}; -=============================================================================== -[1] ARM Linux kernel documentation - Documentation/devicetree/bindings/arm/cpus.yaml -[2] Devicetree NUMA binding description - Documentation/devicetree/bindings/numa.txt -[3] RISC-V Linux kernel documentation - Documentation/devicetree/bindings/riscv/cpus.yaml -[4] https://www.devicetree.org/specifications/ -- cgit v1.2.3 From 540994337d47ffcaeb4aa013833c9036d6bef28a Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 10 Apr 2025 15:13:23 -0500 Subject: dt-bindings: Remove obsolete numa.txt The NUMA binding is now covered by the dtschema numa-distance-map-v1.yaml and CPU and memory node schemas with all the relevant descriptions moved to them. Link: https://lore.kernel.org/r/20250410201325.962203-2-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/numa.txt | 319 ----------------------------- 1 file changed, 319 deletions(-) delete mode 100644 Documentation/devicetree/bindings/numa.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/numa.txt b/Documentation/devicetree/bindings/numa.txt deleted file mode 100644 index 42f282c2f3cc..000000000000 --- a/Documentation/devicetree/bindings/numa.txt +++ /dev/null @@ -1,319 +0,0 @@ -============================================================================== -NUMA binding description. -============================================================================== - -============================================================================== -1 - Introduction -============================================================================== - -Systems employing a Non Uniform Memory Access (NUMA) architecture contain -collections of hardware resources including processors, memory, and I/O buses, -that comprise what is commonly known as a NUMA node. -Processor accesses to memory within the local NUMA node is generally faster -than processor accesses to memory outside of the local NUMA node. -DT defines interfaces that allow the platform to convey NUMA node -topology information to OS. - -============================================================================== -2 - numa-node-id -============================================================================== - -For the purpose of identification, each NUMA node is associated with a unique -token known as a node id. For the purpose of this binding -a node id is a 32-bit integer. - -A device node is associated with a NUMA node by the presence of a -numa-node-id property which contains the node id of the device. - -Example: - /* numa node 0 */ - numa-node-id = <0>; - - /* numa node 1 */ - numa-node-id = <1>; - -============================================================================== -3 - distance-map -============================================================================== - -The optional device tree node distance-map describes the relative -distance (memory latency) between all numa nodes. - -- compatible : Should at least contain "numa-distance-map-v1". - -- distance-matrix - This property defines a matrix to describe the relative distances - between all numa nodes. - It is represented as a list of node pairs and their relative distance. - - Note: - 1. Each entry represents distance from first node to second node. - The distances are equal in either direction. - 2. The distance from a node to self (local distance) is represented - with value 10 and all internode distance should be represented with - a value greater than 10. - 3. distance-matrix should have entries in lexicographical ascending - order of nodes. - 4. There must be only one device node distance-map which must - reside in the root node. - 5. If the distance-map node is not present, a default - distance-matrix is used. - -Example: - 4 nodes connected in mesh/ring topology as below, - - 0_______20______1 - | | - | | - 20 20 - | | - | | - |_______________| - 3 20 2 - - if relative distance for each hop is 20, - then internode distance would be, - 0 -> 1 = 20 - 1 -> 2 = 20 - 2 -> 3 = 20 - 3 -> 0 = 20 - 0 -> 2 = 40 - 1 -> 3 = 40 - - and dt presentation for this distance matrix is, - - distance-map { - compatible = "numa-distance-map-v1"; - distance-matrix = <0 0 10>, - <0 1 20>, - <0 2 40>, - <0 3 20>, - <1 0 20>, - <1 1 10>, - <1 2 20>, - <1 3 40>, - <2 0 40>, - <2 1 20>, - <2 2 10>, - <2 3 20>, - <3 0 20>, - <3 1 40>, - <3 2 20>, - <3 3 10>; - }; - -============================================================================== -4 - Empty memory nodes -============================================================================== - -Empty memory nodes, which no memory resides in, are allowed. There are no -device nodes for these empty memory nodes. However, the NUMA node IDs and -distance maps are still valid and memory may be added into them through -hotplug afterwards. - -Example: - - memory@0 { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x80000000>; - numa-node-id = <0>; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0x0 0x80000000 0x0 0x80000000>; - numa-node-id = <1>; - }; - - /* Empty memory node 2 and 3 */ - distance-map { - compatible = "numa-distance-map-v1"; - distance-matrix = <0 0 10>, - <0 1 20>, - <0 2 40>, - <0 3 20>, - <1 0 20>, - <1 1 10>, - <1 2 20>, - <1 3 40>, - <2 0 40>, - <2 1 20>, - <2 2 10>, - <2 3 20>, - <3 0 20>, - <3 1 40>, - <3 2 20>, - <3 3 10>; - }; - -============================================================================== -5 - Example dts -============================================================================== - -Dual socket system consists of 2 boards connected through ccn bus and -each board having one socket/soc of 8 cpus, memory and pci bus. - - memory@c00000 { - device_type = "memory"; - reg = <0x0 0xc00000 0x0 0x80000000>; - /* node 0 */ - numa-node-id = <0>; - }; - - memory@10000000000 { - device_type = "memory"; - reg = <0x100 0x0 0x0 0x80000000>; - /* node 1 */ - numa-node-id = <1>; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x0>; - enable-method = "psci"; - /* node 0 */ - numa-node-id = <0>; - }; - cpu@1 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x1>; - enable-method = "psci"; - numa-node-id = <0>; - }; - cpu@2 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x2>; - enable-method = "psci"; - numa-node-id = <0>; - }; - cpu@3 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x3>; - enable-method = "psci"; - numa-node-id = <0>; - }; - cpu@4 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x4>; - enable-method = "psci"; - numa-node-id = <0>; - }; - cpu@5 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x5>; - enable-method = "psci"; - numa-node-id = <0>; - }; - cpu@6 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x6>; - enable-method = "psci"; - numa-node-id = <0>; - }; - cpu@7 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x7>; - enable-method = "psci"; - numa-node-id = <0>; - }; - cpu@8 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x8>; - enable-method = "psci"; - /* node 1 */ - numa-node-id = <1>; - }; - cpu@9 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x9>; - enable-method = "psci"; - numa-node-id = <1>; - }; - cpu@a { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0xa>; - enable-method = "psci"; - numa-node-id = <1>; - }; - cpu@b { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0xb>; - enable-method = "psci"; - numa-node-id = <1>; - }; - cpu@c { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0xc>; - enable-method = "psci"; - numa-node-id = <1>; - }; - cpu@d { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0xd>; - enable-method = "psci"; - numa-node-id = <1>; - }; - cpu@e { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0xe>; - enable-method = "psci"; - numa-node-id = <1>; - }; - cpu@f { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0xf>; - enable-method = "psci"; - numa-node-id = <1>; - }; - }; - - pcie0: pcie0@848000000000 { - compatible = "arm,armv8"; - device_type = "pci"; - bus-range = <0 255>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0x8480 0x00000000 0 0x10000000>; /* Configuration space */ - ranges = <0x03000000 0x8010 0x00000000 0x8010 0x00000000 0x70 0x00000000>; - /* node 0 */ - numa-node-id = <0>; - }; - - pcie1: pcie1@948000000000 { - compatible = "arm,armv8"; - device_type = "pci"; - bus-range = <0 255>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0x9480 0x00000000 0 0x10000000>; /* Configuration space */ - ranges = <0x03000000 0x9010 0x00000000 0x9010 0x00000000 0x70 0x00000000>; - /* node 1 */ - numa-node-id = <1>; - }; - - distance-map { - compatible = "numa-distance-map-v1"; - distance-matrix = <0 0 10>, - <0 1 20>, - <1 1 10>; - }; -- cgit v1.2.3 From ac029aa22876bc273ed86432f8c52693e831dc61 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Fri, 11 Apr 2025 21:47:57 +0200 Subject: dt-bindings: remove RZ/N1S bindings Except for these four quite random bindings, no further upstream activity has been observed in the last 8 years. So, remove these fragments to reduce maintenance burden. Signed-off-by: Wolfram Sang Acked-by: Marc Kleine-Budde Acked-by: Mark Brown Link: https://lore.kernel.org/r/20250411194849.11067-2-wsa+renesas@sang-engineering.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml | 4 +--- .../devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml | 4 +--- .../devicetree/bindings/serial/snps-dw-apb-uart.yaml | 12 +++--------- Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 4 +--- 4 files changed, 6 insertions(+), 18 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml b/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml index 144a3785132c..ec0c2168e4b9 100644 --- a/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml +++ b/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml @@ -16,9 +16,7 @@ properties: - nxp,sja1000 - technologic,sja1000 - items: - - enum: - - renesas,r9a06g032-sja1000 # RZ/N1D - - renesas,r9a06g033-sja1000 # RZ/N1S + - const: renesas,r9a06g032-sja1000 # RZ/N1D - const: renesas,rzn1-sja1000 # RZ/N1 reg: diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml index 816688580e33..aa882b5bfe97 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml @@ -13,9 +13,7 @@ maintainers: properties: compatible: items: - - enum: - - renesas,r9a06g032-pinctrl # RZ/N1D - - renesas,r9a06g033-pinctrl # RZ/N1S + - const: renesas,r9a06g032-pinctrl # RZ/N1D - const: renesas,rzn1-pinctrl # Generic RZ/N1 reg: diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml index 1aa3480d8d81..1ee0aed5057d 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml @@ -17,9 +17,7 @@ allOf: properties: compatible: items: - - enum: - - renesas,r9a06g032-uart - - renesas,r9a06g033-uart + - const: renesas,r9a06g032-uart - const: renesas,rzn1-uart - const: snps,dw-apb-uart then: @@ -45,15 +43,11 @@ properties: compatible: oneOf: - items: - - enum: - - renesas,r9a06g032-uart - - renesas,r9a06g033-uart + - const: renesas,r9a06g032-uart - const: renesas,rzn1-uart - const: snps,dw-apb-uart - items: - - enum: - - renesas,r9a06g032-uart - - renesas,r9a06g033-uart + - const: renesas,r9a06g032-uart - const: renesas,rzn1-uart - items: - enum: diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml index bccd00a1ddd0..ff77ad6d4d8c 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml @@ -84,9 +84,7 @@ properties: const: canaan,k210-spi - description: Renesas RZ/N1 SPI Controller items: - - enum: - - renesas,r9a06g032-spi # RZ/N1D - - renesas,r9a06g033-spi # RZ/N1S + - const: renesas,r9a06g032-spi # RZ/N1D - const: renesas,rzn1-spi # RZ/N1 - description: T-HEAD TH1520 SoC SPI Controller items: -- cgit v1.2.3 From 50ede3b000f3a06edbf668a01f65c6e801076dd6 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 15 Apr 2025 11:48:58 -0400 Subject: dt-bindings: interrupt-controller: Add missed fsl tzic controller Add missed fsl tzic interrupt controller binding doc. Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250415154859.3381515-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- .../bindings/interrupt-controller/fsl,tzic.yaml | 48 ++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml new file mode 100644 index 000000000000..5f2c8761a31d --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/fsl,tzic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale tzic Interrupt controller + +maintainers: + - Frank Li + +properties: + compatible: + oneOf: + - items: + - enum: + - fsl,imx51-tzic + - fsl,imx53-tzic + - const: fsl,tzic + - items: + - const: fsl,imx50-tzic + - const: fsl,imx53-tzic + - const: fsl,tzic + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + tz-interrupt-controller@fffc000 { + compatible = "fsl,imx53-tzic", "fsl,tzic"; + reg = <0x0fffc000 0x4000>; + interrupt-controller; + #interrupt-cells = <1>; + }; -- cgit v1.2.3 From b252d1b00e283de06b35a13115d7e4bb9c5381ff Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 15 Apr 2025 17:29:42 -0400 Subject: dt-bindings: display: imx: convert fsl-imx-drm.txt to yaml format Convert fsl-imx-drm.txt to yaml format and create 5 yaml files for differences purpose. Additional changes: - add missed include file in examples. - add clocks, clock-names for ipu. Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250415212943.3400852-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- .../display/imx/fsl,imx-display-subsystem.yaml | 36 +++++ .../display/imx/fsl,imx-parallel-display.yaml | 74 ++++++++++ .../bindings/display/imx/fsl,imx6q-ipu.yaml | 97 +++++++++++++ .../bindings/display/imx/fsl,imx6qp-pre.yaml | 55 +++++++ .../bindings/display/imx/fsl,imx6qp-prg.yaml | 54 +++++++ .../bindings/display/imx/fsl-imx-drm.txt | 160 --------------------- 6 files changed, 316 insertions(+), 160 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx-display-subsystem.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx-parallel-display.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx6q-ipu.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx6qp-pre.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx6qp-prg.yaml delete mode 100644 Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx-display-subsystem.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx-display-subsystem.yaml new file mode 100644 index 000000000000..92a0a797d099 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx-display-subsystem.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/fsl,imx-display-subsystem.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX DRM master device + +maintainers: + - Frank Li + +description: + The freescale i.MX DRM master device is a virtual device needed to list all + IPU or other display interface nodes that comprise the graphics subsystem. + +properties: + compatible: + const: fsl,imx-display-subsystem + + ports: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Should contain a list of phandles pointing to camera + sensor interface ports of IPU devices. + +required: + - compatible + +additionalProperties: false + +examples: + - | + display-subsystem { + compatible = "fsl,imx-display-subsystem"; + ports = <&ipu_di0>; + }; diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx-parallel-display.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx-parallel-display.yaml new file mode 100644 index 000000000000..bbcfe7e2958b --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx-parallel-display.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/fsl,imx-parallel-display.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Parallel display support + +maintainers: + - Frank Li + +properties: + compatible: + const: fsl,imx-parallel-display + + interface-pix-fmt: + $ref: /schemas/types.yaml#/definitions/string + enum: + - rgb24 + - rgb565 + - bgr666 + - lvds666 + + ddc: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle describing the i2c bus handling the display data channel + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: input port connected to the IPU display interface + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: output port connected to a panel + +required: + - compatible + +additionalProperties: false + +examples: + - | + display { + compatible = "fsl,imx-parallel-display"; + #address-cells = <1>; + #size-cells = <0>; + interface-pix-fmt = "rgb24"; + + port@0 { + reg = <0>; + + endpoint { + remote-endpoint = <&ipu_di0_disp0>; + }; + }; + + port@1 { + reg = <1>; + + endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ipu.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ipu.yaml new file mode 100644 index 000000000000..ec78645d4de0 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ipu.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ipu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX IPUv3 + +maintainers: + - Frank Li + +properties: + compatible: + oneOf: + - enum: + - fsl,imx51-ipu + - fsl,imx53-ipu + - fsl,imx6q-ipu + - items: + - const: fsl,imx6qp-ipu + - const: fsl,imx6q-ipu + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 2 + + clocks: + maxItems: 3 + + clock-names: + items: + - const: bus + - const: di0 + - const: di1 + + resets: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + fsl,prg: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to prg node associated with this IPU instance + + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: CSI0 + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: CSI1 + + port@2: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: DI0 + + port@3: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: DI1 + +required: + - compatible + - reg + - interrupts + - resets + +additionalProperties: false + +examples: + - | + display-controller@18000000 { + compatible = "fsl,imx53-ipu"; + reg = <0x18000000 0x080000000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <11 10>; + resets = <&src 2>; + + port@2 { + reg = <2>; + + endpoint { + remote-endpoint = <&display_in>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-pre.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-pre.yaml new file mode 100644 index 000000000000..73bc73ff6e69 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-pre.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/fsl,imx6qp-pre.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX PRE (Prefetch Resolve Engine) + +maintainers: + - Frank Li + +properties: + compatible: + const: fsl,imx6qp-pre + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: axi + fsl,iram: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle pointing to the mmio-sram device node, that should be + used for the PRE SRAM double buffer. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + + pre@21c8000 { + compatible = "fsl,imx6qp-pre"; + reg = <0x021c8000 0x1000>; + interrupts = ; + clocks = <&clks IMX6QDL_CLK_PRE0>; + clock-names = "axi"; + fsl,iram = <&ocram2>; + }; diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-prg.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-prg.yaml new file mode 100644 index 000000000000..582da8c489f4 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-prg.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/fsl,imx6qp-prg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX PRG (Prefetch Resolve Gasket) + +maintainers: + - Frank Li + +properties: + compatible: + const: fsl,imx6qp-prg + + reg: + maxItems: 1 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: ipg + - const: axi + + fsl,pres: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 + description: + phandles to the PRE units attached to this PRG, with the fixed + PRE as the first entry and the muxable PREs following. + +required: + - compatible + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + + prg@21cc000 { + compatible = "fsl,imx6qp-prg"; + reg = <0x021cc000 0x1000>; + clocks = <&clks IMX6QDL_CLK_PRG0_APB>, <&clks IMX6QDL_CLK_PRG0_AXI>; + clock-names = "ipg", "axi"; + fsl,pres = <&pre1>, <&pre2>, <&pre3>; + }; + diff --git a/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt b/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt deleted file mode 100644 index 269b1ae2fca9..000000000000 --- a/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt +++ /dev/null @@ -1,160 +0,0 @@ -Freescale i.MX DRM master device -================================ - -The freescale i.MX DRM master device is a virtual device needed to list all -IPU or other display interface nodes that comprise the graphics subsystem. - -Required properties: -- compatible: Should be "fsl,imx-display-subsystem" -- ports: Should contain a list of phandles pointing to display interface ports - of IPU devices - -example: - -display-subsystem { - compatible = "fsl,imx-display-subsystem"; - ports = <&ipu_di0>; -}; - - -Freescale i.MX IPUv3 -==================== - -Required properties: -- compatible: Should be "fsl,-ipu" where is one of - - imx51 - - imx53 - - imx6q - - imx6qp -- reg: should be register base and length as documented in the - datasheet -- interrupts: Should contain sync interrupt and error interrupt, - in this order. -- resets: phandle pointing to the system reset controller and - reset line index, see reset/fsl,imx-src.txt for details -Additional required properties for fsl,imx6qp-ipu: -- fsl,prg: phandle to prg node associated with this IPU instance -Optional properties: -- port@[0-3]: Port nodes with endpoint definitions as defined in - Documentation/devicetree/bindings/media/video-interfaces.txt. - Ports 0 and 1 should correspond to CSI0 and CSI1, - ports 2 and 3 should correspond to DI0 and DI1, respectively. - -example: - -ipu: ipu@18000000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx53-ipu"; - reg = <0x18000000 0x080000000>; - interrupts = <11 10>; - resets = <&src 2>; - - ipu_di0: port@2 { - reg = <2>; - - ipu_di0_disp0: endpoint { - remote-endpoint = <&display_in>; - }; - }; -}; - -Freescale i.MX PRE (Prefetch Resolve Engine) -============================================ - -Required properties: -- compatible: should be "fsl,imx6qp-pre" -- reg: should be register base and length as documented in the - datasheet -- clocks : phandle to the PRE axi clock input, as described - in Documentation/devicetree/bindings/clock/clock-bindings.txt and - Documentation/devicetree/bindings/clock/imx6q-clock.yaml. -- clock-names: should be "axi" -- interrupts: should contain the PRE interrupt -- fsl,iram: phandle pointing to the mmio-sram device node, that should be - used for the PRE SRAM double buffer. - -example: - -pre@21c8000 { - compatible = "fsl,imx6qp-pre"; - reg = <0x021c8000 0x1000>; - interrupts = ; - clocks = <&clks IMX6QDL_CLK_PRE0>; - clock-names = "axi"; - fsl,iram = <&ocram2>; -}; - -Freescale i.MX PRG (Prefetch Resolve Gasket) -============================================ - -Required properties: -- compatible: should be "fsl,imx6qp-prg" -- reg: should be register base and length as documented in the - datasheet -- clocks : phandles to the PRG ipg and axi clock inputs, as described - in Documentation/devicetree/bindings/clock/clock-bindings.txt and - Documentation/devicetree/bindings/clock/imx6q-clock.yaml. -- clock-names: should be "ipg" and "axi" -- fsl,pres: phandles to the PRE units attached to this PRG, with the fixed - PRE as the first entry and the muxable PREs following. - -example: - -prg@21cc000 { - compatible = "fsl,imx6qp-prg"; - reg = <0x021cc000 0x1000>; - clocks = <&clks IMX6QDL_CLK_PRG0_APB>, - <&clks IMX6QDL_CLK_PRG0_AXI>; - clock-names = "ipg", "axi"; - fsl,pres = <&pre1>, <&pre2>, <&pre3>; -}; - -Parallel display support -======================== - -Required properties: -- compatible: Should be "fsl,imx-parallel-display" -Optional properties: -- interface-pix-fmt: How this display is connected to the - display interface. Currently supported types: "rgb24", "rgb565", "bgr666" - and "lvds666". -- ddc: phandle describing the i2c bus handling the display data - channel -- port@[0-1]: Port nodes with endpoint definitions as defined in - Documentation/devicetree/bindings/media/video-interfaces.txt. - Port 0 is the input port connected to the IPU display interface, - port 1 is the output port connected to a panel. - -example: - -disp0 { - compatible = "fsl,imx-parallel-display"; - interface-pix-fmt = "rgb24"; - - port@0 { - reg = <0>; - - display_in: endpoint { - remote-endpoint = <&ipu_di0_disp0>; - }; - }; - - port@1 { - reg = <1>; - - display_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; -}; - -panel { - ... - - port { - panel_in: endpoint { - remote-endpoint = <&display_out>; - }; - }; -}; -- cgit v1.2.3 From 494d3c55d83698b9d44b150bc3e5e3936b439965 Mon Sep 17 00:00:00 2001 From: Alexander Sverdlin Date: Wed, 18 Dec 2024 22:08:26 +0100 Subject: dt-bindings: backlight: add TI LP8864/LP8866 LED-backlight drivers Add bindings for Texas Instruments' LP8864/LP8866 LED-backlight drivers. Note that multiple channels in these models are used for load-balancing and brightness is controlled gobally, so from a user perspective it's only one LED. Reviewed-by: Rob Herring (Arm) Signed-off-by: Alexander Sverdlin Link: https://lore.kernel.org/r/20241218210829.73191-2-alexander.sverdlin@siemens.com Signed-off-by: Rob Herring (Arm) --- .../bindings/leds/backlight/ti,lp8864.yaml | 80 ++++++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/leds/backlight/ti,lp8864.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/leds/backlight/ti,lp8864.yaml b/Documentation/devicetree/bindings/leds/backlight/ti,lp8864.yaml new file mode 100644 index 000000000000..d44232d462bd --- /dev/null +++ b/Documentation/devicetree/bindings/leds/backlight/ti,lp8864.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/backlight/ti,lp8864.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments - LP8864/LP8866 4/6-Channel LED Driver family + +maintainers: + - Andrew Davis + - Alexander Sverdlin + +description: | + LP8866-Q1, LP8866S-Q1, LP8864-Q1, LP8864S-Q1 are display LED-backlight drivers + with 4/6 channels. LED brightness can be controlled globally through the I2C + interface or PWM input. + + For more product information please see the links below: + https://www.ti.com/product/LP8864-Q1 + https://www.ti.com/product/LP8864S-Q1 + https://www.ti.com/product/LP8866-Q1 + https://www.ti.com/product/LP8866S-Q1 + +properties: + compatible: + const: ti,lp8864 + + reg: + maxItems: 1 + description: I2C slave address + + enable-gpios: + maxItems: 1 + description: GPIO pin to enable (active high) / disable the device + + vled-supply: + description: LED supply + + led: + type: object + $ref: common.yaml# + properties: + function: true + color: true + label: true + linux,default-trigger: true + + additionalProperties: false + +required: + - compatible + - reg + - led + +additionalProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + led-controller@3a { + compatible = "ti,lp8864"; + reg = <0x3a>; + enable-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; + vled-supply = <&vbatt>; + + led { + function = LED_FUNCTION_BACKLIGHT; + color = ; + linux,default-trigger = "backlight"; + }; + }; + }; + +... -- cgit v1.2.3 From 2ed7553b909f8401f21df92925001a10b0971eeb Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 7 Apr 2025 11:53:40 -0500 Subject: dt-bindings: virtio: pci-iommu: Add ref to pci-device.yaml The virtio pci-iommu is a PCI device, so it should have a reference to the pci-device.yaml schema. The pci-device.yaml schema defines the 'reg' format as a schema, so the text description for 'reg' can be dropped. Reviewed-by: Jean-Philippe Brucker Link: https://lore.kernel.org/r/20250407165341.2934499-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/virtio/pci-iommu.yaml | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/virtio/pci-iommu.yaml b/Documentation/devicetree/bindings/virtio/pci-iommu.yaml index 972a785a42de..8bd6ad72ac7a 100644 --- a/Documentation/devicetree/bindings/virtio/pci-iommu.yaml +++ b/Documentation/devicetree/bindings/virtio/pci-iommu.yaml @@ -20,6 +20,9 @@ description: | virtio-iommu node doesn't have an "iommus" property, and is omitted from the iommu-map property of the root complex. +allOf: + - $ref: /schemas/pci/pci-device.yaml# + properties: # If compatible is present, it should contain the vendor and device ID # according to the PCI Bus Binding specification. Since PCI provides @@ -33,12 +36,7 @@ properties: - const: pci1af4,1057 reg: - description: | - PCI address of the IOMMU. As defined in the PCI Bus Binding - reference, the reg property is a five-cell address encoded as (phys.hi - phys.mid phys.lo size.hi size.lo). phys.hi should contain the device's - BDF as 0b00000000 bbbbbbbb dddddfff 00000000. The other cells should be - zero. See Documentation/devicetree/bindings/pci/pci.txt + maxItems: 1 '#iommu-cells': const: 1 -- cgit v1.2.3 From ba127016c07b17d10cb33803fb0a0aaf24a8b53c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=2E=20Neusch=C3=A4fer?= Date: Thu, 17 Apr 2025 16:21:14 +0200 Subject: dt-bindings: powerpc: Convert fsl/pmc.txt to YAML MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch rewrites pmc.txt into YAML format. Descriptive texts are expanded or shortened in a few places to better fit today's conventions. The list of compatible strings (and combinations of them) is based on existing device trees in arch/powerpc as well as compatible strings already mentioned in the plain-text version of the binding. One thing I didn't handle are soc-clk@... nodes as seen in arch/powerpc/boot/dts/fsl/pq3-power.dtsi. They are also ignored by Linux drivers. Signed-off-by: J. Neuschäfer Link: https://lore.kernel.org/r/20250417-fslpmc-yaml-v3-1-b3eccd389176@posteo.net Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/powerpc/fsl/pmc.txt | 63 --------- .../devicetree/bindings/powerpc/fsl/pmc.yaml | 152 +++++++++++++++++++++ 2 files changed, 152 insertions(+), 63 deletions(-) delete mode 100644 Documentation/devicetree/bindings/powerpc/fsl/pmc.txt create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt b/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt deleted file mode 100644 index 07256b7ffcaa..000000000000 --- a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt +++ /dev/null @@ -1,63 +0,0 @@ -* Power Management Controller - -Properties: -- compatible: "fsl,-pmc". - - "fsl,mpc8349-pmc" should be listed for any chip whose PMC is - compatible. "fsl,mpc8313-pmc" should also be listed for any chip - whose PMC is compatible, and implies deep-sleep capability. - - "fsl,mpc8548-pmc" should be listed for any chip whose PMC is - compatible. "fsl,mpc8536-pmc" should also be listed for any chip - whose PMC is compatible, and implies deep-sleep capability. - - "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is - compatible; all statements below that apply to "fsl,mpc8548-pmc" also - apply to "fsl,mpc8641d-pmc". - - Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these - bit assignments are indicated via the sleep specifier in each device's - sleep property. - -- reg: For devices compatible with "fsl,mpc8349-pmc", the first resource - is the PMC block, and the second resource is the Clock Configuration - block. - - For devices compatible with "fsl,mpc8548-pmc", the first resource - is a 32-byte block beginning with DEVDISR. - -- interrupts: For "fsl,mpc8349-pmc"-compatible devices, the first - resource is the PMC block interrupt. - -- fsl,mpc8313-wakeup-timer: For "fsl,mpc8313-pmc"-compatible devices, - this is a phandle to an "fsl,gtm" node on which timer 4 can be used as - a wakeup source from deep sleep. - -Sleep specifiers: - - fsl,mpc8349-pmc: Sleep specifiers consist of one cell. For each bit - that is set in the cell, the corresponding bit in SCCR will be saved - and cleared on suspend, and restored on resume. This sleep controller - supports disabling and resuming devices at any time. - - fsl,mpc8536-pmc: Sleep specifiers consist of three cells, the third of - which will be ORed into PMCDR upon suspend, and cleared from PMCDR - upon resume. The first two cells are as described for fsl,mpc8578-pmc. - This sleep controller only supports disabling devices during system - sleep, or permanently. - - fsl,mpc8548-pmc: Sleep specifiers consist of one or two cells, the - first of which will be ORed into DEVDISR (and the second into - DEVDISR2, if present -- this cell should be zero or absent if the - hardware does not have DEVDISR2) upon a request for permanent device - disabling. This sleep controller does not support configuring devices - to disable during system sleep (unless supported by another compatible - match), or dynamically. - -Example: - - power@b00 { - compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 8>; - }; diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml b/Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml new file mode 100644 index 000000000000..276ece7f01db --- /dev/null +++ b/Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml @@ -0,0 +1,152 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/powerpc/fsl/pmc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Power Management Controller + +maintainers: + - J. Neuschäfer + +description: | + The Power Management Controller in several MPC8xxx SoCs helps save power by + controlling chip-wide low-power states as well as peripheral clock gating. + + Sleep of peripheral devices is configured by the `sleep` property, for + example `sleep = <&pmc 0x00000030>`. Any cells after the &pmc phandle are + called a sleep specifier. + + For "fsl,mpc8349-pmc", sleep specifiers consist of one cell. For each bit that + is set in the cell, the corresponding bit in SCCR will be saved and cleared + on suspend, and restored on resume. This sleep controller supports disabling + and resuming devices at any time. + + For "fsl,mpc8536-pmc", sleep specifiers consist of three cells, the third of + which will be ORed into PMCDR upon suspend, and cleared from PMCDR upon + resume. The first two cells are as described for fsl,mpc8548-pmc. This + sleep controller only supports disabling devices during system sleep, or + permanently. + + For "fsl,mpc8548-pmc" or "fsl,mpc8641d-pmc", Sleep specifiers consist of one + or two cells, the first of which will be ORed into DEVDISR (and the second + into DEVDISR2, if present -- this cell should be zero or absent if the + hardware does not have DEVDISR2) upon a request for permanent device + disabling. This sleep controller does not support configuring devices to + disable during system sleep (unless supported by another compatible match), + or dynamically. + +properties: + compatible: + oneOf: + - items: + - const: fsl,mpc8315-pmc + - const: fsl,mpc8313-pmc + - const: fsl,mpc8349-pmc + + - items: + - enum: + - fsl,mpc8313-pmc + - fsl,mpc8323-pmc + - fsl,mpc8360-pmc + - fsl,mpc8377-pmc + - fsl,mpc8378-pmc + - fsl,mpc8379-pmc + - const: fsl,mpc8349-pmc + + - items: + - const: fsl,p1022-pmc + - const: fsl,mpc8536-pmc + - const: fsl,mpc8548-pmc + + - items: + - enum: + - fsl,mpc8536-pmc + - fsl,mpc8568-pmc + - fsl,mpc8569-pmc + - const: fsl,mpc8548-pmc + + - enum: + - fsl,mpc8548-pmc + - fsl,mpc8641d-pmc + + description: | + "fsl,mpc8349-pmc" should be listed for any chip whose PMC is + compatible. "fsl,mpc8313-pmc" should also be listed for any chip + whose PMC is compatible, and implies deep-sleep capability. + + "fsl,mpc8548-pmc" should be listed for any chip whose PMC is + compatible. "fsl,mpc8536-pmc" should also be listed for any chip + whose PMC is compatible, and implies deep-sleep capability. + + "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is + compatible; all statements below that apply to "fsl,mpc8548-pmc" also + apply to "fsl,mpc8641d-pmc". + + Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these + bit assignments are indicated via the sleep specifier in each device's + sleep property. + + reg: + minItems: 1 + maxItems: 2 + + interrupts: + maxItems: 1 + + fsl,mpc8313-wakeup-timer: + $ref: /schemas/types.yaml#/definitions/phandle + description: + For "fsl,mpc8313-pmc"-compatible devices, this is a phandle to an + "fsl,gtm" node on which timer 4 can be used as a wakeup source from deep + sleep. + +allOf: + - if: + properties: + compatible: + contains: + const: fsl,mpc8349-pmc + then: + properties: + reg: + items: + - description: PMC block + - description: Clock Configuration block + + - if: + properties: + compatible: + contains: + enum: + - fsl,mpc8548-pmc + - fsl,mpc8641d-pmc + then: + properties: + reg: + items: + - description: 32-byte block beginning with DEVDISR + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + + pmc: power@b00 { + compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc"; + reg = <0xb00 0x100>, <0xa00 0x100>; + interrupts = <80 IRQ_TYPE_LEVEL_LOW>; + }; + + - | + power@e0070 { + compatible = "fsl,mpc8548-pmc"; + reg = <0xe0070 0x20>; + }; + +... -- cgit v1.2.3 From e808ed95c178090f58e02a2496daeac39e5bb2f1 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 17 Apr 2025 10:57:41 -0400 Subject: dt-bindings: display: imx: convert ldb.txt to yaml format Convert ldb.txt to yaml format. Additional changes - fix clock-names order to match existed dts file. - remove lvds-panel and iomuxc-gpr node in examples. - fsl,imx6q-ldb fail back to fsl,imx53-ldb. - add fsl,panel property to match existed dts. Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250417145742.3568572-1-Frank.Li@nxp.com [robh: Use #/properties/port schema for port] Signed-off-by: Rob Herring (Arm) --- .../bindings/display/imx/fsl,imx6q-ldb.yaml | 193 +++++++++++++++++++++ .../devicetree/bindings/display/imx/ldb.txt | 146 ---------------- 2 files changed, 193 insertions(+), 146 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml delete mode 100644 Documentation/devicetree/bindings/display/imx/ldb.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml new file mode 100644 index 000000000000..1646f41d8f72 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml @@ -0,0 +1,193 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ldb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale LVDS Display Bridge (ldb) + +description: + The LVDS Display Bridge device tree node contains up to two lvds-channel + nodes describing each of the two LVDS encoder channels of the bridge. + +maintainers: + - Frank Li + +properties: + compatible: + oneOf: + - enum: + - fsl,imx53-ldb + - items: + - enum: + - fsl,imx6q-ldb + - const: fsl,imx53-ldb + + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + gpr: + $ref: /schemas/types.yaml#/definitions/phandle + description: + The phandle points to the iomuxc-gpr region containing the LVDS + control register. + + clocks: + minItems: 6 + maxItems: 8 + + clock-names: + oneOf: + - items: + - const: di0_pll + - const: di1_pll + - const: di0_sel + - const: di1_sel + - const: di0 + - const: di1 + - items: + - const: di0_pll + - const: di1_pll + - const: di0_sel + - const: di1_sel + - const: di2_sel + - const: di3_sel + - const: di0 + - const: di1 + + fsl,dual-channel: + $ref: /schemas/types.yaml#/definitions/flag + description: + if it exists, only LVDS channel 0 should + be configured - one input will be distributed on both outputs in dual + channel mode + +patternProperties: + '^lvds-channel@[0-1]$': + type: object + description: + Each LVDS Channel has to contain either an of graph link to a panel device node + or a display-timings node that describes the video timings for the connected + LVDS display as well as the fsl,data-mapping and fsl,data-width properties. + + properties: + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + display-timings: + $ref: /schemas/display/panel/display-timings.yaml# + + fsl,data-mapping: + enum: + - spwg + - jeida + + fsl,data-width: + $ref: /schemas/types.yaml#/definitions/uint32 + description: should be <18> or <24> + enum: + - 18 + - 24 + + fsl,panel: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to lcd panel + + patternProperties: + '^port@[0-4]$': + $ref: /schemas/graph.yaml#/properties/port + description: + On i.MX5, the internal two-input-multiplexer is used. Due to hardware + limitations, only one input port (port@[0,1]) can be used for each channel + (lvds-channel@[0,1], respectively). + On i.MX6, there should be four input ports (port@[0-3]) that correspond + to the four LVDS multiplexer inputs. + A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected + to a panel input port. Optionally, the output port can be left out if + display-timings are used instead. + + additionalProperties: false + +required: + - compatible + - gpr + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + + ldb@53fa8008 { + compatible = "fsl,imx53-ldb"; + reg = <0x53fa8008 0x4>; + #address-cells = <1>; + #size-cells = <0>; + gpr = <&gpr>; + clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, + <&clks IMX5_CLK_LDB_DI1_SEL>, + <&clks IMX5_CLK_IPU_DI0_SEL>, + <&clks IMX5_CLK_IPU_DI1_SEL>, + <&clks IMX5_CLK_LDB_DI0_GATE>, + <&clks IMX5_CLK_LDB_DI1_GATE>; + clock-names = "di0_pll", "di1_pll", + "di0_sel", "di1_sel", + "di0", "di1"; + + /* Using an of-graph endpoint link to connect the panel */ + lvds-channel@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + endpoint { + remote-endpoint = <&ipu_di0_lvds0>; + }; + }; + + port@2 { + reg = <2>; + + endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + + /* Using display-timings and fsl,data-mapping/width instead */ + lvds-channel@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + + display-timings {/* ... */ + }; + + port@1 { + reg = <1>; + + endpoint { + remote-endpoint = <&ipu_di1_lvds1>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/imx/ldb.txt b/Documentation/devicetree/bindings/display/imx/ldb.txt deleted file mode 100644 index 03653a291b54..000000000000 --- a/Documentation/devicetree/bindings/display/imx/ldb.txt +++ /dev/null @@ -1,146 +0,0 @@ -Device-Tree bindings for LVDS Display Bridge (ldb) - -LVDS Display Bridge -=================== - -The LVDS Display Bridge device tree node contains up to two lvds-channel -nodes describing each of the two LVDS encoder channels of the bridge. - -Required properties: - - #address-cells : should be <1> - - #size-cells : should be <0> - - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb". - Both LDB versions are similar, but i.MX6 has an additional - multiplexer in the front to select any of the four IPU display - interfaces as input for each LVDS channel. - - gpr : should be <&gpr> on i.MX53 and i.MX6q. - The phandle points to the iomuxc-gpr region containing the LVDS - control register. -- clocks, clock-names : phandles to the LDB divider and selector clocks and to - the display interface selector clocks, as described in - Documentation/devicetree/bindings/clock/clock-bindings.txt - The following clocks are expected on i.MX53: - "di0_pll" - LDB LVDS channel 0 mux - "di1_pll" - LDB LVDS channel 1 mux - "di0" - LDB LVDS channel 0 gate - "di1" - LDB LVDS channel 1 gate - "di0_sel" - IPU1 DI0 mux - "di1_sel" - IPU1 DI1 mux - On i.MX6q the following additional clocks are needed: - "di2_sel" - IPU2 DI0 mux - "di3_sel" - IPU2 DI1 mux - The needed clock numbers for each are documented in - Documentation/devicetree/bindings/clock/imx5-clock.yaml, and in - Documentation/devicetree/bindings/clock/imx6q-clock.yaml. - -Optional properties: - - pinctrl-names : should be "default" on i.MX53, not used on i.MX6q - - pinctrl-0 : a phandle pointing to LVDS pin settings on i.MX53, - not used on i.MX6q - - fsl,dual-channel : boolean. if it exists, only LVDS channel 0 should - be configured - one input will be distributed on both outputs in dual - channel mode - -LVDS Channel -============ - -Each LVDS Channel has to contain either an of graph link to a panel device node -or a display-timings node that describes the video timings for the connected -LVDS display as well as the fsl,data-mapping and fsl,data-width properties. - -Required properties: - - reg : should be <0> or <1> - - port: Input and output port nodes with endpoint definitions as defined in - Documentation/devicetree/bindings/graph.txt. - On i.MX5, the internal two-input-multiplexer is used. Due to hardware - limitations, only one input port (port@[0,1]) can be used for each channel - (lvds-channel@[0,1], respectively). - On i.MX6, there should be four input ports (port@[0-3]) that correspond - to the four LVDS multiplexer inputs. - A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected - to a panel input port. Optionally, the output port can be left out if - display-timings are used instead. - -Optional properties (required if display-timings are used): - - display-timings : A node that describes the display timings as defined in - Documentation/devicetree/bindings/display/panel/display-timing.txt. - - fsl,data-mapping : should be "spwg" or "jeida" - This describes how the color bits are laid out in the - serialized LVDS signal. - - fsl,data-width : should be <18> or <24> - -example: - -gpr: iomuxc-gpr@53fa8000 { - /* ... */ -}; - -ldb: ldb@53fa8008 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx53-ldb"; - gpr = <&gpr>; - clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, - <&clks IMX5_CLK_LDB_DI1_SEL>, - <&clks IMX5_CLK_IPU_DI0_SEL>, - <&clks IMX5_CLK_IPU_DI1_SEL>, - <&clks IMX5_CLK_LDB_DI0_GATE>, - <&clks IMX5_CLK_LDB_DI1_GATE>; - clock-names = "di0_pll", "di1_pll", - "di0_sel", "di1_sel", - "di0", "di1"; - - /* Using an of-graph endpoint link to connect the panel */ - lvds-channel@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - port@0 { - reg = <0>; - - lvds0_in: endpoint { - remote-endpoint = <&ipu_di0_lvds0>; - }; - }; - - port@2 { - reg = <2>; - - lvds0_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; - }; - - /* Using display-timings and fsl,data-mapping/width instead */ - lvds-channel@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - fsl,data-mapping = "spwg"; - fsl,data-width = <24>; - - display-timings { - /* ... */ - }; - - port@1 { - reg = <1>; - - lvds1_in: endpoint { - remote-endpoint = <&ipu_di1_lvds1>; - }; - }; - }; -}; - -panel: lvds-panel { - /* ... */ - - port { - panel_in: endpoint { - remote-endpoint = <&lvds0_out>; - }; - }; -}; -- cgit v1.2.3 From 6848dc8d0b66153048d57d47d71d40095a5a3f19 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 17 Apr 2025 11:06:04 -0400 Subject: dt-bindings: fsl: convert m4if.txt and tigerp.txt to yaml format Convert m4if.txt and tigerp.txt to yaml format. These just use reg to indicate memory region. Additional changes: - Add compatible string fsl,imx51-aipstz. - Add fsl,imx53-tigerp and fail back to fsl,imx51-tigerp - Add compatible string fsl,imx7d-pcie-phy, which is not real phy and just indicate a memory region. Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250417150608.3569512-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- .../bindings/arm/freescale/fsl,imx51-m4if.yaml | 41 ++++++++++++++++++++++ .../devicetree/bindings/arm/freescale/m4if.txt | 12 ------- .../devicetree/bindings/arm/freescale/tigerp.txt | 12 ------- 3 files changed, 41 insertions(+), 24 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,imx51-m4if.yaml delete mode 100644 Documentation/devicetree/bindings/arm/freescale/m4if.txt delete mode 100644 Documentation/devicetree/bindings/arm/freescale/tigerp.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx51-m4if.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,imx51-m4if.yaml new file mode 100644 index 000000000000..1f515bea3959 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,imx51-m4if.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/freescale/fsl,imx51-m4if.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale Multi Master Multi Memory Interface (M4IF) and Tigerp module + +description: collect the imx devices, which only have compatible and reg property + +maintainers: + - Frank Li + +properties: + compatible: + oneOf: + - enum: + - fsl,imx51-m4if + - fsl,imx51-tigerp + - fsl,imx51-aipstz + - fsl,imx53-aipstz + - fsl,imx7d-pcie-phy + - items: + - const: fsl,imx53-tigerp + - const: fsl,imx51-tigerp + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + m4if@83fd8000 { + compatible = "fsl,imx51-m4if"; + reg = <0x83fd8000 0x1000>; + }; diff --git a/Documentation/devicetree/bindings/arm/freescale/m4if.txt b/Documentation/devicetree/bindings/arm/freescale/m4if.txt deleted file mode 100644 index 93bd7b867a53..000000000000 --- a/Documentation/devicetree/bindings/arm/freescale/m4if.txt +++ /dev/null @@ -1,12 +0,0 @@ -* Freescale Multi Master Multi Memory Interface (M4IF) module - -Required properties: -- compatible : Should be "fsl,imx51-m4if" -- reg : Address and length of the register set for the device - -Example: - -m4if: m4if@83fd8000 { - compatible = "fsl,imx51-m4if"; - reg = <0x83fd8000 0x1000>; -}; diff --git a/Documentation/devicetree/bindings/arm/freescale/tigerp.txt b/Documentation/devicetree/bindings/arm/freescale/tigerp.txt deleted file mode 100644 index 19e2aad63d6e..000000000000 --- a/Documentation/devicetree/bindings/arm/freescale/tigerp.txt +++ /dev/null @@ -1,12 +0,0 @@ -* Freescale Tigerp platform module - -Required properties: -- compatible : Should be "fsl,imx51-tigerp" -- reg : Address and length of the register set for the device - -Example: - -tigerp: tigerp@83fa0000 { - compatible = "fsl,imx51-tigerp"; - reg = <0x83fa0000 0x28>; -}; -- cgit v1.2.3 From 48f506021611a63414c63668706466dfb5264113 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 17 Apr 2025 11:11:33 -0400 Subject: dt-bindings: display: imx: convert fsl,tcon.txt to yaml format Convert fsl,tcon.txt to yaml format. Signed-off-by: Frank Li Reviewed-by: Stefan Agner Link: https://lore.kernel.org/r/20250417151134.3569837-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/display/fsl,tcon.txt | 17 --------- .../bindings/display/fsl,vf610-tcon.yaml | 43 ++++++++++++++++++++++ 2 files changed, 43 insertions(+), 17 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/fsl,tcon.txt create mode 100644 Documentation/devicetree/bindings/display/fsl,vf610-tcon.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/fsl,tcon.txt b/Documentation/devicetree/bindings/display/fsl,tcon.txt deleted file mode 100644 index 475008747801..000000000000 --- a/Documentation/devicetree/bindings/display/fsl,tcon.txt +++ /dev/null @@ -1,17 +0,0 @@ -Device Tree bindings for Freescale TCON Driver - -Required properties: -- compatible: Should be one of - * "fsl,vf610-tcon". - -- reg: Address and length of the register set for tcon. -- clocks: From common clock binding: handle to tcon ipg clock. -- clock-names: From common clock binding: Shall be "ipg". - -Examples: -timing-controller@4003d000 { - compatible = "fsl,vf610-tcon"; - reg = <0x4003d000 0x1000>; - clocks = <&clks VF610_CLK_TCON0>; - clock-names = "ipg"; -}; diff --git a/Documentation/devicetree/bindings/display/fsl,vf610-tcon.yaml b/Documentation/devicetree/bindings/display/fsl,vf610-tcon.yaml new file mode 100644 index 000000000000..06bd680524a5 --- /dev/null +++ b/Documentation/devicetree/bindings/display/fsl,vf610-tcon.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/fsl,vf610-tcon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale TCON + +maintainers: + - Frank Li + +properties: + compatible: + const: fsl,vf610-tcon + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: ipg + +required: + - compatible + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + + timing-controller@4003d000 { + compatible = "fsl,vf610-tcon"; + reg = <0x4003d000 0x1000>; + clocks = <&clks VF610_CLK_TCON0>; + clock-names = "ipg"; + }; -- cgit v1.2.3 From 9ca04c5e01a627043a1115c5458487060aebfb9c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 24 Mar 2025 13:53:12 +0100 Subject: dt-bindings: iio: Correct indentation and style in DTS example DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250324125313.82226-1-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron --- .../devicetree/bindings/iio/adc/st,stm32-adc.yaml | 102 ++++++++++----------- 1 file changed, 51 insertions(+), 51 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml index ef9dcc365eab..17bb60e18a1c 100644 --- a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml @@ -498,7 +498,7 @@ patternProperties: examples: - | // Example 1: with stm32f429, ADC1, single-ended channel 8 - adc123: adc@40012000 { + adc123: adc@40012000 { compatible = "st,stm32f4-adc-core"; reg = <0x40012000 0x400>; interrupts = <18>; @@ -512,28 +512,28 @@ examples: #address-cells = <1>; #size-cells = <0>; adc@0 { - compatible = "st,stm32f4-adc"; - #io-channel-cells = <1>; - reg = <0x0>; - clocks = <&rcc 0 168>; - interrupt-parent = <&adc123>; - interrupts = <0>; - st,adc-channels = <8>; - dmas = <&dma2 0 0 0x400 0x0>; - dma-names = "rx"; - assigned-resolution-bits = <8>; + compatible = "st,stm32f4-adc"; + #io-channel-cells = <1>; + reg = <0x0>; + clocks = <&rcc 0 168>; + interrupt-parent = <&adc123>; + interrupts = <0>; + st,adc-channels = <8>; + dmas = <&dma2 0 0 0x400 0x0>; + dma-names = "rx"; + assigned-resolution-bits = <8>; }; // ... // other adc child nodes follow... - }; + }; - | // Example 2: with stm32mp157c to setup ADC1 with: // - channels 0 & 1 as single-ended // - channels 2 & 3 as differential (with resp. 6 & 7 negative inputs) - #include - #include - adc12: adc@48003000 { + #include + #include + adc12: adc@48003000 { compatible = "st,stm32mp1-adc-core"; reg = <0x48003000 0x400>; interrupts = , @@ -550,27 +550,27 @@ examples: #address-cells = <1>; #size-cells = <0>; adc@0 { - compatible = "st,stm32mp1-adc"; - #io-channel-cells = <1>; - reg = <0x0>; - interrupt-parent = <&adc12>; - interrupts = <0>; - st,adc-channels = <0 1>; - st,adc-diff-channels = <2 6>, <3 7>; - st,min-sample-time-nsecs = <5000>; - dmas = <&dmamux1 9 0x400 0x05>; - dma-names = "rx"; + compatible = "st,stm32mp1-adc"; + #io-channel-cells = <1>; + reg = <0x0>; + interrupt-parent = <&adc12>; + interrupts = <0>; + st,adc-channels = <0 1>; + st,adc-diff-channels = <2 6>, <3 7>; + st,min-sample-time-nsecs = <5000>; + dmas = <&dmamux1 9 0x400 0x05>; + dma-names = "rx"; }; // ... // other adc child node follow... - }; + }; - | // Example 3: with stm32mp157c to setup ADC2 with: // - internal channels 13, 14, 15. - #include - #include - adc122: adc@48003000 { + #include + #include + adc122: adc@48003000 { compatible = "st,stm32mp1-adc-core"; reg = <0x48003000 0x400>; interrupts = , @@ -587,28 +587,28 @@ examples: #address-cells = <1>; #size-cells = <0>; adc@100 { - compatible = "st,stm32mp1-adc"; - #io-channel-cells = <1>; - reg = <0x100>; - interrupts = <1>; - #address-cells = <1>; - #size-cells = <0>; - channel@13 { - reg = <13>; - label = "vrefint"; - st,min-sample-time-ns = <9000>; - }; - channel@14 { - reg = <14>; - label = "vddcore"; - st,min-sample-time-ns = <9000>; - }; - channel@15 { - reg = <15>; - label = "vbat"; - st,min-sample-time-ns = <9000>; - }; + compatible = "st,stm32mp1-adc"; + #io-channel-cells = <1>; + reg = <0x100>; + interrupts = <1>; + #address-cells = <1>; + #size-cells = <0>; + channel@13 { + reg = <13>; + label = "vrefint"; + st,min-sample-time-ns = <9000>; + }; + channel@14 { + reg = <14>; + label = "vddcore"; + st,min-sample-time-ns = <9000>; + }; + channel@15 { + reg = <15>; + label = "vbat"; + st,min-sample-time-ns = <9000>; + }; }; - }; + }; ... -- cgit v1.2.3 From 58fe539e9170320a611d7086346317f1e3586878 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 24 Mar 2025 13:53:13 +0100 Subject: dt-bindings: iio: Use unevaluatedProperties for SPI devices SPI devices should use unevaluatedProperties:false instead of additionalProperties:false, to allow any SPI device properties listed in spi-peripheral-props.yaml. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring (Arm) Reviewed-by: Matti Vaittinen Link: https://patch.msgid.link/20250324125313.82226-2-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml | 2 +- Documentation/devicetree/bindings/iio/dac/adi,ltc2664.yaml | 2 +- Documentation/devicetree/bindings/iio/dac/adi,ltc2672.yaml | 2 +- Documentation/devicetree/bindings/iio/dac/microchip,mcp4821.yaml | 2 +- Documentation/devicetree/bindings/iio/dac/rohm,bd79703.yaml | 2 +- Documentation/devicetree/bindings/iio/imu/adi,adis16550.yaml | 2 +- Documentation/devicetree/bindings/iio/pressure/honeywell,hsc030pa.yaml | 2 +- .../devicetree/bindings/iio/pressure/honeywell,mprls0025pa.yaml | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml index 2d2561a52683..547044b8e246 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml @@ -217,7 +217,7 @@ required: - reg - spi-max-frequency -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ltc2664.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ltc2664.yaml index 33490853497b..1aece3392b77 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ltc2664.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ltc2664.yaml @@ -144,7 +144,7 @@ required: allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ltc2672.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ltc2672.yaml index c8c434c10643..3c8e5781e42c 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ltc2672.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ltc2672.yaml @@ -124,7 +124,7 @@ required: allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/dac/microchip,mcp4821.yaml b/Documentation/devicetree/bindings/iio/dac/microchip,mcp4821.yaml index 0dc577c33918..26011b5639d8 100644 --- a/Documentation/devicetree/bindings/iio/dac/microchip,mcp4821.yaml +++ b/Documentation/devicetree/bindings/iio/dac/microchip,mcp4821.yaml @@ -64,7 +64,7 @@ required: - reg - vdd-supply -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/dac/rohm,bd79703.yaml b/Documentation/devicetree/bindings/iio/dac/rohm,bd79703.yaml index 941a49c93943..188b00333dfb 100644 --- a/Documentation/devicetree/bindings/iio/dac/rohm,bd79703.yaml +++ b/Documentation/devicetree/bindings/iio/dac/rohm,bd79703.yaml @@ -43,7 +43,7 @@ required: allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/imu/adi,adis16550.yaml b/Documentation/devicetree/bindings/iio/imu/adi,adis16550.yaml index a4c273c7a67f..cf5324de4fd6 100644 --- a/Documentation/devicetree/bindings/iio/imu/adi,adis16550.yaml +++ b/Documentation/devicetree/bindings/iio/imu/adi,adis16550.yaml @@ -53,7 +53,7 @@ required: allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/pressure/honeywell,hsc030pa.yaml b/Documentation/devicetree/bindings/iio/pressure/honeywell,hsc030pa.yaml index 89977b9f01cf..412c7bcc310f 100644 --- a/Documentation/devicetree/bindings/iio/pressure/honeywell,hsc030pa.yaml +++ b/Documentation/devicetree/bindings/iio/pressure/honeywell,hsc030pa.yaml @@ -102,7 +102,7 @@ required: allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml -additionalProperties: false +unevaluatedProperties: false dependentSchemas: honeywell,pmin-pascal: diff --git a/Documentation/devicetree/bindings/iio/pressure/honeywell,mprls0025pa.yaml b/Documentation/devicetree/bindings/iio/pressure/honeywell,mprls0025pa.yaml index 6994b30015bd..c756aa863103 100644 --- a/Documentation/devicetree/bindings/iio/pressure/honeywell,mprls0025pa.yaml +++ b/Documentation/devicetree/bindings/iio/pressure/honeywell,mprls0025pa.yaml @@ -115,7 +115,7 @@ allOf: honeywell,pmin-pascal: false honeywell,pmax-pascal: false -additionalProperties: false +unevaluatedProperties: false examples: - | -- cgit v1.2.3 From 3e09eb53df47127cdcbf26fc41d24cd564d5d57c Mon Sep 17 00:00:00 2001 From: Sergio Perez Date: Mon, 24 Mar 2025 14:59:19 +0100 Subject: dt-bindings: iio: light: bh1750: Add reset-gpios property Some BH1750 sensors require a hardware reset via GPIO before they can be properly detected on the I2C bus. Add a new reset-gpios property to the binding to support this functionality. The reset-gpios property allows specifying a GPIO that will be toggled during driver initialization to reset the sensor. Signed-off-by: Sergio Perez Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250324135920.6802-1-sergio@pereznus.es Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/light/bh1750.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/light/bh1750.yaml b/Documentation/devicetree/bindings/iio/light/bh1750.yaml index 1a88b3c253d5..9df81c271411 100644 --- a/Documentation/devicetree/bindings/iio/light/bh1750.yaml +++ b/Documentation/devicetree/bindings/iio/light/bh1750.yaml @@ -24,6 +24,10 @@ properties: reg: maxItems: 1 + reset-gpios: + description: GPIO connected to the DVI reset pin (active low) + maxItems: 1 + required: - compatible - reg @@ -32,6 +36,7 @@ additionalProperties: false examples: - | + #include i2c { #address-cells = <1>; #size-cells = <0>; @@ -39,6 +44,7 @@ examples: light-sensor@23 { compatible = "rohm,bh1750"; reg = <0x23>; + reset-gpios = <&gpio2 17 GPIO_ACTIVE_LOW>; }; }; -- cgit v1.2.3 From b2729cdf2bc0ea9d624d504fc61e5b6299629b6c Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sun, 30 Mar 2025 12:19:21 +0200 Subject: dt-bindings: iio: adc: amlogic,meson-saradc: Add GXLX SoC compatible Add a compatible string for the GXLX SoC. It's very similar to GXL but has three additional bits in MESON_SAR_ADC_REG12 for the three MPLL clocks. Acked-by: Krzysztof Kozlowski Reviewed-by: Neil Armstrong Signed-off-by: Martin Blumenstingl Link: https://patch.msgid.link/20250330101922.1942169-2-martin.blumenstingl@googlemail.com Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml index b0962a4583ac..bb9825e7346d 100644 --- a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml @@ -23,6 +23,7 @@ properties: - amlogic,meson8m2-saradc - amlogic,meson-gxbb-saradc - amlogic,meson-gxl-saradc + - amlogic,meson-gxlx-saradc - amlogic,meson-gxm-saradc - amlogic,meson-axg-saradc - amlogic,meson-g12a-saradc -- cgit v1.2.3 From 485eefd7f973501889a8d479127612d43eb08af0 Mon Sep 17 00:00:00 2001 From: Sam Winchenbach Date: Fri, 28 Mar 2025 13:48:26 -0400 Subject: dt-bindings: iio: filter: Add lpf/hpf freq margins Adds two properties to add a margin when automatically finding the corner frequencies. Signed-off-by: Sam Winchenbach Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250328174831.227202-2-sam.winchenbach@framepointer.org Signed-off-by: Jonathan Cameron --- .../devicetree/bindings/iio/filter/adi,admv8818.yaml | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/filter/adi,admv8818.yaml b/Documentation/devicetree/bindings/iio/filter/adi,admv8818.yaml index b77e855bd594..ff0cb553e871 100644 --- a/Documentation/devicetree/bindings/iio/filter/adi,admv8818.yaml +++ b/Documentation/devicetree/bindings/iio/filter/adi,admv8818.yaml @@ -44,6 +44,24 @@ properties: '#clock-cells': const: 0 + adi,lpf-margin-mhz: + description: + Sets the minimum distance between the fundamental frequency of `rf_in` + and the corner frequency of the low-pass, output filter when operated in + 'auto' mode. The selected low-pass corner frequency will be greater than, + or equal to, `rf_in` + `lpf-margin-hz`. If not setting is found that + satisfies this relationship the filter will be put into 'bypass'. + default: 0 + + adi,hpf-margin-mhz: + description: + Sets the minimum distance between the fundamental frequency of `rf_in` + and the corner frequency of the high-pass, input filter when operated in + 'auto' mode. The selected high-pass corner frequency will be less than, + or equal to, `rf_in` - `hpf-margin-hz`. If not setting is found that + satisfies this relationship the filter will be put into 'bypass'. + default: 0 + required: - compatible - reg @@ -61,6 +79,8 @@ examples: spi-max-frequency = <10000000>; clocks = <&admv8818_rfin>; clock-names = "rf_in"; + adi,lpf-margin-mhz = <300>; + adi,hpf-margin-mhz = <300>; }; }; ... -- cgit v1.2.3 From 4a135e924fae08053917b1c0ba0b89bd66bf2be4 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 24 Mar 2025 09:12:36 +0200 Subject: dt-bindings: ROHM BD79124 ADC/GPO Add binding document for the ROHM BD79124 ADC / GPO. ROHM BD79124 is a 8-channel, 12-bit ADC. The input pins can also be used as general purpose outputs. Signed-off-by: Matti Vaittinen Reviewed-by: Conor Dooley Link: https://patch.msgid.link/e16f54b6214b0d796216729a7e29b8f7be9ae19e.1742560649.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron --- .../devicetree/bindings/iio/adc/rohm,bd79124.yaml | 114 +++++++++++++++++++++ 1 file changed, 114 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/rohm,bd79124.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/rohm,bd79124.yaml b/Documentation/devicetree/bindings/iio/adc/rohm,bd79124.yaml new file mode 100644 index 000000000000..503285823376 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/rohm,bd79124.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/rohm,bd79124.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM BD79124 ADC/GPO + +maintainers: + - Matti Vaittinen + +description: | + The ROHM BD79124 is a 12-bit, 8-channel, SAR ADC. The ADC supports + an automatic measurement mode, with an alarm interrupt for out-of-window + measurements. ADC input pins can be also configured as general purpose + outputs. + +properties: + compatible: + const: rohm,bd79124 + + reg: + description: + I2C slave address. + maxItems: 1 + + interrupts: + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 1 + description: + The pin number. + + vdd-supply: true + + iovdd-supply: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^channel@[0-7]+$": + type: object + $ref: /schemas/iio/adc/adc.yaml# + description: Represents ADC channel. + + properties: + reg: + description: AIN pin number + minimum: 0 + maximum: 7 + + required: + - reg + + additionalProperties: false + +required: + - compatible + - reg + - iovdd-supply + - vdd-supply + +additionalProperties: false + +examples: + - | + #include + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + adc: adc@10 { + compatible = "rohm,bd79124"; + reg = <0x10>; + + interrupt-parent = <&gpio1>; + interrupts = <29 8>; + + vdd-supply = <&dummyreg>; + iovdd-supply = <&dummyreg>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + }; + channel@1 { + reg = <1>; + }; + channel@2 { + reg = <2>; + }; + channel@3 { + reg = <3>; + }; + channel@4 { + reg = <4>; + }; + channel@5 { + reg = <5>; + }; + channel@6 { + reg = <6>; + }; + }; + }; -- cgit v1.2.3 From ba25cbf5fe757f42bb59c674633b78586b1a089d Mon Sep 17 00:00:00 2001 From: Jorge Marques Date: Fri, 21 Mar 2025 15:50:01 +0100 Subject: Documentation: ABI: add events sampling frequency in sysfs-bus-iio Some devices have an internal clock used by the events to space the conversions. The max1363 introduced the option in commit 168c9d95a940 ("iio:adc:max1363 move from staging.") and ad799x in commit ba1d79613df3 ("staging:iio:ad799x: Use event spec for threshold hysteresis") Signed-off-by: Jorge Marques Link: https://patch.msgid.link/20250321-abi-oversampling-events-frequency-v1-1-794c1ab2f079@analog.com Signed-off-by: Jonathan Cameron --- Documentation/ABI/testing/sysfs-bus-iio | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio index 722aa989baac..33c09c4ac60a 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio +++ b/Documentation/ABI/testing/sysfs-bus-iio @@ -94,6 +94,7 @@ Description: What: /sys/bus/iio/devices/iio:deviceX/sampling_frequency What: /sys/bus/iio/devices/iio:deviceX/in_intensity_sampling_frequency What: /sys/bus/iio/devices/iio:deviceX/buffer/sampling_frequency +What: /sys/bus/iio/devices/iio:deviceX/events/sampling_frequency What: /sys/bus/iio/devices/triggerX/sampling_frequency KernelVersion: 2.6.35 Contact: linux-iio@vger.kernel.org -- cgit v1.2.3 From 04f0bc81d6017b9ec80fbe0e00fe9ee02cfd42c4 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Wed, 2 Apr 2025 09:44:36 +0300 Subject: dt-bindings: Add ROHM BD7970x variants The ROHM BD79700, BD79701 and BD79702 are subsets of the BD79703 DAC. The main difference is the number of the channels. BD79703 has 6 channels. The BD79702 has 4, BD79701 3 and BD79700 2 channels. Additionally, the BD79700 and BD79701 do not have separate Vfs pin but use the Vcc also for the full-scale voltage. Add properties for the BD79700, BD79701 and BD79702. Signed-off-by: Matti Vaittinen Acked-by: Conor Dooley Link: https://patch.msgid.link/0a114565e4de52bf8f98c4f9d17943e5148b0112.1743576022.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron --- .../devicetree/bindings/iio/dac/rohm,bd79703.yaml | 33 +++++++++++++++++----- 1 file changed, 26 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/dac/rohm,bd79703.yaml b/Documentation/devicetree/bindings/iio/dac/rohm,bd79703.yaml index 188b00333dfb..c00fa50e42e8 100644 --- a/Documentation/devicetree/bindings/iio/dac/rohm,bd79703.yaml +++ b/Documentation/devicetree/bindings/iio/dac/rohm,bd79703.yaml @@ -5,19 +5,26 @@ $id: http://devicetree.org/schemas/iio/dac/rohm,bd79703.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ROHM BD79703 DAC device driver +title: ROHM BD79700, BD79701, BD79702 and BD79703 DACs maintainers: - Matti Vaittinen description: | - The ROHM BD79703 is a 6 channel, 8-bit DAC. - Datasheet can be found here: + The ROHM BD7970[0,1,2,3] are 8-bit DACs. The BD79700 has 2 channels, + BD79701 3 channels, BD79702 4 channels and BD79703 has 6 channels. + Datasheets for BD79702 and BD79703 can be found from https://fscdn.rohm.com/en/products/databook/datasheet/ic/data_converter/dac/bd79702fv-lb_bd79703fv-lb-e.pdf + and for the BD79700 and the BD79701 from + https://fscdn.rohm.com/en/products/databook/datasheet/ic/data_converter/dac/bd79700fvm-lb_bd79701fvm-lb-e.pdf properties: compatible: - const: rohm,bd79703 + enum: + - rohm,bd79700 + - rohm,bd79701 + - rohm,bd79702 + - rohm,bd79703 reg: maxItems: 1 @@ -27,19 +34,31 @@ properties: vfs-supply: description: - The regulator to use as a full scale voltage. The voltage should be between 2.7V .. VCC + The regulator to use as a full scale voltage. The voltage should be + between 2.7V .. VCC. Not present on BD79700 and BD79701. vcc-supply: description: - The regulator supplying the operating voltage. Should be between 2.7V ... 5.5V + The regulator supplying the operating voltage. Should be between + 2.7V ... 5.5V. Is used also as a Vfs on BD79700 and BD79701. required: - compatible - reg - spi-max-frequency - - vfs-supply - vcc-supply +if: + properties: + compatible: + contains: + enum: + - rohm,bd79702 + - rohm,bd79703 +then: + required: + - vfs-supply + allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# -- cgit v1.2.3 From 66ac231508335ac1098eb6b7b58f2bc92b67ef98 Mon Sep 17 00:00:00 2001 From: Marcelo Schmitt Date: Thu, 27 Mar 2025 18:24:53 -0300 Subject: Documentation: iio: ad4000: Add new supported parts Commit ("iio: adc: ad4000: Add support for PulSAR devices"), extended the ad4000 driver supports many single-channel PulSAR devices. Update IIO ad4000 documentation with the extra list of supported devices. Reviewed-by: David Lechner Signed-off-by: Marcelo Schmitt Link: https://patch.msgid.link/2b602abd0773af91e7ccd9dd7a2afe67f4792f95.1743110188.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron --- Documentation/iio/ad4000.rst | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/iio/ad4000.rst b/Documentation/iio/ad4000.rst index de8fd3ae6e62..5578a9cfd9d5 100644 --- a/Documentation/iio/ad4000.rst +++ b/Documentation/iio/ad4000.rst @@ -4,7 +4,7 @@ AD4000 driver ============= -Device driver for Analog Devices Inc. AD4000 series of ADCs. +Device driver for Analog Devices Inc. AD4000 series of ADCs and similar devices. Supported devices ================= @@ -25,6 +25,21 @@ Supported devices * `AD4022 `_ * `ADAQ4001 `_ * `ADAQ4003 `_ +* `AD7685 `_ +* `AD7686 `_ +* `AD7687 `_ +* `AD7688 `_ +* `AD7690 `_ +* `AD7691 `_ +* `AD7693 `_ +* `AD7942 `_ +* `AD7946 `_ +* `AD7980 `_ +* `AD7982 `_ +* `AD7983 `_ +* `AD7984 `_ +* `AD7988-1 `_ +* `AD7988-5 `_ Wiring connections ------------------ -- cgit v1.2.3 From d66b2c84fb675b6ac2ffe285bf447b18badf6e4b Mon Sep 17 00:00:00 2001 From: Marcelo Schmitt Date: Thu, 27 Mar 2025 18:25:12 -0300 Subject: Documentation: iio: ad4000: Add IIO Device characteristics section Complement ad4000 IIO driver documentation with considerations about ``_scale_available`` attribute and table of typical channel attributes. Reviewed-by: David Lechner Signed-off-by: Marcelo Schmitt Link: https://patch.msgid.link/6c8fe68d7d413ffdd33b154ba45600c7ce7013da.1743110188.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron --- Documentation/iio/ad4000.rst | 47 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) (limited to 'Documentation') diff --git a/Documentation/iio/ad4000.rst b/Documentation/iio/ad4000.rst index 5578a9cfd9d5..468d30dc9214 100644 --- a/Documentation/iio/ad4000.rst +++ b/Documentation/iio/ad4000.rst @@ -144,3 +144,50 @@ Set ``adi,sdi-pin`` to ``"cs"`` to select this mode. ^ | | +--------------------| SCLK | +-------------+ + +IIO Device characteristics +========================== + +The AD4000 series driver supports differential and pseudo-differential ADCs. + +The span compression feature available in AD4000 series devices can be +enabled/disabled by changing the ``_scale_available`` attribute of the voltage +channel. Note that span compression configuration requires writing to AD4000 +configuration register, which is only possible when the ADC is wired in 3-wire +turbo mode, and the SPI controller is ``SPI_MOSI_IDLE_HIGH`` capable. If those +conditions are not met, no ``_scale_available`` attribute is provided. + +Besides that, differential and pseudo-differential voltage channels present +slightly different sysfs interfaces. + +Pseudo-differential ADCs +------------------------ + +Typical voltage channel attributes of a pseudo-differential AD4000 series device: + ++-------------------------------------------+------------------------------------------+ +| Voltage Channel Attributes | Description | ++===========================================+==========================================+ +| ``in_voltage0_raw`` | Raw ADC output code. | ++-------------------------------------------+------------------------------------------+ +| ``in_voltage0_offset`` | Offset to convert raw value to mV. | ++-------------------------------------------+------------------------------------------+ +| ``in_voltage0_scale`` | Scale factor to convert raw value to mV. | ++-------------------------------------------+------------------------------------------+ +| ``in_voltage0_scale_available`` | Toggles input span compression | ++-------------------------------------------+------------------------------------------+ + +Differential ADCs +----------------- + +Typical voltage channel attributes of a differential AD4000 series device: + ++-------------------------------------------+------------------------------------------+ +| Voltage Channel Attributes | Description | ++===========================================+==========================================+ +| ``in_voltage0-voltage1_raw`` | Raw ADC output code. | ++-------------------------------------------+------------------------------------------+ +| ``in_voltage0-voltage1_scale`` | Scale factor to convert raw value to mV. | ++-------------------------------------------+------------------------------------------+ +| ``in_voltage0-voltage1_scale_available`` | Toggles input span compression | ++-------------------------------------------+------------------------------------------+ -- cgit v1.2.3 From 8c411d4b96554972edc3b571cbef2d59fa0d907f Mon Sep 17 00:00:00 2001 From: Marcelo Schmitt Date: Thu, 27 Mar 2025 18:25:29 -0300 Subject: Documentation: iio: ad4000: Describe offload support When SPI offloading is supported, the IIO device provides different sysfs interfaces to allow using the adjusting the sample rate. Document SPI offload support for AD4000 and similar devices. Reviewed-by: David Lechner Signed-off-by: Marcelo Schmitt Link: https://patch.msgid.link/eb94013b1a4d66a8492cf094aef3e4410f81d22b.1743110188.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron --- Documentation/iio/ad4000.rst | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'Documentation') diff --git a/Documentation/iio/ad4000.rst b/Documentation/iio/ad4000.rst index 468d30dc9214..c1d04d3436d2 100644 --- a/Documentation/iio/ad4000.rst +++ b/Documentation/iio/ad4000.rst @@ -191,3 +191,30 @@ Typical voltage channel attributes of a differential AD4000 series device: +-------------------------------------------+------------------------------------------+ | ``in_voltage0-voltage1_scale_available`` | Toggles input span compression | +-------------------------------------------+------------------------------------------+ + +SPI offload support +------------------- + +To be able to achieve the maximum sample rate, the driver can be used with SPI +offload engines such as the one usually present in `AXI SPI Engine`_, to provide +SPI offload support. + +.. _AXI SPI Engine: http://analogdevicesinc.github.io/hdl/projects/pulsar_adc/index.html + +To keep up with SPI offloading transfer speeds, the ADC must be connected either +in 3-wire turbo mode or in 3-wire without busy indicator mode and have SPI +controller CS line connected to the CNV pin. + +When set for SPI offload support, the IIO device will provide different +interfaces. + +* Either ``in_voltage0_sampling_frequency`` or + ``in_voltage0-voltage1_sampling_frequency`` file is provided to allow setting + the sample rate. +* IIO trigger device is not provided (no ``trigger`` directory). +* ``timestamp`` channel is not provided. + +Also, because the ADC output has a one sample latency (delay) when the device is +wired in "3-wire" mode and only one transfer per sample is done when using SPI +offloading, the first data sample in the buffer is not valid because it contains +the output of an earlier conversion result. -- cgit v1.2.3 From ebe0b2a86a9ea995eaa934d146edd1545bdc8505 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Tue, 1 Apr 2025 17:50:08 -0500 Subject: dt-bindings: iio: adc: ad7380: add AD7389-4 Add compatible and quirks for AD7389-4. This is essentially the same as AD7380-4 but instead of having no internal reference, it has no external reference voltage supply. Signed-off-by: David Lechner Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250401-iio-ad7380-add-ad7389-4-v1-1-23d2568aa24f@baylibre.com Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml index ff4f5c21c548..8dae89ecb64d 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml @@ -25,6 +25,7 @@ description: | * https://www.analog.com/en/products/ad7386-4.html * https://www.analog.com/en/products/ad7387-4.html * https://www.analog.com/en/products/ad7388-4.html + * https://www.analog.com/en/products/ad7389-4.html * https://www.analog.com/en/products/adaq4370-4.html * https://www.analog.com/en/products/adaq4380-4.html * https://www.analog.com/en/products/adaq4381-4.html @@ -49,6 +50,7 @@ properties: - adi,ad7386-4 - adi,ad7387-4 - adi,ad7388-4 + - adi,ad7389-4 - adi,adaq4370-4 - adi,adaq4380-4 - adi,adaq4381-4 @@ -213,6 +215,15 @@ allOf: properties: refin-supply: false + # adi,ad7389-4 is internal reference only + - if: + properties: + compatible: + const: adi,ad7389-4 + then: + properties: + refio-supply: false + # adaq devices need more supplies and using channel to declare gain property # only applies to adaq devices - if: -- cgit v1.2.3 From 81a481f6256414b4e1ee2b014fc5f8e5e9d1678b Mon Sep 17 00:00:00 2001 From: David Lechner Date: Tue, 1 Apr 2025 17:50:12 -0500 Subject: Documentation: iio: ad7380: add AD7389-4 Document support for AD7389-4 and it's quirks. Signed-off-by: David Lechner Link: https://patch.msgid.link/20250401-iio-ad7380-add-ad7389-4-v1-5-23d2568aa24f@baylibre.com Signed-off-by: Jonathan Cameron --- Documentation/iio/ad7380.rst | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/iio/ad7380.rst b/Documentation/iio/ad7380.rst index 24a92a1c4371..d51f9ee3e939 100644 --- a/Documentation/iio/ad7380.rst +++ b/Documentation/iio/ad7380.rst @@ -27,6 +27,7 @@ The following chips are supported by this driver: * `AD7386-4 `_ * `AD7387-4 `_ * `AD7388-4 `_ +* `AD7389-4 `_ * `ADAQ4370-4 `_ * `ADAQ4380-4 `_ * `ADAQ4381-4 `_ @@ -50,6 +51,12 @@ ad7380-4 ad7380-4 supports only an external reference voltage (2.5V to 3.3V). It must be declared in the device tree as ``refin-supply``. +ad7389-4 +~~~~~~~~ + +ad7389-4 supports only an internal reference voltage. ``refin-supply`` and +``refio-supply`` properties are both omitted in this case. + ADAQ devices ~~~~~~~~~~~~ -- cgit v1.2.3 From 81fe5529e812d7176ff1e48783978504239a990e Mon Sep 17 00:00:00 2001 From: Angelo Dureghello Date: Thu, 3 Apr 2025 18:19:04 +0200 Subject: dt-bindings: iio: adc: adi,ad7606: add SPI offload properties Add #trigger-source-cells property to allow the BUSY output to be used as a SPI offload trigger source to indicate when a sample is ready to be read. Macros are added to adi,ad7606.h for the cell values to help with readability since they are arbitrary values. Signed-off-by: Angelo Dureghello Reviewed-by: Rob Herring (Arm) Reviewed-by: David Lechner Link: https://patch.msgid.link/20250403-wip-bl-spi-offload-ad7606-v1-1-1b00cb638b12@baylibre.com Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml index 52d3f1ce3367..29f12d650442 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml @@ -45,6 +45,14 @@ properties: "#size-cells": const: 0 + '#trigger-source-cells': + description: | + Cell indicates the output signal: 0 = BUSY, 1 = FIRSTDATA. + + For convenience, macros for these values are available in + dt-bindings/iio/adc/adi,ad7606.h. + const: 1 + # According to the datasheet, "Data is clocked in from SDI on the falling # edge of SCLK, while data is clocked out on DOUTA on the rising edge of # SCLK". Also, even if not stated textually in the datasheet, it is made -- cgit v1.2.3 From 89e1f95a61e54a5d74e819d311920e8ac002213b Mon Sep 17 00:00:00 2001 From: Angelo Dureghello Date: Thu, 3 Apr 2025 18:19:05 +0200 Subject: doc: iio: ad7606: describe offload support Add a section to the ad7606 documentation describing how to use the driver with SPI offloading. Signed-off-by: Angelo Dureghello Reviewed-by: David Lechner Link: https://patch.msgid.link/20250403-wip-bl-spi-offload-ad7606-v1-2-1b00cb638b12@baylibre.com Signed-off-by: Jonathan Cameron --- Documentation/iio/ad7606.rst | 45 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) (limited to 'Documentation') diff --git a/Documentation/iio/ad7606.rst b/Documentation/iio/ad7606.rst index 930199e03c67..5e02516bab40 100644 --- a/Documentation/iio/ad7606.rst +++ b/Documentation/iio/ad7606.rst @@ -26,6 +26,35 @@ SPI wiring modes These ADCs can output data on several SDO lines (1/2/4/8). The driver currently supports only 1 SDO line. +SPI offload wiring +------------------ +When used with a SPI offload, the supported wiring configuration is: + +.. code-block:: + + +-------------+ +-------------+ + | BUSY |-------->| TRIGGER | + | CS |<--------| CS | + | | | | + | ADC | | SPI | + | | | | + | SDI |<--------| SDO | + | DOUTA |-------->| SDI | + | SCLK |<--------| SCLK | + | | | | + | | +-------------+ + | CONVST |<--------| PWM | + +-------------+ +-------------+ + +In this case, the ``pwms`` property is required. +The ``#trigger-source-cells = <1>`` property is also required to connect back +to the SPI offload. The SPI offload will have ``trigger-sources`` property +with a cell to indicate the busy signal: +``<&ad7606 AD4695_TRIGGER_EVENT_BUSY>``. + +.. seealso:: `SPI offload support`_ + + Parallel wiring mode -------------------- @@ -123,6 +152,22 @@ Unimplemented features - CRC indication - Calibration +SPI offload support +=================== + +To be able to achieve the maximum sample rate, the driver can be used with the +`AXI SPI Engine`_ to provide SPI offload support. + +.. _AXI SPI Engine: https://analogdevicesinc.github.io/hdl/library/spi_engine/index.html + +When SPI offload is being used, some attributes will be different. + +* ``trigger`` directory is removed. +* ``sampling_frequency`` attribute is added for setting the sample rate. +* ``timestamp`` channel is removed. +* Buffer data format may be different compared to when offload is not used, + e.g. the ``in_voltage0_type`` attribute. + Device buffers ============== -- cgit v1.2.3 From 085831cfce61fc5e326f31eec1976414e71f4c17 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 7 Apr 2025 13:45:06 +0300 Subject: dt-bindings: ROHM BD79104 ADC The ROHM BD79104 is a 12-bit, 8-channel ADC with two power supply pins, connected to SPI. It's worth noting the IC requires SPI MODE 3, (CPHA = 1, CPOL = 1). I used an evaluation board "BD79104FV-EVK-001" from ROHM. With this board I had problems to have things working correctly with higher SPI clock frequencies. I didn't do thorough testing for maximum frequency though. First attempt was 40M, then 20M and finally 4M. With 20M it seemed as if the read values were shifted by 1 bit. With 4M it worked fine. The component data-sheet is not exact what comes to the maximum SPI frequency. It says SPI frequency is 20M - "unless othervice specified". Additionally, it says that maximum sampling rate is 1Mhz, and since reading a sample requires writing the channel (16 bits) and reading data (16 bits) - we get some upper limit from this. >From the "frequency is 20M, unless othervice specified" I picked the maximum frequency 20M - and did assumption that my problems with 20M weren't related to the BD79104 - but to the evaluation board "BD79104FV-EVK-001". Add bindings for the ROHM BD79104 ADC. Signed-off-by: Matti Vaittinen Reviewed-by: Conor Dooley Link: https://patch.msgid.link/2a4c65ee35cb79c6b29dbc59cfd9bc7d615a08ac.1744022065.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron --- .../devicetree/bindings/iio/adc/rohm,bd79104.yaml | 69 ++++++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml b/Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml new file mode 100644 index 000000000000..2a8ad4fdfc6b --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/rohm,bd79104.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM Semiconductor BD79104 ADC + +maintainers: + - Matti Vaittinen + +description: | + 12 bit SPI ADC with 8 channels. + +properties: + compatible: + const: rohm,bd79104 + + reg: + maxItems: 1 + + vdd-supply: true + iovdd-supply: true + +# The component data-sheet says the frequency is 20M. I, however, found +# that the ROHM evaluation board BD79104FV-EVK-001 had problems with 20M. +# I have successfully used it with 4M. My _assumption_ is that this is not +# the limitation of the component itself, but a limitation of the EVK. + spi-max-frequency: + maximum: 20000000 + + "#io-channel-cells": + const: 1 + + spi-cpha: true + spi-cpol: true + +required: + - compatible + - reg + - vdd-supply + - iovdd-supply + - spi-cpha + - spi-cpol + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "rohm,bd79104"; + reg = <0>; + vdd-supply = <&vdd_supply>; + iovdd-supply = <&iovdd_supply>; + spi-max-frequency = <4000000>; + spi-cpha; + spi-cpol; + #io-channel-cells = <1>; + }; + }; +... -- cgit v1.2.3 From 6b4079ccbfef213cb418e5a9cf4386393db1e6ea Mon Sep 17 00:00:00 2001 From: Jean-Baptiste Maneyrol Date: Thu, 10 Apr 2025 17:39:40 +0200 Subject: dt-bindings: iio: imu: icm42600: add interrupt naming support Add interrupt-names field for specifying interrupt pin configured. Chips are supporting up to 2 interrupt pins with configurable interrupt sources. Change interrupt to support 1 or 2 entries. Signed-off-by: Jean-Baptiste Maneyrol Acked-by: Conor Dooley Link: https://patch.msgid.link/20250410-iio-imu-inv-icm42600-rework-interrupt-using-names-v4-1-19e4e2f8f7eb@tdk.com Signed-off-by: Jonathan Cameron --- .../devicetree/bindings/iio/imu/invensense,icm42600.yaml | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml b/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml index 7e4492bbd027..d4d4e5c3d856 100644 --- a/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml +++ b/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml @@ -39,7 +39,16 @@ properties: maxItems: 1 interrupts: - maxItems: 1 + minItems: 1 + maxItems: 2 + + interrupt-names: + minItems: 1 + maxItems: 2 + items: + enum: + - INT1 + - INT2 drive-open-drain: type: boolean @@ -76,6 +85,7 @@ examples: reg = <0x68>; interrupt-parent = <&gpio2>; interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "INT1"; vdd-supply = <&vdd>; vddio-supply = <&vddio>; }; @@ -95,6 +105,7 @@ examples: spi-cpol; interrupt-parent = <&gpio1>; interrupts = <2 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "INT1"; vdd-supply = <&vdd>; vddio-supply = <&vddio>; }; -- cgit v1.2.3 From ede84c4556598b8899a93890d881bd407650c344 Mon Sep 17 00:00:00 2001 From: Angelo Dureghello Date: Wed, 9 Apr 2025 20:36:29 +0200 Subject: docs: iio: add documentation for ad3552r driver Add documentation for ad3552r driver, needed to describe the high-speed driver debugfs attributes and shows how the user may use them. Signed-off-by: Angelo Dureghello Link: https://patch.msgid.link/20250409-wip-bl-ad3552r-fixes-v5-2-fb429c3a6515@baylibre.com Signed-off-by: Jonathan Cameron --- Documentation/iio/ad3552r.rst | 72 +++++++++++++++++++++++++++++++++++++++++++ Documentation/iio/index.rst | 1 + 2 files changed, 73 insertions(+) create mode 100644 Documentation/iio/ad3552r.rst (limited to 'Documentation') diff --git a/Documentation/iio/ad3552r.rst b/Documentation/iio/ad3552r.rst new file mode 100644 index 000000000000..582507abe8c4 --- /dev/null +++ b/Documentation/iio/ad3552r.rst @@ -0,0 +1,72 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +============== +AD3552R driver +============== + +Device driver for Analog Devices Inc. AD35XXR series of DACs. The module name +is ``ad3552r``. +With the same module name, two different driver variants are available, the +``generic spi`` variant, to be used with any classic SPI controllers, and the +``hs`` (high speed) variant, for an ADI ``axi-dac`` (IP core) based controller +that allows to reach the maximum sample rate supported from the DACs, using the +DMA transfer and all the SPI lines available (D/QDSPI).. +The high speed driver variant is intended to be used with the ``adi-axi-dac`` +backend support enabled, that is enabled by default when the driver is selected. + +Supported devices +================= + +* `AD3541R `_ +* `AD3542R `_ +* `AD3551R `_ +* `AD3552R `_ + +Wiring connections +================== + +Generic SPI +----------- +Use the classic SPI S_CLK/CS/SDO/SDI connection. + +High speed (using axi-dac backend) +---------------------------------- + +:: + + .-----------------. .-------. + | |--- D/QSPI -----| | + | DAC IP CORE |--- SPI S_CLK --| DAC | + | |--- SPI CS -----| | + | |--- LDAC -------| | + | |--- RESET ------| | + |_________________| |_______| + + +High speed features +=================== + +Device attributes +----------------- + +The following table shows the ad35xxr related device debug files, found in the +specific debugfs path ``/sys/kernel/debug/iio/iio:deviceX``. + ++-----------------------+------------------------------------------------------+ +| Debugfs device files | Description | ++-----------------------+------------------------------------------------------+ +| data_source | The used data source, as | +| | ``normal``, ``ramp-16bit``, etc. | ++-----------------------+------------------------------------------------------+ +| data_source_available | The available data sources. | ++-----------------------+------------------------------------------------------+ + +Usage examples +-------------- + +. code-block:: bash + root:/sys/bus/iio/devices/iio:device0# cat data_source + normal + root:/sys/bus/iio/devices/iio:device0# echo -n ramp-16bit > data_source + root:/sys/bus/iio/devices/iio:device0# cat data_source + ramp-16bit diff --git a/Documentation/iio/index.rst b/Documentation/iio/index.rst index bbb2edce8272..2d6afc5a8ed5 100644 --- a/Documentation/iio/index.rst +++ b/Documentation/iio/index.rst @@ -19,6 +19,7 @@ Industrial I/O Kernel Drivers .. toctree:: :maxdepth: 1 + ad3552r ad4000 ad4030 ad4695 -- cgit v1.2.3 From 4cb6316d33d8ccf982f8975b1ea5f7f3f71c8da1 Mon Sep 17 00:00:00 2001 From: Dimitri Fedrau Date: Wed, 16 Apr 2025 19:14:47 +0200 Subject: dt-bindings: net: ethernet-phy: add property mac-termination-ohms Add property mac-termination-ohms in the device tree bindings for selecting the resistance value of the builtin series termination resistors of the PHY. Changing the resistance to an appropriate value can reduce signal reflections and therefore improve signal quality. Signed-off-by: Dimitri Fedrau Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250416-dp83822-mac-impedance-v3-1-028ac426cddb@liebherr.com Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/ethernet-phy.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index 824bbe4333b7..71e2cd32580f 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -238,6 +238,16 @@ properties: peak-to-peak specified in ANSI X3.263. When omitted, the PHYs default will be left as is. + mac-termination-ohms: + maximum: 200 + description: + The xMII signals need series termination on the driver side to match both + the output driver impedance and the line characteristic impedance, to + prevent reflections and EMI problems. Select a resistance value which is + supported by the builtin resistors of the PHY, otherwise the resistors may + have to be placed on board. When omitted, the PHYs default will be left as + is. + leds: type: object -- cgit v1.2.3 From 1de1390ee014f72ddff65ac73bee55005696fe96 Mon Sep 17 00:00:00 2001 From: Dimitri Fedrau Date: Wed, 16 Apr 2025 19:14:48 +0200 Subject: dt-bindings: net: dp83822: add constraints for mac-termination-ohms Property mac-termination-ohms is defined in ethernet-phy.yaml. Add allowed values for the property. Signed-off-by: Dimitri Fedrau Reviewed-by: Andrew Lunn Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250416-dp83822-mac-impedance-v3-2-028ac426cddb@liebherr.com Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/ti,dp83822.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/ti,dp83822.yaml b/Documentation/devicetree/bindings/net/ti,dp83822.yaml index 50c24248df26..28a0bddb9af9 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83822.yaml +++ b/Documentation/devicetree/bindings/net/ti,dp83822.yaml @@ -122,6 +122,9 @@ properties: - free-running - recovered + mac-termination-ohms: + enum: [43, 44, 46, 48, 50, 53, 55, 58, 61, 65, 69, 73, 78, 84, 91, 99] + required: - reg @@ -137,6 +140,7 @@ examples: rx-internal-delay-ps = <1>; tx-internal-delay-ps = <1>; ti,gpio2-clk-out = "xi"; + mac-termination-ohms = <43>; }; }; -- cgit v1.2.3 From 8c989368c04c17a6ed834ae528458844f553bead Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Thu, 17 Apr 2025 09:40:12 +0100 Subject: dt-bindings: net: dwmac: Increase 'maxItems' for 'interrupts' and 'interrupt-names' Increase the `maxItems` value for the `interrupts` and `interrupt-names` properties to 11 to support additional per-channel Tx/Rx completion interrupts on the Renesas RZ/V2H(P) SoC, which features the `snps,dwmac-5.20` IP. Refactor the `interrupt-names` property by replacing repeated `enum` entries with a `oneOf` list. Add support for per-channel receive and transmit completion interrupts using regex patterns. Signed-off-by: Lad Prabhakar Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250417084015.74154-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Jakub Kicinski --- .../devicetree/bindings/net/snps,dwmac.yaml | 24 ++++++++++++++-------- 1 file changed, 15 insertions(+), 9 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 78b3030dc56d..4d4fcaeca8a8 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -114,19 +114,25 @@ properties: interrupts: minItems: 1 - items: - - description: Combined signal for various interrupt events - - description: The interrupt to manage the remote wake-up packet detection - - description: The interrupt that occurs when Rx exits the LPI state - - description: The interrupt that occurs when HW safety error triggered + maxItems: 11 interrupt-names: minItems: 1 + maxItems: 11 items: - - const: macirq - - enum: [eth_wake_irq, eth_lpi, sfty] - - enum: [eth_wake_irq, eth_lpi, sfty] - - enum: [eth_wake_irq, eth_lpi, sfty] + oneOf: + - description: Combined signal for various interrupt events + const: macirq + - description: The interrupt to manage the remote wake-up packet detection + const: eth_wake_irq + - description: The interrupt that occurs when Rx exits the LPI state + const: eth_lpi + - description: The interrupt that occurs when HW safety error triggered + const: sfty + - description: Per channel receive completion interrupt + pattern: '^rx-queue-[0-3]$' + - description: Per channel transmit completion interrupt + pattern: '^tx-queue-[0-3]$' clocks: minItems: 1 -- cgit v1.2.3 From 8fff7ae84d1880b7d435f3bb71518eb24bf84846 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Thu, 17 Apr 2025 09:40:13 +0100 Subject: dt-bindings: net: Document support for Renesas RZ/V2H(P) GBETH GBETH IP on the Renesas RZ/V2H(P) SoC is integrated with Synopsys DesignWare MAC (version 5.20). Document the device tree bindings for the GBETH glue layer. Generic compatible string 'renesas,rzv2h-gbeth' is added since this module is identical on both the RZ/V2H(P) and RZ/G3E SoCs. The Rx/Tx clocks supplied for GBETH on the RZ/V2H(P) SoC is depicted below: Rx / Tx -------+------------- on / off ------- | | Rx-180 / Tx-180 +---- not ---- on / off ------- Signed-off-by: Lad Prabhakar Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250417084015.74154-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Jakub Kicinski --- .../bindings/net/renesas,r9a09g057-gbeth.yaml | 201 +++++++++++++++++++++ .../devicetree/bindings/net/snps,dwmac.yaml | 1 + 2 files changed, 202 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml b/Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml new file mode 100644 index 000000000000..02a6793c26f5 --- /dev/null +++ b/Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml @@ -0,0 +1,201 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/renesas,r9a09g057-gbeth.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GBETH glue layer for Renesas RZ/V2H(P) (and similar SoCs) + +maintainers: + - Lad Prabhakar + +select: + properties: + compatible: + contains: + enum: + - renesas,r9a09g057-gbeth + - renesas,rzv2h-gbeth + required: + - compatible + +properties: + compatible: + items: + - enum: + - renesas,r9a09g057-gbeth # RZ/V2H(P) + - const: renesas,rzv2h-gbeth + - const: snps,dwmac-5.20 + + reg: + maxItems: 1 + + clocks: + items: + - description: CSR clock + - description: AXI system clock + - description: PTP clock + - description: TX clock + - description: RX clock + - description: TX clock phase-shifted by 180 degrees + - description: RX clock phase-shifted by 180 degrees + + clock-names: + items: + - const: stmmaceth + - const: pclk + - const: ptp_ref + - const: tx + - const: rx + - const: tx-180 + - const: rx-180 + + interrupts: + minItems: 11 + + interrupt-names: + items: + - const: macirq + - const: eth_wake_irq + - const: eth_lpi + - const: rx-queue-0 + - const: rx-queue-1 + - const: rx-queue-2 + - const: rx-queue-3 + - const: tx-queue-0 + - const: tx-queue-1 + - const: tx-queue-2 + - const: tx-queue-3 + + resets: + items: + - description: AXI power-on system reset + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + - resets + +allOf: + - $ref: snps,dwmac.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + + ethernet@15c30000 { + compatible = "renesas,r9a09g057-gbeth", "renesas,rzv2h-gbeth", "snps,dwmac-5.20"; + reg = <0x15c30000 0x10000>; + clocks = <&cpg CPG_MOD 0xbd>, <&cpg CPG_MOD 0xbc>, + <&ptp_clock>, <&cpg CPG_MOD 0xb8>, + <&cpg CPG_MOD 0xb9>, <&cpg CPG_MOD 0xba>, + <&cpg CPG_MOD 0xbb>; + clock-names = "stmmaceth", "pclk", "ptp_ref", + "tx", "rx", "tx-180", "rx-180"; + resets = <&cpg 0xb0>; + interrupts = , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "macirq", "eth_wake_irq", "eth_lpi", + "rx-queue-0", "rx-queue-1", "rx-queue-2", + "rx-queue-3", "tx-queue-0", "tx-queue-1", + "tx-queue-2", "tx-queue-3"; + phy-mode = "rgmii-id"; + snps,multicast-filter-bins = <256>; + snps,perfect-filter-entries = <128>; + rx-fifo-depth = <8192>; + tx-fifo-depth = <8192>; + snps,fixed-burst; + snps,force_thresh_dma_mode; + snps,axi-config = <&stmmac_axi_setup>; + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + snps,txpbl = <32>; + snps,rxpbl = <32>; + phy-handle = <&phy0>; + + stmmac_axi_setup: stmmac-axi-config { + snps,lpi_en; + snps,wr_osr_lmt = <0xf>; + snps,rd_osr_lmt = <0xf>; + snps,blen = <16 8 4 0 0 0 0>; + }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <4>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,priority = <0x1>; + snps,map-to-dma-channel = <0>; + }; + + queue1 { + snps,dcb-algorithm; + snps,priority = <0x2>; + snps,map-to-dma-channel = <1>; + }; + + queue2 { + snps,dcb-algorithm; + snps,priority = <0x4>; + snps,map-to-dma-channel = <2>; + }; + + queue3 { + snps,dcb-algorithm; + snps,priority = <0x8>; + snps,map-to-dma-channel = <3>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <4>; + + queue0 { + snps,dcb-algorithm; + snps,priority = <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,priority = <0x2>; + }; + + queue2 { + snps,dcb-algorithm; + snps,priority = <0x4>; + }; + + queue3 { + snps,dcb-algorithm; + snps,priority = <0x1>; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 4d4fcaeca8a8..b525eca53850 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -75,6 +75,7 @@ properties: - qcom,sm8150-ethqos - renesas,r9a06g032-gmac - renesas,rzn1-gmac + - renesas,rzv2h-gbeth - rockchip,px30-gmac - rockchip,rk3128-gmac - rockchip,rk3228-gmac -- cgit v1.2.3 From 215113ab9cc899914254746160d86eeb35faaee5 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 14 Apr 2025 22:51:09 +0800 Subject: dt-bindings: PCI: dw: rockchip: Add rk3576 support rk3576 is using DWC PCIe controller, with msi interrupt directly to GIC instead of using GIC ITS, so - no ITS support is required and the 'msi-map' is not required, - a new 'msi' interrupt is needed. Co-developed-by: Sebastian Reichel Signed-off-by: Sebastian Reichel Signed-off-by: Kever Yang [mani: changed 'its' to 'ITS' in the binding, spelling mistake fix] Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring (Arm) Reviewed-by: Heiko Stuebner Link: https://patch.msgid.link/20250414145110.11275-2-kever.yang@rock-chips.com --- .../bindings/pci/rockchip-dw-pcie-common.yaml | 10 +++- .../devicetree/bindings/pci/rockchip-dw-pcie.yaml | 55 +++++++++++++++++++--- 2 files changed, 57 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml index cc9adfc7611c..fde9b87508b3 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml @@ -65,7 +65,11 @@ properties: tx_cpl_timeout, cor_err_sent, nf_err_sent, f_err_sent, cor_err_rx, nf_err_rx, f_err_rx, radm_qoverflow - description: - eDMA write channel 0 interrupt + If the matching interrupt name is "msi", then this is the combined + MSI line interrupt, which is to support MSI interrupts output to GIC + controller via GIC SPI interrupt instead of GIC ITS interrupt. + If the matching interrupt name is "dma0", then this is the eDMA write + channel 0 interrupt. - description: eDMA write channel 1 interrupt - description: @@ -81,7 +85,9 @@ properties: - const: msg - const: legacy - const: err - - const: dma0 + - enum: + - msi + - dma0 - const: dma1 - const: dma2 - const: dma3 diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 550d8a684af3..4764a0173ae4 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -16,16 +16,13 @@ description: |+ PCIe IP and thus inherits all the common properties defined in snps,dw-pcie.yaml. -allOf: - - $ref: /schemas/pci/snps,dw-pcie.yaml# - - $ref: /schemas/pci/rockchip-dw-pcie-common.yaml# - properties: compatible: oneOf: - const: rockchip,rk3568-pcie - items: - enum: + - rockchip,rk3576-pcie - rockchip,rk3588-pcie - const: rockchip,rk3568-pcie @@ -71,8 +68,54 @@ properties: vpcie3v3-supply: true -required: - - msi-map +allOf: + - $ref: /schemas/pci/snps,dw-pcie.yaml# + - $ref: /schemas/pci/rockchip-dw-pcie-common.yaml# + - if: + not: + properties: + compatible: + contains: + const: rockchip,rk3576-pcie + then: + required: + - msi-map + + - if: + properties: + compatible: + contains: + const: rockchip,rk3576-pcie + then: + properties: + interrupts: + minItems: 6 + maxItems: 6 + interrupt-names: + items: + - const: sys + - const: pmc + - const: msg + - const: legacy + - const: err + - const: msi + else: + properties: + interrupts: + minItems: 5 + interrupt-names: + minItems: 5 + items: + - const: sys + - const: pmc + - const: msg + - const: legacy + - const: err + - const: dma0 + - const: dma1 + - const: dma2 + - const: dma3 + unevaluatedProperties: false -- cgit v1.2.3 From c928080166a1fe4f45e396305c06fc22b7018ac6 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Tue, 15 Apr 2025 13:18:49 +0800 Subject: dt-bindings: PCI: dwc: rockchip: Add rk3562 support rk3562 is using the same dwc controller as rk3576. Signed-off-by: Kever Yang Signed-off-by: Manivannan Sadhasivam Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250415051855.59740-2-kever.yang@rock-chips.com --- Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 4764a0173ae4..6c6d828ce964 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -22,6 +22,7 @@ properties: - const: rockchip,rk3568-pcie - items: - enum: + - rockchip,rk3562-pcie - rockchip,rk3576-pcie - rockchip,rk3588-pcie - const: rockchip,rk3568-pcie @@ -76,7 +77,9 @@ allOf: properties: compatible: contains: - const: rockchip,rk3576-pcie + enum: + - rockchip,rk3562-pcie + - rockchip,rk3576-pcie then: required: - msi-map @@ -85,7 +88,9 @@ allOf: properties: compatible: contains: - const: rockchip,rk3576-pcie + enum: + - rockchip,rk3562-pcie + - rockchip,rk3576-pcie then: properties: interrupts: -- cgit v1.2.3 From 2a24e06885d728675f4723b7ee3692160a23b924 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 24 Mar 2025 13:52:01 +0100 Subject: dt-bindings: PCI: Correct indentation and style in DTS example DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring (Arm) Reviewed-by: Manivannan Sadhasivam Reviewed-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Link: https://patch.msgid.link/20250324125202.81986-1-krzysztof.kozlowski@linaro.org --- .../devicetree/bindings/pci/brcm,stb-pcie.yaml | 87 ++++++++-------- .../devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml | 16 +-- .../bindings/pci/intel,keembay-pcie-ep.yaml | 26 ++--- .../bindings/pci/intel,keembay-pcie.yaml | 38 +++---- .../bindings/pci/microchip,pcie-host.yaml | 54 +++++----- .../devicetree/bindings/pci/rcar-pci-ep.yaml | 34 +++--- .../devicetree/bindings/pci/rcar-pci-host.yaml | 46 ++++---- .../devicetree/bindings/pci/xilinx-versal-cpm.yaml | 116 ++++++++++----------- 8 files changed, 207 insertions(+), 210 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml index 29f0e1eb5096..c4f9674e8695 100644 --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml @@ -186,49 +186,48 @@ examples: #include scb { - #address-cells = <2>; - #size-cells = <1>; - pcie0: pcie@7d500000 { - compatible = "brcm,bcm2711-pcie"; - reg = <0x0 0x7d500000 0x9310>; - device_type = "pci"; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - interrupts = , - ; - interrupt-names = "pcie", "msi"; - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH - 0 0 0 2 &gicv2 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH - 0 0 0 3 &gicv2 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH - 0 0 0 4 &gicv2 GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; - - msi-parent = <&pcie0>; - msi-controller; - ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>; - dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>, - <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>; - brcm,enable-ssc; - brcm,scb-sizes = <0x0000000080000000 0x0000000080000000>; - - /* PCIe bridge, Root Port */ - pci@0,0 { - #address-cells = <3>; - #size-cells = <2>; - reg = <0x0 0x0 0x0 0x0 0x0>; - compatible = "pciclass,0604"; - device_type = "pci"; - vpcie3v3-supply = <&vreg7>; - ranges; - - /* PCIe endpoint */ - pci-ep@0,0 { - assigned-addresses = - <0x82010000 0x0 0xf8000000 0x6 0x00000000 0x0 0x2000>; - reg = <0x0 0x0 0x0 0x0 0x0>; - compatible = "pci14e4,1688"; - }; - }; + #address-cells = <2>; + #size-cells = <1>; + pcie0: pcie@7d500000 { + compatible = "brcm,bcm2711-pcie"; + reg = <0x0 0x7d500000 0x9310>; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + interrupts = , + ; + interrupt-names = "pcie", "msi"; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH + 0 0 0 2 &gicv2 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH + 0 0 0 3 &gicv2 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH + 0 0 0 4 &gicv2 GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; + + msi-parent = <&pcie0>; + msi-controller; + ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>; + dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>, + <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>; + brcm,enable-ssc; + brcm,scb-sizes = <0x0000000080000000 0x0000000080000000>; + + /* PCIe bridge, Root Port */ + pci@0,0 { + #address-cells = <3>; + #size-cells = <2>; + reg = <0x0 0x0 0x0 0x0 0x0>; + compatible = "pciclass,0604"; + device_type = "pci"; + vpcie3v3-supply = <&vreg7>; + ranges; + + /* PCIe endpoint */ + pci-ep@0,0 { + assigned-addresses = <0x82010000 0x0 0xf8000000 0x6 0x00000000 0x0 0x2000>; + reg = <0x0 0x0 0x0 0x0 0x0>; + compatible = "pci14e4,1688"; + }; }; + }; }; diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml index 98651ab22103..8735293962ee 100644 --- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml @@ -37,14 +37,14 @@ examples: #size-cells = <2>; pcie-ep@fc000000 { - compatible = "cdns,cdns-pcie-ep"; - reg = <0x0 0xfc000000 0x0 0x01000000>, - <0x0 0x80000000 0x0 0x40000000>; - reg-names = "reg", "mem"; - cdns,max-outbound-regions = <16>; - max-functions = /bits/ 8 <8>; - phys = <&pcie_phy0>; - phy-names = "pcie-phy"; + compatible = "cdns,cdns-pcie-ep"; + reg = <0x0 0xfc000000 0x0 0x01000000>, + <0x0 0x80000000 0x0 0x40000000>; + reg-names = "reg", "mem"; + cdns,max-outbound-regions = <16>; + max-functions = /bits/ 8 <8>; + phys = <&pcie_phy0>; + phy-names = "pcie-phy"; }; }; ... diff --git a/Documentation/devicetree/bindings/pci/intel,keembay-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/intel,keembay-pcie-ep.yaml index 730e63fd7669..b19f61ae72fb 100644 --- a/Documentation/devicetree/bindings/pci/intel,keembay-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/intel,keembay-pcie-ep.yaml @@ -53,17 +53,17 @@ examples: #include #include pcie-ep@37000000 { - compatible = "intel,keembay-pcie-ep"; - reg = <0x37000000 0x00001000>, - <0x37100000 0x00001000>, - <0x37300000 0x00001000>, - <0x36000000 0x01000000>, - <0x37800000 0x00000200>; - reg-names = "dbi", "dbi2", "atu", "addr_space", "apb"; - interrupts = , - , - , - ; - interrupt-names = "pcie", "pcie_ev", "pcie_err", "pcie_mem_access"; - num-lanes = <2>; + compatible = "intel,keembay-pcie-ep"; + reg = <0x37000000 0x00001000>, + <0x37100000 0x00001000>, + <0x37300000 0x00001000>, + <0x36000000 0x01000000>, + <0x37800000 0x00000200>; + reg-names = "dbi", "dbi2", "atu", "addr_space", "apb"; + interrupts = , + , + , + ; + interrupt-names = "pcie", "pcie_ev", "pcie_err", "pcie_mem_access"; + num-lanes = <2>; }; diff --git a/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml b/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml index 1fd557504b10..dd71e3d6bf94 100644 --- a/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml @@ -75,23 +75,23 @@ examples: #define KEEM_BAY_A53_PCIE #define KEEM_BAY_A53_AUX_PCIE pcie@37000000 { - compatible = "intel,keembay-pcie"; - reg = <0x37000000 0x00001000>, - <0x37300000 0x00001000>, - <0x36e00000 0x00200000>, - <0x37800000 0x00000200>; - reg-names = "dbi", "atu", "config", "apb"; - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - ranges = <0x02000000 0 0x36000000 0x36000000 0 0x00e00000>; - interrupts = , - , - ; - interrupt-names = "pcie", "pcie_ev", "pcie_err"; - clocks = <&scmi_clk KEEM_BAY_A53_PCIE>, - <&scmi_clk KEEM_BAY_A53_AUX_PCIE>; - clock-names = "master", "aux"; - reset-gpios = <&pca2 9 GPIO_ACTIVE_LOW>; - num-lanes = <2>; + compatible = "intel,keembay-pcie"; + reg = <0x37000000 0x00001000>, + <0x37300000 0x00001000>, + <0x36e00000 0x00200000>, + <0x37800000 0x00000200>; + reg-names = "dbi", "atu", "config", "apb"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x02000000 0 0x36000000 0x36000000 0 0x00e00000>; + interrupts = , + , + ; + interrupt-names = "pcie", "pcie_ev", "pcie_err"; + clocks = <&scmi_clk KEEM_BAY_A53_PCIE>, + <&scmi_clk KEEM_BAY_A53_AUX_PCIE>; + clock-names = "master", "aux"; + reset-gpios = <&pca2 9 GPIO_ACTIVE_LOW>; + num-lanes = <2>; }; diff --git a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml index 103574d18dbc..1aadfdee868f 100644 --- a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml +++ b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml @@ -65,33 +65,33 @@ unevaluatedProperties: false examples: - | soc { - #address-cells = <2>; + #address-cells = <2>; + #size-cells = <2>; + pcie0: pcie@2030000000 { + compatible = "microchip,pcie-host-1.0"; + reg = <0x0 0x70000000 0x0 0x08000000>, + <0x0 0x43008000 0x0 0x00002000>, + <0x0 0x4300a000 0x0 0x00002000>; + reg-names = "cfg", "bridge", "ctrl"; + device_type = "pci"; + #address-cells = <3>; #size-cells = <2>; - pcie0: pcie@2030000000 { - compatible = "microchip,pcie-host-1.0"; - reg = <0x0 0x70000000 0x0 0x08000000>, - <0x0 0x43008000 0x0 0x00002000>, - <0x0 0x4300a000 0x0 0x00002000>; - reg-names = "cfg", "bridge", "ctrl"; - device_type = "pci"; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - interrupts = <119>; - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = <0 0 0 1 &pcie_intc0 0>, - <0 0 0 2 &pcie_intc0 1>, - <0 0 0 3 &pcie_intc0 2>, - <0 0 0 4 &pcie_intc0 3>; - interrupt-parent = <&plic0>; - msi-parent = <&pcie0>; - msi-controller; - bus-range = <0x00 0x7f>; - ranges = <0x03000000 0x0 0x78000000 0x0 0x78000000 0x0 0x04000000>; - pcie_intc0: interrupt-controller { - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - }; + #interrupt-cells = <1>; + interrupts = <119>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0 0 0 1 &pcie_intc0 0>, + <0 0 0 2 &pcie_intc0 1>, + <0 0 0 3 &pcie_intc0 2>, + <0 0 0 4 &pcie_intc0 3>; + interrupt-parent = <&plic0>; + msi-parent = <&pcie0>; + msi-controller; + bus-range = <0x00 0x7f>; + ranges = <0x03000000 0x0 0x78000000 0x0 0x78000000 0x0 0x04000000>; + pcie_intc0: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; }; + }; }; diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml index 32a3b7665ff5..6b91581c30ae 100644 --- a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml @@ -73,21 +73,21 @@ examples: #include #include - pcie0_ep: pcie-ep@fe000000 { - compatible = "renesas,r8a774c0-pcie-ep", - "renesas,rcar-gen3-pcie-ep"; - reg = <0xfe000000 0x80000>, - <0xfe100000 0x100000>, - <0xfe200000 0x200000>, - <0x30000000 0x8000000>, - <0x38000000 0x8000000>; - reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; - interrupts = , - , - ; - resets = <&cpg 319>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 319>; - clock-names = "pcie"; - max-functions = /bits/ 8 <1>; + pcie0_ep: pcie-ep@fe000000 { + compatible = "renesas,r8a774c0-pcie-ep", + "renesas,rcar-gen3-pcie-ep"; + reg = <0xfe000000 0x80000>, + <0xfe100000 0x100000>, + <0xfe200000 0x200000>, + <0x30000000 0x8000000>, + <0x38000000 0x8000000>; + reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; + interrupts = , + , + ; + resets = <&cpg 319>; + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 319>; + clock-names = "pcie"; + max-functions = /bits/ 8 <1>; }; diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml b/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml index 666f013e3af8..7896576920aa 100644 --- a/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml @@ -113,27 +113,27 @@ examples: pcie: pcie@fe000000 { compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2"; reg = <0 0xfe000000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, - <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, - <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, - <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; - dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>, - <0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>; - interrupts = , - , - ; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 319>; - vpcie3v3-supply = <&pcie_3v3>; - vpcie12v-supply = <&pcie_12v>; - }; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x00 0xff>; + device_type = "pci"; + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, + <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, + <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, + <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>, + <0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>; + interrupts = , + , + ; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; + clock-names = "pcie", "pcie_bus"; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; + resets = <&cpg 319>; + vpcie3v3-supply = <&pcie_3v3>; + vpcie12v-supply = <&pcie_12v>; + }; }; diff --git a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml index d674a24c8ccc..9823456addea 100644 --- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml +++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml @@ -76,64 +76,62 @@ unevaluatedProperties: false examples: - | - versal { - #address-cells = <2>; - #size-cells = <2>; - cpm_pcie: pcie@fca10000 { - compatible = "xlnx,versal-cpm-host-1.00"; - device_type = "pci"; - #address-cells = <3>; - #interrupt-cells = <1>; - #size-cells = <2>; - interrupts = <0 72 4>; - interrupt-parent = <&gic>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie_intc_0 0>, - <0 0 0 2 &pcie_intc_0 1>, - <0 0 0 3 &pcie_intc_0 2>, - <0 0 0 4 &pcie_intc_0 3>; - bus-range = <0x00 0xff>; - ranges = <0x02000000 0x0 0xe0010000 0x0 0xe0010000 0x0 0x10000000>, - <0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>; - msi-map = <0x0 &its_gic 0x0 0x10000>; - reg = <0x0 0xfca10000 0x0 0x1000>, - <0x6 0x00000000 0x0 0x10000000>; - reg-names = "cpm_slcr", "cfg"; - pcie_intc_0: interrupt-controller { - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - }; - }; - - cpm5_pcie: pcie@fcdd0000 { - compatible = "xlnx,versal-cpm5-host"; - device_type = "pci"; - #address-cells = <3>; - #interrupt-cells = <1>; - #size-cells = <2>; - interrupts = <0 72 4>; - interrupt-parent = <&gic>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie_intc_1 0>, - <0 0 0 2 &pcie_intc_1 1>, - <0 0 0 3 &pcie_intc_1 2>, - <0 0 0 4 &pcie_intc_1 3>; - bus-range = <0x00 0xff>; - ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>, - <0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>; - msi-map = <0x0 &its_gic 0x0 0x10000>; - reg = <0x00 0xfcdd0000 0x00 0x1000>, - <0x06 0x00000000 0x00 0x1000000>, - <0x00 0xfce20000 0x00 0x1000000>; - reg-names = "cpm_slcr", "cfg", "cpm_csr"; - - pcie_intc_1: interrupt-controller { - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - }; - }; - + #address-cells = <2>; + #size-cells = <2>; + pcie@fca10000 { + compatible = "xlnx,versal-cpm-host-1.00"; + device_type = "pci"; + #address-cells = <3>; + #interrupt-cells = <1>; + #size-cells = <2>; + interrupts = <0 72 4>; + interrupt-parent = <&gic>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc_0 0>, + <0 0 0 2 &pcie_intc_0 1>, + <0 0 0 3 &pcie_intc_0 2>, + <0 0 0 4 &pcie_intc_0 3>; + bus-range = <0x00 0xff>; + ranges = <0x02000000 0x0 0xe0010000 0x0 0xe0010000 0x0 0x10000000>, + <0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>; + msi-map = <0x0 &its_gic 0x0 0x10000>; + reg = <0x0 0xfca10000 0x0 0x1000>, + <0x6 0x00000000 0x0 0x10000000>; + reg-names = "cpm_slcr", "cfg"; + pcie_intc_0: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + + pcie@fcdd0000 { + compatible = "xlnx,versal-cpm5-host"; + device_type = "pci"; + #address-cells = <3>; + #interrupt-cells = <1>; + #size-cells = <2>; + interrupts = <0 72 4>; + interrupt-parent = <&gic>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc_1 0>, + <0 0 0 2 &pcie_intc_1 1>, + <0 0 0 3 &pcie_intc_1 2>, + <0 0 0 4 &pcie_intc_1 3>; + bus-range = <0x00 0xff>; + ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>, + <0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>; + msi-map = <0x0 &its_gic 0x0 0x10000>; + reg = <0x00 0xfcdd0000 0x00 0x1000>, + <0x06 0x00000000 0x00 0x1000000>, + <0x00 0xfce20000 0x00 0x1000000>; + reg-names = "cpm_slcr", "cfg", "cpm_csr"; + + pcie_intc_1: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; }; -- cgit v1.2.3 From 39813e1865c24db95527c39c0d664d4ef2e111c0 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 24 Mar 2025 13:52:02 +0100 Subject: dt-bindings: PCI: sifive,fu740-pcie: Fix include placement in DTS example Coding style and common logic dictates that headers should not be included in device nodes. No functional impact. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam Reviewed-by: Manivannan Sadhasivam Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250324125202.81986-2-krzysztof.kozlowski@linaro.org --- Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml b/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml index 844fc7142302..d35ff807936b 100644 --- a/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml @@ -81,10 +81,10 @@ unevaluatedProperties: false examples: - | + #include bus { #address-cells = <2>; #size-cells = <2>; - #include pcie@e00000000 { compatible = "sifive,fu740-pcie"; -- cgit v1.2.3 From 0c983d3544a5fb6b8b5770d958050280e3b85cc4 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 14 Apr 2025 16:41:48 -0500 Subject: dt-bindings: PCI: Convert Marvell EBU to schema Convert the Marvell EBU (Kirkwood, Dove, Armada XP/370) to DT schema format. Add "error" to interrupt-names which is in use, but missing. Shorten the example from 10 child nodes to 6 as the additional ones don't add much value to the example. Signed-off-by: Rob Herring (Arm) Signed-off-by: Manivannan Sadhasivam Link: https://patch.msgid.link/20250414214157.1680484-1-robh@kernel.org --- .../bindings/pci/marvell,kirkwood-pcie.yaml | 277 ++++++++++++++++++ .../devicetree/bindings/pci/mvebu-pci.txt | 310 --------------------- 2 files changed, 277 insertions(+), 310 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/marvell,kirkwood-pcie.yaml delete mode 100644 Documentation/devicetree/bindings/pci/mvebu-pci.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/marvell,kirkwood-pcie.yaml b/Documentation/devicetree/bindings/pci/marvell,kirkwood-pcie.yaml new file mode 100644 index 000000000000..7be695320ddf --- /dev/null +++ b/Documentation/devicetree/bindings/pci/marvell,kirkwood-pcie.yaml @@ -0,0 +1,277 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/marvell,kirkwood-pcie.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell EBU PCIe interfaces + +maintainers: + - Thomas Petazzoni + - Pali Rohár + +allOf: + - $ref: /schemas/pci/pci-host-bridge.yaml# + +properties: + compatible: + enum: + - marvell,armada-370-pcie + - marvell,armada-xp-pcie + - marvell,dove-pcie + - marvell,kirkwood-pcie + + ranges: + description: > + The ranges describing the MMIO registers have the following layout: + + 0x82000000 0 r MBUS_ID(0xf0, 0x01) r 0 s + + where: + + * r is a 32-bits value that gives the offset of the MMIO registers of + this PCIe interface, from the base of the internal registers. + + * s is a 32-bits value that give the size of this MMIO registers area. + This range entry translates the '0x82000000 0 r' PCI address into the + 'MBUS_ID(0xf0, 0x01) r' CPU address, which is part of the internal + register window (as identified by MBUS_ID(0xf0, 0x01)). + + The ranges describing the MBus windows have the following layout: + + 0x8t000000 s 0 MBUS_ID(w, a) 0 1 0 + + where: + + * t is the type of the MBus window (as defined by the standard PCI DT + bindings), 1 for I/O and 2 for memory. + + * s is the PCI slot that corresponds to this PCIe interface + + * w is the 'target ID' value for the MBus window + + * a the 'attribute' value for the MBus window. + + Since the location and size of the different MBus windows is not fixed in + hardware, and only determined in runtime, those ranges cover the full first + 4 GB of the physical address space, and do not translate into a valid CPU + address. + + msi-parent: + maxItems: 1 + +patternProperties: + '^pcie@': + type: object + allOf: + - $ref: /schemas/pci/pci-bus-common.yaml# + - $ref: /schemas/pci/pci-device.yaml# + unevaluatedProperties: false + + properties: + clocks: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 2 + + interrupt-names: + minItems: 1 + items: + - const: intx + - const: error + + reset-delay-us: + default: 100000 + description: todo + + marvell,pcie-port: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 3 + description: todo + + marvell,pcie-lane: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 3 + description: todo + + interrupt-controller: + type: object + additionalProperties: false + + properties: + interrupt-controller: true + + '#interrupt-cells': + const: 1 + + required: + - assigned-addresses + - clocks + - interrupt-map + - marvell,pcie-port + +unevaluatedProperties: false + +examples: + - | + #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) + + soc { + #address-cells = <2>; + #size-cells = <2>; + + pcie@f001000000000000 { + compatible = "marvell,armada-xp-pcie"; + device_type = "pci"; + + #address-cells = <3>; + #size-cells = <2>; + + bus-range = <0x00 0xff>; + msi-parent = <&mpic>; + + ranges = + <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */ + 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */ + 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */ + 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */ + 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */ + 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */ + 0x82000000 0 0x82000 MBUS_ID(0xf0, 0x01) 0x82000 0 0x00002000 /* Port 3.0 registers */ + 0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000 /* Port 1.1 registers */ + 0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000 /* Port 1.2 registers */ + 0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000 /* Port 1.3 registers */ + 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ + 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */ + 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */ + 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 0.1 IO */ + 0x82000000 0x3 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 0.2 MEM */ + 0x81000000 0x3 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO */ + 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */ + 0x81000000 0x4 0 MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO */ + + 0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */ + 0x81000000 0x5 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */ + 0x82000000 0x6 0 MBUS_ID(0x08, 0xd8) 0 1 0 /* Port 1.1 MEM */ + 0x81000000 0x6 0 MBUS_ID(0x08, 0xd0) 0 1 0 /* Port 1.1 IO */ + 0x82000000 0x7 0 MBUS_ID(0x08, 0xb8) 0 1 0 /* Port 1.2 MEM */ + 0x81000000 0x7 0 MBUS_ID(0x08, 0xb0) 0 1 0 /* Port 1.2 IO */ + 0x82000000 0x8 0 MBUS_ID(0x08, 0x78) 0 1 0 /* Port 1.3 MEM */ + 0x81000000 0x8 0 MBUS_ID(0x08, 0x70) 0 1 0 /* Port 1.3 IO */ + + 0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */ + 0x81000000 0x9 0 MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO */ + + 0x82000000 0xa 0 MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */ + 0x81000000 0xa 0 MBUS_ID(0x08, 0xf0) 0 1 0 /* Port 3.0 IO */>; + + pcie@1,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; + reg = <0x0800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 + 0x81000000 0 0 0x81000000 0x1 0 1 0>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 58>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <0>; + num-lanes = <1>; + /* low-active PERST# reset on GPIO 25 */ + reset-gpios = <&gpio0 25 1>; + /* wait 20ms for device settle after reset deassertion */ + reset-delay-us = <20000>; + clocks = <&gateclk 5>; + }; + + pcie@2,0 { + device_type = "pci"; + assigned-addresses = <0x82001000 0 0x44000 0 0x2000>; + reg = <0x1000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 + 0x81000000 0 0 0x81000000 0x2 0 1 0>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 59>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <1>; + num-lanes = <1>; + clocks = <&gateclk 6>; + }; + + pcie@3,0 { + device_type = "pci"; + assigned-addresses = <0x82001800 0 0x48000 0 0x2000>; + reg = <0x1800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 + 0x81000000 0 0 0x81000000 0x3 0 1 0>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 60>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <2>; + num-lanes = <1>; + clocks = <&gateclk 7>; + }; + + pcie@4,0 { + device_type = "pci"; + assigned-addresses = <0x82002000 0 0x4c000 0 0x2000>; + reg = <0x2000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 + 0x81000000 0 0 0x81000000 0x4 0 1 0>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 61>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <3>; + num-lanes = <1>; + clocks = <&gateclk 8>; + }; + + pcie@5,0 { + device_type = "pci"; + assigned-addresses = <0x82002800 0 0x80000 0 0x2000>; + reg = <0x2800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 + 0x81000000 0 0 0x81000000 0x5 0 1 0>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 62>; + marvell,pcie-port = <1>; + marvell,pcie-lane = <0>; + num-lanes = <1>; + clocks = <&gateclk 9>; + }; + + pcie@6,0 { + device_type = "pci"; + assigned-addresses = <0x82003000 0 0x84000 0 0x2000>; + reg = <0x3000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0 + 0x81000000 0 0 0x81000000 0x6 0 1 0>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 63>; + marvell,pcie-port = <1>; + marvell,pcie-lane = <1>; + num-lanes = <1>; + clocks = <&gateclk 10>; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/pci/mvebu-pci.txt b/Documentation/devicetree/bindings/pci/mvebu-pci.txt deleted file mode 100644 index 6d022a9d36ee..000000000000 --- a/Documentation/devicetree/bindings/pci/mvebu-pci.txt +++ /dev/null @@ -1,310 +0,0 @@ -* Marvell EBU PCIe interfaces - -Mandatory properties: - -- compatible: one of the following values: - marvell,armada-370-pcie - marvell,armada-xp-pcie - marvell,dove-pcie - marvell,kirkwood-pcie -- #address-cells, set to <3> -- #size-cells, set to <2> -- #interrupt-cells, set to <1> -- bus-range: PCI bus numbers covered -- device_type, set to "pci" -- ranges: ranges describing the MMIO registers to control the PCIe - interfaces, and ranges describing the MBus windows needed to access - the memory and I/O regions of each PCIe interface. -- msi-parent: Link to the hardware entity that serves as the Message - Signaled Interrupt controller for this PCI controller. - -The ranges describing the MMIO registers have the following layout: - - 0x82000000 0 r MBUS_ID(0xf0, 0x01) r 0 s - -where: - - * r is a 32-bits value that gives the offset of the MMIO - registers of this PCIe interface, from the base of the internal - registers. - - * s is a 32-bits value that give the size of this MMIO - registers area. This range entry translates the '0x82000000 0 r' PCI - address into the 'MBUS_ID(0xf0, 0x01) r' CPU address, which is part - of the internal register window (as identified by MBUS_ID(0xf0, - 0x01)). - -The ranges describing the MBus windows have the following layout: - - 0x8t000000 s 0 MBUS_ID(w, a) 0 1 0 - -where: - - * t is the type of the MBus window (as defined by the standard PCI DT - bindings), 1 for I/O and 2 for memory. - - * s is the PCI slot that corresponds to this PCIe interface - - * w is the 'target ID' value for the MBus window - - * a the 'attribute' value for the MBus window. - -Since the location and size of the different MBus windows is not fixed in -hardware, and only determined in runtime, those ranges cover the full first -4 GB of the physical address space, and do not translate into a valid CPU -address. - -In addition, the device tree node must have sub-nodes describing each -PCIe interface, having the following mandatory properties: - -- reg: used only for interrupt mapping, so only the first four bytes - are used to refer to the correct bus number and device number. -- assigned-addresses: reference to the MMIO registers used to control - this PCIe interface. -- clocks: the clock associated to this PCIe interface -- marvell,pcie-port: the physical PCIe port number -- status: either "disabled" or "okay" -- device_type, set to "pci" -- #address-cells, set to <3> -- #size-cells, set to <2> -- #interrupt-cells, set to <1> -- ranges, translating the MBus windows ranges of the parent node into - standard PCI addresses. -- interrupt-map-mask and interrupt-map, standard PCI properties to - define the mapping of the PCIe interface to interrupt numbers. - -and the following optional properties: -- marvell,pcie-lane: the physical PCIe lane number, for ports having - multiple lanes. If this property is not found, we assume that the - value is 0. -- num-lanes: number of SerDes PCIe lanes for this link (1 or 4) -- reset-gpios: optional GPIO to PERST# -- reset-delay-us: delay in us to wait after reset de-assertion, if not - specified will default to 100ms, as required by the PCIe specification. -- interrupt-names: list of interrupt names, supported are: - - "intx" - interrupt line triggered by one of the legacy interrupt -- interrupts or interrupts-extended: List of the interrupt sources which - corresponding to the "interrupt-names". If non-empty then also additional - 'interrupt-controller' subnode must be defined. - -Example: - -pcie-controller { - compatible = "marvell,armada-xp-pcie"; - device_type = "pci"; - - #address-cells = <3>; - #size-cells = <2>; - - bus-range = <0x00 0xff>; - msi-parent = <&mpic>; - - ranges = - <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */ - 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */ - 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */ - 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */ - 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */ - 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */ - 0x82000000 0 0x82000 MBUS_ID(0xf0, 0x01) 0x82000 0 0x00002000 /* Port 3.0 registers */ - 0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000 /* Port 1.1 registers */ - 0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000 /* Port 1.2 registers */ - 0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000 /* Port 1.3 registers */ - 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ - 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */ - 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */ - 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 0.1 IO */ - 0x82000000 0x3 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 0.2 MEM */ - 0x81000000 0x3 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO */ - 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */ - 0x81000000 0x4 0 MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO */ - - 0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */ - 0x81000000 0x5 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */ - 0x82000000 0x6 0 MBUS_ID(0x08, 0xd8) 0 1 0 /* Port 1.1 MEM */ - 0x81000000 0x6 0 MBUS_ID(0x08, 0xd0) 0 1 0 /* Port 1.1 IO */ - 0x82000000 0x7 0 MBUS_ID(0x08, 0xb8) 0 1 0 /* Port 1.2 MEM */ - 0x81000000 0x7 0 MBUS_ID(0x08, 0xb0) 0 1 0 /* Port 1.2 IO */ - 0x82000000 0x8 0 MBUS_ID(0x08, 0x78) 0 1 0 /* Port 1.3 MEM */ - 0x81000000 0x8 0 MBUS_ID(0x08, 0x70) 0 1 0 /* Port 1.3 IO */ - - 0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */ - 0x81000000 0x9 0 MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO */ - - 0x82000000 0xa 0 MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */ - 0x81000000 0xa 0 MBUS_ID(0x08, 0xf0) 0 1 0 /* Port 3.0 IO */>; - - pcie@1,0 { - device_type = "pci"; - assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; - reg = <0x0800 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 - 0x81000000 0 0 0x81000000 0x1 0 1 0>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 58>; - marvell,pcie-port = <0>; - marvell,pcie-lane = <0>; - num-lanes = <1>; - /* low-active PERST# reset on GPIO 25 */ - reset-gpios = <&gpio0 25 1>; - /* wait 20ms for device settle after reset deassertion */ - reset-delay-us = <20000>; - clocks = <&gateclk 5>; - }; - - pcie@2,0 { - device_type = "pci"; - assigned-addresses = <0x82001000 0 0x44000 0 0x2000>; - reg = <0x1000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 - 0x81000000 0 0 0x81000000 0x2 0 1 0>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 59>; - marvell,pcie-port = <0>; - marvell,pcie-lane = <1>; - num-lanes = <1>; - clocks = <&gateclk 6>; - }; - - pcie@3,0 { - device_type = "pci"; - assigned-addresses = <0x82001800 0 0x48000 0 0x2000>; - reg = <0x1800 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 - 0x81000000 0 0 0x81000000 0x3 0 1 0>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 60>; - marvell,pcie-port = <0>; - marvell,pcie-lane = <2>; - num-lanes = <1>; - clocks = <&gateclk 7>; - }; - - pcie@4,0 { - device_type = "pci"; - assigned-addresses = <0x82002000 0 0x4c000 0 0x2000>; - reg = <0x2000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 - 0x81000000 0 0 0x81000000 0x4 0 1 0>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 61>; - marvell,pcie-port = <0>; - marvell,pcie-lane = <3>; - num-lanes = <1>; - clocks = <&gateclk 8>; - }; - - pcie@5,0 { - device_type = "pci"; - assigned-addresses = <0x82002800 0 0x80000 0 0x2000>; - reg = <0x2800 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 - 0x81000000 0 0 0x81000000 0x5 0 1 0>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 62>; - marvell,pcie-port = <1>; - marvell,pcie-lane = <0>; - num-lanes = <1>; - clocks = <&gateclk 9>; - }; - - pcie@6,0 { - device_type = "pci"; - assigned-addresses = <0x82003000 0 0x84000 0 0x2000>; - reg = <0x3000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0 - 0x81000000 0 0 0x81000000 0x6 0 1 0>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 63>; - marvell,pcie-port = <1>; - marvell,pcie-lane = <1>; - num-lanes = <1>; - clocks = <&gateclk 10>; - }; - - pcie@7,0 { - device_type = "pci"; - assigned-addresses = <0x82003800 0 0x88000 0 0x2000>; - reg = <0x3800 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0 - 0x81000000 0 0 0x81000000 0x7 0 1 0>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 64>; - marvell,pcie-port = <1>; - marvell,pcie-lane = <2>; - num-lanes = <1>; - clocks = <&gateclk 11>; - }; - - pcie@8,0 { - device_type = "pci"; - assigned-addresses = <0x82004000 0 0x8c000 0 0x2000>; - reg = <0x4000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0 - 0x81000000 0 0 0x81000000 0x8 0 1 0>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 65>; - marvell,pcie-port = <1>; - marvell,pcie-lane = <3>; - num-lanes = <1>; - clocks = <&gateclk 12>; - }; - - pcie@9,0 { - device_type = "pci"; - assigned-addresses = <0x82004800 0 0x42000 0 0x2000>; - reg = <0x4800 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 - 0x81000000 0 0 0x81000000 0x9 0 1 0>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 99>; - marvell,pcie-port = <2>; - marvell,pcie-lane = <0>; - num-lanes = <1>; - clocks = <&gateclk 26>; - }; - - pcie@a,0 { - device_type = "pci"; - assigned-addresses = <0x82005000 0 0x82000 0 0x2000>; - reg = <0x5000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0 - 0x81000000 0 0 0x81000000 0xa 0 1 0>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 103>; - marvell,pcie-port = <3>; - marvell,pcie-lane = <0>; - num-lanes = <1>; - clocks = <&gateclk 27>; - }; -}; -- cgit v1.2.3 From 096d05bf3e3aa0273bd9eef248ce43dce0cb4c96 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 14 Apr 2025 16:41:33 -0500 Subject: dt-bindings: PCI: Convert marvell,armada8k-pcie to schema Convert the marvell,armada8k-pcie binding to DT schema. The binding uses different names for reg, clocks, and phys which have to be added to the common Synopsys DWC binding. The "marvell,reset-gpio" property was not documented. Mark it deprecated as the "reset-gpios" property can be used instead. The "msi-parent" property was also not documented. Signed-off-by: Rob Herring (Arm) Signed-off-by: Manivannan Sadhasivam Link: https://patch.msgid.link/20250414214135.1680076-1-robh@kernel.org --- .../bindings/pci/marvell,armada8k-pcie.yaml | 100 +++++++++++++++++++++ .../devicetree/bindings/pci/pci-armada8k.txt | 48 ---------- .../bindings/pci/snps,dw-pcie-common.yaml | 3 +- .../devicetree/bindings/pci/snps,dw-pcie.yaml | 4 +- 4 files changed, 105 insertions(+), 50 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/marvell,armada8k-pcie.yaml delete mode 100644 Documentation/devicetree/bindings/pci/pci-armada8k.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/marvell,armada8k-pcie.yaml b/Documentation/devicetree/bindings/pci/marvell,armada8k-pcie.yaml new file mode 100644 index 000000000000..f3ba9230ce2a --- /dev/null +++ b/Documentation/devicetree/bindings/pci/marvell,armada8k-pcie.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/marvell,armada8k-pcie.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 7K/8K PCIe interface + +maintainers: + - Thomas Petazzoni + +description: + This PCIe host controller is based on the Synopsys DesignWare PCIe IP. + +select: + properties: + compatible: + contains: + enum: + - marvell,armada8k-pcie + required: + - compatible + +allOf: + - $ref: snps,dw-pcie.yaml# + +properties: + compatible: + items: + - enum: + - marvell,armada8k-pcie + - const: snps,dw-pcie + + reg: + maxItems: 2 + + reg-names: + items: + - const: ctrl + - const: config + + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + items: + - const: core + - const: reg + + interrupts: + maxItems: 1 + + msi-parent: + maxItems: 1 + + phys: + minItems: 1 + maxItems: 4 + + phy-names: + minItems: 1 + maxItems: 4 + + marvell,reset-gpio: + maxItems: 1 + deprecated: true + +required: + - interrupt-map + - clocks + - msi-parent + +unevaluatedProperties: false + +examples: + - | + #include + #include + + pcie@f2600000 { + compatible = "marvell,armada8k-pcie", "snps,dw-pcie"; + reg = <0xf2600000 0x10000>, <0xf6f00000 0x80000>; + reg-names = "ctrl", "config"; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + dma-coherent; + msi-parent = <&gic_v2m0>; + + ranges = <0x81000000 0 0xf9000000 0xf9000000 0 0x10000>, /* downstream I/O */ + <0x82000000 0 0xf6000000 0xf6000000 0 0xf00000>; /* non-prefetchable memory */ + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; + num-lanes = <1>; + clocks = <&cpm_syscon0 1 13>; + }; +... diff --git a/Documentation/devicetree/bindings/pci/pci-armada8k.txt b/Documentation/devicetree/bindings/pci/pci-armada8k.txt deleted file mode 100644 index ff25a134befa..000000000000 --- a/Documentation/devicetree/bindings/pci/pci-armada8k.txt +++ /dev/null @@ -1,48 +0,0 @@ -* Marvell Armada 7K/8K PCIe interface - -This PCIe host controller is based on the Synopsys DesignWare PCIe IP -and thus inherits all the common properties defined in snps,dw-pcie.yaml. - -Required properties: -- compatible: "marvell,armada8k-pcie" -- reg: must contain two register regions - - the control register region - - the config space region -- reg-names: - - "ctrl" for the control register region - - "config" for the config space region -- interrupts: Interrupt specifier for the PCIe controller -- clocks: reference to the PCIe controller clocks -- clock-names: mandatory if there is a second clock, in this case the - name must be "core" for the first clock and "reg" for the second - one - -Optional properties: -- phys: phandle(s) to PHY node(s) following the generic PHY bindings. - Either 1, 2 or 4 PHYs might be needed depending on the number of - PCIe lanes. -- phy-names: names of the PHYs corresponding to the number of lanes. - Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for - 2 PHYs. - -Example: - - pcie@f2600000 { - compatible = "marvell,armada8k-pcie", "snps,dw-pcie"; - reg = <0 0xf2600000 0 0x10000>, <0 0xf6f00000 0 0x80000>; - reg-names = "ctrl", "config"; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - dma-coherent; - - bus-range = <0 0xff>; - ranges = <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000 /* downstream I/O */ - 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; /* non-prefetchable memory */ - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - interrupts = ; - num-lanes = <1>; - clocks = <&cpm_syscon0 1 13>; - }; diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml index dc05761c5cf9..34594972d8db 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml @@ -115,7 +115,7 @@ properties: above for new bindings. oneOf: - description: See native 'dbi' clock for details - enum: [ pcie, pcie_apb_sys, aclk_dbi ] + enum: [ pcie, pcie_apb_sys, aclk_dbi, reg ] - description: See native 'mstr/slv' clock for details enum: [ pcie_bus, pcie_inbound_axi, pcie_aclk, aclk_mst, aclk_slv ] - description: See native 'pipe' clock for details @@ -201,6 +201,7 @@ properties: oneOf: - pattern: '^pcie(-?phy[0-9]*)?$' - pattern: '^p2u-[0-7]$' + - pattern: '^cp[01]-pcie[0-2]-x[124](-lane[0-3])?-phy$' # marvell,armada8k-pcie reset-gpio: deprecated: true diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml index 1117a86fb6f7..69e82f438f58 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml @@ -105,6 +105,8 @@ properties: Vendor-specific CSR names. Consider using the generic names above for new bindings. oneOf: + - description: See native 'dbi' CSR region for details. + enum: [ ctrl ] - description: See native 'elbi/app' CSR region for details. enum: [ apb, mgmt, link, ulreg, appl ] - description: See native 'atu' CSR region for details. @@ -117,7 +119,7 @@ properties: const: slcr allOf: - contains: - const: dbi + enum: [ dbi, ctrl ] - contains: const: config -- cgit v1.2.3 From d63dbfc6f27de1dd5741107db07b585d344676ee Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 4 Apr 2025 17:15:57 -0500 Subject: dt-bindings: PCI: Remove obsolete .txt docs The content in these files has been moved to the schemas in dtschema. pci.txt is covered by pci-bus-common.yaml and pci-host-bridge.yaml. pci-iommu.txt is covered by pci-iommu.yaml. pci-msi.txt is covered in msi-map property in pci-host-bridge.yaml. Signed-off-by: Rob Herring (Arm) Signed-off-by: Manivannan Sadhasivam Reviewed-by: Frank Li Cc: Frank Li Link: https://patch.msgid.link/20250404221559.552201-1-robh@kernel.org --- .../bindings/pci/nvidia,tegra194-pcie-ep.yaml | 2 +- .../devicetree/bindings/pci/pci-iommu.txt | 171 ---------------- Documentation/devicetree/bindings/pci/pci-msi.txt | 220 --------------------- Documentation/devicetree/bindings/pci/pci.txt | 84 -------- 4 files changed, 1 insertion(+), 476 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pci/pci-iommu.txt delete mode 100644 Documentation/devicetree/bindings/pci/pci-msi.txt delete mode 100644 Documentation/devicetree/bindings/pci/pci.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml index a24fb8307d29..6d6052a2748f 100644 --- a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml @@ -74,7 +74,7 @@ properties: reset-gpios: description: Must contain a phandle to a GPIO controller followed by GPIO - that is being used as PERST input signal. Please refer to pci.txt. + that is being used as PERST input signal. phys: minItems: 1 diff --git a/Documentation/devicetree/bindings/pci/pci-iommu.txt b/Documentation/devicetree/bindings/pci/pci-iommu.txt deleted file mode 100644 index 0def586fdcdf..000000000000 --- a/Documentation/devicetree/bindings/pci/pci-iommu.txt +++ /dev/null @@ -1,171 +0,0 @@ -This document describes the generic device tree binding for describing the -relationship between PCI(e) devices and IOMMU(s). - -Each PCI(e) device under a root complex is uniquely identified by its Requester -ID (AKA RID). A Requester ID is a triplet of a Bus number, Device number, and -Function number. - -For the purpose of this document, when treated as a numeric value, a RID is -formatted such that: - -* Bits [15:8] are the Bus number. -* Bits [7:3] are the Device number. -* Bits [2:0] are the Function number. -* Any other bits required for padding must be zero. - -IOMMUs may distinguish PCI devices through sideband data derived from the -Requester ID. While a given PCI device can only master through one IOMMU, a -root complex may split masters across a set of IOMMUs (e.g. with one IOMMU per -bus). - -The generic 'iommus' property is insufficient to describe this relationship, -and a mechanism is required to map from a PCI device to its IOMMU and sideband -data. - -For generic IOMMU bindings, see -Documentation/devicetree/bindings/iommu/iommu.txt. - - -PCI root complex -================ - -Optional properties -------------------- - -- iommu-map: Maps a Requester ID to an IOMMU and associated IOMMU specifier - data. - - The property is an arbitrary number of tuples of - (rid-base,iommu,iommu-base,length). - - Any RID r in the interval [rid-base, rid-base + length) is associated with - the listed IOMMU, with the IOMMU specifier (r - rid-base + iommu-base). - -- iommu-map-mask: A mask to be applied to each Requester ID prior to being - mapped to an IOMMU specifier per the iommu-map property. - - -Example (1) -=========== - -/ { - #address-cells = <1>; - #size-cells = <1>; - - iommu: iommu@a { - reg = <0xa 0x1>; - compatible = "vendor,some-iommu"; - #iommu-cells = <1>; - }; - - pci: pci@f { - reg = <0xf 0x1>; - compatible = "vendor,pcie-root-complex"; - device_type = "pci"; - - /* - * The sideband data provided to the IOMMU is the RID, - * identity-mapped. - */ - iommu-map = <0x0 &iommu 0x0 0x10000>; - }; -}; - - -Example (2) -=========== - -/ { - #address-cells = <1>; - #size-cells = <1>; - - iommu: iommu@a { - reg = <0xa 0x1>; - compatible = "vendor,some-iommu"; - #iommu-cells = <1>; - }; - - pci: pci@f { - reg = <0xf 0x1>; - compatible = "vendor,pcie-root-complex"; - device_type = "pci"; - - /* - * The sideband data provided to the IOMMU is the RID with the - * function bits masked out. - */ - iommu-map = <0x0 &iommu 0x0 0x10000>; - iommu-map-mask = <0xfff8>; - }; -}; - - -Example (3) -=========== - -/ { - #address-cells = <1>; - #size-cells = <1>; - - iommu: iommu@a { - reg = <0xa 0x1>; - compatible = "vendor,some-iommu"; - #iommu-cells = <1>; - }; - - pci: pci@f { - reg = <0xf 0x1>; - compatible = "vendor,pcie-root-complex"; - device_type = "pci"; - - /* - * The sideband data provided to the IOMMU is the RID, - * but the high bits of the bus number are flipped. - */ - iommu-map = <0x0000 &iommu 0x8000 0x8000>, - <0x8000 &iommu 0x0000 0x8000>; - }; -}; - - -Example (4) -=========== - -/ { - #address-cells = <1>; - #size-cells = <1>; - - iommu_a: iommu@a { - reg = <0xa 0x1>; - compatible = "vendor,some-iommu"; - #iommu-cells = <1>; - }; - - iommu_b: iommu@b { - reg = <0xb 0x1>; - compatible = "vendor,some-iommu"; - #iommu-cells = <1>; - }; - - iommu_c: iommu@c { - reg = <0xc 0x1>; - compatible = "vendor,some-iommu"; - #iommu-cells = <1>; - }; - - pci: pci@f { - reg = <0xf 0x1>; - compatible = "vendor,pcie-root-complex"; - device_type = "pci"; - - /* - * Devices with bus number 0-127 are mastered via IOMMU - * a, with sideband data being RID[14:0]. - * Devices with bus number 128-255 are mastered via - * IOMMU b, with sideband data being RID[14:0]. - * No devices master via IOMMU c. - */ - iommu-map = <0x0000 &iommu_a 0x0000 0x8000>, - <0x8000 &iommu_b 0x0000 0x8000>; - }; -}; diff --git a/Documentation/devicetree/bindings/pci/pci-msi.txt b/Documentation/devicetree/bindings/pci/pci-msi.txt deleted file mode 100644 index b73d839657b6..000000000000 --- a/Documentation/devicetree/bindings/pci/pci-msi.txt +++ /dev/null @@ -1,220 +0,0 @@ -This document describes the generic device tree binding for describing the -relationship between PCI devices and MSI controllers. - -Each PCI device under a root complex is uniquely identified by its Requester ID -(AKA RID). A Requester ID is a triplet of a Bus number, Device number, and -Function number. - -For the purpose of this document, when treated as a numeric value, a RID is -formatted such that: - -* Bits [15:8] are the Bus number. -* Bits [7:3] are the Device number. -* Bits [2:0] are the Function number. -* Any other bits required for padding must be zero. - -MSIs may be distinguished in part through the use of sideband data accompanying -writes. In the case of PCI devices, this sideband data may be derived from the -Requester ID. A mechanism is required to associate a device with both the MSI -controllers it can address, and the sideband data that will be associated with -its writes to those controllers. - -For generic MSI bindings, see -Documentation/devicetree/bindings/interrupt-controller/msi.txt. - - -PCI root complex -================ - -Optional properties -------------------- - -- msi-map: Maps a Requester ID to an MSI controller and associated - msi-specifier data. The property is an arbitrary number of tuples of - (rid-base,msi-controller,msi-base,length), where: - - * rid-base is a single cell describing the first RID matched by the entry. - - * msi-controller is a single phandle to an MSI controller - - * msi-base is an msi-specifier describing the msi-specifier produced for the - first RID matched by the entry. - - * length is a single cell describing how many consecutive RIDs are matched - following the rid-base. - - Any RID r in the interval [rid-base, rid-base + length) is associated with - the listed msi-controller, with the msi-specifier (r - rid-base + msi-base). - -- msi-map-mask: A mask to be applied to each Requester ID prior to being mapped - to an msi-specifier per the msi-map property. - -- msi-parent: Describes the MSI parent of the root complex itself. Where - the root complex and MSI controller do not pass sideband data with MSI - writes, this property may be used to describe the MSI controller(s) - used by PCI devices under the root complex, if defined as such in the - binding for the root complex. - - -Example (1) -=========== - -/ { - #address-cells = <1>; - #size-cells = <1>; - - msi: msi-controller@a { - reg = <0xa 0x1>; - compatible = "vendor,some-controller"; - msi-controller; - #msi-cells = <1>; - }; - - pci: pci@f { - reg = <0xf 0x1>; - compatible = "vendor,pcie-root-complex"; - device_type = "pci"; - - /* - * The sideband data provided to the MSI controller is - * the RID, identity-mapped. - */ - msi-map = <0x0 &msi_a 0x0 0x10000>, - }; -}; - - -Example (2) -=========== - -/ { - #address-cells = <1>; - #size-cells = <1>; - - msi: msi-controller@a { - reg = <0xa 0x1>; - compatible = "vendor,some-controller"; - msi-controller; - #msi-cells = <1>; - }; - - pci: pci@f { - reg = <0xf 0x1>; - compatible = "vendor,pcie-root-complex"; - device_type = "pci"; - - /* - * The sideband data provided to the MSI controller is - * the RID, masked to only the device and function bits. - */ - msi-map = <0x0 &msi_a 0x0 0x100>, - msi-map-mask = <0xff> - }; -}; - - -Example (3) -=========== - -/ { - #address-cells = <1>; - #size-cells = <1>; - - msi: msi-controller@a { - reg = <0xa 0x1>; - compatible = "vendor,some-controller"; - msi-controller; - #msi-cells = <1>; - }; - - pci: pci@f { - reg = <0xf 0x1>; - compatible = "vendor,pcie-root-complex"; - device_type = "pci"; - - /* - * The sideband data provided to the MSI controller is - * the RID, but the high bit of the bus number is - * ignored. - */ - msi-map = <0x0000 &msi 0x0000 0x8000>, - <0x8000 &msi 0x0000 0x8000>; - }; -}; - - -Example (4) -=========== - -/ { - #address-cells = <1>; - #size-cells = <1>; - - msi: msi-controller@a { - reg = <0xa 0x1>; - compatible = "vendor,some-controller"; - msi-controller; - #msi-cells = <1>; - }; - - pci: pci@f { - reg = <0xf 0x1>; - compatible = "vendor,pcie-root-complex"; - device_type = "pci"; - - /* - * The sideband data provided to the MSI controller is - * the RID, but the high bit of the bus number is - * negated. - */ - msi-map = <0x0000 &msi 0x8000 0x8000>, - <0x8000 &msi 0x0000 0x8000>; - }; -}; - - -Example (5) -=========== - -/ { - #address-cells = <1>; - #size-cells = <1>; - - msi_a: msi-controller@a { - reg = <0xa 0x1>; - compatible = "vendor,some-controller"; - msi-controller; - #msi-cells = <1>; - }; - - msi_b: msi-controller@b { - reg = <0xb 0x1>; - compatible = "vendor,some-controller"; - msi-controller; - #msi-cells = <1>; - }; - - msi_c: msi-controller@c { - reg = <0xc 0x1>; - compatible = "vendor,some-controller"; - msi-controller; - #msi-cells = <1>; - }; - - pci: pci@f { - reg = <0xf 0x1>; - compatible = "vendor,pcie-root-complex"; - device_type = "pci"; - - /* - * The sideband data provided to MSI controller a is the - * RID, but the high bit of the bus number is negated. - * The sideband data provided to MSI controller b is the - * RID, identity-mapped. - * MSI controller c is not addressable. - */ - msi-map = <0x0000 &msi_a 0x8000 0x08000>, - <0x8000 &msi_a 0x0000 0x08000>, - <0x0000 &msi_b 0x0000 0x10000>; - }; -}; diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt deleted file mode 100644 index 6a8f2874a24d..000000000000 --- a/Documentation/devicetree/bindings/pci/pci.txt +++ /dev/null @@ -1,84 +0,0 @@ -PCI bus bridges have standardized Device Tree bindings: - -PCI Bus Binding to: IEEE Std 1275-1994 -https://www.devicetree.org/open-firmware/bindings/pci/pci2_1.pdf - -And for the interrupt mapping part: - -Open Firmware Recommended Practice: Interrupt Mapping -https://www.devicetree.org/open-firmware/practice/imap/imap0_9d.pdf - -Additionally to the properties specified in the above standards a host bridge -driver implementation may support the following properties: - -- linux,pci-domain: - If present this property assigns a fixed PCI domain number to a host bridge, - otherwise an unstable (across boots) unique number will be assigned. - It is required to either not set this property at all or set it for all - host bridges in the system, otherwise potentially conflicting domain numbers - may be assigned to root buses behind different host bridges. The domain - number for each host bridge in the system must be unique. -- max-link-speed: - If present this property specifies PCI gen for link capability. Host - drivers could add this as a strategy to avoid unnecessary operation for - unsupported link speed, for instance, trying to do training for - unsupported link speed, etc. Must be '4' for gen4, '3' for gen3, '2' - for gen2, and '1' for gen1. Any other values are invalid. -- reset-gpios: - If present this property specifies PERST# GPIO. Host drivers can parse the - GPIO and apply fundamental reset to endpoints. -- supports-clkreq: - If present this property specifies that CLKREQ signal routing exists from - root port to downstream device and host bridge drivers can do programming - which depends on CLKREQ signal existence. For example, programming root port - not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal. - -PCI-PCI Bridge properties -------------------------- - -PCIe root ports and switch ports may be described explicitly in the device -tree, as children of the host bridge node. Even though those devices are -discoverable by probing, it might be necessary to describe properties that -aren't provided by standard PCIe capabilities. - -Required properties: - -- reg: - Identifies the PCI-PCI bridge. As defined in the IEEE Std 1275-1994 - document, it is a five-cell address encoded as (phys.hi phys.mid - phys.lo size.hi size.lo). phys.hi should contain the device's BDF as - 0b00000000 bbbbbbbb dddddfff 00000000. The other cells should be zero. - - The bus number is defined by firmware, through the standard bridge - configuration mechanism. If this port is a switch port, then firmware - allocates the bus number and writes it into the Secondary Bus Number - register of the bridge directly above this port. Otherwise, the bus - number of a root port is the first number in the bus-range property, - defaulting to zero. - - If firmware leaves the ARI Forwarding Enable bit set in the bridge - above this port, then phys.hi contains the 8-bit function number as - 0b00000000 bbbbbbbb ffffffff 00000000. Note that the PCIe specification - recommends that firmware only leaves ARI enabled when it knows that the - OS is ARI-aware. - -Optional properties: - -- external-facing: - When present, the port is external-facing. All bridges and endpoints - downstream of this port are external to the machine. The OS can, for - example, use this information to identify devices that cannot be - trusted with relaxed DMA protection, as users could easily attach - malicious devices to this port. - -Example: - -pcie@10000000 { - compatible = "pci-host-ecam-generic"; - ... - pcie@0008 { - /* Root port 00:01.0 is external-facing */ - reg = <0x00000800 0 0 0 0>; - external-facing; - }; -}; -- cgit v1.2.3 From b649d91322e65f9ea455da58c54b353826dc2dd5 Mon Sep 17 00:00:00 2001 From: Nitheesh Sekar Date: Wed, 26 Mar 2025 12:10:57 +0400 Subject: dt-bindings: PCI: qcom: Add IPQ5018 SoC Add support for the PCIe controller on the Qualcomm IPQ5108 SoC to the bindings. Signed-off-by: Nitheesh Sekar Signed-off-by: Sricharan Ramabadhran Signed-off-by: George Moussalem Signed-off-by: Manivannan Sadhasivam Reviewed-by: Krzysztof Kozlowski Acked-by: Manivannan Sadhasivam Link: https://patch.msgid.link/20250326-ipq5018-pcie-v7-3-e1828fef06c9@outlook.com --- .../devicetree/bindings/pci/qcom,pcie.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 8f628939209e..b1643c079429 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -21,6 +21,7 @@ properties: - qcom,pcie-apq8064 - qcom,pcie-apq8084 - qcom,pcie-ipq4019 + - qcom,pcie-ipq5018 - qcom,pcie-ipq6018 - qcom,pcie-ipq8064 - qcom,pcie-ipq8064-v2 @@ -168,6 +169,7 @@ allOf: compatible: contains: enum: + - qcom,pcie-ipq5018 - qcom,pcie-ipq6018 - qcom,pcie-ipq8074-gen3 - qcom,pcie-ipq9574 @@ -322,6 +324,53 @@ allOf: - const: ahb # AHB reset - const: phy_ahb # PHY AHB reset + - if: + properties: + compatible: + contains: + enum: + - qcom,pcie-ipq5018 + then: + properties: + clocks: + minItems: 6 + maxItems: 6 + clock-names: + items: + - const: iface # PCIe to SysNOC BIU clock + - const: axi_m # AXI Master clock + - const: axi_s # AXI Slave clock + - const: ahb # AHB clock + - const: aux # Auxiliary clock + - const: axi_bridge # AXI bridge clock + resets: + minItems: 8 + maxItems: 8 + reset-names: + items: + - const: pipe # PIPE reset + - const: sleep # Sleep reset + - const: sticky # Core sticky reset + - const: axi_m # AXI master reset + - const: axi_s # AXI slave reset + - const: ahb # AHB reset + - const: axi_m_sticky # AXI master sticky reset + - const: axi_s_sticky # AXI slave sticky reset + interrupts: + minItems: 9 + maxItems: 9 + interrupt-names: + items: + - const: msi0 + - const: msi1 + - const: msi2 + - const: msi3 + - const: msi4 + - const: msi5 + - const: msi6 + - const: msi7 + - const: global + - if: properties: compatible: @@ -562,6 +611,7 @@ allOf: enum: - qcom,pcie-apq8064 - qcom,pcie-ipq4019 + - qcom,pcie-ipq5018 - qcom,pcie-ipq8064 - qcom,pcie-ipq8064v2 - qcom,pcie-ipq8074 -- cgit v1.2.3 From b5c48210341129db7158703c00e4d2155f4cf0f3 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 10 Apr 2025 16:39:42 +0200 Subject: dt-bindings: power: mediatek: Support Dimensity 1200 MT6893 MTCMOS Add support for the Power Domains (MTCMOS) integrated into the MediaTek Dimensity 1200 (MT6893) SoC. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250410143944.475773-2-angelogioacchino.delregno@collabora.com Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/power/mediatek,power-controller.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml index 591a080ca3ff..9c7cc632abee 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -25,6 +25,7 @@ properties: enum: - mediatek,mt6735-power-controller - mediatek,mt6795-power-controller + - mediatek,mt6893-power-controller - mediatek,mt8167-power-controller - mediatek,mt8173-power-controller - mediatek,mt8183-power-controller @@ -88,6 +89,7 @@ $defs: description: | Power domain index. Valid values are defined in: "include/dt-bindings/power/mt6795-power.h" - for MT8167 type power domain. + "include/dt-bindings/power/mediatek,mt6893-power.h" - for MT6893 type power domain. "include/dt-bindings/power/mt8167-power.h" - for MT8167 type power domain. "include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain. "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain. -- cgit v1.2.3 From c6650433eaa9331b8b9e44a6ae19ad2e4dae5ba8 Mon Sep 17 00:00:00 2001 From: Yixun Lan Date: Wed, 16 Apr 2025 08:15:27 +0800 Subject: dt-bindings: pinctrl: spacemit: add clock and reset property SpacemiT K1 SoC's pinctrl controller requires two clocks in order to work properly, also has one reset line from hardware perspective. Signed-off-by: Yixun Lan Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/20250416-02-k1-pinctrl-clk-v2-1-2b5fcbd4183c@gentoo.org Signed-off-by: Linus Walleij --- .../bindings/pinctrl/spacemit,k1-pinctrl.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/spacemit,k1-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/spacemit,k1-pinctrl.yaml index b01ecd83b71b..d80e88aa07b4 100644 --- a/Documentation/devicetree/bindings/pinctrl/spacemit,k1-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/spacemit,k1-pinctrl.yaml @@ -17,6 +17,19 @@ properties: items: - description: pinctrl io memory base + clocks: + items: + - description: Functional Clock + - description: Bus Clock + + clock-names: + items: + - const: func + - const: bus + + resets: + maxItems: 1 + patternProperties: '-cfg$': type: object @@ -94,6 +107,8 @@ patternProperties: required: - compatible - reg + - clocks + - clock-names additionalProperties: false @@ -108,6 +123,9 @@ examples: pinctrl@d401e000 { compatible = "spacemit,k1-pinctrl"; reg = <0x0 0xd401e000 0x0 0x400>; + clocks = <&syscon_apbc 42>, + <&syscon_apbc 94>; + clock-names = "func", "bus"; uart0_2_cfg: uart0-2-cfg { uart0-2-pins { -- cgit v1.2.3 From f6e9968aeb200aa6d399ac73338174b394677049 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Tue, 8 Apr 2025 20:31:57 +0100 Subject: media: dt-bindings: media: renesas,vsp1: Document RZ/V2H(P) The VSPD block on the RZ/V2H(P) SoC is identical to the one found on the RZ/G2L SoC. No driver changes are required, as `renesas,r9a07g044-vsp2` will be used as a fallback compatible string on the RZ/V2H(P) SoC. Signed-off-by: Lad Prabhakar Acked-by: Krzysztof Kozlowski Reviewed-by: Laurent Pinchart Link: https://lore.kernel.org/r/20250408193158.80936-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/renesas,vsp1.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml index 1a03e67462a4..9d03b972f522 100644 --- a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml +++ b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml @@ -25,6 +25,7 @@ properties: - enum: - renesas,r9a07g043u-vsp2 # RZ/G2UL - renesas,r9a07g054-vsp2 # RZ/V2L + - renesas,r9a09g057-vsp2 # RZ/V2H(P) - const: renesas,r9a07g044-vsp2 # RZ/G2L fallback reg: -- cgit v1.2.3 From 079afc0b7241e383cf61e5ede906104d85f7a6cb Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Tue, 8 Apr 2025 20:31:58 +0100 Subject: media: dt-bindings: media: renesas,fcp: Document RZ/V2H(P) SoC The FCPVD block on the RZ/V2H(P) SoC is identical to the one found on the RZ/G2L SoC. No driver changes are required, as `renesas,fcpv` will be used as a fallback compatible string on the RZ/V2H(P) SoC. Signed-off-by: Lad Prabhakar Acked-by: Krzysztof Kozlowski Reviewed-by: Laurent Pinchart Link: https://lore.kernel.org/r/20250408193158.80936-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/renesas,fcp.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/renesas,fcp.yaml b/Documentation/devicetree/bindings/media/renesas,fcp.yaml index f94dacd96278..5ed9427fb757 100644 --- a/Documentation/devicetree/bindings/media/renesas,fcp.yaml +++ b/Documentation/devicetree/bindings/media/renesas,fcp.yaml @@ -30,6 +30,7 @@ properties: - renesas,r9a07g043u-fcpvd # RZ/G2UL - renesas,r9a07g044-fcpvd # RZ/G2{L,LC} - renesas,r9a07g054-fcpvd # RZ/V2L + - renesas,r9a09g057-fcpvd # RZ/V2H(P) - const: renesas,fcpv # Generic FCP for VSP fallback reg: @@ -66,6 +67,7 @@ allOf: - renesas,r9a07g043u-fcpvd - renesas,r9a07g044-fcpvd - renesas,r9a07g054-fcpvd + - renesas,r9a09g057-fcpvd then: properties: clocks: -- cgit v1.2.3 From 52e39050616aa7e72ea0f6330501368d5f6925e1 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Fri, 11 Apr 2025 19:05:29 +0200 Subject: media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/V2H(P) SoC The MIPI CSI-2 block on the Renesas RZ/V2H(P) SoC is similar to the one found on the Renesas RZ/G2L SoC, with the following differences: - A different D-PHY - Additional registers for the MIPI CSI-2 link - Only two clocks Add a new compatible string, `renesas,r9a09g057-csi2`, for the RZ/V2H(P) SoC. Reviewed-by: Rob Herring (Arm) Reviewed-by: Laurent Pinchart Signed-off-by: Lad Prabhakar Signed-off-by: Tommaso Merciai Link: https://lore.kernel.org/r/20250411170624.472257-2-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- .../bindings/media/renesas,rzg2l-csi2.yaml | 59 ++++++++++++++++------ 1 file changed, 44 insertions(+), 15 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml b/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml index 7faa12fecd5b..1f9ee37584b3 100644 --- a/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml +++ b/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml @@ -17,12 +17,14 @@ description: properties: compatible: - items: - - enum: - - renesas,r9a07g043-csi2 # RZ/G2UL - - renesas,r9a07g044-csi2 # RZ/G2{L,LC} - - renesas,r9a07g054-csi2 # RZ/V2L - - const: renesas,rzg2l-csi2 + oneOf: + - items: + - enum: + - renesas,r9a07g043-csi2 # RZ/G2UL + - renesas,r9a07g044-csi2 # RZ/G2{L,LC} + - renesas,r9a07g054-csi2 # RZ/V2L + - const: renesas,rzg2l-csi2 + - const: renesas,r9a09g057-csi2 # RZ/V2H(P) reg: maxItems: 1 @@ -31,16 +33,24 @@ properties: maxItems: 1 clocks: - items: - - description: Internal clock for connecting CRU and MIPI - - description: CRU Main clock - - description: CRU Register access clock + oneOf: + - items: + - description: Internal clock for connecting CRU and MIPI + - description: CRU Main clock + - description: CRU Register access clock + - items: + - description: CRU Main clock + - description: CRU Register access clock clock-names: - items: - - const: system - - const: video - - const: apb + oneOf: + - items: + - const: system + - const: video + - const: apb + - items: + - const: video + - const: apb power-domains: maxItems: 1 @@ -48,7 +58,7 @@ properties: resets: items: - description: CRU_PRESETN reset terminal - - description: CRU_CMN_RSTB reset terminal + - description: D-PHY reset (CRU_CMN_RSTB or CRU_n_S_RESETN) reset-names: items: @@ -101,6 +111,25 @@ required: - reset-names - ports +allOf: + - if: + properties: + compatible: + contains: + const: renesas,r9a09g057-csi2 + then: + properties: + clocks: + maxItems: 2 + clock-names: + maxItems: 2 + else: + properties: + clocks: + minItems: 3 + clock-names: + minItems: 3 + additionalProperties: false examples: -- cgit v1.2.3 From f1c83d2f2841e99f884104e912aa20fcc32b9c2d Mon Sep 17 00:00:00 2001 From: Tommaso Merciai Date: Fri, 11 Apr 2025 19:05:30 +0200 Subject: media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/G3E CSI-2 block Document the CSI-2 block which is part of CRU found in Renesas RZ/G3E SoC. The CSI-2 block on the RZ/G3E SoC is identical to one found on the RZ/V2H(P) SoC. Acked-by: Rob Herring (Arm) Reviewed-by: Lad Prabhakar Reviewed-by: Laurent Pinchart Signed-off-by: Tommaso Merciai Link: https://lore.kernel.org/r/20250411170624.472257-3-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml b/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml index 1f9ee37584b3..c5c511c9f0db 100644 --- a/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml +++ b/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml @@ -24,6 +24,9 @@ properties: - renesas,r9a07g044-csi2 # RZ/G2{L,LC} - renesas,r9a07g054-csi2 # RZ/V2L - const: renesas,rzg2l-csi2 + - items: + - const: renesas,r9a09g047-csi2 # RZ/G3E + - const: renesas,r9a09g057-csi2 - const: renesas,r9a09g057-csi2 # RZ/V2H(P) reg: -- cgit v1.2.3 From d71be5add2f3fd4e11c11a21855df17c48088fc2 Mon Sep 17 00:00:00 2001 From: Tommaso Merciai Date: Fri, 11 Apr 2025 19:05:31 +0200 Subject: media: dt-bindings: renesas,rzg2l-cru: Document Renesas RZ/G3E SoC The CRU block found on the Renesas RZ/G3E ("R9A09G047") SoC has five interrupts: - image_conv: image_conv irq - axi_mst_err: AXI master error level irq - vd_addr_wend: Video data AXI master addr 0 write end irq - sd_addr_wend: Statistics data AXI master addr 0 write end irq - vsd_addr_wend: Video statistics data AXI master addr 0 write end irq This IP has only one input port 'port@1' similar to the RZ/G2UL CRU. Document the CRU block found on the Renesas RZ/G3E ("R9A09G047") SoC. Reviewed-by: Rob Herring (Arm) Signed-off-by: Tommaso Merciai Link: https://lore.kernel.org/r/20250411170624.472257-4-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- .../bindings/media/renesas,rzg2l-cru.yaml | 65 ++++++++++++++++++---- 1 file changed, 54 insertions(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml b/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml index bc1245127025..47e18690fa57 100644 --- a/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml +++ b/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml @@ -17,24 +17,43 @@ description: properties: compatible: - items: - - enum: - - renesas,r9a07g043-cru # RZ/G2UL - - renesas,r9a07g044-cru # RZ/G2{L,LC} - - renesas,r9a07g054-cru # RZ/V2L - - const: renesas,rzg2l-cru + oneOf: + - items: + - enum: + - renesas,r9a07g043-cru # RZ/G2UL + - renesas,r9a07g044-cru # RZ/G2{L,LC} + - renesas,r9a07g054-cru # RZ/V2L + - const: renesas,rzg2l-cru + - const: renesas,r9a09g047-cru # RZ/G3E reg: maxItems: 1 interrupts: - maxItems: 3 + oneOf: + - items: + - description: CRU Interrupt for image_conv + - description: CRU Interrupt for image_conv_err + - description: CRU AXI master error interrupt + - items: + - description: CRU Interrupt for image_conv + - description: CRU AXI master error interrupt + - description: CRU Video Data AXI Master Address 0 Write End interrupt + - description: CRU Statistics data AXI master addr 0 write end interrupt + - description: CRU Video statistics data AXI master addr 0 write end interrupt interrupt-names: - items: - - const: image_conv - - const: image_conv_err - - const: axi_mst_err + oneOf: + - items: + - const: image_conv + - const: image_conv_err + - const: axi_mst_err + - items: + - const: image_conv + - const: axi_mst_err + - const: vd_addr_wend + - const: sd_addr_wend + - const: vsd_addr_wend clocks: items: @@ -109,6 +128,10 @@ allOf: - renesas,r9a07g054-cru then: properties: + interrupts: + maxItems: 3 + interrupt-names: + maxItems: 3 ports: required: - port@0 @@ -122,10 +145,30 @@ allOf: - renesas,r9a07g043-cru then: properties: + interrupts: + maxItems: 3 + interrupt-names: + maxItems: 3 ports: properties: port@0: false + required: + - port@1 + - if: + properties: + compatible: + contains: + const: renesas,r9a09g047-cru + then: + properties: + interrupts: + minItems: 5 + interrupt-names: + minItems: 5 + ports: + properties: + port@0: false required: - port@1 -- cgit v1.2.3 From 278114ccfdd51a83282d9a574c8a3b01b32e185b Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 17 Apr 2025 11:21:57 -0400 Subject: dt-bindings: pinctrl: convert fsl,imx7ulp-pinctrl.txt to yaml format Convert fsl,imx7ulp-pinctrl.txt to yaml format. Additional changes: - remove label in example - fsl,pin direct use hex value instead of macro because macro define in dts local directory. Signed-off-by: Frank Li Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/20250417152158.3570936-1-Frank.Li@nxp.com Signed-off-by: Linus Walleij --- .../bindings/pinctrl/fsl,imx7ulp-iomuxc1.yaml | 99 ++++++++++++++++++++++ .../bindings/pinctrl/fsl,imx7ulp-pinctrl.txt | 53 ------------ 2 files changed, 99 insertions(+), 53 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx7ulp-iomuxc1.yaml delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx7ulp-pinctrl.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx7ulp-iomuxc1.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx7ulp-iomuxc1.yaml new file mode 100644 index 000000000000..957918b73a93 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx7ulp-iomuxc1.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/fsl,imx7ulp-iomuxc1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX7ULP IOMUX Controller + +description: | + i.MX 7ULP has three IOMUXC instances: IOMUXC0 for M4 ports, IOMUXC1 for A7 + ports and IOMUXC DDR for DDR interface. + + Note: This binding doc is only for the IOMUXC1 support in A7 Domain and it + only supports generic pin config. + + Please refer to fsl,imx-pinctrl.txt in this directory for common binding + part and usage. + +maintainers: + - Frank Li + +properties: + compatible: + const: fsl,imx7ulp-iomuxc1 + + reg: + maxItems: 1 + +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + fsl,pins: + description: + Each entry consists of 5 integers which represents the mux + and config setting for one pin. The first 4 integers + are specified + using a PIN_FUNC_ID macro, which can be found in + imx7ulp-pinfunc.h in the device tree source folder. + The last integer CONFIG is the pad setting value like + pull-up on this pin. + + Please refer to i.MX7ULP Reference Manual for detailed + CONFIG settings. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: | + "mux_conf_reg" indicates the offset of mux register. + - description: | + "input_reg" indicates the offset of select input register. + - description: | + "mux_mode" indicates the mux value to be applied. + - description: | + "input_val" indicates the select input value to be applied. + - description: | + CONFIG bits definition: + PAD_CTL_OBE (1 << 17) + PAD_CTL_IBE (1 << 16) + PAD_CTL_LK (1 << 16) + PAD_CTL_DSE_HI (1 << 6) + PAD_CTL_DSE_STD (0 << 6) + PAD_CTL_ODE (1 << 5) + PAD_CTL_PUSH_PULL (0 << 5) + PAD_CTL_SRE_SLOW (1 << 2) + PAD_CTL_SRE_STD (0 << 2) + PAD_CTL_PE (1 << 0) + + required: + - fsl,pins + + additionalProperties: false + +required: + - compatible + - reg + +allOf: + - $ref: pinctrl.yaml# + +unevaluatedProperties: false + +examples: + - | + pinctrl@40ac0000 { + compatible = "fsl,imx7ulp-iomuxc1"; + reg = <0x40ac0000 0x1000>; + + lpuart4grp { + fsl,pins = < + 0x000c 0x0248 0x4 0x1 0x1 + 0x0008 0x024c 0x4 0x1 0x1 + >; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx7ulp-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx7ulp-pinctrl.txt deleted file mode 100644 index bfa3703a7446..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx7ulp-pinctrl.txt +++ /dev/null @@ -1,53 +0,0 @@ -* Freescale i.MX7ULP IOMUX Controller - -i.MX 7ULP has three IOMUXC instances: IOMUXC0 for M4 ports, IOMUXC1 for A7 -ports and IOMUXC DDR for DDR interface. - -Note: -This binding doc is only for the IOMUXC1 support in A7 Domain and it only -supports generic pin config. - -Please refer to fsl,imx-pinctrl.txt in this directory for common binding -part and usage. - -Required properties: -- compatible: "fsl,imx7ulp-iomuxc1". -- fsl,pins: Each entry consists of 5 integers which represents the mux - and config setting for one pin. The first 4 integers - are specified - using a PIN_FUNC_ID macro, which can be found in - imx7ulp-pinfunc.h in the device tree source folder. - The last integer CONFIG is the pad setting value like - pull-up on this pin. - - Please refer to i.MX7ULP Reference Manual for detailed - CONFIG settings. - -CONFIG bits definition: -PAD_CTL_OBE (1 << 17) -PAD_CTL_IBE (1 << 16) -PAD_CTL_LK (1 << 16) -PAD_CTL_DSE_HI (1 << 6) -PAD_CTL_DSE_STD (0 << 6) -PAD_CTL_ODE (1 << 5) -PAD_CTL_PUSH_PULL (0 << 5) -PAD_CTL_SRE_SLOW (1 << 2) -PAD_CTL_SRE_STD (0 << 2) -PAD_CTL_PE (1 << 0) - -Examples: -#include "imx7ulp-pinfunc.h" - -/* Pin Controller Node */ -iomuxc1: pinctrl@40ac0000 { - compatible = "fsl,imx7ulp-iomuxc1"; - reg = <0x40ac0000 0x1000>; - - /* Pin Configuration Node */ - pinctrl_lpuart4: lpuart4grp { - fsl,pins = < - IMX7ULP_PAD_PTC3__LPUART4_RX 0x1 - IMX7ULP_PAD_PTC2__LPUART4_TX 0x1 - >; - }; -}; -- cgit v1.2.3 From 2798cf48d2670487f7ee22dfc5f31c07d0d3b135 Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Tue, 15 Apr 2025 11:23:13 +0800 Subject: dt-bindings: power: rockchip: Add support for RK3562 SoC According to a description from TRM, add all the power domains. Signed-off-by: Finley Xiao Signed-off-by: Kever Yang Reviewed-by: Heiko Stuebner Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250415032314.44997-1-kever.yang@rock-chips.com Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/power/rockchip,power-controller.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml index ebab98987e49..f494b7710c09 100644 --- a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml @@ -40,6 +40,7 @@ properties: - rockchip,rk3366-power-controller - rockchip,rk3368-power-controller - rockchip,rk3399-power-controller + - rockchip,rk3562-power-controller - rockchip,rk3568-power-controller - rockchip,rk3576-power-controller - rockchip,rk3588-power-controller -- cgit v1.2.3 From 5c0a44c40517bab5192f1aaabe3457b0e15ac0af Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Thu, 27 Mar 2025 02:47:03 +0100 Subject: dt-bindings: soc: qcom,rpmh-rsc: Limit power-domains requirement Certain platforms (such as Chrome SDM845 and SC7180 with a TF-A running as secure firmware) do not have a OSI-mode capable PSCI implementation. That in turn means the PSCI-associated power domain which represents the system's power state can't provide enough feedback to the RSC device. Don't require power-domains on platforms where this may be the case. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-1-b763d958545f@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- .../bindings/soc/qcom/qcom,rpmh-rsc.yaml | 24 ++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml index af632d0e0355..036562eb5140 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml @@ -44,7 +44,13 @@ description: | properties: compatible: - const: qcom,rpmh-rsc + oneOf: + - items: + - enum: + - qcom,sc7180-rpmh-apps-rsc + - qcom,sdm845-rpmh-apps-rsc + - const: qcom,rpmh-rsc + - const: qcom,rpmh-rsc interrupts: minItems: 1 @@ -124,7 +130,21 @@ required: - qcom,tcs-offset - reg - reg-names - - power-domains + +allOf: + # Some platforms may lack a OSI-mode PSCI implementation, which implies the + # system power domain can't provide feedback about entering power collapse + - if: + not: + properties: + compatible: + contains: + enum: + - qcom,sc7180-rpmh-apps-rsc + - qcom,sdm845-rpmh-apps-rsc + then: + required: + - power-domains additionalProperties: false -- cgit v1.2.3 From 5965fd614b18e77c56cfefbd2d747b6b1edf1497 Mon Sep 17 00:00:00 2001 From: Kaushal Kumar Date: Wed, 23 Apr 2025 12:00:51 +0530 Subject: dt-bindings: dma: qcom,bam: Document dma-coherent property Qualcomm BAM DMA controller has DMA-coherent support so define it in the properties section. Acked-by: Rob Herring (Arm) Signed-off-by: Kaushal Kumar Link: https://lore.kernel.org/r/20250423063054.28795-3-quic_kaushalk@quicinc.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml index 3ad0d9b1fbc5..f2f87f0f545b 100644 --- a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml +++ b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml @@ -42,6 +42,8 @@ properties: interrupts: maxItems: 1 + dma-coherent: true + iommus: minItems: 1 maxItems: 6 -- cgit v1.2.3 From a9ea01f28408169431dd3e6464ed2e48539f4280 Mon Sep 17 00:00:00 2001 From: Joy Zou Date: Mon, 7 Apr 2025 12:46:35 -0400 Subject: dt-bindings: dma: fsl-edma: increase maxItems of interrupts and interrupt-names The edma controller support optional error interrupt, so update interrupts and interrupt-names's maxItems. Signed-off-by: Joy Zou Signed-off-by: Frank Li Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250407-edma_err-v2-1-9d7e5b77fcc4@nxp.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/dma/fsl,edma.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/dma/fsl,edma.yaml b/Documentation/devicetree/bindings/dma/fsl,edma.yaml index 950e8fa4f4ab..fa4248e2f1b9 100644 --- a/Documentation/devicetree/bindings/dma/fsl,edma.yaml +++ b/Documentation/devicetree/bindings/dma/fsl,edma.yaml @@ -48,11 +48,11 @@ properties: interrupts: minItems: 1 - maxItems: 64 + maxItems: 65 interrupt-names: minItems: 1 - maxItems: 64 + maxItems: 65 "#dma-cells": description: | -- cgit v1.2.3 From dede36400714b34bdaf79be2c84f540f07102554 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Mon, 24 Mar 2025 18:41:38 +0100 Subject: dt-bindings: net: Add network-class schema for mac-address properties The ethernet-controller schema specifies "mac-address" and "local-mac-address" but other network devices such as wireless network adapters use mac addresses as well. The Devicetree Specification, Release v0.3 specifies in section 4.3.1 a generic "Network Class Binding" with "address-bits", "mac-address", "local-mac-address" and "max-frame-size". This schema specifies the "address-bits" property and moves the remaining properties over from the ethernet-controller.yaml schema. The "max-frame-size" property is used to describe the maximal payload size despite its name. Keep the description from ethernet-controller specifying this property as MTU. The contradictory description in the Devicetree Specification is ignored. Signed-off-by: Janne Grunau Signed-off-by: David Heidelberg Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250324-dt-bindings-network-class-v5-1-f5c3fe00e8f0@ixit.cz Signed-off-by: Johannes Berg --- .../bindings/net/ethernet-controller.yaml | 25 +----------- .../devicetree/bindings/net/network-class.yaml | 46 ++++++++++++++++++++++ 2 files changed, 47 insertions(+), 24 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/network-class.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml index 45819b235800..c91b41b83d1d 100644 --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -16,30 +16,6 @@ properties: label: description: Human readable label on a port of a box. - local-mac-address: - description: - Specifies the MAC address that was assigned to the network device. - $ref: /schemas/types.yaml#/definitions/uint8-array - minItems: 6 - maxItems: 6 - - mac-address: - description: - Specifies the MAC address that was last used by the boot - program; should be used in cases where the MAC address assigned - to the device by the boot program is different from the - local-mac-address property. - $ref: /schemas/types.yaml#/definitions/uint8-array - minItems: 6 - maxItems: 6 - - max-frame-size: - $ref: /schemas/types.yaml#/definitions/uint32 - description: - Maximum transfer unit (IEEE defined MTU), rather than the - maximum frame size (there\'s contradiction in the Devicetree - Specification). - max-speed: $ref: /schemas/types.yaml#/definitions/uint32 description: @@ -262,6 +238,7 @@ dependencies: pcs-handle-names: [pcs-handle] allOf: + - $ref: /schemas/net/network-class.yaml# - if: properties: phy-mode: diff --git a/Documentation/devicetree/bindings/net/network-class.yaml b/Documentation/devicetree/bindings/net/network-class.yaml new file mode 100644 index 000000000000..06461fb92eb8 --- /dev/null +++ b/Documentation/devicetree/bindings/net/network-class.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/network-class.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Network Class Common Properties + +maintainers: + - Devicetree Specification Mailing List + +properties: + address-bits: + description: + Specifies number of address bits required to address the device + described by this node, e.g. size of the MAC address. + default: 48 + const: 48 + + local-mac-address: + description: + Specifies MAC address that was assigned to the network device described by + the node containing this property. + $ref: /schemas/types.yaml#/definitions/uint8-array + minItems: 6 + maxItems: 6 + + mac-address: + description: + Specifies the MAC address that was last used by the boot program. This + property should be used in cases where the MAC address assigned to the + device by the boot program is different from the + local-mac-address property. This property shall be used only if the value + differs from local-mac-address property value. + $ref: /schemas/types.yaml#/definitions/uint8-array + minItems: 6 + maxItems: 6 + + max-frame-size: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Maximum transfer unit (IEEE defined MTU), rather than the + maximum frame size (there\'s contradiction in the Devicetree + Specification). + +additionalProperties: true -- cgit v1.2.3 From c7e35b3b007f168186504c95ee64d23ece71629d Mon Sep 17 00:00:00 2001 From: David Heidelberg Date: Mon, 24 Mar 2025 18:41:39 +0100 Subject: dt-bindings: net: Add generic wireless controller Wireless controllers share the common properties. Reviewed-by: Rob Herring (Arm) Signed-off-by: David Heidelberg Link: https://patch.msgid.link/20250324-dt-bindings-network-class-v5-2-f5c3fe00e8f0@ixit.cz Signed-off-by: Johannes Berg --- .../bindings/net/wireless/wireless-controller.yaml | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/wireless/wireless-controller.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/wireless/wireless-controller.yaml b/Documentation/devicetree/bindings/net/wireless/wireless-controller.yaml new file mode 100644 index 000000000000..7379f6c1aa05 --- /dev/null +++ b/Documentation/devicetree/bindings/net/wireless/wireless-controller.yaml @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/wireless/wireless-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Wireless Controller Common Properties + +maintainers: + - Lorenzo Bianconi + +properties: + $nodename: + pattern: "^wifi(@.*)?$" + +allOf: + - $ref: ieee80211.yaml# + - $ref: /schemas/net/network-class.yaml# + +additionalProperties: true + +... + -- cgit v1.2.3 From 3c3606793f7ed926c32555485ae7f7e7c03ef58a Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Mon, 24 Mar 2025 18:41:40 +0100 Subject: dt-bindings: wireless: bcm4329-fmac: Use wireless-controller.yaml schema The wireless-controller schema specifies local-mac-address as used in the bcm4329-fmac device nodes of Apple silicon devices (arch/arm64/boot/dts/apple). Fixes `make dtbs_check` for those devices. Reviewed-by: Rob Herring (Arm) Signed-off-by: Janne Grunau Signed-off-by: David Heidelberg Link: https://patch.msgid.link/20250324-dt-bindings-network-class-v5-3-f5c3fe00e8f0@ixit.cz Signed-off-by: Johannes Berg --- Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml b/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml index a3607d55ef36..7c8100e59a6c 100644 --- a/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml +++ b/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml @@ -16,7 +16,7 @@ description: binding. allOf: - - $ref: ieee80211.yaml# + - $ref: /schemas/net/wireless/wireless-controller.yaml# properties: compatible: -- cgit v1.2.3 From c301db25dd69d656b13f3ad2844e6349ac932c7e Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Mon, 24 Mar 2025 18:41:41 +0100 Subject: dt-bindings: wireless: silabs,wfx: Use wireless-controller.yaml MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead listing local-mac-address and mac-address properties, reference wireless-controller.yaml schema. The schema brings in constraints for the property checked during `make dtbs_check`. Reviewed-by: Rob Herring (Arm) Reviewed-by: Jérôme Pouiller Signed-off-by: Janne Grunau Signed-off-by: David Heidelberg Link: https://patch.msgid.link/20250324-dt-bindings-network-class-v5-4-f5c3fe00e8f0@ixit.cz Signed-off-by: Johannes Berg --- Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml b/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml index 84e5659e50ef..6c0888ae4c4e 100644 --- a/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml +++ b/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml @@ -71,15 +71,12 @@ properties: "Platform Data Set" in Silabs jargon). Default depends of "compatible" string. For "silabs,wf200", the default is 'wf200.pds'. - local-mac-address: true - - mac-address: true - required: - compatible - reg allOf: + - $ref: /schemas/net/wireless/wireless-controller.yaml# - $ref: /schemas/spi/spi-peripheral-props.yaml# unevaluatedProperties: false -- cgit v1.2.3 From 98fd01b4173de0fb1ab2702aca28f7434d2fd234 Mon Sep 17 00:00:00 2001 From: David Heidelberg Date: Mon, 24 Mar 2025 18:41:42 +0100 Subject: dt-bindings: wireless: qcom,wcnss: Use wireless-controller.yaml Reference wireless-controller.yaml schema, so we can use properties as local-mac-address or mac-address. Reviewed-by: Rob Herring (Arm) Signed-off-by: David Heidelberg Link: https://patch.msgid.link/20250324-dt-bindings-network-class-v5-5-f5c3fe00e8f0@ixit.cz Signed-off-by: Johannes Berg --- Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml index fd6db0ca98eb..4fcae6bedfff 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml @@ -54,7 +54,7 @@ properties: - compatible wifi: - additionalProperties: false + unevaluatedProperties: false type: object properties: compatible: @@ -88,6 +88,9 @@ properties: - qcom,smem-states - qcom,smem-state-names + allOf: + - $ref: /schemas/net/wireless/wireless-controller.yaml# + required: - compatible - qcom,mmio -- cgit v1.2.3 From ce6642211888805cb4389157c3fd2b513b3cfccd Mon Sep 17 00:00:00 2001 From: Francesco Dolcini Date: Wed, 2 Apr 2025 12:21:45 +0200 Subject: dt-bindings: hwmon: amc6821: add fan and PWM output Add properties to describe the fan and the PWM controller output. Link: https://www.ti.com/lit/gpn/amc6821 Signed-off-by: Francesco Dolcini Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250402102146.65406-2-francesco@dolcini.it Signed-off-by: Guenter Roeck --- .../devicetree/bindings/hwmon/ti,amc6821.yaml | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/ti,amc6821.yaml b/Documentation/devicetree/bindings/hwmon/ti,amc6821.yaml index 5d33f1a23d03..9ca7356760a7 100644 --- a/Documentation/devicetree/bindings/hwmon/ti,amc6821.yaml +++ b/Documentation/devicetree/bindings/hwmon/ti,amc6821.yaml @@ -28,6 +28,17 @@ properties: i2c-mux: type: object + fan: + $ref: fan-common.yaml# + unevaluatedProperties: false + + "#pwm-cells": + const: 2 + description: | + Number of cells in a PWM specifier. + - cell 0: PWM period in nanoseconds + - cell 1: PWM polarity: 0 or PWM_POLARITY_INVERTED + required: - compatible - reg @@ -50,9 +61,14 @@ examples: #address-cells = <1>; #size-cells = <0>; - fan@18 { + fan_controller: fan@18 { compatible = "ti,amc6821"; reg = <0x18>; + #pwm-cells = <2>; + + fan { + pwms = <&fan_controller 40000 0>; + }; }; }; -- cgit v1.2.3 From 629cf8f6c23a987201558ffcca5590a60ae3959d Mon Sep 17 00:00:00 2001 From: Alexis Czezar Torreno Date: Mon, 7 Apr 2025 11:47:25 +0800 Subject: hwmon: (pmbus/max34440) Add support for ADPM12160 ADPM12160 is a quarter brick DC/DC Power Module. It is a high power non-isolated converter capable of delivering a fully regulated 12V, with continuous power level of 1600W with peak power at 2400W for a limited time. Uses PMBus Configuration. Signed-off-by: Alexis Czezar Torreno Link: https://lore.kernel.org/r/20250407-dev_adpm12160-v3-2-9cd3095445c8@analog.com [groeck: The chip is "ADPM12160"] Signed-off-by: Guenter Roeck --- Documentation/hwmon/max34440.rst | 30 ++++++++++++++++++++++-------- 1 file changed, 22 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/hwmon/max34440.rst b/Documentation/hwmon/max34440.rst index 162d289f0814..8591a7152ce5 100644 --- a/Documentation/hwmon/max34440.rst +++ b/Documentation/hwmon/max34440.rst @@ -3,6 +3,14 @@ Kernel driver max34440 Supported chips: + * ADI ADPM12160 + + Prefixes: 'adpm12160' + + Addresses scanned: - + + Datasheet: - + * Maxim MAX34440 Prefixes: 'max34440' @@ -67,13 +75,14 @@ Author: Guenter Roeck Description ----------- -This driver supports hardware monitoring for Maxim MAX34440 PMBus 6-Channel -Power-Supply Manager, MAX34441 PMBus 5-Channel Power-Supply Manager -and Intelligent Fan Controller, and MAX34446 PMBus Power-Supply Data Logger. -It also supports the MAX34451, MAX34460, and MAX34461 PMBus Voltage Monitor & -Sequencers. The MAX34451 supports monitoring voltage or current of 12 channels -based on GIN pins. The MAX34460 supports 12 voltage channels, and the MAX34461 -supports 16 voltage channels. +This driver supports multiple devices: hardware monitoring for Maxim MAX34440 +PMBus 6-Channel Power-Supply Manager, MAX34441 PMBus 5-Channel Power-Supply +Manager and Intelligent Fan Controller, and MAX34446 PMBus Power-Supply Data +Logger; PMBus Voltage Monitor and Sequencers for MAX34451, MAX34460, and +MAX34461; PMBus DC/DC Power Module ADPM12160. The MAX34451 supports monitoring +voltage or current of 12 channels based on GIN pins. The MAX34460 supports 12 +voltage channels, and the MAX34461 supports 16 voltage channels. The ADPM1260 +also monitors both input and output of voltage and current. The driver is a client driver to the core PMBus driver. Please see Documentation/hwmon/pmbus.rst for details on PMBus client drivers. @@ -128,7 +137,10 @@ in[1-6]_highest Historical maximum voltage. in[1-6]_reset_history Write any value to reset history. ======================= ======================================================= -.. note:: MAX34446 only supports in[1-4]. +.. note:: + + - MAX34446 only supports in[1-4]. + - ADPM12160 only supports in[1-2]. Label is "vin1" and "vout1" respectively. Curr ~~~~ @@ -150,6 +162,7 @@ curr[1-6]_reset_history Write any value to reset history. - in6 and curr6 attributes only exist for MAX34440. - MAX34446 only supports curr[1-4]. + - For ADPM12160, curr[1] is "iin1" and curr[2-6] are "iout[1-5]. Power ~~~~~ @@ -185,6 +198,7 @@ temp[1-8]_reset_history Write any value to reset history. .. note:: - temp7 and temp8 attributes only exist for MAX34440. - MAX34446 only supports temp[1-3]. + - ADPM12160 only supports temp[1]. .. note:: -- cgit v1.2.3 From 7e581c193bde7d5ac49587d9a182e5d13e05547c Mon Sep 17 00:00:00 2001 From: Gerhard Engleder Date: Wed, 9 Apr 2025 21:08:30 +0200 Subject: hwmon: Add KEBA battery monitoring controller support The KEBA battery monitoring controller is found in the system FPGA of KEBA PLC devices. It puts a load on the coin cell battery to check the state of the battery. If the coin cell battery is nearly empty, then the user space is signaled with a hwmon alarm. The auxiliary device for this driver is instantiated by the cp500 misc driver. Signed-off-by: Gerhard Engleder Link: https://lore.kernel.org/r/20250409190830.60489-1-gerhard@engleder-embedded.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/index.rst | 1 + Documentation/hwmon/kbatt.rst | 60 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+) create mode 100644 Documentation/hwmon/kbatt.rst (limited to 'Documentation') diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index f0ddf6222c44..da5895115724 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -106,6 +106,7 @@ Hardware Monitoring Kernel Drivers jc42 k10temp k8temp + kbatt lan966x lineage-pem lm25066 diff --git a/Documentation/hwmon/kbatt.rst b/Documentation/hwmon/kbatt.rst new file mode 100644 index 000000000000..b72718c5ede3 --- /dev/null +++ b/Documentation/hwmon/kbatt.rst @@ -0,0 +1,60 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Kernel driver kbatt +=================== + +Supported chips: + + * KEBA battery monitoring controller (IP core in FPGA) + + Prefix: 'kbatt' + +Authors: + + Gerhard Engleder + Petar Bojanic + +Description +----------- + +The KEBA battery monitoring controller is an IP core for FPGAs, which +monitors the health of a coin cell battery. The coin cell battery is +typically used to supply the RTC during power off to keep the current +time. E.g., the CP500 FPGA includes this IP core to monitor the coin cell +battery of PLCs and the corresponding cp500 driver creates an auxiliary +device for the kbatt driver. + +This driver provides information about the coin cell battery health to +user space. Actually the user space shall be informed that the coin cell +battery is nearly empty and needs to be replaced. + +The coin cell battery must be tested actively to get to know if its nearly +empty or not. Therefore, a load is put on the coin cell battery and the +resulting voltage is evaluated. This evaluation is done by some hard wired +analog logic, which compares the voltage to a defined limit. If the +voltage is above the limit, then the coin cell battery is assumed to be +ok. If the voltage is below the limit, then the coin cell battery is +nearly empty (or broken, removed, ...) and shall be replaced by a new one. +The KEBA battery monitoring controller allows to start the test of the +coin cell battery and to get the result if the voltage is above or below +the limit. The actual voltage is not available. Only the information if +the voltage is below a limit is available. + +The test load, which is put on the coin cell battery for the health check, +is similar to the load during power off. Therefore, the lifetime of the +coin cell battery is reduced directly by the duration of each test. To +limit the negative impact to the lifetime the test is limited to at most +once every 10 seconds. The test load is put on the coin cell battery for +100ms. Thus, in worst case the coin cell battery lifetime is reduced by +1% of the uptime or 3.65 days per year. As the coin cell battery lasts +multiple years, this lifetime reduction negligible. + +This driver only provides a single alarm attribute, which is raised when +the coin cell battery is nearly empty. + +====================== ==== =================================================== +Attribute R/W Contents +====================== ==== =================================================== +in0_min_alarm R voltage of coin cell battery under load is below + limit +====================== ==== =================================================== -- cgit v1.2.3 From 48834a4e794302c162a73e1680c76cd73847bbdb Mon Sep 17 00:00:00 2001 From: Cedric Encarnacion Date: Mon, 21 Apr 2025 20:18:18 +0800 Subject: dt-bindings: hwmon: pmbus: add lt3074 Add Analog Devices LT3074 Ultralow Noise, High PSRR Dropout Linear Regulator. Signed-off-by: Cedric Encarnacion Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250421-upstream-lt3074-v3-1-71636322f9fe@analog.com Signed-off-by: Guenter Roeck --- .../bindings/hwmon/pmbus/adi,lt3074.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/pmbus/adi,lt3074.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/pmbus/adi,lt3074.yaml b/Documentation/devicetree/bindings/hwmon/pmbus/adi,lt3074.yaml new file mode 100644 index 000000000000..bf028a8718f1 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/pmbus/adi,lt3074.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/pmbus/adi,lt3074.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices LT3074 voltage regulator + +maintainers: + - Cedric Encarnacion + +description: | + The LT3074 is a low voltage, ultra-low noise and ultra-fast transient + response linear regulator. It allows telemetry for input/output voltage, + output current and temperature through the PMBus serial interface. + + Datasheet: + https://www.analog.com/en/products/lt3074.html + +allOf: + - $ref: /schemas/regulator/regulator.yaml# + +properties: + compatible: + enum: + - adi,lt3074 + + reg: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + regulator@6d { + compatible = "adi,lt3074"; + reg = <0x6d>; + regulator-name = "vout"; + regulator-max-microvolt = <1250000>; + regulator-min-microvolt = <1150000>; + }; + }; -- cgit v1.2.3 From c66c5bda7f24a7dae2b5b789025e4b8418eb0fae Mon Sep 17 00:00:00 2001 From: Cedric Encarnacion Date: Mon, 21 Apr 2025 20:18:19 +0800 Subject: hwmon: (pmbus/lt3074) add support for lt3074 Add hardware monitoring and regulator support for LT3074. The LT3074 is an ultrafast, ultralow noise 3A, 5.5V dropout linear regulator. The PMBus serial interface allows telemetry for input/output voltage, bias voltage, output current, and die temperature. Signed-off-by: Cedric Encarnacion Link: https://lore.kernel.org/r/20250421-upstream-lt3074-v3-2-71636322f9fe@analog.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/index.rst | 1 + Documentation/hwmon/lt3074.rst | 72 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 73 insertions(+) create mode 100644 Documentation/hwmon/lt3074.rst (limited to 'Documentation') diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index da5895115724..d17f942d8535 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -126,6 +126,7 @@ Hardware Monitoring Kernel Drivers lm95234 lm95245 lochnagar + lt3074 lt7182s ltc2992 ltc2945 diff --git a/Documentation/hwmon/lt3074.rst b/Documentation/hwmon/lt3074.rst new file mode 100644 index 000000000000..234f369153cf --- /dev/null +++ b/Documentation/hwmon/lt3074.rst @@ -0,0 +1,72 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Kernel driver lt3074 +==================== + +Supported chips: + + * Analog Devices LT3074 + + Prefix: 'lt3074' + + Addresses scanned: - + + Datasheet: https://www.analog.com/en/products/lt3074.html + +Authors: Cedric Encarnacion + + +Description +----------- + +This driver supports hardware monitoring for Analog Devices LT3074 Linear +Regulator with PMBus interface. + +The LT3074 is a low voltage, ultra-low noise and ultra-fast transient +response linear regulator with PMBus serial interface. PMBus telemetry +feature provides information regarding the output voltage and current, +input voltage, bias voltage and die temperature. + +The driver is a client driver to the core PMBus driver. Please see +Documentation/hwmon/pmbus.rst for details on PMBus client drivers. + +Usage Notes +----------- + +This driver does not auto-detect devices. You will have to instantiate +the devices explicitly. Please see Documentation/i2c/instantiating-devices.rst +for details. + +Platform data support +--------------------- + +The driver supports standard PMBus driver platform data. + +Sysfs entries +------------- + +======================= ======================================================= +in1_label "vin" +in1_input Measured input voltage +in1_max Input overvoltage warning limit +in1_max_alarm Input overvoltage warning status +in1_min Input undervoltage warning limit +in1_min_alarm Input undervoltage warning status +in2_label "vmon" +in2_input Measured bias voltage +in2_max Bias overvoltage warning limit +in2_min Bias undervoltage warning limit +in3_label "vout1" +in3_input Measured output voltage +in3_max Output overvoltage warning limit +in3_max_alarm Output overvoltage warning status +in3_min Output undervoltage warning limit +in3_min_alarm Output undervoltage warning status +curr1_label "iout1" +curr1_input Measured output current. +curr1_crit Output overcurrent fault limit +curr1_crit_alarm Output overcurrent fault status +temp1_input Measured temperature +temp1_max Maximum temperature limit +temp1_max_alarm Overtemperature warning status +======================= ======================================================= -- cgit v1.2.3 From 03abdce464efc3dcdfe323f7fc315d0fa7abd457 Mon Sep 17 00:00:00 2001 From: Peter Korsgaard Date: Thu, 17 Apr 2025 20:04:25 +0200 Subject: dt-bindings: hwmon: ti,tmp102: document optional V+ supply property TMP102 is powered by its V+ supply, document it. The property is called "vcc-supply" since the plus sign (+) is not a valid property character. Signed-off-by: Peter Korsgaard Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250417180426.3872314-1-peter@korsgaard.com Signed-off-by: Guenter Roeck --- Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml b/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml index 7e5b62a0215d..4c89448eba0d 100644 --- a/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml +++ b/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml @@ -23,6 +23,9 @@ properties: "#thermal-sensor-cells": const: 1 + vcc-supply: + description: Power supply for tmp102 + required: - compatible - reg @@ -42,6 +45,7 @@ examples: reg = <0x48>; interrupt-parent = <&gpio7>; interrupts = <16 IRQ_TYPE_LEVEL_LOW>; + vcc-supply = <&supply>; #thermal-sensor-cells = <1>; }; }; -- cgit v1.2.3 From 8debd8511dd9376fab33bff62500a5a71937420a Mon Sep 17 00:00:00 2001 From: Dzmitry Sankouski Date: Wed, 23 Apr 2025 07:54:36 +0300 Subject: hwmon: (max77705) Add initial support Maxim MAX77705 is a Companion Power Management and Type-C interface IC. It includes charger and fuel gauge blocks, and is capable of measuring charger input current, system bus volatage and current, and bypass voltage. Add support for mentioned measurements. Signed-off-by: Dzmitry Sankouski Link: https://lore.kernel.org/r/20250423-initial-support-for-max77705-sensors-v6-1-ff379e1b06c5@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/index.rst | 1 + Documentation/hwmon/max77705.rst | 39 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) create mode 100644 Documentation/hwmon/max77705.rst (limited to 'Documentation') diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index d17f942d8535..946b8a266d89 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -163,6 +163,7 @@ Hardware Monitoring Kernel Drivers max6639 max6650 max6697 + max77705 max8688 mc13783-adc mc34vr500 diff --git a/Documentation/hwmon/max77705.rst b/Documentation/hwmon/max77705.rst new file mode 100644 index 000000000000..4a7680a340e1 --- /dev/null +++ b/Documentation/hwmon/max77705.rst @@ -0,0 +1,39 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Kernel driver max77705 +====================== + +Supported chips: + + * Maxim Integrated MAX77705 + + Prefix: 'max77705' + + Addresses scanned: none + + Datasheet: Not available + +Authors: + - Dzmitry Sankouski + +Description +----------- + +The MAX77705 PMIC provides current and voltage measurements besides fuelgauge: +- chip input current +- system bus current and voltage +- VBYP voltage + +Sysfs Attributes +---------------- + +================= ======================================== +in1_label "vbyp" +in1_input Measured chip vbyp voltage +in2_label "vsys" +in2_input Measured chip system bus voltage +curr1_label "iin" +curr1_input Measured chip input current. +curr2_label "isys" +curr2_input Measured chip system bus current. +================= ======================================== -- cgit v1.2.3 From cb2c4d734b7deedc1cefe2ee503c2a21c1c83cb9 Mon Sep 17 00:00:00 2001 From: Marcus Folkesson Date: Wed, 23 Apr 2025 21:03:20 +0200 Subject: dt-bindings: display: Add Sitronix ST7571 LCD Controller Sitronix ST7571 is a dot matrix LCD controller supporting both 4bit grayscale and monochrome LCDs. Reviewed-by: Conor Dooley Reviewed-by: Javier Martinez Canillas Reviewed-by: Krzysztof Kozlowski Signed-off-by: Marcus Folkesson Link: https://lore.kernel.org/r/20250423-st7571-v6-1-e9519e3c4ec4@gmail.com Signed-off-by: Javier Martinez Canillas --- .../bindings/display/sitronix,st7571.yaml | 73 ++++++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/sitronix,st7571.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/sitronix,st7571.yaml b/Documentation/devicetree/bindings/display/sitronix,st7571.yaml new file mode 100644 index 000000000000..4fea782fccd7 --- /dev/null +++ b/Documentation/devicetree/bindings/display/sitronix,st7571.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/sitronix,st7571.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sitronix ST7571 Display Controller + +maintainers: + - Marcus Folkesson + +description: + Sitronix ST7571 is a driver and controller for 4-level gray + scale and monochrome dot matrix LCD panels. + +allOf: + - $ref: panel/panel-common.yaml# + +properties: + compatible: + const: sitronix,st7571 + + reg: + maxItems: 1 + + sitronix,grayscale: + type: boolean + description: + Display supports 4-level grayscale. + + reset-gpios: true + width-mm: true + height-mm: true + panel-timing: true + +required: + - compatible + - reg + - reset-gpios + - width-mm + - height-mm + - panel-timing + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + display@3f { + compatible = "sitronix,st7571"; + reg = <0x3f>; + reset-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; + width-mm = <37>; + height-mm = <27>; + + panel-timing { + hactive = <128>; + vactive = <96>; + hback-porch = <0>; + vback-porch = <0>; + clock-frequency = <0>; + hfront-porch = <0>; + hsync-len = <0>; + vfront-porch = <0>; + vsync-len = <0>; + }; + }; + }; -- cgit v1.2.3 From 22282967585ac9e5d88d92d804cc3e5b19c47a97 Mon Sep 17 00:00:00 2001 From: Rick Wertenbroek Date: Wed, 23 Apr 2025 11:56:43 +0200 Subject: Documentation: Fix path for NVMe PCI endpoint target driver The path for the driver points to an non-existent file. Update path with the correct file: drivers/nvme/target/pci-epf.c Signed-off-by: Rick Wertenbroek Signed-off-by: Bjorn Helgaas Reviewed-by: Damien Le Moal Link: https://patch.msgid.link/20250423095643.490495-1-rick.wertenbroek@gmail.com --- Documentation/PCI/endpoint/pci-nvme-function.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/PCI/endpoint/pci-nvme-function.rst b/Documentation/PCI/endpoint/pci-nvme-function.rst index df57b8e7d066..a68015317f7f 100644 --- a/Documentation/PCI/endpoint/pci-nvme-function.rst +++ b/Documentation/PCI/endpoint/pci-nvme-function.rst @@ -8,6 +8,6 @@ PCI NVMe Function The PCI NVMe endpoint function implements a PCI NVMe controller using the NVMe subsystem target core code. The driver for this function resides with the NVMe -subsystem as drivers/nvme/target/nvmet-pciep.c. +subsystem as drivers/nvme/target/pci-epf.c. See Documentation/nvme/nvme-pci-endpoint-target.rst for more details. -- cgit v1.2.3 From da076878764e80bd5982fd7364303c6d93dadd7c Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 18 Apr 2025 14:56:16 +0200 Subject: dt-bindings: arm/cpus: allow up to 3 interconnects entries Allow up to 3 entries as used on the Qualcomm SM8650 CPU nodes. This fixes the following errors: cpu@0: interconnects: [[7, 3, 3, 7, 15, 3], [8, 0, 3, 8, 1, 3], [9, 0, 9, 1]] is too long Fixes: 791a3fcd2345 ("dt-bindings: arm/cpus: Add missing properties") Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20250418-topic-sm8x50-upstream-cpu-icc-max3-v1-1-87d9c2713d72@linaro.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 07f0227cf804..c23c90745ad8 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -301,7 +301,7 @@ properties: interconnects: minItems: 1 - maxItems: 2 + maxItems: 3 nvmem-cells: maxItems: 1 -- cgit v1.2.3 From 2b18eda58c86fd3edd64e51b8b9b0e0a718462b9 Mon Sep 17 00:00:00 2001 From: Alexey Charkov Date: Fri, 18 Apr 2025 17:57:25 +0400 Subject: dt-bindings: interrupt-controller: via,vt8500-intc: Convert to YAML Rewrite the textual description for the VIA/WonderMedia interrupt controller as YAML schema. The original textual version did not contain information about the usage of 'interrupts' to describe the connection of a chained controller to its parent, add it here. A chained controller can trigger up to 8 different interrupts (IRQ0~7) on its parent. Signed-off-by: Alexey Charkov Link: https://lore.kernel.org/r/20250418-via_intc_binding-v2-1-b649ce737f71@gmail.com Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/via,vt8500-intc.txt | 16 ----- .../interrupt-controller/via,vt8500-intc.yaml | 76 ++++++++++++++++++++++ 2 files changed, 76 insertions(+), 16 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.txt deleted file mode 100644 index 0a4ce1051b02..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.txt +++ /dev/null @@ -1,16 +0,0 @@ -VIA/Wondermedia VT8500 Interrupt Controller ------------------------------------------------------ - -Required properties: -- compatible : "via,vt8500-intc" -- reg : Should contain 1 register ranges(address and length) -- #interrupt-cells : should be <1> - -Example: - - intc: interrupt-controller@d8140000 { - compatible = "via,vt8500-intc"; - interrupt-controller; - reg = <0xd8140000 0x10000>; - #interrupt-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.yaml new file mode 100644 index 000000000000..bc14c74bf7d5 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/via,vt8500-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: VIA and WonderMedia SoCs Interrupt Controller + +description: + This is the interrupt controller used in single-core ARM SoCs made by + VIA and WonderMedia (up to and including WM8950). Each block handles + up to 64 interrupt sources (level or edge triggered) and can generate + up to 8 interrupts to its parent when used in a chained configuration. + +maintainers: + - Alexey Charkov + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + const: via,vt8500-intc + + reg: + maxItems: 1 + + interrupts: + items: + - description: + Interrupt number raised by the IRQ0 output of this controller + Only used if this controller is chained + - description: + Interrupt number raised by the IRQ1 output of this controller + Only used if this controller is chained + - description: + Interrupt number raised by the IRQ2 output of this controller + Only used if this controller is chained + - description: + Interrupt number raised by the IRQ3 output of this controller + Only used if this controller is chained + - description: + Interrupt number raised by the IRQ4 output of this controller + Only used if this controller is chained + - description: + Interrupt number raised by the IRQ5 output of this controller + Only used if this controller is chained + - description: + Interrupt number raised by the IRQ6 output of this controller + Only used if this controller is chained + - description: + Interrupt number raised by the IRQ7 output of this controller + Only used if this controller is chained + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + interrupt-controller@d8140000 { + compatible = "via,vt8500-intc"; + interrupt-controller; + reg = <0xd8140000 0x10000>; + #interrupt-cells = <1>; + }; +... -- cgit v1.2.3 From 7965facefaed629fe22f07595f16ee50e8aff1e3 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Thu, 17 Apr 2025 19:16:55 -0700 Subject: netlink: specs: allow header properties for attribute sets rt-link has a number of disjoint headers, plus it uses attributes of other families (e.g. DPLL). Allow declaring a attribute set as "foreign" by specifying which header its definition is coming from. Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250418021706.1967583-2-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/genetlink-c.yaml | 3 +++ Documentation/netlink/genetlink-legacy.yaml | 3 +++ Documentation/netlink/netlink-raw.yaml | 3 +++ 3 files changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/netlink/genetlink-c.yaml b/Documentation/netlink/genetlink-c.yaml index 96fa1f1522ed..5a234e9b5fa2 100644 --- a/Documentation/netlink/genetlink-c.yaml +++ b/Documentation/netlink/genetlink-c.yaml @@ -148,6 +148,9 @@ properties: attr-max-name: description: The explicit name for last member of attribute enum. type: string + header: + description: For C-compatible languages, header which already defines this attribute set. + type: string # End genetlink-c attributes: description: List of attributes in the space. diff --git a/Documentation/netlink/genetlink-legacy.yaml b/Documentation/netlink/genetlink-legacy.yaml index a8c5b521937d..4cbfe666e6f5 100644 --- a/Documentation/netlink/genetlink-legacy.yaml +++ b/Documentation/netlink/genetlink-legacy.yaml @@ -193,6 +193,9 @@ properties: attr-max-name: description: The explicit name for last member of attribute enum. type: string + header: + description: For C-compatible languages, header which already defines this attribute set. + type: string # End genetlink-c attributes: description: List of attributes in the space. diff --git a/Documentation/netlink/netlink-raw.yaml b/Documentation/netlink/netlink-raw.yaml index 1b0772c8e333..e34bf23897fa 100644 --- a/Documentation/netlink/netlink-raw.yaml +++ b/Documentation/netlink/netlink-raw.yaml @@ -207,6 +207,9 @@ properties: attr-max-name: description: The explicit name for last member of attribute enum. type: string + header: + description: For C-compatible languages, header which already defines this attribute set. + type: string # End genetlink-c attributes: description: List of attributes in the space. -- cgit v1.2.3 From 43b606d98482d9612d683a3467649d3999b608ab Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Thu, 17 Apr 2025 19:16:56 -0700 Subject: netlink: specs: rt-link: remove the fixed members from attrs The purpose of the attribute list is to list the attributes which will be included in a given message to shrink the objects for families with huge attr spaces. Fixed headers are always present in their entirety (between netlink header and the attrs) so there's no point in listing their members. Current C codegen doesn't expect them and tries to look them up in the attribute space. Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250418021706.1967583-3-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-link.yaml | 13 ------------- 1 file changed, 13 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-link.yaml b/Documentation/netlink/specs/rt-link.yaml index 726dfa083d14..cb7bacbd3d95 100644 --- a/Documentation/netlink/specs/rt-link.yaml +++ b/Documentation/netlink/specs/rt-link.yaml @@ -2367,7 +2367,6 @@ operations: request: value: 16 attributes: &link-new-attrs - - ifi-index - ifname - net-ns-pid - net-ns-fd @@ -2399,7 +2398,6 @@ operations: request: value: 17 attributes: - - ifi-index - ifname - name: getlink @@ -2410,7 +2408,6 @@ operations: request: value: 18 attributes: - - ifi-index - ifname - alt-ifname - ext-mask @@ -2418,11 +2415,6 @@ operations: reply: value: 16 attributes: &link-all-attrs - - ifi-family - - ifi-type - - ifi-index - - ifi-flags - - ifi-change - address - broadcast - ifname @@ -2515,14 +2507,9 @@ operations: do: request: value: 94 - attributes: - - ifindex reply: value: 92 attributes: &link-stats-attrs - - family - - ifindex - - filter-mask - link-64 - link-xstats - link-xstats-slave -- cgit v1.2.3 From ed43ce6ab2229b5077b8c01897e3a6c2427082f6 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Thu, 17 Apr 2025 19:16:57 -0700 Subject: netlink: specs: rt-link: remove if-netnsid from attr list if-netnsid an alias to target-netnsid: IFLA_TARGET_NETNSID = IFLA_IF_NETNSID, /* new alias */ We don't have a definition for this attr. Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250418021706.1967583-4-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-link.yaml | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-link.yaml b/Documentation/netlink/specs/rt-link.yaml index cb7bacbd3d95..7f411e8cd755 100644 --- a/Documentation/netlink/specs/rt-link.yaml +++ b/Documentation/netlink/specs/rt-link.yaml @@ -2460,7 +2460,6 @@ operations: - xdp - event - new-netnsid - - if-netnsid - target-netnsid - carrier-up-count - carrier-down-count -- cgit v1.2.3 From c703d258f626d12f1910bcf6a5f67eeec26a56a2 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Thu, 17 Apr 2025 19:16:58 -0700 Subject: netlink: specs: rt-link: remove duplicated group in attr list group is listed twice for newlink. Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250418021706.1967583-5-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-link.yaml | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-link.yaml b/Documentation/netlink/specs/rt-link.yaml index 7f411e8cd755..38f439911f94 100644 --- a/Documentation/netlink/specs/rt-link.yaml +++ b/Documentation/netlink/specs/rt-link.yaml @@ -2382,7 +2382,6 @@ operations: - txqlen - operstate - linkmode - - group - gso-max-size - gso-max-segs - gro-max-size -- cgit v1.2.3 From b12b0f41819aaa101fe3d0953cb6e1eb25086c62 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Thu, 17 Apr 2025 19:16:59 -0700 Subject: netlink: specs: rt-link: add C naming info Add properties needed for C codegen to match names with uAPI headers. Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250418021706.1967583-6-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-link.yaml | 30 +++++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-link.yaml b/Documentation/netlink/specs/rt-link.yaml index 38f439911f94..a331eb5eecb2 100644 --- a/Documentation/netlink/specs/rt-link.yaml +++ b/Documentation/netlink/specs/rt-link.yaml @@ -2,6 +2,7 @@ name: rt-link protocol: netlink-raw +uapi-header: linux/rtnetlink.h protonum: 0 doc: @@ -11,6 +12,9 @@ definitions: - name: ifinfo-flags type: flags + header: linux/if.h + enum-name: net-device-flags + name-prefix: iff- entries: - name: up @@ -53,6 +57,7 @@ definitions: - name: vlan-protocols type: enum + enum-name: entries: - name: 8021q @@ -754,6 +759,7 @@ definitions: - name: vlan-flags type: flags + enum-name: entries: - reorder-hdr - gvrp @@ -840,6 +846,7 @@ definitions: - name: ifla-vf-link-state-enum type: enum + enum-name: entries: - auto - enable @@ -906,6 +913,7 @@ definitions: - name: rtext-filter type: flags + enum-name: entries: - vf - brvlan @@ -918,6 +926,7 @@ definitions: - name: netkit-policy type: enum + enum-name: entries: - name: forward @@ -928,6 +937,7 @@ definitions: - name: netkit-mode type: enum + enum-name: netkit-mode entries: - name: l2 - name: l3 @@ -935,6 +945,7 @@ definitions: - name: netkit-scrub type: enum + enum-name: entries: - name: none - name: default @@ -1195,6 +1206,7 @@ attribute-sets: nested-attributes: mctp-attrs - name: vfinfo-list-attrs + name-prefix: ifla-vf- attributes: - name: info @@ -1203,6 +1215,7 @@ attribute-sets: multi-attr: true - name: vfinfo-attrs + name-prefix: ifla-vf- attributes: - name: mac @@ -1257,6 +1270,7 @@ attribute-sets: type: binary - name: vf-stats-attrs + name-prefix: ifla-vf-stats- attributes: - name: rx-packets @@ -1288,6 +1302,8 @@ attribute-sets: type: u64 - name: vf-vlan-attrs + name-prefix: ifla-vf-vlan- + attr-max-name: ifla-vf-vlan-info-max attributes: - name: info @@ -1296,12 +1312,15 @@ attribute-sets: multi-attr: true - name: vf-ports-attrs + name-prefix: ifla- attributes: [] - name: port-self-attrs + name-prefix: ifla- attributes: [] - name: linkinfo-attrs + name-prefix: ifla-info- attributes: - name: kind @@ -1855,6 +1874,7 @@ attribute-sets: - name: linkinfo-vti-attrs name-prefix: ifla-vti- + header: linux/if_tunnel.h attributes: - name: link @@ -2107,7 +2127,7 @@ attribute-sets: byte-order: big-endian - name: ifla-vlan-qos - name-prefix: ifla-vlan-qos + name-prefix: ifla-vlan-qos- attributes: - name: mapping @@ -2123,6 +2143,7 @@ attribute-sets: type: u32 - name: xdp-attrs + name-prefix: ifla-xdp- attributes: - name: fd @@ -2150,6 +2171,7 @@ attribute-sets: type: s32 - name: ifla-attrs + name-prefix: ifla-inet- attributes: - name: conf @@ -2157,6 +2179,7 @@ attribute-sets: struct: ipv4-devconf - name: ifla6-attrs + name-prefix: ifla-inet6- attributes: - name: flags @@ -2222,6 +2245,7 @@ attribute-sets: type: binary - name: link-offload-xstats + name-prefix: ifla-offload-xstats- attributes: - name: cpu-hit @@ -2236,6 +2260,7 @@ attribute-sets: type: binary - name: hw-s-info-one + name-prefix: ifla-offload-xstats-hw-s-info- attributes: - name: request @@ -2245,6 +2270,8 @@ attribute-sets: type: u8 - name: link-dpll-pin-attrs + name-prefix: dpll-a- + header: linux/dpll.h attributes: - name: id @@ -2357,6 +2384,7 @@ sub-messages: operations: enum-model: directional + name-prefix: rtm- list: - name: newlink -- cgit v1.2.3 From e6e1f53f0283d2213dba95dbaa82c3978718245a Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Thu, 17 Apr 2025 19:17:00 -0700 Subject: netlink: specs: rt-link: adjust AF_ nest for C codegen The AF nest is indexed by AF ID, so it's a bit strange, but with minor adjustments C codegen deals with it just fine. Entirely unclear why the names have been in quotes here. Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250418021706.1967583-7-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-link.yaml | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-link.yaml b/Documentation/netlink/specs/rt-link.yaml index a331eb5eecb2..6ab9b876a464 100644 --- a/Documentation/netlink/specs/rt-link.yaml +++ b/Documentation/netlink/specs/rt-link.yaml @@ -1188,19 +1188,21 @@ attribute-sets: multi-attr: true - name: af-spec-attrs + name-prefix: af- + attr-max-name: af-max attributes: - - name: "inet" + name: inet type: nest value: 2 nested-attributes: ifla-attrs - - name: "inet6" + name: inet6 type: nest value: 10 nested-attributes: ifla6-attrs - - name: "mctp" + name: mctp type: nest value: 45 nested-attributes: mctp-attrs -- cgit v1.2.3 From 1c224f19ff06e59fb4079f3b26532dbd3b537b1e Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Thu, 17 Apr 2025 19:17:01 -0700 Subject: netlink: specs: rt-link: make bond's ipv6 address attribute fixed size ns-ip6-target is an indexed-array. Codegen for variable size binary array would be a bit tedious, tell C that we know the size of these attributes, since they are IPv6 addrs. Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250418021706.1967583-8-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-link.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-link.yaml b/Documentation/netlink/specs/rt-link.yaml index 6ab9b876a464..4b51c5b60d95 100644 --- a/Documentation/netlink/specs/rt-link.yaml +++ b/Documentation/netlink/specs/rt-link.yaml @@ -1447,6 +1447,8 @@ attribute-sets: type: indexed-array sub-type: binary display-hint: ipv6 + checks: + exact-len: 16 - name: coupled-control type: u8 -- cgit v1.2.3 From 622d7050cfd40c6c9602d4e16b25cc5350f9d65a Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Thu, 17 Apr 2025 19:17:02 -0700 Subject: netlink: specs: rt-link: add notification for newlink Add a notification entry for netlink so that we can test ntf handling in classic netlink and C. Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250418021706.1967583-9-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-link.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-link.yaml b/Documentation/netlink/specs/rt-link.yaml index 4b51c5b60d95..25f0c3c6a886 100644 --- a/Documentation/netlink/specs/rt-link.yaml +++ b/Documentation/netlink/specs/rt-link.yaml @@ -2420,6 +2420,12 @@ operations: - gso-ipv4-max-size - gro-ipv4-max-size - af-spec + - + name: newlink-ntf + doc: Notify that a link has been created + value: 16 + notify: getlink + fixed-header: ifinfomsg - name: dellink doc: Delete an existing link. -- cgit v1.2.3 From cd879795c3eed39225608bd8cdefdec3b606389f Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Thu, 17 Apr 2025 19:17:03 -0700 Subject: netlink: specs: rt-neigh: add C naming info Add properties needed for C codegen to match names with uAPI headers. Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250418021706.1967583-10-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-neigh.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-neigh.yaml b/Documentation/netlink/specs/rt-neigh.yaml index a843caa72259..9b87efaafd15 100644 --- a/Documentation/netlink/specs/rt-neigh.yaml +++ b/Documentation/netlink/specs/rt-neigh.yaml @@ -2,6 +2,7 @@ name: rt-neigh protocol: netlink-raw +uapi-header: linux/rtnetlink.h protonum: 0 doc: @@ -48,6 +49,7 @@ definitions: - name: nud-state type: flags + enum-name: entries: - incomplete - reachable @@ -60,6 +62,7 @@ definitions: - name: ntf-flags type: flags + enum-name: entries: - use - self @@ -72,12 +75,14 @@ definitions: - name: ntf-ext-flags type: flags + enum-name: entries: - managed - locked - name: rtm-type type: enum + enum-name: entries: - unspec - unicast @@ -179,6 +184,7 @@ definitions: attribute-sets: - name: neighbour-attrs + name-prefix: nda- attributes: - name: unspec @@ -241,6 +247,7 @@ attribute-sets: type: u8 - name: ndt-attrs + name-prefix: ndta- attributes: - name: name @@ -274,6 +281,7 @@ attribute-sets: type: pad - name: ndtpa-attrs + name-prefix: ndtpa- attributes: - name: ifindex @@ -335,6 +343,7 @@ attribute-sets: operations: enum-model: directional + name-prefix: rtm- list: - name: newneigh -- cgit v1.2.3 From eee94a89c55afdb909b384e306d384f0dfe60c45 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Thu, 17 Apr 2025 19:17:04 -0700 Subject: netlink: specs: rt-neigh: make sure getneigh is consistent The consistency check complains replies to do and dump don't match because dump has no value. It doesn't have to by the schema... but fixing this in code gen would be more code than adjusting the spec. This is rare. Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250418021706.1967583-11-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-neigh.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-neigh.yaml b/Documentation/netlink/specs/rt-neigh.yaml index 9b87efaafd15..fe34ade6b300 100644 --- a/Documentation/netlink/specs/rt-neigh.yaml +++ b/Documentation/netlink/specs/rt-neigh.yaml @@ -402,6 +402,7 @@ operations: - ifindex - master reply: + value: 28 attributes: *neighbour-all - name: newneigh-ntf -- cgit v1.2.3 From e3d199d30909237a31ef7065d25c1f270967986f Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Thu, 17 Apr 2025 19:17:05 -0700 Subject: netlink: specs: rtnetlink: correct notify properties The notify property should point at the object the notifications carry, usually the get object, not the cmd which triggers the notification: notify: description: Name of the command sharing the reply type with this notification. Not treating this as a fix, I think that only C codegen cares. Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250418021706.1967583-12-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-neigh.yaml | 2 +- Documentation/netlink/specs/rt-rule.yaml | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-neigh.yaml b/Documentation/netlink/specs/rt-neigh.yaml index fe34ade6b300..e9cba164e3d1 100644 --- a/Documentation/netlink/specs/rt-neigh.yaml +++ b/Documentation/netlink/specs/rt-neigh.yaml @@ -381,7 +381,7 @@ operations: name: delneigh-ntf doc: Notify a neighbour deletion value: 29 - notify: delneigh + notify: getneigh fixed-header: ndmsg - name: getneigh diff --git a/Documentation/netlink/specs/rt-rule.yaml b/Documentation/netlink/specs/rt-rule.yaml index de0938d36541..f585654a4d41 100644 --- a/Documentation/netlink/specs/rt-rule.yaml +++ b/Documentation/netlink/specs/rt-rule.yaml @@ -234,7 +234,7 @@ operations: name: newrule-ntf doc: Notify a rule creation value: 32 - notify: newrule + notify: getrule - name: delrule doc: Remove an existing FIB rule @@ -247,7 +247,7 @@ operations: name: delrule-ntf doc: Notify a rule deletion value: 33 - notify: delrule + notify: getrule - name: getrule doc: Dump all FIB rules -- cgit v1.2.3 From 620b38232f432b51e62bb83abdbfaec6317c54d1 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Thu, 17 Apr 2025 19:17:06 -0700 Subject: netlink: specs: rt-rule: add C naming info Add properties needed for C codegen to match names with uAPI headers. Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250418021706.1967583-13-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-rule.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-rule.yaml b/Documentation/netlink/specs/rt-rule.yaml index f585654a4d41..003707ca4a3e 100644 --- a/Documentation/netlink/specs/rt-rule.yaml +++ b/Documentation/netlink/specs/rt-rule.yaml @@ -2,6 +2,7 @@ name: rt-rule protocol: netlink-raw +uapi-header: linux/fib_rules.h protonum: 0 doc: @@ -56,6 +57,7 @@ definitions: - name: fr-act type: enum + enum-name: entries: - unspec - to-tbl @@ -90,6 +92,7 @@ definitions: attribute-sets: - name: fib-rule-attrs + name-prefix: fra- attributes: - name: dst @@ -198,6 +201,7 @@ attribute-sets: operations: enum-model: directional fixed-header: fib-rule-hdr + name-prefix: rtm- list: - name: newrule -- cgit v1.2.3 From 36f6f7e2d4d094c828977938eaa4949ec5439380 Mon Sep 17 00:00:00 2001 From: Alan Borzeszkowski Date: Thu, 10 Apr 2025 16:34:19 +0300 Subject: Documentation/admin-guide: Document Thunderbolt/USB4 tunneling events MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add documentation about the Thunderbolt/USB4 tunneling events to the user’s and administrator’s guide. Signed-off-by: Alan Borzeszkowski Signed-off-by: Mika Westerberg --- Documentation/admin-guide/thunderbolt.rst | 33 +++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/thunderbolt.rst b/Documentation/admin-guide/thunderbolt.rst index d0502691dfa1..240fee618e06 100644 --- a/Documentation/admin-guide/thunderbolt.rst +++ b/Documentation/admin-guide/thunderbolt.rst @@ -296,6 +296,39 @@ information is missing. To recover from this mode, one needs to flash a valid NVM image to the host controller in the same way it is done in the previous chapter. +Tunneling events +---------------- +The driver sends ``KOBJ_CHANGE`` events to userspace when there is a +tunneling change in the ``thunderbolt_domain``. The notification carries +following environment variables:: + + TUNNEL_EVENT= + TUNNEL_DETAILS=0:12 <-> 1:20 (USB3) + +Possible values for ```` are: + + activated + The tunnel was activated (created). + + changed + There is a change in this tunnel. For example bandwidth allocation was + changed. + + deactivated + The tunnel was torn down. + + low bandwidth + The tunnel is not getting optimal bandwidth. + + insufficient bandwidth + There is not enough bandwidth for the current tunnel requirements. + +The ``TUNNEL_DETAILS`` is only provided if the tunnel is known. For +example, in case of Firmware Connection Manager this is missing or does +not provide full tunnel information. In case of Software Connection Manager +this includes full tunnel details. The format currently matches what the +driver uses when logging. This may change over time. + Networking over Thunderbolt cable --------------------------------- Thunderbolt technology allows software communication between two hosts -- cgit v1.2.3 From ce8ec1f8c8b363c2511332c909d06df7ae01f1b3 Mon Sep 17 00:00:00 2001 From: Jianeng Ceng Date: Thu, 24 Apr 2025 09:08:49 +0800 Subject: dt-bindings: arm: mediatek: Add MT8186 Ponyta Chromebook Ponyta is a custom label Chromebook based on MT8186. It is a self-developed project of Huaqin and has no fixed OEM. Signed-off-by: Jianeng Ceng Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250424010850.994288-2-cengjianeng@huaqin.corp-partner.google.com Signed-off-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/arm/mediatek.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 108ae5e0185d..fa1646bc0bac 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -285,6 +285,13 @@ properties: - const: google,steelix-sku393218 - const: google,steelix - const: mediatek,mt8186 + - description: Google Ponyta + items: + - enum: + - google,ponyta-sku0 + - google,ponyta-sku1 + - const: google,ponyta + - const: mediatek,mt8186 - description: Google Rusty (Lenovo 100e Chromebook Gen 4) items: - const: google,steelix-sku196609 -- cgit v1.2.3 From da076d5562d2fc99138ff8ab04ff82eee7a4a3d8 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 20 Apr 2025 19:36:27 +0200 Subject: dt-bindings: vendor-prefixes: Add Retronix Technology Inc. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add vendor prefix for Retronix Technology Inc. https://www.retronix.com.tw/en/about.html Acked-by: Krzysztof Kozlowski Reviewed-by: Geert Uytterhoeven Tested-by: Niklas Söderlund Signed-off-by: Marek Vasut Link: https://lore.kernel.org/20250420173829.200553-2-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 86f6a19b28ae..2b1bf6709aac 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1262,6 +1262,8 @@ patternProperties: description: Renesas Electronics Corporation "^rervision,.*": description: Shenzhen Rervision Technology Co., Ltd. + "^retronix,.*": + description: Retronix Technology Inc. "^revotics,.*": description: Revolution Robotics, Inc. (Revotics) "^rex,.*": -- cgit v1.2.3 From 9e3b7138c3745a91d91e7e525e4b800ea276a761 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 20 Apr 2025 19:36:28 +0200 Subject: dt-bindings: soc: renesas: Document Retronix R-Car V4H Sparrow Hawk board support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Document Retronix R-Car V4H Sparrow Hawk board based on Renesas R-Car V4H ES3.0 (R8A779G3) SoC. This is a single-board computer with single gigabit ethernet, DSI-to-eDP bridge, DSI and two CSI2 interfaces, audio codec, two CANFD ports, micro SD card slot, USB PD supply, USB 3.0 ports, M.2 Key-M slot for NVMe SSD, debug UART and JTAG. Acked-by: Krzysztof Kozlowski Tested-by: Niklas Söderlund Signed-off-by: Marek Vasut Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250420173829.200553-3-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/soc/renesas/renesas.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml index 6874f425bf1f..48a03a3f6654 100644 --- a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml +++ b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml @@ -375,6 +375,13 @@ properties: - renesas,r8a779g3 # ES3.x - const: renesas,r8a779g0 + - description: R-Car V4H (R8A779G3) + items: + - enum: + - retronix,sparrow-hawk # Sparrow Hawk board + - const: renesas,r8a779g3 # ES3.x + - const: renesas,r8a779g0 + - description: R-Car V4M (R8A779H0) items: - enum: -- cgit v1.2.3 From c14e02e68b43f208417891c5e21308723f03e9e6 Mon Sep 17 00:00:00 2001 From: Aditya Garg Date: Wed, 9 Apr 2025 18:42:51 +0530 Subject: HID: hid-appletb-kbd: Fix wrong date and kernel version in sysfs interface docs The driver hid-appletb-kbd was upstreamed in kernel 6.15. But, due to an oversight on my part, I didn't change the kernel version and expected date while upstreaming the driver, thus it remained as 6.5, the original kernel version when the driver was developed for downstream. This commit should fix this. Signed-off-by: Aditya Garg Signed-off-by: Jiri Kosina --- Documentation/ABI/testing/sysfs-driver-hid-appletb-kbd | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-driver-hid-appletb-kbd b/Documentation/ABI/testing/sysfs-driver-hid-appletb-kbd index 2a19584d091e..8c9718d83e9d 100644 --- a/Documentation/ABI/testing/sysfs-driver-hid-appletb-kbd +++ b/Documentation/ABI/testing/sysfs-driver-hid-appletb-kbd @@ -1,6 +1,6 @@ What: /sys/bus/hid/drivers/hid-appletb-kbd//mode -Date: September, 2023 -KernelVersion: 6.5 +Date: March, 2025 +KernelVersion: 6.15 Contact: linux-input@vger.kernel.org Description: The set of keys displayed on the Touch Bar. -- cgit v1.2.3 From 1300a7f8a7d4c5f88de30312cf34448b96539c23 Mon Sep 17 00:00:00 2001 From: Michal Wilczynski Date: Fri, 18 Apr 2025 13:22:48 +0200 Subject: dt-bindings: gpu: Add 'resets' property for GPU initialization All IMG Rogue GPUs include a reset line that participates in the power-up sequence. On some SoCs (e.g., T-Head TH1520 and Banana Pi BPI-F3), this reset line is exposed and must be driven explicitly to ensure proper initialization. To support this, add a 'resets' property to the GPU device tree bindings. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Michal Wilczynski Reviewed-by: Matt Coster Link: https://lore.kernel.org/r/20250418-apr_18_reset_img-v6-1-85a06757b698@samsung.com Signed-off-by: Matt Coster --- Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml index 0fb2cd939aa4..4450e2e73b3c 100644 --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml @@ -64,6 +64,9 @@ properties: dma-coherent: true + resets: + maxItems: 1 + required: - compatible - reg -- cgit v1.2.3 From f262c73429ce6c3205fcc0fb6655d8d76725cd60 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Wed, 16 Apr 2025 23:48:36 +0100 Subject: dt-bindings: power: Add Allwinner H6/H616 PRCM PPU The Allwinner H6 and some later SoCs contain some bits in the PRCM (Power Reset Clock Management) block that control some power domains. Those power domains include the one for the GPU, the PLLs and some analogue circuits. Signed-off-by: Andre Przywara Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250416224839.9840-2-andre.przywara@arm.com Signed-off-by: Ulf Hansson --- .../power/allwinner,sun50i-h6-prcm-ppu.yaml | 42 ++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/allwinner,sun50i-h6-prcm-ppu.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/power/allwinner,sun50i-h6-prcm-ppu.yaml b/Documentation/devicetree/bindings/power/allwinner,sun50i-h6-prcm-ppu.yaml new file mode 100644 index 000000000000..73a9b4d6220e --- /dev/null +++ b/Documentation/devicetree/bindings/power/allwinner,sun50i-h6-prcm-ppu.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/allwinner,sun50i-h6-prcm-ppu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner SoCs PRCM power domain controller + +maintainers: + - Andre Przywara + +description: + The Allwinner Power Reset Clock Management (PRCM) unit contains bits to + control a few power domains. + +properties: + compatible: + enum: + - allwinner,sun50i-h6-prcm-ppu + - allwinner,sun50i-h616-prcm-ppu + - allwinner,sun55i-a523-prcm-ppu + + reg: + maxItems: 1 + + '#power-domain-cells': + const: 1 + +required: + - compatible + - reg + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + prcm_ppu: power-controller@7010210 { + compatible = "allwinner,sun50i-h616-prcm-ppu"; + reg = <0x7010210 0x10>; + #power-domain-cells = <1>; + }; -- cgit v1.2.3 From 9effbfda6bfd677042434722a9c2f2e17d261dce Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Tue, 8 Apr 2025 11:40:41 +0300 Subject: dt-bindings: regulator: Add ROHM BD96802 PMIC BD96802Qxx-C is an automotive grade configurable Power Management Integrated Circuit supporting Functional Safety features for application processors, SoCs and FPGAs. BD96802 is controlled via I2C, provides two interrupt lines and has two controllable buck regulators. The BD96802 belongs to the family of ROHM Scalable PMICs and is intended to be used as a companion PMIC for the BD96801. Signed-off-by: Matti Vaittinen Acked-by: Conor Dooley Link: https://lore.kernel.org/r/df7983e7c623041f14a4fbe409a2cff846e68a05.1744090658.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones --- .../bindings/regulator/rohm,bd96802-regulator.yaml | 44 ++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/rohm,bd96802-regulator.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/regulator/rohm,bd96802-regulator.yaml b/Documentation/devicetree/bindings/regulator/rohm,bd96802-regulator.yaml new file mode 100644 index 000000000000..671eaf1096d3 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/rohm,bd96802-regulator.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/rohm,bd96802-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM BD96802 Power Management Integrated Circuit regulators + +maintainers: + - Matti Vaittinen + +description: + This module is part of the ROHM BD96802 MFD device. For more details + see Documentation/devicetree/bindings/mfd/rohm,bd96802-pmic.yaml. + + The regulator controller is represented as a sub-node of the PMIC node + on the device tree. + + Regulator nodes should be named to buck1 and buck2. + +patternProperties: + "^buck[1-2]$": + type: object + description: + Properties for single BUCK regulator. + $ref: regulator.yaml# + + properties: + rohm,initial-voltage-microvolt: + description: + Initial voltage for regulator. Voltage can be tuned +/-150 mV from + this value. NOTE, This can be modified via I2C only when PMIC is in + STBY state. + minimum: 500000 + maximum: 3300000 + + rohm,keep-on-stby: + description: + Keep the regulator powered when PMIC transitions to STBY state. + type: boolean + + unevaluatedProperties: false + +additionalProperties: false -- cgit v1.2.3 From 9d851b2e016a13b0a673503f5600315b6601e025 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Tue, 8 Apr 2025 11:40:56 +0300 Subject: dt-bindings: mfd: Add ROHM BD96802 PMIC BD96802Qxx-C is an automotive grade configurable Power Management Integrated Circuit supporting Functional Safety features for application processors, SoCs and FPGAs. BD96802 is controlled via I2C, provides two interrupt lines and has two controllable buck regulators. Signed-off-by: Matti Vaittinen Acked-by: Conor Dooley Link: https://lore.kernel.org/r/ed55edffca3b0a2d7e8bcd9ebd8d8abd9a9b7dfe.1744090658.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/rohm,bd96802-pmic.yaml | 98 ++++++++++++++++++++++ 1 file changed, 98 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/rohm,bd96802-pmic.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd96802-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd96802-pmic.yaml new file mode 100644 index 000000000000..ccabbebf9a29 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/rohm,bd96802-pmic.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/rohm,bd96802-pmic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM BD96802 Scalable Power Management Integrated Circuit + +maintainers: + - Matti Vaittinen + +description: | + BD96802Qxx-C is an automotive grade configurable Power Management + Integrated Circuit supporting Functional Safety features for application + processors, SoCs and FPGAs + +properties: + compatible: + const: rohm,bd96802 + + reg: + maxItems: 1 + + interrupts: + description: + The PMIC provides intb and errb IRQ lines. The errb IRQ line is used + for fatal IRQs which will cause the PMIC to shut down power outputs. + In many systems this will shut down the SoC contolling the PMIC and + connecting/handling the errb can be omitted. However, there are cases + where the SoC is not powered by the PMIC. In that case it may be + useful to connect the errb and handle errb events. + minItems: 1 + maxItems: 2 + + interrupt-names: + minItems: 1 + items: + - enum: [intb, errb] + - const: errb + + regulators: + $ref: ../regulator/rohm,bd96802-regulator.yaml + description: + List of child nodes that specify the regulators. + +required: + - compatible + - reg + - interrupts + - interrupt-names + - regulators + +additionalProperties: false + +examples: + - | + #include + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + pmic: pmic@62 { + reg = <0x62>; + compatible = "rohm,bd96802"; + interrupt-parent = <&gpio1>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>, <6 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "intb", "errb"; + + regulators { + buck1 { + regulator-name = "buck1"; + regulator-ramp-delay = <1250>; + /* 0.5V min INITIAL - 150 mV tune */ + regulator-min-microvolt = <350000>; + /* 3.3V + 150mV tune */ + regulator-max-microvolt = <3450000>; + + /* These can be set only when PMIC is in STBY */ + rohm,initial-voltage-microvolt = <500000>; + regulator-ov-error-microvolt = <230000>; + regulator-uv-error-microvolt = <230000>; + regulator-temp-protection-kelvin = <1>; + regulator-temp-warn-kelvin = <0>; + }; + buck2 { + regulator-name = "buck2"; + regulator-min-microvolt = <350000>; + regulator-max-microvolt = <3450000>; + + rohm,initial-voltage-microvolt = <3000000>; + regulator-ov-error-microvolt = <18000>; + regulator-uv-error-microvolt = <18000>; + regulator-temp-protection-kelvin = <1>; + regulator-temp-warn-kelvin = <1>; + }; + }; + }; + }; -- cgit v1.2.3 From d5a30228b6fa86cf841d8c12af0025c0bacb90fb Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Tue, 8 Apr 2025 11:41:16 +0300 Subject: dt-bindings: mfd: bd96801: Add ROHM BD96805 The ROHM BD96805 is very similar to the BD96801. The differences visible to the drivers is different tune voltage ranges. Add compatible for the ROHM BD96805 PMIC. Signed-off-by: Matti Vaittinen Acked-by: Conor Dooley Link: https://lore.kernel.org/r/f49addee698b683a071c12808f06a56509152f5c.1744090658.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/rohm,bd96801-pmic.yaml | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd96801-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd96801-pmic.yaml index efee3de0d9ad..0e06570483ae 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd96801-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/rohm,bd96801-pmic.yaml @@ -4,19 +4,21 @@ $id: http://devicetree.org/schemas/mfd/rohm,bd96801-pmic.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ROHM BD96801 Scalable Power Management Integrated Circuit +title: ROHM BD96801/BD96805 Scalable Power Management Integrated Circuit maintainers: - Matti Vaittinen description: - BD96801 is an automotive grade single-chip power management IC. - It integrates 4 buck converters and 3 LDOs with safety features like + BD96801 and BD96805 are automotive grade, single-chip power management ICs. + They both integrate 4 buck converters and 3 LDOs with safety features like over-/under voltage and over current detection and a watchdog. properties: compatible: - const: rohm,bd96801 + enum: + - rohm,bd96801 + - rohm,bd96805 reg: maxItems: 1 -- cgit v1.2.3 From 82c218969eb0ec989d8e049878fd3d6a97ccd8ba Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Tue, 8 Apr 2025 11:44:24 +0300 Subject: dt-bindings: mfd: bd96802: Add ROHM BD96806 The ROHM BD96806 is very similar to the BD96802. The differences visible to the drivers is different tune voltage ranges. Add compatible for the ROHM BD96805 PMIC. Signed-off-by: Matti Vaittinen Acked-by: Conor Dooley Link: https://lore.kernel.org/r/3c245cc3829dc64d977c97eae7ae8e2be6233481.1744090658.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/rohm,bd96802-pmic.yaml | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd96802-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd96802-pmic.yaml index ccabbebf9a29..6cbea796d12f 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd96802-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/rohm,bd96802-pmic.yaml @@ -4,19 +4,21 @@ $id: http://devicetree.org/schemas/mfd/rohm,bd96802-pmic.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ROHM BD96802 Scalable Power Management Integrated Circuit +title: ROHM BD96802 / BD96806 Scalable Power Management Integrated Circuit maintainers: - Matti Vaittinen description: | - BD96802Qxx-C is an automotive grade configurable Power Management - Integrated Circuit supporting Functional Safety features for application + BD96802Qxx-C and BD96806 are automotive grade configurable Power Management + Integrated Circuits supporting Functional Safety features for application processors, SoCs and FPGAs properties: compatible: - const: rohm,bd96802 + enum: + - rohm,bd96802 + - rohm,bd96806 reg: maxItems: 1 @@ -27,7 +29,8 @@ properties: for fatal IRQs which will cause the PMIC to shut down power outputs. In many systems this will shut down the SoC contolling the PMIC and connecting/handling the errb can be omitted. However, there are cases - where the SoC is not powered by the PMIC. In that case it may be + where the SoC is not powered by the PMIC or has a short time backup + energy to handle shutdown of critical hardware. In that case it may be useful to connect the errb and handle errb events. minItems: 1 maxItems: 2 -- cgit v1.2.3 From 769aa27801d2086c814c9e2b4ecba340b66f70bc Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 16 Apr 2025 14:02:53 +0200 Subject: dt-bindings: pwm: mediatek,pwm-disp: Add compatible for MT6893 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a compatible string for the Display Controller PWM IP found in the MediaTek Dimensity 1200 (MT6893) SoC, which is compatible with the one found in MT8183. Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250416120253.147977-1-angelogioacchino.delregno@collabora.com Signed-off-by: Uwe Kleine-König --- Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml b/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml index 195e4371196b..68ef30414325 100644 --- a/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml +++ b/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml @@ -27,6 +27,7 @@ properties: - const: mediatek,mt8173-disp-pwm - items: - enum: + - mediatek,mt6893-disp-pwm - mediatek,mt8186-disp-pwm - mediatek,mt8188-disp-pwm - mediatek,mt8192-disp-pwm -- cgit v1.2.3 From b6b5683e9692b7ea2d4ca875802ec00a2b78dd66 Mon Sep 17 00:00:00 2001 From: Alexey Charkov Date: Fri, 18 Apr 2025 18:55:07 +0400 Subject: dt-bindings: pwm: vt8500-pwm: Convert to YAML MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Rewrite the textual description for the WonderMedia PWM controller as YAML schema, and switch the filename to follow the compatible string. Signed-off-by: Alexey Charkov Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250418-via_pwm_binding-v2-1-17545f4d719e@gmail.com Signed-off-by: Uwe Kleine-König --- .../devicetree/bindings/pwm/via,vt8500-pwm.yaml | 43 ++++++++++++++++++++++ .../devicetree/bindings/pwm/vt8500-pwm.txt | 18 --------- 2 files changed, 43 insertions(+), 18 deletions(-) create mode 100644 Documentation/devicetree/bindings/pwm/via,vt8500-pwm.yaml delete mode 100644 Documentation/devicetree/bindings/pwm/vt8500-pwm.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pwm/via,vt8500-pwm.yaml b/Documentation/devicetree/bindings/pwm/via,vt8500-pwm.yaml new file mode 100644 index 000000000000..d9146ad715ba --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/via,vt8500-pwm.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/via,vt8500-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: VIA/Wondermedia VT8500/WM8xxx series SoC PWM controller + +maintainers: + - Alexey Charkov + +allOf: + - $ref: pwm.yaml# + +properties: + compatible: + items: + - const: via,vt8500-pwm + + reg: + maxItems: 1 + + '#pwm-cells': + const: 3 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + +additionalProperties: false + +examples: + - | + pwm1: pwm@d8220000 { + compatible = "via,vt8500-pwm"; + reg = <0xd8220000 0x1000>; + #pwm-cells = <3>; + clocks = <&clkpwm>; + }; diff --git a/Documentation/devicetree/bindings/pwm/vt8500-pwm.txt b/Documentation/devicetree/bindings/pwm/vt8500-pwm.txt deleted file mode 100644 index 4fba93ce1985..000000000000 --- a/Documentation/devicetree/bindings/pwm/vt8500-pwm.txt +++ /dev/null @@ -1,18 +0,0 @@ -VIA/Wondermedia VT8500/WM8xxx series SoC PWM controller - -Required properties: -- compatible: should be "via,vt8500-pwm" -- reg: physical base address and length of the controller's registers -- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of - the cells format. The only third cell flag supported by this binding is - PWM_POLARITY_INVERTED. -- clocks: phandle to the PWM source clock - -Example: - -pwm1: pwm@d8220000 { - #pwm-cells = <3>; - compatible = "via,vt8500-pwm"; - reg = <0xd8220000 0x1000>; - clocks = <&clkpwm>; -}; -- cgit v1.2.3 From 4cc20482143c6dd009ea0c99762bb4bdeac98ec2 Mon Sep 17 00:00:00 2001 From: WangYuli Date: Wed, 23 Apr 2025 11:06:32 +0800 Subject: bpf, docs: Fix non-standard line break Even though the kernel's coding-style document does not explicitly state this, we generally put a newline after the semicolon of every C language statement to enhance code readability. Adjust the placement of newlines to adhere to this convention. Reported-by: Chen Linxuan Signed-off-by: WangYuli Reviewed-by: Yanteng Si Link: https://lore.kernel.org/r/DB66473733449DB0+20250423030632.17626-1-wangyuli@uniontech.com Signed-off-by: Alexei Starovoitov --- Documentation/bpf/bpf_iterators.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/bpf/bpf_iterators.rst b/Documentation/bpf/bpf_iterators.rst index 7f514cb6b052..385cd05aabf5 100644 --- a/Documentation/bpf/bpf_iterators.rst +++ b/Documentation/bpf/bpf_iterators.rst @@ -323,8 +323,8 @@ Now, in the userspace program, pass the pointer of struct to the :: - link = bpf_program__attach_iter(prog, &opts); iter_fd = - bpf_iter_create(bpf_link__fd(link)); + link = bpf_program__attach_iter(prog, &opts); + iter_fd = bpf_iter_create(bpf_link__fd(link)); If both *tid* and *pid* are zero, an iterator created from this struct ``bpf_iter_attach_opts`` will include every opened file of every task in the -- cgit v1.2.3 From 8500393a8e6c58e5e7c135133ad792fc6fd5b6f4 Mon Sep 17 00:00:00 2001 From: Lucas De Marchi Date: Mon, 21 Apr 2025 08:15:38 -0700 Subject: drm/xe/hwmon: Fix kernel version documentation for temperature The version in the sysfs attribute should correspond to the version in which this is enabled and visible for end users. It usually doesn't correspond to the version in which the patch was developed, but rather a release that will contain it. Update them to 6.15. Fixes: dac328dea701 ("drm/xe/hwmon: expose package and vram temperature") Reported-by: Ulisses Furquim Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/4840 Reviewed-by: Rodrigo Vivi Reviewed-by: Raag Jadav Link: https://lore.kernel.org/r/20250421-hwmon-doc-fix-v1-1-9f68db702249@intel.com Signed-off-by: Lucas De Marchi --- Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon index adbb9bce15a5..6fbab98fb639 100644 --- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon +++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon @@ -111,7 +111,7 @@ Description: RO. Package current voltage in millivolt. What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon/temp2_input Date: March 2025 -KernelVersion: 6.14 +KernelVersion: 6.15 Contact: intel-xe@lists.freedesktop.org Description: RO. Package temperature in millidegree Celsius. @@ -119,7 +119,7 @@ Description: RO. Package temperature in millidegree Celsius. What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon/temp3_input Date: March 2025 -KernelVersion: 6.14 +KernelVersion: 6.15 Contact: intel-xe@lists.freedesktop.org Description: RO. VRAM temperature in millidegree Celsius. -- cgit v1.2.3 From f9e4d8bb6aea69aa38e2ef312945408c935feba1 Mon Sep 17 00:00:00 2001 From: Lucas De Marchi Date: Mon, 21 Apr 2025 08:15:39 -0700 Subject: drm/xe/hwmon: Fix kernel version documentation for fan speed The version in the sysfs attribute should correspond to the version in which this is enabled and visible for end users. It usually doesn't correspond to the version in which the patch was developed, but rather a release that will contain it. Update them to 6.16. Fixes: 28f79ac609de ("drm/xe/hwmon: expose fan speed") Reported-by: Ulisses Furquim Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/4841 Reviewed-by: Rodrigo Vivi Reviewed-by: Raag Jadav Link: https://lore.kernel.org/r/20250421-hwmon-doc-fix-v1-2-9f68db702249@intel.com Signed-off-by: Lucas De Marchi --- Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon index 6fbab98fb639..4ca917ac6382 100644 --- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon +++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon @@ -127,7 +127,7 @@ Description: RO. VRAM temperature in millidegree Celsius. What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon/fan1_input Date: March 2025 -KernelVersion: 6.14 +KernelVersion: 6.16 Contact: intel-xe@lists.freedesktop.org Description: RO. Fan 1 speed in RPM. @@ -135,7 +135,7 @@ Description: RO. Fan 1 speed in RPM. What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon/fan2_input Date: March 2025 -KernelVersion: 6.14 +KernelVersion: 6.16 Contact: intel-xe@lists.freedesktop.org Description: RO. Fan 2 speed in RPM. @@ -143,7 +143,7 @@ Description: RO. Fan 2 speed in RPM. What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon/fan3_input Date: March 2025 -KernelVersion: 6.14 +KernelVersion: 6.16 Contact: intel-xe@lists.freedesktop.org Description: RO. Fan 3 speed in RPM. -- cgit v1.2.3 From 6f8bad329e3caf6e09987bb1c611ecd15a300498 Mon Sep 17 00:00:00 2001 From: Ajit Pandey Date: Thu, 17 Apr 2025 22:37:39 +0530 Subject: dt-bindings: power: qcom,rpmpd: Add SM4450 compatible Document compatible for RPMh power domain controller on SM4450 Platform. Signed-off-by: Ajit Pandey Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250417-sm4450_rpmhpd-v1-1-361846750d3a@quicinc.com Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/power/qcom,rpmpd.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml index 655687369a23..1bf65f2a583a 100644 --- a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml +++ b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml @@ -50,6 +50,7 @@ properties: - qcom,sdx55-rpmhpd - qcom,sdx65-rpmhpd - qcom,sdx75-rpmhpd + - qcom,sm4450-rpmhpd - qcom,sm6115-rpmpd - qcom,sm6125-rpmpd - qcom,sm6350-rpmhpd -- cgit v1.2.3 From 76a9b59228d5a9827d969fc3b1b420fa0a985842 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 24 Apr 2025 08:16:21 +0800 Subject: docs: Makefile: get rid of KERNELDOC_CONF env variable Despite its name, what's there is a set of Sphinx arguments that are passed to sphinx/kerneldoc.py: - kerneldoc_srctree: location of the source tree; - kerneldoc_bin: external script to excecute kernel-doc Drop it, and just place the values at the already-existing ALLSPHINXOPTS variable. Signed-off-by: Mauro Carvalho Chehab Tested-by: Andy Shevchenko Signed-off-by: Jonathan Corbet Message-ID: <88be0fc288598c30fbedb9cc230b2a7ed28225a2.1745453655.git.mchehab+huawei@kernel.org> --- Documentation/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/Makefile b/Documentation/Makefile index c022b97c487e..a006c7681412 100644 --- a/Documentation/Makefile +++ b/Documentation/Makefile @@ -61,8 +61,8 @@ endif #HAVE_LATEXMK PAPEROPT_a4 = -D latex_paper_size=a4 PAPEROPT_letter = -D latex_paper_size=letter KERNELDOC = $(srctree)/scripts/kernel-doc.py -KERNELDOC_CONF = -D kerneldoc_srctree=$(srctree) -D kerneldoc_bin=$(KERNELDOC) -ALLSPHINXOPTS = $(KERNELDOC_CONF) $(PAPEROPT_$(PAPER)) $(SPHINXOPTS) +ALLSPHINXOPTS = -D kerneldoc_srctree=$(srctree) -D kerneldoc_bin=$(KERNELDOC) +ALLSPHINXOPTS += $(PAPEROPT_$(PAPER)) $(SPHINXOPTS) ifneq ($(wildcard $(srctree)/.config),) ifeq ($(CONFIG_RUST),y) # Let Sphinx know we will include rustdoc -- cgit v1.2.3 From 110214e4ccd46afa037736516d42288e61f777fe Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 24 Apr 2025 08:16:22 +0800 Subject: Makefile: move KERNELDOC macro to the main Makefile As kernel-doc script is used not only on Documentation, but also on scripts and drivers/drm Makefiles, move it to the main makefile, as otherwise sub-makefiles may not have it. Signed-off-by: Mauro Carvalho Chehab Tested-by: Andy Shevchenko Signed-off-by: Jonathan Corbet Message-ID: --- Documentation/Makefile | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/Makefile b/Documentation/Makefile index a006c7681412..8c1f6a3dfc44 100644 --- a/Documentation/Makefile +++ b/Documentation/Makefile @@ -60,7 +60,6 @@ endif #HAVE_LATEXMK # Internal variables. PAPEROPT_a4 = -D latex_paper_size=a4 PAPEROPT_letter = -D latex_paper_size=letter -KERNELDOC = $(srctree)/scripts/kernel-doc.py ALLSPHINXOPTS = -D kerneldoc_srctree=$(srctree) -D kerneldoc_bin=$(KERNELDOC) ALLSPHINXOPTS += $(PAPEROPT_$(PAPER)) $(SPHINXOPTS) ifneq ($(wildcard $(srctree)/.config),) -- cgit v1.2.3 From ef7c993ae24781957c225e419cdd2ea19c818c56 Mon Sep 17 00:00:00 2001 From: Justin Chen Date: Tue, 22 Apr 2025 16:36:38 -0700 Subject: dt-bindings: net: brcm,asp-v2.0: Remove asp-v2.0 Remove asp-v2.0 which was only supported on one SoC that never saw the light of day. Signed-off-by: Justin Chen Acked-by: Conor Dooley Reviewed-by: Florian Fainelli Link: https://patch.msgid.link/20250422233645.1931036-2-justin.chen@broadcom.com Signed-off-by: Jakub Kicinski --- .../devicetree/bindings/net/brcm,asp-v2.0.yaml | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml b/Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml index 660e2ca42daf..1efbee2c4efd 100644 --- a/Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml +++ b/Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/brcm,asp-v2.0.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom ASP 2.0 Ethernet controller +title: Broadcom ASP Ethernet controller maintainers: - Justin Chen @@ -23,10 +23,6 @@ properties: - enum: - brcm,bcm74165-asp - const: brcm,asp-v2.1 - - items: - - enum: - - brcm,bcm72165-asp - - const: brcm,asp-v2.0 "#address-cells": const: 1 @@ -39,11 +35,9 @@ properties: ranges: true interrupts: - minItems: 1 items: - description: RX/TX interrupt - - description: Port 0 Wake-on-LAN - - description: Port 1 Wake-on-LAN + - description: Wake-on-LAN interrupt clocks: maxItems: 1 @@ -106,16 +100,17 @@ examples: #include ethernet@9c00000 { - compatible = "brcm,bcm72165-asp", "brcm,asp-v2.0"; + compatible = "brcm,bcm74165-asp", "brcm,asp-v2.1"; reg = <0x9c00000 0x1fff14>; - interrupts = ; + interrupts-extended = <&intc GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, + <&aon_pm_l2_intc 14>; ranges = <0x0 0x9c00000 0x1fff14>; clocks = <&scmi 14>; #address-cells = <1>; #size-cells = <1>; mdio@c614 { - compatible = "brcm,asp-v2.0-mdio"; + compatible = "brcm,asp-v2.1-mdio"; reg = <0xc614 0x8>; reg-names = "mdio"; #address-cells = <1>; @@ -127,7 +122,7 @@ examples: }; mdio@ce14 { - compatible = "brcm,asp-v2.0-mdio"; + compatible = "brcm,asp-v2.1-mdio"; reg = <0xce14 0x8>; reg-names = "mdio"; #address-cells = <1>; -- cgit v1.2.3 From 62c8c4656ef1ce4ad14926e459816c77de3bbb9e Mon Sep 17 00:00:00 2001 From: Justin Chen Date: Tue, 22 Apr 2025 16:36:39 -0700 Subject: dt-bindings: net: brcm,unimac-mdio: Remove asp-v2.0 Remove asp-v2.0 which was only supported on one SoC that never saw the light of day. Signed-off-by: Justin Chen Acked-by: Conor Dooley Reviewed-by: Florian Fainelli Link: https://patch.msgid.link/20250422233645.1931036-3-justin.chen@broadcom.com Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml b/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml index 63bee5b542f5..7eb6d5839f0b 100644 --- a/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml +++ b/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml @@ -22,7 +22,6 @@ properties: - brcm,genet-mdio-v3 - brcm,genet-mdio-v4 - brcm,genet-mdio-v5 - - brcm,asp-v2.0-mdio - brcm,asp-v2.1-mdio - brcm,asp-v2.2-mdio - brcm,unimac-mdio -- cgit v1.2.3 From e4bf8f8a22d83ef82fc679b835072a290889b3f8 Mon Sep 17 00:00:00 2001 From: Justin Chen Date: Tue, 22 Apr 2025 16:36:42 -0700 Subject: dt-bindings: net: brcm,asp-v2.0: Add asp-v3.0 Add asp-v3.0 support. v3.0 is a major revision that reduces the feature set for cost savings. We have a reduced amount of channels and network filters. Signed-off-by: Justin Chen Acked-by: Conor Dooley Reviewed-by: Florian Fainelli Link: https://patch.msgid.link/20250422233645.1931036-6-justin.chen@broadcom.com Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml b/Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml index 1efbee2c4efd..a3db6d594c8c 100644 --- a/Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml +++ b/Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml @@ -15,6 +15,10 @@ description: Broadcom Ethernet controller first introduced with 72165 properties: compatible: oneOf: + - items: + - enum: + - brcm,bcm74110-asp + - const: brcm,asp-v3.0 - items: - enum: - brcm,bcm74165b0-asp -- cgit v1.2.3 From 9a8a73766b34a2e8ef1b2dfa85bfecece2cd3702 Mon Sep 17 00:00:00 2001 From: Justin Chen Date: Tue, 22 Apr 2025 16:36:43 -0700 Subject: dt-bindings: net: brcm,unimac-mdio: Add asp-v3.0 The asp-v3.0 Ethernet controller uses a brcm unimac like its predecessor. Signed-off-by: Justin Chen Acked-by: Conor Dooley Reviewed-by: Florian Fainelli Link: https://patch.msgid.link/20250422233645.1931036-7-justin.chen@broadcom.com Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml b/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml index 7eb6d5839f0b..43516dd357b8 100644 --- a/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml +++ b/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml @@ -24,6 +24,7 @@ properties: - brcm,genet-mdio-v5 - brcm,asp-v2.1-mdio - brcm,asp-v2.2-mdio + - brcm,asp-v3.0-mdio - brcm,unimac-mdio - brcm,bcm6846-mdio -- cgit v1.2.3 From 39144062ea335495d659b08c9e3133ab746a0b1b Mon Sep 17 00:00:00 2001 From: "Dr. David Alan Gilbert" Date: Wed, 23 Apr 2025 00:51:47 +0100 Subject: rxrpc: Remove deadcode Remove three functions that are no longer used. rxrpc_get_txbuf() last use was removed by 2020's commit 5e6ef4f1017c ("rxrpc: Make the I/O thread take over the call and local processor work") rxrpc_kernel_get_epoch() last use was removed by 2020's commit 44746355ccb1 ("afs: Don't get epoch from a server because it may be ambiguous") rxrpc_kernel_set_max_life() last use was removed by 2023's commit db099c625b13 ("rxrpc: Fix timeout of a call that hasn't yet been granted a channel") Both of the rxrpc_kernel_* functions were documented. Remove that documentation as well as the code. Signed-off-by: Dr. David Alan Gilbert Acked-by: David Howells Link: https://patch.msgid.link/20250422235147.146460-1-linux@treblig.org Signed-off-by: Jakub Kicinski --- Documentation/networking/rxrpc.rst | 24 ------------------------ 1 file changed, 24 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/rxrpc.rst b/Documentation/networking/rxrpc.rst index fe2ea73be441..d63e3e27dd06 100644 --- a/Documentation/networking/rxrpc.rst +++ b/Documentation/networking/rxrpc.rst @@ -1062,30 +1062,6 @@ The kernel interface functions are as follows: first function to change. Note that this must be called in TASK_RUNNING state. - (#) Get remote client epoch:: - - u32 rxrpc_kernel_get_epoch(struct socket *sock, - struct rxrpc_call *call) - - This allows the epoch that's contained in packets of an incoming client - call to be queried. This value is returned. The function always - successful if the call is still in progress. It shouldn't be called once - the call has expired. Note that calling this on a local client call only - returns the local epoch. - - This value can be used to determine if the remote client has been - restarted as it shouldn't change otherwise. - - (#) Set the maximum lifespan on a call:: - - void rxrpc_kernel_set_max_life(struct socket *sock, - struct rxrpc_call *call, - unsigned long hard_timeout) - - This sets the maximum lifespan on a call to hard_timeout (which is in - jiffies). In the event of the timeout occurring, the call will be - aborted and -ETIME or -ETIMEDOUT will be returned. - (#) Apply the RXRPC_MIN_SECURITY_LEVEL sockopt to a socket from within in the kernel:: -- cgit v1.2.3 From c8ad7ca20e6155cdb34e9058aa43ce457dba34fe Mon Sep 17 00:00:00 2001 From: Martyn Welch Date: Wed, 9 Apr 2025 19:37:26 +0100 Subject: dt-bindings: arm: fsl: Add Boundary Device Nitrogen8M Plus ENC Carrier Board Adds support for the Nitrogen8M Plus System on Module and the Nitrogen8M Plus ENC Carrier Board. Signed-off-by: Martyn Welch Acked-by: Rob Herring (Arm) Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 1b90870958a2..92adef3daeba 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1120,6 +1120,12 @@ properties: - const: avnet,sm2s-imx8mp # SM2S-IMX8PLUS SoM - const: fsl,imx8mp + - description: Boundary Devices Nitrogen8M Plus ENC Carrier Board + items: + - const: boundary,imx8mp-nitrogen-enc-carrier-board + - const: boundary,imx8mp-nitrogen-som + - const: fsl,imx8mp + - description: Boundary Device Nitrogen8MP Universal SMARC Carrier Board items: - const: boundary,imx8mp-nitrogen-smarc-universal-board -- cgit v1.2.3 From 762807d39037fa601f7919d7fedd39e3e7f7d501 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Mon, 14 Apr 2025 13:38:26 +0100 Subject: dt-bindings: arm: fsl: add Toradex SMARC iMX8MP SoM and carrier Add DT compatible strings for Toradex SMARC iMX8MP SoM and Toradex SMARC Development carrier board. Link: https://www.toradex.com/computer-on-modules/smarc-arm-family/nxp-imx-8m-plus Link: https://www.toradex.com/products/carrier-board/smarc-development-board-kit Acked-by: Conor Dooley Signed-off-by: Vitor Soares Reviewed-by: Daniel Baluta Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 92adef3daeba..abfb689ac741 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1182,6 +1182,12 @@ properties: - const: polyhex,imx8mp-debix-som-a # Polyhex Debix SOM A - const: fsl,imx8mp + - description: Toradex Boards with SMARC iMX8M Plus Modules + items: + - const: toradex,smarc-imx8mp-dev # Toradex SMARC iMX8M Plus on Toradex SMARC Development Board + - const: toradex,smarc-imx8mp # Toradex SMARC iMX8M Plus Module + - const: fsl,imx8mp + - description: Toradex Boards with Verdin iMX8M Plus Modules items: - enum: -- cgit v1.2.3 From 9f90a1c9ce7727ef6bf01cf1260401661e7992e4 Mon Sep 17 00:00:00 2001 From: Markus Niebel Date: Tue, 15 Apr 2025 14:59:44 +0200 Subject: dt-bindings: arm: add MBa91xxCA Mainboard for TQMa93xxCA/LA SOM Add MBa91xxCA starterkit base board for TQMa93xxCA/LA SOM for parallel display evaluation. Signed-off-by: Markus Niebel Signed-off-by: Alexander Stein Acked-by: Conor Dooley Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index abfb689ac741..447054b52ea3 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1386,12 +1386,16 @@ properties: All SOM and CPU variants use the same device tree hence only one compatible is needed. Bootloader disables all features not present in the assembled SOC. + MBa91xxCA mainboard can be used as starterkit for the SOM + soldered on an adapter board or for the connector variant + to evaluate RGB display support. MBa93xxCA mainboard can be used as starterkit for the SOM soldered on an adapter board or for the connector variant MBa93xxLA mainboard is a single board computer using the solderable SOM variant items: - enum: + - tq,imx93-tqma9352-mba91xxca # TQ-Systems GmbH i.MX93 TQMa93xxCA/LA SOM on MBa91xxCA - tq,imx93-tqma9352-mba93xxca # TQ-Systems GmbH i.MX93 TQMa93xxCA/LA SOM on MBa93xxCA - tq,imx93-tqma9352-mba93xxla # TQ-Systems GmbH i.MX93 TQMa93xxLA SOM on MBa93xxLA SBC - const: tq,imx93-tqma9352 # TQ-Systems GmbH i.MX93 TQMa93xxCA/LA SOM -- cgit v1.2.3 From 99b11851e5ed599c626d26834e57e3df2e31fffd Mon Sep 17 00:00:00 2001 From: Peter Colberg Date: Mon, 17 Mar 2025 17:01:36 -0400 Subject: fpga: m10bmc-sec: change contact for secure update driver Change the maintainer for the Intel MAX10 BMC Secure Update driver from Peter Colberg to Matthew Gerlach and update the ABI documentation. Signed-off-by: Peter Colberg Acked-by: Matthew Gerlach Acked-by: Xu Yilun Link: https://lore.kernel.org/r/20250317210136.72816-1-peter.colberg@altera.com Signed-off-by: Xu Yilun --- Documentation/ABI/testing/sysfs-driver-intel-m10-bmc | 4 ++-- .../ABI/testing/sysfs-driver-intel-m10-bmc-sec-update | 14 +++++++------- 2 files changed, 9 insertions(+), 9 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc index a6e400364932..faeae8fedb14 100644 --- a/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc +++ b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc @@ -17,7 +17,7 @@ Description: Read only. Returns the firmware version of Intel MAX10 What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_address Date: January 2021 KernelVersion: 5.12 -Contact: Peter Colberg +Contact: Matthew Gerlach Description: Read only. Returns the first MAC address in a block of sequential MAC addresses assigned to the board that is managed by the Intel MAX10 BMC. It is stored in @@ -28,7 +28,7 @@ Description: Read only. Returns the first MAC address in a block What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_count Date: January 2021 KernelVersion: 5.12 -Contact: Peter Colberg +Contact: Matthew Gerlach Description: Read only. Returns the number of sequential MAC addresses assigned to the board managed by the Intel MAX10 BMC. This value is stored in FLASH and is mirrored diff --git a/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update index c69fd3894eb4..3a6ca780c75c 100644 --- a/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update +++ b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update @@ -1,7 +1,7 @@ What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_root_entry_hash Date: Sep 2022 KernelVersion: 5.20 -Contact: Peter Colberg +Contact: Matthew Gerlach Description: Read only. Returns the root entry hash for the static region if one is programmed, else it returns the string: "hash not programmed". This file is only @@ -11,7 +11,7 @@ Description: Read only. Returns the root entry hash for the static What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_root_entry_hash Date: Sep 2022 KernelVersion: 5.20 -Contact: Peter Colberg +Contact: Matthew Gerlach Description: Read only. Returns the root entry hash for the partial reconfiguration region if one is programmed, else it returns the string: "hash not programmed". This file @@ -21,7 +21,7 @@ Description: Read only. Returns the root entry hash for the partial What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_root_entry_hash Date: Sep 2022 KernelVersion: 5.20 -Contact: Peter Colberg +Contact: Matthew Gerlach Description: Read only. Returns the root entry hash for the BMC image if one is programmed, else it returns the string: "hash not programmed". This file is only visible if the @@ -31,7 +31,7 @@ Description: Read only. Returns the root entry hash for the BMC image What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_canceled_csks Date: Sep 2022 KernelVersion: 5.20 -Contact: Peter Colberg +Contact: Matthew Gerlach Description: Read only. Returns a list of indices for canceled code signing keys for the static region. The standard bitmap list format is used (e.g. "1,2-6,9"). @@ -39,7 +39,7 @@ Description: Read only. Returns a list of indices for canceled code What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_canceled_csks Date: Sep 2022 KernelVersion: 5.20 -Contact: Peter Colberg +Contact: Matthew Gerlach Description: Read only. Returns a list of indices for canceled code signing keys for the partial reconfiguration region. The standard bitmap list format is used (e.g. "1,2-6,9"). @@ -47,7 +47,7 @@ Description: Read only. Returns a list of indices for canceled code What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_canceled_csks Date: Sep 2022 KernelVersion: 5.20 -Contact: Peter Colberg +Contact: Matthew Gerlach Description: Read only. Returns a list of indices for canceled code signing keys for the BMC. The standard bitmap list format is used (e.g. "1,2-6,9"). @@ -55,7 +55,7 @@ Description: Read only. Returns a list of indices for canceled code What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/flash_count Date: Sep 2022 KernelVersion: 5.20 -Contact: Peter Colberg +Contact: Matthew Gerlach Description: Read only. Returns number of times the secure update staging area has been flashed. Format: "%u". -- cgit v1.2.3 From 59b24c0047a2e662325fdffeea4d9c9db2d31916 Mon Sep 17 00:00:00 2001 From: David Heidelberg Date: Mon, 14 Apr 2025 21:12:29 +0200 Subject: media: dt-bindings: media: i2c: align filenames format with standard MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Append missing vendor and align with other sony definitions. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Laurent Pinchart Reviewed-by: Niklas Söderlund Signed-off-by: David Heidelberg Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../devicetree/bindings/media/i2c/adi,adp1653.txt | 38 ++++ .../devicetree/bindings/media/i2c/adi,adv7180.yaml | 189 ++++++++++++++++++ .../devicetree/bindings/media/i2c/adi,adv7343.txt | 48 +++++ .../devicetree/bindings/media/i2c/adi,adv748x.yaml | 212 +++++++++++++++++++++ .../devicetree/bindings/media/i2c/adi,adv7604.yaml | 160 ++++++++++++++++ .../devicetree/bindings/media/i2c/adp1653.txt | 38 ---- .../devicetree/bindings/media/i2c/adv7180.yaml | 189 ------------------ .../devicetree/bindings/media/i2c/adv7343.txt | 48 ----- .../devicetree/bindings/media/i2c/adv748x.yaml | 212 --------------------- .../devicetree/bindings/media/i2c/adv7604.yaml | 160 ---------------- .../bindings/media/i2c/aptina,mt9v032.txt | 41 ++++ .../devicetree/bindings/media/i2c/imx219.yaml | 109 ----------- .../devicetree/bindings/media/i2c/max2175.txt | 59 ------ .../bindings/media/i2c/maxim,max2175.txt | 59 ++++++ .../bindings/media/i2c/micron,mt9m111.txt | 37 ++++ .../devicetree/bindings/media/i2c/mt9m001.txt | 38 ---- .../devicetree/bindings/media/i2c/mt9m111.txt | 37 ---- .../devicetree/bindings/media/i2c/mt9v032.txt | 41 ---- .../devicetree/bindings/media/i2c/nxp,tda1997x.txt | 178 +++++++++++++++++ .../devicetree/bindings/media/i2c/onnn,mt9m001.txt | 38 ++++ .../devicetree/bindings/media/i2c/ov2640.txt | 41 ---- .../devicetree/bindings/media/i2c/ov2659.txt | 47 ----- .../devicetree/bindings/media/i2c/ov7670.txt | 55 ------ .../devicetree/bindings/media/i2c/ov7740.txt | 47 ----- .../devicetree/bindings/media/i2c/ov9650.txt | 36 ---- .../devicetree/bindings/media/i2c/ovti,ov2640.txt | 41 ++++ .../devicetree/bindings/media/i2c/ovti,ov2659.txt | 47 +++++ .../devicetree/bindings/media/i2c/ovti,ov7670.txt | 55 ++++++ .../devicetree/bindings/media/i2c/ovti,ov7740.txt | 47 +++++ .../devicetree/bindings/media/i2c/ovti,ov9650.txt | 36 ++++ .../devicetree/bindings/media/i2c/sony,imx219.yaml | 109 +++++++++++ .../devicetree/bindings/media/i2c/tc358743.txt | 48 ----- .../devicetree/bindings/media/i2c/tda1997x.txt | 178 ----------------- .../devicetree/bindings/media/i2c/ths8200.txt | 19 -- .../devicetree/bindings/media/i2c/ti,ths8200.txt | 19 ++ .../devicetree/bindings/media/i2c/ti,tvp514x.txt | 44 +++++ .../devicetree/bindings/media/i2c/ti,tvp5150.txt | 157 +++++++++++++++ .../devicetree/bindings/media/i2c/ti,tvp7002.txt | 53 ++++++ .../bindings/media/i2c/toshiba,tc358743.txt | 48 +++++ .../devicetree/bindings/media/i2c/tvp514x.txt | 44 ----- .../devicetree/bindings/media/i2c/tvp5150.txt | 157 --------------- .../devicetree/bindings/media/i2c/tvp7002.txt | 53 ------ 42 files changed, 1656 insertions(+), 1656 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/i2c/adi,adp1653.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/adi,adv7180.yaml create mode 100644 Documentation/devicetree/bindings/media/i2c/adi,adv7343.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/adi,adv748x.yaml create mode 100644 Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml delete mode 100644 Documentation/devicetree/bindings/media/i2c/adp1653.txt delete mode 100644 Documentation/devicetree/bindings/media/i2c/adv7180.yaml delete mode 100644 Documentation/devicetree/bindings/media/i2c/adv7343.txt delete mode 100644 Documentation/devicetree/bindings/media/i2c/adv748x.yaml delete mode 100644 Documentation/devicetree/bindings/media/i2c/adv7604.yaml create mode 100644 Documentation/devicetree/bindings/media/i2c/aptina,mt9v032.txt delete mode 100644 Documentation/devicetree/bindings/media/i2c/imx219.yaml delete mode 100644 Documentation/devicetree/bindings/media/i2c/max2175.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/maxim,max2175.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/micron,mt9m111.txt delete mode 100644 Documentation/devicetree/bindings/media/i2c/mt9m001.txt delete mode 100644 Documentation/devicetree/bindings/media/i2c/mt9m111.txt delete mode 100644 Documentation/devicetree/bindings/media/i2c/mt9v032.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/nxp,tda1997x.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/onnn,mt9m001.txt delete mode 100644 Documentation/devicetree/bindings/media/i2c/ov2640.txt delete mode 100644 Documentation/devicetree/bindings/media/i2c/ov2659.txt delete mode 100644 Documentation/devicetree/bindings/media/i2c/ov7670.txt delete mode 100644 Documentation/devicetree/bindings/media/i2c/ov7740.txt delete mode 100644 Documentation/devicetree/bindings/media/i2c/ov9650.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/ovti,ov2640.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/ovti,ov2659.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/ovti,ov7670.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/ovti,ov7740.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/ovti,ov9650.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/sony,imx219.yaml delete mode 100644 Documentation/devicetree/bindings/media/i2c/tc358743.txt delete mode 100644 Documentation/devicetree/bindings/media/i2c/tda1997x.txt delete mode 100644 Documentation/devicetree/bindings/media/i2c/ths8200.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/ti,ths8200.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/ti,tvp514x.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/ti,tvp5150.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/ti,tvp7002.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/toshiba,tc358743.txt delete mode 100644 Documentation/devicetree/bindings/media/i2c/tvp514x.txt delete mode 100644 Documentation/devicetree/bindings/media/i2c/tvp5150.txt delete mode 100644 Documentation/devicetree/bindings/media/i2c/tvp7002.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/i2c/adi,adp1653.txt b/Documentation/devicetree/bindings/media/i2c/adi,adp1653.txt new file mode 100644 index 000000000000..4cce0de40ee9 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/adi,adp1653.txt @@ -0,0 +1,38 @@ +* Analog Devices ADP1653 flash LED driver + +Required Properties: + + - compatible: Must contain "adi,adp1653" + + - reg: I2C slave address + + - enable-gpios: Specifier of the GPIO connected to EN pin + +There are two LED outputs available - flash and indicator. One LED is +represented by one child node, nodes need to be named "flash" and "indicator". + +Required properties of the LED child node: +- led-max-microamp : see Documentation/devicetree/bindings/leds/common.txt + +Required properties of the flash LED child node: + +- flash-max-microamp : see Documentation/devicetree/bindings/leds/common.txt +- flash-timeout-us : see Documentation/devicetree/bindings/leds/common.txt +- led-max-microamp : see Documentation/devicetree/bindings/leds/common.txt + +Example: + + adp1653: led-controller@30 { + compatible = "adi,adp1653"; + reg = <0x30>; + enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* 88 */ + + flash { + flash-timeout-us = <500000>; + flash-max-microamp = <320000>; + led-max-microamp = <50000>; + }; + indicator { + led-max-microamp = <17500>; + }; + }; diff --git a/Documentation/devicetree/bindings/media/i2c/adi,adv7180.yaml b/Documentation/devicetree/bindings/media/i2c/adi,adv7180.yaml new file mode 100644 index 000000000000..dee8ce7cb7ba --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/adi,adv7180.yaml @@ -0,0 +1,189 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/adi,adv7180.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADV7180 analog video decoder family + +maintainers: + - Lars-Peter Clausen + +description: + The adv7180 family devices are used to capture analog video to different + digital interfaces like MIPI CSI-2 or parallel video. + +properties: + compatible: + items: + - enum: + - adi,adv7180 + - adi,adv7180cp + - adi,adv7180st + - adi,adv7182 + - adi,adv7280 + - adi,adv7280-m + - adi,adv7281 + - adi,adv7281-m + - adi,adv7281-ma + - adi,adv7282 + - adi,adv7282-m + + reg: + maxItems: 1 + + powerdown-gpios: + maxItems: 1 + + reset-gpios: + maxItems: 1 + + adv,force-bt656-4: + deprecated: true + description: + Indicates that the output is a BT.656-4 compatible stream. + type: boolean + + adi,force-bt656-4: + description: + Indicates that the output is a BT.656-4 compatible stream. + type: boolean + + interrupts: + items: + - description: The GPIO connected to the INTRQ pin. + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + ports: true + +additionalProperties: false + +required: + - compatible + - reg + +allOf: + - if: + properties: + compatible: + enum: + - adi,adv7180 + - adi,adv7182 + - adi,adv7280 + - adi,adv7280-m + - adi,adv7281 + - adi,adv7281-m + - adi,adv7281-ma + - adi,adv7282 + - adi,adv7282-m + then: + required: + - port + + - if: + properties: + compatible: + contains: + const: adi,adv7180cp + then: + properties: + ports: + $ref: /schemas/graph.yaml#/properties/ports + properties: + port@3: + $ref: /schemas/graph.yaml#/properties/port + description: Output port + + patternProperties: + "^port@[0-2]$": + $ref: /schemas/graph.yaml#/properties/port + description: Input port + + required: + - port@3 + + required: + - ports + + - if: + properties: + compatible: + contains: + const: adi,adv7180st + then: + properties: + ports: + $ref: /schemas/graph.yaml#/properties/ports + properties: + port@6: + $ref: /schemas/graph.yaml#/properties/port + description: Output port + + patternProperties: + "^port@[0-5]$": + $ref: /schemas/graph.yaml#/properties/port + description: Input port + + required: + - port@6 + + required: + - ports + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + composite-in@20 { + compatible = "adi,adv7180"; + reg = <0x20>; + + port { + adv7180: endpoint { + bus-width = <8>; + remote-endpoint = <&vin1ep>; + }; + }; + }; + + }; + + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + composite-in@20 { + compatible = "adi,adv7180cp"; + reg = <0x20>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7180_in: endpoint { + remote-endpoint = <&composite_con_in>; + }; + }; + + port@3 { + reg = <3>; + adv7180_out: endpoint { + remote-endpoint = <&vin4_in>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/i2c/adi,adv7343.txt b/Documentation/devicetree/bindings/media/i2c/adi,adv7343.txt new file mode 100644 index 000000000000..5653bc2428b8 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/adi,adv7343.txt @@ -0,0 +1,48 @@ +* Analog Devices adv7343 video encoder + +The ADV7343 are high speed, digital-to-analog video encoders in a 64-lead LQFP +package. Six high speed, 3.3 V, 11-bit video DACs provide support for composite +(CVBS), S-Video (Y-C), and component (YPrPb/RGB) analog outputs in standard +definition (SD), enhanced definition (ED), or high definition (HD) video +formats. + +Required Properties : +- compatible: Must be "adi,adv7343" + +Optional Properties : +- adi,power-mode-sleep-mode: on enable the current consumption is reduced to + micro ampere level. All DACs and the internal PLL + circuit are disabled. +- adi,power-mode-pll-ctrl: PLL and oversampling control. This control allows + internal PLL 1 circuit to be powered down and the + oversampling to be switched off. +- ad,adv7343-power-mode-dac: array configuring the power on/off DAC's 1..6, + 0 = OFF and 1 = ON, Default value when this + property is not specified is <0 0 0 0 0 0>. +- ad,adv7343-sd-config-dac-out: array configure SD DAC Output's 1 and 2, 0 = OFF + and 1 = ON, Default value when this property is + not specified is <0 0>. + +Example: + +i2c0@1c22000 { + ... + ... + + adv7343@2a { + compatible = "adi,adv7343"; + reg = <0x2a>; + + port { + adv7343_1: endpoint { + adi,power-mode-sleep-mode; + adi,power-mode-pll-ctrl; + /* Use DAC1..3, DAC6 */ + adi,dac-enable = <1 1 1 0 0 1>; + /* Use SD DAC output 1 */ + adi,sd-dac-enable = <1 0>; + }; + }; + }; + ... +}; diff --git a/Documentation/devicetree/bindings/media/i2c/adi,adv748x.yaml b/Documentation/devicetree/bindings/media/i2c/adi,adv748x.yaml new file mode 100644 index 000000000000..254987350321 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/adi,adv748x.yaml @@ -0,0 +1,212 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/adi,adv748x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADV748X video decoder with HDMI receiver + +maintainers: + - Kieran Bingham + - Niklas Söderlund + +description: + The ADV7481 and ADV7482 are multi format video decoders with an integrated + HDMI receiver. They can output CSI-2 on two independent outputs TXA and TXB + from three input sources HDMI, analog and TTL. + +properties: + compatible: + items: + - enum: + - adi,adv7481 + - adi,adv7482 + + reg: + minItems: 1 + maxItems: 12 + description: + The ADV748x has up to twelve 256-byte maps that can be accessed via the + main I2C ports. Each map has it own I2C address and acts as a standard + slave device on the I2C bus. The main address is mandatory, others are + optional and remain at default values if not specified. + + reg-names: + minItems: 1 + items: + - const: main + - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] + - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] + - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] + - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] + - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] + - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] + - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] + - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] + - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] + - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] + - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] + + interrupts: true + + interrupt-names: true + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + patternProperties: + "^port@[0-7]$": + $ref: /schemas/graph.yaml#/properties/port + description: Input port nodes for analog inputs AIN[0-7]. + + properties: + port@8: + $ref: /schemas/graph.yaml#/properties/port + description: Input port node for HDMI. + + port@9: + $ref: /schemas/graph.yaml#/properties/port + description: Input port node for TTL. + + port@a: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Output port node, single endpoint describing the CSI-2 transmitter TXA. + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + port@b: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Output port node, single endpoint describing the CSI-2 transmitter TXB. + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + maxItems: 1 + + required: + - clock-lanes + - data-lanes + +allOf: + - if: + properties: + compatible: + contains: + const: adi,adv7481 + then: + properties: + interrupts: + minItems: 1 + maxItems: 3 + + interrupt-names: + minItems: 1 + maxItems: 3 + items: + enum: [ intrq1, intrq2, intrq3 ] + else: + properties: + interrupts: + minItems: 1 + maxItems: 2 + + interrupt-names: + minItems: 1 + maxItems: 2 + items: + enum: [ intrq1, intrq2 ] + +additionalProperties: false + +required: + - compatible + - reg + - ports + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + video-receiver@70 { + compatible = "adi,adv7482"; + reg = <0x70 0x71 0x72 0x73 0x74 0x75 + 0x60 0x61 0x62 0x63 0x64 0x65>; + reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater", + "infoframe", "cbus", "cec", "sdp", "txa", "txb"; + + interrupt-parent = <&gpio6>; + interrupts = <30 IRQ_TYPE_LEVEL_LOW>, <31 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "intrq1", "intrq2"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@7 { + reg = <7>; + + adv7482_ain7: endpoint { + remote-endpoint = <&cvbs_in>; + }; + }; + + port@8 { + reg = <8>; + + adv7482_hdmi: endpoint { + remote-endpoint = <&hdmi_in>; + }; + }; + + port@a { + reg = <10>; + + adv7482_txa: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&csi40_in>; + }; + }; + + port@b { + reg = <11>; + + adv7482_txb: endpoint { + clock-lanes = <0>; + data-lanes = <1>; + remote-endpoint = <&csi20_in>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml b/Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml new file mode 100644 index 000000000000..6c403003cdda --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml @@ -0,0 +1,160 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/adi,adv7604.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADV7604/10/11/12 video decoder with HDMI receiver + +maintainers: + - Hans Verkuil + +description: + The ADV7604 and ADV7610/11/12 are multiformat video decoders with + an integrated HDMI receiver. The ADV7604 has four multiplexed HDMI inputs + and one analog input, and the ADV7610/11 have one HDMI input and no analog + input. The ADV7612 is similar to the ADV7610/11 but has 2 HDMI inputs. + + These device tree bindings support the ADV7610/11/12 only at the moment. + +properties: + compatible: + items: + - enum: + - adi,adv7610 + - adi,adv7611 + - adi,adv7612 + + reg: + minItems: 1 + maxItems: 13 + + reg-names: + minItems: 1 + items: + - const: main + - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] + - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] + - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] + - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] + - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] + - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] + - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] + - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] + - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] + - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] + - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] + - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] + + interrupts: + maxItems: 1 + + reset-gpios: + maxItems: 1 + + hpd-gpios: + minItems: 1 + description: + References to the GPIOs that control the HDMI hot-plug detection pins, + one per HDMI input. The active flag indicates the GPIO level that + enables hot-plug detection. + + default-input: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1 ] + description: + Select which input is selected after reset. + + ports: true + +required: + - compatible + - reg + - ports + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + contains: + const: adi,adv7611 + then: + properties: + ports: + $ref: /schemas/graph.yaml#/properties/ports + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Input port + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Output port + + required: + - port@1 + + - if: + properties: + compatible: + contains: + const: adi,adv7612 + then: + properties: + ports: + $ref: /schemas/graph.yaml#/properties/ports + properties: + port@2: + $ref: /schemas/graph.yaml#/properties/port + description: Output port + + patternProperties: + "^port@[0-1]$": + $ref: /schemas/graph.yaml#/properties/port + description: Input port + + required: + - port@2 + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + hdmi_receiver@4c { + compatible = "adi,adv7611"; + /* + * The edid page will be accessible @ 0x66 on the I2C bus. All + * other maps will retain their default addresses. + */ + reg = <0x4c>, <0x66>; + reg-names = "main", "edid"; + + reset-gpios = <&ioexp 0 GPIO_ACTIVE_LOW>; + hpd-gpios = <&ioexp 2 GPIO_ACTIVE_HIGH>; + default-input = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + hdmi_in: endpoint { + remote-endpoint = <&ccdc_in>; + }; + }; + }; + + + }; + }; diff --git a/Documentation/devicetree/bindings/media/i2c/adp1653.txt b/Documentation/devicetree/bindings/media/i2c/adp1653.txt deleted file mode 100644 index 4cce0de40ee9..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/adp1653.txt +++ /dev/null @@ -1,38 +0,0 @@ -* Analog Devices ADP1653 flash LED driver - -Required Properties: - - - compatible: Must contain "adi,adp1653" - - - reg: I2C slave address - - - enable-gpios: Specifier of the GPIO connected to EN pin - -There are two LED outputs available - flash and indicator. One LED is -represented by one child node, nodes need to be named "flash" and "indicator". - -Required properties of the LED child node: -- led-max-microamp : see Documentation/devicetree/bindings/leds/common.txt - -Required properties of the flash LED child node: - -- flash-max-microamp : see Documentation/devicetree/bindings/leds/common.txt -- flash-timeout-us : see Documentation/devicetree/bindings/leds/common.txt -- led-max-microamp : see Documentation/devicetree/bindings/leds/common.txt - -Example: - - adp1653: led-controller@30 { - compatible = "adi,adp1653"; - reg = <0x30>; - enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* 88 */ - - flash { - flash-timeout-us = <500000>; - flash-max-microamp = <320000>; - led-max-microamp = <50000>; - }; - indicator { - led-max-microamp = <17500>; - }; - }; diff --git a/Documentation/devicetree/bindings/media/i2c/adv7180.yaml b/Documentation/devicetree/bindings/media/i2c/adv7180.yaml deleted file mode 100644 index 9ee1483775f6..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/adv7180.yaml +++ /dev/null @@ -1,189 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/media/i2c/adv7180.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Analog Devices ADV7180 analog video decoder family - -maintainers: - - Lars-Peter Clausen - -description: - The adv7180 family devices are used to capture analog video to different - digital interfaces like MIPI CSI-2 or parallel video. - -properties: - compatible: - items: - - enum: - - adi,adv7180 - - adi,adv7180cp - - adi,adv7180st - - adi,adv7182 - - adi,adv7280 - - adi,adv7280-m - - adi,adv7281 - - adi,adv7281-m - - adi,adv7281-ma - - adi,adv7282 - - adi,adv7282-m - - reg: - maxItems: 1 - - powerdown-gpios: - maxItems: 1 - - reset-gpios: - maxItems: 1 - - adv,force-bt656-4: - deprecated: true - description: - Indicates that the output is a BT.656-4 compatible stream. - type: boolean - - adi,force-bt656-4: - description: - Indicates that the output is a BT.656-4 compatible stream. - type: boolean - - interrupts: - items: - - description: The GPIO connected to the INTRQ pin. - - port: - $ref: /schemas/graph.yaml#/$defs/port-base - unevaluatedProperties: false - - properties: - endpoint: - $ref: /schemas/media/video-interfaces.yaml# - unevaluatedProperties: false - - ports: true - -additionalProperties: false - -required: - - compatible - - reg - -allOf: - - if: - properties: - compatible: - enum: - - adi,adv7180 - - adi,adv7182 - - adi,adv7280 - - adi,adv7280-m - - adi,adv7281 - - adi,adv7281-m - - adi,adv7281-ma - - adi,adv7282 - - adi,adv7282-m - then: - required: - - port - - - if: - properties: - compatible: - contains: - const: adi,adv7180cp - then: - properties: - ports: - $ref: /schemas/graph.yaml#/properties/ports - properties: - port@3: - $ref: /schemas/graph.yaml#/properties/port - description: Output port - - patternProperties: - "^port@[0-2]$": - $ref: /schemas/graph.yaml#/properties/port - description: Input port - - required: - - port@3 - - required: - - ports - - - if: - properties: - compatible: - contains: - const: adi,adv7180st - then: - properties: - ports: - $ref: /schemas/graph.yaml#/properties/ports - properties: - port@6: - $ref: /schemas/graph.yaml#/properties/port - description: Output port - - patternProperties: - "^port@[0-5]$": - $ref: /schemas/graph.yaml#/properties/port - description: Input port - - required: - - port@6 - - required: - - ports - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - - composite-in@20 { - compatible = "adi,adv7180"; - reg = <0x20>; - - port { - adv7180: endpoint { - bus-width = <8>; - remote-endpoint = <&vin1ep>; - }; - }; - }; - - }; - - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - - composite-in@20 { - compatible = "adi,adv7180cp"; - reg = <0x20>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7180_in: endpoint { - remote-endpoint = <&composite_con_in>; - }; - }; - - port@3 { - reg = <3>; - adv7180_out: endpoint { - remote-endpoint = <&vin4_in>; - }; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/media/i2c/adv7343.txt b/Documentation/devicetree/bindings/media/i2c/adv7343.txt deleted file mode 100644 index 5653bc2428b8..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/adv7343.txt +++ /dev/null @@ -1,48 +0,0 @@ -* Analog Devices adv7343 video encoder - -The ADV7343 are high speed, digital-to-analog video encoders in a 64-lead LQFP -package. Six high speed, 3.3 V, 11-bit video DACs provide support for composite -(CVBS), S-Video (Y-C), and component (YPrPb/RGB) analog outputs in standard -definition (SD), enhanced definition (ED), or high definition (HD) video -formats. - -Required Properties : -- compatible: Must be "adi,adv7343" - -Optional Properties : -- adi,power-mode-sleep-mode: on enable the current consumption is reduced to - micro ampere level. All DACs and the internal PLL - circuit are disabled. -- adi,power-mode-pll-ctrl: PLL and oversampling control. This control allows - internal PLL 1 circuit to be powered down and the - oversampling to be switched off. -- ad,adv7343-power-mode-dac: array configuring the power on/off DAC's 1..6, - 0 = OFF and 1 = ON, Default value when this - property is not specified is <0 0 0 0 0 0>. -- ad,adv7343-sd-config-dac-out: array configure SD DAC Output's 1 and 2, 0 = OFF - and 1 = ON, Default value when this property is - not specified is <0 0>. - -Example: - -i2c0@1c22000 { - ... - ... - - adv7343@2a { - compatible = "adi,adv7343"; - reg = <0x2a>; - - port { - adv7343_1: endpoint { - adi,power-mode-sleep-mode; - adi,power-mode-pll-ctrl; - /* Use DAC1..3, DAC6 */ - adi,dac-enable = <1 1 1 0 0 1>; - /* Use SD DAC output 1 */ - adi,sd-dac-enable = <1 0>; - }; - }; - }; - ... -}; diff --git a/Documentation/devicetree/bindings/media/i2c/adv748x.yaml b/Documentation/devicetree/bindings/media/i2c/adv748x.yaml deleted file mode 100644 index d6353081402b..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/adv748x.yaml +++ /dev/null @@ -1,212 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/media/i2c/adv748x.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Analog Devices ADV748X video decoder with HDMI receiver - -maintainers: - - Kieran Bingham - - Niklas Söderlund - -description: - The ADV7481 and ADV7482 are multi format video decoders with an integrated - HDMI receiver. They can output CSI-2 on two independent outputs TXA and TXB - from three input sources HDMI, analog and TTL. - -properties: - compatible: - items: - - enum: - - adi,adv7481 - - adi,adv7482 - - reg: - minItems: 1 - maxItems: 12 - description: - The ADV748x has up to twelve 256-byte maps that can be accessed via the - main I2C ports. Each map has it own I2C address and acts as a standard - slave device on the I2C bus. The main address is mandatory, others are - optional and remain at default values if not specified. - - reg-names: - minItems: 1 - items: - - const: main - - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] - - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] - - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] - - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] - - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] - - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] - - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] - - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] - - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] - - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] - - enum: [ dpll, cp, hdmi, edid, repeater, infoframe, cbus, cec, sdp, txa, txb ] - - interrupts: true - - interrupt-names: true - - ports: - $ref: /schemas/graph.yaml#/properties/ports - - patternProperties: - "^port@[0-7]$": - $ref: /schemas/graph.yaml#/properties/port - description: Input port nodes for analog inputs AIN[0-7]. - - properties: - port@8: - $ref: /schemas/graph.yaml#/properties/port - description: Input port node for HDMI. - - port@9: - $ref: /schemas/graph.yaml#/properties/port - description: Input port node for TTL. - - port@a: - $ref: /schemas/graph.yaml#/$defs/port-base - unevaluatedProperties: false - description: - Output port node, single endpoint describing the CSI-2 transmitter TXA. - - properties: - endpoint: - $ref: /schemas/media/video-interfaces.yaml# - unevaluatedProperties: false - - properties: - clock-lanes: - maxItems: 1 - - data-lanes: - minItems: 1 - maxItems: 4 - - required: - - clock-lanes - - data-lanes - - port@b: - $ref: /schemas/graph.yaml#/$defs/port-base - unevaluatedProperties: false - description: - Output port node, single endpoint describing the CSI-2 transmitter TXB. - - properties: - endpoint: - $ref: /schemas/media/video-interfaces.yaml# - unevaluatedProperties: false - - properties: - clock-lanes: - maxItems: 1 - - data-lanes: - maxItems: 1 - - required: - - clock-lanes - - data-lanes - -allOf: - - if: - properties: - compatible: - contains: - const: adi,adv7481 - then: - properties: - interrupts: - minItems: 1 - maxItems: 3 - - interrupt-names: - minItems: 1 - maxItems: 3 - items: - enum: [ intrq1, intrq2, intrq3 ] - else: - properties: - interrupts: - minItems: 1 - maxItems: 2 - - interrupt-names: - minItems: 1 - maxItems: 2 - items: - enum: [ intrq1, intrq2 ] - -additionalProperties: false - -required: - - compatible - - reg - - ports - -examples: - - | - #include - - i2c { - #address-cells = <1>; - #size-cells = <0>; - - video-receiver@70 { - compatible = "adi,adv7482"; - reg = <0x70 0x71 0x72 0x73 0x74 0x75 - 0x60 0x61 0x62 0x63 0x64 0x65>; - reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater", - "infoframe", "cbus", "cec", "sdp", "txa", "txb"; - - interrupt-parent = <&gpio6>; - interrupts = <30 IRQ_TYPE_LEVEL_LOW>, <31 IRQ_TYPE_LEVEL_LOW>; - interrupt-names = "intrq1", "intrq2"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@7 { - reg = <7>; - - adv7482_ain7: endpoint { - remote-endpoint = <&cvbs_in>; - }; - }; - - port@8 { - reg = <8>; - - adv7482_hdmi: endpoint { - remote-endpoint = <&hdmi_in>; - }; - }; - - port@a { - reg = <10>; - - adv7482_txa: endpoint { - clock-lanes = <0>; - data-lanes = <1 2 3 4>; - remote-endpoint = <&csi40_in>; - }; - }; - - port@b { - reg = <11>; - - adv7482_txb: endpoint { - clock-lanes = <0>; - data-lanes = <1>; - remote-endpoint = <&csi20_in>; - }; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/media/i2c/adv7604.yaml b/Documentation/devicetree/bindings/media/i2c/adv7604.yaml deleted file mode 100644 index 7589d377c686..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/adv7604.yaml +++ /dev/null @@ -1,160 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/media/i2c/adv7604.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Analog Devices ADV7604/10/11/12 video decoder with HDMI receiver - -maintainers: - - Hans Verkuil - -description: - The ADV7604 and ADV7610/11/12 are multiformat video decoders with - an integrated HDMI receiver. The ADV7604 has four multiplexed HDMI inputs - and one analog input, and the ADV7610/11 have one HDMI input and no analog - input. The ADV7612 is similar to the ADV7610/11 but has 2 HDMI inputs. - - These device tree bindings support the ADV7610/11/12 only at the moment. - -properties: - compatible: - items: - - enum: - - adi,adv7610 - - adi,adv7611 - - adi,adv7612 - - reg: - minItems: 1 - maxItems: 13 - - reg-names: - minItems: 1 - items: - - const: main - - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] - - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] - - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] - - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] - - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] - - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] - - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] - - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] - - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] - - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] - - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] - - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ] - - interrupts: - maxItems: 1 - - reset-gpios: - maxItems: 1 - - hpd-gpios: - minItems: 1 - description: - References to the GPIOs that control the HDMI hot-plug detection pins, - one per HDMI input. The active flag indicates the GPIO level that - enables hot-plug detection. - - default-input: - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [ 0, 1 ] - description: - Select which input is selected after reset. - - ports: true - -required: - - compatible - - reg - - ports - -additionalProperties: false - -allOf: - - if: - properties: - compatible: - contains: - const: adi,adv7611 - then: - properties: - ports: - $ref: /schemas/graph.yaml#/properties/ports - properties: - port@0: - $ref: /schemas/graph.yaml#/properties/port - description: Input port - - port@1: - $ref: /schemas/graph.yaml#/properties/port - description: Output port - - required: - - port@1 - - - if: - properties: - compatible: - contains: - const: adi,adv7612 - then: - properties: - ports: - $ref: /schemas/graph.yaml#/properties/ports - properties: - port@2: - $ref: /schemas/graph.yaml#/properties/port - description: Output port - - patternProperties: - "^port@[0-1]$": - $ref: /schemas/graph.yaml#/properties/port - description: Input port - - required: - - port@2 - -examples: - - | - #include - - i2c { - #address-cells = <1>; - #size-cells = <0>; - - hdmi_receiver@4c { - compatible = "adi,adv7611"; - /* - * The edid page will be accessible @ 0x66 on the I2C bus. All - * other maps will retain their default addresses. - */ - reg = <0x4c>, <0x66>; - reg-names = "main", "edid"; - - reset-gpios = <&ioexp 0 GPIO_ACTIVE_LOW>; - hpd-gpios = <&ioexp 2 GPIO_ACTIVE_HIGH>; - default-input = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - reg = <1>; - hdmi_in: endpoint { - remote-endpoint = <&ccdc_in>; - }; - }; - }; - - - }; - }; diff --git a/Documentation/devicetree/bindings/media/i2c/aptina,mt9v032.txt b/Documentation/devicetree/bindings/media/i2c/aptina,mt9v032.txt new file mode 100644 index 000000000000..100f0ae43269 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/aptina,mt9v032.txt @@ -0,0 +1,41 @@ +* Aptina 1/3-Inch WVGA CMOS Digital Image Sensor + +The Aptina MT9V032 is a 1/3-inch CMOS active pixel digital image sensor with +an active array size of 752H x 480V. It is programmable through a simple +two-wire serial interface. + +Required Properties: + +- compatible: value should be either one among the following + (a) "aptina,mt9v022" for MT9V022 color sensor + (b) "aptina,mt9v022m" for MT9V022 monochrome sensor + (c) "aptina,mt9v024" for MT9V024 color sensor + (d) "aptina,mt9v024m" for MT9V024 monochrome sensor + (e) "aptina,mt9v032" for MT9V032 color sensor + (f) "aptina,mt9v032m" for MT9V032 monochrome sensor + (g) "aptina,mt9v034" for MT9V034 color sensor + (h) "aptina,mt9v034m" for MT9V034 monochrome sensor + +Optional Properties: + +- link-frequencies: List of allowed link frequencies in Hz. Each frequency is + expressed as a 64-bit big-endian integer. +- reset-gpios: GPIO handle which is connected to the reset pin of the chip. +- standby-gpios: GPIO handle which is connected to the standby pin of the chip. + +For further reading on port node refer to +Documentation/devicetree/bindings/media/video-interfaces.txt. + +Example: + + mt9v032@5c { + compatible = "aptina,mt9v032"; + reg = <0x5c>; + + port { + mt9v032_out: endpoint { + link-frequencies = /bits/ 64 + <13000000 26600000 27000000>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/i2c/imx219.yaml b/Documentation/devicetree/bindings/media/i2c/imx219.yaml deleted file mode 100644 index 07d088cf66e0..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/imx219.yaml +++ /dev/null @@ -1,109 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/media/i2c/imx219.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Sony 1/4.0-Inch 8Mpixel CMOS Digital Image Sensor - -maintainers: - - Dave Stevenson - -description: |- - The Sony imx219 is a 1/4.0-inch CMOS active pixel digital image sensor - with an active array size of 3280H x 2464V. It is programmable through - I2C interface. The I2C address is fixed to 0x10 as per sensor data sheet. - Image data is sent through MIPI CSI-2, which is configured as either 2 or - 4 data lanes. - -properties: - compatible: - const: sony,imx219 - - reg: - description: I2C device address - maxItems: 1 - - clocks: - maxItems: 1 - - VDIG-supply: - description: - Digital I/O voltage supply, 1.8 volts - - VANA-supply: - description: - Analog voltage supply, 2.8 volts - - VDDL-supply: - description: - Digital core voltage supply, 1.2 volts - - reset-gpios: - maxItems: 1 - description: |- - Reference to the GPIO connected to the xclr pin, if any. - Must be released (set high) after all supplies are applied. - - port: - $ref: /schemas/graph.yaml#/$defs/port-base - additionalProperties: false - - properties: - endpoint: - $ref: /schemas/media/video-interfaces.yaml# - unevaluatedProperties: false - - properties: - data-lanes: - description: |- - The sensor supports either two-lane, or four-lane operation. - If this property is omitted four-lane operation is assumed. - For two-lane operation the property must be set to <1 2>. - items: - - const: 1 - - const: 2 - - clock-noncontinuous: true - link-frequencies: true - - required: - - link-frequencies - -required: - - compatible - - reg - - clocks - - VANA-supply - - VDIG-supply - - VDDL-supply - - port - -additionalProperties: false - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - - imx219: sensor@10 { - compatible = "sony,imx219"; - reg = <0x10>; - clocks = <&imx219_clk>; - VANA-supply = <&imx219_vana>; /* 2.8v */ - VDIG-supply = <&imx219_vdig>; /* 1.8v */ - VDDL-supply = <&imx219_vddl>; /* 1.2v */ - - port { - imx219_0: endpoint { - remote-endpoint = <&csi1_ep>; - data-lanes = <1 2>; - clock-noncontinuous; - link-frequencies = /bits/ 64 <456000000>; - }; - }; - }; - }; - -... diff --git a/Documentation/devicetree/bindings/media/i2c/max2175.txt b/Documentation/devicetree/bindings/media/i2c/max2175.txt deleted file mode 100644 index 02b4e9cd7b1b..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/max2175.txt +++ /dev/null @@ -1,59 +0,0 @@ -Maxim Integrated MAX2175 RF to Bits tuner ------------------------------------------ - -The MAX2175 IC is an advanced analog/digital hybrid-radio receiver with -RF to Bits® front-end designed for software-defined radio solutions. - -Required properties: --------------------- -- compatible: "maxim,max2175" for MAX2175 RF-to-bits tuner. -- clocks: clock specifier. -- port: child port node corresponding to the I2S output, in accordance with - the video interface bindings defined in - Documentation/devicetree/bindings/media/video-interfaces.txt. The port - node must contain at least one endpoint. - -Optional properties: --------------------- -- maxim,master : phandle to the master tuner if it is a slave. This - is used to define two tuners in diversity mode - (1 master, 1 slave). By default each tuner is an - individual master. -- maxim,refout-load : load capacitance value (in picofarads) on reference - output drive level. The possible load values are: - 0 (default - refout disabled) - 10 - 20 - 30 - 40 - 60 - 70 -- maxim,am-hiz-filter : empty property indicates the AM Hi-Z filter is used - in this hardware for AM antenna input. - -Example: --------- - -Board specific DTS file - -/* Fixed XTAL clock node */ -maxim_xtal: clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <36864000>; -}; - -/* A tuner device instance under i2c bus */ -max2175_0: tuner@60 { - compatible = "maxim,max2175"; - reg = <0x60>; - clocks = <&maxim_xtal>; - maxim,refout-load = <10>; - - port { - max2175_0_ep: endpoint { - remote-endpoint = <&slave_rx_device>; - }; - }; - -}; diff --git a/Documentation/devicetree/bindings/media/i2c/maxim,max2175.txt b/Documentation/devicetree/bindings/media/i2c/maxim,max2175.txt new file mode 100644 index 000000000000..02b4e9cd7b1b --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/maxim,max2175.txt @@ -0,0 +1,59 @@ +Maxim Integrated MAX2175 RF to Bits tuner +----------------------------------------- + +The MAX2175 IC is an advanced analog/digital hybrid-radio receiver with +RF to Bits® front-end designed for software-defined radio solutions. + +Required properties: +-------------------- +- compatible: "maxim,max2175" for MAX2175 RF-to-bits tuner. +- clocks: clock specifier. +- port: child port node corresponding to the I2S output, in accordance with + the video interface bindings defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. The port + node must contain at least one endpoint. + +Optional properties: +-------------------- +- maxim,master : phandle to the master tuner if it is a slave. This + is used to define two tuners in diversity mode + (1 master, 1 slave). By default each tuner is an + individual master. +- maxim,refout-load : load capacitance value (in picofarads) on reference + output drive level. The possible load values are: + 0 (default - refout disabled) + 10 + 20 + 30 + 40 + 60 + 70 +- maxim,am-hiz-filter : empty property indicates the AM Hi-Z filter is used + in this hardware for AM antenna input. + +Example: +-------- + +Board specific DTS file + +/* Fixed XTAL clock node */ +maxim_xtal: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <36864000>; +}; + +/* A tuner device instance under i2c bus */ +max2175_0: tuner@60 { + compatible = "maxim,max2175"; + reg = <0x60>; + clocks = <&maxim_xtal>; + maxim,refout-load = <10>; + + port { + max2175_0_ep: endpoint { + remote-endpoint = <&slave_rx_device>; + }; + }; + +}; diff --git a/Documentation/devicetree/bindings/media/i2c/micron,mt9m111.txt b/Documentation/devicetree/bindings/media/i2c/micron,mt9m111.txt new file mode 100644 index 000000000000..d0bed6fa901a --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/micron,mt9m111.txt @@ -0,0 +1,37 @@ +Micron 1.3Mp CMOS Digital Image Sensor + +The Micron MT9M111 is a CMOS active pixel digital image sensor with an active +array size of 1280H x 1024V. It is programmable through a simple two-wire serial +interface. + +Required Properties: +- compatible: value should be "micron,mt9m111" +- clocks: reference to the master clock. +- clock-names: shall be "mclk". + +The device node must contain one 'port' child node with one 'endpoint' child +sub-node for its digital output video port, in accordance with the video +interface bindings defined in: +Documentation/devicetree/bindings/media/video-interfaces.txt + +Optional endpoint properties: +- pclk-sample: For information see ../video-interfaces.txt. The value is set to + 0 if it isn't specified. + +Example: + + i2c_master { + mt9m111@5d { + compatible = "micron,mt9m111"; + reg = <0x5d>; + clocks = <&mclk>; + clock-names = "mclk"; + + port { + mt9m111_1: endpoint { + remote-endpoint = <&pxa_camera>; + pclk-sample = <1>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/i2c/mt9m001.txt b/Documentation/devicetree/bindings/media/i2c/mt9m001.txt deleted file mode 100644 index c920552b03ef..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/mt9m001.txt +++ /dev/null @@ -1,38 +0,0 @@ -MT9M001: 1/2-Inch Megapixel Digital Image Sensor - -The MT9M001 is an SXGA-format with a 1/2-inch CMOS active-pixel digital -image sensor. It is programmable through I2C interface. - -Required Properties: - -- compatible: shall be "onnn,mt9m001". -- clocks: reference to the master clock into sensor - -Optional Properties: - -- reset-gpios: GPIO handle which is connected to the reset pin of the chip. - Active low. -- standby-gpios: GPIO handle which is connected to the standby pin of the chip. - Active high. - -The device node must contain one 'port' child node with one 'endpoint' child -sub-node for its digital output video port, in accordance with the video -interface bindings defined in: -Documentation/devicetree/bindings/media/video-interfaces.txt - -Example: - - &i2c1 { - camera-sensor@5d { - compatible = "onnn,mt9m001"; - reg = <0x5d>; - reset-gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; - standby-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; - clocks = <&camera_clk>; - port { - mt9m001_out: endpoint { - remote-endpoint = <&vcap_in>; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/media/i2c/mt9m111.txt b/Documentation/devicetree/bindings/media/i2c/mt9m111.txt deleted file mode 100644 index d0bed6fa901a..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/mt9m111.txt +++ /dev/null @@ -1,37 +0,0 @@ -Micron 1.3Mp CMOS Digital Image Sensor - -The Micron MT9M111 is a CMOS active pixel digital image sensor with an active -array size of 1280H x 1024V. It is programmable through a simple two-wire serial -interface. - -Required Properties: -- compatible: value should be "micron,mt9m111" -- clocks: reference to the master clock. -- clock-names: shall be "mclk". - -The device node must contain one 'port' child node with one 'endpoint' child -sub-node for its digital output video port, in accordance with the video -interface bindings defined in: -Documentation/devicetree/bindings/media/video-interfaces.txt - -Optional endpoint properties: -- pclk-sample: For information see ../video-interfaces.txt. The value is set to - 0 if it isn't specified. - -Example: - - i2c_master { - mt9m111@5d { - compatible = "micron,mt9m111"; - reg = <0x5d>; - clocks = <&mclk>; - clock-names = "mclk"; - - port { - mt9m111_1: endpoint { - remote-endpoint = <&pxa_camera>; - pclk-sample = <1>; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/media/i2c/mt9v032.txt b/Documentation/devicetree/bindings/media/i2c/mt9v032.txt deleted file mode 100644 index 100f0ae43269..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/mt9v032.txt +++ /dev/null @@ -1,41 +0,0 @@ -* Aptina 1/3-Inch WVGA CMOS Digital Image Sensor - -The Aptina MT9V032 is a 1/3-inch CMOS active pixel digital image sensor with -an active array size of 752H x 480V. It is programmable through a simple -two-wire serial interface. - -Required Properties: - -- compatible: value should be either one among the following - (a) "aptina,mt9v022" for MT9V022 color sensor - (b) "aptina,mt9v022m" for MT9V022 monochrome sensor - (c) "aptina,mt9v024" for MT9V024 color sensor - (d) "aptina,mt9v024m" for MT9V024 monochrome sensor - (e) "aptina,mt9v032" for MT9V032 color sensor - (f) "aptina,mt9v032m" for MT9V032 monochrome sensor - (g) "aptina,mt9v034" for MT9V034 color sensor - (h) "aptina,mt9v034m" for MT9V034 monochrome sensor - -Optional Properties: - -- link-frequencies: List of allowed link frequencies in Hz. Each frequency is - expressed as a 64-bit big-endian integer. -- reset-gpios: GPIO handle which is connected to the reset pin of the chip. -- standby-gpios: GPIO handle which is connected to the standby pin of the chip. - -For further reading on port node refer to -Documentation/devicetree/bindings/media/video-interfaces.txt. - -Example: - - mt9v032@5c { - compatible = "aptina,mt9v032"; - reg = <0x5c>; - - port { - mt9v032_out: endpoint { - link-frequencies = /bits/ 64 - <13000000 26600000 27000000>; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/media/i2c/nxp,tda1997x.txt b/Documentation/devicetree/bindings/media/i2c/nxp,tda1997x.txt new file mode 100644 index 000000000000..e76167999d76 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/nxp,tda1997x.txt @@ -0,0 +1,178 @@ +Device-Tree bindings for the NXP TDA1997x HDMI receiver + +The TDA19971/73 are HDMI video receivers. + +The TDA19971 Video port output pins can be used as follows: + - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4] + - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4] + - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4] + - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2] + - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0] + - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles) + - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles) + - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles) + +The TDA19973 Video port output pins can be used as follows: + - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0] + - YUV444 12bit per color (36 bits total): Y[11:0] Cb[11:0] Cr[11:0] + - YUV422 semi-planar 12bit per component (24 bits total): Y[11:0] CbCr[11:0] + - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles) + +The Video port output pins are mapped via 4-bit 'pin groups' allowing +for a variety of connection possibilities including swapping pin order within +pin groups. The video_portcfg device-tree property consists of register mapping +pairs which map a chip-specific VP output register to a 4-bit pin group. If +the pin group needs to be bit-swapped you can use the *_S pin-group defines. + +Required Properties: + - compatible : + - "nxp,tda19971" for the TDA19971 + - "nxp,tda19973" for the TDA19973 + - reg : I2C slave address + - interrupts : The interrupt number + - DOVDD-supply : Digital I/O supply + - DVDD-supply : Digital Core supply + - AVDD-supply : Analog supply + - nxp,vidout-portcfg : array of pairs mapping VP output pins to pin groups. + +Optional Properties: + - nxp,audout-format : DAI bus format: "i2s" or "spdif". + - nxp,audout-width : width of audio output data bus (1-4). + - nxp,audout-layout : data layout (0=AP0 used, 1=AP0/AP1/AP2/AP3 used). + - nxp,audout-mclk-fs : Multiplication factor between stream rate and codec + mclk. + +The port node shall contain one endpoint child node for its digital +output video port, in accordance with the video interface bindings defined in +Documentation/devicetree/bindings/media/video-interfaces.txt. + +Optional Endpoint Properties: + The following three properties are defined in video-interfaces.txt and + are valid for the output parallel bus endpoint: + - hsync-active: Horizontal synchronization polarity. Defaults to active high. + - vsync-active: Vertical synchronization polarity. Defaults to active high. + - data-active: Data polarity. Defaults to active high. + +Examples: + - VP[15:0] connected to IMX6 CSI_DATA[19:4] for 16bit YUV422 + 16bit I2S layout0 with a 128*fs clock (A_WS, AP0, A_CLK pins) + hdmi-receiver@48 { + compatible = "nxp,tda19971"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tda1997x>; + reg = <0x48>; + interrupt-parent = <&gpio1>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + DOVDD-supply = <®_3p3v>; + AVDD-supply = <®_1p8v>; + DVDD-supply = <®_1p8v>; + /* audio */ + #sound-dai-cells = <0>; + nxp,audout-format = "i2s"; + nxp,audout-layout = <0>; + nxp,audout-width = <16>; + nxp,audout-mclk-fs = <128>; + /* + * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4] + * and Y[11:4] across 16bits in the same pixclk cycle. + */ + nxp,vidout-portcfg = + /* Y[11:8]<->VP[15:12]<->CSI_DATA[19:16] */ + < TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >, + /* Y[7:4]<->VP[11:08]<->CSI_DATA[15:12] */ + < TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >, + /* CbCc[11:8]<->VP[07:04]<->CSI_DATA[11:8] */ + < TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >, + /* CbCr[7:4]<->VP[03:00]<->CSI_DATA[7:4] */ + < TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >; + + port { + tda1997x_to_ipu1_csi0_mux: endpoint { + remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; + bus-width = <16>; + hsync-active = <1>; + vsync-active = <1>; + data-active = <1>; + }; + }; + }; + - VP[15:8] connected to IMX6 CSI_DATA[19:12] for 8bit BT656 + 16bit I2S layout0 with a 128*fs clock (A_WS, AP0, A_CLK pins) + hdmi-receiver@48 { + compatible = "nxp,tda19971"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tda1997x>; + reg = <0x48>; + interrupt-parent = <&gpio1>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + DOVDD-supply = <®_3p3v>; + AVDD-supply = <®_1p8v>; + DVDD-supply = <®_1p8v>; + /* audio */ + #sound-dai-cells = <0>; + nxp,audout-format = "i2s"; + nxp,audout-layout = <0>; + nxp,audout-width = <16>; + nxp,audout-mclk-fs = <128>; + /* + * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4] + * and Y[11:4] across 16bits in the same pixclk cycle. + */ + nxp,vidout-portcfg = + /* Y[11:8]<->VP[15:12]<->CSI_DATA[19:16] */ + < TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >, + /* Y[7:4]<->VP[11:08]<->CSI_DATA[15:12] */ + < TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >, + /* CbCc[11:8]<->VP[07:04]<->CSI_DATA[11:8] */ + < TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >, + /* CbCr[7:4]<->VP[03:00]<->CSI_DATA[7:4] */ + < TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >; + + port { + tda1997x_to_ipu1_csi0_mux: endpoint { + remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; + bus-width = <16>; + hsync-active = <1>; + vsync-active = <1>; + data-active = <1>; + }; + }; + }; + - VP[15:8] connected to IMX6 CSI_DATA[19:12] for 8bit BT656 + 16bit I2S layout0 with a 128*fs clock (A_WS, AP0, A_CLK pins) + hdmi-receiver@48 { + compatible = "nxp,tda19971"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tda1997x>; + reg = <0x48>; + interrupt-parent = <&gpio1>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + DOVDD-supply = <®_3p3v>; + AVDD-supply = <®_1p8v>; + DVDD-supply = <®_1p8v>; + /* audio */ + #sound-dai-cells = <0>; + nxp,audout-format = "i2s"; + nxp,audout-layout = <0>; + nxp,audout-width = <16>; + nxp,audout-mclk-fs = <128>; + /* + * The 8bpp BT656 mode outputs YCbCr[11:4] across 8bits over + * 2 pixclk cycles. + */ + nxp,vidout-portcfg = + /* YCbCr[11:8]<->VP[15:12]<->CSI_DATA[19:16] */ + < TDA1997X_VP24_V15_12 TDA1997X_R_CR_CBCR_11_8 >, + /* YCbCr[7:4]<->VP[11:08]<->CSI_DATA[15:12] */ + < TDA1997X_VP24_V11_08 TDA1997X_R_CR_CBCR_7_4 >, + + port { + tda1997x_to_ipu1_csi0_mux: endpoint { + remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; + bus-width = <16>; + hsync-active = <1>; + vsync-active = <1>; + data-active = <1>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/i2c/onnn,mt9m001.txt b/Documentation/devicetree/bindings/media/i2c/onnn,mt9m001.txt new file mode 100644 index 000000000000..c920552b03ef --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/onnn,mt9m001.txt @@ -0,0 +1,38 @@ +MT9M001: 1/2-Inch Megapixel Digital Image Sensor + +The MT9M001 is an SXGA-format with a 1/2-inch CMOS active-pixel digital +image sensor. It is programmable through I2C interface. + +Required Properties: + +- compatible: shall be "onnn,mt9m001". +- clocks: reference to the master clock into sensor + +Optional Properties: + +- reset-gpios: GPIO handle which is connected to the reset pin of the chip. + Active low. +- standby-gpios: GPIO handle which is connected to the standby pin of the chip. + Active high. + +The device node must contain one 'port' child node with one 'endpoint' child +sub-node for its digital output video port, in accordance with the video +interface bindings defined in: +Documentation/devicetree/bindings/media/video-interfaces.txt + +Example: + + &i2c1 { + camera-sensor@5d { + compatible = "onnn,mt9m001"; + reg = <0x5d>; + reset-gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + standby-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; + clocks = <&camera_clk>; + port { + mt9m001_out: endpoint { + remote-endpoint = <&vcap_in>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/i2c/ov2640.txt b/Documentation/devicetree/bindings/media/i2c/ov2640.txt deleted file mode 100644 index 989ce6cb6ac3..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/ov2640.txt +++ /dev/null @@ -1,41 +0,0 @@ -* Omnivision OV2640 CMOS sensor - -The Omnivision OV2640 sensor supports multiple resolutions output, such as -CIF, SVGA, UXGA. It also can support the YUV422/420, RGB565/555 or raw RGB -output formats. - -Required Properties: -- compatible: should be "ovti,ov2640" -- clocks: reference to the xvclk input clock. -- clock-names: should be "xvclk". - -Optional Properties: -- resetb-gpios: reference to the GPIO connected to the resetb pin, if any. -- pwdn-gpios: reference to the GPIO connected to the pwdn pin, if any. - -The device node must contain one 'port' child node for its digital output -video port, in accordance with the video interface bindings defined in -Documentation/devicetree/bindings/media/video-interfaces.txt. - -Example: - - i2c1: i2c@f0018000 { - ov2640: camera@30 { - compatible = "ovti,ov2640"; - reg = <0x30>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pck0_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>; - resetb-gpios = <&pioE 11 GPIO_ACTIVE_LOW>; - pwdn-gpios = <&pioE 13 GPIO_ACTIVE_HIGH>; - clocks = <&pck0>; - clock-names = "xvclk"; - assigned-clocks = <&pck0>; - assigned-clock-rates = <25000000>; - - port { - ov2640_0: endpoint { - remote-endpoint = <&isi_0>; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/media/i2c/ov2659.txt b/Documentation/devicetree/bindings/media/i2c/ov2659.txt deleted file mode 100644 index 92989a619f29..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/ov2659.txt +++ /dev/null @@ -1,47 +0,0 @@ -* OV2659 1/5-Inch 2Mp SOC Camera - -The Omnivision OV2659 is a 1/5-inch SOC camera, with an active array size of -1632H x 1212V. It is programmable through a SCCB. The OV2659 sensor supports -multiple resolutions output, such as UXGA, SVGA, 720p. It also can support -YUV422, RGB565/555 or raw RGB output formats. - -Required Properties: -- compatible: Must be "ovti,ov2659" -- reg: I2C slave address -- clocks: reference to the xvclk input clock. -- clock-names: should be "xvclk". -- link-frequencies: target pixel clock frequency. - -Optional Properties: -- powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any. - Active high with internal pull down resistor. -- reset-gpios: reference to the GPIO connected to the resetb pin, if any. - Active low with internal pull up resistor. - -For further reading on port node refer to -Documentation/devicetree/bindings/media/video-interfaces.txt. - -Example: - - i2c0@1c22000 { - ... - ... - ov2659@30 { - compatible = "ovti,ov2659"; - reg = <0x30>; - - clocks = <&clk_ov2659 0>; - clock-names = "xvclk"; - - powerdown-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>; - - port { - ov2659_0: endpoint { - remote-endpoint = <&vpfe_ep>; - link-frequencies = /bits/ 64 <70000000>; - }; - }; - }; - ... - }; diff --git a/Documentation/devicetree/bindings/media/i2c/ov7670.txt b/Documentation/devicetree/bindings/media/i2c/ov7670.txt deleted file mode 100644 index 2c972a56f3cb..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/ov7670.txt +++ /dev/null @@ -1,55 +0,0 @@ -* Omnivision OV7670 CMOS sensor - -The Omnivision OV7670 sensor supports multiple resolutions output, such as -CIF, SVGA, UXGA. It also can support the YUV422/420, RGB565/555 or raw RGB -output formats. - -Required Properties: -- compatible: should be "ovti,ov7670" -- clocks: reference to the xclk input clock. -- clock-names: should be "xclk". - -Required Endpoint Properties: -- hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively. -- vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively. - -Optional Properties: -- reset-gpios: reference to the GPIO connected to the resetb pin, if any. - Active is low. -- powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any. - Active is high. -- ov7670,pclk-hb-disable: a boolean property to suppress pixel clock output - signal during horizontal blankings. - -The device node must contain one 'port' child node with one 'endpoint' child -sub-node for its digital output video port, in accordance with the video -interface bindings defined in: -Documentation/devicetree/bindings/media/video-interfaces.txt. - -Example: - - i2c1: i2c@f0018000 { - ov7670: camera@21 { - compatible = "ovti,ov7670"; - reg = <0x21>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pck0_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>; - reset-gpios = <&pioE 11 GPIO_ACTIVE_LOW>; - powerdown-gpios = <&pioE 13 GPIO_ACTIVE_HIGH>; - clocks = <&pck0>; - clock-names = "xclk"; - assigned-clocks = <&pck0>; - assigned-clock-rates = <25000000>; - - ov7670,pclk-hb-disable; - - port { - ov7670_0: endpoint { - hsync-active = <0>; - vsync-active = <0>; - - remote-endpoint = <&isi_0>; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/media/i2c/ov7740.txt b/Documentation/devicetree/bindings/media/i2c/ov7740.txt deleted file mode 100644 index af781c3a5f0e..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/ov7740.txt +++ /dev/null @@ -1,47 +0,0 @@ -* Omnivision OV7740 CMOS image sensor - -The Omnivision OV7740 image sensor supports multiple output image -size, such as VGA, and QVGA, CIF and any size smaller. It also -supports the RAW RGB and YUV output formats. - -The common video interfaces bindings (see video-interfaces.txt) should -be used to specify link to the image data receiver. The OV7740 device -node should contain one 'port' child node with an 'endpoint' subnode. - -Required Properties: -- compatible: "ovti,ov7740". -- reg: I2C slave address of the sensor. -- clocks: Reference to the xvclk input clock. -- clock-names: "xvclk". - -Optional Properties: -- reset-gpios: Rreference to the GPIO connected to the reset_b pin, - if any. Active low with pull-ip resistor. -- powerdown-gpios: Reference to the GPIO connected to the pwdn pin, - if any. Active high with pull-down resistor. - -Endpoint node mandatory properties: -- remote-endpoint: A phandle to the bus receiver's endpoint node. - -Example: - - i2c1: i2c@fc028000 { - ov7740: camera@21 { - compatible = "ovti,ov7740"; - reg = <0x21>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sensor_power &pinctrl_sensor_reset>; - clocks = <&isc>; - clock-names = "xvclk"; - assigned-clocks = <&isc>; - assigned-clock-rates = <24000000>; - reset-gpios = <&pioA 43 GPIO_ACTIVE_LOW>; - powerdown-gpios = <&pioA 44 GPIO_ACTIVE_HIGH>; - - port { - ov7740_0: endpoint { - remote-endpoint = <&isc_0>; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/media/i2c/ov9650.txt b/Documentation/devicetree/bindings/media/i2c/ov9650.txt deleted file mode 100644 index 506dfc52872a..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/ov9650.txt +++ /dev/null @@ -1,36 +0,0 @@ -* Omnivision OV9650/OV9652 CMOS sensor - -Required Properties: -- compatible: shall be one of - "ovti,ov9650" - "ovti,ov9652" -- clocks: reference to the xvclk input clock. - -Optional Properties: -- reset-gpios: reference to the GPIO connected to the resetb pin, if any. - Active is high. -- powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any. - Active is high. - -The device node shall contain one 'port' child node with one child 'endpoint' -subnode for its digital output video port, in accordance with the video -interface bindings defined in Documentation/devicetree/bindings/media/ -video-interfaces.txt. - -Example: - -&i2c0 { - ov9650: camera@30 { - compatible = "ovti,ov9650"; - reg = <0x30>; - reset-gpios = <&axi_gpio_0 0 GPIO_ACTIVE_HIGH>; - powerdown-gpios = <&axi_gpio_0 1 GPIO_ACTIVE_HIGH>; - clocks = <&xclk>; - - port { - ov9650_0: endpoint { - remote-endpoint = <&vcap1_in0>; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov2640.txt b/Documentation/devicetree/bindings/media/i2c/ovti,ov2640.txt new file mode 100644 index 000000000000..989ce6cb6ac3 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov2640.txt @@ -0,0 +1,41 @@ +* Omnivision OV2640 CMOS sensor + +The Omnivision OV2640 sensor supports multiple resolutions output, such as +CIF, SVGA, UXGA. It also can support the YUV422/420, RGB565/555 or raw RGB +output formats. + +Required Properties: +- compatible: should be "ovti,ov2640" +- clocks: reference to the xvclk input clock. +- clock-names: should be "xvclk". + +Optional Properties: +- resetb-gpios: reference to the GPIO connected to the resetb pin, if any. +- pwdn-gpios: reference to the GPIO connected to the pwdn pin, if any. + +The device node must contain one 'port' child node for its digital output +video port, in accordance with the video interface bindings defined in +Documentation/devicetree/bindings/media/video-interfaces.txt. + +Example: + + i2c1: i2c@f0018000 { + ov2640: camera@30 { + compatible = "ovti,ov2640"; + reg = <0x30>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pck0_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>; + resetb-gpios = <&pioE 11 GPIO_ACTIVE_LOW>; + pwdn-gpios = <&pioE 13 GPIO_ACTIVE_HIGH>; + clocks = <&pck0>; + clock-names = "xvclk"; + assigned-clocks = <&pck0>; + assigned-clock-rates = <25000000>; + + port { + ov2640_0: endpoint { + remote-endpoint = <&isi_0>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov2659.txt b/Documentation/devicetree/bindings/media/i2c/ovti,ov2659.txt new file mode 100644 index 000000000000..92989a619f29 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov2659.txt @@ -0,0 +1,47 @@ +* OV2659 1/5-Inch 2Mp SOC Camera + +The Omnivision OV2659 is a 1/5-inch SOC camera, with an active array size of +1632H x 1212V. It is programmable through a SCCB. The OV2659 sensor supports +multiple resolutions output, such as UXGA, SVGA, 720p. It also can support +YUV422, RGB565/555 or raw RGB output formats. + +Required Properties: +- compatible: Must be "ovti,ov2659" +- reg: I2C slave address +- clocks: reference to the xvclk input clock. +- clock-names: should be "xvclk". +- link-frequencies: target pixel clock frequency. + +Optional Properties: +- powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any. + Active high with internal pull down resistor. +- reset-gpios: reference to the GPIO connected to the resetb pin, if any. + Active low with internal pull up resistor. + +For further reading on port node refer to +Documentation/devicetree/bindings/media/video-interfaces.txt. + +Example: + + i2c0@1c22000 { + ... + ... + ov2659@30 { + compatible = "ovti,ov2659"; + reg = <0x30>; + + clocks = <&clk_ov2659 0>; + clock-names = "xvclk"; + + powerdown-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>; + + port { + ov2659_0: endpoint { + remote-endpoint = <&vpfe_ep>; + link-frequencies = /bits/ 64 <70000000>; + }; + }; + }; + ... + }; diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov7670.txt b/Documentation/devicetree/bindings/media/i2c/ovti,ov7670.txt new file mode 100644 index 000000000000..2c972a56f3cb --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov7670.txt @@ -0,0 +1,55 @@ +* Omnivision OV7670 CMOS sensor + +The Omnivision OV7670 sensor supports multiple resolutions output, such as +CIF, SVGA, UXGA. It also can support the YUV422/420, RGB565/555 or raw RGB +output formats. + +Required Properties: +- compatible: should be "ovti,ov7670" +- clocks: reference to the xclk input clock. +- clock-names: should be "xclk". + +Required Endpoint Properties: +- hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively. +- vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively. + +Optional Properties: +- reset-gpios: reference to the GPIO connected to the resetb pin, if any. + Active is low. +- powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any. + Active is high. +- ov7670,pclk-hb-disable: a boolean property to suppress pixel clock output + signal during horizontal blankings. + +The device node must contain one 'port' child node with one 'endpoint' child +sub-node for its digital output video port, in accordance with the video +interface bindings defined in: +Documentation/devicetree/bindings/media/video-interfaces.txt. + +Example: + + i2c1: i2c@f0018000 { + ov7670: camera@21 { + compatible = "ovti,ov7670"; + reg = <0x21>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pck0_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>; + reset-gpios = <&pioE 11 GPIO_ACTIVE_LOW>; + powerdown-gpios = <&pioE 13 GPIO_ACTIVE_HIGH>; + clocks = <&pck0>; + clock-names = "xclk"; + assigned-clocks = <&pck0>; + assigned-clock-rates = <25000000>; + + ov7670,pclk-hb-disable; + + port { + ov7670_0: endpoint { + hsync-active = <0>; + vsync-active = <0>; + + remote-endpoint = <&isi_0>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov7740.txt b/Documentation/devicetree/bindings/media/i2c/ovti,ov7740.txt new file mode 100644 index 000000000000..af781c3a5f0e --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov7740.txt @@ -0,0 +1,47 @@ +* Omnivision OV7740 CMOS image sensor + +The Omnivision OV7740 image sensor supports multiple output image +size, such as VGA, and QVGA, CIF and any size smaller. It also +supports the RAW RGB and YUV output formats. + +The common video interfaces bindings (see video-interfaces.txt) should +be used to specify link to the image data receiver. The OV7740 device +node should contain one 'port' child node with an 'endpoint' subnode. + +Required Properties: +- compatible: "ovti,ov7740". +- reg: I2C slave address of the sensor. +- clocks: Reference to the xvclk input clock. +- clock-names: "xvclk". + +Optional Properties: +- reset-gpios: Rreference to the GPIO connected to the reset_b pin, + if any. Active low with pull-ip resistor. +- powerdown-gpios: Reference to the GPIO connected to the pwdn pin, + if any. Active high with pull-down resistor. + +Endpoint node mandatory properties: +- remote-endpoint: A phandle to the bus receiver's endpoint node. + +Example: + + i2c1: i2c@fc028000 { + ov7740: camera@21 { + compatible = "ovti,ov7740"; + reg = <0x21>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sensor_power &pinctrl_sensor_reset>; + clocks = <&isc>; + clock-names = "xvclk"; + assigned-clocks = <&isc>; + assigned-clock-rates = <24000000>; + reset-gpios = <&pioA 43 GPIO_ACTIVE_LOW>; + powerdown-gpios = <&pioA 44 GPIO_ACTIVE_HIGH>; + + port { + ov7740_0: endpoint { + remote-endpoint = <&isc_0>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov9650.txt b/Documentation/devicetree/bindings/media/i2c/ovti,ov9650.txt new file mode 100644 index 000000000000..506dfc52872a --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov9650.txt @@ -0,0 +1,36 @@ +* Omnivision OV9650/OV9652 CMOS sensor + +Required Properties: +- compatible: shall be one of + "ovti,ov9650" + "ovti,ov9652" +- clocks: reference to the xvclk input clock. + +Optional Properties: +- reset-gpios: reference to the GPIO connected to the resetb pin, if any. + Active is high. +- powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any. + Active is high. + +The device node shall contain one 'port' child node with one child 'endpoint' +subnode for its digital output video port, in accordance with the video +interface bindings defined in Documentation/devicetree/bindings/media/ +video-interfaces.txt. + +Example: + +&i2c0 { + ov9650: camera@30 { + compatible = "ovti,ov9650"; + reg = <0x30>; + reset-gpios = <&axi_gpio_0 0 GPIO_ACTIVE_HIGH>; + powerdown-gpios = <&axi_gpio_0 1 GPIO_ACTIVE_HIGH>; + clocks = <&xclk>; + + port { + ov9650_0: endpoint { + remote-endpoint = <&vcap1_in0>; + }; + }; + }; +}; diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx219.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx219.yaml new file mode 100644 index 000000000000..8b23e5fc6a24 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/sony,imx219.yaml @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/sony,imx219.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sony 1/4.0-Inch 8Mpixel CMOS Digital Image Sensor + +maintainers: + - Dave Stevenson + +description: |- + The Sony imx219 is a 1/4.0-inch CMOS active pixel digital image sensor + with an active array size of 3280H x 2464V. It is programmable through + I2C interface. The I2C address is fixed to 0x10 as per sensor data sheet. + Image data is sent through MIPI CSI-2, which is configured as either 2 or + 4 data lanes. + +properties: + compatible: + const: sony,imx219 + + reg: + description: I2C device address + maxItems: 1 + + clocks: + maxItems: 1 + + VDIG-supply: + description: + Digital I/O voltage supply, 1.8 volts + + VANA-supply: + description: + Analog voltage supply, 2.8 volts + + VDDL-supply: + description: + Digital core voltage supply, 1.2 volts + + reset-gpios: + maxItems: 1 + description: |- + Reference to the GPIO connected to the xclr pin, if any. + Must be released (set high) after all supplies are applied. + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + description: |- + The sensor supports either two-lane, or four-lane operation. + If this property is omitted four-lane operation is assumed. + For two-lane operation the property must be set to <1 2>. + items: + - const: 1 + - const: 2 + + clock-noncontinuous: true + link-frequencies: true + + required: + - link-frequencies + +required: + - compatible + - reg + - clocks + - VANA-supply + - VDIG-supply + - VDDL-supply + - port + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + imx219: sensor@10 { + compatible = "sony,imx219"; + reg = <0x10>; + clocks = <&imx219_clk>; + VANA-supply = <&imx219_vana>; /* 2.8v */ + VDIG-supply = <&imx219_vdig>; /* 1.8v */ + VDDL-supply = <&imx219_vddl>; /* 1.2v */ + + port { + imx219_0: endpoint { + remote-endpoint = <&csi1_ep>; + data-lanes = <1 2>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <456000000>; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/media/i2c/tc358743.txt b/Documentation/devicetree/bindings/media/i2c/tc358743.txt deleted file mode 100644 index 59102edcf01e..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/tc358743.txt +++ /dev/null @@ -1,48 +0,0 @@ -* Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge - -The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts -a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C. - -Required Properties: - -- compatible: value should be "toshiba,tc358743" -- clocks, clock-names: should contain a phandle link to the reference clock - source, the clock input is named "refclk". - -Optional Properties: - -- reset-gpios: gpio phandle GPIO connected to the reset pin -- interrupts: GPIO connected to the interrupt pin -- data-lanes: should be <1 2 3 4> for four-lane operation, - or <1 2> for two-lane operation -- clock-lanes: should be <0> -- clock-noncontinuous: Presence of this boolean property decides whether the - MIPI CSI-2 clock is continuous or non-continuous. -- link-frequencies: List of allowed link frequencies in Hz. Each frequency is - expressed as a 64-bit big-endian integer. The frequency - is half of the bps per lane due to DDR transmission. - -For further information on the MIPI CSI-2 endpoint node properties, see -Documentation/devicetree/bindings/media/video-interfaces.txt. - -Example: - - tc358743@f { - compatible = "toshiba,tc358743"; - reg = <0x0f>; - clocks = <&hdmi_osc>; - clock-names = "refclk"; - reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>; - interrupt-parent = <&gpio2>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; - - port { - tc358743_out: endpoint { - remote-endpoint = <&mipi_csi2_in>; - data-lanes = <1 2 3 4>; - clock-lanes = <0>; - clock-noncontinuous; - link-frequencies = /bits/ 64 <297000000>; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/media/i2c/tda1997x.txt b/Documentation/devicetree/bindings/media/i2c/tda1997x.txt deleted file mode 100644 index e76167999d76..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/tda1997x.txt +++ /dev/null @@ -1,178 +0,0 @@ -Device-Tree bindings for the NXP TDA1997x HDMI receiver - -The TDA19971/73 are HDMI video receivers. - -The TDA19971 Video port output pins can be used as follows: - - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4] - - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4] - - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4] - - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2] - - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0] - - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles) - - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles) - - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles) - -The TDA19973 Video port output pins can be used as follows: - - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0] - - YUV444 12bit per color (36 bits total): Y[11:0] Cb[11:0] Cr[11:0] - - YUV422 semi-planar 12bit per component (24 bits total): Y[11:0] CbCr[11:0] - - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles) - -The Video port output pins are mapped via 4-bit 'pin groups' allowing -for a variety of connection possibilities including swapping pin order within -pin groups. The video_portcfg device-tree property consists of register mapping -pairs which map a chip-specific VP output register to a 4-bit pin group. If -the pin group needs to be bit-swapped you can use the *_S pin-group defines. - -Required Properties: - - compatible : - - "nxp,tda19971" for the TDA19971 - - "nxp,tda19973" for the TDA19973 - - reg : I2C slave address - - interrupts : The interrupt number - - DOVDD-supply : Digital I/O supply - - DVDD-supply : Digital Core supply - - AVDD-supply : Analog supply - - nxp,vidout-portcfg : array of pairs mapping VP output pins to pin groups. - -Optional Properties: - - nxp,audout-format : DAI bus format: "i2s" or "spdif". - - nxp,audout-width : width of audio output data bus (1-4). - - nxp,audout-layout : data layout (0=AP0 used, 1=AP0/AP1/AP2/AP3 used). - - nxp,audout-mclk-fs : Multiplication factor between stream rate and codec - mclk. - -The port node shall contain one endpoint child node for its digital -output video port, in accordance with the video interface bindings defined in -Documentation/devicetree/bindings/media/video-interfaces.txt. - -Optional Endpoint Properties: - The following three properties are defined in video-interfaces.txt and - are valid for the output parallel bus endpoint: - - hsync-active: Horizontal synchronization polarity. Defaults to active high. - - vsync-active: Vertical synchronization polarity. Defaults to active high. - - data-active: Data polarity. Defaults to active high. - -Examples: - - VP[15:0] connected to IMX6 CSI_DATA[19:4] for 16bit YUV422 - 16bit I2S layout0 with a 128*fs clock (A_WS, AP0, A_CLK pins) - hdmi-receiver@48 { - compatible = "nxp,tda19971"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_tda1997x>; - reg = <0x48>; - interrupt-parent = <&gpio1>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - DOVDD-supply = <®_3p3v>; - AVDD-supply = <®_1p8v>; - DVDD-supply = <®_1p8v>; - /* audio */ - #sound-dai-cells = <0>; - nxp,audout-format = "i2s"; - nxp,audout-layout = <0>; - nxp,audout-width = <16>; - nxp,audout-mclk-fs = <128>; - /* - * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4] - * and Y[11:4] across 16bits in the same pixclk cycle. - */ - nxp,vidout-portcfg = - /* Y[11:8]<->VP[15:12]<->CSI_DATA[19:16] */ - < TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >, - /* Y[7:4]<->VP[11:08]<->CSI_DATA[15:12] */ - < TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >, - /* CbCc[11:8]<->VP[07:04]<->CSI_DATA[11:8] */ - < TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >, - /* CbCr[7:4]<->VP[03:00]<->CSI_DATA[7:4] */ - < TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >; - - port { - tda1997x_to_ipu1_csi0_mux: endpoint { - remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; - bus-width = <16>; - hsync-active = <1>; - vsync-active = <1>; - data-active = <1>; - }; - }; - }; - - VP[15:8] connected to IMX6 CSI_DATA[19:12] for 8bit BT656 - 16bit I2S layout0 with a 128*fs clock (A_WS, AP0, A_CLK pins) - hdmi-receiver@48 { - compatible = "nxp,tda19971"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_tda1997x>; - reg = <0x48>; - interrupt-parent = <&gpio1>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - DOVDD-supply = <®_3p3v>; - AVDD-supply = <®_1p8v>; - DVDD-supply = <®_1p8v>; - /* audio */ - #sound-dai-cells = <0>; - nxp,audout-format = "i2s"; - nxp,audout-layout = <0>; - nxp,audout-width = <16>; - nxp,audout-mclk-fs = <128>; - /* - * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4] - * and Y[11:4] across 16bits in the same pixclk cycle. - */ - nxp,vidout-portcfg = - /* Y[11:8]<->VP[15:12]<->CSI_DATA[19:16] */ - < TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >, - /* Y[7:4]<->VP[11:08]<->CSI_DATA[15:12] */ - < TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >, - /* CbCc[11:8]<->VP[07:04]<->CSI_DATA[11:8] */ - < TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >, - /* CbCr[7:4]<->VP[03:00]<->CSI_DATA[7:4] */ - < TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >; - - port { - tda1997x_to_ipu1_csi0_mux: endpoint { - remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; - bus-width = <16>; - hsync-active = <1>; - vsync-active = <1>; - data-active = <1>; - }; - }; - }; - - VP[15:8] connected to IMX6 CSI_DATA[19:12] for 8bit BT656 - 16bit I2S layout0 with a 128*fs clock (A_WS, AP0, A_CLK pins) - hdmi-receiver@48 { - compatible = "nxp,tda19971"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_tda1997x>; - reg = <0x48>; - interrupt-parent = <&gpio1>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - DOVDD-supply = <®_3p3v>; - AVDD-supply = <®_1p8v>; - DVDD-supply = <®_1p8v>; - /* audio */ - #sound-dai-cells = <0>; - nxp,audout-format = "i2s"; - nxp,audout-layout = <0>; - nxp,audout-width = <16>; - nxp,audout-mclk-fs = <128>; - /* - * The 8bpp BT656 mode outputs YCbCr[11:4] across 8bits over - * 2 pixclk cycles. - */ - nxp,vidout-portcfg = - /* YCbCr[11:8]<->VP[15:12]<->CSI_DATA[19:16] */ - < TDA1997X_VP24_V15_12 TDA1997X_R_CR_CBCR_11_8 >, - /* YCbCr[7:4]<->VP[11:08]<->CSI_DATA[15:12] */ - < TDA1997X_VP24_V11_08 TDA1997X_R_CR_CBCR_7_4 >, - - port { - tda1997x_to_ipu1_csi0_mux: endpoint { - remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; - bus-width = <16>; - hsync-active = <1>; - vsync-active = <1>; - data-active = <1>; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/media/i2c/ths8200.txt b/Documentation/devicetree/bindings/media/i2c/ths8200.txt deleted file mode 100644 index 285f6ae7dfa9..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/ths8200.txt +++ /dev/null @@ -1,19 +0,0 @@ -* Texas Instruments THS8200 video encoder - -The ths8200 device is a digital to analog converter used in DVD players, video -recorders, set-top boxes. - -Required Properties : -- compatible : value must be "ti,ths8200" - -Example: - - i2c0@1c22000 { - ... - ... - ths8200@5c { - compatible = "ti,ths8200"; - reg = <0x5c>; - }; - ... - }; diff --git a/Documentation/devicetree/bindings/media/i2c/ti,ths8200.txt b/Documentation/devicetree/bindings/media/i2c/ti,ths8200.txt new file mode 100644 index 000000000000..285f6ae7dfa9 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ti,ths8200.txt @@ -0,0 +1,19 @@ +* Texas Instruments THS8200 video encoder + +The ths8200 device is a digital to analog converter used in DVD players, video +recorders, set-top boxes. + +Required Properties : +- compatible : value must be "ti,ths8200" + +Example: + + i2c0@1c22000 { + ... + ... + ths8200@5c { + compatible = "ti,ths8200"; + reg = <0x5c>; + }; + ... + }; diff --git a/Documentation/devicetree/bindings/media/i2c/ti,tvp514x.txt b/Documentation/devicetree/bindings/media/i2c/ti,tvp514x.txt new file mode 100644 index 000000000000..46752cc71f2e --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ti,tvp514x.txt @@ -0,0 +1,44 @@ +* Texas Instruments TVP514x video decoder + +The TVP5146/TVP5146m2/TVP5147/TVP5147m1 device is high quality, single-chip +digital video decoder that digitizes and decodes all popular baseband analog +video formats into digital video component. The tvp514x decoder supports analog- +to-digital (A/D) conversion of component RGB and YPbPr signals as well as A/D +conversion and decoding of NTSC, PAL and SECAM composite and S-video into +component YCbCr. + +Required Properties : +- compatible : value should be either one among the following + (a) "ti,tvp5146" for tvp5146 decoder. + (b) "ti,tvp5146m2" for tvp5146m2 decoder. + (c) "ti,tvp5147" for tvp5147 decoder. + (d) "ti,tvp5147m1" for tvp5147m1 decoder. + +- hsync-active: HSYNC Polarity configuration for endpoint. + +- vsync-active: VSYNC Polarity configuration for endpoint. + +- pclk-sample: Clock polarity of the endpoint. + +For further reading on port node refer to Documentation/devicetree/bindings/ +media/video-interfaces.txt. + +Example: + + i2c0@1c22000 { + ... + ... + tvp514x@5c { + compatible = "ti,tvp5146"; + reg = <0x5c>; + + port { + tvp514x_1: endpoint { + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <0>; + }; + }; + }; + ... + }; diff --git a/Documentation/devicetree/bindings/media/i2c/ti,tvp5150.txt b/Documentation/devicetree/bindings/media/i2c/ti,tvp5150.txt new file mode 100644 index 000000000000..94b908ace53c --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ti,tvp5150.txt @@ -0,0 +1,157 @@ +* Texas Instruments TVP5150 and TVP5151 video decoders + +The TVP5150 and TVP5151 are video decoders that convert baseband NTSC and PAL +(and also SECAM in the TVP5151 case) video signals to either 8-bit 4:2:2 YUV +with discrete syncs or 8-bit ITU-R BT.656 with embedded syncs output formats. + +Required Properties: +==================== +- compatible: Value must be "ti,tvp5150". +- reg: I2C slave address. + +Optional Properties: +==================== +- pdn-gpios: Phandle for the GPIO connected to the PDN pin, if any. +- reset-gpios: Phandle for the GPIO connected to the RESETB pin, if any. + +The device node must contain one 'port' child node per device physical input +and output port, in accordance with the video interface bindings defined in +Documentation/devicetree/bindings/media/video-interfaces.txt. The port nodes +are numbered as follows + + Name Type Port + -------------------------------------- + AIP1A sink 0 + AIP1B sink 1 + Y-OUT src 2 + +The device node must contain at least one sink port and the src port. Each input +port must be linked to an endpoint defined in [1]. The port/connector layout is +as follows + +tvp-5150 port@0 (AIP1A) + endpoint@0 -----------> Comp0-Con port + endpoint@1 ------+----> Svideo-Con port +tvp-5150 port@1 (AIP1B) | + endpoint@1 ------+ + endpoint@0 -----------> Comp1-Con port +tvp-5150 port@2 + endpoint (video bitstream output at YOUT[0-7] parallel bus) + +Required Endpoint Properties for parallel synchronization on output port: +========================================================================= + +- hsync-active: Active state of the HSYNC signal. Must be <1> (HIGH). +- vsync-active: Active state of the VSYNC signal. Must be <1> (HIGH). +- field-even-active: Field signal level during the even field data + transmission. Must be <0>. + +Note: Do not specify any of these properties if you want to use the embedded + BT.656 synchronization. + +Optional Connector Properties: +============================== + +- sdtv-standards: Set the possible signals to which the hardware tries to lock + instead of using the autodetection mechanism. Please look at + [1] for more information. + +[1] Documentation/devicetree/bindings/display/connector/analog-tv-connector.yaml. + +Example - three input sources: +#include + +comp_connector_0 { + compatible = "composite-video-connector"; + label = "Composite0"; + sdtv-standards = ; /* limit to pal-m signals */ + + port { + composite0_to_tvp5150: endpoint { + remote-endpoint = <&tvp5150_to_composite0>; + }; + }; +}; + +comp_connector_1 { + compatible = "composite-video-connector"; + label = "Composite1"; + sdtv-standards = ; /* limit to ntsc-m signals */ + + port { + composite1_to_tvp5150: endpoint { + remote-endpoint = <&tvp5150_to_composite1>; + }; + }; +}; + +svideo_connector { + compatible = "svideo-connector"; + label = "S-Video"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + svideo_luma_to_tvp5150: endpoint@0 { + reg = <0>; + remote-endpoint = <&tvp5150_to_svideo_luma>; + }; + + svideo_chroma_to_tvp5150: endpoint@1 { + reg = <1>; + remote-endpoint = <&tvp5150_to_svideo_chroma>; + }; + }; +}; + +&i2c2 { + tvp5150@5c { + compatible = "ti,tvp5150"; + reg = <0x5c>; + pdn-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + tvp5150_to_composite0: endpoint@0 { + reg = <0>; + remote-endpoint = <&composite0_to_tvp5150>; + }; + + tvp5150_to_svideo_luma: endpoint@1 { + reg = <1>; + remote-endpoint = <&svideo_luma_to_tvp5150>; + }; + }; + + port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + tvp5150_to_composite1: endpoint@0 { + reg = <0>; + remote-endpoint = <&composite1_to_tvp5150>; + }; + + tvp5150_to_svideo_chroma: endpoint@1 { + reg = <1>; + remote-endpoint = <&svideo_chroma_to_tvp5150>; + }; + }; + + port@2 { + reg = <2>; + + tvp5150_1: endpoint { + remote-endpoint = <&ccdc_ep>; + }; + }; + }; +}; diff --git a/Documentation/devicetree/bindings/media/i2c/ti,tvp7002.txt b/Documentation/devicetree/bindings/media/i2c/ti,tvp7002.txt new file mode 100644 index 000000000000..5f28b5d9abcc --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ti,tvp7002.txt @@ -0,0 +1,53 @@ +* Texas Instruments TV7002 video decoder + +The TVP7002 device supports digitizing of video and graphics signal in RGB and +YPbPr color space. + +Required Properties : +- compatible : Must be "ti,tvp7002" + +Optional Properties: +- hsync-active: HSYNC Polarity configuration for the bus. Default value when + this property is not specified is <0>. + +- vsync-active: VSYNC Polarity configuration for the bus. Default value when + this property is not specified is <0>. + +- pclk-sample: Clock polarity of the bus. Default value when this property is + not specified is <0>. + +- sync-on-green-active: Active state of Sync-on-green signal property of the + endpoint. + 0 = Normal Operation (Active Low, Default) + 1 = Inverted operation + +- field-even-active: Active-high Field ID output polarity control of the bus. + Under normal operation, the field ID output is set to logic 1 for an odd field + (field 1) and set to logic 0 for an even field (field 0). + 0 = Normal Operation (Active Low, Default) + 1 = FID output polarity inverted + +For further reading of port node refer Documentation/devicetree/bindings/media/ +video-interfaces.txt. + +Example: + + i2c0@1c22000 { + ... + ... + tvp7002@5c { + compatible = "ti,tvp7002"; + reg = <0x5c>; + + port { + tvp7002_1: endpoint { + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <0>; + sync-on-green-active = <1>; + field-even-active = <0>; + }; + }; + }; + ... + }; diff --git a/Documentation/devicetree/bindings/media/i2c/toshiba,tc358743.txt b/Documentation/devicetree/bindings/media/i2c/toshiba,tc358743.txt new file mode 100644 index 000000000000..59102edcf01e --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/toshiba,tc358743.txt @@ -0,0 +1,48 @@ +* Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge + +The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts +a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C. + +Required Properties: + +- compatible: value should be "toshiba,tc358743" +- clocks, clock-names: should contain a phandle link to the reference clock + source, the clock input is named "refclk". + +Optional Properties: + +- reset-gpios: gpio phandle GPIO connected to the reset pin +- interrupts: GPIO connected to the interrupt pin +- data-lanes: should be <1 2 3 4> for four-lane operation, + or <1 2> for two-lane operation +- clock-lanes: should be <0> +- clock-noncontinuous: Presence of this boolean property decides whether the + MIPI CSI-2 clock is continuous or non-continuous. +- link-frequencies: List of allowed link frequencies in Hz. Each frequency is + expressed as a 64-bit big-endian integer. The frequency + is half of the bps per lane due to DDR transmission. + +For further information on the MIPI CSI-2 endpoint node properties, see +Documentation/devicetree/bindings/media/video-interfaces.txt. + +Example: + + tc358743@f { + compatible = "toshiba,tc358743"; + reg = <0x0f>; + clocks = <&hdmi_osc>; + clock-names = "refclk"; + reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio2>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + + port { + tc358743_out: endpoint { + remote-endpoint = <&mipi_csi2_in>; + data-lanes = <1 2 3 4>; + clock-lanes = <0>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <297000000>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/i2c/tvp514x.txt b/Documentation/devicetree/bindings/media/i2c/tvp514x.txt deleted file mode 100644 index 46752cc71f2e..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/tvp514x.txt +++ /dev/null @@ -1,44 +0,0 @@ -* Texas Instruments TVP514x video decoder - -The TVP5146/TVP5146m2/TVP5147/TVP5147m1 device is high quality, single-chip -digital video decoder that digitizes and decodes all popular baseband analog -video formats into digital video component. The tvp514x decoder supports analog- -to-digital (A/D) conversion of component RGB and YPbPr signals as well as A/D -conversion and decoding of NTSC, PAL and SECAM composite and S-video into -component YCbCr. - -Required Properties : -- compatible : value should be either one among the following - (a) "ti,tvp5146" for tvp5146 decoder. - (b) "ti,tvp5146m2" for tvp5146m2 decoder. - (c) "ti,tvp5147" for tvp5147 decoder. - (d) "ti,tvp5147m1" for tvp5147m1 decoder. - -- hsync-active: HSYNC Polarity configuration for endpoint. - -- vsync-active: VSYNC Polarity configuration for endpoint. - -- pclk-sample: Clock polarity of the endpoint. - -For further reading on port node refer to Documentation/devicetree/bindings/ -media/video-interfaces.txt. - -Example: - - i2c0@1c22000 { - ... - ... - tvp514x@5c { - compatible = "ti,tvp5146"; - reg = <0x5c>; - - port { - tvp514x_1: endpoint { - hsync-active = <1>; - vsync-active = <1>; - pclk-sample = <0>; - }; - }; - }; - ... - }; diff --git a/Documentation/devicetree/bindings/media/i2c/tvp5150.txt b/Documentation/devicetree/bindings/media/i2c/tvp5150.txt deleted file mode 100644 index 94b908ace53c..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/tvp5150.txt +++ /dev/null @@ -1,157 +0,0 @@ -* Texas Instruments TVP5150 and TVP5151 video decoders - -The TVP5150 and TVP5151 are video decoders that convert baseband NTSC and PAL -(and also SECAM in the TVP5151 case) video signals to either 8-bit 4:2:2 YUV -with discrete syncs or 8-bit ITU-R BT.656 with embedded syncs output formats. - -Required Properties: -==================== -- compatible: Value must be "ti,tvp5150". -- reg: I2C slave address. - -Optional Properties: -==================== -- pdn-gpios: Phandle for the GPIO connected to the PDN pin, if any. -- reset-gpios: Phandle for the GPIO connected to the RESETB pin, if any. - -The device node must contain one 'port' child node per device physical input -and output port, in accordance with the video interface bindings defined in -Documentation/devicetree/bindings/media/video-interfaces.txt. The port nodes -are numbered as follows - - Name Type Port - -------------------------------------- - AIP1A sink 0 - AIP1B sink 1 - Y-OUT src 2 - -The device node must contain at least one sink port and the src port. Each input -port must be linked to an endpoint defined in [1]. The port/connector layout is -as follows - -tvp-5150 port@0 (AIP1A) - endpoint@0 -----------> Comp0-Con port - endpoint@1 ------+----> Svideo-Con port -tvp-5150 port@1 (AIP1B) | - endpoint@1 ------+ - endpoint@0 -----------> Comp1-Con port -tvp-5150 port@2 - endpoint (video bitstream output at YOUT[0-7] parallel bus) - -Required Endpoint Properties for parallel synchronization on output port: -========================================================================= - -- hsync-active: Active state of the HSYNC signal. Must be <1> (HIGH). -- vsync-active: Active state of the VSYNC signal. Must be <1> (HIGH). -- field-even-active: Field signal level during the even field data - transmission. Must be <0>. - -Note: Do not specify any of these properties if you want to use the embedded - BT.656 synchronization. - -Optional Connector Properties: -============================== - -- sdtv-standards: Set the possible signals to which the hardware tries to lock - instead of using the autodetection mechanism. Please look at - [1] for more information. - -[1] Documentation/devicetree/bindings/display/connector/analog-tv-connector.yaml. - -Example - three input sources: -#include - -comp_connector_0 { - compatible = "composite-video-connector"; - label = "Composite0"; - sdtv-standards = ; /* limit to pal-m signals */ - - port { - composite0_to_tvp5150: endpoint { - remote-endpoint = <&tvp5150_to_composite0>; - }; - }; -}; - -comp_connector_1 { - compatible = "composite-video-connector"; - label = "Composite1"; - sdtv-standards = ; /* limit to ntsc-m signals */ - - port { - composite1_to_tvp5150: endpoint { - remote-endpoint = <&tvp5150_to_composite1>; - }; - }; -}; - -svideo_connector { - compatible = "svideo-connector"; - label = "S-Video"; - - port { - #address-cells = <1>; - #size-cells = <0>; - - svideo_luma_to_tvp5150: endpoint@0 { - reg = <0>; - remote-endpoint = <&tvp5150_to_svideo_luma>; - }; - - svideo_chroma_to_tvp5150: endpoint@1 { - reg = <1>; - remote-endpoint = <&tvp5150_to_svideo_chroma>; - }; - }; -}; - -&i2c2 { - tvp5150@5c { - compatible = "ti,tvp5150"; - reg = <0x5c>; - pdn-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>; - reset-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>; - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - tvp5150_to_composite0: endpoint@0 { - reg = <0>; - remote-endpoint = <&composite0_to_tvp5150>; - }; - - tvp5150_to_svideo_luma: endpoint@1 { - reg = <1>; - remote-endpoint = <&svideo_luma_to_tvp5150>; - }; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - - tvp5150_to_composite1: endpoint@0 { - reg = <0>; - remote-endpoint = <&composite1_to_tvp5150>; - }; - - tvp5150_to_svideo_chroma: endpoint@1 { - reg = <1>; - remote-endpoint = <&svideo_chroma_to_tvp5150>; - }; - }; - - port@2 { - reg = <2>; - - tvp5150_1: endpoint { - remote-endpoint = <&ccdc_ep>; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/media/i2c/tvp7002.txt b/Documentation/devicetree/bindings/media/i2c/tvp7002.txt deleted file mode 100644 index 5f28b5d9abcc..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/tvp7002.txt +++ /dev/null @@ -1,53 +0,0 @@ -* Texas Instruments TV7002 video decoder - -The TVP7002 device supports digitizing of video and graphics signal in RGB and -YPbPr color space. - -Required Properties : -- compatible : Must be "ti,tvp7002" - -Optional Properties: -- hsync-active: HSYNC Polarity configuration for the bus. Default value when - this property is not specified is <0>. - -- vsync-active: VSYNC Polarity configuration for the bus. Default value when - this property is not specified is <0>. - -- pclk-sample: Clock polarity of the bus. Default value when this property is - not specified is <0>. - -- sync-on-green-active: Active state of Sync-on-green signal property of the - endpoint. - 0 = Normal Operation (Active Low, Default) - 1 = Inverted operation - -- field-even-active: Active-high Field ID output polarity control of the bus. - Under normal operation, the field ID output is set to logic 1 for an odd field - (field 1) and set to logic 0 for an even field (field 0). - 0 = Normal Operation (Active Low, Default) - 1 = FID output polarity inverted - -For further reading of port node refer Documentation/devicetree/bindings/media/ -video-interfaces.txt. - -Example: - - i2c0@1c22000 { - ... - ... - tvp7002@5c { - compatible = "ti,tvp7002"; - reg = <0x5c>; - - port { - tvp7002_1: endpoint { - hsync-active = <1>; - vsync-active = <1>; - pclk-sample = <0>; - sync-on-green-active = <1>; - field-even-active = <0>; - }; - }; - }; - ... - }; -- cgit v1.2.3 From ca26126a6c3fb6eb4f30ceb6a41ff975117ec94a Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Mon, 3 Mar 2025 21:32:19 +0530 Subject: media: dt-bindings: ti,ds90ub960: Allow setting serializer address The serializer's I2C address on the FPD-Link bus is usually communicated to the deserializer once the forward-channel is established. But in some cases it might be necessary to program the serializer (over the back-channel) before the forward-channel is established. This can be used e.g. to correct serializer configuration which otherwise would prevent the FC to be enabled. To be able to communicate to the serializer before the forward-channel is up, the deserializer driver neds to know the default i2c address of the serializer. Allow setting the serializer i2c address using the 'reg' property. This is optional, and usually not needed. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Jai Luthra Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../bindings/media/i2c/ti,ds90ub953.yaml | 77 +++++++++++++--------- .../bindings/media/i2c/ti,ds90ub960.yaml | 16 ++++- 2 files changed, 58 insertions(+), 35 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/i2c/ti,ds90ub953.yaml b/Documentation/devicetree/bindings/media/i2c/ti,ds90ub953.yaml index 2030366994d1..2e129bf573b7 100644 --- a/Documentation/devicetree/bindings/media/i2c/ti,ds90ub953.yaml +++ b/Documentation/devicetree/bindings/media/i2c/ti,ds90ub953.yaml @@ -38,6 +38,13 @@ properties: '#clock-cells': const: 0 + reg: + maxItems: 1 + description: + The strap I2C address of the serializer. Can be used by the deserializer + to communicate over back-channel when the forward-channel is not yet + active. + ports: $ref: /schemas/graph.yaml#/properties/ports @@ -81,51 +88,57 @@ examples: - | #include - serializer { - compatible = "ti,ds90ub953-q1"; + link { + #address-cells = <1>; + #size-cells = <0>; + + serializer@18 { + compatible = "ti,ds90ub953-q1"; + reg = <0x18>; - gpio-controller; - #gpio-cells = <2>; + gpio-controller; + #gpio-cells = <2>; - #clock-cells = <0>; + #clock-cells = <0>; - ports { - #address-cells = <1>; - #size-cells = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - port@0 { - reg = <0>; - ub953_in: endpoint { - clock-lanes = <0>; - data-lanes = <1 2 3 4>; - remote-endpoint = <&sensor_out>; + port@0 { + reg = <0>; + ub953_in: endpoint { + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&sensor_out>; + }; }; - }; - port@1 { - reg = <1>; - endpoint { - remote-endpoint = <&deser_fpd_in>; + port@1 { + reg = <1>; + endpoint { + remote-endpoint = <&deser_fpd_in>; + }; }; }; - }; - i2c { - #address-cells = <1>; - #size-cells = <0>; + i2c { + #address-cells = <1>; + #size-cells = <0>; - sensor@1a { - compatible = "sony,imx274"; - reg = <0x1a>; + sensor@1a { + compatible = "sony,imx274"; + reg = <0x1a>; - reset-gpios = <&serializer 0 GPIO_ACTIVE_LOW>; + reset-gpios = <&serializer 0 GPIO_ACTIVE_LOW>; - clocks = <&serializer>; - clock-names = "inck"; + clocks = <&serializer>; + clock-names = "inck"; - port { - sensor_out: endpoint { - remote-endpoint = <&ub953_in>; + port { + sensor_out: endpoint { + remote-endpoint = <&ub953_in>; + }; }; }; }; diff --git a/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml b/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml index 0b71e6f911a8..4dcbd2b039a5 100644 --- a/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml +++ b/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml @@ -68,6 +68,12 @@ properties: description: The link number maxItems: 1 + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + i2c-alias: $ref: /schemas/types.yaml#/definitions/uint32 description: @@ -107,7 +113,8 @@ properties: maximum: 14 description: Manual EQ level - serializer: + patternProperties: + '^serializer(@[0-9a-f]+)*$': type: object description: FPD-Link Serializer node @@ -115,7 +122,6 @@ properties: - reg - i2c-alias - ti,rx-mode - - serializer ports: $ref: /schemas/graph.yaml#/properties/ports @@ -309,13 +315,17 @@ examples: /* Link 0 has DS90UB953 serializer and IMX274 sensor */ link@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; i2c-alias = <0x44>; ti,rx-mode = <3>; - serializer1: serializer { + serializer1: serializer@30 { compatible = "ti,ds90ub953-q1"; + reg = <0x30>; gpio-controller; #gpio-cells = <2>; -- cgit v1.2.3 From df78f5928c4b699d0699ec0e2554571a45e38626 Mon Sep 17 00:00:00 2001 From: Bryan O'Donoghue Date: Mon, 7 Apr 2025 10:13:07 +0100 Subject: media: dt-bindings: Add OmniVision OV02E10 Add bindings for OVO2E10 a two lane MIPI CSI, two megapixel 1080p RGB sensor. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bryan O'Donoghue Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../bindings/media/i2c/ovti,ov02e10.yaml | 113 +++++++++++++++++++++ 1 file changed, 113 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/i2c/ovti,ov02e10.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov02e10.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov02e10.yaml new file mode 100644 index 000000000000..4ac4e11a16c8 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov02e10.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (c) 2025 Linaro Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/ovti,ov02e10.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Omnivision OV02E10 CMOS Sensor + +maintainers: + - Bryan O'Donoghue + +description: | + The Omnivision OV02E10 is a 2 megapixel, CMOS image sensor which supports: + - Automatic black level calibration (ABLC) + - Programmable controls for frame rate, mirror and flip, binning, cropping + and windowing + - Output formats 10-bit 4C RGB RAW, 10-bit Bayer RAW + - 2-lane MIPI D-PHY TX @ 720 Mbps per lane + - Dynamic defect pixel cancellation + - Standard SCCB command interface + +allOf: + - $ref: /schemas/media/video-interface-devices.yaml# + +properties: + compatible: + const: ovti,ov02e10 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + avdd-supply: + description: Analogue circuit voltage supply. + + dovdd-supply: + description: I/O circuit voltage supply. + + dvdd-supply: + description: Digital circuit voltage supply. + + reset-gpios: + description: Active low GPIO connected to XSHUTDOWN pad of the sensor. + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + additionalProperties: false + + properties: + data-lanes: + items: + - const: 1 + - const: 2 + link-frequencies: true + remote-endpoint: true + + required: + - data-lanes + - link-frequencies + - remote-endpoint + +required: + - compatible + - reg + - clocks + - port + +unevaluatedProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + ov02e10: camera@10 { + compatible = "ovti,ov02e10"; + reg = <0x10>; + + reset-gpios = <&tlmm 237 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_rgb_defaultt>; + + clocks = <&ov02e10_clk>; + + assigned-clocks = <&ov02e10_clk>; + assigned-clock-parents = <&ov02e10_clk_parent>; + assigned-clock-rates = <19200000>; + + avdd-supply = <&vreg_l7b_2p8>; + dvdd-supply = <&vreg_l7b_1p8>; + dovdd-supply = <&vreg_l3m_1p8>; + + port { + ov02e10_ep: endpoint { + remote-endpoint = <&csiphy4_ep>; + data-lanes = <1 2>; + link-frequencies = /bits/ 64 <400000000>; + }; + }; + }; + }; +... -- cgit v1.2.3 From 25259379bc796bf718eae395ffe05e76d42cbe5b Mon Sep 17 00:00:00 2001 From: David Heidelberg Date: Mon, 21 Apr 2025 10:20:15 +0200 Subject: media: dt-bindings: Convert Analog Devices ad5820 to DT schema Convert the Analog Devices ad5820 to DT schema format. Acked-by: Pavel Machek Signed-off-by: David Heidelberg Reviewed-by: Rob Herring (Arm) Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../devicetree/bindings/media/i2c/ad5820.txt | 28 ----------- .../devicetree/bindings/media/i2c/adi,ad5820.yaml | 56 ++++++++++++++++++++++ 2 files changed, 56 insertions(+), 28 deletions(-) delete mode 100644 Documentation/devicetree/bindings/media/i2c/ad5820.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/adi,ad5820.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/i2c/ad5820.txt b/Documentation/devicetree/bindings/media/i2c/ad5820.txt deleted file mode 100644 index 5764cbedf9b7..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/ad5820.txt +++ /dev/null @@ -1,28 +0,0 @@ -* Analog Devices AD5820 autofocus coil - -Required Properties: - - - compatible: Must contain one of: - - "adi,ad5820" - - "adi,ad5821" - - "adi,ad5823" - - - reg: I2C slave address - - - VANA-supply: supply of voltage for VANA pin - -Optional properties: - - - enable-gpios : GPIO spec for the XSHUTDOWN pin. The XSHUTDOWN signal is -active low, a high level on the pin enables the device. - -Example: - - ad5820: coil@c { - compatible = "adi,ad5820"; - reg = <0x0c>; - - VANA-supply = <&vaux4>; - enable-gpios = <&msmgpio 26 GPIO_ACTIVE_HIGH>; - }; - diff --git a/Documentation/devicetree/bindings/media/i2c/adi,ad5820.yaml b/Documentation/devicetree/bindings/media/i2c/adi,ad5820.yaml new file mode 100644 index 000000000000..0c8f24f692ca --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/adi,ad5820.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/adi,ad5820.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD5820 autofocus coil + +maintainers: + - Pavel Machek + +description: + The AD5820 is a current sink driver designed for precise control of + voice coil motors (VCMs) in camera autofocus systems. + +properties: + compatible: + enum: + - adi,ad5820 + - adi,ad5821 + - adi,ad5823 + + reg: + maxItems: 1 + + enable-gpios: + maxItems: 1 + description: + GPIO spec for the XSHUTDOWN pin. The XSHUTDOWN signal is active low, + a high level on the pin enables the device. + + VANA-supply: + description: supply of voltage for VANA pin + +required: + - compatible + - reg + - VANA-supply + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + coil@c { + compatible = "adi,ad5820"; + reg = <0x0c>; + + enable-gpios = <&msmgpio 26 GPIO_ACTIVE_HIGH>; + VANA-supply = <&vaux4>; + }; + }; -- cgit v1.2.3 From c0a1d1e9a48f36086ef5a2863844175476bd3b8e Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 14 Apr 2025 17:52:01 +0100 Subject: dt-bindings: usb: renesas,usbhs: Add RZ/V2H(P) SoC support Document the Renesas USBHS controller found on the Renesas RZ/V2H(P) SoC. The USBHS block on RZ/V2H(P) is functionally identical to the one on the RZ/G2L family, so no driver changes are needed. The existing "renesas,rzg2l-usbhs" fallback compatible will continue to be used for handling this IP. In addition, update the schema validation logic by replacing the enum list of SoC-specific compatibles with a const "renesas,rzg2l-usbhs" as all listed SoCs share identical USBHS hardware and already include the fallback compatible. This will help to simplify the schema and avoid redundancy. Signed-off-by: Lad Prabhakar Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250414165201.362262-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/renesas,usbhs.yaml | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml b/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml index 980f325341d4..6f4d41ba6ca7 100644 --- a/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml +++ b/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml @@ -27,6 +27,7 @@ properties: - renesas,usbhs-r9a07g044 # RZ/G2{L,LC} - renesas,usbhs-r9a07g054 # RZ/V2L - renesas,usbhs-r9a08g045 # RZ/G3S + - renesas,usbhs-r9a09g057 # RZ/V2H(P) - const: renesas,rzg2l-usbhs - items: @@ -127,11 +128,7 @@ allOf: properties: compatible: contains: - enum: - - renesas,usbhs-r9a07g043 - - renesas,usbhs-r9a07g044 - - renesas,usbhs-r9a07g054 - - renesas,usbhs-r9a08g045 + const: renesas,rzg2l-usbhs then: properties: interrupts: -- cgit v1.2.3 From 495df45f38c8ba3d74c3180a0a13a0ecbfa717d1 Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Fri, 18 Apr 2025 16:08:20 +0200 Subject: dt-bindings: usb: usb-device: relax compatible pattern to a contains The dt-core typically allows multiple compatibles[1] but usb-device currently forces a single compatible. This is an issue when multiple devices with slightly different productID all behave the same. This would require the driver to keep updating its compatible matching table to include this new productID instead of doing what is usually done: have two compatibles, the leftmost which matches exactly the HW device definition, and the rightmost one as a fallback which is assumed to be 100% compatible with the device at hand. If this assumption turns out to be wrong, it is easy to work around this without having to modify the device tree by handling the leftmost compatible in the driver. [1] https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/dt-core.yaml#L21-L25 Signed-off-by: Quentin Schulz Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250418-dt-binding-usb-device-compatibles-v2-1-b3029f14e800@cherry.de Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/usb-device.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/usb-device.yaml b/Documentation/devicetree/bindings/usb/usb-device.yaml index c67695681033..09fceb469f10 100644 --- a/Documentation/devicetree/bindings/usb/usb-device.yaml +++ b/Documentation/devicetree/bindings/usb/usb-device.yaml @@ -28,7 +28,8 @@ description: | properties: compatible: - pattern: "^usb[0-9a-f]{1,4},[0-9a-f]{1,4}$" + contains: + pattern: "^usb[0-9a-f]{1,4},[0-9a-f]{1,4}$" description: Device nodes or combined nodes. "usbVID,PID", where VID is the vendor id and PID the product id. The textual representation of VID and PID shall be in lower case -- cgit v1.2.3 From 384455c791740717f457409415d9e9c219436575 Mon Sep 17 00:00:00 2001 From: Alexey Charkov Date: Fri, 25 Apr 2025 14:07:31 +0400 Subject: dt-bindings: usb: generic-ehci: Add VIA/WonderMedia compatible VIA/WonderMedia SoCs use a plain vanilla EHCI controller with a compatible string "via,vt8500-ehci". This compatible is already used by the mainline Linux driver and relevant in-tree DTS files, so add it to the binding. Acked-by: Conor Dooley Signed-off-by: Alexey Charkov Link: https://lore.kernel.org/r/20250425-vt8500-ehci-binding-v2-1-b4a350335add@gmail.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/generic-ehci.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml index 223f2abd5e59..508d958e698c 100644 --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml @@ -86,6 +86,7 @@ properties: - nuvoton,npcm845-ehci - ti,ehci-omap - usb-ehci + - via,vt8500-ehci reg: minItems: 1 -- cgit v1.2.3 From 11e80d371bbb02b993caff546a9217eef864232d Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Fri, 25 Apr 2025 09:08:12 +0200 Subject: dt-bindings: usb: usb-switch: Allow data-lanes property in port The ref /schemas/graph.yaml#/properties/port forbids extra properties which might be specified in subschemas, e.g. like in usb/fcs,fsa4480.yaml. Switch to port-base (and specify the endpoint with properties) to allow such properties. Fixes: fd2a052ccd69 ("dt-bindings: usb: add common Type-C USB Switch schema") Signed-off-by: Luca Weiss Link: https://lore.kernel.org/r/20250425-fp5-pmic-glink-dp-v3-1-cc9c2aeb42fb@fairphone.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/usb-switch.yaml | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/usb-switch.yaml b/Documentation/devicetree/bindings/usb/usb-switch.yaml index da76118e73a5..896201912630 100644 --- a/Documentation/devicetree/bindings/usb/usb-switch.yaml +++ b/Documentation/devicetree/bindings/usb/usb-switch.yaml @@ -26,11 +26,24 @@ properties: type: boolean port: - $ref: /schemas/graph.yaml#/properties/port + $ref: /schemas/graph.yaml#/$defs/port-base description: A port node to link the device to a TypeC controller for the purpose of handling altmode muxing and orientation switching. + properties: + endpoint: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + unevaluatedProperties: false + properties: + data-lanes: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 8 + uniqueItems: true + items: + maximum: 8 + ports: $ref: /schemas/graph.yaml#/properties/ports properties: -- cgit v1.2.3 From 05f31711af6417da19a4fb4b46b41039d569dabc Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 16 Apr 2025 14:02:41 +0200 Subject: dt-bindings: serial: mediatek,uart: Add compatible for MT6893 Add a compatible string for the MediaTek Dimensity 1200 (MT6893) SoC, which UART IPs are fully compatible with MT6577. Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250416120241.147925-1-angelogioacchino.delregno@collabora.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/serial/mediatek,uart.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/serial/mediatek,uart.yaml b/Documentation/devicetree/bindings/serial/mediatek,uart.yaml index 1b02f0b197ff..c55d9a0efa19 100644 --- a/Documentation/devicetree/bindings/serial/mediatek,uart.yaml +++ b/Documentation/devicetree/bindings/serial/mediatek,uart.yaml @@ -33,6 +33,7 @@ properties: - mediatek,mt6779-uart - mediatek,mt6795-uart - mediatek,mt6797-uart + - mediatek,mt6893-uart - mediatek,mt7622-uart - mediatek,mt7623-uart - mediatek,mt7629-uart -- cgit v1.2.3 From e6afad4587c9b40a98cf26e73c55a2fb953ee6dd Mon Sep 17 00:00:00 2001 From: Xianwei Zhao Date: Thu, 24 Apr 2025 16:43:17 +0800 Subject: dt-bindings: serial: amlogic,meson-uart: Add compatible string for S6/S7/S7D Amlogic S6/S7/7D SoCs uses the same UART controller as S4 SoCs and G12A. There is no need for an extra compatible line in the driver, but add S6/S7/S7D compatible line for documentation. Acked-by: Rob Herring (Arm) Reviewed-by: Neil Armstrong Signed-off-by: Xianwei Zhao Link: https://lore.kernel.org/r/20250424-uart-binding-v1-1-eb0f6d97a654@amlogic.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml index 0565fb7649c5..d8ad1bb6172d 100644 --- a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml +++ b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml @@ -56,6 +56,9 @@ properties: items: - enum: - amlogic,a4-uart + - amlogic,s6-uart + - amlogic,s7-uart + - amlogic,s7d-uart - amlogic,t7-uart - const: amlogic,meson-s4-uart -- cgit v1.2.3 From 10fc30eaf381cc8a6351129d7a48c4bf979f6002 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 5 Feb 2025 11:46:37 +0100 Subject: docs: dt: Update overlay file extension Building DTB overlays from .dts files is no longer supported. Update the documentation to reflect this. Fixes: 81d362732bac05f6 ("kbuild: Disallow DTB overlays to built from .dts named source files") Signed-off-by: Geert Uytterhoeven Acked-by: Andrew Davis Reviewed-by: Yanteng Si Link: https://lore.kernel.org/r/ebce4d9591dd0259a636196dda31d40901dc04b0.1738752288.git.geert+renesas@glider.be Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/overlay-notes.rst | 12 ++++++------ .../translations/zh_CN/devicetree/overlay-notes.rst | 12 ++++++------ 2 files changed, 12 insertions(+), 12 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/overlay-notes.rst b/Documentation/devicetree/overlay-notes.rst index e139f22b363e..35e79242af9a 100644 --- a/Documentation/devicetree/overlay-notes.rst +++ b/Documentation/devicetree/overlay-notes.rst @@ -38,10 +38,10 @@ Lets take an example where we have a foo board with the following base tree:: }; ---- foo.dts --------------------------------------------------------------- -The overlay bar.dts, +The overlay bar.dtso, :: - ---- bar.dts - overlay target location by label ---------------------------- + ---- bar.dtso - overlay target location by label --------------------------- /dts-v1/; /plugin/; &ocp { @@ -51,7 +51,7 @@ The overlay bar.dts, ... /* various properties and child nodes */ }; }; - ---- bar.dts --------------------------------------------------------------- + ---- bar.dtso -------------------------------------------------------------- when loaded (and resolved as described in [1]) should result in foo+bar.dts:: @@ -88,9 +88,9 @@ in the base DT. In this case, the target path can be provided. The target location by label syntax is preferred because the overlay can be applied to any base DT containing the label, no matter where the label occurs in the DT. -The above bar.dts example modified to use target path syntax is:: +The above bar.dtso example modified to use target path syntax is:: - ---- bar.dts - overlay target location by explicit path -------------------- + ---- bar.dtso - overlay target location by explicit path ------------------- /dts-v1/; /plugin/; &{/ocp} { @@ -100,7 +100,7 @@ The above bar.dts example modified to use target path syntax is:: ... /* various properties and child nodes */ } }; - ---- bar.dts --------------------------------------------------------------- + ---- bar.dtso -------------------------------------------------------------- Overlay in-kernel API diff --git a/Documentation/translations/zh_CN/devicetree/overlay-notes.rst b/Documentation/translations/zh_CN/devicetree/overlay-notes.rst index 43e3c0bc5a9f..ba5edd05dc1e 100644 --- a/Documentation/translations/zh_CN/devicetree/overlay-notes.rst +++ b/Documentation/translations/zh_CN/devicetree/overlay-notes.rst @@ -43,10 +43,10 @@ Documentation/devicetree/dynamic-resolution-notes.rst[1]的配套文档。 }; ---- foo.dts --------------------------------------------------------------- -覆盖bar.dts, +覆盖bar.dtso, :: - ---- bar.dts - 按标签覆盖目标位置 ---------------------------- + ---- bar.dtso - 按标签覆盖目标位置 --------------------------- /dts-v1/; /插件/; &ocp { @@ -56,7 +56,7 @@ Documentation/devicetree/dynamic-resolution-notes.rst[1]的配套文档。 ... /* 各种属性和子节点 */ }; }; - ---- bar.dts --------------------------------------------------------------- + ---- bar.dtso -------------------------------------------------------------- 当加载（并按照[1]中描述的方式解决）时，应该产生foo+bar.dts:: @@ -90,9 +90,9 @@ Documentation/devicetree/dynamic-resolution-notes.rst[1]的配套文档。 DT中的适当位置。在这种情况下，可以提供目标路径。通过标签的目标位置的语法是比 较好的，因为不管标签在DT中出现在哪里，覆盖都可以被应用到任何包含标签的基础DT上。 -上面的bar.dts例子被修改为使用目标路径语法，即为:: +上面的bar.dtso例子被修改为使用目标路径语法，即为:: - ---- bar.dts - 通过明确的路径覆盖目标位置 -------------------- + ---- bar.dtso - 通过明确的路径覆盖目标位置 ------------------- /dts-v1/; /插件/; &{/ocp} { @@ -102,7 +102,7 @@ DT中的适当位置。在这种情况下，可以提供目标路径。通过标 ... /* 各种外围设备和子节点 */ } }; - ---- bar.dts --------------------------------------------------------------- + ---- bar.dtso -------------------------------------------------------------- 内核中关于覆盖的API -- cgit v1.2.3 From 29d69273fefd0bc2a66b5e22f3a4a4c7a53bfa02 Mon Sep 17 00:00:00 2001 From: Lukas Bulwahn Date: Mon, 3 Mar 2025 11:30:22 +0100 Subject: media: remove STA2x11 media pci driver With commit dcbb01fbb7ae ("x86/pci: Remove old STA2x11 support"), the STA2X11 Video Input Port driver is not needed and cannot be built anymore. Remove the driver and its reference in media documentation. Signed-off-by: Lukas Bulwahn Signed-off-by: Hans Verkuil --- Documentation/admin-guide/media/pci-cardlist.rst | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/media/pci-cardlist.rst b/Documentation/admin-guide/media/pci-cardlist.rst index 7d8e3c8987db..239879634ea5 100644 --- a/Documentation/admin-guide/media/pci-cardlist.rst +++ b/Documentation/admin-guide/media/pci-cardlist.rst @@ -86,7 +86,6 @@ saa7134 Philips SAA7134 saa7164 NXP SAA7164 smipcie SMI PCIe DVBSky cards solo6x10 Bluecherry / Softlogic 6x10 capture cards (MPEG-4/H.264) -sta2x11_vip STA2X11 VIP Video For Linux tw5864 Techwell TW5864 video/audio grabber and encoder tw686x Intersil/Techwell TW686x tw68 Techwell tw68x Video For Linux -- cgit v1.2.3 From 1a27fce0fa79ef32c37f7e1b2d49357da7f2e2b2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20T=C5=AFma?= Date: Tue, 11 Mar 2025 18:31:41 +0100 Subject: docs: media: mgb4: Improve mgb4 driver documentation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add some basic info about the HW/driver + contact info. Signed-off-by: Martin Tůma Signed-off-by: Hans Verkuil --- Documentation/admin-guide/media/mgb4.rst | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/media/mgb4.rst b/Documentation/admin-guide/media/mgb4.rst index f69d331e3cb1..5ac69b833a7a 100644 --- a/Documentation/admin-guide/media/mgb4.rst +++ b/Documentation/admin-guide/media/mgb4.rst @@ -1,8 +1,17 @@ .. SPDX-License-Identifier: GPL-2.0 +.. include:: + The mgb4 driver =============== +Copyright |copy| 2023 - 2025 Digiteq Automotive + author: Martin Tůma + +This is a v4l2 device driver for the Digiteq Automotive FrameGrabber 4, a PCIe +card capable of capturing and generating FPD-Link III and GMSL2/3 video streams +as used in the automotive industry. + sysfs interface --------------- -- cgit v1.2.3 From 5bc68bd3826e573f9a83c82c5107536cf616fea8 Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Sun, 13 Apr 2025 14:35:32 -0500 Subject: media: dt-bindings: Document Tegra186 and Tegra194 cec These are already used in device trees, so describe them here. As the driver only declares up through Tegra210, these must use a fallback compatible of tegra210-cec. Acked-by: Krzysztof Kozlowski Signed-off-by: Aaron Kling Signed-off-by: Hans Verkuil --- .../devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml b/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml index a6b73498bc21..4b46aa755ccd 100644 --- a/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml +++ b/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml @@ -14,10 +14,16 @@ allOf: properties: compatible: - enum: - - nvidia,tegra114-cec - - nvidia,tegra124-cec - - nvidia,tegra210-cec + oneOf: + - enum: + - nvidia,tegra114-cec + - nvidia,tegra124-cec + - nvidia,tegra210-cec + - items: + - enum: + - nvidia,tegra186-cec + - nvidia,tegra194-cec + - const: nvidia,tegra210-cec clocks: maxItems: 1 -- cgit v1.2.3 From 5959618631fec502ec0963f4082d565f7fbfff04 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Mon, 21 Apr 2025 16:46:18 -0500 Subject: dt-bindings: mfd: ti,j721e-system-controller: Add compatible string for AM654 Add the child nodes that can be found under this node. Then as done for other similar devices (J7200 and J721s2) add support for the AM654 system controller to this binding. Signed-off-by: Andrew Davis Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250421214620.3770172-2-afd@ti.com Signed-off-by: Nishanth Menon --- .../bindings/soc/ti/ti,j721e-system-controller.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml index 13b6b6fa5dee..f3bd0be3b279 100644 --- a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml +++ b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml @@ -26,6 +26,7 @@ properties: compatible: items: - enum: + - ti,am654-system-controller - ti,j7200-system-controller - ti,j721e-system-controller - ti,j721s2-system-controller @@ -73,6 +74,18 @@ patternProperties: description: The node corresponding to PCIe control register. + "^clock@[0-9a-f]+$": + type: object + $ref: /schemas/soc/ti/ti,am654-serdes-ctrl.yaml# + description: + This is the Serdes Control region. + + "^dss-oldi-io-ctrl@[0-9a-f]+$": + type: object + $ref: /schemas/mfd/syscon.yaml# + description: + This is the DSS OLDI CTRL region. + required: - compatible - reg -- cgit v1.2.3 From 5d15c4395fd360ab894a28c6a7c8ca44593cdc61 Mon Sep 17 00:00:00 2001 From: Dominik Haller Date: Wed, 23 Apr 2025 15:36:33 +0200 Subject: dt-bindings: arm: ti: Add bindings for PHYTEC AM68x based hardware Add devicetree bindings for the AM68x based phyCORE-AM68x/TDA4x SoM and the phyBOARD-Izar carrier board. Signed-off-by: Dominik Haller Reviewed-by: Wadim Egorov Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250423133635.29897-1-d.haller@phytec.de Signed-off-by: Nishanth Menon --- Documentation/devicetree/bindings/arm/ti/k3.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index b7f6cd8d4b9e..a6d9fd0bcaba 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -140,6 +140,13 @@ properties: - ti,j721s2-evm - const: ti,j721s2 + - description: K3 J721s2 SoC Phytec SoM based boards + items: + - enum: + - phytec,am68-phyboard-izar + - const: phytec,am68-phycore-som + - const: ti,j721s2 + - description: K3 J722S SoC and Boards items: - enum: -- cgit v1.2.3 From 749027309025a3bb4785ab8f20e18bc641fae848 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Thu, 17 Apr 2025 23:22:58 +0000 Subject: dt-bindings: renesas,sh-msiof: Add MSIOF I2S Sound support Renesas MSIOF (Clock-Synchronized Serial Interface with FIFO) can work as both SPI and I2S. MSIOF-I2S will use Audio Graph Card/Card2 driver which uses Of-Graph in DT. MSIOF-SPI/I2S are using same DT compatible properties. MSIOF-I2S uses Of-Graph for Audio-Graph-Card/Card2, MSIOF-SPI doesn't use Of-Graph. Adds schema for MSIOF-I2S (= Sound). Signed-off-by: Kuninori Morimoto Reviewed-by: "Rob Herring (Arm)" Link: https://patch.msgid.link/87zfge2x0u.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown --- .../devicetree/bindings/spi/renesas,sh-msiof.yaml | 43 ++++++++++++++-------- 1 file changed, 27 insertions(+), 16 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml b/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml index 49649fc3f95a..e0c7047ae8ad 100644 --- a/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml +++ b/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml @@ -4,14 +4,11 @@ $id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Renesas MSIOF SPI controller +title: Renesas MSIOF SPI / I2S controller maintainers: - Geert Uytterhoeven -allOf: - - $ref: spi-controller.yaml# - properties: compatible: oneOf: @@ -146,24 +143,38 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 default: 64 + # for MSIOF-I2S + port: + $ref: ../sound/audio-graph-port.yaml# + unevaluatedProperties: false + required: - compatible - reg - interrupts - clocks - power-domains - - '#address-cells' - - '#size-cells' - -if: - not: - properties: - compatible: - contains: - const: renesas,sh-mobile-msiof -then: - required: - - resets + +allOf: + # additional "required"" + - if: + not: + properties: + compatible: + contains: + const: renesas,sh-mobile-msiof + then: + required: + - resets + + # If it doesn't have "port" node, it is "MSIOF-SPI" + - if: + not: + required: + - port + then: + allOf: + - $ref: spi-controller.yaml# unevaluatedProperties: false -- cgit v1.2.3 From a733e711278182840b4c9a0329294daa5cc34048 Mon Sep 17 00:00:00 2001 From: Varadarajan Narayanan Date: Mon, 17 Mar 2025 15:30:26 +0530 Subject: dt-bindings: PCI: qcom: Add MHI registers for IPQ9574 The MHI registers are present in IPQ5332, IPQ6018, IPQ8074 and IPQ9574 SoCs. Hence, add the MHI registers to the binding to allow these registers to be defined in devicetree. Signed-off-by: Varadarajan Narayanan [mani: commit message rewording] Signed-off-by: Manivannan Sadhasivam Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250317100029.881286-2-quic_varada@quicinc.com --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index e20f142316cc..9cc26d782258 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -175,14 +175,16 @@ allOf: properties: reg: minItems: 5 - maxItems: 5 + maxItems: 6 reg-names: + minItems: 5 items: - const: dbi # DesignWare PCIe registers - const: elbi # External local bus interface registers - const: atu # ATU address space - const: parf # Qualcomm specific registers - const: config # PCIe configuration space + - const: mhi # MHI registers - if: properties: -- cgit v1.2.3 From e2642509e3d60dc90b74d27b47e36cea71a96186 Mon Sep 17 00:00:00 2001 From: Shin Son Date: Wed, 23 Apr 2025 13:41:51 +0900 Subject: dt-bindings: clock: exynosautov920: add cpucl0 clock definitions Add cpucl0 clock definitions. CPUCL0 refers to CPU Cluster 0, which provide clock support for the CPUs on Exynosauto V920 SoC. Signed-off-by: Shin Son Link: https://lore.kernel.org/r/20250423044153.1288077-2-shin.son@samsung.com Signed-off-by: Krzysztof Kozlowski --- .../clock/samsung,exynosautov920-clock.yaml | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml index 3330b2727474..d12b17c177df 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml @@ -8,6 +8,7 @@ title: Samsung ExynosAuto v920 SoC clock controller maintainers: - Sunyeal Hong + - Shin Son - Chanwoo Choi - Krzysztof Kozlowski - Sylwester Nawrocki @@ -32,6 +33,7 @@ properties: compatible: enum: - samsung,exynosautov920-cmu-top + - samsung,exynosautov920-cmu-cpucl0 - samsung,exynosautov920-cmu-peric0 - samsung,exynosautov920-cmu-peric1 - samsung,exynosautov920-cmu-misc @@ -69,6 +71,29 @@ allOf: items: - const: oscclk + - if: + properties: + compatible: + contains: + enum: + - samsung,exynosautov920-cmu-cpucl0 + + then: + properties: + clocks: + items: + - description: External reference clock (38.4 MHz) + - description: CMU_CPUCL0 SWITCH clock (from CMU_TOP) + - description: CMU_CPUCL0 CLUSTER clock (from CMU_TOP) + - description: CMU_CPUCL0 DBG clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: switch + - const: cluster + - const: dbg + - if: properties: compatible: -- cgit v1.2.3 From 1e3e2cf2df60521eee257b2c77a8f0d8594242ff Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 18 Mar 2025 09:14:28 +0100 Subject: dt-bindings: power: supply: Correct indentation and style in DTS example DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |'. Correct mixtures of the style or any other indentations to use preferred 4-spaces. No functional changes here, but saves some comments during reviews of new patches built on the existing code. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250318081428.33979-1-krzysztof.kozlowski@linaro.org Signed-off-by: Sebastian Reichel --- .../devicetree/bindings/power/supply/bq25980.yaml | 36 +++++++++++----------- .../bindings/power/supply/ingenic,battery.yaml | 14 ++++----- .../bindings/power/supply/ltc4162-l.yaml | 18 +++++------ .../bindings/power/supply/maxim,max77705.yaml | 4 +-- 4 files changed, 36 insertions(+), 36 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/power/supply/bq25980.yaml b/Documentation/devicetree/bindings/power/supply/bq25980.yaml index b70ce8d7f86c..256adbef55eb 100644 --- a/Documentation/devicetree/bindings/power/supply/bq25980.yaml +++ b/Documentation/devicetree/bindings/power/supply/bq25980.yaml @@ -87,28 +87,28 @@ unevaluatedProperties: false examples: - | bat: battery { - compatible = "simple-battery"; - constant-charge-current-max-microamp = <4000000>; - constant-charge-voltage-max-microvolt = <8400000>; - precharge-current-microamp = <160000>; - charge-term-current-microamp = <160000>; + compatible = "simple-battery"; + constant-charge-current-max-microamp = <4000000>; + constant-charge-voltage-max-microvolt = <8400000>; + precharge-current-microamp = <160000>; + charge-term-current-microamp = <160000>; }; #include #include i2c { - #address-cells = <1>; - #size-cells = <0>; - - bq25980: charger@65 { - compatible = "ti,bq25980"; - reg = <0x65>; - interrupt-parent = <&gpio1>; - interrupts = <16 IRQ_TYPE_EDGE_FALLING>; - ti,watchdog-timeout-ms = <0>; - ti,sc-ocp-limit-microamp = <2000000>; - ti,sc-ovp-limit-microvolt = <17800000>; - monitored-battery = <&bat>; - }; + #address-cells = <1>; + #size-cells = <0>; + + bq25980: charger@65 { + compatible = "ti,bq25980"; + reg = <0x65>; + interrupt-parent = <&gpio1>; + interrupts = <16 IRQ_TYPE_EDGE_FALLING>; + ti,watchdog-timeout-ms = <0>; + ti,sc-ocp-limit-microamp = <2000000>; + ti,sc-ovp-limit-microvolt = <17800000>; + monitored-battery = <&bat>; + }; }; ... diff --git a/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml b/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml index 741022b4449d..cb04fb25d8ac 100644 --- a/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml +++ b/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml @@ -48,14 +48,14 @@ examples: #include simple_battery: battery { - compatible = "simple-battery"; - voltage-min-design-microvolt = <3600000>; - voltage-max-design-microvolt = <4200000>; + compatible = "simple-battery"; + voltage-min-design-microvolt = <3600000>; + voltage-max-design-microvolt = <4200000>; }; ingenic-battery { - compatible = "ingenic,jz4740-battery"; - io-channels = <&adc INGENIC_ADC_BATTERY>; - io-channel-names = "battery"; - monitored-battery = <&simple_battery>; + compatible = "ingenic,jz4740-battery"; + io-channels = <&adc INGENIC_ADC_BATTERY>; + io-channel-names = "battery"; + monitored-battery = <&simple_battery>; }; diff --git a/Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml b/Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml index 06595a953659..bc7ed7b22085 100644 --- a/Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml +++ b/Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml @@ -61,13 +61,13 @@ additionalProperties: false examples: - | i2c { - #address-cells = <1>; - #size-cells = <0>; - charger: battery-charger@68 { - compatible = "lltc,ltc4162-l"; - reg = <0x68>; - lltc,rsnsb-micro-ohms = <10000>; - lltc,rsnsi-micro-ohms = <16000>; - lltc,cell-count = <2>; - }; + #address-cells = <1>; + #size-cells = <0>; + charger: battery-charger@68 { + compatible = "lltc,ltc4162-l"; + reg = <0x68>; + lltc,rsnsb-micro-ohms = <10000>; + lltc,rsnsi-micro-ohms = <16000>; + lltc,cell-count = <2>; + }; }; diff --git a/Documentation/devicetree/bindings/power/supply/maxim,max77705.yaml b/Documentation/devicetree/bindings/power/supply/maxim,max77705.yaml index bce7fabbd9d3..e3b84068993b 100644 --- a/Documentation/devicetree/bindings/power/supply/maxim,max77705.yaml +++ b/Documentation/devicetree/bindings/power/supply/maxim,max77705.yaml @@ -37,8 +37,8 @@ examples: #include i2c { - #address-cells = <1>; - #size-cells = <0>; + #address-cells = <1>; + #size-cells = <0>; charger@69 { compatible = "maxim,max77705-charger"; -- cgit v1.2.3 From 4e55fb7d60e128fb5a57921cbd59f9ff29cd4297 Mon Sep 17 00:00:00 2001 From: Ryan Wanner Date: Mon, 14 Apr 2025 14:41:20 -0700 Subject: dt-bindings: reset: atmel,at91sam9260-reset: add microchip,sama7d65-rstc Add SAMA7D65 RSTC compatible to DT bindings documentation. The sama7d65-rstc is compatible with the sama7g5-rstc. Signed-off-by: Ryan Wanner Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/b2bf907cebc2e251f6d8bebade864372e3dbc1eb.1744666011.git.Ryan.Wanner@microchip.com Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml b/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml index c3b33bbc7319..84c4801df8d9 100644 --- a/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml +++ b/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml @@ -23,6 +23,9 @@ properties: - atmel,sama5d3-rstc - microchip,sam9x60-rstc - microchip,sama7g5-rstc + - items: + - const: microchip,sama7d65-rstc + - const: microchip,sama7g5-rstc - items: - const: atmel,sama5d3-rstc - const: atmel,at91sam9g45-rstc -- cgit v1.2.3 From 6133b98d39e8bdb7c4d9211e9f00e9580a7d2d11 Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Mon, 21 Apr 2025 23:27:33 -0500 Subject: dt-bindings: power: supply: bq24190: Add BQ24193 compatible The BQ24193 is most similar to the BQ24192. This is used in many Nvidia Tegra devices such as the SHIELD Portable. Signed-off-by: Aaron Kling Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250421-bq24193-v1-1-f125ef396d24@gmail.com Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/power/supply/bq24190.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/power/supply/bq24190.yaml b/Documentation/devicetree/bindings/power/supply/bq24190.yaml index 07adf88997b4..307c99c07721 100644 --- a/Documentation/devicetree/bindings/power/supply/bq24190.yaml +++ b/Documentation/devicetree/bindings/power/supply/bq24190.yaml @@ -19,6 +19,7 @@ properties: - ti,bq24190 - ti,bq24192 - ti,bq24192i + - ti,bq24193 - ti,bq24196 - ti,bq24296 - ti,bq24297 -- cgit v1.2.3 From 8b9b2f0547627476517a602ebdfee040c0b6698e Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Fri, 7 Mar 2025 00:57:11 +0000 Subject: dt-bindings: arm: sunxi: Add YuzukiHD Chameleon board name The Chameleon is an Open Source hardware board designed by YuzkuiHD, using the Allwinner H618 SoC: https://github.com/YuzukiHD/YuzukiChameleon Add its compatible name to the list of valid board name. Signed-off-by: Andre Przywara Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250307005712.16828-15-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai --- Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index 61627c900b31..cb354c2c61b2 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -1096,4 +1096,9 @@ properties: - const: yuzukihd,avaota-a1 - const: allwinner,sun55i-t527 + - description: YuzukiHD Chameleon + items: + - const: yuzukihd,chameleon + - const: allwinner,sun50i-h618 + additionalProperties: true -- cgit v1.2.3 From eff4e04c892774b1cf7ce43afbb186ff0be870c0 Mon Sep 17 00:00:00 2001 From: Keguang Zhang Date: Thu, 20 Mar 2025 18:31:37 +0800 Subject: dt-bindings: mtd: Add Loongson-1 NAND Controller Add devicetree binding document for Loongson-1 NAND controller. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Keguang Zhang Signed-off-by: Miquel Raynal --- .../mtd/loongson,ls1b-nand-controller.yaml | 72 ++++++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/loongson,ls1b-nand-controller.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mtd/loongson,ls1b-nand-controller.yaml b/Documentation/devicetree/bindings/mtd/loongson,ls1b-nand-controller.yaml new file mode 100644 index 000000000000..a09e92e416c4 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/loongson,ls1b-nand-controller.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/loongson,ls1b-nand-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson-1 NAND Controller + +maintainers: + - Keguang Zhang + +description: + The Loongson-1 NAND controller abstracts all supported operations, + meaning it does not support low-level access to raw NAND flash chips. + Moreover, the controller is paired with the DMA engine to perform + READ and PROGRAM functions. + +allOf: + - $ref: nand-controller.yaml + +properties: + compatible: + oneOf: + - enum: + - loongson,ls1b-nand-controller + - loongson,ls1c-nand-controller + - items: + - enum: + - loongson,ls1a-nand-controller + - const: loongson,ls1b-nand-controller + + reg: + maxItems: 2 + + reg-names: + items: + - const: nand + - const: nand-dma + + dmas: + maxItems: 1 + + dma-names: + const: rxtx + +required: + - compatible + - reg + - reg-names + - dmas + - dma-names + +unevaluatedProperties: false + +examples: + - | + nand-controller@1fe78000 { + compatible = "loongson,ls1b-nand-controller"; + reg = <0x1fe78000 0x24>, <0x1fe78040 0x4>; + reg-names = "nand", "nand-dma"; + dmas = <&dma 0>; + dma-names = "rxtx"; + #address-cells = <1>; + #size-cells = <0>; + + nand@0 { + reg = <0>; + label = "ls1x-nand"; + nand-use-soft-ecc-engine; + nand-ecc-algo = "hamming"; + }; + }; -- cgit v1.2.3 From b8ed9475384fd78e7650b7c4a403c1958a765a74 Mon Sep 17 00:00:00 2001 From: Nicolas Frattaroli Date: Thu, 24 Apr 2025 20:52:22 +0200 Subject: dt-bindings: ata: rockchip-dwc-ahci: add RK3576 compatible The Rockchip RK3576 has two SATA controllers. They work the same as the RK3568 SATA controllers, having the same number of clocks and ports. Signed-off-by: Nicolas Frattaroli Acked-by: Krzysztof Kozlowski Reviewed-by: Niklas Cassel Link: https://lore.kernel.org/r/20250424-rk3576-sata-v1-1-23ee89c939fe@collabora.com Signed-off-by: Niklas Cassel --- Documentation/devicetree/bindings/ata/rockchip,dwc-ahci.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ata/rockchip,dwc-ahci.yaml b/Documentation/devicetree/bindings/ata/rockchip,dwc-ahci.yaml index 13eaa8d9a16e..b5ecaabfe2e2 100644 --- a/Documentation/devicetree/bindings/ata/rockchip,dwc-ahci.yaml +++ b/Documentation/devicetree/bindings/ata/rockchip,dwc-ahci.yaml @@ -20,6 +20,7 @@ select: contains: enum: - rockchip,rk3568-dwc-ahci + - rockchip,rk3576-dwc-ahci - rockchip,rk3588-dwc-ahci required: - compatible @@ -29,6 +30,7 @@ properties: items: - enum: - rockchip,rk3568-dwc-ahci + - rockchip,rk3576-dwc-ahci - rockchip,rk3588-dwc-ahci - const: snps,dwc-ahci @@ -83,6 +85,7 @@ allOf: contains: enum: - rockchip,rk3568-dwc-ahci + - rockchip,rk3576-dwc-ahci then: properties: clocks: -- cgit v1.2.3 From 78693ff68c8c8aa8b8553351e8548386cccdd0c6 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Fri, 11 Apr 2025 16:08:58 -0400 Subject: dt-bindings: mtd: convert vf610-nfc to yaml format Convert binding doc vf610-nfc to yaml format. Additional changes: - ref to nand-controller.yaml. - include arm-gic.h and vf610-clock.h in examples. - add clocks and clock-names description. - remove #address-cells, #size-cells assigned-clocks and assigned-clock-rates. Signed-off-by: Frank Li Reviewed-by: Rob Herring (Arm) Signed-off-by: Miquel Raynal --- .../devicetree/bindings/mtd/fsl,vf610-nfc.yaml | 89 ++++++++++++++++++++++ .../devicetree/bindings/mtd/vf610-nfc.txt | 59 -------------- 2 files changed, 89 insertions(+), 59 deletions(-) create mode 100644 Documentation/devicetree/bindings/mtd/fsl,vf610-nfc.yaml delete mode 100644 Documentation/devicetree/bindings/mtd/vf610-nfc.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mtd/fsl,vf610-nfc.yaml b/Documentation/devicetree/bindings/mtd/fsl,vf610-nfc.yaml new file mode 100644 index 000000000000..480a5c87859d --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/fsl,vf610-nfc.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/fsl,vf610-nfc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale's NAND flash controller (NFC) + +description: + This variant of the Freescale NAND flash controller (NFC) can be found on + Vybrid (vf610), MPC5125, MCF54418 and Kinetis K70. + +maintainers: + - Frank Li + +properties: + compatible: + enum: + - fsl,vf610-nfc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: nfc + +patternProperties: + "^nand@[a-f0-9]$": + type: object + $ref: raw-nand-chip.yaml + + properties: + compatible: + const: fsl,vf610-nfc-nandcs + + reg: + const: 0 + + nand-ecc-strength: + enum: [24, 32] + + nand-ecc-step-size: + const: 2048 + + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + +allOf: + - $ref: nand-controller.yaml + +unevaluatedProperties: false + +examples: + - | + #include + #include + + nand-controller@400e0000 { + compatible = "fsl,vf610-nfc"; + reg = <0x400e0000 0x4000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&clks VF610_CLK_NFC>; + clock-names = "nfc"; + assigned-clocks = <&clks VF610_CLK_NFC>; + assigned-clock-rates = <33000000>; + + nand@0 { + compatible = "fsl,vf610-nfc-nandcs"; + reg = <0>; + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + nand-ecc-strength = <32>; + nand-ecc-step-size = <2048>; + nand-on-flash-bbt; + }; + }; diff --git a/Documentation/devicetree/bindings/mtd/vf610-nfc.txt b/Documentation/devicetree/bindings/mtd/vf610-nfc.txt deleted file mode 100644 index 7db5e6e609df..000000000000 --- a/Documentation/devicetree/bindings/mtd/vf610-nfc.txt +++ /dev/null @@ -1,59 +0,0 @@ -Freescale's NAND flash controller (NFC) - -This variant of the Freescale NAND flash controller (NFC) can be found on -Vybrid (vf610), MPC5125, MCF54418 and Kinetis K70. - -Required properties: -- compatible: Should be set to "fsl,vf610-nfc". -- reg: address range of the NFC. -- interrupts: interrupt of the NFC. -- #address-cells: shall be set to 1. Encode the nand CS. -- #size-cells : shall be set to 0. -- assigned-clocks: main clock from the SoC, for Vybrid <&clks VF610_CLK_NFC>; -- assigned-clock-rates: The NAND bus timing is derived from this clock - rate and should not exceed maximum timing for any NAND memory chip - in a board stuffing. Typical NAND memory timings derived from this - clock are found in the SoC hardware reference manual. Furthermore, - there might be restrictions on maximum rates when using hardware ECC. - -- #address-cells, #size-cells : Must be present if the device has sub-nodes - representing partitions. - -Required children nodes: -Children nodes represent the available nand chips. Currently the driver can -only handle one NAND chip. - -Required properties: -- compatible: Should be set to "fsl,vf610-nfc-cs". -- nand-bus-width: see nand-controller.yaml -- nand-ecc-mode: see nand-controller.yaml - -Required properties for hardware ECC: -- nand-ecc-strength: supported strengths are 24 and 32 bit (see nand-controller.yaml) -- nand-ecc-step-size: step size equals page size, currently only 2k pages are - supported -- nand-on-flash-bbt: see nand-controller.yaml - -Example: - - nfc: nand@400e0000 { - compatible = "fsl,vf610-nfc"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x400e0000 0x4000>; - interrupts = ; - clocks = <&clks VF610_CLK_NFC>; - clock-names = "nfc"; - assigned-clocks = <&clks VF610_CLK_NFC>; - assigned-clock-rates = <33000000>; - - nand@0 { - compatible = "fsl,vf610-nfc-nandcs"; - reg = <0>; - nand-bus-width = <8>; - nand-ecc-mode = "hw"; - nand-ecc-strength = <32>; - nand-ecc-step-size = <2048>; - nand-on-flash-bbt; - }; - }; -- cgit v1.2.3 From b3610f20905fbc95afb61370df02bf1bfbb538c0 Mon Sep 17 00:00:00 2001 From: Chaoyi Chen Date: Fri, 18 Apr 2025 09:47:56 +0800 Subject: dt-bindings: arm: rockchip: Add rk3588 evb2 board Add devicetree binding for the rk3588 evb2 board. Signed-off-by: Chaoyi Chen Acked-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250418014757.336-2-kernel@airkyi.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 650fb833d96e..455fbb290b77 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -1074,7 +1074,9 @@ properties: - description: Rockchip RK3588 Evaluation board items: - - const: rockchip,rk3588-evb1-v10 + - enum: + - rockchip,rk3588-evb1-v10 + - rockchip,rk3588-evb2-v10 - const: rockchip,rk3588 - description: Rockchip RK3588S Evaluation board -- cgit v1.2.3 From af73692e7b486497b8983d7cabbcd5e4dcf5cb98 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 24 Mar 2025 13:53:02 +0100 Subject: dt-bindings: interconnect: Correct indentation and style in DTS example DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. While re-indenting, drop unused labels. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski Reviewed-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250324125302.82167-1-krzysztof.kozlowski@linaro.org Signed-off-by: Georgi Djakov --- .../bindings/interconnect/qcom,msm8939.yaml | 8 +++---- .../bindings/interconnect/qcom,msm8953.yaml | 20 ++++++++-------- .../bindings/interconnect/qcom,msm8974.yaml | 20 ++++++++-------- .../devicetree/bindings/interconnect/qcom,rpm.yaml | 12 +++++----- .../bindings/interconnect/qcom,rpmh.yaml | 28 +++++++++++----------- .../bindings/interconnect/qcom,sdx75-rpmh.yaml | 16 ++++++------- 6 files changed, 52 insertions(+), 52 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8939.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8939.yaml index 4b08be72bbd7..534644cccdcb 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8939.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8939.yaml @@ -70,8 +70,8 @@ examples: reg = <0x00580000 0x14000>; #interconnect-cells = <1>; - snoc_mm: interconnect-snoc { - compatible = "qcom,msm8939-snoc-mm"; - #interconnect-cells = <1>; - }; + snoc_mm: interconnect-snoc { + compatible = "qcom,msm8939-snoc-mm"; + #interconnect-cells = <1>; + }; }; diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8953.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8953.yaml index 343ff62d7b65..56cdb77b369a 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8953.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8953.yaml @@ -84,17 +84,17 @@ additionalProperties: false examples: - | - #include + #include - snoc: interconnect@580000 { - compatible = "qcom,msm8953-snoc"; - reg = <0x580000 0x16080>; + interconnect@580000 { + compatible = "qcom,msm8953-snoc"; + reg = <0x580000 0x16080>; - #interconnect-cells = <2>; + #interconnect-cells = <2>; - snoc_mm: interconnect-snoc { - compatible = "qcom,msm8953-snoc-mm"; + interconnect-snoc { + compatible = "qcom,msm8953-snoc-mm"; - #interconnect-cells = <2>; - }; - }; + #interconnect-cells = <2>; + }; + }; diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml index 8004c4baf397..95ce25ce1f7d 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml @@ -50,13 +50,13 @@ additionalProperties: false examples: - | - #include - - bimc: interconnect@fc380000 { - reg = <0xfc380000 0x6a000>; - compatible = "qcom,msm8974-bimc"; - #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; - clocks = <&rpmcc RPM_SMD_BIMC_CLK>, - <&rpmcc RPM_SMD_BIMC_A_CLK>; - }; + #include + + interconnect@fc380000 { + reg = <0xfc380000 0x6a000>; + compatible = "qcom,msm8974-bimc"; + #interconnect-cells = <1>; + clock-names = "bus", "bus_a"; + clocks = <&rpmcc RPM_SMD_BIMC_CLK>, + <&rpmcc RPM_SMD_BIMC_A_CLK>; + }; diff --git a/Documentation/devicetree/bindings/interconnect/qcom,rpm.yaml b/Documentation/devicetree/bindings/interconnect/qcom,rpm.yaml index 5aaa92a7cef7..01d436d4a553 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,rpm.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,rpm.yaml @@ -41,10 +41,10 @@ unevaluatedProperties: false examples: - | - #include + #include - bimc: interconnect@400000 { - compatible = "qcom,msm8916-bimc"; - reg = <0x00400000 0x62000>; - #interconnect-cells = <1>; - }; + interconnect@400000 { + compatible = "qcom,msm8916-bimc"; + reg = <0x00400000 0x62000>; + #interconnect-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml index 1b9164dc162f..dad3ad2fd93b 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml @@ -127,19 +127,19 @@ unevaluatedProperties: false examples: - | - #include + #include - mem_noc: interconnect@1380000 { - compatible = "qcom,sdm845-mem-noc"; - reg = <0x01380000 0x27200>; - #interconnect-cells = <1>; - qcom,bcm-voters = <&apps_bcm_voter>; - }; + interconnect@1380000 { + compatible = "qcom,sdm845-mem-noc"; + reg = <0x01380000 0x27200>; + #interconnect-cells = <1>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; - mmss_noc: interconnect@1740000 { - compatible = "qcom,sdm845-mmss-noc"; - reg = <0x01740000 0x1c1000>; - #interconnect-cells = <1>; - qcom,bcm-voter-names = "apps", "disp"; - qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>; - }; + interconnect@1740000 { + compatible = "qcom,sdm845-mmss-noc"; + reg = <0x01740000 0x1c1000>; + #interconnect-cells = <1>; + qcom,bcm-voter-names = "apps", "disp"; + qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>; + }; diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sdx75-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sdx75-rpmh.yaml index 71cf7e252bfc..4b5e9f9b07ec 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,sdx75-rpmh.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,sdx75-rpmh.yaml @@ -78,15 +78,15 @@ examples: #include clk_virt: interconnect-0 { - compatible = "qcom,sdx75-clk-virt"; - #interconnect-cells = <2>; - qcom,bcm-voters = <&apps_bcm_voter>; - clocks = <&rpmhcc RPMH_QPIC_CLK>; + compatible = "qcom,sdx75-clk-virt"; + #interconnect-cells = <2>; + qcom,bcm-voters = <&apps_bcm_voter>; + clocks = <&rpmhcc RPMH_QPIC_CLK>; }; system_noc: interconnect@1640000 { - compatible = "qcom,sdx75-system-noc"; - reg = <0x1640000 0x4b400>; - #interconnect-cells = <2>; - qcom,bcm-voters = <&apps_bcm_voter>; + compatible = "qcom,sdx75-system-noc"; + reg = <0x1640000 0x4b400>; + #interconnect-cells = <2>; + qcom,bcm-voters = <&apps_bcm_voter>; }; -- cgit v1.2.3 From b376108e1f88df9fbbb3867634150a3dd71e3acb Mon Sep 17 00:00:00 2001 From: Mark Rutland Date: Thu, 17 Apr 2025 20:01:13 +0100 Subject: arm64/fpsimd: signal: Clear TPIDR2 when delivering signals Linux is intended to be compatible with userspace written to Arm's AAPCS64 procedure call standard [1,2]. For the Scalable Matrix Extension (SME), AAPCS64 was extended with a "ZA lazy saving scheme", where SME's ZA tile is lazily callee-saved and caller-restored. In this scheme, TPIDR2_EL0 indicates whether the ZA tile is live or has been saved by pointing to a "TPIDR2 block" in memory, which has a "za_save_buffer" pointer. This scheme has been implemented in GCC and LLVM, with necessary runtime support implemented in glibc. AAPCS64 does not specify how the ZA lazy saving scheme is expected to interact with signal handling, and the behaviour that AAPCS64 currently recommends for (sig)setjmp() and (sig)longjmp() does not always compose safely with signal handling, as explained below. When Linux delivers a signal, it creates signal frames which contain the original values of PSTATE.ZA, the ZA tile, and TPIDR_EL2. Between saving the original state and entering the signal handler, Linux clears PSTATE.ZA, but leaves TPIDR2_EL0 unchanged. Consequently a signal handler can be entered with PSTATE.ZA=0 (meaning accesses to ZA will trap), while TPIDR_EL0 is non-null (which may indicate that ZA needs to be lazily saved, depending on the contents of the TPIDR2 block). While in this state, libc and/or compiler runtime code, such as longjmp(), may attempt to save ZA. As PSTATE.ZA=0, these accesses will trap, causing the kernel to inject a SIGILL. Note that by virtue of lazy saving occurring in libc and/or C runtime code, this can be triggered by application/library code which is unaware of SME. To avoid the problem above, the kernel must ensure that signal handlers are entered with PSTATE.ZA and TPIDR2_EL0 configured in a manner which complies with the ZA lazy saving scheme. Practically speaking, the only choice is to enter signal handlers with PSTATE.ZA=0 and TPIDR2_EL0=NULL. This change should not impact SME code which does not follow the ZA lazy saving scheme (and hence does not use TPIDR2_EL0). An alternative approach that was considered is to have the signal handler inherit the original values of both PSTATE.ZA and TPIDR2_EL0, relying on lazy save/restore sequences being idempotent and capable of racing safely. This is not safe as signal handlers must be assumed to have a "private ZA" interface, and therefore cannot be entered with PSTATE.ZA=1 and TPIDR2_EL0=NULL, but it is legitimate for signals to be taken from this state. With the kernel fixed to clear TPIDR2_EL0, there are a couple of remaining issues (largely masked by the first issue) that must be fixed in userspace: (1) When a (sig)setjmp() + (sig)longjmp() pair cross a signal boundary, ZA state may be discarded when it needs to be preserved. Currently, the ZA lazy saving scheme recommends that setjmp() does not save ZA, and recommends that longjmp() is responsible for saving ZA. A call to longjmp() in a signal handler will not have visibility of ZA state that existed prior to entry to the signal, and when a longjmp() is used to bypass a usual signal return, unsaved ZA state will be discarded erroneously. To fix this, it is necessary for setjmp() to eagerly save ZA state, and for longjmp() to configure PSTATE.ZA=0 and TPIDR2_EL0=NULL. This works regardless of whether a signal boundary is crossed. (2) When a C++ exception is thrown and crosses a signal boundary before it is caught, ZA state may be discarded when it needs to be preserved. AAPCS64 requires that exception handlers are entered with PSTATE.{SM,ZA}={0,0} and TPIDR2_EL0=NULL, with exception unwind code expected to perform any necessary save of ZA state. Where it is necessary to perform an exception unwind across an exception boundary, the unwind code must recover any necessary ZA state (along with TPIDR2) from signal frames. Fix the kernel as described above, with setup_return() clearing TPIDR2_EL0 when delivering a signal. Folk on CC are working on fixes for the remaining userspace issues, including updates/fixes to the AAPCS64 specification and glibc. [1] https://github.com/ARM-software/abi-aa/releases/download/2025Q1/aapcs64.pdf [2] https://github.com/ARM-software/abi-aa/blob/c51addc3dc03e73a016a1e4edf25440bcac76431/aapcs64/aapcs64.rst Fixes: 39782210eb7e ("arm64/sme: Implement ZA signal handling") Fixes: 39e54499280f ("arm64/signal: Include TPIDR2 in the signal context") Signed-off-by: Mark Rutland Cc: Daniel Kiss Cc: Marc Zyngier Cc: Mark Brown Cc: Richard Sandiford Cc: Sander De Smalen Cc: Tamas Petz Cc: Will Deacon Cc: Yury Khrustalev Link: https://lore.kernel.org/r/20250417190113.3778111-1-mark.rutland@arm.com Signed-off-by: Catalin Marinas --- Documentation/arch/arm64/sme.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/arch/arm64/sme.rst b/Documentation/arch/arm64/sme.rst index b2fa01f85cb5..3a98aed92732 100644 --- a/Documentation/arch/arm64/sme.rst +++ b/Documentation/arch/arm64/sme.rst @@ -115,7 +115,7 @@ be zeroed. 5. Signal handling ------------------- -* Signal handlers are invoked with streaming mode and ZA disabled. +* Signal handlers are invoked with PSTATE.SM=0, PSTATE.ZA=0, and TPIDR2_EL0=0. * A new signal frame record TPIDR2_MAGIC is added formatted as a struct tpidr2_context to allow access to TPIDR2_EL0 from signal handlers. -- cgit v1.2.3 From 149a133a548158586058d14963b4e3a699d0de70 Mon Sep 17 00:00:00 2001 From: Chen Linxuan Date: Tue, 8 Apr 2025 15:35:50 +0800 Subject: docs: tproxy: fix formatting for nft code block The nft command snippet for redirecting traffic isn't formatted in a literal code block like the rest of snippets. Fix the formatting inconsistency. Signed-off-by: Chen Linxuan Reviewed-by: Bagas Sanjaya Signed-off-by: Pablo Neira Ayuso --- Documentation/networking/tproxy.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/tproxy.rst b/Documentation/networking/tproxy.rst index 7f7c1ff6f159..75e4990cc3db 100644 --- a/Documentation/networking/tproxy.rst +++ b/Documentation/networking/tproxy.rst @@ -69,9 +69,9 @@ add rules like this to the iptables ruleset above:: # iptables -t mangle -A PREROUTING -p tcp --dport 80 -j TPROXY \ --tproxy-mark 0x1/0x1 --on-port 50080 -Or the following rule to nft: +Or the following rule to nft:: -# nft add rule filter divert tcp dport 80 tproxy to :50080 meta mark set 1 accept + # nft add rule filter divert tcp dport 80 tproxy to :50080 meta mark set 1 accept Note that for this to work you'll have to modify the proxy to enable (SOL_IP, IP_TRANSPARENT) for the listening socket. -- cgit v1.2.3 From 6382f4e4e7bd65b829d1d598b1315e905accc15c Mon Sep 17 00:00:00 2001 From: Cui Wei Date: Sat, 26 Apr 2025 21:56:09 +0800 Subject: Documentation: fix speculation.rst chapter 'Mitigating speculation side-channels' should be a chapter rather than title. Signed-off-by: Cui Wei Signed-off-by: Jonathan Corbet Message-ID: <20250426135609.735-1-chris.wei.cui@gmail.com> --- Documentation/staging/speculation.rst | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/staging/speculation.rst b/Documentation/staging/speculation.rst index 8045d99bcf12..0d526ba55d14 100644 --- a/Documentation/staging/speculation.rst +++ b/Documentation/staging/speculation.rst @@ -63,7 +63,6 @@ of an out-of-bounds address, while the second call will influence microarchitectural state dependent on this value. This may provide an arbitrary read primitive. -==================================== Mitigating speculation side-channels ==================================== -- cgit v1.2.3 From 1cf87b00a74d3ee3006d825855e0075ddd2eab2f Mon Sep 17 00:00:00 2001 From: Emanuele Ghidoli Date: Mon, 14 Apr 2025 19:14:54 +0200 Subject: dt-bindings: power: reset: add toradex,smarc-ec The Toradex Embedded Controller provides system power-off and restart functionalities. The two variants, SMARC iMX95 and SMARC iMX8P, have a compatible I2C interface. Besides this, different compatible values are defined to allow for future implementation differences. Signed-off-by: Emanuele Ghidoli Signed-off-by: Francesco Dolcini Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/20250414171455.155155-2-francesco@dolcini.it Signed-off-by: Sebastian Reichel --- .../bindings/power/reset/toradex,smarc-ec.yaml | 52 ++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/reset/toradex,smarc-ec.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/power/reset/toradex,smarc-ec.yaml b/Documentation/devicetree/bindings/power/reset/toradex,smarc-ec.yaml new file mode 100644 index 000000000000..ffcd5f2c2bf6 --- /dev/null +++ b/Documentation/devicetree/bindings/power/reset/toradex,smarc-ec.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/reset/toradex,smarc-ec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toradex Embedded Controller + +maintainers: + - Emanuele Ghidoli + - Francesco Dolcini + +description: | + The Toradex Embedded Controller (EC) is used on Toradex SMARC modules, + primarily to manage power and reset functionalities. + + The EC provides the following functions: + - Reads the SMARC POWER_BTN# and RESET_IN# signals and controls the PMIC accordingly. + - Controls the SoC boot mode signals based on the SMARC BOOT_SEL# and FORCE_RECOV# inputs. + - Manages the CARRIER_STDBY# signal in response to relevant SoC signals. + + The EC runs a small firmware, factory programmed into its internal flash, and communicates over I2C. + It allows software to control power-off and reset functionalities of the module. + +properties: + compatible: + items: + - enum: + - toradex,smarc-imx95-ec + - toradex,smarc-imx8mp-ec + - const: toradex,smarc-ec + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + reset-controller@28 { + compatible = "toradex,smarc-imx95-ec", "toradex,smarc-ec"; + reg = <0x28>; + }; + }; -- cgit v1.2.3 From 292c39b4d78c296e29220a928d05a53f5e64747d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Adrian=20B=C3=BCtler?= Date: Sat, 26 Apr 2025 14:23:03 +0200 Subject: Documentation: x86: Fix a typo in fsgs.rst MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix a spelling typo in fsgs.rst. Signed-off-by: Adrian Bütler Signed-off-by: Jonathan Corbet Message-ID: <20250426122303.15905-1-buetlera123@gmail.com> --- Documentation/arch/x86/x86_64/fsgs.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/arch/x86/x86_64/fsgs.rst b/Documentation/arch/x86/x86_64/fsgs.rst index d07e445dac5c..6bda4d16d3f7 100644 --- a/Documentation/arch/x86/x86_64/fsgs.rst +++ b/Documentation/arch/x86/x86_64/fsgs.rst @@ -130,7 +130,7 @@ instructions. Clang 5 supports them as well. =================== =========================== _readfsbase_u64() Read the FS base register - _readfsbase_u64() Read the GS base register + _readgsbase_u64() Read the GS base register _writefsbase_u64() Write the FS base register _writegsbase_u64() Write the GS base register =================== =========================== -- cgit v1.2.3 From b437bf2dc577b100824b4d28c26792b206278ef3 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 25 Apr 2025 15:13:38 +0800 Subject: docs: Sphinx: kerneldoc: only initialize kernel-doc classes once Instead of re-creating the objects every time, initialize it just once. This allows caching previously parsed objects. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Message-ID: --- Documentation/sphinx/kerneldoc.py | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) (limited to 'Documentation') diff --git a/Documentation/sphinx/kerneldoc.py b/Documentation/sphinx/kerneldoc.py index 27baf28fb754..b713a2c4a615 100644 --- a/Documentation/sphinx/kerneldoc.py +++ b/Documentation/sphinx/kerneldoc.py @@ -48,7 +48,8 @@ from kdoc_files import KernelFiles from kdoc_output import RestFormat __version__ = '1.0' -use_kfiles = False +kfiles = None +logger = logging.getLogger('kerneldoc') def cmd_str(cmd): """ @@ -86,7 +87,6 @@ class KernelDocDirective(Directive): 'functions': directives.unchanged, } has_content = False - logger = logging.getLogger('kerneldoc') verbose = 0 parse_args = {} @@ -204,7 +204,7 @@ class KernelDocDirective(Directive): node = nodes.section() try: - self.logger.verbose("calling kernel-doc '%s'" % (" ".join(cmd))) + logger.verbose("calling kernel-doc '%s'" % (" ".join(cmd))) p = subprocess.Popen(cmd, stdout=subprocess.PIPE, stderr=subprocess.PIPE) out, err = p.communicate() @@ -214,14 +214,14 @@ class KernelDocDirective(Directive): if p.returncode != 0: sys.stderr.write(err) - self.logger.warning("kernel-doc '%s' failed with return code %d" + logger.warning("kernel-doc '%s' failed with return code %d" % (" ".join(cmd), p.returncode)) return [nodes.error(None, nodes.paragraph(text = "kernel-doc missing"))] elif env.config.kerneldoc_verbosity > 0: sys.stderr.write(err) except Exception as e: # pylint: disable=W0703 - self.logger.warning("kernel-doc '%s' processing failed with: %s" % + logger.warning("kernel-doc '%s' processing failed with: %s" % (" ".join(cmd), str(e))) return [nodes.error(None, nodes.paragraph(text = "kernel-doc missing"))] @@ -261,7 +261,7 @@ class KernelDocDirective(Directive): self.do_parse(result, node) except Exception as e: # pylint: disable=W0703 - self.logger.warning("kernel-doc '%s' processing failed with: %s" % + logger.warning("kernel-doc '%s' processing failed with: %s" % (cmd_str(cmd), str(e))) return [nodes.error(None, nodes.paragraph(text = "kernel-doc missing"))] @@ -292,11 +292,9 @@ class KernelDocDirective(Directive): return node.children def run(self): - global use_kfiles + global kfiles - if use_kfiles: - out_style = RestFormat() - kfiles = KernelFiles(out_style=out_style, logger=self.logger) + if kfiles: return self.run_kdoc(kfiles) else: return self.run_cmd() @@ -306,13 +304,14 @@ class KernelDocDirective(Directive): self.state.nested_parse(result, 0, node, match_titles=1) def setup_kfiles(app): - global use_kfiles + global kfiles kerneldoc_bin = app.env.config.kerneldoc_bin if kerneldoc_bin and kerneldoc_bin.endswith("kernel-doc.py"): print("Using Python kernel-doc") - use_kfiles = True + out_style = RestFormat() + kfiles = KernelFiles(out_style=out_style, logger=logger) else: print(f"Using {kerneldoc_bin}") -- cgit v1.2.3 From 6c2f0b28d76e76c9879c030967e6587ebaeabce0 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 25 Apr 2025 08:08:53 +0800 Subject: docs: Makefile: store __pycache__ at the output directory Instead of blocking creation of *.pyc cache, store python cache under Documentation/output/__pycache__ Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Message-ID: <1b9e7f34c1d99a27a8abb308da3221b4663b5693.1745539360.git.mchehab+huawei@kernel.org> --- Documentation/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/Makefile b/Documentation/Makefile index 8c1f6a3dfc44..59e95ebae786 100644 --- a/Documentation/Makefile +++ b/Documentation/Makefile @@ -84,7 +84,7 @@ loop_cmd = $(echo-cmd) $(cmd_$(1)) || exit; quiet_cmd_sphinx = SPHINX $@ --> file://$(abspath $(BUILDDIR)/$3/$4) cmd_sphinx = $(MAKE) BUILDDIR=$(abspath $(BUILDDIR)) $(build)=Documentation/userspace-api/media $2 && \ - PYTHONDONTWRITEBYTECODE=1 \ + PYTHONPYCACHEPREFIX=$(abspath $(BUILDDIR)/__pycache__) \ BUILDDIR=$(abspath $(BUILDDIR)) SPHINX_CONF=$(abspath $(src)/$5/$(SPHINX_CONF)) \ $(PYTHON3) $(srctree)/scripts/jobserver-exec \ $(CONFIG_SHELL) $(srctree)/Documentation/sphinx/parallel-wrapper.sh \ -- cgit v1.2.3 From c0fe189b590c754f69e0cb87c5b5674cad535cf6 Mon Sep 17 00:00:00 2001 From: Joel Savitz Date: Mon, 21 Apr 2025 12:17:23 -0400 Subject: docs: namespace: Tweak and reword resource control doc Fix the document title and reword the phrasing to active voice. Signed-off-by: Joel Savitz Message-ID: <20250421161723.1138903-1-jsavitz@redhat.com> Signed-off-by: Jonathan Corbet --- .../admin-guide/namespaces/resource-control.rst | 24 +++++++++++----------- 1 file changed, 12 insertions(+), 12 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/namespaces/resource-control.rst b/Documentation/admin-guide/namespaces/resource-control.rst index 369556e00f0c..553a44803231 100644 --- a/Documentation/admin-guide/namespaces/resource-control.rst +++ b/Documentation/admin-guide/namespaces/resource-control.rst @@ -1,17 +1,17 @@ -=========================== -Namespaces research control -=========================== +==================================== +User namespaces and resource control +==================================== -There are a lot of kinds of objects in the kernel that don't have -individual limits or that have limits that are ineffective when a set -of processes is allowed to switch user ids. With user namespaces -enabled in a kernel for people who don't trust their users or their -users programs to play nice this problems becomes more acute. +The kernel contains many kinds of objects that either don't have +individual limits or that have limits which are ineffective when +a set of processes is allowed to switch their UID. On a system +where the admins don't trust their users or their users' programs, +user namespaces expose the system to potential misuse of resources. -Therefore it is recommended that memory control groups be enabled in -kernels that enable user namespaces, and it is further recommended -that userspace configure memory control groups to limit how much -memory user's they don't trust to play nice can use. +In order to mitigate this, we recommend that admins enable memory +control groups on any system that enables user namespaces. +Furthermore, we recommend that admins configure the memory control +groups to limit the maximum memory usable by any untrusted user. Memory control groups can be configured by installing the libcgroup package present on most distros editing /etc/cgrules.conf, -- cgit v1.2.3 From 0d15a26b247d25cd012134bf8825128fedb15cc9 Mon Sep 17 00:00:00 2001 From: MD Danish Anwar Date: Thu, 24 Apr 2025 15:23:16 +0530 Subject: net: ti: icssg-prueth: Add ICSSG FW Stats The ICSSG firmware maintains set of stats called PA_STATS. Currently the driver only dumps 4 stats. Add support for dumping more stats. The offset for different stats are defined as MACROs in icssg_switch_map.h file. All the offsets are for Slice0. Slice1 offsets are slice0 + 4. The offset calculation is taken care while reading the stats in emac_update_hardware_stats(). The statistics are documented in Documentation/networking/device_drivers/icssg_prueth.rst Reviewed-by: Simon Horman Signed-off-by: MD Danish Anwar Link: https://patch.msgid.link/20250424095316.2643573-1-danishanwar@ti.com Signed-off-by: Jakub Kicinski --- .../networking/device_drivers/ethernet/index.rst | 1 + .../device_drivers/ethernet/ti/icssg_prueth.rst | 56 ++++++++++++++++++++++ 2 files changed, 57 insertions(+) create mode 100644 Documentation/networking/device_drivers/ethernet/ti/icssg_prueth.rst (limited to 'Documentation') diff --git a/Documentation/networking/device_drivers/ethernet/index.rst b/Documentation/networking/device_drivers/ethernet/index.rst index 05d822b904b4..f9ed93c1da35 100644 --- a/Documentation/networking/device_drivers/ethernet/index.rst +++ b/Documentation/networking/device_drivers/ethernet/index.rst @@ -55,6 +55,7 @@ Contents: ti/cpsw_switchdev ti/am65_nuss_cpsw_switchdev ti/tlan + ti/icssg_prueth wangxun/txgbe wangxun/ngbe diff --git a/Documentation/networking/device_drivers/ethernet/ti/icssg_prueth.rst b/Documentation/networking/device_drivers/ethernet/ti/icssg_prueth.rst new file mode 100644 index 000000000000..da21ddf431bb --- /dev/null +++ b/Documentation/networking/device_drivers/ethernet/ti/icssg_prueth.rst @@ -0,0 +1,56 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================================== +Texas Instruments ICSSG PRUETH ethernet driver +============================================== + +:Version: 1.0 + +ICSSG Firmware +============== + +Every ICSSG core has two Programmable Real-Time Unit(PRUs), two auxiliary +Real-Time Transfer Unit (RTUs), and two Transmit Real-Time Transfer Units +(TX_PRUs). Each one of these runs its own firmware. The firmwares combnined are +referred as ICSSG Firmware. + +Firmware Statistics +=================== + +The ICSSG firmware maintains certain statistics which are dumped by the driver +via ``ethtool -S `` + +These statistics are as follows, + + - ``FW_RTU_PKT_DROP``: Diagnostic error counter which increments when RTU drops a locally injected packet due to port being disabled or rule violation. + - ``FW_Q0_OVERFLOW``: TX overflow counter for queue0 + - ``FW_Q1_OVERFLOW``: TX overflow counter for queue1 + - ``FW_Q2_OVERFLOW``: TX overflow counter for queue2 + - ``FW_Q3_OVERFLOW``: TX overflow counter for queue3 + - ``FW_Q4_OVERFLOW``: TX overflow counter for queue4 + - ``FW_Q5_OVERFLOW``: TX overflow counter for queue5 + - ``FW_Q6_OVERFLOW``: TX overflow counter for queue6 + - ``FW_Q7_OVERFLOW``: TX overflow counter for queue7 + - ``FW_DROPPED_PKT``: This counter is incremented when a packet is dropped at PRU because of rule violation. + - ``FW_RX_ERROR``: Incremented if there was a CRC error or Min/Max frame error at PRU + - ``FW_RX_DS_INVALID``: Incremented when RTU detects Data Status invalid condition + - ``FW_TX_DROPPED_PACKET``: Counter for packets dropped via TX Port + - ``FW_TX_TS_DROPPED_PACKET``: Counter for packets with TS flag dropped via TX Port + - ``FW_INF_PORT_DISABLED``: Incremented when RX frame is dropped due to port being disabled + - ``FW_INF_SAV``: Incremented when RX frame is dropped due to Source Address violation + - ``FW_INF_SA_DL``: Incremented when RX frame is dropped due to Source Address being in the denylist + - ``FW_INF_PORT_BLOCKED``: Incremented when RX frame is dropped due to port being blocked and frame being a special frame + - ``FW_INF_DROP_TAGGED`` : Incremented when RX frame is dropped for being tagged + - ``FW_INF_DROP_PRIOTAGGED``: Incremented when RX frame is dropped for being priority tagged + - ``FW_INF_DROP_NOTAG``: Incremented when RX frame is dropped for being untagged + - ``FW_INF_DROP_NOTMEMBER``: Incremented when RX frame is dropped for port not being member of VLAN + - ``FW_RX_EOF_SHORT_FRMERR``: Incremented if End Of Frame (EOF) task is scheduled without seeing RX_B1 + - ``FW_RX_B0_DROP_EARLY_EOF``: Incremented when frame is dropped due to Early EOF + - ``FW_TX_JUMBO_FRM_CUTOFF``: Incremented when frame is cut off to prevent packet size > 2000 Bytes + - ``FW_RX_EXP_FRAG_Q_DROP``: Incremented when express frame is received in the same queue as the previous fragment + - ``FW_RX_FIFO_OVERRUN``: RX fifo overrun counter + - ``FW_CUT_THR_PKT``: Incremented when a packet is forwarded using Cut-Through forwarding method + - ``FW_HOST_RX_PKT_CNT``: Number of valid packets sent by Rx PRU to Host on PSI + - ``FW_HOST_TX_PKT_CNT``: Number of valid packets copied by RTU0 to Tx queues + - ``FW_HOST_EGRESS_Q_PRE_OVERFLOW``: Host Egress Q (Pre-emptible) Overflow Counter + - ``FW_HOST_EGRESS_Q_EXP_OVERFLOW``: Host Egress Q (Pre-emptible) Overflow Counter -- cgit v1.2.3 From 2cf4bc06f7008fe3eab4b27d7c0ba9ba08f5dc5d Mon Sep 17 00:00:00 2001 From: Kaushal Kumar Date: Wed, 23 Apr 2025 12:00:50 +0530 Subject: dt-bindings: mtd: qcom,nandc: Document the SDX75 NAND controller Add new compatible for the QPIC NAND controller v2.1.1 used for SDX75 SoC. SDX75 NAND controller has iommu support so define it in the properties section. Reviewed-by: Rob Herring (Arm) Signed-off-by: Kaushal Kumar Signed-off-by: Miquel Raynal --- .../devicetree/bindings/mtd/qcom,nandc.yaml | 30 +++++++++++++++++----- 1 file changed, 24 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml index 35b4206ea918..5511389960f0 100644 --- a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml +++ b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml @@ -11,12 +11,18 @@ maintainers: properties: compatible: - enum: - - qcom,ipq806x-nand - - qcom,ipq4019-nand - - qcom,ipq6018-nand - - qcom,ipq8074-nand - - qcom,sdx55-nand + oneOf: + - items: + - enum: + - qcom,sdx75-nand + - const: qcom,sdx55-nand + - items: + - enum: + - qcom,ipq806x-nand + - qcom,ipq4019-nand + - qcom,ipq6018-nand + - qcom,ipq8074-nand + - qcom,sdx55-nand reg: maxItems: 1 @@ -95,6 +101,18 @@ allOf: items: - const: rxtx + - if: + properties: + compatible: + contains: + enum: + - qcom,sdx75-nand + + then: + properties: + iommus: + maxItems: 1 + - if: properties: compatible: -- cgit v1.2.3 From 17efc1acee6229e8964d248e2a21def519e04c14 Mon Sep 17 00:00:00 2001 From: Oliver Upton Date: Thu, 3 Apr 2025 16:16:26 -0700 Subject: arm64: Expose AIDR_EL1 via sysfs The KVM PV ABI recently added a feature that allows the VM to discover the set of physical CPU implementations, identified by a tuple of {MIDR_EL1, REVIDR_EL1, AIDR_EL1}. Unlike other KVM PV features, the expectation is that the VMM implements the hypercall instead of KVM as it has the authoritative view of where the VM gets scheduled. To do this the VMM needs to know the values of these registers on any CPU in the system. While MIDR_EL1 and REVIDR_EL1 are already exposed, AIDR_EL1 is not. Provide it in sysfs along with the other identification registers. Signed-off-by: Oliver Upton Reviewed-by: Cornelia Huck Reviewed-by: Anshuman Khandual Link: https://lore.kernel.org/r/20250403231626.3181116-1-oliver.upton@linux.dev Signed-off-by: Will Deacon --- Documentation/ABI/testing/sysfs-devices-system-cpu | 1 + Documentation/arch/arm64/cpu-feature-registers.rst | 13 +++++++------ 2 files changed, 8 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu index 206079d3bd5b..9bbf4c27c237 100644 --- a/Documentation/ABI/testing/sysfs-devices-system-cpu +++ b/Documentation/ABI/testing/sysfs-devices-system-cpu @@ -485,6 +485,7 @@ What: /sys/devices/system/cpu/cpuX/regs/ /sys/devices/system/cpu/cpuX/regs/identification/ /sys/devices/system/cpu/cpuX/regs/identification/midr_el1 /sys/devices/system/cpu/cpuX/regs/identification/revidr_el1 + /sys/devices/system/cpu/cpuX/regs/identification/aidr_el1 /sys/devices/system/cpu/cpuX/regs/identification/smidr_el1 Date: June 2016 Contact: Linux ARM Kernel Mailing list diff --git a/Documentation/arch/arm64/cpu-feature-registers.rst b/Documentation/arch/arm64/cpu-feature-registers.rst index 253e9743de2f..add66afc7b03 100644 --- a/Documentation/arch/arm64/cpu-feature-registers.rst +++ b/Documentation/arch/arm64/cpu-feature-registers.rst @@ -72,14 +72,15 @@ there are some issues with their usage. process could be migrated to another CPU by the time it uses the register value, unless the CPU affinity is set. Hence, there is no guarantee that the value reflects the processor that it is - currently executing on. The REVIDR is not exposed due to this - constraint, as REVIDR makes sense only in conjunction with the - MIDR. Alternately, MIDR_EL1 and REVIDR_EL1 are exposed via sysfs - at:: + currently executing on. REVIDR and AIDR are not exposed due to this + constraint, as these registers only make sense in conjunction with + the MIDR. Alternately, MIDR_EL1, REVIDR_EL1, and AIDR_EL1 are exposed + via sysfs at:: /sys/devices/system/cpu/cpu$ID/regs/identification/ - \- midr - \- revidr + \- midr_el1 + \- revidr_el1 + \- aidr_el1 3. Implementation -------------------- -- cgit v1.2.3 From 37eed892cc5ff36aeee59bb78f6aa417a44030a9 Mon Sep 17 00:00:00 2001 From: Petr Mladek Date: Mon, 28 Apr 2025 14:31:32 +0200 Subject: vsprintf: Use %p4chR instead of %p4cn for reading data in reversed host ordering The generic FourCC format always prints the data using the big endian order. It is generic because it allows to read the data using a custom ordering. The current code uses "n" for reading data in the reverse host ordering. It makes the 4 variants [hnbl] consistent with the generic printing of IPv4 addresses. Unfortunately, it creates confusion on big endian systems. For example, it shows the data &(u32)0x67503030 as %p4cn 00Pg (0x30305067) But people expect that the ordering stays the same. The network ordering is a big-endian ordering. The problem is that the semantic is not the same. The modifiers affect the output ordering of IPv4 addresses while they affect the reading order in case of FourCC code. Avoid the confusion by replacing the "n" modifier with "hR", aka reverse host ordering. It is inspired by the existing %p[mM]R printf format. Reported-by: Geert Uytterhoeven Closes: https://lore.kernel.org/r/CAMuHMdV9tX=TG7E_CrSF=2PY206tXf+_yYRuacG48EWEtJLo-Q@mail.gmail.com Signed-off-by: Petr Mladek Acked-by: Alyssa Rosenzweig Reviewed-by: Geert Uytterhoeven Reviewed-by: Aditya Garg Link: https://lore.kernel.org/r/20250428123132.578771-1-pmladek@suse.com Signed-off-by: Alyssa Rosenzweig --- Documentation/core-api/printk-formats.rst | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/core-api/printk-formats.rst b/Documentation/core-api/printk-formats.rst index 125fd0397510..f531873bb3c9 100644 --- a/Documentation/core-api/printk-formats.rst +++ b/Documentation/core-api/printk-formats.rst @@ -652,7 +652,7 @@ Generic FourCC code ------------------- :: - %p4c[hnlb] gP00 (0x67503030) + %p4c[h[R]lb] gP00 (0x67503030) Print a generic FourCC code, as both ASCII characters and its numerical value as hexadecimal. @@ -660,23 +660,23 @@ value as hexadecimal. The generic FourCC code is always printed in the big-endian format, the most significant byte first. This is the opposite of V4L/DRM FourCCs. -The additional ``h``, ``n``, ``l``, and ``b`` specifiers define what +The additional ``h``, ``hR``, ``l``, and ``b`` specifiers define what endianness is used to load the stored bytes. The data might be interpreted -using the host byte order, network byte order, little-endian, or big-endian. +using the host, reversed host byte order, little-endian, or big-endian. Passed by reference. Examples for a little-endian machine, given &(u32)0x67503030:: %p4ch gP00 (0x67503030) - %p4cn 00Pg (0x30305067) + %p4chR 00Pg (0x30305067) %p4cl gP00 (0x67503030) %p4cb 00Pg (0x30305067) Examples for a big-endian machine, given &(u32)0x67503030:: %p4ch gP00 (0x67503030) - %p4cn 00Pg (0x30305067) + %p4chR 00Pg (0x30305067) %p4cl 00Pg (0x30305067) %p4cb gP00 (0x67503030) -- cgit v1.2.3 From 13e3a882bc85d22861b87bfd140d11989fbe3f83 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 25 Apr 2025 20:47:06 +0300 Subject: dt-bindings: arm: arm,coresight-static-replicator: add optional clocks As most other CoreSight devices the replicator can use either of the optional clocks. Document those optional clocks in the schema. Additionally document the one-off case of Zynq-7000 platforms which uses apb_pclk and two additional debug clocks. Fixes: 3c15fddf3121 ("dt-bindings: arm: Convert CoreSight bindings to DT schema") Reviewed-by: Rob Herring (Arm) Signed-off-by: Dmitry Baryshkov Signed-off-by: Suzuki K Poulose Link: https://lore.kernel.org/r/20250425-fix-nexus-4-v3-6-da4e39e86d41@oss.qualcomm.com --- .../bindings/arm/arm,coresight-static-replicator.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml index a6f793ea03b6..0c1017affbad 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml @@ -30,6 +30,19 @@ properties: power-domains: maxItems: 1 + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + oneOf: + - items: + - enum: [apb_pclk, atclk] + - items: # Zynq-700 + - const: apb_pclk + - const: dbg_trc + - const: dbg_apb + in-ports: $ref: /schemas/graph.yaml#/properties/ports additionalProperties: false -- cgit v1.2.3 From 7021a8669444569a4a5bb351d6cad7ab9d69cf5f Mon Sep 17 00:00:00 2001 From: Frank Li Date: Fri, 11 Apr 2025 17:23:38 -0400 Subject: dt-bindings: clock: convert vf610-clock.txt to yaml format Convert vf610-clock.txt to yaml format. Additional changes: - swap audio_ext and enet_ext to match existed dts order - remove clock consumer in example Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250411212339.3273202-1-Frank.Li@nxp.com Reviewed-by: Rob Herring (Arm) Signed-off-by: Stephen Boyd --- .../devicetree/bindings/clock/fsl,vf610-ccm.yaml | 58 ++++++++++++++++++++++ .../devicetree/bindings/clock/vf610-clock.txt | 41 --------------- 2 files changed, 58 insertions(+), 41 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/fsl,vf610-ccm.yaml delete mode 100644 Documentation/devicetree/bindings/clock/vf610-clock.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/fsl,vf610-ccm.yaml b/Documentation/devicetree/bindings/clock/fsl,vf610-ccm.yaml new file mode 100644 index 000000000000..29ae5be51acf --- /dev/null +++ b/Documentation/devicetree/bindings/clock/fsl,vf610-ccm.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/fsl,vf610-ccm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Clock for Freescale Vybrid VF610 SOC + +description: + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. See include/dt-bindings/clock/vf610-clock.h + for the full list of VF610 clock IDs + +maintainers: + - Frank Li + +properties: + compatible: + const: fsl,vf610-ccm + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + clocks: + items: + - description: external crystal oscillator 32KHz, recommended + - description: external crystal oscillator 24MHz, recommended + - description: audio + - description: enet + minItems: 2 + + clock-names: + items: + - const: sxosc + - const: fxosc + - const: enet_ext + - const: audio_ext + minItems: 2 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + clock-controller@4006b000 { + compatible = "fsl,vf610-ccm"; + reg = <0x4006b000 0x1000>; + #clock-cells = <1>; + clocks = <&sxosc>, <&fxosc>; + clock-names = "sxosc", "fxosc"; + }; + diff --git a/Documentation/devicetree/bindings/clock/vf610-clock.txt b/Documentation/devicetree/bindings/clock/vf610-clock.txt deleted file mode 100644 index 109ffa3a5b66..000000000000 --- a/Documentation/devicetree/bindings/clock/vf610-clock.txt +++ /dev/null @@ -1,41 +0,0 @@ -* Clock bindings for Freescale Vybrid VF610 SOC - -Required properties: -- compatible: Should be "fsl,vf610-ccm" -- reg: Address and length of the register set -- #clock-cells: Should be <1> - -Optional properties: -- clocks: list of clock identifiers which are external input clocks to the - given clock controller. Please refer the next section to find - the input clocks for a given controller. -- clock-names: list of names of clocks which are external input clocks to the - given clock controller. - -Input clocks for top clock controller: - - sxosc (external crystal oscillator 32KHz, recommended) - - fxosc (external crystal oscillator 24MHz, recommended) - - audio_ext - - enet_ext - -The clock consumer should specify the desired clock by having the clock -ID in its "clocks" phandle cell. See include/dt-bindings/clock/vf610-clock.h -for the full list of VF610 clock IDs. - -Examples: - -clks: ccm@4006b000 { - compatible = "fsl,vf610-ccm"; - reg = <0x4006b000 0x1000>; - #clock-cells = <1>; - clocks = <&sxosc>, <&fxosc>; - clock-names = "sxosc", "fxosc"; -}; - -uart1: serial@40028000 { - compatible = "fsl,vf610-uart"; - reg = <0x40028000 0x1000>; - interrupts = <0 62 0x04>; - clocks = <&clks VF610_CLK_UART1>; - clock-names = "ipg"; -}; -- cgit v1.2.3 From b5cd5c42a9182cf6602b2a68201d39bd60a2a65e Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 29 Apr 2025 09:17:59 +0300 Subject: dt-bindings: vendor-prefixes: add prefix for Pegatron Corporation PEGATRON Corporation is a Taiwanese electronics manufacturing company that mainly develops computing, communications and consumer electronics for branded vendors. Link https://www.pegatroncorp.com/ Signed-off-by: Svyatoslav Ryhel Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250429061803.9581-2-clamor95@gmail.com Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 86f6a19b28ae..75ffaebc749d 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1158,6 +1158,8 @@ patternProperties: description: Parallax Inc. "^pda,.*": description: Precision Design Associates, Inc. + "^pegatron,.*": + description: Pegatron Corporation "^pericom,.*": description: Pericom Technology Inc. "^pervasive,.*": -- cgit v1.2.3 From 615a8d9d897de77268ee81a78a5bf65fad53bcc8 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 29 Apr 2025 09:18:00 +0300 Subject: dt-bindings: power: supply: Document Pegatron Chagall fuel gauge Add binding for Pegatron Chagall tablets battery monitor. Signed-off-by: Svyatoslav Ryhel Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250429061803.9581-3-clamor95@gmail.com Signed-off-by: Sebastian Reichel --- .../bindings/power/supply/pegatron,chagall-ec.yaml | 49 ++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/supply/pegatron,chagall-ec.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/power/supply/pegatron,chagall-ec.yaml b/Documentation/devicetree/bindings/power/supply/pegatron,chagall-ec.yaml new file mode 100644 index 000000000000..defb0861e268 --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/pegatron,chagall-ec.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/supply/pegatron,chagall-ec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Pegatron Chagall EC + +maintainers: + - Svyatoslav Ryhel + +description: + Pegatron Chagall EC is based on an 8-bit programmable microcontroller from + Infineon/Cypress Semiconductor, it communicates over I2C and is used in the + Pegatron Chagall tablet for fuel gauge and battery control functions. + +$ref: /schemas/power/supply/power-supply.yaml + +properties: + compatible: + const: pegatron,chagall-ec + + reg: + maxItems: 1 + + monitored-battery: true + power-supplies: true + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + embedded-controller@10 { + compatible = "pegatron,chagall-ec"; + reg = <0x10>; + + monitored-battery = <&battery>; + power-supplies = <&mains>; + }; + }; +... -- cgit v1.2.3 From fe259a1bb26ec78842c975d992331705b0c2c2e8 Mon Sep 17 00:00:00 2001 From: Slawomir Mrozowicz Date: Fri, 11 Apr 2025 15:06:26 +0200 Subject: ixgbe: devlink: add devlink region support for E610 Provide support for the following devlink cmds: -DEVLINK_CMD_REGION_GET -DEVLINK_CMD_REGION_NEW -DEVLINK_CMD_REGION_DEL -DEVLINK_CMD_REGION_READ ixgbe devlink region implementation, similarly to the ice one, lets user to create snapshots of content of Non Volatile Memory, content of Shadow RAM, and capabilities of the device. For both NVM and SRAM regions provide .read() handler to let user read their contents without the need to create full snapshots. Reviewed-by: Przemek Kitszel Signed-off-by: Slawomir Mrozowicz Co-developed-by: Jedrzej Jagielski Signed-off-by: Jedrzej Jagielski Tested-by: Bharath R Signed-off-by: Tony Nguyen --- Documentation/networking/devlink/ixgbe.rst | 49 ++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/devlink/ixgbe.rst b/Documentation/networking/devlink/ixgbe.rst index 3fce291348fa..c27d1436c70e 100644 --- a/Documentation/networking/devlink/ixgbe.rst +++ b/Documentation/networking/devlink/ixgbe.rst @@ -120,3 +120,52 @@ EMP firmware image. The driver does not currently support reloading the driver via ``DEVLINK_RELOAD_ACTION_DRIVER_REINIT``. + +Regions +======= + +The ``ixgbe`` driver implements the following regions for accessing internal +device data. + +.. list-table:: regions implemented + :widths: 15 85 + + * - Name + - Description + * - ``nvm-flash`` + - The contents of the entire flash chip, sometimes referred to as + the device's Non Volatile Memory. + * - ``shadow-ram`` + - The contents of the Shadow RAM, which is loaded from the beginning + of the flash. Although the contents are primarily from the flash, + this area also contains data generated during device boot which is + not stored in flash. + * - ``device-caps`` + - The contents of the device firmware's capabilities buffer. Useful to + determine the current state and configuration of the device. + +Both the ``nvm-flash`` and ``shadow-ram`` regions can be accessed without a +snapshot. The ``device-caps`` region requires a snapshot as the contents are +sent by firmware and can't be split into separate reads. + +Users can request an immediate capture of a snapshot for all three regions +via the ``DEVLINK_CMD_REGION_NEW`` command. + +.. code:: shell + + $ devlink region show + pci/0000:01:00.0/nvm-flash: size 10485760 snapshot [] max 1 + pci/0000:01:00.0/device-caps: size 4096 snapshot [] max 10 + + $ devlink region new pci/0000:01:00.0/nvm-flash snapshot 1 + + $ devlink region dump pci/0000:01:00.0/nvm-flash snapshot 1 + 0000000000000000 0014 95dc 0014 9514 0035 1670 0034 db30 + 0000000000000010 0000 0000 ffff ff04 0029 8c00 0028 8cc8 + 0000000000000020 0016 0bb8 0016 1720 0000 0000 c00f 3ffc + 0000000000000030 bada cce5 bada cce5 bada cce5 bada cce5 + + $ devlink region read pci/0000:01:00.0/nvm-flash snapshot 1 address 0 length 16 + 0000000000000000 0014 95dc 0014 9514 0035 1670 0034 db30 + + $ devlink region delete pci/0000:01:00.0/device-caps snapshot 1 -- cgit v1.2.3 From 928e1c67c13ec2a88982bc60ea9fbcb9c3d307bc Mon Sep 17 00:00:00 2001 From: Inochi Amaoto Date: Mon, 14 Apr 2025 06:35:00 +0800 Subject: dt-bindings: hwmon: Add Sophgo SG2044 external hardware monitor support The MCU device on SG2044 exposes the same interface as SG2042, which is already supported by the kernel. Add compatible string for monitor device of SG2044. Signed-off-by: Inochi Amaoto Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250413223507.46480-7-inochiama@gmail.com Signed-off-by: Guenter Roeck --- .../devicetree/bindings/hwmon/sophgo,sg2042-hwmon-mcu.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/sophgo,sg2042-hwmon-mcu.yaml b/Documentation/devicetree/bindings/hwmon/sophgo,sg2042-hwmon-mcu.yaml index f0667ac41d75..b76805d39427 100644 --- a/Documentation/devicetree/bindings/hwmon/sophgo,sg2042-hwmon-mcu.yaml +++ b/Documentation/devicetree/bindings/hwmon/sophgo,sg2042-hwmon-mcu.yaml @@ -11,7 +11,11 @@ maintainers: properties: compatible: - const: sophgo,sg2042-hwmon-mcu + oneOf: + - items: + - const: sophgo,sg2044-hwmon-mcu + - const: sophgo,sg2042-hwmon-mcu + - const: sophgo,sg2042-hwmon-mcu reg: maxItems: 1 -- cgit v1.2.3 From 3c50137aa4c80c532cfcd7444a36b21710189ebf Mon Sep 17 00:00:00 2001 From: Shin Son Date: Mon, 28 Apr 2025 20:35:14 +0900 Subject: dt-bindings: clock: exynosautov920: add cpucl1/2 clock definitions Add cpucl1 and cpucl2 clock definitions. CPUCL1/2 refer to CPU Cluster 1 and CPU Cluster 2, which provide clock support for the CPUs on Exynosauto V920 SoC. Signed-off-by: Shin Son Link: https://lore.kernel.org/r/20250428113517.426987-2-shin.son@samsung.com Signed-off-by: Krzysztof Kozlowski --- .../clock/samsung,exynosautov920-clock.yaml | 44 ++++++++++++++++++++++ 1 file changed, 44 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml index d12b17c177df..6961a68098f4 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml @@ -34,6 +34,8 @@ properties: enum: - samsung,exynosautov920-cmu-top - samsung,exynosautov920-cmu-cpucl0 + - samsung,exynosautov920-cmu-cpucl1 + - samsung,exynosautov920-cmu-cpucl2 - samsung,exynosautov920-cmu-peric0 - samsung,exynosautov920-cmu-peric1 - samsung,exynosautov920-cmu-misc @@ -94,6 +96,48 @@ allOf: - const: cluster - const: dbg + - if: + properties: + compatible: + contains: + enum: + - samsung,exynosautov920-cmu-cpucl1 + + then: + properties: + clocks: + items: + - description: External reference clock (38.4 MHz) + - description: CMU_CPUCL1 SWITCH clock (from CMU_TOP) + - description: CMU_CPUCL1 CLUSTER clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: switch + - const: cluster + + - if: + properties: + compatible: + contains: + enum: + - samsung,exynosautov920-cmu-cpucl2 + + then: + properties: + clocks: + items: + - description: External reference clock (38.4 MHz) + - description: CMU_CPUCL2 SWITCH clock (from CMU_TOP) + - description: CMU_CPUCL2 CLUSTER clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: switch + - const: cluster + - if: properties: compatible: -- cgit v1.2.3 From 5ef7bcdeecc982ae17d13b682a85123c7d74b200 Mon Sep 17 00:00:00 2001 From: Miklos Szeredi Date: Fri, 7 Feb 2025 17:12:06 +0100 Subject: ovl: relax redirect/metacopy requirements for lower -> data redirect Allow the special case of a redirect from a lower layer to a data layer without having to turn on metacopy. This makes the feature work with userxattr, which in turn allows data layers to be usable in user namespaces. Minimize the risk by only enabling redirect from a single lower layer to a data layer iff a data layer is specified. The only way to access a data layer is to enable this, so there's really no reason not to enable this. This can be used safely if the lower layer is read-only and the user.overlay.redirect xattr cannot be modified. Reviewed-by: Amir Goldstein Signed-off-by: Miklos Szeredi --- Documentation/filesystems/overlayfs.rst | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/filesystems/overlayfs.rst b/Documentation/filesystems/overlayfs.rst index 2db379b4b31e..4133a336486d 100644 --- a/Documentation/filesystems/overlayfs.rst +++ b/Documentation/filesystems/overlayfs.rst @@ -443,6 +443,13 @@ Only the data of the files in the "data-only" lower layers may be visible when a "metacopy" file in one of the lower layers above it, has a "redirect" to the absolute path of the "lower data" file in the "data-only" lower layer. +Instead of explicitly enabling "metacopy=on" it is sufficient to specify at +least one data-only layer to enable redirection of data to a data-only layer. +In this case other forms of metacopy are rejected. Note: this way data-only +layers may be used toghether with "userxattr", in which case careful attention +must be given to privileges needed to change the "user.overlay.redirect" xattr +to prevent misuse. + Since kernel version v6.8, "data-only" lower layers can also be added using the "datadir+" mount options and the fsconfig syscall from new mount api. For example:: -- cgit v1.2.3 From 3012bb39001c4cab0b8587b0421ae64b8ca54655 Mon Sep 17 00:00:00 2001 From: Antheas Kapenekakis Date: Fri, 25 Apr 2025 13:18:08 +0200 Subject: platform/x86: oxpec: Move hwmon/oxp-sensors to platform/x86 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The EC of OneXPlayer devices used to only control the fan. This is no longer the case, with the EC of OneXPlayer gaining additional functionality (turbo button, turbo led, battery controls). As it will be beneficial from a complexity perspective to retain this driver as a single unit, move it out of hwmon, and into platform/x86. Also, remove the hwmon documentation to prepare moving it to Documentation/ABI/. While at it, add myself to the maintainer's file. Acked-by: Guenter Roeck Reviewed-by: Thomas Weißschuh Reviewed-by: Derek J. Clark Signed-off-by: Antheas Kapenekakis Link: https://lore.kernel.org/r/20250425111821.88746-4-lkml@antheas.dev Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/hwmon/index.rst | 1 - Documentation/hwmon/oxp-sensors.rst | 89 ------------------------------------- 2 files changed, 90 deletions(-) delete mode 100644 Documentation/hwmon/oxp-sensors.rst (limited to 'Documentation') diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index f0ddf6222c44..ffe1a756a4f9 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -189,7 +189,6 @@ Hardware Monitoring Kernel Drivers nzxt-kraken3 nzxt-smart2 occ - oxp-sensors pc87360 pc87427 pcf8591 diff --git a/Documentation/hwmon/oxp-sensors.rst b/Documentation/hwmon/oxp-sensors.rst deleted file mode 100644 index 581c4dafbfa1..000000000000 --- a/Documentation/hwmon/oxp-sensors.rst +++ /dev/null @@ -1,89 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0-or-later - -Kernel driver oxp-sensors -========================= - -Authors: - - Derek John Clark - - Joaquín Ignacio Aramendía - -Description: ------------- - -Handheld devices from OneNetbook, AOKZOE, AYANEO, And OrangePi provide fan -readings and fan control through their embedded controllers. - -Currently supports OneXPlayer devices, AOKZOE, AYANEO, and OrangePi -handheld devices. AYANEO devices preceding the AIR and OneXPlayer devices -preceding the Mini A07 are not supportable as the EC model is different -and do not have manual control capabilities. - -Some OneXPlayer and AOKZOE models have a toggle for changing the behaviour -of the "Turbo/Silent" button of the device. It will change the key event -that it triggers with a flip of the `tt_toggle` attribute. See below for -boards that support this function. - -Supported devices ------------------ - -Currently the driver supports the following handhelds: - - - AOKZOE A1 - - AOKZOE A1 PRO - - AYANEO 2 - - AYANEO 2S - - AYANEO AIR - - AYANEO AIR 1S - - AYANEO AIR Plus (Mendocino) - - AYANEO AIR Pro - - AYANEO Flip DS - - AYANEO Flip KB - - AYANEO Geek - - AYANEO Geek 1S - - AYANEO KUN - - OneXPlayer 2 - - OneXPlayer 2 Pro - - OneXPlayer AMD - - OneXPlayer mini AMD - - OneXPlayer mini AMD PRO - - OneXPlayer OneXFly - - OneXPlayer X1 A - - OneXPlayer X1 i - - OneXPlayer X1 mini - - OrangePi NEO-01 - -"Turbo/Silent" button behaviour toggle is only supported on: - - AOK ZOE A1 - - AOK ZOE A1 PRO - - OneXPlayer 2 - - OneXPlayer 2 Pro - - OneXPlayer mini AMD (only with updated alpha BIOS) - - OneXPlayer mini AMD PRO - - OneXPlayer OneXFly - - OneXPlayer X1 A - - OneXPlayer X1 i - - OneXPlayer X1 mini - -Sysfs entries -------------- - -The following attributes are supported: - -fan1_input - Read Only. Reads current fan RPM. - -pwm1_enable - Read Write. Enable manual fan control. Write "1" to set to manual, write "0" - to let the EC control de fan speed. Read this attribute to see current status. - -pwm1 - Read Write. Read this attribute to see current duty cycle in the range [0-255]. - When pwm1_enable is set to "1" (manual) write any value in the range [0-255] - to set fan speed. - -tt_toggle - Read Write. Read this attribute to check the status of the turbo/silent - button behaviour function. Write "1" to activate the switch and "0" to - deactivate it. The specific keycodes and behaviour is specific to the device - both with this function on and off. This attribute is attached to the platform - driver and not to the hwmon driver (/sys/devices/platform/oxp-platform/tt_toggle) -- cgit v1.2.3 From d9c4037fed897ddcb512fdf03bafed9451cb5006 Mon Sep 17 00:00:00 2001 From: Antheas Kapenekakis Date: Fri, 25 Apr 2025 13:18:09 +0200 Subject: ABI: testing: sysfs-class-oxp: add missing documentation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add missing documentation about the tt_toggle attribute that was added in kernel 6.5. Fixes: be144ee491272 ("hwmon: (oxp-sensors) Add tt_toggle attribute on supported boards") Reviewed-by: Thomas Weißschuh Reviewed-by: Derek J. Clark Signed-off-by: Antheas Kapenekakis Link: https://lore.kernel.org/r/20250425111821.88746-5-lkml@antheas.dev Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/ABI/testing/sysfs-platform-oxp | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-platform-oxp (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-platform-oxp b/Documentation/ABI/testing/sysfs-platform-oxp new file mode 100644 index 000000000000..091269ab2c8c --- /dev/null +++ b/Documentation/ABI/testing/sysfs-platform-oxp @@ -0,0 +1,13 @@ +What: /sys/devices/platform//tt_toggle +Date: Jun 2023 +KernelVersion: 6.5 +Contact: "Antheas Kapenekakis" +Description: + Takeover TDP controls from the device. OneXPlayer devices have a + turbo button that can be used to switch between two TDP modes + (usually 15W and 25W). By setting this attribute to 1, this + functionality is disabled, handing TDP control over to (Windows) + userspace software and the Turbo button turns into a keyboard + shortcut over the AT keyboard of the device. In addition, + using this setting is a prerequisite for PWM control for most + newer models (otherwise it NOOPs). -- cgit v1.2.3 From 3abff549e0ec05649b7a97a141399123de4c104b Mon Sep 17 00:00:00 2001 From: Antheas Kapenekakis Date: Fri, 25 Apr 2025 13:18:10 +0200 Subject: ABI: testing: sysfs-class-oxp: add tt_led attribute documentation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Adds documentation about the tt_led attribute of OneXPlayer devices to the sysfs-class-oxp ABI documentation. Reviewed-by: Thomas Weißschuh Reviewed-by: Derek J. Clark Signed-off-by: Antheas Kapenekakis Link: https://lore.kernel.org/r/20250425111821.88746-6-lkml@antheas.dev Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/ABI/testing/sysfs-platform-oxp | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-platform-oxp b/Documentation/ABI/testing/sysfs-platform-oxp index 091269ab2c8c..b3f39fc21dfa 100644 --- a/Documentation/ABI/testing/sysfs-platform-oxp +++ b/Documentation/ABI/testing/sysfs-platform-oxp @@ -11,3 +11,15 @@ Description: shortcut over the AT keyboard of the device. In addition, using this setting is a prerequisite for PWM control for most newer models (otherwise it NOOPs). + +What: /sys/devices/platform//tt_led +Date: April 2025 +KernelVersion: 6.16 +Contact: "Antheas Kapenekakis" +Description: + Some OneXPlayer devices (e.g., X1 series) feature a little LED + nested in the Turbo button. This LED is illuminated when the + device is in the higher TDP mode (e.g., 25W). Once tt_toggle + is engaged, this LED is left dangling to its last state. This + attribute allows userspace to control the LED state manually + (either with 1 or 0). Only a subset of devices contain this LED. -- cgit v1.2.3 From 6c9ffa2ae48e8fd44ba5c6ffdc16e62a62bac38a Mon Sep 17 00:00:00 2001 From: Antheas Kapenekakis Date: Fri, 25 Apr 2025 13:18:18 +0200 Subject: power: supply: add inhibit-charge-awake to charge_behaviour MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit OneXPlayer devices have a charge inhibit feature that allows the user to select between it being active always or only when the device is on. Therefore, add attribute inhibit-charge-awake to charge_behaviour to allow the user to select that charge should be paused only when the device is awake. Reviewed-by: Hans de Goede Reviewed-by: Thomas Weißschuh Reviewed-by: Derek J. Clark Signed-off-by: Antheas Kapenekakis Link: https://lore.kernel.org/r/20250425111821.88746-14-lkml@antheas.dev Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/ABI/testing/sysfs-class-power | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-class-power b/Documentation/ABI/testing/sysfs-class-power index 2a5c1a09a28f..78afb2422fc5 100644 --- a/Documentation/ABI/testing/sysfs-class-power +++ b/Documentation/ABI/testing/sysfs-class-power @@ -508,11 +508,12 @@ Description: Access: Read, Write Valid values: - ================ ==================================== - auto: Charge normally, respect thresholds - inhibit-charge: Do not charge while AC is attached - force-discharge: Force discharge while AC is attached - ================ ==================================== + ===================== ======================================== + auto: Charge normally, respect thresholds + inhibit-charge: Do not charge while AC is attached + inhibit-charge-awake: inhibit-charge only when device is awake + force-discharge: Force discharge while AC is attached + ===================== ======================================== What: /sys/class/power_supply//technology Date: May 2007 -- cgit v1.2.3 From e99efa8ac8fd9cebca99652cb55b277b7200455e Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Tue, 29 Apr 2025 12:39:58 -0500 Subject: docs: debugfs: do not recommend debugfs_remove_recursive Update the debugfs documentation to indicate that debugfs_remove() should be used to clean up debugfs entries. In commit a3d1e7eb5abe ("simple_recursive_removal(): kernel-side rm -rf for ramfs-style filesystems"), function debugfs_remove_recursive() was made into an alias for debugfs_remove(): #define debugfs_remove_recursive debugfs_remove Therefore, drivers should just use debugfs_remove() going forward. Signed-off-by: Timur Tabi Link: https://lore.kernel.org/r/20250429173958.3973958-1-ttabi@nvidia.com Signed-off-by: Greg Kroah-Hartman --- Documentation/filesystems/debugfs.rst | 19 ++++++------------- .../debugging/driver_development_debugging_guide.rst | 2 +- 2 files changed, 7 insertions(+), 14 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/debugfs.rst b/Documentation/filesystems/debugfs.rst index 610f718ef8b5..55f807293924 100644 --- a/Documentation/filesystems/debugfs.rst +++ b/Documentation/filesystems/debugfs.rst @@ -229,22 +229,15 @@ module is unloaded without explicitly removing debugfs entries, the result will be a lot of stale pointers and no end of highly antisocial behavior. So all debugfs users - at least those which can be built as modules - must be prepared to remove all files and directories they create there. A file -can be removed with:: +or directory can be removed with:: void debugfs_remove(struct dentry *dentry); The dentry value can be NULL or an error value, in which case nothing will -be removed. - -Once upon a time, debugfs users were required to remember the dentry -pointer for every debugfs file they created so that all files could be -cleaned up. We live in more civilized times now, though, and debugfs users -can call:: - - void debugfs_remove_recursive(struct dentry *dentry); - -If this function is passed a pointer for the dentry corresponding to the -top-level directory, the entire hierarchy below that directory will be -removed. +be removed. Note that this function will recursively remove all files and +directories underneath it. Previously, debugfs_remove_recursive() was used +to perform that task, but this function is now just an alias to +debugfs_remove(). debugfs_remove_recursive() should be considered +deprecated. .. [1] http://lwn.net/Articles/309298/ diff --git a/Documentation/process/debugging/driver_development_debugging_guide.rst b/Documentation/process/debugging/driver_development_debugging_guide.rst index 46becda8764b..aca08f457793 100644 --- a/Documentation/process/debugging/driver_development_debugging_guide.rst +++ b/Documentation/process/debugging/driver_development_debugging_guide.rst @@ -155,7 +155,7 @@ The general idea is: ``my_variable`` - Clean up the directory when removing the device - (``debugfs_remove_recursive(parent);``) + (``debugfs_remove(parent);``) For the full documentation see :doc:`/filesystems/debugfs`. -- cgit v1.2.3 From cafb22242bfb7fad10fde6f9b99853fc924e691a Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Tue, 22 Apr 2025 18:48:26 -0500 Subject: Documentation: Add AMD Zen debugging document Debugging issues on AMD hardware can be challenging for users without proper documentation and tools. Introduce a document that includes techniques for debugging s2idle issues. It will be expanded for debugging other issues later. Signed-off-by: Mario Limonciello Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Gautham R. Shenoy Link: https://lore.kernel.org/20250422234830.2840784-2-superm1@kernel.org --- Documentation/arch/x86/amd-debugging.rst | 320 +++++++++++++++++++++++++++++++ Documentation/arch/x86/index.rst | 1 + Documentation/arch/x86/resume.svg | 4 + Documentation/arch/x86/suspend.svg | 4 + 4 files changed, 329 insertions(+) create mode 100644 Documentation/arch/x86/amd-debugging.rst create mode 100644 Documentation/arch/x86/resume.svg create mode 100644 Documentation/arch/x86/suspend.svg (limited to 'Documentation') diff --git a/Documentation/arch/x86/amd-debugging.rst b/Documentation/arch/x86/amd-debugging.rst new file mode 100644 index 000000000000..d3290f2e4be7 --- /dev/null +++ b/Documentation/arch/x86/amd-debugging.rst @@ -0,0 +1,320 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Debugging AMD Zen systems ++++++++++++++++++++++++++ + +Introduction +============ + +This document describes techniques that are useful for debugging issues with +AMD Zen systems. It is intended for use by developers and technical users +to help identify and resolve issues. + +S3 vs s2idle +============ + +On AMD systems, it's not possible to simultaneously support suspend-to-RAM (S3) +and suspend-to-idle (s2idle). To confirm which mode your system supports you +can look at ``cat /sys/power/mem_sleep``. If it shows ``s2idle [deep]`` then +*S3* is supported. If it shows ``[s2idle]`` then *s2idle* is +supported. + +On systems that support *S3*, the firmware will be utilized to put all hardware into +the appropriate low power state. + +On systems that support *s2idle*, the kernel will be responsible for transitioning devices +into the appropriate low power state. When all devices are in the appropriate low +power state, the hardware will transition into a hardware sleep state. + +After a suspend cycle you can tell how much time was spent in a hardware sleep +state by looking at ``cat /sys/power/suspend_stats/last_hw_sleep``. + +This flowchart explains how the AMD s2idle suspend flow works. + +.. kernel-figure:: suspend.svg + +This flowchart explains how the amd s2idle resume flow works. + +.. kernel-figure:: resume.svg + +s2idle debugging tool +===================== + +As there are a lot of places that problems can occur, a debugging tool has been +created at +`amd-debug-tools `_ +that can help test for common problems and offer suggestions. + +If you have an s2idle issue, it's best to start with this and follow instructions +from its findings. If you continue to have an issue, raise a bug with the +report generated from this script to +`drm/amd gitlab `_. + +Spurious s2idle wakeups from an IRQ +=================================== +Spurious wakeups will generally have an IRQ set to ``/sys/power/pm_wakeup_irq``. +This can be matched to ``/proc/interrupts`` to determine what device woke the system. + +If this isn't enough to debug the problem, then the following sysfs files +can be set to add more verbosity to the wakeup process: :: + + # echo 1 | sudo tee /sys/power/pm_debug_messages + # echo 1 | sudo tee /sys/power/pm_print_times + +After making those changes, the kernel will display messages that can +be traced back to kernel s2idle loop code as well as display any active +GPIO sources while waking up. + +If the wakeup is caused by the ACPI SCI, additional ACPI debugging may be +needed. These commands can enable additional trace data: :: + + # echo enable | sudo tee /sys/module/acpi/parameters/trace_state + # echo 1 | sudo tee /sys/module/acpi/parameters/aml_debug_output + # echo 0x0800000f | sudo tee /sys/module/acpi/parameters/debug_level + # echo 0xffff0000 | sudo tee /sys/module/acpi/parameters/debug_layer + +Spurious s2idle wakeups from a GPIO +=================================== + +If a GPIO is active when waking up the system ideally you would look at the +schematic to determine what device it is associated with. If the schematic +is not available, another tactic is to look at the ACPI _EVT() entry +to determine what device is notified when that GPIO is active. + +For a hypothetical example, say that GPIO 59 woke up the system. You can +look at the SSDT to determine what device is notified when GPIO 59 is active. + +First convert the GPIO number into hex. :: + + $ python3 -c "print(hex(59))" + 0x3b + +Next determine which ACPI table has the ``_EVT`` entry. For example: :: + + $ sudo grep EVT /sys/firmware/acpi/tables/SSDT* + grep: /sys/firmware/acpi/tables/SSDT27: binary file matches + +Decode this table:: + + $ sudo cp /sys/firmware/acpi/tables/SSDT27 . + $ sudo iasl -d SSDT27 + +Then look at the table and find the matching entry for GPIO 0x3b. :: + + Case (0x3B) + { + M000 (0x393B) + M460 (" Notify (\\_SB.PCI0.GP17.XHC1, 0x02)\n", Zero, Zero, Zero, Zero, Zero, Zero) + Notify (\_SB.PCI0.GP17.XHC1, 0x02) // Device Wake + } + +You can see in this case that the device ``\_SB.PCI0.GP17.XHC1`` is notified +when GPIO 59 is active. It's obvious this is an XHCI controller, but to go a +step further you can figure out which XHCI controller it is by matching it to +ACPI.:: + + $ grep "PCI0.GP17.XHC1" /sys/bus/acpi/devices/*/path + /sys/bus/acpi/devices/device:2d/path:\_SB_.PCI0.GP17.XHC1 + /sys/bus/acpi/devices/device:2e/path:\_SB_.PCI0.GP17.XHC1.RHUB + /sys/bus/acpi/devices/device:2f/path:\_SB_.PCI0.GP17.XHC1.RHUB.PRT1 + /sys/bus/acpi/devices/device:30/path:\_SB_.PCI0.GP17.XHC1.RHUB.PRT1.CAM0 + /sys/bus/acpi/devices/device:31/path:\_SB_.PCI0.GP17.XHC1.RHUB.PRT1.CAM1 + /sys/bus/acpi/devices/device:32/path:\_SB_.PCI0.GP17.XHC1.RHUB.PRT2 + /sys/bus/acpi/devices/LNXPOWER:0d/path:\_SB_.PCI0.GP17.XHC1.PWRS + +Here you can see it matches to ``device:2d``. Look at the ``physical_node`` +to determine what PCI device that actually is. :: + + $ ls -l /sys/bus/acpi/devices/device:2d/physical_node + lrwxrwxrwx 1 root root 0 Feb 12 13:22 /sys/bus/acpi/devices/device:2d/physical_node -> ../../../../../pci0000:00/0000:00:08.1/0000:c2:00.4 + +So there you have it: the PCI device associated with this GPIO wakeup was ``0000:c2:00.4``. + +The ``amd_s2idle.py`` script will capture most of these artifacts for you. + +s2idle PM debug messages +======================== +During the s2idle flow on AMD systems, the ACPI LPS0 driver is responsible +to check all uPEP constraints. Failing uPEP constraints does not prevent +s0i3 entry. This means that if some constraints are not met, it is possible +the kernel may attempt to enter s2idle even if there are some known issues. + +To activate PM debugging, either specify ``pm_debug_messagess`` kernel +command-line option at boot or write to ``/sys/power/pm_debug_messages``. +Unmet constraints will be displayed in the kernel log and can be +viewed by logging tools that process kernel ring buffer like ``dmesg`` or +``journalctl``." + +If the system freezes on entry/exit before these messages are flushed, a +useful debugging tactic is to unbind the ``amd_pmc`` driver to prevent +notification to the platform to start s0i3 entry. This will stop the +system from freezing on entry or exit and let you view all the failed +constraints. :: + + cd /sys/bus/platform/drivers/amd_pmc + ls | grep AMD | sudo tee unbind + +After doing this, run the suspend cycle and look specifically for errors around: :: + + ACPI: LPI: Constraint not met; min power state:%s current power state:%s + +Historical examples of s2idle issues +==================================== +To help understand the types of issues that can occur and how to debug them, +here are some historical examples of s2idle issues that have been resolved. + +Core offlining +-------------- +An end user had reported that taking a core offline would prevent the system +from properly entering s0i3. This was debugged using internal AMD tools +to capture and display a stream of metrics from the hardware showing what changed +when a core was offlined. It was determined that the hardware didn't get +notification the offline cores were in the deepest state, and so it prevented +CPU from going into the deepest state. The issue was debugged to a missing +command to put cores into C3 upon offline. + +`commit d6b88ce2eb9d2 ("ACPI: processor idle: Allow playing dead in C3 state") `_ + +Corruption after resume +----------------------- +A big problem that occurred with Rembrandt was that there was graphical +corruption after resume. This happened because of a misalignment of PSP +and driver responsibility. The PSP will save and restore DMCUB, but the +driver assumed it needed to reset DMCUB on resume. +This actually was a misalignment for earlier silicon as well, but was not +observed. + +`commit 79d6b9351f086 ("drm/amd/display: Don't reinitialize DMCUB on s0ix resume") `_ + +Back to Back suspends fail +-------------------------- +When using a wakeup source that triggers the IRQ to wakeup, a bug in the +pinctrl-amd driver may capture the wrong state of the IRQ and prevent the +system going back to sleep properly. + +`commit b8c824a869f22 ("pinctrl: amd: Don't save/restore interrupt status and wake status bits") `_ + +Spurious timer based wakeup after 5 minutes +------------------------------------------- +The HPET was being used to program the wakeup source for the system, however +this was causing a spurious wakeup after 5 minutes. The correct alarm to use +was the ACPI alarm. + +`commit 3d762e21d5637 ("rtc: cmos: Use ACPI alarm for non-Intel x86 systems too") `_ + +Disk disappears after resume +---------------------------- +After resuming from s2idle, the NVME disk would disappear. This was due to the +BIOS not specifying the _DSD StorageD3Enable property. This caused the NVME +driver not to put the disk into the expected state at suspend and to fail +on resume. + +`commit e79a10652bbd3 ("ACPI: x86: Force StorageD3Enable on more products") `_ + +Spurious IRQ1 +------------- +A number of Renoir, Lucienne, Cezanne, & Barcelo platforms have a +platform firmware bug where IRQ1 is triggered during s0i3 resume. + +This was fixed in the platform firmware, but a number of systems didn't +receive any more platform firmware updates. + +`commit 8e60615e89321 ("platform/x86/amd: pmc: Disable IRQ1 wakeup for RN/CZN") `_ + +Hardware timeout +---------------- +The hardware performs many actions besides accepting the values from +amd-pmc driver. As the communication path with the hardware is a mailbox, +it's possible that it might not respond quickly enough. +This issue manifested as a failure to suspend: :: + + PM: dpm_run_callback(): acpi_subsys_suspend_noirq+0x0/0x50 returns -110 + amd_pmc AMDI0005:00: PM: failed to suspend noirq: error -110 + +The timing problem was identified by comparing the values of the idle mask. + +`commit 3c3c8e88c8712 ("platform/x86: amd-pmc: Increase the response register timeout") `_ + +Failed to reach hardware sleep state with panel on +-------------------------------------------------- +On some Strix systems certain panels were observed to block the system from +entering a hardware sleep state if the internal panel was on during the sequence. + +Even though the panel got turned off during suspend it exposed a timing problem +where an interrupt caused the display hardware to wake up and block low power +state entry. + +`commit 40b8c14936bd2 ("drm/amd/display: Disable unneeded hpd interrupts during dm_init") `_ + +Runtime power consumption issues +================================ +Runtime power consumption is influenced by many factors, including but not +limited to the configuration of the PCIe Active State Power Management (ASPM), +the display brightness, the EPP policy of the CPU, and the power management +of the devices. + +ASPM +---- +For the best runtime power consumption, ASPM should be programmed as intended +by the BIOS from the hardware vendor. To accomplish this the Linux kernel +should be compiled with ``CONFIG_PCIEASPM_DEFAULT`` set to ``y`` and the +sysfs file ``/sys/module/pcie_aspm/parameters/policy`` should not be modified. + +Most notably, if L1.2 is not configured properly for any devices, the SoC +will not be able to enter the deepest idle state. + +EPP Policy +---------- +The ``energy_performance_preference`` sysfs file can be used to set a bias +of efficiency or performance for a CPU. This has a direct relationship on +the battery life when more heavily biased towards performance. + + +BIOS debug messages +=================== +Most OEM machines don't have a serial UART for outputting kernel or BIOS +debug messages. However BIOS debug messages are useful for understanding +both BIOS bugs and bugs with the Linux kernel drivers that call BIOS AML. + +As the BIOS on most OEM AMD systems are based off an AMD reference BIOS, +the infrastructure used for exporting debugging messages is often the same +as AMD reference BIOS. + +Manually Parsing +---------------- +There is generally an ACPI method ``\M460`` that different paths of the AML +will call to emit a message to the BIOS serial log. This method takes +7 arguments, with the first being a string and the rest being optional +integers:: + + Method (M460, 7, Serialized) + +Here is an example of a string that BIOS AML may call out using ``\M460``:: + + M460 (" OEM-ASL-PCIe Address (0x%X)._REG (%d %d) PCSA = %d\n", DADR, Arg0, Arg1, PCSA, Zero, Zero) + +Normally when executed, the ``\M460`` method would populate the additional +arguments into the string. In order to get these messages from the Linux +kernel a hook has been added into ACPICA that can capture the *arguments* +sent to ``\M460`` and print them to the kernel ring buffer. +For example the following message could be emitted into kernel ring buffer:: + + extrace-0174 ex_trace_args : " OEM-ASL-PCIe Address (0x%X)._REG (%d %d) PCSA = %d\n", ec106000, 2, 1, 1, 0, 0 + +In order to get these messages, you need to compile with ``CONFIG_ACPI_DEBUG`` +and then turn on the following ACPICA tracing parameters. +This can be done either on the kernel command line or at runtime: + +* ``acpi.trace_method_name=\M460`` +* ``acpi.trace_state=method`` + +NOTE: These can be very noisy at bootup. If you turn these parameters on +the kernel command, please also consider turning up ``CONFIG_LOG_BUF_SHIFT`` +to a larger size such as 17 to avoid losing early boot messages. + +Tool assisted Parsing +--------------------- +As mentioned above, parsing by hand can be tedious, especially with a lot of +messages. To help with this, a tool has been created at +`amd-debug-tools `_ +to help parse the messages. diff --git a/Documentation/arch/x86/index.rst b/Documentation/arch/x86/index.rst index 8ac64d7de4dc..58a006525ae8 100644 --- a/Documentation/arch/x86/index.rst +++ b/Documentation/arch/x86/index.rst @@ -25,6 +25,7 @@ x86-specific Documentation shstk iommu intel_txt + amd-debugging amd-memory-encryption amd_hsmp tdx diff --git a/Documentation/arch/x86/resume.svg b/Documentation/arch/x86/resume.svg new file mode 100644 index 000000000000..ad8839f762bf --- /dev/null +++ b/Documentation/arch/x86/resume.svg @@ -0,0 +1,4 @@ + + + +
Wakeup event occurs
MP1 hands off control to OS
OS Moves one core out of ACPI C3
MP0/MP1 boot process
OS checks all wake sources
no
yes
ACPI fixed
event active
no
yes
IRQ other
than ACPI SCI active
no
yes
GPIO
IRQ shared
with SCI
no
yes
no
Any PM
wakeup event
pending
Kernel resumes system
uPEP driver removes OS_HINT
yes
no
Any GPIO
w/ WAKESTS
active
Check for ACPI Notify() events
yes
Any GPE
pending
OS moves active
core back to
ACPI C3
MP1 puts system back to sleep
 \ No newline at end of file diff --git a/Documentation/arch/x86/suspend.svg b/Documentation/arch/x86/suspend.svg new file mode 100644 index 000000000000..a69073c018d5 --- /dev/null +++ b/Documentation/arch/x86/suspend.svg @@ -0,0 +1,4 @@ + + + +
SFH driver notifies MP2 to stop all sensor collection
no
Abort suspend; details logged in dmesg
Failures?
yes
no
yes
All devices go into deepest D-state or F-state
Failures?
no
yes
GPIO driver suspends non-wake GPIOs
Suspend initiated from userspace
GPU driver shuts down clocks and sends SMU messages
Failures?
ACPI s2idle driver notifies EC using _DSM
uPEP driver (amd-pmc) sends OS_HINT
Put all x86 CPU cores into ACPI C3
s2idle loop waiting for IRQ
to wake
no
Failures?
yes
 \ No newline at end of file -- cgit v1.2.3 From 118c40b7b50340bf7ff7e0adee8e3bab6e552c82 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 28 Mar 2025 18:21:44 +0100 Subject: kbuild: require gcc-8 and binutils-2.30 Commit a3e8fe814ad1 ("x86/build: Raise the minimum GCC version to 8.1") raised the minimum compiler version as enforced by Kbuild to gcc-8.1 and clang-15 for x86. This is actually the same gcc version that has been discussed as the minimum for all architectures several times in the past, with little objection. A previous concern was the kernel for SLE15-SP7 needing to be built with gcc-7. As this ended up still using linux-6.4 and there is no plan for an SP8, this is no longer a problem. Change it for all architectures and adjust the documentation accordingly. A few version checks can be removed in the process. The binutils version 2.30 is the lowest version used in combination with gcc-8 on common distros, so use that as the corresponding minimum. Link: https://lore.kernel.org/lkml/20240925150059.3955569-32-ardb+git@google.com/ Link: https://lore.kernel.org/lkml/871q7yxrgv.wl-tiwai@suse.de/ Acked-by: Mark Rutland Signed-off-by: Arnd Bergmann --- Documentation/admin-guide/README.rst | 2 +- Documentation/kbuild/makefiles.rst | 4 ++-- Documentation/process/changes.rst | 4 ++-- Documentation/translations/it_IT/process/changes.rst | 4 ++-- Documentation/translations/zh_CN/admin-guide/README.rst | 2 +- 5 files changed, 8 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/README.rst b/Documentation/admin-guide/README.rst index 70b02f30013a..05301f03b717 100644 --- a/Documentation/admin-guide/README.rst +++ b/Documentation/admin-guide/README.rst @@ -259,7 +259,7 @@ Configuring the kernel Compiling the kernel -------------------- - - Make sure you have at least gcc 5.1 available. + - Make sure you have at least gcc 8.1 available. For more information, refer to :ref:`Documentation/process/changes.rst `. - Do a ``make`` to create a compressed kernel image. It is also possible to do diff --git a/Documentation/kbuild/makefiles.rst b/Documentation/kbuild/makefiles.rst index 3b9a8bc671e2..38cc656fac20 100644 --- a/Documentation/kbuild/makefiles.rst +++ b/Documentation/kbuild/makefiles.rst @@ -625,10 +625,10 @@ gcc-min-version Example:: - cflags-$(call gcc-min-version, 70100) := -foo + cflags-$(call gcc-min-version, 110100) := -foo In this example, cflags-y will be assigned the value -foo if $(CC) is gcc and - $(CONFIG_GCC_VERSION) is >= 7.1. + $(CONFIG_GCC_VERSION) is >= 11.1. clang-min-version clang-min-version tests if the value of $(CONFIG_CLANG_VERSION) is greater diff --git a/Documentation/process/changes.rst b/Documentation/process/changes.rst index d564362773b5..41b1431f5a6b 100644 --- a/Documentation/process/changes.rst +++ b/Documentation/process/changes.rst @@ -29,13 +29,13 @@ you probably needn't concern yourself with pcmciautils. ====================== =============== ======================================== Program Minimal version Command to check the version ====================== =============== ======================================== -GNU C 5.1 gcc --version +GNU C 8.1 gcc --version Clang/LLVM (optional) 13.0.1 clang --version Rust (optional) 1.78.0 rustc --version bindgen (optional) 0.65.1 bindgen --version GNU make 4.0 make --version bash 4.2 bash --version -binutils 2.25 ld -v +binutils 2.30 ld -v flex 2.5.35 flex --version bison 2.0 bison --version pahole 1.16 pahole --version diff --git a/Documentation/translations/it_IT/process/changes.rst b/Documentation/translations/it_IT/process/changes.rst index c7d05e2fff15..2e203fbd1785 100644 --- a/Documentation/translations/it_IT/process/changes.rst +++ b/Documentation/translations/it_IT/process/changes.rst @@ -32,13 +32,13 @@ PC Card, per esempio, probabilmente non dovreste preoccuparvi di pcmciautils. ====================== ================= ======================================== Programma Versione minima Comando per verificare la versione ====================== ================= ======================================== -GNU C 5.1 gcc --version +GNU C 8.1 gcc --version Clang/LLVM (optional) 13.0.0 clang --version Rust (opzionale) 1.78.0 rustc --version bindgen (opzionale) 0.65.1 bindgen --version GNU make 4.0 make --version bash 4.2 bash --version -binutils 2.25 ld -v +binutils 2.30 ld -v flex 2.5.35 flex --version bison 2.0 bison --version pahole 1.16 pahole --version diff --git a/Documentation/translations/zh_CN/admin-guide/README.rst b/Documentation/translations/zh_CN/admin-guide/README.rst index 1bdafdc4c8e2..82e628b77efd 100644 --- a/Documentation/translations/zh_CN/admin-guide/README.rst +++ b/Documentation/translations/zh_CN/admin-guide/README.rst @@ -224,7 +224,7 @@ Linux内核6.x版本 编译内核 --------- - - 确保您至少有gcc 5.1可用。 + - 确保您至少有gcc 8.1可用。 有关更多信息，请参阅 :ref:`Documentation/process/changes.rst ` 。 - 执行 ``make`` 来创建压缩内核映像。如果您安装了lilo以适配内核makefile， -- cgit v1.2.3 From 727b77df826b44853476d6e8690fec4cf5515eca Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Tue, 22 Apr 2025 11:07:40 -0500 Subject: Documentation/amdgpu: Add Ryzen AI Max 300 series processor This has been announced so add to the table. Link: https://www.amd.com/en/products/processors/laptop/ryzen/ai-300-series/amd-ryzen-ai-max-plus-395.html Reviewed-by: Alex Deucher Link: https://lore.kernel.org/r/20250422160740.3610-1-mario.limonciello@amd.com Signed-off-by: Mario Limonciello Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/apu-asic-info-table.csv | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/apu-asic-info-table.csv b/Documentation/gpu/amdgpu/apu-asic-info-table.csv index 094e76a65dc0..1d50b539677f 100644 --- a/Documentation/gpu/amdgpu/apu-asic-info-table.csv +++ b/Documentation/gpu/amdgpu/apu-asic-info-table.csv @@ -14,3 +14,4 @@ Ryzen 7x40 series, Phoenix, 3.1.4, 11.0.1 / 11.0.4, 4.0.2, 6.0.1, 13.0.4 / 13.0. Ryzen 8x40 series, Hawk Point, 3.1.4, 11.0.1 / 11.0.4, 4.0.2, 6.0.1, 13.0.4 / 13.0.11 Ryzen AI 300 series, Strix Point, 3.5.0, 11.5.0, 4.0.5, 6.1.0, 14.0.0 Ryzen AI 350 series, Krackan Point, 3.5.0, 11.5.2, 4.0.5, 6.1.2, 14.0.4 +Ryzen AI Max 300 series, Strix Halo, 3.5.1, 11.5.1, 4.0.6, 6.1.1, 14.0.1 -- cgit v1.2.3 From ffc7e11c1014db7b2fef4b563a53d444a0932f40 Mon Sep 17 00:00:00 2001 From: Rodrigo Siqueira Date: Mon, 21 Apr 2025 16:12:26 -0600 Subject: drm/amdgpu: Add documentation associated with CSB Add a description for the get_csb_buffer callback, update the glossary, and add some extra information about RB, which is associated with CSB configuration. Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/amdgpu-glossary.rst | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst b/Documentation/gpu/amdgpu/amdgpu-glossary.rst index 080c3f2250d1..8e6af7cc76c2 100644 --- a/Documentation/gpu/amdgpu/amdgpu-glossary.rst +++ b/Documentation/gpu/amdgpu/amdgpu-glossary.rst @@ -33,6 +33,9 @@ we have a dedicated glossary for Display Core at CS Command Submission + CSB + Clear State Indirect Buffer + CU Compute Unit @@ -134,6 +137,9 @@ we have a dedicated glossary for Display Core at PSP Platform Security Processor + RB + Render Backends. Some people called it ROPs. + RLC RunList Controller. This name is a remnant of past ages and doesn't have much meaning today. It's a group of general-purpose helper engines for -- cgit v1.2.3 From cfe769670e82c2bdd1cd8b6e4dbe8614b6429211 Mon Sep 17 00:00:00 2001 From: Pengyu Luo Date: Thu, 13 Mar 2025 18:34:35 +0800 Subject: power: supply: add Huawei Matebook E Go psy driver On the Huawei Matebook E Go tablet the EC provides access to the adapter and battery status. Add the driver to read power supply status on the tablet. This driver is inspired by the following drivers: drivers/power/supply/lenovo_yoga_c630_battery.c drivers/platform/arm64/acer-aspire1-ec.c drivers/acpi/battery.c drivers/acpi/ac.c base-commit: 613af589b566093ce7388bf3202fca70d742c166 Signed-off-by: Pengyu Luo Link: https://lore.kernel.org/r/20250313103437.108772-1-mitltlatltl@gmail.com Signed-off-by: Sebastian Reichel --- Documentation/ABI/testing/sysfs-class-power-gaokun | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-class-power-gaokun (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-class-power-gaokun b/Documentation/ABI/testing/sysfs-class-power-gaokun new file mode 100644 index 000000000000..0633aed7b355 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-class-power-gaokun @@ -0,0 +1,27 @@ +What: /sys/class/power_supply/gaokun-ec-battery/smart_charge_delay +Date: March 2025 +KernelVersion: 6.15 +Contact: Pengyu Luo +Description: + This entry allows configuration of smart charging delay. + + Smart charging behavior: when the power adapter is connected + for delay hours, battery charging will follow the rules of + charge_control_start_threshold and charge_control_end_threshold. + For more information about charge control, please refer to + sysfs-class-power. + + Access: Read, Write + + Valid values: In hours (non-negative) + +What: /sys/class/power_supply/gaokun-ec-battery/battery_adaptive_charge +Date: March 2025 +KernelVersion: 6.15 +Contact: Pengyu Luo +Description: + This entry allows enabling battery adaptive charging. + + Access: Read, Write + + Valid values: 0 (disabled) or 1 (enabled) -- cgit v1.2.3 From 1495c1aa4447f64c1e2209a95b201cb6452bb775 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andr=C3=A9=20Draszik?= Date: Tue, 1 Apr 2025 11:11:02 +0100 Subject: dt-bindings: reset: syscon-reboot: add google,gs101-reboot MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit GS101 supports a couple different reset types via certain registers in the SYSCON register map. Add a compatible for it. When in effect, all register values and offsets are implied, hence they shall not be specified in that case. Signed-off-by: André Draszik Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250401-syscon-reboot-reset-mode-v5-1-5b9357442363@linaro.org Signed-off-by: Sebastian Reichel --- .../bindings/power/reset/syscon-reboot.yaml | 42 +++++++++++++++------- 1 file changed, 30 insertions(+), 12 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml b/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml index 19d3093e6cd2..ccd555870094 100644 --- a/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml +++ b/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml @@ -21,7 +21,9 @@ description: |+ properties: compatible: - const: syscon-reboot + enum: + - syscon-reboot + - google,gs101-reboot mask: $ref: /schemas/types.yaml#/definitions/uint32 @@ -49,12 +51,6 @@ properties: priority: default: 192 -oneOf: - - required: - - offset - - required: - - reg - required: - compatible @@ -63,12 +59,29 @@ additionalProperties: false allOf: - $ref: restart-handler.yaml# - if: - not: - required: - - mask + properties: + compatible: + contains: + const: google,gs101-reboot then: - required: - - value + properties: + mask: false + offset: false + reg: false + value: false + + else: + if: + not: + required: + - mask + then: + required: + - value + + oneOf: + - required: [offset] + - required: [reg] examples: - | @@ -78,3 +91,8 @@ examples: offset = <0x0>; mask = <0x1>; }; + + - | + reboot { + compatible = "google,gs101-reboot"; + }; -- cgit v1.2.3 From b2d25905366b4e6791f60e6bc76a636d1b88e6f8 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Thu, 24 Apr 2025 09:59:49 +0100 Subject: dt-bindings: memory: Document RZ/G3E support Document support for the Expanded Serial Peripheral Interface (xSPI) Controller in the Renesas RZ/G3E (R9A09G047) SoC. Reviewed-by: Rob Herring (Arm) Signed-off-by: Biju Das Link: https://lore.kernel.org/r/20250424090000.136804-2-biju.das.jz@bp.renesas.com Signed-off-by: Krzysztof Kozlowski --- .../memory-controllers/renesas,rzg3e-xspi.yaml | 135 +++++++++++++++++++++ 1 file changed, 135 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml b/Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml new file mode 100644 index 000000000000..2bfe63ec62dc --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml @@ -0,0 +1,135 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/renesas,rzg3e-xspi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas Expanded Serial Peripheral Interface (xSPI) + +maintainers: + - Biju Das + +description: | + Renesas xSPI allows a SPI flash connected to the SoC to be accessed via + the memory-mapping or the manual command mode. + + The flash chip itself should be represented by a subnode of the XSPI node. + The flash interface is selected based on the "compatible" property of this + subnode: + - "jedec,spi-nor"; + +allOf: + - $ref: /schemas/spi/spi-controller.yaml# + +properties: + compatible: + const: renesas,r9a09g047-xspi # RZ/G3E + + reg: + items: + - description: xSPI registers + - description: direct mapping area + + reg-names: + items: + - const: regs + - const: dirmap + + interrupts: + items: + - description: Interrupt pulse signal by factors excluding errors + - description: Interrupt pulse signal by error factors + + interrupt-names: + items: + - const: pulse + - const: err_pulse + + clocks: + items: + - description: AHB clock + - description: AXI clock + - description: SPI clock + - description: Double speed SPI clock + + clock-names: + items: + - const: ahb + - const: axi + - const: spi + - const: spix2 + + power-domains: + maxItems: 1 + + resets: + items: + - description: Hardware reset + - description: AXI reset + + reset-names: + items: + - const: hresetn + - const: aresetn + + renesas,xspi-cs-addr-sys: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + Phandle to the system controller (sys) that allows to configure + xSPI CS0 and CS1 addresses. + +patternProperties: + "flash@[0-9a-f]+$": + type: object + additionalProperties: true + + properties: + compatible: + contains: + const: jedec,spi-nor + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - clocks + - clock-names + - power-domains + - resets + - reset-names + - '#address-cells' + - '#size-cells' + +unevaluatedProperties: false + +examples: + - | + #include + #include + + spi@11030000 { + compatible = "renesas,r9a09g047-xspi"; + reg = <0x11030000 0x10000>, <0x20000000 0x10000000>; + reg-names = "regs", "dirmap"; + interrupts = , + ; + interrupt-names = "pulse", "err_pulse"; + clocks = <&cpg CPG_MOD 0x9f>, <&cpg CPG_MOD 0xa0>, + <&cpg CPG_CORE 9>, <&cpg CPG_MOD 0xa1>; + clock-names = "ahb", "axi", "spi", "spix2"; + power-domains = <&cpg>; + resets = <&cpg 0xa3>, <&cpg 0xa4>; + reset-names = "hresetn", "aresetn"; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; + }; -- cgit v1.2.3 From 004bd8536cb9d56cfe2a13a6e05a4a1998455b71 Mon Sep 17 00:00:00 2001 From: Kaustabh Chakraborty Date: Thu, 1 May 2025 17:02:57 +0530 Subject: dt-bindings: arm: samsung: add compatibles for exynos7870 devices Document the compatible string for Exynos7870 - "samsung,exynos7870". The following devices are also added: - Galaxy A2 Core ("samsung,a2corelte") - Galaxy J6 ("samsung,j6lte") - Galaxy J7 Prime ("samsung,on7xelte") Acked-by: Rob Herring (Arm) Signed-off-by: Kaustabh Chakraborty Link: https://lore.kernel.org/r/20250501-exynos7870-v7-1-bb579a27e5eb@disroot.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml index fab29f95d8e6..b3be184c7e56 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml @@ -212,6 +212,14 @@ properties: - samsung,exynos7-espresso # Samsung Exynos7 Espresso - const: samsung,exynos7 + - description: Exynos7870 based boards + items: + - enum: + - samsung,a2corelte # Samsung Galaxy A2 Core + - samsung,j6lte # Samsung Galaxy J6 + - samsung,on7xelte # Samsung Galaxy J7 Prime + - const: samsung,exynos7870 + - description: Exynos7885 based boards items: - enum: -- cgit v1.2.3 From 7fcdfaf37272669dec131963745bf51c360724ac Mon Sep 17 00:00:00 2001 From: Pin-yen Lin Date: Tue, 22 Apr 2025 16:28:27 +0800 Subject: dt-bindings: usb: Introduce usb-hub.yaml Introduce a general USB hub binding that describes downstream ports and hard wired USB devices for on-board USB hubs. Signed-off-by: Pin-yen Lin Reviewed-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250422082957.2058229-2-treapking@chromium.org Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/usb-hub.yaml | 84 ++++++++++++++++++++++ 1 file changed, 84 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/usb-hub.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/usb-hub.yaml b/Documentation/devicetree/bindings/usb/usb-hub.yaml new file mode 100644 index 000000000000..5238ab105763 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/usb-hub.yaml @@ -0,0 +1,84 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/usb-hub.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic USB Hub + +maintainers: + - Pin-yen Lin + +allOf: + - $ref: usb-device.yaml# + +properties: + '#address-cells': + const: 1 + + peer-hub: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle to the peer hub on the controller. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: + The downstream facing USB ports + + patternProperties: + "^port@[1-9a-f][0-9a-f]*$": + $ref: /schemas/graph.yaml#/properties/port + +patternProperties: + '^.*@[1-9a-f][0-9a-f]*$': + description: The hard wired USB devices + type: object + $ref: /schemas/usb/usb-device.yaml + additionalProperties: true + +required: + - compatible + - reg + +additionalProperties: true + +examples: + - | + usb { + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub_2_0: hub@1 { + compatible = "usb123,4567"; + reg = <1>; + peer-hub = <&hub_3_0>; + #address-cells = <1>; + #size-cells = <0>; + /* USB 2.0 device on port 5 */ + device@5 { + reg = <5>; + compatible = "usb765,4321"; + }; + }; + + /* 3.0 hub on port 2 */ + hub_3_0: hub@2 { + compatible = "usb123,abcd"; + reg = <2>; + peer-hub = <&hub_2_0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + /* Type-A connector on port 3 */ + port@3 { + reg = <3>; + endpoint { + remote-endpoint = <&usb_a0_ss>; + }; + }; + }; + }; + }; -- cgit v1.2.3 From fc259b024cb3e901d8f62ea4f305bccff587fd33 Mon Sep 17 00:00:00 2001 From: Pin-yen Lin Date: Tue, 22 Apr 2025 16:28:28 +0800 Subject: dt-bindings: usb: Add binding for PS5511 hub controller Parade PS5511 is USB hub with 4 USB 3.2 compliant 5Gbps downstream(DS) ports, and 1 extra USB 2.0 downstream port. The hub has one reset pin control and two power supplies (3V3 and 1V1). Signed-off-by: Pin-yen Lin Reviewed-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250422082957.2058229-3-treapking@chromium.org Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/parade,ps5511.yaml | 108 +++++++++++++++++++++ 1 file changed, 108 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/parade,ps5511.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/parade,ps5511.yaml b/Documentation/devicetree/bindings/usb/parade,ps5511.yaml new file mode 100644 index 000000000000..10d002f09db8 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/parade,ps5511.yaml @@ -0,0 +1,108 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/parade,ps5511.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Parade PS5511 4+1 Port USB 3.2 Gen 1 Hub Controller + +maintainers: + - Pin-yen Lin + +properties: + compatible: + enum: + - usb1da0,5511 + - usb1da0,55a1 + + reset-gpios: + items: + - description: GPIO specifier for RESETB pin. + + vddd11-supply: + description: + 1V1 power supply to the hub + + vdd33-supply: + description: + 3V3 power supply to the hub + + peer-hub: true + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + patternProperties: + '^port@': + $ref: /schemas/graph.yaml#/properties/port + + properties: + reg: + minimum: 1 + maximum: 5 + +additionalProperties: + properties: + reg: + minimum: 1 + maximum: 5 + +required: + - peer-hub + +allOf: + - $ref: usb-hub.yaml# + - if: + not: + properties: + compatible: + enum: + - usb1da0,55a1 + then: + properties: + ports: + properties: + port@5: false + + patternProperties: + '^.*@5$': false + +examples: + - | + usb { + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub_2_0: hub@1 { + compatible = "usb1da0,55a1"; + reg = <1>; + peer-hub = <&hub_3_0>; + #address-cells = <1>; + #size-cells = <0>; + /* USB 2.0 device on port 5 */ + device@5 { + reg = <5>; + compatible = "usb123,4567"; + }; + }; + + /* 3.0 hub on port 2 */ + hub_3_0: hub@2 { + compatible = "usb1da0,5511"; + reg = <2>; + peer-hub = <&hub_2_0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + /* Type-A connector on port 3 */ + port@3 { + reg = <3>; + endpoint { + remote-endpoint = <&usb_a0_ss>; + }; + }; + }; + }; + }; -- cgit v1.2.3 From 76cbb3eabf0b5f3048c4f988504e58beaf040eb7 Mon Sep 17 00:00:00 2001 From: Pin-yen Lin Date: Tue, 22 Apr 2025 16:28:29 +0800 Subject: dt-bindings: usb: realtek,rts5411: Adapt usb-hub.yaml Inherit usb-hub.yaml and remove duplicated schemas. Signed-off-by: Pin-yen Lin Reviewed-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250422082957.2058229-4-treapking@chromium.org Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/realtek,rts5411.yaml | 52 ++++++---------------- 1 file changed, 13 insertions(+), 39 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/realtek,rts5411.yaml b/Documentation/devicetree/bindings/usb/realtek,rts5411.yaml index 6577a61cc075..a020afaf2d6e 100644 --- a/Documentation/devicetree/bindings/usb/realtek,rts5411.yaml +++ b/Documentation/devicetree/bindings/usb/realtek,rts5411.yaml @@ -10,7 +10,7 @@ maintainers: - Matthias Kaehlcke allOf: - - $ref: usb-device.yaml# + - $ref: usb-hub.yaml# properties: compatible: @@ -19,61 +19,35 @@ properties: - usbbda,5411 - usbbda,411 - reg: true - - '#address-cells': - const: 1 - - '#size-cells': - const: 0 - vdd-supply: description: phandle to the regulator that provides power to the hub. - peer-hub: - $ref: /schemas/types.yaml#/definitions/phandle - description: - phandle to the peer hub on the controller. + peer-hub: true ports: $ref: /schemas/graph.yaml#/properties/ports - properties: - port@1: - $ref: /schemas/graph.yaml#/properties/port - description: - 1st downstream facing USB port - - port@2: + patternProperties: + '^port@': $ref: /schemas/graph.yaml#/properties/port - description: - 2nd downstream facing USB port - port@3: - $ref: /schemas/graph.yaml#/properties/port - description: - 3rd downstream facing USB port + properties: + reg: + minimum: 1 + maximum: 4 - port@4: - $ref: /schemas/graph.yaml#/properties/port - description: - 4th downstream facing USB port - -patternProperties: - '^.*@[1-4]$': - description: The hard wired USB devices - type: object - $ref: /schemas/usb/usb-device.yaml - additionalProperties: true +additionalProperties: + properties: + reg: + minimum: 1 + maximum: 4 required: - peer-hub - compatible - reg -additionalProperties: false - examples: - | usb { -- cgit v1.2.3 From 2dbe74c63cb73829be0aab0d0e7e68b87071b5fa Mon Sep 17 00:00:00 2001 From: George Moussalem Date: Thu, 1 May 2025 13:20:51 +0400 Subject: spi: dt-bindings: spi-qpic-snand: Add IPQ5018 compatible IPQ5018 contains the QPIC-SPI-NAND flash controller which is the same as the one found in IPQ9574. So let's document the IPQ5018 compatible and use IPQ9574 as the fallback. Signed-off-by: George Moussalem Link: https://patch.msgid.link/20250501-ipq5018-spi-qpic-snand-v1-1-31e01fbb606f@outlook.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml index aa3f93319203..cb1f15224b45 100644 --- a/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml +++ b/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml @@ -21,8 +21,12 @@ allOf: properties: compatible: - enum: - - qcom,ipq9574-snand + oneOf: + - items: + - enum: + - qcom,ipq5018-snand + - const: qcom,ipq9574-snand + - const: qcom,ipq9574-snand reg: maxItems: 1 -- cgit v1.2.3 From c5a0a64c1222cd2bfab3ae4227caba2f1c0499f5 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Wed, 30 Apr 2025 08:51:13 +0300 Subject: dt-bindings: power: supply: Document Maxim MAX8971 charger Add bindings for Maxim MAX8971 charger. Signed-off-by: Svyatoslav Ryhel Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250430055114.11469-2-clamor95@gmail.com Signed-off-by: Sebastian Reichel --- .../bindings/power/supply/maxim,max8971.yaml | 68 ++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/supply/maxim,max8971.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/power/supply/maxim,max8971.yaml b/Documentation/devicetree/bindings/power/supply/maxim,max8971.yaml new file mode 100644 index 000000000000..2244cc3d45a6 --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/maxim,max8971.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/supply/maxim,max8971.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX8971 IC charger + +maintainers: + - Svyatoslav Ryhel + +description: + The MAX8971 is a compact, high-frequency, high-efficiency switch-mode charger + for a one-cell lithium-ion (Li+) battery. + +allOf: + - $ref: power-supply.yaml# + +properties: + compatible: + const: maxim,max8971 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + monitored-battery: true + + port: + description: + An optional port node to link the extcon device to detect type of plug. + $ref: /schemas/graph.yaml#/properties/port + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + charger@35 { + compatible = "maxim,max8971"; + reg = <0x35>; + + interrupt-parent = <&gpio>; + interrupts = <74 IRQ_TYPE_LEVEL_LOW>; + + monitored-battery = <&battery>; + + port { + charger_input: endpoint { + remote-endpoint = <&extcon_output>; + }; + }; + }; + }; +... -- cgit v1.2.3 From 60cd40eee4f4f57e88bd5dd03f299eb9e17c73e5 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Wed, 30 Apr 2025 08:51:14 +0300 Subject: power: supply: Add support for Maxim MAX8971 charger The MAX8971 is a compact, high-frequency, high-efficiency switch-mode charger for a one-cell lithium-ion (Li+) battery. Signed-off-by: Svyatoslav Ryhel Link: https://lore.kernel.org/r/20250430055114.11469-3-clamor95@gmail.com Signed-off-by: Sebastian Reichel --- Documentation/ABI/testing/sysfs-class-power | 43 +++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-class-power b/Documentation/ABI/testing/sysfs-class-power index 2a5c1a09a28f..560124cc3177 100644 --- a/Documentation/ABI/testing/sysfs-class-power +++ b/Documentation/ABI/testing/sysfs-class-power @@ -822,3 +822,46 @@ Description: Each entry is a link to the device which registered the extension. Access: Read + +What: /sys/class/power_supply/max8971-charger/fast_charge_timer +Date: May 2025 +KernelVersion: 6.15.0 +Contact: Svyatoslav Ryhel +Description: + This entry shows and sets the maximum time the max8971 + charger operates in fast-charge mode. When the timer expires + the device will terminate fast-charge mode (charging current + will drop to 0 A) and will trigger interrupt. + + Valid values: + + - 4 - 10 (hours), step by 1 + - 0: disabled. + +What: /sys/class/power_supply/max8971-charger/top_off_threshold_current +Date: May 2025 +KernelVersion: 6.15.0 +Contact: Svyatoslav Ryhel +Description: + This entry shows and sets the charging current threshold for + entering top-off charging mode. When charging current in fast + charge mode drops below this value, the charger will trigger + interrupt and start top-off charging mode. + + Valid values: + + - 50000 - 200000 (microamps), step by 50000 (rounded down) + +What: /sys/class/power_supply/max8971-charger/top_off_timer +Date: May 2025 +KernelVersion: 6.15.0 +Contact: Svyatoslav Ryhel +Description: + This entry shows and sets the maximum time the max8971 + charger operates in top-off charge mode. When the timer expires + the device will terminate top-off charge mode (charging current + will drop to 0 A) and will trigger interrupt. + + Valid values: + + - 0 - 70 (minutes), step by 10 (rounded down) -- cgit v1.2.3 From 6694d17843e82c30287418ea8c244038e336754d Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sun, 20 Apr 2025 17:12:43 +0200 Subject: dt-bindings: msm: qcom,mdss: Document interconnect paths Document two interconnect paths found on the MDSS on MSM8953. Acked-by: Rob Herring (Arm) Signed-off-by: Luca Weiss Reviewed-by: Dmitry Baryshkov Patchwork: https://patchwork.freedesktop.org/patch/649391/ Link: https://lore.kernel.org/r/20250420-msm8953-interconnect-v2-1-828715dcb674@lucaweiss.eu Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml index 7c6462caa442..db9c43b20e2a 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml @@ -84,6 +84,18 @@ properties: items: - description: MDSS_CORE reset + interconnects: + minItems: 1 + items: + - description: Interconnect path from mdp0 (or a single mdp) port to the data bus + - description: Interconnect path from CPU to the reg bus + + interconnect-names: + minItems: 1 + items: + - const: mdp0-mem + - const: cpu-cfg + required: - compatible - reg -- cgit v1.2.3 From 2f1d131147aadf41d376dbd01d0d83eca8054deb Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 25 Apr 2025 12:51:51 +0300 Subject: dt-bindings: display: msm: mdp4: add LCDC clock and PLL source Add the LCDC / LVDS clock input and the XO used to drive internal LVDS PLL to MDP4 controller bindings. The controller also provides LVDS PHY PLL, so add optional #clock-cells to the device. Acked-by: Rob Herring (Arm) Signed-off-by: Dmitry Baryshkov Patchwork: https://patchwork.freedesktop.org/patch/650278/ Link: https://lore.kernel.org/r/20250425-fd-mdp4-lvds-v4-1-6b212160b44c@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/display/msm/mdp4.yaml | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/mdp4.yaml b/Documentation/devicetree/bindings/display/msm/mdp4.yaml index 35204a287579..03ee09faa335 100644 --- a/Documentation/devicetree/bindings/display/msm/mdp4.yaml +++ b/Documentation/devicetree/bindings/display/msm/mdp4.yaml @@ -18,9 +18,10 @@ properties: clocks: minItems: 6 - maxItems: 6 + maxItems: 8 clock-names: + minItems: 6 items: - const: core_clk - const: iface_clk @@ -28,6 +29,12 @@ properties: - const: lut_clk - const: hdmi_clk - const: tv_clk + - const: lcdc_clk + - const: pxo + description: XO used to drive the internal LVDS PLL + + '#clock-cells': + const: 0 reg: maxItems: 1 -- cgit v1.2.3 From b341da1172fe8bb21f6bffcaa3f4b714f544ed75 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 18 Apr 2025 10:49:56 +0300 Subject: dt-bindings: display/msm: dp-controller: describe SAR2130P Describe DisplayPort controller present on Qualcomm SAR2130P platform. Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski Patchwork: https://patchwork.freedesktop.org/patch/649263/ Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-1-442c905cb3a4@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index e00b88332f2f..246bbb509bea 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -31,6 +31,7 @@ properties: - qcom,sm8650-dp - items: - enum: + - qcom,sar2130p-dp - qcom,sm6350-dp - qcom,sm8150-dp - qcom,sm8250-dp -- cgit v1.2.3 From 3c70c9d0a99d2083cda03f04c9f1843cfcf9f7c3 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 18 Apr 2025 10:49:57 +0300 Subject: dt-bindings: display/msm: dsi-controller-main: describe SAR2130P Describe MIPI DSI controller present on Qualcomm SAR2130P platform. Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski Patchwork: https://patchwork.freedesktop.org/patch/649250/ Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-2-442c905cb3a4@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml index 2aab33cd0017..a3e05e34bf14 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -23,6 +23,7 @@ properties: - qcom,msm8996-dsi-ctrl - qcom,msm8998-dsi-ctrl - qcom,qcm2290-dsi-ctrl + - qcom,sar2130p-dsi-ctrl - qcom,sc7180-dsi-ctrl - qcom,sc7280-dsi-ctrl - qcom,sdm660-dsi-ctrl @@ -314,6 +315,7 @@ allOf: contains: enum: - qcom,msm8998-dsi-ctrl + - qcom,sar2130p-dsi-ctrl - qcom,sc7180-dsi-ctrl - qcom,sc7280-dsi-ctrl - qcom,sdm845-dsi-ctrl -- cgit v1.2.3 From 262650e71854ff701ca6c3a6860fbffc94243999 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 18 Apr 2025 10:49:58 +0300 Subject: dt-bindings: display/msm: dsi-phy-7nm: describe SAR2130P Describe MIPI DSI PHY present on Qualcomm SAR2130P platform. Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski Patchwork: https://patchwork.freedesktop.org/patch/649252/ Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-3-442c905cb3a4@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml index 321470435e65..f79be422b889 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml @@ -17,6 +17,7 @@ properties: enum: - qcom,dsi-phy-7nm - qcom,dsi-phy-7nm-8150 + - qcom,sar2130p-dsi-phy-5nm - qcom,sc7280-dsi-phy-7nm - qcom,sm6375-dsi-phy-7nm - qcom,sm8350-dsi-phy-5nm -- cgit v1.2.3 From 759fe7181723c39367a78327ac17ac917931f2b3 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 18 Apr 2025 10:49:59 +0300 Subject: dt-bindings: display/msm: qcom,sc7280-dpu: describe SAR2130P Describe DPU controller present on Qualcomm SAR2130P platform. Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski Patchwork: https://patchwork.freedesktop.org/patch/649254/ Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-4-442c905cb3a4@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml index 6902795b4e2c..df9ec15ad6c3 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml @@ -17,6 +17,7 @@ $ref: /schemas/display/msm/dpu-common.yaml# properties: compatible: enum: + - qcom,sar2130p-dpu - qcom,sc7280-dpu - qcom,sc8280xp-dpu - qcom,sm8350-dpu -- cgit v1.2.3 From 9e4f11c1228cc8ebf236cfa51d44abafec80f326 Mon Sep 17 00:00:00 2001 From: Damien Le Moal Date: Mon, 7 Apr 2025 16:52:22 +0900 Subject: Documentation: Document the new zoned loop block device driver Introduce the zoned_loop.rst documentation file under admin-guide/blockdev to document the zoned loop block device driver. An overview of the driver is provided and its usage to create and delete zoned devices described. Signed-off-by: Damien Le Moal Reviewed-by: Christoph Hellwig Reviewed-by: Johannes Thumshirn Link: https://lore.kernel.org/r/20250407075222.170336-3-dlemoal@kernel.org Signed-off-by: Jens Axboe --- Documentation/admin-guide/blockdev/index.rst | 1 + Documentation/admin-guide/blockdev/zoned_loop.rst | 169 ++++++++++++++++++++++ 2 files changed, 170 insertions(+) create mode 100644 Documentation/admin-guide/blockdev/zoned_loop.rst (limited to 'Documentation') diff --git a/Documentation/admin-guide/blockdev/index.rst b/Documentation/admin-guide/blockdev/index.rst index 957ccf617797..3262397ebe8f 100644 --- a/Documentation/admin-guide/blockdev/index.rst +++ b/Documentation/admin-guide/blockdev/index.rst @@ -11,6 +11,7 @@ Block Devices nbd paride ramdisk + zoned_loop zram drbd/index diff --git a/Documentation/admin-guide/blockdev/zoned_loop.rst b/Documentation/admin-guide/blockdev/zoned_loop.rst new file mode 100644 index 000000000000..9c7aa3b482f3 --- /dev/null +++ b/Documentation/admin-guide/blockdev/zoned_loop.rst @@ -0,0 +1,169 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======================= +Zoned Loop Block Device +======================= + +.. Contents: + + 1) Overview + 2) Creating a Zoned Device + 3) Deleting a Zoned Device + 4) Example + + +1) Overview +----------- + +The zoned loop block device driver (zloop) allows a user to create a zoned block +device using one regular file per zone as backing storage. This driver does not +directly control any hardware and uses read, write and truncate operations to +regular files of a file system to emulate a zoned block device. + +Using zloop, zoned block devices with a configurable capacity, zone size and +number of conventional zones can be created. The storage for each zone of the +device is implemented using a regular file with a maximum size equal to the zone +size. The size of a file backing a conventional zone is always equal to the zone +size. The size of a file backing a sequential zone indicates the amount of data +sequentially written to the file, that is, the size of the file directly +indicates the position of the write pointer of the zone. + +When resetting a sequential zone, its backing file size is truncated to zero. +Conversely, for a zone finish operation, the backing file is truncated to the +zone size. With this, the maximum capacity of a zloop zoned block device created +can be larger configured to be larger than the storage space available on the +backing file system. Of course, for such configuration, writing more data than +the storage space available on the backing file system will result in write +errors. + +The zoned loop block device driver implements a complete zone transition state +machine. That is, zones can be empty, implicitly opened, explicitly opened, +closed or full. The current implementation does not support any limits on the +maximum number of open and active zones. + +No user tools are necessary to create and delete zloop devices. + +2) Creating a Zoned Device +-------------------------- + +Once the zloop module is loaded (or if zloop is compiled in the kernel), the +character device file /dev/zloop-control can be used to add a zloop device. +This is done by writing an "add" command directly to the /dev/zloop-control +device:: + + $ modprobe zloop + $ ls -l /dev/zloop* + crw-------. 1 root root 10, 123 Jan 6 19:18 /dev/zloop-control + + $ mkdir -p + $ echo "add [options]" > /dev/zloop-control + +The options available for the add command can be listed by reading the +/dev/zloop-control device:: + + $ cat /dev/zloop-control + add id=%d,capacity_mb=%u,zone_size_mb=%u,zone_capacity_mb=%u,conv_zones=%u,base_dir=%s,nr_queues=%u,queue_depth=%u,buffered_io + remove id=%d + +In more details, the options that can be used with the "add" command are as +follows. + +================ =========================================================== +id Device number (the X in /dev/zloopX). + Default: automatically assigned. +capacity_mb Device total capacity in MiB. This is always rounded up to + the nearest higher multiple of the zone size. + Default: 16384 MiB (16 GiB). +zone_size_mb Device zone size in MiB. Default: 256 MiB. +zone_capacity_mb Device zone capacity (must always be equal to or lower than + the zone size. Default: zone size. +conv_zones Total number of conventioanl zones starting from sector 0. + Default: 8. +base_dir Path to the base directoy where to create the directory + containing the zone files of the device. + Default=/var/local/zloop. + The device directory containing the zone files is always + named with the device ID. E.g. the default zone file + directory for /dev/zloop0 is /var/local/zloop/0. +nr_queues Number of I/O queues of the zoned block device. This value is + always capped by the number of online CPUs + Default: 1 +queue_depth Maximum I/O queue depth per I/O queue. + Default: 64 +buffered_io Do buffered IOs instead of direct IOs (default: false) +================ =========================================================== + +3) Deleting a Zoned Device +-------------------------- + +Deleting an unused zoned loop block device is done by issuing the "remove" +command to /dev/zloop-control, specifying the ID of the device to remove:: + + $ echo "remove id=X" > /dev/zloop-control + +The remove command does not have any option. + +A zoned device that was removed can be re-added again without any change to the +state of the device zones: the device zones are restored to their last state +before the device was removed. Adding again a zoned device after it was removed +must always be done using the same configuration as when the device was first +added. If a zone configuration change is detected, an error will be returned and +the zoned device will not be created. + +To fully delete a zoned device, after executing the remove operation, the device +base directory containing the backing files of the device zones must be deleted. + +4) Example +---------- + +The following sequence of commands creates a 2GB zoned device with zones of 64 +MB and a zone capacity of 63 MB:: + + $ modprobe zloop + $ mkdir -p /var/local/zloop/0 + $ echo "add capacity_mb=2048,zone_size_mb=64,zone_capacity=63MB" > /dev/zloop-control + +For the device created (/dev/zloop0), the zone backing files are all created +under the default base directory (/var/local/zloop):: + + $ ls -l /var/local/zloop/0 + total 0 + -rw-------. 1 root root 67108864 Jan 6 22:23 cnv-000000 + -rw-------. 1 root root 67108864 Jan 6 22:23 cnv-000001 + -rw-------. 1 root root 67108864 Jan 6 22:23 cnv-000002 + -rw-------. 1 root root 67108864 Jan 6 22:23 cnv-000003 + -rw-------. 1 root root 67108864 Jan 6 22:23 cnv-000004 + -rw-------. 1 root root 67108864 Jan 6 22:23 cnv-000005 + -rw-------. 1 root root 67108864 Jan 6 22:23 cnv-000006 + -rw-------. 1 root root 67108864 Jan 6 22:23 cnv-000007 + -rw-------. 1 root root 0 Jan 6 22:23 seq-000008 + -rw-------. 1 root root 0 Jan 6 22:23 seq-000009 + ... + +The zoned device created (/dev/zloop0) can then be used normally:: + + $ lsblk -z + NAME ZONED ZONE-SZ ZONE-NR ZONE-AMAX ZONE-OMAX ZONE-APP ZONE-WGRAN + zloop0 host-managed 64M 32 0 0 1M 4K + $ blkzone report /dev/zloop0 + start: 0x000000000, len 0x020000, cap 0x020000, wptr 0x000000 reset:0 non-seq:0, zcond: 0(nw) [type: 1(CONVENTIONAL)] + start: 0x000020000, len 0x020000, cap 0x020000, wptr 0x000000 reset:0 non-seq:0, zcond: 0(nw) [type: 1(CONVENTIONAL)] + start: 0x000040000, len 0x020000, cap 0x020000, wptr 0x000000 reset:0 non-seq:0, zcond: 0(nw) [type: 1(CONVENTIONAL)] + start: 0x000060000, len 0x020000, cap 0x020000, wptr 0x000000 reset:0 non-seq:0, zcond: 0(nw) [type: 1(CONVENTIONAL)] + start: 0x000080000, len 0x020000, cap 0x020000, wptr 0x000000 reset:0 non-seq:0, zcond: 0(nw) [type: 1(CONVENTIONAL)] + start: 0x0000a0000, len 0x020000, cap 0x020000, wptr 0x000000 reset:0 non-seq:0, zcond: 0(nw) [type: 1(CONVENTIONAL)] + start: 0x0000c0000, len 0x020000, cap 0x020000, wptr 0x000000 reset:0 non-seq:0, zcond: 0(nw) [type: 1(CONVENTIONAL)] + start: 0x0000e0000, len 0x020000, cap 0x020000, wptr 0x000000 reset:0 non-seq:0, zcond: 0(nw) [type: 1(CONVENTIONAL)] + start: 0x000100000, len 0x020000, cap 0x01f800, wptr 0x000000 reset:0 non-seq:0, zcond: 1(em) [type: 2(SEQ_WRITE_REQUIRED)] + start: 0x000120000, len 0x020000, cap 0x01f800, wptr 0x000000 reset:0 non-seq:0, zcond: 1(em) [type: 2(SEQ_WRITE_REQUIRED)] + ... + +Deleting this device is done using the command:: + + $ echo "remove id=0" > /dev/zloop-control + +The removed device can be re-added again using the same "add" command as when +the device was first created. To fully delete a zoned device, its backing files +should also be deleted after executing the remove command:: + + $ rm -r /var/local/zloop/0 -- cgit v1.2.3 From 0454b9057e983455cd1011d2c8e1b3697ece14c9 Mon Sep 17 00:00:00 2001 From: Yixun Lan Date: Wed, 30 Apr 2025 13:32:04 +0800 Subject: dt-bindings: net: sun8i-emac: Add A523 EMAC0 compatible Allwinner A523 SoC variant (A527/T527) contains an "EMAC0" Ethernet MAC compatible to the A64 version. Reviewed-by: Andre Przywara Acked-by: Krzysztof Kozlowski Signed-off-by: Yixun Lan Link: https://patch.msgid.link/20250430-01-sun55i-emac0-v3-2-6fc000bbccbd@gentoo.org Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml index 7fe0352dff0f..7b6a2fde8175 100644 --- a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml +++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml @@ -23,6 +23,7 @@ properties: - allwinner,sun20i-d1-emac - allwinner,sun50i-h6-emac - allwinner,sun50i-h616-emac0 + - allwinner,sun55i-a523-emac0 - const: allwinner,sun50i-a64-emac reg: -- cgit v1.2.3 From 3096209b7a62f9d45475f7734d6b15a2a79e72a3 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 18 Apr 2025 10:50:00 +0300 Subject: dt-bindings: display/msm: Add Qualcomm SAR2130P Describe the Mobile Display SubSystem (MDSS) device present on the Qualcomm SAR2130P platform. It looks pretty close to SM8550 on the system level. SAR2130P features two DSI hosts and single DisplayPort controller. Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski Patchwork: https://patchwork.freedesktop.org/patch/649265/ Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-5-442c905cb3a4@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov --- .../bindings/display/msm/qcom,sar2130p-mdss.yaml | 439 +++++++++++++++++++++ 1 file changed, 439 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml new file mode 100644 index 000000000000..870144b53cec --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml @@ -0,0 +1,439 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/qcom,sar2130p-mdss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SAR2130P Display MDSS + +maintainers: + - Dmitry Baryshkov + +description: + SAR2310P MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like + DPU display controller, DSI and DP interfaces etc. + +$ref: /schemas/display/msm/mdss-common.yaml# + +properties: + compatible: + const: qcom,sar2130p-mdss + + clocks: + items: + - description: Display MDSS AHB + - description: Display AHB + - description: Display hf AXI + - description: Display core + + iommus: + maxItems: 1 + + interconnects: + items: + - description: Interconnect path from mdp0 port to the data bus + - description: Interconnect path from CPU to the reg bus + + interconnect-names: + items: + - const: mdp0-mem + - const: cpu-cfg + +patternProperties: + "^display-controller@[0-9a-f]+$": + type: object + additionalProperties: true + properties: + compatible: + const: qcom,sar2130p-dpu + + "^displayport-controller@[0-9a-f]+$": + type: object + additionalProperties: true + properties: + compatible: + contains: + const: qcom,sar2130p-dp + + "^dsi@[0-9a-f]+$": + type: object + additionalProperties: true + properties: + compatible: + contains: + const: qcom,sar2130p-dsi-ctrl + + "^phy@[0-9a-f]+$": + type: object + additionalProperties: true + properties: + compatible: + const: qcom,sar2130p-dsi-phy-5nm + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + display-subsystem@ae00000 { + compatible = "qcom,sar2130p-mdss"; + reg = <0x0ae00000 0x1000>; + reg-names = "mdss"; + + interconnects = <&mmss_noc_master_mdp &mc_virt_slave_ebi1>, + <&gem_noc_master_appss_proc &config_noc_slave_display_cfg>; + interconnect-names = "mdp0-mem", "cpu-cfg"; + + resets = <&dispcc_disp_cc_mdss_core_bcr>; + + power-domains = <&dispcc_mdss_gdsc>; + + clocks = <&dispcc_disp_cc_mdss_ahb_clk>, + <&gcc_gcc_disp_ahb_clk>, + <&gcc_gcc_disp_hf_axi_clk>, + <&dispcc_disp_cc_mdss_mdp_clk>; + clock-names = "iface", "bus", "nrt_bus", "core"; + + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + + iommus = <&apps_smmu 0x1c00 0x2>; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + display-controller@ae01000 { + compatible = "qcom,sar2130p-dpu"; + reg = <0x0ae01000 0x8f000>, + <0x0aeb0000 0x2008>; + reg-names = "mdp", "vbif"; + + clocks = <&gcc_gcc_disp_ahb_clk>, + <&gcc_gcc_disp_hf_axi_clk>, + <&dispcc_disp_cc_mdss_ahb_clk>, + <&dispcc_disp_cc_mdss_mdp_lut_clk>, + <&dispcc_disp_cc_mdss_mdp_clk>, + <&dispcc_disp_cc_mdss_vsync_clk>; + clock-names = "bus", + "nrt_bus", + "iface", + "lut", + "core", + "vsync"; + + assigned-clocks = <&dispcc_disp_cc_mdss_vsync_clk>; + assigned-clock-rates = <19200000>; + + operating-points-v2 = <&mdp_opp_table>; + power-domains = <&rpmhpd RPMHPD_MMCX>; + + interrupt-parent = <&mdss>; + interrupts = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dpu_intf0_out: endpoint { + remote-endpoint = <&mdss_dp0_in>; + }; + }; + + port@1 { + reg = <1>; + + dpu_intf1_out: endpoint { + remote-endpoint = <&mdss_dsi0_in>; + }; + }; + + port@2 { + reg = <2>; + + dpu_intf2_out: endpoint { + remote-endpoint = <&mdss_dsi1_in>; + }; + }; + }; + + mdp_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-325000000 { + opp-hz = /bits/ 64 <325000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-375000000 { + opp-hz = /bits/ 64 <375000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-514000000 { + opp-hz = /bits/ 64 <514000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + + displayport-controller@ae90000 { + compatible = "qcom,sar2130p-dp", + "qcom,sm8350-dp"; + reg = <0xae90000 0x200>, + <0xae90200 0x200>, + <0xae90400 0xc00>, + <0xae91000 0x400>, + <0xae91400 0x400>; + + interrupt-parent = <&mdss>; + interrupts = <12>; + clocks = <&dispcc_disp_cc_mdss_ahb_clk>, + <&dispcc_disp_cc_mdss_dptx0_aux_clk>, + <&dispcc_disp_cc_mdss_dptx0_link_clk>, + <&dispcc_disp_cc_mdss_dptx0_link_intf_clk>, + <&dispcc_disp_cc_mdss_dptx0_pixel0_clk>; + clock-names = "core_iface", + "core_aux", + "ctrl_link", + "ctrl_link_iface", + "stream_pixel"; + + assigned-clocks = <&dispcc_disp_cc_mdss_dptx0_link_clk_src>, + <&dispcc_disp_cc_mdss_dptx0_pixel0_clk_src>; + assigned-clock-parents = <&usb_dp_qmpphy_QMP_USB43DP_DP_LINK_CLK>, + <&usb_dp_qmpphy_QMP_USB43DP_DP_VCO_DIV_CLK>; + + phys = <&usb_dp_qmpphy QMP_USB43DP_DP_PHY>; + phy-names = "dp"; + + #sound-dai-cells = <0>; + + operating-points-v2 = <&dp_opp_table>; + power-domains = <&rpmhpd RPMHPD_MMCX>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mdss_dp0_in: endpoint { + remote-endpoint = <&dpu_intf0_out>; + }; + }; + + port@1 { + reg = <1>; + mdss_dp0_out: endpoint { + remote-endpoint = <&usb_dp_qmpphy_dp_in>; + }; + }; + }; + + dp_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-162000000 { + opp-hz = /bits/ 64 <162000000>; + required-opps = <&rpmhpd_opp_low_svs_d1>; + }; + + opp-270000000 { + opp-hz = /bits/ 64 <270000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-540000000 { + opp-hz = /bits/ 64 <540000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-810000000 { + opp-hz = /bits/ 64 <810000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + + dsi@ae94000 { + compatible = "qcom,sar2130p-dsi-ctrl", + "qcom,mdss-dsi-ctrl"; + reg = <0x0ae94000 0x400>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <4>; + + clocks = <&dispcc_disp_cc_mdss_byte0_clk>, + <&dispcc_disp_cc_mdss_byte0_intf_clk>, + <&dispcc_disp_cc_mdss_pclk0_clk>, + <&dispcc_disp_cc_mdss_esc0_clk>, + <&dispcc_disp_cc_mdss_ahb_clk>, + <&gcc_gcc_disp_hf_axi_clk>; + clock-names = "byte", + "byte_intf", + "pixel", + "core", + "iface", + "bus"; + + assigned-clocks = <&dispcc_disp_cc_mdss_byte0_clk_src>, + <&dispcc_disp_cc_mdss_pclk0_clk_src>; + assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; + + operating-points-v2 = <&dsi_opp_table>; + power-domains = <&rpmhpd RPMHPD_MMCX>; + + phys = <&mdss_dsi0_phy>; + phy-names = "dsi"; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + mdss_dsi0_in: endpoint { + remote-endpoint = <&dpu_intf1_out>; + }; + }; + + port@1 { + reg = <1>; + + mdss_dsi0_out: endpoint { + }; + }; + }; + + dsi_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-187500000 { + opp-hz = /bits/ 64 <187500000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-358000000 { + opp-hz = /bits/ 64 <358000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + }; + }; + + mdss_dsi0_phy: phy@ae94400 { + compatible = "qcom,sar2130p-dsi-phy-5nm"; + reg = <0x0ae95000 0x200>, + <0x0ae95200 0x280>, + <0x0ae95500 0x400>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&dispcc_disp_cc_mdss_ahb_clk>, + <&rpmhcc_rpmh_cxo_clk>; + clock-names = "iface", "ref"; + }; + + dsi@ae96000 { + compatible = "qcom,sar2130p-dsi-ctrl", + "qcom,mdss-dsi-ctrl"; + reg = <0x0ae96000 0x400>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <5>; + + clocks = <&dispcc_disp_cc_mdss_byte1_clk>, + <&dispcc_disp_cc_mdss_byte1_intf_clk>, + <&dispcc_disp_cc_mdss_pclk1_clk>, + <&dispcc_disp_cc_mdss_esc1_clk>, + <&dispcc_disp_cc_mdss_ahb_clk>, + <&gcc_gcc_disp_hf_axi_clk>; + clock-names = "byte", + "byte_intf", + "pixel", + "core", + "iface", + "bus"; + + assigned-clocks = <&dispcc_disp_cc_mdss_byte1_clk_src>, + <&dispcc_disp_cc_mdss_pclk1_clk_src>; + assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>; + + operating-points-v2 = <&dsi_opp_table>; + power-domains = <&rpmhpd RPMHPD_MMCX>; + + phys = <&mdss_dsi1_phy>; + phy-names = "dsi"; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + mdss_dsi1_in: endpoint { + remote-endpoint = <&dpu_intf2_out>; + }; + }; + + port@1 { + reg = <1>; + + mdss_dsi1_out: endpoint { + }; + }; + }; + }; + + mdss_dsi1_phy: phy@ae97000 { + compatible = "qcom,sar2130p-dsi-phy-5nm"; + reg = <0x0ae97000 0x200>, + <0x0ae97200 0x280>, + <0x0ae97500 0x400>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&dispcc_disp_cc_mdss_ahb_clk>, + <&rpmhcc_rpmh_cxo_clk>; + clock-names = "iface", "ref"; + }; + }; +... -- cgit v1.2.3 From 60b8d3a2365a30aadd514aaf571c6baecd9885ba Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Thu, 6 Mar 2025 19:11:14 +0100 Subject: dt-bindings: display: msm: sm8350-mdss: Describe the CPU-CFG icc path There's a separate path that allows register access from CPUSS. Describe it. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Patchwork: https://patchwork.freedesktop.org/patch/641464/ Link: https://lore.kernel.org/r/20250306-topic-dt_bindings_fixups-v1-2-0c84aceb0ef9@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml index 163fc83c1e80..3733d8cd2ae0 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml @@ -38,12 +38,16 @@ properties: maxItems: 1 interconnects: - maxItems: 2 + items: + - description: Interconnect path from the MDP0 port to the data bus + - description: Interconnect path from the MDP1 port to the data bus + - description: Interconnect path from the CPU to the reg bus interconnect-names: items: - const: mdp0-mem - const: mdp1-mem + - const: cpu-cfg patternProperties: "^display-controller@[0-9a-f]+$": -- cgit v1.2.3 From 850e13b65e3ce47c88aedae812352e55848a21c2 Mon Sep 17 00:00:00 2001 From: Ayushi Makhija Date: Thu, 24 Apr 2025 11:54:21 +0530 Subject: dt-bindings: display: msm-dsi-phy-7nm: document the SA8775P DSI PHY Document the DSI PHY on the SA8775P Platform. Signed-off-by: Ayushi Makhija Acked-by: Krzysztof Kozlowski Patchwork: https://patchwork.freedesktop.org/patch/649838/ Link: https://lore.kernel.org/r/20250424062431.2040692-2-quic_amakhija@quicinc.com Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml index f79be422b889..3c75ff42999a 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml @@ -17,6 +17,7 @@ properties: enum: - qcom,dsi-phy-7nm - qcom,dsi-phy-7nm-8150 + - qcom,sa8775p-dsi-phy-5nm - qcom,sar2130p-dsi-phy-5nm - qcom,sc7280-dsi-phy-7nm - qcom,sm6375-dsi-phy-7nm -- cgit v1.2.3 From 2a0195b94cbc0583c05cb4c9b1b57ba637a25180 Mon Sep 17 00:00:00 2001 From: Ayushi Makhija Date: Thu, 24 Apr 2025 11:54:22 +0530 Subject: dt-bindings: msm: dsi-controller-main: document the SA8775P DSI CTRL Document the DSI CTRL on the SA8775P Platform. Signed-off-by: Ayushi Makhija Reviewed-by: Krzysztof Kozlowski Patchwork: https://patchwork.freedesktop.org/patch/649855/ Link: https://lore.kernel.org/r/20250424062431.2040692-3-quic_amakhija@quicinc.com Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml index a3e05e34bf14..82fe95a6d959 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -23,6 +23,7 @@ properties: - qcom,msm8996-dsi-ctrl - qcom,msm8998-dsi-ctrl - qcom,qcm2290-dsi-ctrl + - qcom,sa8775p-dsi-ctrl - qcom,sar2130p-dsi-ctrl - qcom,sc7180-dsi-ctrl - qcom,sc7280-dsi-ctrl @@ -315,6 +316,7 @@ allOf: contains: enum: - qcom,msm8998-dsi-ctrl + - qcom,sa8775p-dsi-ctrl - qcom,sar2130p-dsi-ctrl - qcom,sc7180-dsi-ctrl - qcom,sc7280-dsi-ctrl -- cgit v1.2.3 From a6f2524f4d5e3cfcc17a6de646cb978007d7832f Mon Sep 17 00:00:00 2001 From: Ayushi Makhija Date: Thu, 24 Apr 2025 11:54:23 +0530 Subject: dt-bindings: display: msm: document DSI controller and phy on SA8775P Document DSI controller and phy on SA8775P platform. Signed-off-by: Ayushi Makhija Reviewed-by: Krzysztof Kozlowski Patchwork: https://patchwork.freedesktop.org/patch/649839/ Link: https://lore.kernel.org/r/20250424062431.2040692-4-quic_amakhija@quicinc.com Signed-off-by: Dmitry Baryshkov --- .../bindings/display/msm/qcom,sa8775p-mdss.yaml | 181 ++++++++++++++++++++- 1 file changed, 180 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml index 5fac3e266703..1053b3bc4908 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml @@ -52,12 +52,23 @@ patternProperties: items: - const: qcom,sa8775p-dp + "^dsi@[0-9a-f]+$": + type: object + additionalProperties: true + properties: + compatible: + contains: + const: qcom,sa8775p-dsi-ctrl + "^phy@[0-9a-f]+$": type: object additionalProperties: true properties: compatible: - const: qcom,sa8775p-edp-phy + contains: + enum: + - qcom,sa8775p-dsi-phy-5nm + - qcom,sa8775p-edp-phy required: - compatible @@ -139,6 +150,20 @@ examples: remote-endpoint = <&mdss0_dp0_in>; }; }; + + port@1 { + reg = <1>; + dpu_intf1_out: endpoint { + remote-endpoint = <&mdss0_dsi0_in>; + }; + }; + + port@2 { + reg = <2>; + dpu_intf2_out: endpoint { + remote-endpoint = <&mdss0_dsi1_in>; + }; + }; }; mdss0_mdp_opp_table: opp-table { @@ -186,6 +211,160 @@ examples: vdda-pll-supply = <&vreg_l4a>; }; + dsi@ae94000 { + compatible = "qcom,sa8775p-dsi-ctrl", "qcom,mdss-dsi-ctrl"; + reg = <0x0ae94000 0x400>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <4>; + + clocks = <&dispc_byte_clk>, + <&dispcc_intf_clk>, + <&dispcc_pclk>, + <&dispcc_esc_clk>, + <&dispcc_ahb_clk>, + <&gcc_bus_clk>; + clock-names = "byte", + "byte_intf", + "pixel", + "core", + "iface", + "bus"; + assigned-clocks = <&dispcc_byte_clk>, + <&dispcc_pclk>; + assigned-clock-parents = <&mdss0_dsi0_phy 0>, <&mdss0_dsi0_phy 1>; + phys = <&mdss0_dsi0_phy>; + + operating-points-v2 = <&dsi0_opp_table>; + power-domains = <&rpmhpd SA8775P_MMCX>; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mdss0_dsi0_in: endpoint { + remote-endpoint = <&dpu_intf1_out>; + }; + }; + + port@1 { + reg = <1>; + mdss0_dsi0_out: endpoint { }; + }; + }; + + dsi0_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-358000000 { + opp-hz = /bits/ 64 <358000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + }; + }; + + mdss0_dsi0_phy: phy@ae94400 { + compatible = "qcom,sa8775p-dsi-phy-5nm"; + reg = <0x0ae94400 0x200>, + <0x0ae94600 0x280>, + <0x0ae94900 0x27c>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&dispcc_iface_clk>, + <&rpmhcc_ref_clk>; + clock-names = "iface", "ref"; + + vdds-supply = <&vreg_dsi_supply>; + }; + + dsi@ae96000 { + compatible = "qcom,sa8775p-dsi-ctrl", "qcom,mdss-dsi-ctrl"; + reg = <0x0ae96000 0x400>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <4>; + + clocks = <&dispc_byte_clk>, + <&dispcc_intf_clk>, + <&dispcc_pclk>, + <&dispcc_esc_clk>, + <&dispcc_ahb_clk>, + <&gcc_bus_clk>; + clock-names = "byte", + "byte_intf", + "pixel", + "core", + "iface", + "bus"; + assigned-clocks = <&dispcc_byte_clk>, + <&dispcc_pclk>; + assigned-clock-parents = <&mdss0_dsi1_phy 0>, <&mdss0_dsi1_phy 1>; + phys = <&mdss0_dsi1_phy>; + + operating-points-v2 = <&dsi1_opp_table>; + power-domains = <&rpmhpd SA8775P_MMCX>; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mdss0_dsi1_in: endpoint { + remote-endpoint = <&dpu_intf2_out>; + }; + }; + + port@1 { + reg = <1>; + mdss0_dsi1_out: endpoint { }; + }; + }; + + dsi1_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-358000000 { + opp-hz = /bits/ 64 <358000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + }; + }; + + mdss0_dsi1_phy: phy@ae96400 { + compatible = "qcom,sa8775p-dsi-phy-5nm"; + reg = <0x0ae96400 0x200>, + <0x0ae96600 0x280>, + <0x0ae96900 0x27c>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&dispcc_iface_clk>, + <&rpmhcc_ref_clk>; + clock-names = "iface", "ref"; + + vdds-supply = <&vreg_dsi_supply>; + }; + displayport-controller@af54000 { compatible = "qcom,sa8775p-dp"; -- cgit v1.2.3 From 630cb33ccfcd04563598d0f0edd96c94ddf3352d Mon Sep 17 00:00:00 2001 From: Alexey Charkov Date: Wed, 30 Apr 2025 14:42:45 +0400 Subject: dt-bindings: net: via-rhine: Convert to YAML Rewrite the textual description for the VIA Rhine platform Ethernet controller as YAML schema, and switch the filename to follow the compatible string. These are used in several VIA/WonderMedia SoCs Signed-off-by: Alexey Charkov Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250430-rhine-binding-v2-1-4290156c0f57@gmail.com Signed-off-by: Jakub Kicinski --- .../devicetree/bindings/net/via,vt8500-rhine.yaml | 41 ++++++++++++++++++++++ .../devicetree/bindings/net/via-rhine.txt | 17 --------- 2 files changed, 41 insertions(+), 17 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/via,vt8500-rhine.yaml delete mode 100644 Documentation/devicetree/bindings/net/via-rhine.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/via,vt8500-rhine.yaml b/Documentation/devicetree/bindings/net/via,vt8500-rhine.yaml new file mode 100644 index 000000000000..e663d5a2f014 --- /dev/null +++ b/Documentation/devicetree/bindings/net/via,vt8500-rhine.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/via,vt8500-rhine.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: VIA Rhine 10/100 Network Controller + +description: + VIA's Ethernet controller integrated into VIA VT8500, + WonderMedia WM8950 and related SoCs + +maintainers: + - Alexey Charkov + +allOf: + - $ref: ethernet-controller.yaml# + +properties: + compatible: + const: via,vt8500-rhine + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + ethernet@d8004000 { + compatible = "via,vt8500-rhine"; + reg = <0xd8004000 0x100>; + interrupts = <10>; + }; diff --git a/Documentation/devicetree/bindings/net/via-rhine.txt b/Documentation/devicetree/bindings/net/via-rhine.txt deleted file mode 100644 index 334eca2bf937..000000000000 --- a/Documentation/devicetree/bindings/net/via-rhine.txt +++ /dev/null @@ -1,17 +0,0 @@ -* VIA Rhine 10/100 Network Controller - -Required properties: -- compatible : Should be "via,vt8500-rhine" for integrated - Rhine controllers found in VIA VT8500, WonderMedia WM8950 - and similar. These are listed as 1106:3106 rev. 0x84 on the - virtual PCI bus under vendor-provided kernels -- reg : Address and length of the io space -- interrupts : Should contain the controller interrupt line - -Examples: - -ethernet@d8004000 { - compatible = "via,vt8500-rhine"; - reg = <0xd8004000 0x100>; - interrupts = <10>; -}; -- cgit v1.2.3 From 3346f751dfc9af942255f708160e69f81a9445ec Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 1 May 2025 17:09:35 +0200 Subject: dt-bindings: arm: psci: change labels to lower-case in example DTS coding style expects labels to be lowercase, so adjust the example code. No functional impact. Acked-by: Conor Dooley Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250501150934.77317-3-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/psci.yaml | 30 ++++++++++++------------- 1 file changed, 15 insertions(+), 15 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml index cbb012e217ab..7360a2849b5b 100644 --- a/Documentation/devicetree/bindings/arm/psci.yaml +++ b/Documentation/devicetree/bindings/arm/psci.yaml @@ -191,27 +191,27 @@ examples: #size-cells = <0>; #address-cells = <1>; - CPU0: cpu@0 { + cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0>; enable-method = "psci"; - power-domains = <&CPU_PD0>; + power-domains = <&cpu_pd0>; power-domain-names = "psci"; }; - CPU1: cpu@1 { + cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x100>; enable-method = "psci"; - power-domains = <&CPU_PD1>; + power-domains = <&cpu_pd1>; power-domain-names = "psci"; }; idle-states { - CPU_PWRDN: cpu-power-down { + cpu_pwrdn: cpu-power-down { compatible = "arm,idle-state"; arm,psci-suspend-param = <0x0000001>; entry-latency-us = <10>; @@ -222,7 +222,7 @@ examples: domain-idle-states { - CLUSTER_RET: cluster-retention { + cluster_ret: cluster-retention { compatible = "domain-idle-state"; arm,psci-suspend-param = <0x1000011>; entry-latency-us = <500>; @@ -230,7 +230,7 @@ examples: min-residency-us = <2000>; }; - CLUSTER_PWRDN: cluster-power-down { + cluster_pwrdn: cluster-power-down { compatible = "domain-idle-state"; arm,psci-suspend-param = <0x1000031>; entry-latency-us = <2000>; @@ -244,21 +244,21 @@ examples: compatible = "arm,psci-1.0"; method = "smc"; - CPU_PD0: power-domain-cpu0 { + cpu_pd0: power-domain-cpu0 { #power-domain-cells = <0>; - domain-idle-states = <&CPU_PWRDN>; - power-domains = <&CLUSTER_PD>; + domain-idle-states = <&cpu_pwrdn>; + power-domains = <&cluster_pd>; }; - CPU_PD1: power-domain-cpu1 { + cpu_pd1: power-domain-cpu1 { #power-domain-cells = <0>; - domain-idle-states = <&CPU_PWRDN>; - power-domains = <&CLUSTER_PD>; + domain-idle-states = <&cpu_pwrdn>; + power-domains = <&cluster_pd>; }; - CLUSTER_PD: power-domain-cluster { + cluster_pd: power-domain-cluster { #power-domain-cells = <0>; - domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; + domain-idle-states = <&cluster_ret>, <&cluster_pwrdn>; }; }; ... -- cgit v1.2.3 From a60d965931a8957f175cab2a5f594053fbdd9a58 Mon Sep 17 00:00:00 2001 From: Daniel Grainger Date: Thu, 1 May 2025 15:19:53 +0200 Subject: hwmon: (asus-ec-sensors) add ROG MAXIMUS Z90 Formula. Board and chipset information is from LibreHardwareMonitor [1]. [1] https://github.com/LibreHardwareMonitor/LibreHardwareMonitor Signed-off-by: Daniel Grainger Signed-off-by: Eugene Shalygin Link: https://lore.kernel.org/r/20250501132009.726742-1-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/asus_ec_sensors.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/asus_ec_sensors.rst index d2be9db29614..3f5a2d1ffe65 100644 --- a/Documentation/hwmon/asus_ec_sensors.rst +++ b/Documentation/hwmon/asus_ec_sensors.rst @@ -20,6 +20,7 @@ Supported boards: * ROG CROSSHAIR X670E GENE * ROG MAXIMUS XI HERO * ROG MAXIMUS XI HERO (WI-FI) + * ROG MAXIMUS Z690 FORMULA * ROG STRIX B550-E GAMING * ROG STRIX B550-I GAMING * ROG STRIX X570-E GAMING -- cgit v1.2.3 From 03c9d1a5a30d93bff31b4eb0a52f030b4c7f73ea Mon Sep 17 00:00:00 2001 From: Haren Myneni Date: Tue, 29 Apr 2025 19:28:47 -0700 Subject: Documentation: Fix description format for powerpc RTAS ioctls Fix the description format for the following build warnings: "Documentation/userspace-api/ioctl/ioctl-number.rst:369: ERROR: Malformed table. Text in column margin in table line 301. 0xB2 03-05 arch/powerpc/include/uapi/asm/papr-indices.h powerpc/pseries indices API 0xB2 06-07 arch/powerpc/include/uapi/asm/papr-platform-dump.h powerpc/pseries Platform Dump API 0xB2 08 arch/powerpc/include/uapi/asm/papr-physical-attestation.h powerpc/pseries Physical Attestation API " Reported-by: Stephen Rothwell Signed-off-by: Haren Myneni Fixes: 43d869ac25f1 ("powerpc/pseries: Define papr_indices_io_block for papr-indices ioctls") Fixes: 8aa9efc0be66 ("powerpc/pseries: Add papr-platform-dump character driver for dump retrieval") Fixes: 86900ab620a4 ("powerpc/pseries: Add a char driver for physical-attestation RTAS") Tested-by: Venkat Rao Bagalkote Reviewed-by: Bagas Sanjaya Closes: https://lore.kernel.org/linux-next/20250429181707.7848912b@canb.auug.org.au/ Signed-off-by: Madhavan Srinivasan Link: https://patch.msgid.link/20250430022847.1118093-1-haren@linux.ibm.com --- Documentation/userspace-api/ioctl/ioctl-number.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/userspace-api/ioctl/ioctl-number.rst b/Documentation/userspace-api/ioctl/ioctl-number.rst index 017a23aeadc3..fee5c4731501 100644 --- a/Documentation/userspace-api/ioctl/ioctl-number.rst +++ b/Documentation/userspace-api/ioctl/ioctl-number.rst @@ -366,11 +366,11 @@ Code Seq# Include File Comments 0xB2 01-02 arch/powerpc/include/uapi/asm/papr-sysparm.h powerpc/pseries system parameter API -0xB2 03-05 arch/powerpc/include/uapi/asm/papr-indices.h powerpc/pseries indices API +0xB2 03-05 arch/powerpc/include/uapi/asm/papr-indices.h powerpc/pseries indices API -0xB2 06-07 arch/powerpc/include/uapi/asm/papr-platform-dump.h powerpc/pseries Platform Dump API +0xB2 06-07 arch/powerpc/include/uapi/asm/papr-platform-dump.h powerpc/pseries Platform Dump API -0xB2 08 arch/powerpc/include/uapi/asm/papr-physical-attestation.h powerpc/pseries Physical Attestation API +0xB2 08 powerpc/include/uapi/asm/papr-physical-attestation.h powerpc/pseries Physical Attestation API 0xB3 00 linux/mmc/ioctl.h 0xB4 00-0F linux/gpio.h -- cgit v1.2.3 From f0a0a2388f443e949894f68ca49ccc9618512316 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 17 Apr 2025 16:59:01 +0200 Subject: dt-bindings: media: qcom,sm8550-iris: document SM8650 IRIS accelerator Document the IRIS video decoder and encoder accelerator found in the SM8650 platform, it requires 2 more reset lines in addition to the properties required for the SM8550 platform. Reviewed-by: Rob Herring (Arm) Reviewed-by: Vikash Garodia Reviewed-by: Bryan O'Donoghue Tested-by: Bryan O'Donoghue # x1e Dell Signed-off-by: Neil Armstrong Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../bindings/media/qcom,sm8550-iris.yaml | 33 ++++++++++++++++++---- 1 file changed, 28 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml index 6a89e9e38087..f567f84bd60d 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml @@ -14,9 +14,6 @@ description: The iris video processing unit is a video encode and decode accelerator present on Qualcomm platforms. -allOf: - - $ref: qcom,venus-common.yaml# - properties: compatible: oneOf: @@ -24,7 +21,9 @@ properties: - enum: - qcom,sa8775p-iris - const: qcom,sm8550-iris - - const: qcom,sm8550-iris + - enum: + - qcom,sm8550-iris + - qcom,sm8650-iris power-domains: maxItems: 4 @@ -54,11 +53,15 @@ properties: - const: video-mem resets: - maxItems: 1 + minItems: 1 + maxItems: 3 reset-names: + minItems: 1 items: - const: bus + - const: xo + - const: core iommus: maxItems: 2 @@ -80,6 +83,26 @@ required: - iommus - dma-coherent +allOf: + - $ref: qcom,venus-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sm8650-iris + then: + properties: + resets: + minItems: 3 + reset-names: + minItems: 3 + else: + properties: + resets: + maxItems: 1 + reset-names: + maxItems: 1 + unevaluatedProperties: false examples: -- cgit v1.2.3 From 6aa5f5887df3b2eaca45ad263acb301540e52802 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Thu, 24 Apr 2025 14:20:45 +0530 Subject: dt-bindings: media: qcom,sm8550-iris: document QCS8300 IRIS accelerator Document the IRIS video decoder/encoder accelerator found in the QCS8300 platform. It belongs to same iris v3 family as that of SM8550 but is a downscaled version of SM8550. It has 2 frame processing hardware blocks while SM8550 has 4. Thereby QCS8300 have fewer capabilities than those of SM8550. Reviewed-by: Bryan O'Donoghue Signed-off-by: Vikash Garodia Acked-by: Krzysztof Kozlowski Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml index f567f84bd60d..c79bf2101812 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml @@ -22,6 +22,7 @@ properties: - qcom,sa8775p-iris - const: qcom,sm8550-iris - enum: + - qcom,qcs8300-iris - qcom,sm8550-iris - qcom,sm8650-iris -- cgit v1.2.3 From 63fd40f67283ce7b3ef7414d73ab1cf78fd9c89c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Niklas=20S=C3=B6derlund?= Date: Wed, 23 Apr 2025 18:31:07 +0200 Subject: dt-bindings: media: renesas,isp: Add ISP core function block MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some R-Car ISP instances have in addition to the channel selector (CS) an ISP core (CORE) to perform operations on an image stream. The core function is mapped to a different memory region and has a separate interrupt than CS, extend the bindings to allow describing this. On the same SoC different instances of the ISP IP may have, or not have, the CORE functionality. The CS function on all instances on the SoC are the same and the documentation describes the full ISP (CS + CORE) as a single IP block. Where instances not having the CORE function simply lack the functionality to modify the image data. There are dependencies on the CS functionality while operating the CORE functionality. In order for the ISP core to function in memory-to-memory mode it needs to be feed input data from a Streaming Bridge interface. This interface is provided thru the VSP-X device. Add an optional new property "renesas,vspx" to provide a phandle to describe this relationship. While adding mandatory reg-names and interrupt-names breaks existing bindings the driver itself remains backward compatible and provides CS functionality if a single unnamed reg and interrupt property is present. Furthermore all existing users of the bindings are updated in following work to add these new mandatory properties. Signed-off-by: Niklas Söderlund Reviewed-by: Laurent Pinchart Reviewed-by: Geert Uytterhoeven Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250423163113.2961049-2-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- .../devicetree/bindings/media/renesas,isp.yaml | 63 +++++++++++++++++++--- 1 file changed, 55 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/renesas,isp.yaml b/Documentation/devicetree/bindings/media/renesas,isp.yaml index c4de4555b753..d25e020f5e5e 100644 --- a/Documentation/devicetree/bindings/media/renesas,isp.yaml +++ b/Documentation/devicetree/bindings/media/renesas,isp.yaml @@ -25,19 +25,55 @@ properties: - renesas,r8a779h0-isp # V4M - const: renesas,rcar-gen4-isp # Generic R-Car Gen4 reg: - maxItems: 1 + minItems: 1 + maxItems: 2 + + reg-names: + minItems: 1 + items: + - const: cs + - const: core interrupts: - maxItems: 1 + minItems: 1 + maxItems: 2 + + interrupt-names: + minItems: 1 + items: + - const: cs + - const: core clocks: - maxItems: 1 + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + items: + - const: cs + - const: core power-domains: maxItems: 1 resets: - maxItems: 1 + minItems: 1 + maxItems: 2 + + reset-names: + minItems: 1 + items: + - const: cs + - const: core + + renesas,vspx: + $ref: /schemas/types.yaml#/definitions/phandle + description: + A phandle to the companion VSPX responsible for the Streaming Bridge + functionality. The Streaming Bridge is responsible for feeding image + and configuration data to the ISP when operating in memory-to-memory + mode. ports: $ref: /schemas/graph.yaml#/properties/ports @@ -103,10 +139,14 @@ properties: required: - compatible - reg + - reg-names - interrupts + - interrupt-names - clocks + - clock-names - power-domains - resets + - reset-names - ports additionalProperties: false @@ -119,11 +159,18 @@ examples: isp1: isp@fed20000 { compatible = "renesas,r8a779a0-isp", "renesas,rcar-gen4-isp"; - reg = <0xfed20000 0x10000>; - interrupts = ; - clocks = <&cpg CPG_MOD 613>; + reg = <0xfed20000 0x10000>, <0xfee00000 0x100000>; + reg-names = "cs", "core"; + interrupts = , + ; + interrupt-names = "cs", "core"; + clocks = <&cpg CPG_MOD 613>, <&cpg CPG_MOD 17>; + clock-names = "cs", "core"; power-domains = <&sysc R8A779A0_PD_A3ISP01>; - resets = <&cpg 613>; + resets = <&cpg 613>, <&cpg 17>; + reset-names = "cs", "core"; + + renesas,vspx = <&vspx1>; ports { #address-cells = <1>; -- cgit v1.2.3 From cd156f8741e362f3e0b0282c4abc3d0d0fecda57 Mon Sep 17 00:00:00 2001 From: Francesco Dolcini Date: Wed, 30 Apr 2025 12:28:10 +0200 Subject: dt-bindings: arm: ti: Add Toradex Verdin AM62P Add toradex,verdin-am62p for Toradex Verdin AM62 SoM, its nonwifi and wifi variants, and the Toradex carrier board they may be mated in. Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p Signed-off-by: Francesco Dolcini Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250430102815.149162-2-francesco@dolcini.it Signed-off-by: Nishanth Menon --- Documentation/devicetree/bindings/arm/ti/k3.yaml | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index a6d9fd0bcaba..bf6003d8fb76 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -76,6 +76,30 @@ properties: - const: toradex,verdin-am62 # Verdin AM62 Module - const: ti,am625 + - description: K3 AM62P5 SoC Toradex Verdin Modules and Carrier Boards + items: + - enum: + - toradex,verdin-am62p-nonwifi-dahlia # Verdin AM62P Module on Dahlia + - toradex,verdin-am62p-nonwifi-dev # Verdin AM62P Module on Verdin Development Board + - toradex,verdin-am62p-nonwifi-ivy # Verdin AM62P Module on Ivy + - toradex,verdin-am62p-nonwifi-mallow # Verdin AM62P Module on Mallow + - toradex,verdin-am62p-nonwifi-yavia # Verdin AM62P Module on Yavia + - const: toradex,verdin-am62p-nonwifi # Verdin AM62P Module without Wi-Fi / BT + - const: toradex,verdin-am62p # Verdin AM62P Module + - const: ti,am62p5 + + - description: K3 AM62P5 SoC Toradex Verdin Modules and Carrier Boards with Wi-Fi / BT + items: + - enum: + - toradex,verdin-am62p-wifi-dahlia # Verdin AM62P Wi-Fi / BT Module on Dahlia + - toradex,verdin-am62p-wifi-dev # Verdin AM62P Wi-Fi / BT M. on Verdin Development B. + - toradex,verdin-am62p-wifi-ivy # Verdin AM62P Wi-Fi / BT Module on Ivy + - toradex,verdin-am62p-wifi-mallow # Verdin AM62P Wi-Fi / BT Module on Mallow + - toradex,verdin-am62p-wifi-yavia # Verdin AM62P Wi-Fi / BT Module on Yavia + - const: toradex,verdin-am62p-wifi # Verdin AM62P Wi-Fi / BT Module + - const: toradex,verdin-am62p # Verdin AM62P Module + - const: ti,am62p5 + - description: K3 AM642 SoC items: - enum: -- cgit v1.2.3 From 8b872a912aa10327a88fdea46cc7b30cae0c9ed4 Mon Sep 17 00:00:00 2001 From: Dimitri Fedrau Date: Mon, 7 Apr 2025 13:21:51 +0200 Subject: dt-bindings: pwm: add support for MC33XS2410 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Adding documentation for NXPs MC33XS2410 high side switch. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Dimitri Fedrau Link: https://lore.kernel.org/r/20250407-mc33xs2410-v9-1-57adcb56a6e4@liebherr.com Signed-off-by: Uwe Kleine-König --- .../devicetree/bindings/pwm/nxp,mc33xs2410.yaml | 118 +++++++++++++++++++++ 1 file changed, 118 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/nxp,mc33xs2410.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pwm/nxp,mc33xs2410.yaml b/Documentation/devicetree/bindings/pwm/nxp,mc33xs2410.yaml new file mode 100644 index 000000000000..1729fe5c3dfb --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/nxp,mc33xs2410.yaml @@ -0,0 +1,118 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/nxp,mc33xs2410.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: High-side switch MC33XS2410 + +maintainers: + - Dimitri Fedrau + +allOf: + - $ref: pwm.yaml# + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + const: nxp,mc33xs2410 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 10000000 + + spi-cpha: true + + spi-cs-setup-delay-ns: + minimum: 100 + default: 100 + + spi-cs-hold-delay-ns: + minimum: 10 + default: 10 + + spi-cs-inactive-delay-ns: + minimum: 300 + default: 300 + + reset-gpios: + description: + GPIO connected to the active low reset pin. + maxItems: 1 + + "#pwm-cells": + const: 3 + + pwm-names: + items: + - const: di0 + - const: di1 + - const: di2 + - const: di3 + + pwms: + description: + Direct inputs(di0-3) are used to directly turn-on or turn-off the + outputs. + maxItems: 4 + + interrupts: + maxItems: 1 + + clocks: + description: + The external clock can be used if the internal clock doesn't meet + timing requirements over temperature and voltage operating range. + maxItems: 1 + + vdd-supply: + description: + Logic supply voltage + + vspi-supply: + description: + Supply voltage for SPI + + vpwr-supply: + description: + Power switch supply + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + #include + spi { + #address-cells = <1>; + #size-cells = <0>; + + pwm@0 { + compatible = "nxp,mc33xs2410"; + reg = <0x0>; + spi-max-frequency = <4000000>; + spi-cpha; + spi-cs-setup-delay-ns = <100>; + spi-cs-hold-delay-ns = <10>; + spi-cs-inactive-delay-ns = <300>; + reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; + #pwm-cells = <3>; + pwm-names = "di0", "di1", "di2", "di3"; + pwms = <&pwm0 0 1000000>, + <&pwm1 0 1000000>, + <&pwm2 0 1000000>, + <&pwm3 0 1000000>; + interrupt-parent = <&gpio0>; + interrupts = <31 IRQ_TYPE_LEVEL_LOW>; + clocks = <&clk_ext_fixed>; + vdd-supply = <®_3v3>; + vspi-supply = <®_3v3>; + vpwr-supply = <®_24v0>; + }; + }; -- cgit v1.2.3 From 02f27ea7fa02c015cc831fa0f14bf3d58a516a6f Mon Sep 17 00:00:00 2001 From: Yixun Lan Date: Wed, 30 Apr 2025 13:32:03 +0800 Subject: dt-bindings: sram: sunxi-sram: Add A523 compatible The Allwinner A523 family of SoCs have their "system control" registers compatible to the A64 SoC, so add the new SoC specific compatible string. Reviewed-by: Andre Przywara Signed-off-by: Yixun Lan Acked-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250430-01-sun55i-emac0-v3-1-6fc000bbccbd@gentoo.org Signed-off-by: Chen-Yu Tsai --- .../devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml index a7236f7db4ec..e7f7cf72719e 100644 --- a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml +++ b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml @@ -50,6 +50,7 @@ properties: - enum: - allwinner,sun50i-a100-system-control - allwinner,sun50i-h6-system-control + - allwinner,sun55i-a523-system-control - const: allwinner,sun50i-a64-system-control reg: -- cgit v1.2.3 From 4804f5ad5d63cf7ddad148132a3ecea11410dfa9 Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Fri, 2 May 2025 09:33:57 +0700 Subject: x86/cpu: Add "Old Microcode" docs to hw-vuln toctree Sphinx reports missing toctree entry warning: Documentation/admin-guide/hw-vuln/old_microcode.rst: WARNING: document isn't included in any toctree Add entry for "Old Microcode" docs to fix the warning. Fixes: 4e2c719782a847 ("x86/cpu: Help users notice when running old Intel microcode") Signed-off-by: Bagas Sanjaya Signed-off-by: Dave Hansen Link: https://lore.kernel.org/all/20250502023358.14846-1-bagasdotme%40gmail.com --- Documentation/admin-guide/hw-vuln/index.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/hw-vuln/index.rst b/Documentation/admin-guide/hw-vuln/index.rst index 451874b8135d..cf1511145927 100644 --- a/Documentation/admin-guide/hw-vuln/index.rst +++ b/Documentation/admin-guide/hw-vuln/index.rst @@ -23,3 +23,4 @@ are configurable at compile, boot or run time. gather_data_sampling reg-file-data-sampling rsb + old_microcode -- cgit v1.2.3 From 71ded61bee2af97a218f9dfa0f4019cc4cd3b029 Mon Sep 17 00:00:00 2001 From: Dan Williams Date: Mon, 3 Mar 2025 23:14:20 -0800 Subject: configfs-tsm: Namespace TSM report symbols In preparation for new + common TSM (TEE Security Manager) infrastructure, namespace the TSM report symbols in tsm.h with an _REPORT suffix to differentiate them from other incoming tsm work. Cc: Yilun Xu Cc: Samuel Ortiz Cc: Tom Lendacky Cc: Sami Mujawar Cc: Steven Price Reviewed-by: Alexey Kardashevskiy Reviewed-by: Suzuki K Poulose Reviewed-by: Kai Huang Reviewed-by: Kuppuswamy Sathyanarayanan Reviewed-by: Steven Price Link: https://patch.msgid.link/174107246021.1288555.7203769833791489618.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Dan Williams --- Documentation/ABI/testing/configfs-tsm | 145 -------------------------- Documentation/ABI/testing/configfs-tsm-report | 145 ++++++++++++++++++++++++++ 2 files changed, 145 insertions(+), 145 deletions(-) delete mode 100644 Documentation/ABI/testing/configfs-tsm create mode 100644 Documentation/ABI/testing/configfs-tsm-report (limited to 'Documentation') diff --git a/Documentation/ABI/testing/configfs-tsm b/Documentation/ABI/testing/configfs-tsm deleted file mode 100644 index 534408bc1408..000000000000 --- a/Documentation/ABI/testing/configfs-tsm +++ /dev/null @@ -1,145 +0,0 @@ -What: /sys/kernel/config/tsm/report/$name/inblob -Date: September, 2023 -KernelVersion: v6.7 -Contact: linux-coco@lists.linux.dev -Description: - (WO) Up to 64 bytes of user specified binary data. For replay - protection this should include a nonce, but the kernel does not - place any restrictions on the content. - -What: /sys/kernel/config/tsm/report/$name/outblob -Date: September, 2023 -KernelVersion: v6.7 -Contact: linux-coco@lists.linux.dev -Description: - (RO) Binary attestation report generated from @inblob and other - options The format of the report is implementation specific - where the implementation is conveyed via the @provider - attribute. - -What: /sys/kernel/config/tsm/report/$name/auxblob -Date: October, 2023 -KernelVersion: v6.7 -Contact: linux-coco@lists.linux.dev -Description: - (RO) Optional supplemental data that a TSM may emit, visibility - of this attribute depends on TSM, and may be empty if no - auxiliary data is available. - - When @provider is "sev_guest" this file contains the - "cert_table" from SEV-ES Guest-Hypervisor Communication Block - Standardization v2.03 Section 4.1.8.1 MSG_REPORT_REQ. - https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/specifications/56421.pdf - -What: /sys/kernel/config/tsm/report/$name/manifestblob -Date: January, 2024 -KernelVersion: v6.10 -Contact: linux-coco@lists.linux.dev -Description: - (RO) Optional supplemental data that a TSM may emit, visibility - of this attribute depends on TSM, and may be empty if no - manifest data is available. - - See 'service_provider' for information on the format of the - manifest blob. - -What: /sys/kernel/config/tsm/report/$name/provider -Date: September, 2023 -KernelVersion: v6.7 -Contact: linux-coco@lists.linux.dev -Description: - (RO) A name for the format-specification of @outblob like - "sev_guest" [1] or "tdx_guest" [2] in the near term, or a - common standard format in the future. - - [1]: SEV Secure Nested Paging Firmware ABI Specification - Revision 1.55 Table 22 - https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/specifications/56860.pdf - - [2]: Intel® Trust Domain Extensions Data Center Attestation - Primitives : Quote Generation Library and Quote Verification - Library Revision 0.8 Appendix 4,5 - https://download.01.org/intel-sgx/latest/dcap-latest/linux/docs/Intel_TDX_DCAP_Quoting_Library_API.pdf - -What: /sys/kernel/config/tsm/report/$name/generation -Date: September, 2023 -KernelVersion: v6.7 -Contact: linux-coco@lists.linux.dev -Description: - (RO) The value in this attribute increments each time @inblob or - any option is written. Userspace can detect conflicts by - checking generation before writing to any attribute and making - sure the number of writes matches expectations after reading - @outblob, or it can prevent conflicts by creating a report - instance per requesting context. - -What: /sys/kernel/config/tsm/report/$name/privlevel -Date: September, 2023 -KernelVersion: v6.7 -Contact: linux-coco@lists.linux.dev -Description: - (WO) Attribute is visible if a TSM implementation provider - supports the concept of attestation reports for TVMs running at - different privilege levels, like SEV-SNP "VMPL", specify the - privilege level via this attribute. The minimum acceptable - value is conveyed via @privlevel_floor and the maximum - acceptable value is TSM_PRIVLEVEL_MAX (3). - -What: /sys/kernel/config/tsm/report/$name/privlevel_floor -Date: September, 2023 -KernelVersion: v6.7 -Contact: linux-coco@lists.linux.dev -Description: - (RO) Indicates the minimum permissible value that can be written - to @privlevel. - -What: /sys/kernel/config/tsm/report/$name/service_provider -Date: January, 2024 -KernelVersion: v6.10 -Contact: linux-coco@lists.linux.dev -Description: - (WO) Attribute is visible if a TSM implementation provider - supports the concept of attestation reports from a service - provider for TVMs, like SEV-SNP running under an SVSM. - Specifying the service provider via this attribute will create - an attestation report as specified by the service provider. - The only currently supported service provider is "svsm". - - For the "svsm" service provider, see the Secure VM Service Module - for SEV-SNP Guests v1.00 Section 7. For the doc, search for - "site:amd.com "Secure VM Service Module for SEV-SNP - Guests", docID: 58019" - -What: /sys/kernel/config/tsm/report/$name/service_guid -Date: January, 2024 -KernelVersion: v6.10 -Contact: linux-coco@lists.linux.dev -Description: - (WO) Attribute is visible if a TSM implementation provider - supports the concept of attestation reports from a service - provider for TVMs, like SEV-SNP running under an SVSM. - Specifying an empty/null GUID (00000000-0000-0000-0000-000000) - requests all active services within the service provider be - part of the attestation report. Specifying a GUID request - an attestation report of just the specified service using the - manifest form specified by the service_manifest_version - attribute. - - See 'service_provider' for information on the format of the - service guid. - -What: /sys/kernel/config/tsm/report/$name/service_manifest_version -Date: January, 2024 -KernelVersion: v6.10 -Contact: linux-coco@lists.linux.dev -Description: - (WO) Attribute is visible if a TSM implementation provider - supports the concept of attestation reports from a service - provider for TVMs, like SEV-SNP running under an SVSM. - Indicates the service manifest version requested for the - attestation report (default 0). If this field is not set by - the user, the default manifest version of the service (the - service's initial/first manifest version) is returned. - - See 'service_provider' for information on the format of the - service manifest version. diff --git a/Documentation/ABI/testing/configfs-tsm-report b/Documentation/ABI/testing/configfs-tsm-report new file mode 100644 index 000000000000..534408bc1408 --- /dev/null +++ b/Documentation/ABI/testing/configfs-tsm-report @@ -0,0 +1,145 @@ +What: /sys/kernel/config/tsm/report/$name/inblob +Date: September, 2023 +KernelVersion: v6.7 +Contact: linux-coco@lists.linux.dev +Description: + (WO) Up to 64 bytes of user specified binary data. For replay + protection this should include a nonce, but the kernel does not + place any restrictions on the content. + +What: /sys/kernel/config/tsm/report/$name/outblob +Date: September, 2023 +KernelVersion: v6.7 +Contact: linux-coco@lists.linux.dev +Description: + (RO) Binary attestation report generated from @inblob and other + options The format of the report is implementation specific + where the implementation is conveyed via the @provider + attribute. + +What: /sys/kernel/config/tsm/report/$name/auxblob +Date: October, 2023 +KernelVersion: v6.7 +Contact: linux-coco@lists.linux.dev +Description: + (RO) Optional supplemental data that a TSM may emit, visibility + of this attribute depends on TSM, and may be empty if no + auxiliary data is available. + + When @provider is "sev_guest" this file contains the + "cert_table" from SEV-ES Guest-Hypervisor Communication Block + Standardization v2.03 Section 4.1.8.1 MSG_REPORT_REQ. + https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/specifications/56421.pdf + +What: /sys/kernel/config/tsm/report/$name/manifestblob +Date: January, 2024 +KernelVersion: v6.10 +Contact: linux-coco@lists.linux.dev +Description: + (RO) Optional supplemental data that a TSM may emit, visibility + of this attribute depends on TSM, and may be empty if no + manifest data is available. + + See 'service_provider' for information on the format of the + manifest blob. + +What: /sys/kernel/config/tsm/report/$name/provider +Date: September, 2023 +KernelVersion: v6.7 +Contact: linux-coco@lists.linux.dev +Description: + (RO) A name for the format-specification of @outblob like + "sev_guest" [1] or "tdx_guest" [2] in the near term, or a + common standard format in the future. + + [1]: SEV Secure Nested Paging Firmware ABI Specification + Revision 1.55 Table 22 + https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/specifications/56860.pdf + + [2]: Intel® Trust Domain Extensions Data Center Attestation + Primitives : Quote Generation Library and Quote Verification + Library Revision 0.8 Appendix 4,5 + https://download.01.org/intel-sgx/latest/dcap-latest/linux/docs/Intel_TDX_DCAP_Quoting_Library_API.pdf + +What: /sys/kernel/config/tsm/report/$name/generation +Date: September, 2023 +KernelVersion: v6.7 +Contact: linux-coco@lists.linux.dev +Description: + (RO) The value in this attribute increments each time @inblob or + any option is written. Userspace can detect conflicts by + checking generation before writing to any attribute and making + sure the number of writes matches expectations after reading + @outblob, or it can prevent conflicts by creating a report + instance per requesting context. + +What: /sys/kernel/config/tsm/report/$name/privlevel +Date: September, 2023 +KernelVersion: v6.7 +Contact: linux-coco@lists.linux.dev +Description: + (WO) Attribute is visible if a TSM implementation provider + supports the concept of attestation reports for TVMs running at + different privilege levels, like SEV-SNP "VMPL", specify the + privilege level via this attribute. The minimum acceptable + value is conveyed via @privlevel_floor and the maximum + acceptable value is TSM_PRIVLEVEL_MAX (3). + +What: /sys/kernel/config/tsm/report/$name/privlevel_floor +Date: September, 2023 +KernelVersion: v6.7 +Contact: linux-coco@lists.linux.dev +Description: + (RO) Indicates the minimum permissible value that can be written + to @privlevel. + +What: /sys/kernel/config/tsm/report/$name/service_provider +Date: January, 2024 +KernelVersion: v6.10 +Contact: linux-coco@lists.linux.dev +Description: + (WO) Attribute is visible if a TSM implementation provider + supports the concept of attestation reports from a service + provider for TVMs, like SEV-SNP running under an SVSM. + Specifying the service provider via this attribute will create + an attestation report as specified by the service provider. + The only currently supported service provider is "svsm". + + For the "svsm" service provider, see the Secure VM Service Module + for SEV-SNP Guests v1.00 Section 7. For the doc, search for + "site:amd.com "Secure VM Service Module for SEV-SNP + Guests", docID: 58019" + +What: /sys/kernel/config/tsm/report/$name/service_guid +Date: January, 2024 +KernelVersion: v6.10 +Contact: linux-coco@lists.linux.dev +Description: + (WO) Attribute is visible if a TSM implementation provider + supports the concept of attestation reports from a service + provider for TVMs, like SEV-SNP running under an SVSM. + Specifying an empty/null GUID (00000000-0000-0000-0000-000000) + requests all active services within the service provider be + part of the attestation report. Specifying a GUID request + an attestation report of just the specified service using the + manifest form specified by the service_manifest_version + attribute. + + See 'service_provider' for information on the format of the + service guid. + +What: /sys/kernel/config/tsm/report/$name/service_manifest_version +Date: January, 2024 +KernelVersion: v6.10 +Contact: linux-coco@lists.linux.dev +Description: + (WO) Attribute is visible if a TSM implementation provider + supports the concept of attestation reports from a service + provider for TVMs, like SEV-SNP running under an SVSM. + Indicates the service manifest version requested for the + attestation report (default 0). If this field is not set by + the user, the default manifest version of the service (the + service's initial/first manifest version) is returned. + + See 'service_provider' for information on the format of the + service manifest version. -- cgit v1.2.3 From bf0636f4348e098e2338eebbe42d7780c58a1195 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 30 Apr 2025 10:28:49 +0200 Subject: dt-bindings: display: ltk050h3146w: add port property The panel can be connected to via graph nodes, so allow the port property. This fixes dtc checker warnings like: >> arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou-haikou-video-demo.dtb: panel@0 (leadtek,ltk050h3148w): 'port' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/display/panel/leadtek,ltk050h3146w.yaml# arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou-haikou-video-demo.dtb: /edp@fdec0000: failed to match any schema with compatible: ['rockchip,rk3588-edp'] Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202504300218.VDqQqGTT-lkp@intel.com/ Signed-off-by: Heiko Stuebner Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250430082850.244199-2-heiko@sntech.de Signed-off-by: Dmitry Baryshkov --- .../devicetree/bindings/display/panel/leadtek,ltk050h3146w.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/leadtek,ltk050h3146w.yaml b/Documentation/devicetree/bindings/display/panel/leadtek,ltk050h3146w.yaml index e2a2dd4ef5fa..5fcea62fd58f 100644 --- a/Documentation/devicetree/bindings/display/panel/leadtek,ltk050h3146w.yaml +++ b/Documentation/devicetree/bindings/display/panel/leadtek,ltk050h3146w.yaml @@ -23,6 +23,7 @@ properties: maxItems: 1 backlight: true + port: true reset-gpios: true iovcc-supply: description: regulator that supplies the iovcc voltage -- cgit v1.2.3 From e782ac936941cff4c5580bb5cc2ec0e91468068c Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 30 Apr 2025 10:28:50 +0200 Subject: dt-bindings: display: ltk500hd1829: add port property The panel can be connected to via graph nodes, so allow the port property. Signed-off-by: Heiko Stuebner Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250430082850.244199-3-heiko@sntech.de Signed-off-by: Dmitry Baryshkov --- .../devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml b/Documentation/devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml index af9e0ea0e72f..b0e2c82232d3 100644 --- a/Documentation/devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml +++ b/Documentation/devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml @@ -22,6 +22,7 @@ properties: maxItems: 1 backlight: true + port: true reset-gpios: true iovcc-supply: description: regulator that supplies the iovcc voltage -- cgit v1.2.3 From ab1456c5aa7a63d5145547fc644bd4580dd253f2 Mon Sep 17 00:00:00 2001 From: Athira Rajeev Date: Sun, 20 Apr 2025 23:38:44 +0530 Subject: powerpc/pseries/htmdump: Add documentation for H_HTM debugfs interface Documentation for HTM (Hardware Trace Macro) debugfs interface and how it can be used to configure/control the HTM operations. Signed-off-by: Athira Rajeev Tested-by: Venkat Rao Bagalkote Signed-off-by: Madhavan Srinivasan Link: https://patch.msgid.link/20250420180844.53128-10-atrajeev@linux.ibm.com --- Documentation/arch/powerpc/htm.rst | 104 +++++++++++++++++++++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 Documentation/arch/powerpc/htm.rst (limited to 'Documentation') diff --git a/Documentation/arch/powerpc/htm.rst b/Documentation/arch/powerpc/htm.rst new file mode 100644 index 000000000000..fcb4eb6306b1 --- /dev/null +++ b/Documentation/arch/powerpc/htm.rst @@ -0,0 +1,104 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. _htm: + +=================================== +HTM (Hardware Trace Macro) +=================================== + +Athira Rajeev, 2 Mar 2025 + +.. contents:: + :depth: 3 + + +Basic overview +============== + +H_HTM is used as an interface for executing Hardware Trace Macro (HTM) +functions, including setup, configuration, control and dumping of the HTM data. +For using HTM, it is required to setup HTM buffers and HTM operations can +be controlled using the H_HTM hcall. The hcall can be invoked for any core/chip +of the system from within a partition itself. To use this feature, a debugfs +folder called "htmdump" is present under /sys/kernel/debug/powerpc. + + +HTM debugfs example usage +========================= + +.. code-block:: sh + + # ls /sys/kernel/debug/powerpc/htmdump/ + coreindexonchip htmcaps htmconfigure htmflags htminfo htmsetup + htmstart htmstatus htmtype nodalchipindex nodeindex trace + +Details on each file: + +* nodeindex, nodalchipindex, coreindexonchip specifies which partition to configure the HTM for. +* htmtype: specifies the type of HTM. Supported target is hardwareTarget. +* trace: is to read the HTM data. +* htmconfigure: Configure/Deconfigure the HTM. Writing 1 to the file will configure the trace, writing 0 to the file will do deconfigure. +* htmstart: start/Stop the HTM. Writing 1 to the file will start the tracing, writing 0 to the file will stop the tracing. +* htmstatus: get the status of HTM. This is needed to understand the HTM state after each operation. +* htmsetup: set the HTM buffer size. Size of HTM buffer is in power of 2 +* htminfo: provides the system processor configuration details. This is needed to understand the appropriate values for nodeindex, nodalchipindex, coreindexonchip. +* htmcaps : provides the HTM capabilities like minimum/maximum buffer size, what kind of tracing the HTM supports etc. +* htmflags : allows to pass flags to hcall. Currently supports controlling the wrapping of HTM buffer. + +To see the system processor configuration details: + +.. code-block:: sh + + # cat /sys/kernel/debug/powerpc/htmdump/htminfo > htminfo_file + +The result can be interpreted using hexdump. + +To collect HTM traces for a partition represented by nodeindex as +zero, nodalchipindex as 1 and coreindexonchip as 12 + +.. code-block:: sh + + # cd /sys/kernel/debug/powerpc/htmdump/ + # echo 2 > htmtype + # echo 33 > htmsetup ( sets 8GB memory for HTM buffer, number is size in power of 2 ) + +This requires a CEC reboot to get the HTM buffers allocated. + +.. code-block:: sh + + # cd /sys/kernel/debug/powerpc/htmdump/ + # echo 2 > htmtype + # echo 0 > nodeindex + # echo 1 > nodalchipindex + # echo 12 > coreindexonchip + # echo 1 > htmflags # to set noWrap for HTM buffers + # echo 1 > htmconfigure # Configure the HTM + # echo 1 > htmstart # Start the HTM + # echo 0 > htmstart # Stop the HTM + # echo 0 > htmconfigure # Deconfigure the HTM + # cat htmstatus # Dump the status of HTM entries as data + +Above will set the htmtype and core details, followed by executing respective HTM operation. + +Read the HTM trace data +======================== + +After starting the trace collection, run the workload +of interest. Stop the trace collection after required period +of time, and read the trace file. + +.. code-block:: sh + + # cat /sys/kernel/debug/powerpc/htmdump/trace > trace_file + +This trace file will contain the relevant instruction traces +collected during the workload execution. And can be used as +input file for trace decoders to understand data. + +Benefits of using HTM debugfs interface +======================================= + +It is now possible to collect traces for a particular core/chip +from within any partition of the system and decode it. Through +this enablement, a small partition can be dedicated to collect the +trace data and analyze to provide important information for Performance +analysis, Software tuning, or Hardware debug. -- cgit v1.2.3 From 0c0c84e4869895091c3029bc2625caa0feec99b9 Mon Sep 17 00:00:00 2001 From: pkarc Date: Sun, 4 May 2025 01:00:06 +0200 Subject: hwmon: (ausus-ec-sensors) add MAXIMUS VI HERO. Add support for MAXIMUS VI HERO. Signed-off-by: pkarc Signed-off-by: Eugene Shalygin Link: https://lore.kernel.org/r/20250503230020.1005801-1-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/asus_ec_sensors.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/asus_ec_sensors.rst index 3f5a2d1ffe65..816d1f9947ea 100644 --- a/Documentation/hwmon/asus_ec_sensors.rst +++ b/Documentation/hwmon/asus_ec_sensors.rst @@ -4,6 +4,7 @@ Kernel driver asus_ec_sensors ================================= Supported boards: + * MAXIMUS VI HERO * PRIME X470-PRO * PRIME X570-PRO * PRIME X670E-PRO WIFI -- cgit v1.2.3 From c0673bb356557136954b6725bf5fe327b94c6233 Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Tue, 22 Apr 2025 15:04:40 +0800 Subject: dt-bindings: display: rockchip,inno-hdmi: Fix Document of RK3036 compatible The RK3036 HDMI DDC bus requires it's PHY's reference clock to be enabled first before normal DDC communication can be carried out. Therefore, both RK3036 and RK3128 HDMI require two identical clocks. Signed-off-by: Andy Yan Reviewed-by: "Rob Herring (Arm)" Signed-off-by: Heiko Stuebner Link: https://lore.kernel.org/r/20250422070455.432666-2-andyshrk@163.com --- .../bindings/display/rockchip/rockchip,inno-hdmi.yaml | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml index 5b87b0f1963e..9d1e7f894ea5 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml @@ -23,13 +23,11 @@ properties: maxItems: 1 clocks: - minItems: 1 items: - description: The HDMI controller main clock - description: The HDMI PHY reference clock clock-names: - minItems: 1 items: - const: pclk - const: ref @@ -87,11 +85,6 @@ allOf: const: rockchip,rk3128-inno-hdmi then: - properties: - clocks: - minItems: 2 - clock-names: - minItems: 2 required: - power-domains @@ -106,8 +99,8 @@ examples: compatible = "rockchip,rk3036-inno-hdmi"; reg = <0x20034000 0x4000>; interrupts = ; - clocks = <&cru PCLK_HDMI>; - clock-names = "pclk"; + clocks = <&cru PCLK_HDMI>, <&cru SCLK_LCDC>; + clock-names = "pclk", "ref"; pinctrl-names = "default"; pinctrl-0 = <&hdmi_ctl>; #sound-dai-cells = <0>; -- cgit v1.2.3 From e0c93980d293b6e6eb7483fd5d665f84e725b518 Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Tue, 22 Apr 2025 15:04:41 +0800 Subject: dt-bindings: display: rockchip,inno-hdmi: Document GRF for RK3036 HDMI HDMI on RK3036 use GRF control the HSYNC/VSYNC polarity, but this part is missing when it first landing upstream. Document that it is mandatory for RK3036 HDMI. Signed-off-by: Andy Yan Reviewed-by: Krzysztof Kozlowski Signed-off-by: Heiko Stuebner Link: https://lore.kernel.org/r/20250422070455.432666-3-andyshrk@163.com --- .../devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml index 9d1e7f894ea5..290376bec079 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml @@ -56,6 +56,12 @@ properties: - port@0 - port@1 + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to GRF used for control the polarity of hsync/vsync of rk3036 + HDMI. + required: - compatible - reg @@ -75,6 +81,8 @@ allOf: const: rockchip,rk3036-inno-hdmi then: + required: + - rockchip,grf properties: power-domains: false @@ -103,6 +111,7 @@ examples: clock-names = "pclk", "ref"; pinctrl-names = "default"; pinctrl-0 = <&hdmi_ctl>; + rockchip,grf = <&grf>; #sound-dai-cells = <0>; ports { -- cgit v1.2.3 From db76003ade5953d4a83c2bdc6e15c2d1c33e7350 Mon Sep 17 00:00:00 2001 From: Akhil P Oommen Date: Sat, 19 Apr 2025 20:21:34 +0530 Subject: dt-bindings: opp: Add v2-qcom-adreno vendor bindings Add a new schema which extends opp-v2 to support a new vendor specific property required for Adreno GPUs found in Qualcomm's SoCs. The new property called "qcom,opp-acd-level" carries a u32 value recommended for each opp needs to be shared to GMU during runtime. Also, update MAINTAINERS file include the new opp-v2-qcom-adreno.yaml. Cc: Rob Clark Signed-off-by: Akhil P Oommen Tested-by: Maya Matuszczyk Tested-by: Anthony Ruhier Reviewed-by: Krzysztof Kozlowski Patchwork: https://patchwork.freedesktop.org/patch/649351/ Signed-off-by: Rob Clark --- .../bindings/opp/opp-v2-qcom-adreno.yaml | 96 ++++++++++++++++++++++ 1 file changed, 96 insertions(+) create mode 100644 Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml new file mode 100644 index 000000000000..a27ba7b663d4 --- /dev/null +++ b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/opp/opp-v2-qcom-adreno.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Adreno compatible OPP supply + +description: + Adreno GPUs present in Qualcomm's Snapdragon chipsets uses an OPP specific + ACD related information tailored for the specific chipset. This binding + provides the information needed to describe such a hardware value. + +maintainers: + - Rob Clark + +allOf: + - $ref: opp-v2-base.yaml# + +properties: + compatible: + contains: + const: operating-points-v2-adreno + +patternProperties: + '^opp-[0-9]+$': + type: object + additionalProperties: false + + properties: + opp-hz: true + + opp-level: true + + opp-peak-kBps: true + + opp-supported-hw: true + + qcom,opp-acd-level: + description: | + A positive value representing the ACD (Adaptive Clock Distribution, + a fancy name for clk throttling during voltage droop) level associated + with this OPP node. This value is shared to a co-processor inside GPU + (called Graphics Management Unit a.k.a GMU) during wake up. It may not + be present for some OPPs and GMU will disable ACD while transitioning + to that OPP. This value encodes a voltage threshold, delay cycles & + calibration margins which are identified by characterization of the + SoC. So, it doesn't have any unit. This data is passed to GMU firmware + via 'HFI_H2F_MSG_ACD' packet. + $ref: /schemas/types.yaml#/definitions/uint32 + + required: + - opp-hz + - opp-level + +required: + - compatible + +additionalProperties: false + +examples: + - | + #include + + gpu_opp_table: opp-table { + compatible = "operating-points-v2-adreno", "operating-points-v2"; + + opp-687000000 { + opp-hz = /bits/ 64 <687000000>; + opp-level = ; + opp-peak-kBps = <8171875>; + qcom,opp-acd-level = <0x882e5ffd>; + }; + + opp-550000000 { + opp-hz = /bits/ 64 <550000000>; + opp-level = ; + opp-peak-kBps = <6074219>; + qcom,opp-acd-level = <0xc0285ffd>; + }; + + opp-390000000 { + opp-hz = /bits/ 64 <390000000>; + opp-level = ; + opp-peak-kBps = <3000000>; + qcom,opp-acd-level = <0xc0285ffd>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-level = ; + opp-peak-kBps = <2136719>; + /* Intentionally left out qcom,opp-acd-level property here */ + }; + + }; -- cgit v1.2.3 From 04e394d6e2a349d0522a6afe6db22f1f1a843e3a Mon Sep 17 00:00:00 2001 From: Alexey Charkov Date: Sat, 3 May 2025 15:52:31 +0400 Subject: dt-bindings: hwinfo: Add VIA/WonderMedia SoC identification VIA/WonderMedia SoC's have a chip ID register inside their system configuration controller space, which can be used to identify appropriate hardware quirks at runtime. Add binding for it. Signed-off-by: Alexey Charkov Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250503-wmt-soc-driver-v3-1-2daa9056fa10@gmail.com Signed-off-by: Krzysztof Kozlowski --- .../bindings/hwinfo/via,vt8500-scc-id.yaml | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwinfo/via,vt8500-scc-id.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwinfo/via,vt8500-scc-id.yaml b/Documentation/devicetree/bindings/hwinfo/via,vt8500-scc-id.yaml new file mode 100644 index 000000000000..b0f425a4a882 --- /dev/null +++ b/Documentation/devicetree/bindings/hwinfo/via,vt8500-scc-id.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwinfo/via,vt8500-scc-id.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: VIA/WonderMedia SoC system configuration information + +maintainers: + - Alexey Charkov + +description: + The system configuration controller on VIA/WonderMedia SoC's contains a chip + identifier and revision used to differentiate between different hardware + versions of on-chip IP blocks having their own peculiarities which may or + may not be captured by their respective DT compatible strings + +properties: + compatible: + items: + - const: via,vt8500-scc-id + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + chipid@d8120000 { + compatible = "via,vt8500-scc-id"; + reg = <0xd8120000 0x4>; + }; -- cgit v1.2.3 From af28dfc32bb4bffd9666ac20891db9d3bce8a742 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Barnab=C3=A1s=20Cz=C3=A9m=C3=A1n?= Date: Wed, 30 Apr 2025 21:42:12 +0200 Subject: dt-bindings: display: panel: Add BOE TD4320 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Document BOE TD4320 6.3" 2340x1080 panel found in Xiaomi Redmi Note 7 smartphone. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Barnabás Czémán Link: https://lore.kernel.org/r/20250430-lavender-panel-v3-1-7625e62d62b2@mainlining.org Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20250430-lavender-panel-v3-1-7625e62d62b2@mainlining.org --- .../bindings/display/panel/boe,td4320.yaml | 65 ++++++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/boe,td4320.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/boe,td4320.yaml b/Documentation/devicetree/bindings/display/panel/boe,td4320.yaml new file mode 100644 index 000000000000..c6bff0ece360 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/boe,td4320.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/boe,td4320.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: BOE TD4320 MIPI-DSI panels + +maintainers: + - Barnabas Czeman + +description: + BOE TD4320 6.3" 1080x2340 panel found in Xiaomi Redmi Note 7 smartphone. + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + items: + - const: boe,td4320 + + reg: + maxItems: 1 + + iovcc-supply: + description: I/O voltage rail + + vsn-supply: + description: Negative source voltage rail + + vsp-supply: + description: Positive source voltage rail + +required: + - compatible + - reg + - reset-gpios + - port + +unevaluatedProperties: false + +examples: + - | + #include + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "boe,td4320"; + reg = <0>; + backlight = <&backlight>; + reset-gpios = <&tlmm 45 GPIO_ACTIVE_LOW>; + + port { + panel_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + }; + }; + +... -- cgit v1.2.3 From 65eaac591b752042006d3a79c0cfba47e2a9aaac Mon Sep 17 00:00:00 2001 From: Tiwei Bie Date: Sat, 3 May 2025 13:17:08 +0800 Subject: um: Remove obsolete legacy network transports These legacy network transports were marked as obsolete in commit 40814b98a570 ("um: Mark non-vector net transports as obsolete"). More than five years have passed since then. Remove these network transports to reduce the maintenance burden. Suggested-by: Anton Ivanov Signed-off-by: Tiwei Bie Acked-By: Anton Ivanov Link: https://patch.msgid.link/20250503051710.3286595-2-tiwei.btw@antgroup.com Signed-off-by: Johannes Berg --- .../virt/uml/user_mode_linux_howto_v2.rst | 31 ++-------------------- 1 file changed, 2 insertions(+), 29 deletions(-) (limited to 'Documentation') diff --git a/Documentation/virt/uml/user_mode_linux_howto_v2.rst b/Documentation/virt/uml/user_mode_linux_howto_v2.rst index 584000b743f3..60f35ed748b2 100644 --- a/Documentation/virt/uml/user_mode_linux_howto_v2.rst +++ b/Documentation/virt/uml/user_mode_linux_howto_v2.rst @@ -219,16 +219,6 @@ remote UML and other VM instances. +-----------+--------+------------------------------------+------------+ | vde | vector | dep. on VDE VPN: Virt.Net Locator | varies | +-----------+--------+------------------------------------+------------+ -| tuntap | legacy | none | ~ 500Mbit | -+-----------+--------+------------------------------------+------------+ -| daemon | legacy | none | ~ 450Mbit | -+-----------+--------+------------------------------------+------------+ -| socket | legacy | none | ~ 450Mbit | -+-----------+--------+------------------------------------+------------+ -| ethertap | legacy | obsolete | ~ 500Mbit | -+-----------+--------+------------------------------------+------------+ -| vde | legacy | obsolete | ~ 500Mbit | -+-----------+--------+------------------------------------+------------+ * All transports which have tso and checksum offloads can deliver speeds approaching 10G on TCP streams. @@ -236,27 +226,16 @@ remote UML and other VM instances. * All transports which have multi-packet rx and/or tx can deliver pps rates of up to 1Mps or more. -* All legacy transports are generally limited to ~600-700MBit and 0.05Mps. - * GRE and L2TPv3 allow connections to all of: local machine, remote machines, remote network devices and remote UML instances. -* Socket allows connections only between UML instances. - -* Daemon and bess require running a local switch. This switch may be - connected to the host as well. - Network configuration privileges ================================ The majority of the supported networking modes need ``root`` privileges. -For example, in the legacy tuntap networking mode, users were required -to be part of the group associated with the tunnel device. - -For newer network drivers like the vector transports, ``root`` privilege -is required to fire an ioctl to setup the tun interface and/or use -raw sockets where needed. +For example, for vector transports, ``root`` privilege is required to fire +an ioctl to setup the tun interface and/or use raw sockets where needed. This can be achieved by granting the user a particular capability instead of running UML as root. In case of vector transport, a user can add the @@ -610,12 +589,6 @@ connect to a local area cloud (all the UML nodes using the same multicast address running on hosts in the same multicast domain (LAN) will be automagically connected together to a virtual LAN. -Configuring Legacy transports -============================= - -Legacy transports are now considered obsolete. Please use the vector -versions. - *********** Running UML *********** -- cgit v1.2.3 From e619e18ed462bded8e8f12672a37053d39451404 Mon Sep 17 00:00:00 2001 From: Tiwei Bie Date: Sat, 3 May 2025 13:17:10 +0800 Subject: um: Remove legacy network transport infrastructure All legacy network transports have been removed. Vector transports provide the same capabilities with significantly higher network throughput. There is no reason to keep the legacy network transport infrastructure anymore. Remove it to reduce the maintenance burden. Signed-off-by: Tiwei Bie Acked-By: Anton Ivanov Link: https://patch.msgid.link/20250503051710.3286595-4-tiwei.btw@antgroup.com Signed-off-by: Johannes Berg --- Documentation/virt/uml/user_mode_linux_howto_v2.rst | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) (limited to 'Documentation') diff --git a/Documentation/virt/uml/user_mode_linux_howto_v2.rst b/Documentation/virt/uml/user_mode_linux_howto_v2.rst index 60f35ed748b2..c37e8e594d12 100644 --- a/Documentation/virt/uml/user_mode_linux_howto_v2.rst +++ b/Documentation/virt/uml/user_mode_linux_howto_v2.rst @@ -147,18 +147,12 @@ The image hostname will be set to the same as the host on which you are creating its image. It is a good idea to change that to avoid "Oh, bummer, I rebooted the wrong machine". -UML supports two classes of network devices - the older uml_net ones -which are scheduled for obsoletion. These are called ethX. It also -supports the newer vector IO devices which are significantly faster -and have support for some standard virtual network encapsulations like -Ethernet over GRE and Ethernet over L2TPv3. These are called vec0. - -Depending on which one is in use, ``/etc/network/interfaces`` will -need entries like:: - - # legacy UML network devices - auto eth0 - iface eth0 inet dhcp +UML supports vector I/O high performance network devices which have +support for some standard virtual network encapsulations like +Ethernet over GRE and Ethernet over L2TPv3. These are called vecX. + +When vector network devices are in use, ``/etc/network/interfaces`` +will need entries like:: # vector UML network devices auto vec0 -- cgit v1.2.3 From 165ef524bbeb71ccd470e70a4e63f813fa71e7cd Mon Sep 17 00:00:00 2001 From: Nicolas Frattaroli Date: Wed, 30 Apr 2025 18:16:34 +0200 Subject: dt-bindings: rng: rockchip,rk3588-rng: add rk3576-rng compatible The RK3576 SoC contains another standalone TRNG implementation. While the register map and hardware is different, it has the same clocks/interrupts/resets as the RK3588's TRNG, so can go in the same binding. Add the compatible and generalise the title/description of the binding some more. Signed-off-by: Nicolas Frattaroli Acked-by: Krzysztof Kozlowski Signed-off-by: Herbert Xu --- Documentation/devicetree/bindings/rng/rockchip,rk3588-rng.yaml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/rng/rockchip,rk3588-rng.yaml b/Documentation/devicetree/bindings/rng/rockchip,rk3588-rng.yaml index ca71b400bcae..fcc5be80142d 100644 --- a/Documentation/devicetree/bindings/rng/rockchip,rk3588-rng.yaml +++ b/Documentation/devicetree/bindings/rng/rockchip,rk3588-rng.yaml @@ -4,9 +4,9 @@ $id: http://devicetree.org/schemas/rng/rockchip,rk3588-rng.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Rockchip RK3588 TRNG +title: Rockchip RK3576/RK3588 TRNG -description: True Random Number Generator on Rockchip RK3588 SoC +description: True Random Number Generator on Rockchip RK3576/RK3588 SoCs maintainers: - Nicolas Frattaroli @@ -14,6 +14,7 @@ maintainers: properties: compatible: enum: + - rockchip,rk3576-rng - rockchip,rk3588-rng reg: -- cgit v1.2.3 From 4954ec9300cfe7ab6f1de1c93c56c236ac0a07e5 Mon Sep 17 00:00:00 2001 From: Ferass El Hafidi Date: Fri, 2 May 2025 18:56:05 +0000 Subject: dt-bindings: arm: amlogic: add S805Y and Mi TV Stick Add support for the Amlogic S805Y SoC and the Xiaomi Mi TV Stick (aka. xiaomi-aquaman). The S805Y is very similar to the S805X, with just a few minor differences. Acked-by: Krzysztof Kozlowski Reviewed-by: Martin Blumenstingl Signed-off-by: Ferass El Hafidi Link: https://lore.kernel.org/r/20250502-aquaman-v6-1-f1af347d9709@postmarketos.org Signed-off-by: Neil Armstrong --- Documentation/devicetree/bindings/arm/amlogic.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml index 0c84c56855ba..befc51765f9c 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -73,6 +73,13 @@ properties: - const: amlogic,s805x - const: amlogic,meson-gxl + - description: Boards with the Amlogic Meson GXL S805Y SoC + items: + - enum: + - xiaomi,aquaman + - const: amlogic,s805y + - const: amlogic,meson-gxl + - description: Boards with the Amlogic Meson GXL S905W SoC items: - enum: -- cgit v1.2.3 From 261f3ff29a2b15ad70bf2530550421ad9a9a5966 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Tue, 15 Apr 2025 20:51:29 +0100 Subject: dt-bindings: reset: Document RZ/V2H(P) USB2PHY reset Add a device tree binding document for the Renesas RZ/V2H(P) USB2PHY reset controller. This block manages the reset and power-down of the USB 2.0 PHY, which is used in both host and function modes. Signed-off-by: Lad Prabhakar Reviewed-by: Krzysztof Kozlowski Reviewed-by: Fabrizio Castro Link: https://lore.kernel.org/r/20250415195131.281060-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Philipp Zabel --- .../reset/renesas,rzv2h-usb2phy-reset.yaml | 56 ++++++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-reset.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-reset.yaml b/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-reset.yaml new file mode 100644 index 000000000000..c79f61c2373b --- /dev/null +++ b/Documentation/devicetree/bindings/reset/renesas,rzv2h-usb2phy-reset.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/renesas,rzv2h-usb2phy-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/V2H(P) USB2PHY Port reset Control + +maintainers: + - Lad Prabhakar + +description: + The RZ/V2H(P) USB2PHY Control mainly controls Port reset and power down of the + USB2.0 PHY. + +properties: + compatible: + const: renesas,r9a09g057-usb2phy-reset # RZ/V2H(P) + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + power-domains: + maxItems: 1 + + '#reset-cells': + const: 0 + +required: + - compatible + - reg + - clocks + - resets + - power-domains + - '#reset-cells' + +additionalProperties: false + +examples: + - | + #include + + reset-controller@15830000 { + compatible = "renesas,r9a09g057-usb2phy-reset"; + reg = <0x15830000 0x10000>; + clocks = <&cpg CPG_MOD 0xb6>; + resets = <&cpg 0xaf>; + power-domains = <&cpg>; + #reset-cells = <0>; + }; -- cgit v1.2.3 From 1c64de886b8893c0158097edd6ba08d527a2c97a Mon Sep 17 00:00:00 2001 From: Inochi Amaoto Date: Mon, 14 Apr 2025 06:34:59 +0800 Subject: dt-bindings: reset: sophgo: Add SG2044 bindings. The SG2044 shares the same reset controller as SG2042, so it is just enough to use the compatible string of SG2042 as a basis. Add compatible string for the reset controller of SG2044. Signed-off-by: Inochi Amaoto Acked-by: "Rob Herring (Arm)" Reviewed-by: Chen Wang Link: https://lore.kernel.org/r/20250413223507.46480-6-inochiama@gmail.com Signed-off-by: Philipp Zabel --- Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml b/Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml index 76e1931f0908..1d1b84575960 100644 --- a/Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml +++ b/Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml @@ -11,7 +11,12 @@ maintainers: properties: compatible: - const: sophgo,sg2042-reset + oneOf: + - items: + - enum: + - sophgo,sg2044-reset + - const: sophgo,sg2042-reset + - const: sophgo,sg2042-reset reg: maxItems: 1 -- cgit v1.2.3 From 8dbcbf93c7c9395405f357b130789e76b27a063e Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Fri, 18 Apr 2025 16:33:05 +0200 Subject: dt-bindings: arm: bcm2835: Add Raspberry Pi 2 (2nd rev) Add the Raspberry Pi 2 (2nd rev) based on BCM2837 to DT schema. Signed-off-by: Stefan Wahren Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250418143307.59235-2-wahrenst@gmx.net Signed-off-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml b/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml index e4ff71f006b8..2729a542c4f3 100644 --- a/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml @@ -52,6 +52,7 @@ properties: - description: BCM2837 based Boards items: - enum: + - raspberrypi,2-model-b-rev2 - raspberrypi,3-model-a-plus - raspberrypi,3-model-b - raspberrypi,3-model-b-plus -- cgit v1.2.3 From ab8131028710d009ab93d6bffd2a2749ade909b0 Mon Sep 17 00:00:00 2001 From: Yazen Ghannam Date: Tue, 22 Apr 2025 18:48:30 -0500 Subject: x86/CPU/AMD: Print the reason for the last reset The following register contains bits that indicate the cause for the previous reset. PMx000000C0 (FCH::PM::S5_RESET_STATUS) This is useful for debug. The reasons for reset are broken into 6 high level categories. Decode it by category and print during boot. Specifics within a category are split off into debugging documentation. The register is accessed indirectly through a "PM" port in the FCH. Use MMIO access in order to avoid restrictions with legacy port access. Use a late_initcall() to ensure that MMIO has been set up before trying to access the register. This register was introduced with AMD Family 17h, so avoid access on older families. There is no CPUID feature bit for this register. [ bp: Simplify the reason dumping loop. - merge a fix to not access an array element after the last one: https://lore.kernel.org/r/20250505133609.83933-1-superm1@kernel.org Reported-by: James Dutton ] [ mingo: - Use consistent .rst formatting - Fix 'Sleep' class field to 'ACPI-State' - Standardize pin messages around the 'tripped' verbiage - Remove reference to ring-buffer printing & simplify the wording - Use curly braces for multi-line conditional statements ] Signed-off-by: Yazen Ghannam Co-developed-by: Mario Limonciello Signed-off-by: Mario Limonciello Signed-off-by: Borislav Petkov (AMD) Signed-off-by: Ingo Molnar Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/20250422234830.2840784-6-superm1@kernel.org --- Documentation/arch/x86/amd-debugging.rst | 48 ++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) (limited to 'Documentation') diff --git a/Documentation/arch/x86/amd-debugging.rst b/Documentation/arch/x86/amd-debugging.rst index d3290f2e4be7..d92bf59d62c7 100644 --- a/Documentation/arch/x86/amd-debugging.rst +++ b/Documentation/arch/x86/amd-debugging.rst @@ -52,6 +52,7 @@ report generated from this script to Spurious s2idle wakeups from an IRQ =================================== + Spurious wakeups will generally have an IRQ set to ``/sys/power/pm_wakeup_irq``. This can be matched to ``/proc/interrupts`` to determine what device woke the system. @@ -134,6 +135,7 @@ The ``amd_s2idle.py`` script will capture most of these artifacts for you. s2idle PM debug messages ======================== + During the s2idle flow on AMD systems, the ACPI LPS0 driver is responsible to check all uPEP constraints. Failing uPEP constraints does not prevent s0i3 entry. This means that if some constraints are not met, it is possible @@ -160,6 +162,7 @@ After doing this, run the suspend cycle and look specifically for errors around: Historical examples of s2idle issues ==================================== + To help understand the types of issues that can occur and how to debug them, here are some historical examples of s2idle issues that have been resolved. @@ -248,6 +251,7 @@ state entry. Runtime power consumption issues ================================ + Runtime power consumption is influenced by many factors, including but not limited to the configuration of the PCIe Active State Power Management (ASPM), the display brightness, the EPP policy of the CPU, and the power management @@ -272,6 +276,7 @@ the battery life when more heavily biased towards performance. BIOS debug messages =================== + Most OEM machines don't have a serial UART for outputting kernel or BIOS debug messages. However BIOS debug messages are useful for understanding both BIOS bugs and bugs with the Linux kernel drivers that call BIOS AML. @@ -318,3 +323,46 @@ As mentioned above, parsing by hand can be tedious, especially with a lot of messages. To help with this, a tool has been created at `amd-debug-tools `_ to help parse the messages. + +Random reboot issues +==================== + +When a random reboot occurs, the high-level reason for the reboot is stored +in a register that will persist onto the next boot. + +There are 6 classes of reasons for the reboot: + * Software induced + * Power state transition + * Pin induced + * Hardware induced + * Remote reset + * Internal CPU event + +.. csv-table:: + :header: "Bit", "Type", "Reason" + :align: left + + "0", "Pin", "thermal pin BP_THERMTRIP_L was tripped" + "1", "Pin", "power button was pressed for 4 seconds" + "2", "Pin", "shutdown pin was tripped" + "4", "Remote", "remote ASF power off command was received" + "9", "Internal", "internal CPU thermal limit was tripped" + "16", "Pin", "system reset pin BP_SYS_RST_L was tripped" + "17", "Software", "software issued PCI reset" + "18", "Software", "software wrote 0x4 to reset control register 0xCF9" + "19", "Software", "software wrote 0x6 to reset control register 0xCF9" + "20", "Software", "software wrote 0xE to reset control register 0xCF9" + "21", "ACPI-state", "ACPI power state transition occurred" + "22", "Pin", "keyboard reset pin KB_RST_L was tripped" + "23", "Internal", "internal CPU shutdown event occurred" + "24", "Hardware", "system failed to boot before failed boot timer expired" + "25", "Hardware", "hardware watchdog timer expired" + "26", "Remote", "remote ASF reset command was received" + "27", "Internal", "an uncorrected error caused a data fabric sync flood event" + "29", "Internal", "FCH and MP1 failed warm reset handshake" + "30", "Internal", "a parity error occurred" + "31", "Internal", "a software sync flood event occurred" + +This information is read by the kernel at bootup and printed into +the syslog. When a random reboot occurs this message can be helpful +to determine the next component to debug. -- cgit v1.2.3 From 006ff7498fe89bd9dfb891101f02557d5cfcf427 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Thu, 24 Apr 2025 01:45:05 -0400 Subject: saner calling conventions for ->d_automount() Currently the calling conventions for ->d_automount() instances have an odd wart - returned new mount to be attached is expected to have refcount 2. That kludge is intended to make sure that mark_mounts_for_expiry() called before we get around to attaching that new mount to the tree won't decide to take it out. finish_automount() drops the extra reference after it's done with attaching mount to the tree - or drops the reference twice in case of error. ->d_automount() instances have rather counterintuitive boilerplate in them. There's a much simpler approach: have mark_mounts_for_expiry() skip the mounts that are yet to be mounted. And to hell with grabbing/dropping those extra references. Makes for simpler correctness analysis, at that... Reviewed-by: Christian Brauner Reviewed-by: Jeff Layton Reviewed-by: Paulo Alcantara (Red Hat) Acked-by: David Howells Tested-by: David Howells Acked-by: Steven Rostedt (Google) Signed-off-by: Al Viro --- Documentation/filesystems/porting.rst | 7 +++++++ Documentation/filesystems/vfs.rst | 4 +--- 2 files changed, 8 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/porting.rst b/Documentation/filesystems/porting.rst index 767b2927c762..749637231773 100644 --- a/Documentation/filesystems/porting.rst +++ b/Documentation/filesystems/porting.rst @@ -1203,3 +1203,10 @@ should use d_drop();d_splice_alias() and return the result of the latter. If a positive dentry cannot be returned for some reason, in-kernel clients such as cachefiles, nfsd, smb/server may not perform ideally but will fail-safe. + +--- + +**mandatory** + +Calling conventions for ->d_automount() have changed; we should *not* grab +an extra reference to new mount - it should be returned with refcount 1. diff --git a/Documentation/filesystems/vfs.rst b/Documentation/filesystems/vfs.rst index ae79c30b6c0c..cc0a58e96770 100644 --- a/Documentation/filesystems/vfs.rst +++ b/Documentation/filesystems/vfs.rst @@ -1411,9 +1411,7 @@ defined: If a vfsmount is returned, the caller will attempt to mount it on the mountpoint and will remove the vfsmount from its - expiration list in the case of failure. The vfsmount should be - returned with 2 refs on it to prevent automatic expiration - the - caller will clean up the additional ref. + expiration list in the case of failure. This function is only used if DCACHE_NEED_AUTOMOUNT is set on the dentry. This is set by __d_instantiate() if S_AUTOMOUNT is -- cgit v1.2.3 From 8ecd32b668238a7a79b2f44b66dae8ffb87ac763 Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Tue, 15 Apr 2025 14:20:59 -0500 Subject: docs: backlight: Clarify `actual_brightness` Currently userspace software systemd treats `brightness` and `actual_brightness` identically due to a bug found in an out of tree driver. This however causes problems for in-tree drivers that use brightness to report user requested `brightness` and `actual_brightness` to report what the hardware actually has programmed. Clarify the documentation to match the behavior described in commit 6ca017658b1f9 ("[PATCH] backlight: Backlight Class Improvements"). Cc: Lee Jones Cc: Lennart Poettering Cc: richard.purdie@linuxfoundation.org Link: https://github.com/systemd/systemd/pull/36881 Reviewed-by: Harry Wentland Link: https://lore.kernel.org/r/20250415192101.2033518-1-superm1@kernel.org Signed-off-by: Mario Limonciello --- Documentation/ABI/stable/sysfs-class-backlight | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/ABI/stable/sysfs-class-backlight b/Documentation/ABI/stable/sysfs-class-backlight index 6102d6bebdf9..40b8c46b95b2 100644 --- a/Documentation/ABI/stable/sysfs-class-backlight +++ b/Documentation/ABI/stable/sysfs-class-backlight @@ -26,7 +26,12 @@ Date: March 2006 KernelVersion: 2.6.17 Contact: Richard Purdie Description: - Show the actual brightness by querying the hardware. + Show the actual brightness by querying the hardware. Due + to implementation differences in hardware this may not + match the value in 'brightness'. For example some hardware + may treat blanking differently or have custom power saving + features. Userspace should generally use the values in + 'brightness' to make decisions. Users: HAL What: /sys/class/backlight//max_brightness -- cgit v1.2.3 From 3ee7d9496342246f4353716f6bbf64c945ff6e2d Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Mon, 5 May 2025 10:01:46 +0300 Subject: docs: core-api: document the IOVA-based API Add an explanation of the newly added IOVA-based mapping API. Signed-off-by: Christoph Hellwig Tested-by: Jens Axboe Signed-off-by: Leon Romanovsky Signed-off-by: Marek Szyprowski --- Documentation/core-api/dma-api.rst | 71 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) (limited to 'Documentation') diff --git a/Documentation/core-api/dma-api.rst b/Documentation/core-api/dma-api.rst index 8e3cce3d0a23..2ad08517e626 100644 --- a/Documentation/core-api/dma-api.rst +++ b/Documentation/core-api/dma-api.rst @@ -530,6 +530,77 @@ routines, e.g.::: .... } +Part Ie - IOVA-based DMA mappings +--------------------------------- + +These APIs allow a very efficient mapping when using an IOMMU. They are an +optional path that requires extra code and are only recommended for drivers +where DMA mapping performance, or the space usage for storing the DMA addresses +matter. All the considerations from the previous section apply here as well. + +:: + + bool dma_iova_try_alloc(struct device *dev, struct dma_iova_state *state, + phys_addr_t phys, size_t size); + +Is used to try to allocate IOVA space for mapping operation. If it returns +false this API can't be used for the given device and the normal streaming +DMA mapping API should be used. The ``struct dma_iova_state`` is allocated +by the driver and must be kept around until unmap time. + +:: + + static inline bool dma_use_iova(struct dma_iova_state *state) + +Can be used by the driver to check if the IOVA-based API is used after a +call to dma_iova_try_alloc. This can be useful in the unmap path. + +:: + + int dma_iova_link(struct device *dev, struct dma_iova_state *state, + phys_addr_t phys, size_t offset, size_t size, + enum dma_data_direction dir, unsigned long attrs); + +Is used to link ranges to the IOVA previously allocated. The start of all +but the first call to dma_iova_link for a given state must be aligned +to the DMA merge boundary returned by ``dma_get_merge_boundary())``, and +the size of all but the last range must be aligned to the DMA merge boundary +as well. + +:: + + int dma_iova_sync(struct device *dev, struct dma_iova_state *state, + size_t offset, size_t size); + +Must be called to sync the IOMMU page tables for IOVA-range mapped by one or +more calls to ``dma_iova_link()``. + +For drivers that use a one-shot mapping, all ranges can be unmapped and the +IOVA freed by calling: + +:: + + void dma_iova_destroy(struct device *dev, struct dma_iova_state *state, + size_t mapped_len, enum dma_data_direction dir, + unsigned long attrs); + +Alternatively drivers can dynamically manage the IOVA space by unmapping +and mapping individual regions. In that case + +:: + + void dma_iova_unlink(struct device *dev, struct dma_iova_state *state, + size_t offset, size_t size, enum dma_data_direction dir, + unsigned long attrs); + +is used to unmap a range previously mapped, and + +:: + + void dma_iova_free(struct device *dev, struct dma_iova_state *state); + +is used to free the IOVA space. All regions must have been unmapped using +``dma_iova_unlink()`` before calling ``dma_iova_free()``. Part II - Non-coherent DMA allocations -------------------------------------- -- cgit v1.2.3 From f287a048bccbf7e5a5d1cc55c974ee8ebda83ddc Mon Sep 17 00:00:00 2001 From: Bryan O'Donoghue Date: Tue, 29 Apr 2025 10:34:34 +0100 Subject: media: dt-bindings: Add OmniVision OV02C10 Extend the ov02e10 bindings yaml to describe the ov02c10 sensor which has the same bindings with a different compat string and different i2c address only. Other differences in sensor capabilities exist but are not expressed in devicetree. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bryan O'Donoghue Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil [hverkuil: fix typos: 0V02C10 -> OV02C10] [hverkuil: fix type: Ominivision -> OmniVision] --- .../bindings/media/i2c/ovti,ov02e10.yaml | 47 ++++++++++++++++++++-- 1 file changed, 43 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov02e10.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov02e10.yaml index 4ac4e11a16c8..03d476bcf805 100644 --- a/Documentation/devicetree/bindings/media/i2c/ovti,ov02e10.yaml +++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov02e10.yaml @@ -11,12 +11,22 @@ maintainers: - Bryan O'Donoghue description: | - The Omnivision OV02E10 is a 2 megapixel, CMOS image sensor which supports: + The Omnivision OV02E10 and OV02C10 sensors are 2 megapixel, CMOS image sensors which support: - Automatic black level calibration (ABLC) - Programmable controls for frame rate, mirror and flip, binning, cropping and windowing - - Output formats 10-bit 4C RGB RAW, 10-bit Bayer RAW - - 2-lane MIPI D-PHY TX @ 720 Mbps per lane + - OVO2C10 + - 10 bit RAW Bayer 1920x1080 60 fps 2-lane @ 800 Mbps/lane + - 10 bit RAW Bayer 1920x1080 60 fps 1-lane @ 1500 Mbps/lane + - 10 bit RAW Bayer 1280x720 60 fps cropped 1-lane @ 960 Mbps/lane + - 10 bit RGB/BW 640x480 60 fps bin2 or skip2 1-lane @ 800 Mbps/lane + - 10 bit RGB/BW 480x270 60 fps bin4 or skip4 1-lane @ 800 Mbps/lane + - OV02E10 + - 10 bit RAW Bayer 1920x1088 60 fps 2-lane @ 720 Mbps/lane + - 10 bit RAW Bayer 1280x1080 60 fps 2-lane @ 720 Mbps/lane + - 10 bit Quad Bayer 960x540 60 fps 2-lane 360 Mbps/lane + - 8 bit Quad Bayer 480x270 1/3/5/10 fps sub2 288 Mbps/lane + - 8 bit Quad Bayer 232x132 1/3/5/10 fps sub4 144 Mbps/lane - Dynamic defect pixel cancellation - Standard SCCB command interface @@ -25,7 +35,9 @@ allOf: properties: compatible: - const: ovti,ov02e10 + enum: + - ovti,ov02c10 + - ovti,ov02e10 reg: maxItems: 1 @@ -109,5 +121,32 @@ examples: }; }; }; + + ov02c10: camera@36 { + compatible = "ovti,ov02c10"; + reg = <0x36>; + + reset-gpios = <&tlmm 237 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_rgb_defaultt>; + + clocks = <&ov02c10_clk>; + + assigned-clocks = <&ov02c10_clk>; + assigned-clock-parents = <&ov02c10_clk_parent>; + assigned-clock-rates = <19200000>; + + avdd-supply = <&vreg_l7b_2p8>; + dvdd-supply = <&vreg_l7b_1p8>; + dovdd-supply = <&vreg_l3m_1p8>; + + port { + ov02c10_ep: endpoint { + remote-endpoint = <&csiphy4_ep>; + data-lanes = <1 2>; + link-frequencies = /bits/ 64 <400000000>; + }; + }; + }; }; ... -- cgit v1.2.3 From 5ef6bedb29f244e4ea5e9829f174eaf05f82eb6a Mon Sep 17 00:00:00 2001 From: Sylvain Petinot Date: Fri, 2 May 2025 22:18:48 +0200 Subject: media: dt-bindings: Add ST VD56G3 camera sensor Add devicetree bindings Documentation for ST VD56G3 & ST VD66GY camera sensors. Update MAINTAINERS file. Signed-off-by: Sylvain Petinot Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../devicetree/bindings/media/i2c/st,vd56g3.yaml | 139 +++++++++++++++++++++ 1 file changed, 139 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/i2c/st,vd56g3.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/i2c/st,vd56g3.yaml b/Documentation/devicetree/bindings/media/i2c/st,vd56g3.yaml new file mode 100644 index 000000000000..c6673b8539db --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/st,vd56g3.yaml @@ -0,0 +1,139 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (c) 2024 STMicroelectronics SA. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/st,vd56g3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics VD56G3 Global Shutter Image Sensor + +maintainers: + - Benjamin Mugnier + - Sylvain Petinot + +description: |- + The STMicroelectronics VD56G3 is a 1.5 M pixel global shutter image sensor + with an active array size of 1124 x 1364 (portrait orientation). It is + programmable through I2C, the address is fixed to 0x10. The sensor output is + available via CSI-2, which is configured as either 1 or 2 data lanes. The + sensor provides 8 GPIOS that can be used for external LED signal + (synchronized with sensor integration periods) + +allOf: + - $ref: /schemas/media/video-interface-devices.yaml# + +properties: + compatible: + enum: + - st,vd56g3 + - st,vd66gy + description: + Two variants are availables; VD56G3 is a monochrome sensor while VD66GY + is a colour variant. + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + vcore-supply: + description: Digital core power supply (1.15V) + + vddio-supply: + description: Digital IO power supply (1.8V) + + vana-supply: + description: Analog power supply (2.8V) + + reset-gpios: + description: Sensor reset active low GPIO (XSHUTDOWN) + maxItems: 1 + + st,leds: + description: + List sensor's GPIOs used to control strobe light sources during exposure + time. The numbers identify the sensor pin on which the illumination system + is connected. GPIOs are active-high. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 8 + items: + minimum: 0 + maximum: 7 + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 2 + items: + enum: [1, 2] + + link-frequencies: + maxItems: 1 + items: + enum: [402000000, 750000000] + + lane-polarities: + minItems: 1 + maxItems: 3 + description: Any lane can be inverted or not. + + required: + - data-lanes + - link-frequencies + +required: + - compatible + - reg + - clocks + - vcore-supply + - vddio-supply + - vana-supply + - reset-gpios + - port + +unevaluatedProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + camera-sensor@10 { + compatible = "st,vd56g3"; + reg = <0x10>; + + clocks = <&camera_clk_12M>; + + vcore-supply = <&camera_vcore_v1v15>; + vddio-supply = <&camera_vddio_v1v8>; + vana-supply = <&camera_vana_v2v8>; + + reset-gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + st,leds = <6>; + + orientation = <2>; + rotation = <0>; + + port { + endpoint { + data-lanes = <1 2>; + link-frequencies = /bits/ 64 <402000000>; + remote-endpoint = <&csiphy0_ep>; + }; + }; + }; + }; -- cgit v1.2.3 From fba4aa083104808a1098c2863130fab230f959dc Mon Sep 17 00:00:00 2001 From: Benjamin Mugnier Date: Wed, 30 Apr 2025 10:24:38 +0200 Subject: media: dt-bindings: Add ST VD55G1 camera sensor Also update MAINTAINERS file accordingly. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Benjamin Mugnier Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../devicetree/bindings/media/i2c/st,vd55g1.yaml | 133 +++++++++++++++++++++ 1 file changed, 133 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/i2c/st,vd55g1.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/i2c/st,vd55g1.yaml b/Documentation/devicetree/bindings/media/i2c/st,vd55g1.yaml new file mode 100644 index 000000000000..3c071e6fbea6 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/st,vd55g1.yaml @@ -0,0 +1,133 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (c) 2025 STMicroelectronics SA. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/st,vd55g1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics VD55G1 Global Shutter Image Sensor + +maintainers: + - Benjamin Mugnier + - Sylvain Petinot + +description: |- + The STMicroelectronics VD55G1 is a global shutter image sensor with an active + array size of 804H x 704V. It is programmable through I2C interface. The I2C + address is fixed to 0x10. + + Image data is sent through MIPI CSI-2, which is configured as only 1 data + lane. The sensor provides 4 GPIOS that can be used for external LED signal + (synchronized with sensor integration periods). + +allOf: + - $ref: /schemas/media/video-interface-devices.yaml# + +properties: + compatible: + const: st,vd55g1 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + vcore-supply: + description: Digital core power supply (1.15V) + + vddio-supply: + description: Digital IO power supply (1.8V) + + vana-supply: + description: Analog power supply (2.8V) + + reset-gpios: + description: Sensor reset active low GPIO (XSHUTDOWN) + maxItems: 1 + + st,leds: + description: + List sensor's GPIOs used to control strobe light sources during exposure + time. The numbers identify the sensor pin on which the illumination + system is connected. GPIOs are active-high. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 4 + items: + minimum: 0 + maximum: 3 + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + items: + - const: 1 + + link-frequencies: + maxItems: 1 + items: + minimum: 125000000 + maximum: 600000000 + + lane-polarities: + minItems: 1 + maxItems: 2 + + required: + - data-lanes + - link-frequencies + +required: + - compatible + - reg + - clocks + - vcore-supply + - vddio-supply + - vana-supply + - reset-gpios + - port + +unevaluatedProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + camera-sensor@10 { + compatible = "st,vd55g1"; + reg = <0x10>; + + clocks = <&camera_clk_12M>; + + vcore-supply = <&camera_vcore_v1v15>; + vddio-supply = <&camera_vddio_v1v8>; + vana-supply = <&camera_vana_v2v8>; + + reset-gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + st,leds = <2>; + + orientation = <2>; + rotation = <0>; + + port { + endpoint { + data-lanes = <1>; + link-frequencies = /bits/ 64 <600000000>; + remote-endpoint = <&csiphy0_ep>; + }; + }; + }; + }; -- cgit v1.2.3 From 6be2439fd7d0dc40a2597641d25e3cc9e1e6a30e Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Thu, 10 Apr 2025 21:41:32 +0200 Subject: media: dt-bindings: sony,imx415: update maintainer e-mail address I recently left WolfVision but would like to continue to maintain the Sony IMX415 image sensor driver. Update my e-mail address. Signed-off-by: Michael Riesch Acked-by: Rob Herring (Arm) Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml index 34962c5c7006..7c11e871dca6 100644 --- a/Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml +++ b/Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Sony IMX415 CMOS Image Sensor maintainers: - - Michael Riesch + - Michael Riesch description: |- The Sony IMX415 is a diagonal 6.4 mm (Type 1/2.8) CMOS active pixel type -- cgit v1.2.3 From 108955cd245e80b80b3daaef7fa3621663bc26b8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Niklas=20S=C3=B6derlund?= Date: Wed, 30 Apr 2025 14:53:22 +0200 Subject: media: dt-bindings: sony,imx290: Update usage example MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since commit 98e0500eadb7 ("media: i2c: imx290: Add configurable link frequency and pixel rate") the driver expects two specific link-frequency settings 2-lane (445500000, 297000000) and 4-lane (222750000, 148500000) operation. The driver fails to probe without these exact settings. Update the example in the bindings to match this to make it easier for users to incorporate this sensor in their device tree descriptions without having to read the driver sources when the driver fails to probe. Signed-off-by: Niklas Söderlund Reviewed-by: Laurent Pinchart Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml index fa69bd21c8da..990acf89af8f 100644 --- a/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml +++ b/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml @@ -136,7 +136,7 @@ examples: port { imx290_ep: endpoint { data-lanes = <1 2 3 4>; - link-frequencies = /bits/ 64 <445500000>; + link-frequencies = /bits/ 64 <222750000 148500000>; remote-endpoint = <&csiphy0_ep>; }; }; -- cgit v1.2.3 From 48dbb76cef65fabaa3ac97461eda90495e954ecd Mon Sep 17 00:00:00 2001 From: Frank Li Date: Wed, 16 Apr 2025 11:47:27 -0400 Subject: dt-bindings: media: convert imx.txt to yaml format Convert binding doc imx.txt to yaml format. Create two yaml files: fsl,imx6-mipi-csi2.yaml and fsl,imx-capture-subsystem.yaml. Additional changes: - add example for fsl,imx6-mipi-csi2 - add irq err1 and err2 description - update MAINTAINERS Signed-off-by: Frank Li Reviewed-by: Rob Herring (Arm) Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil [hverkuil: drop empty line at the end of the yaml files] --- .../bindings/media/fsl,imx-capture-subsystem.yaml | 37 ++++++ .../bindings/media/fsl,imx6-mipi-csi2.yaml | 143 +++++++++++++++++++++ Documentation/devicetree/bindings/media/imx.txt | 53 -------- 3 files changed, 180 insertions(+), 53 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/fsl,imx-capture-subsystem.yaml create mode 100644 Documentation/devicetree/bindings/media/fsl,imx6-mipi-csi2.yaml delete mode 100644 Documentation/devicetree/bindings/media/imx.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/fsl,imx-capture-subsystem.yaml b/Documentation/devicetree/bindings/media/fsl,imx-capture-subsystem.yaml new file mode 100644 index 000000000000..25e65a344a0a --- /dev/null +++ b/Documentation/devicetree/bindings/media/fsl,imx-capture-subsystem.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/fsl,imx-capture-subsystem.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX Media Video Device + +description: + This is the media controller node for video capture support. It is a + virtual device that lists the camera serial interface nodes that the + media device will control + +maintainers: + - Frank Li + +properties: + compatible: + const: fsl,imx-capture-subsystem + + ports: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Should contain a list of phandles pointing to camera + sensor interface ports of IPU devices. + +required: + - compatible + +additionalProperties: false + +examples: + - | + capture-subsystem { + compatible = "fsl,imx-capture-subsystem"; + ports = <&ipu1_csi0>, <&ipu1_csi1>; + }; diff --git a/Documentation/devicetree/bindings/media/fsl,imx6-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/fsl,imx6-mipi-csi2.yaml new file mode 100644 index 000000000000..65255f576f26 --- /dev/null +++ b/Documentation/devicetree/bindings/media/fsl,imx6-mipi-csi2.yaml @@ -0,0 +1,143 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/fsl,imx6-mipi-csi2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MIPI CSI-2 Receiver core in the i.MX SoC + +description: + This is the device node for the MIPI CSI-2 Receiver core in the i.MX + SoC. This is a Synopsys Designware MIPI CSI-2 host controller core + combined with a D-PHY core mixed into the same register block. In + addition this device consists of an i.MX-specific "CSI2IPU gasket" + glue logic, also controlled from the same register block. The CSI2IPU + gasket demultiplexes the four virtual channel streams from the host + controller's 32-bit output image bus onto four 16-bit parallel busses + to the i.MX IPU CSIs. + +maintainers: + - Frank Li + +properties: + compatible: + const: fsl,imx6-mipi-csi2 + + reg: + maxItems: 1 + + clocks: + items: + - description: hsi_tx (the D-PHY clock) + - description: video_27m (D-PHY PLL reference clock) + - description: eim_podf; + + clock-names: + items: + - const: dphy + - const: ref + - const: pix + + interrupts: + items: + - description: CSI-2 ERR1 irq + - description: CSI-2 ERR2 irq + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port node, single endpoint describing the CSI-2 transmitter. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + const: 0 + + data-lanes: + minItems: 1 + items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + + required: + - data-lanes + +patternProperties: + '^port@[1-4]$': + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + ports 1 through 4 are output ports connecting with parallel bus sink + endpoint nodes and correspond to the four MIPI CSI-2 virtual channel + outputs. + + properties: + endpoint@0: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + endpoint@1: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + +required: + - compatible + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + + mipi@21dc000 { + compatible = "fsl,imx6-mipi-csi2"; + reg = <0x021dc000 0x4000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clks IMX6QDL_CLK_HSI_TX>, + <&clks IMX6QDL_CLK_VIDEO_27M>, + <&clks IMX6QDL_CLK_EIM_PODF>; + clock-names = "dphy", "ref", "pix"; + + port@0 { + reg = <0>; + + endpoint { + remote-endpoint = <&ov5640_to_mipi_csi2>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + endpoint@0 { + reg = <0>; + remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc0>; + }; + + endpoint@1 { + reg = <1>; + remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/imx.txt b/Documentation/devicetree/bindings/media/imx.txt deleted file mode 100644 index 77f4b0a7fd2b..000000000000 --- a/Documentation/devicetree/bindings/media/imx.txt +++ /dev/null @@ -1,53 +0,0 @@ -Freescale i.MX Media Video Device -================================= - -Video Media Controller node ---------------------------- - -This is the media controller node for video capture support. It is a -virtual device that lists the camera serial interface nodes that the -media device will control. - -Required properties: -- compatible : "fsl,imx-capture-subsystem"; -- ports : Should contain a list of phandles pointing to camera - sensor interface ports of IPU devices - -example: - -capture-subsystem { - compatible = "fsl,imx-capture-subsystem"; - ports = <&ipu1_csi0>, <&ipu1_csi1>; -}; - - -mipi_csi2 node --------------- - -This is the device node for the MIPI CSI-2 Receiver core in the i.MX -SoC. This is a Synopsys Designware MIPI CSI-2 host controller core -combined with a D-PHY core mixed into the same register block. In -addition this device consists of an i.MX-specific "CSI2IPU gasket" -glue logic, also controlled from the same register block. The CSI2IPU -gasket demultiplexes the four virtual channel streams from the host -controller's 32-bit output image bus onto four 16-bit parallel busses -to the i.MX IPU CSIs. - -Required properties: -- compatible : "fsl,imx6-mipi-csi2"; -- reg : physical base address and length of the register set; -- clocks : the MIPI CSI-2 receiver requires three clocks: hsi_tx - (the D-PHY clock), video_27m (D-PHY PLL reference - clock), and eim_podf; -- clock-names : must contain "dphy", "ref", "pix"; -- port@* : five port nodes must exist, containing endpoints - connecting to the source and sink devices according to - of_graph bindings. The first port is an input port, - connecting with a MIPI CSI-2 source, and ports 1 - through 4 are output ports connecting with parallel - bus sink endpoint nodes and correspond to the four - MIPI CSI-2 virtual channel outputs. - -Optional properties: -- interrupts : must contain two level-triggered interrupts, - in order: 100 and 101; -- cgit v1.2.3 From d2f526ba27d29c442542f7c5df0a86ef0b576716 Mon Sep 17 00:00:00 2001 From: Keith Busch Date: Tue, 6 May 2025 17:47:24 +0530 Subject: block: introduce max_write_streams queue limit Drivers with hardware that support write streams need a way to export how many are available so applications can generically query this. Reviewed-by: Hannes Reinecke Reviewed-by: Nitesh Shetty Signed-off-by: Keith Busch [hch: renamed hints to streams, removed stacking] Signed-off-by: Christoph Hellwig Signed-off-by: Kanchan Joshi Link: https://lore.kernel.org/r/20250506121732.8211-4-joshi.k@samsung.com Signed-off-by: Jens Axboe --- Documentation/ABI/stable/sysfs-block | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/stable/sysfs-block b/Documentation/ABI/stable/sysfs-block index 11545c9e2e93..8bbe1eca28df 100644 --- a/Documentation/ABI/stable/sysfs-block +++ b/Documentation/ABI/stable/sysfs-block @@ -547,6 +547,13 @@ Description: [RO] Maximum size in bytes of a single element in a DMA scatter/gather list. +What: /sys/block//queue/max_write_streams +Date: November 2024 +Contact: linux-block@vger.kernel.org +Description: + [RO] Maximum number of write streams supported, 0 if not + supported. If supported, valid values are 1 through + max_write_streams, inclusive. What: /sys/block//queue/max_segments Date: March 2010 -- cgit v1.2.3 From c23acfac10786ac5062a0615e23e68b913ac8da0 Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Tue, 6 May 2025 17:47:25 +0530 Subject: block: introduce a write_stream_granularity queue limit Export the granularity that write streams should be discarded with, as it is essential for making good use of them. Reviewed-by: Hannes Reinecke Reviewed-by: Nitesh Shetty Signed-off-by: Christoph Hellwig Signed-off-by: Keith Busch Signed-off-by: Kanchan Joshi Link: https://lore.kernel.org/r/20250506121732.8211-5-joshi.k@samsung.com Signed-off-by: Jens Axboe --- Documentation/ABI/stable/sysfs-block | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/stable/sysfs-block b/Documentation/ABI/stable/sysfs-block index 8bbe1eca28df..4ba771b56b3b 100644 --- a/Documentation/ABI/stable/sysfs-block +++ b/Documentation/ABI/stable/sysfs-block @@ -555,6 +555,14 @@ Description: supported. If supported, valid values are 1 through max_write_streams, inclusive. +What: /sys/block//queue/write_stream_granularity +Date: November 2024 +Contact: linux-block@vger.kernel.org +Description: + [RO] Granularity of a write stream in bytes. The granularity + of a write stream is the size that should be discarded or + overwritten together to avoid write amplification in the device. + What: /sys/block//queue/max_segments Date: March 2010 Contact: linux-block@vger.kernel.org -- cgit v1.2.3 From 3fea0641b06ff4e53d95d07a96764d8951d4ced6 Mon Sep 17 00:00:00 2001 From: Chao Yu Date: Tue, 6 May 2025 15:47:25 +0800 Subject: f2fs: sysfs: add encoding_flags entry This patch adds a new sysfs entry /sys/fs/f2fs//encoding_flags, it is a read-only entry to show the value of sb.s_encoding_flags, the value is hexadecimal. ============================ ========== Flag_Name Flag_Value ============================ ========== SB_ENC_STRICT_MODE_FL 0x00000001 SB_ENC_NO_COMPAT_FALLBACK_FL 0x00000002 ============================ ========== case#1 mkfs.f2fs -f -O casefold -C utf8:strict /dev/vda mount /dev/vda /mnt/f2fs cat /sys/fs/f2fs/vda/encoding_flags 1 case#2 mkfs.f2fs -f -O casefold -C utf8 /dev/vda fsck.f2fs --nolinear-lookup=1 /dev/vda mount /dev/vda /mnt/f2fs cat /sys/fs/f2fs/vda/encoding_flags 2 Signed-off-by: Chao Yu Signed-off-by: Jaegeuk Kim --- Documentation/ABI/testing/sysfs-fs-f2fs | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs index 59adb7dc6f9e..1fa140da5a1a 100644 --- a/Documentation/ABI/testing/sysfs-fs-f2fs +++ b/Documentation/ABI/testing/sysfs-fs-f2fs @@ -846,3 +846,16 @@ Description: For several zoned storage devices, vendors will provide extra space reserved_blocks. However, it is not enough, since this extra space should not be shown to users. So, with this new sysfs node, we can hide the space by substracting reserved_blocks from total bytes. + +What: /sys/fs/f2fs//encoding_flags +Date: April 2025 +Contact: "Chao Yu" +Description: This is a read-only entry to show the value of sb.s_encoding_flags, the + value is hexadecimal. + + ============================ ========== + Flag_Name Flag_Value + ============================ ========== + SB_ENC_STRICT_MODE_FL 0x00000001 + SB_ENC_NO_COMPAT_FALLBACK_FL 0x00000002 + ============================ ========== -- cgit v1.2.3 From 617e0491abe4d8d45c5110ca474c0feb428e6828 Mon Sep 17 00:00:00 2001 From: Chao Yu Date: Wed, 16 Apr 2025 13:48:05 +0800 Subject: f2fs: sysfs: export linear_lookup in features directory cat /sys/fs/f2fs/features/linear_lookup supported Signed-off-by: Chao Yu Signed-off-by: Jaegeuk Kim --- Documentation/ABI/testing/sysfs-fs-f2fs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs index 1fa140da5a1a..8ff7e769a2f9 100644 --- a/Documentation/ABI/testing/sysfs-fs-f2fs +++ b/Documentation/ABI/testing/sysfs-fs-f2fs @@ -270,7 +270,7 @@ Description: Shows all enabled kernel features. inode_checksum, flexible_inline_xattr, quota_ino, inode_crtime, lost_found, verity, sb_checksum, casefold, readonly, compression, test_dummy_encryption_v2, - atomic_write, pin_file, encrypted_casefold. + atomic_write, pin_file, encrypted_casefold, linear_lookup. What: /sys/fs/f2fs//inject_rate Date: May 2016 -- cgit v1.2.3 From 0244c77fedc68eda261b4fec24b0476455e3b654 Mon Sep 17 00:00:00 2001 From: Chao Yu Date: Fri, 25 Apr 2025 17:50:55 +0800 Subject: f2fs: support FAULT_TIMEOUT Support to inject a timeout fault into function, currently it only support to inject timeout to commit_atomic_write flow to reproduce inconsistent bug, like the bug fixed by commit f098aeba04c9 ("f2fs: fix to avoid atomicity corruption of atomic file"). By default, the new type fault will inject 1000ms timeout, and the timeout process can be interrupted by SIGKILL. Signed-off-by: Chao Yu Signed-off-by: Jaegeuk Kim --- Documentation/ABI/testing/sysfs-fs-f2fs | 1 + Documentation/filesystems/f2fs.rst | 1 + 2 files changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs index 8ff7e769a2f9..feafb36fd921 100644 --- a/Documentation/ABI/testing/sysfs-fs-f2fs +++ b/Documentation/ABI/testing/sysfs-fs-f2fs @@ -735,6 +735,7 @@ Description: Support configuring fault injection type, should be FAULT_BLKADDR_CONSISTENCE 0x000080000 FAULT_NO_SEGMENT 0x000100000 FAULT_INCONSISTENT_FOOTER 0x000200000 + FAULT_TIMEOUT 0x000400000 (1000ms) =========================== =========== What: /sys/fs/f2fs//discard_io_aware_gran diff --git a/Documentation/filesystems/f2fs.rst b/Documentation/filesystems/f2fs.rst index e15c4275862a..157743ab107d 100644 --- a/Documentation/filesystems/f2fs.rst +++ b/Documentation/filesystems/f2fs.rst @@ -207,6 +207,7 @@ fault_type=%d Support configuring fault injection type, should be FAULT_BLKADDR_CONSISTENCE 0x000080000 FAULT_NO_SEGMENT 0x000100000 FAULT_INCONSISTENT_FOOTER 0x000200000 + FAULT_TIMEOUT 0x000400000 (1000ms) =========================== =========== mode=%s Control block allocation mode which supports "adaptive" and "lfs". In "lfs" mode, there should be no random -- cgit v1.2.3 From af69647e995c6bf20733c596277938c4348a6c70 Mon Sep 17 00:00:00 2001 From: Ann Yun Date: Sat, 26 Apr 2025 20:07:26 -0400 Subject: Documentation:openrisc: Add build instructions with initramfs Mention how to include initramfs when building the kernel and direct the reader to ramfs-rootfs-initramfs.rst documentation for more details Signed-off-by: Ann Yun Signed-off-by: Stafford Horne --- Documentation/arch/openrisc/openrisc_port.rst | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/arch/openrisc/openrisc_port.rst b/Documentation/arch/openrisc/openrisc_port.rst index a8f307a3b499..60b0a9e51d70 100644 --- a/Documentation/arch/openrisc/openrisc_port.rst +++ b/Documentation/arch/openrisc/openrisc_port.rst @@ -40,6 +40,12 @@ Build the Linux kernel as usual:: make ARCH=openrisc CROSS_COMPILE="or1k-linux-" defconfig make ARCH=openrisc CROSS_COMPILE="or1k-linux-" +If you want to embed initramfs in the kernel, also pass ``CONFIG_INITRAMFS_SOURCE``. For example:: + + make ARCH=openrisc CROSS_COMPILE="or1k-linux-" CONFIG_INITRAMFS_SOURCE="path/to/rootfs path/to/devnodes" + +For more information on this, please check Documentation/filesystems/ramfs-rootfs-initramfs.rst. + 3) Running on FPGA (optional) The OpenRISC community typically uses FuseSoC to manage building and programming -- cgit v1.2.3 From e551ebdc20a79258ef48ecfb342353000c1a6cdb Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:48:02 -0500 Subject: dt-bindings: interrupt-controller: Convert opencores,or1k-pic to DT schema Convert the OpenRISC PIC interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Signed-off-by: Rob Herring (Arm) Signed-off-by: Stafford Horne --- .../interrupt-controller/opencores,or1k-pic.txt | 23 ------------- .../interrupt-controller/opencores,or1k-pic.yaml | 38 ++++++++++++++++++++++ 2 files changed, 38 insertions(+), 23 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.txt deleted file mode 100644 index 55c04faa3f3f..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.txt +++ /dev/null @@ -1,23 +0,0 @@ -OpenRISC 1000 Programmable Interrupt Controller - -Required properties: - -- compatible : should be "opencores,or1k-pic-level" for variants with - level triggered interrupt lines, "opencores,or1k-pic-edge" for variants with - edge triggered interrupt lines or "opencores,or1200-pic" for machines - with the non-spec compliant or1200 type implementation. - - "opencores,or1k-pic" is also provided as an alias to "opencores,or1200-pic", - but this is only for backwards compatibility. - -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value shall be 1. - -Example: - -intc: interrupt-controller { - compatible = "opencores,or1k-pic-level"; - interrupt-controller; - #interrupt-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.yaml new file mode 100644 index 000000000000..995b68c3aed4 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/opencores,or1k-pic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: OpenRISC 1000 Programmable Interrupt Controller + +maintainers: + - Stefan Kristiansson + +properties: + compatible: + enum: + - opencores,or1k-pic-level + - opencores,or1k-pic-edge + - opencores,or1200-pic + - opencores,or1k-pic + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + +required: + - compatible + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + interrupt-controller { + compatible = "opencores,or1k-pic-level"; + interrupt-controller; + #interrupt-cells = <1>; + }; -- cgit v1.2.3 From 20b4f0b4cdfec106bb73afd47de7d121b723f723 Mon Sep 17 00:00:00 2001 From: "Dr. David Alan Gilbert" Date: Wed, 30 Apr 2025 00:45:57 +0100 Subject: rpmsg: core: Remove deadcode rpmsg_send_offchannel() and rpmsg_trysend_offchannel() have been unused since they were added in 2011's commit bcabbccabffe ("rpmsg: add virtio-based remote processor messaging bus") Remove them and associated docs. Signed-off-by: Dr. David Alan Gilbert Acked-by: Arnaud Pouliquen Link: https://lore.kernel.org/r/20250429234600.301083-2-linux@treblig.org Signed-off-by: Mathieu Poirier --- Documentation/staging/rpmsg.rst | 46 ----------------------------------------- 1 file changed, 46 deletions(-) (limited to 'Documentation') diff --git a/Documentation/staging/rpmsg.rst b/Documentation/staging/rpmsg.rst index 3713adaa1608..40282cca86ca 100644 --- a/Documentation/staging/rpmsg.rst +++ b/Documentation/staging/rpmsg.rst @@ -110,31 +110,6 @@ or a timeout of 15 seconds elapses. When the latter happens, The function can only be called from a process context (for now). Returns 0 on success and an appropriate error value on failure. -:: - - int rpmsg_send_offchannel(struct rpmsg_endpoint *ept, u32 src, u32 dst, - void *data, int len); - - -sends a message across to the remote processor, using the src and dst -addresses provided by the user. - -The caller should specify the endpoint, the data it wants to send, -its length (in bytes), and explicit source and destination addresses. -The message will then be sent to the remote processor to which the -endpoint's channel belongs, but the endpoint's src and channel dst -addresses will be ignored (and the user-provided addresses will -be used instead). - -In case there are no TX buffers available, the function will block until -one becomes available (i.e. until the remote processor consumes -a tx buffer and puts it back on virtio's used descriptor ring), -or a timeout of 15 seconds elapses. When the latter happens, --ERESTARTSYS is returned. - -The function can only be called from a process context (for now). -Returns 0 on success and an appropriate error value on failure. - :: int rpmsg_trysend(struct rpmsg_endpoint *ept, void *data, int len); @@ -173,27 +148,6 @@ return -ENOMEM without waiting until one becomes available. The function can only be called from a process context (for now). Returns 0 on success and an appropriate error value on failure. -:: - - int rpmsg_trysend_offchannel(struct rpmsg_endpoint *ept, u32 src, u32 dst, - void *data, int len); - - -sends a message across to the remote processor, using source and -destination addresses provided by the user. - -The user should specify the channel, the data it wants to send, -its length (in bytes), and explicit source and destination addresses. -The message will then be sent to the remote processor to which the -channel belongs, but the channel's src and dst addresses will be -ignored (and the user-provided addresses will be used instead). - -In case there are no TX buffers available, the function will immediately -return -ENOMEM without waiting until one becomes available. - -The function can only be called from a process context (for now). -Returns 0 on success and an appropriate error value on failure. - :: struct rpmsg_endpoint *rpmsg_create_ept(struct rpmsg_device *rpdev, -- cgit v1.2.3 From 9f2ae52acd5e6c95ddc55d1cc67f44860940a21b Mon Sep 17 00:00:00 2001 From: Aleksandrs Vinarskis Date: Sat, 26 Apr 2025 14:57:58 +0200 Subject: dt-bindings: arm: qcom: Add Asus Zenbook A14 Document the X1E-78-100 and X1P-42-100/X1-26-100 variants. Acked-by: Krzysztof Kozlowski Signed-off-by: Aleksandrs Vinarskis Link: https://lore.kernel.org/r/20250426130203.37659-3-alex.vinarskis@gmail.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 08c329b1e919..bb589021a97a 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1133,6 +1133,7 @@ properties: - items: - enum: - asus,vivobook-s15 + - asus,zenbook-a14-ux3407ra - dell,xps13-9345 - hp,omnibook-x14 - lenovo,yoga-slim7x @@ -1144,6 +1145,7 @@ properties: - items: - enum: + - asus,zenbook-a14-ux3407qa - qcom,x1p42100-crd - const: qcom,x1p42100 -- cgit v1.2.3 From 66bd98084f3f730d62a2531a47bd3ac20801beb6 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 11:19:42 -0500 Subject: dt-bindings: clock: Drop maxim,max77686.txt The clock binding for Maxim MAX77686/MAX77802/MAX77620 is already covered by mfd/maxim,max77686.yaml. Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250505161943.1433081-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski Signed-off-by: Stephen Boyd --- .../devicetree/bindings/clock/maxim,max77686.txt | 114 --------------------- 1 file changed, 114 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/maxim,max77686.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/maxim,max77686.txt b/Documentation/devicetree/bindings/clock/maxim,max77686.txt deleted file mode 100644 index c10849efb444..000000000000 --- a/Documentation/devicetree/bindings/clock/maxim,max77686.txt +++ /dev/null @@ -1,114 +0,0 @@ -Binding for Maxim MAX77686/MAX77802/MAX77620 32k clock generator block - -This is a part of device tree bindings of MAX77686/MAX77802/MAX77620 -multi-function device. More information can be found in MFD DT binding -doc as follows: - bindings/mfd/max77686.txt for MAX77686 and - bindings/mfd/max77802.txt for MAX77802 and - bindings/mfd/max77620.txt for MAX77620. - -The MAX77686 contains three 32.768khz clock outputs that can be controlled -(gated/ungated) over I2C. Clocks are defined as preprocessor macros in -dt-bindings/clock/maxim,max77686.h. - - -The MAX77802 contains two 32.768khz clock outputs that can be controlled -(gated/ungated) over I2C. Clocks are defined as preprocessor macros in -dt-bindings/clock/maxim,max77802.h. - -The MAX77686 contains one 32.768khz clock outputs that can be controlled -(gated/ungated) over I2C. Clocks are defined as preprocessor macros in -dt-bindings/clock/maxim,max77620.h. - -Following properties should be presend in main device node of the MFD chip. - -Required properties: - -- #clock-cells: from common clock binding; shall be set to 1. - -Optional properties: -- clock-output-names: From common clock binding. - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. Following indices are allowed: - - 0: 32khz_ap clock (max77686, max77802), 32khz_out0 (max77620) - - 1: 32khz_cp clock (max77686, max77802), - - 2: 32khz_pmic clock (max77686). - -Clocks are defined as preprocessor macros in above dt-binding header for -respective chips. - -Example: - -1. With MAX77686: - -#include -/* ... */ - - Node of the MFD chip - max77686: max77686@9 { - compatible = "maxim,max77686"; - interrupt-parent = <&wakeup_eint>; - interrupts = <26 IRQ_TYPE_LEVEL_LOW>; - reg = <0x09>; - #clock-cells = <1>; - - /* ... */ - }; - - Clock consumer node - - foo@0 { - compatible = "bar,foo"; - /* ... */ - clock-names = "my-clock"; - clocks = <&max77686 MAX77686_CLK_PMIC>; - }; - -2. With MAX77802: - -#include -/* ... */ - - Node of the MFD chip - max77802: max77802@9 { - compatible = "maxim,max77802"; - interrupt-parent = <&wakeup_eint>; - interrupts = <26 IRQ_TYPE_LEVEL_LOW>; - reg = <0x09>; - #clock-cells = <1>; - - /* ... */ - }; - - Clock consumer node - - foo@0 { - compatible = "bar,foo"; - /* ... */ - clock-names = "my-clock"; - clocks = <&max77802 MAX77802_CLK_32K_AP>; - }; - - -3. With MAX77620: - -#include -/* ... */ - - Node of the MFD chip - max77620: max77620@3c { - compatible = "maxim,max77620"; - reg = <0x3c>; - #clock-cells = <1>; - /* ... */ - }; - - Clock consumer node - - foo@0 { - compatible = "bar,foo"; - /* ... */ - clock-names = "my-clock"; - clocks = <&max77620 MAX77620_CLK_32K_OUT0>; - }; -- cgit v1.2.3 From 619ddc6935c151aae09d5a1fff3f447f75c08d93 Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Sat, 3 May 2025 10:09:49 +0200 Subject: dt-bindings: clock: convert bcm2835-aux-clock to yaml Convert the DT binding document for BCM2835 auxiliary peripheral clock from .txt to YAML. Signed-off-by: Stefan Wahren Link: https://lore.kernel.org/r/20250503080949.3945-1-wahrenst@gmx.net Acked-by: Conor Dooley [sboyd@kernel.org: Drop aux label] Signed-off-by: Stephen Boyd --- .../bindings/clock/brcm,bcm2835-aux-clock.txt | 31 -------------- .../bindings/clock/brcm,bcm2835-aux-clock.yaml | 47 ++++++++++++++++++++++ 2 files changed, 47 insertions(+), 31 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.txt create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.txt b/Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.txt deleted file mode 100644 index 4acfc8f641b6..000000000000 --- a/Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.txt +++ /dev/null @@ -1,31 +0,0 @@ -Broadcom BCM2835 auxiliary peripheral support - -This binding uses the common clock binding: - Documentation/devicetree/bindings/clock/clock-bindings.txt - -The auxiliary peripherals (UART, SPI1, and SPI2) have a small register -area controlling clock gating to the peripherals, and providing an IRQ -status register. - -Required properties: -- compatible: Should be "brcm,bcm2835-aux" -- #clock-cells: Should be <1>. The permitted clock-specifier values can be - found in include/dt-bindings/clock/bcm2835-aux.h -- reg: Specifies base physical address and size of the registers -- clocks: The parent clock phandle - -Example: - - clocks: cprman@7e101000 { - compatible = "brcm,bcm2835-cprman"; - #clock-cells = <1>; - reg = <0x7e101000 0x2000>; - clocks = <&clk_osc>; - }; - - aux: aux@7e215004 { - compatible = "brcm,bcm2835-aux"; - #clock-cells = <1>; - reg = <0x7e215000 0x8>; - clocks = <&clocks BCM2835_CLOCK_VPU>; - }; diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.yaml b/Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.yaml new file mode 100644 index 000000000000..0f4050ffa41c --- /dev/null +++ b/Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/brcm,bcm2835-aux-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM2835 auxiliary peripheral clock + +maintainers: + - Stefan Wahren + - Raspberry Pi Kernel Maintenance + +description: + The auxiliary peripherals (UART, SPI1, and SPI2) have a small register + area controlling clock gating to the peripherals, and providing an IRQ + status register. + +properties: + compatible: + const: brcm,bcm2835-aux + + reg: + maxItems: 1 + + "#clock-cells": + const: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - "#clock-cells" + - clocks + +additionalProperties: false + +examples: + - | + #include + clock@7e215000 { + compatible = "brcm,bcm2835-aux"; + reg = <0x7e215000 0x8>; + #clock-cells = <1>; + clocks = <&clocks BCM2835_CLOCK_VPU>; + }; -- cgit v1.2.3 From 72b421e645a3d8e68c92fb006ceb94b0c7b49896 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 11:19:32 -0500 Subject: dt-bindings: clock: Drop st,stm32h7-rcc.txt The binding is already covered by st,stm32-rcc.yaml. Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250505161933.1432791-1-robh@kernel.org Acked-by: Conor Dooley Signed-off-by: Stephen Boyd --- .../devicetree/bindings/clock/st,stm32h7-rcc.txt | 71 ---------------------- 1 file changed, 71 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/st,stm32h7-rcc.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/st,stm32h7-rcc.txt b/Documentation/devicetree/bindings/clock/st,stm32h7-rcc.txt deleted file mode 100644 index cac24ee10b72..000000000000 --- a/Documentation/devicetree/bindings/clock/st,stm32h7-rcc.txt +++ /dev/null @@ -1,71 +0,0 @@ -STMicroelectronics STM32H7 Reset and Clock Controller -===================================================== - -The RCC IP is both a reset and a clock controller. - -Please refer to clock-bindings.txt for common clock controller binding usage. -Please also refer to reset.txt for common reset controller binding usage. - -Required properties: -- compatible: Should be: - "st,stm32h743-rcc" - -- reg: should be register base and length as documented in the - datasheet - -- #reset-cells: 1, see below - -- #clock-cells : from common clock binding; shall be set to 1 - -- clocks: External oscillator clock phandle - - high speed external clock signal (HSE) - - low speed external clock signal (LSE) - - external I2S clock (I2S_CKIN) - -Optional properties: -- st,syscfg: phandle for pwrcfg, mandatory to disable/enable backup domain - write protection (RTC clock). - -Example: - - rcc: reset-clock-controller@58024400 { - compatible = "st,stm32h743-rcc", "st,stm32-rcc"; - reg = <0x58024400 0x400>; - #reset-cells = <1>; - #clock-cells = <1>; - clocks = <&clk_hse>, <&clk_lse>, <&clk_i2s_ckin>; - - st,syscfg = <&pwrcfg>; -}; - -The peripheral clock consumer should specify the desired clock by -having the clock ID in its "clocks" phandle cell. - -Example: - - timer5: timer@40000c00 { - compatible = "st,stm32-timer"; - reg = <0x40000c00 0x400>; - interrupts = <50>; - clocks = <&rcc TIM5_CK>; - }; - -Specifying softreset control of devices -======================================= - -Device nodes should specify the reset channel required in their "resets" -property, containing a phandle to the reset device node and an index specifying -which channel to use. -The index is the bit number within the RCC registers bank, starting from RCC -base address. -It is calculated as: index = register_offset / 4 * 32 + bit_offset. -Where bit_offset is the bit offset within the register. - -For example, for CRC reset: - crc = AHB4RSTR_offset / 4 * 32 + CRCRST_bit_offset = 0x88 / 4 * 32 + 19 = 1107 - -Example: - - timer2 { - resets = <&rcc STM32H7_APB1L_RESET(TIM2)>; - }; -- cgit v1.2.3 From 6d880961f5f9b84d13fb4a0208c7405966bc3489 Mon Sep 17 00:00:00 2001 From: Inochi Amaoto Date: Sun, 4 May 2025 18:45:50 +0800 Subject: dt-bindings: clock: sophgo: Use precise compatible for CV1800 series SoC As previous binding uses a wildcard compatible for existed clock device of CV1800 series SoC, it is not suitable for existed requirement. The only exception is sophgo,sg2000-clk, it does match a real device, so keep it as is. Add new precise compatible for existed clock devices of CV1800 series SoCs and make old wildcard compatible deprecated. Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250504104553.1447819-2-inochiama@gmail.com Signed-off-by: Inochi Amaoto Signed-off-by: Chen Wang Signed-off-by: Chen Wang --- .../devicetree/bindings/clock/sophgo,cv1800-clk.yaml | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/sophgo,cv1800-clk.yaml b/Documentation/devicetree/bindings/clock/sophgo,cv1800-clk.yaml index 59ef41adb539..379ce3e9e391 100644 --- a/Documentation/devicetree/bindings/clock/sophgo,cv1800-clk.yaml +++ b/Documentation/devicetree/bindings/clock/sophgo,cv1800-clk.yaml @@ -11,10 +11,18 @@ maintainers: properties: compatible: - enum: - - sophgo,cv1800-clk - - sophgo,cv1810-clk - - sophgo,sg2000-clk + oneOf: + - enum: + - sophgo,cv1800b-clk + - sophgo,cv1812h-clk + - sophgo,sg2000-clk + - items: + - const: sophgo,sg2002-clk + - const: sophgo,sg2000-clk + - const: sophgo,cv1800-clk + deprecated: true + - const: sophgo,cv1810-clk + deprecated: true reg: maxItems: 1 -- cgit v1.2.3 From e4b700d38957526fbcec6d7bb5890ad4c1192241 Mon Sep 17 00:00:00 2001 From: Inochi Amaoto Date: Fri, 18 Apr 2025 10:03:20 +0800 Subject: dt-bindings: soc: sophgo: Add SG2044 top syscon device The SG2044 top syscon device provide PLL clock control and some other misc feature of the SoC. Add the compatible string for SG2044 top syscon device. Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250418020325.421257-2-inochiama@gmail.com Signed-off-by: Inochi Amaoto Signed-off-by: Chen Wang Signed-off-by: Chen Wang --- .../soc/sophgo/sophgo,sg2044-top-syscon.yaml | 49 ++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2044-top-syscon.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2044-top-syscon.yaml b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2044-top-syscon.yaml new file mode 100644 index 000000000000..a82cc3cae576 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2044-top-syscon.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/sophgo/sophgo,sg2044-top-syscon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo SG2044 SoC TOP system controller + +maintainers: + - Inochi Amaoto + +description: + The Sophgo SG2044 TOP system controller is a hardware block grouping + multiple small functions, such as clocks and some other internal + function. + +properties: + compatible: + items: + - const: sophgo,sg2044-top-syscon + - const: syscon + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + '#clock-cells': + const: 1 + description: + See for valid clock. + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +additionalProperties: false + +examples: + - | + syscon@50000000 { + compatible = "sophgo,sg2044-top-syscon", "syscon"; + reg = <0x50000000 0x1000>; + #clock-cells = <1>; + clocks = <&osc>; + }; -- cgit v1.2.3 From 1a215904986e48ce04ac8f24ecb5b18cb6beaf43 Mon Sep 17 00:00:00 2001 From: Inochi Amaoto Date: Fri, 18 Apr 2025 10:03:22 +0800 Subject: dt-bindings: clock: sophgo: add clock controller for SG2044 The clock controller on the SG2044 provides common clock function for all IPs on the SoC. This device requires PLL clock to function normally. Add definition for the clock controller of the SG2044 SoC. Reviewed-by: Chen Wang Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250418020325.421257-4-inochiama@gmail.com Signed-off-by: Inochi Amaoto Signed-off-by: Chen Wang Signed-off-by: Chen Wang --- .../bindings/clock/sophgo,sg2044-clk.yaml | 99 ++++++++++++++++++++++ 1 file changed, 99 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/sophgo,sg2044-clk.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/sophgo,sg2044-clk.yaml b/Documentation/devicetree/bindings/clock/sophgo,sg2044-clk.yaml new file mode 100644 index 000000000000..272e58bdb62c --- /dev/null +++ b/Documentation/devicetree/bindings/clock/sophgo,sg2044-clk.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/sophgo,sg2044-clk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo SG2044 Clock Controller + +maintainers: + - Inochi Amaoto + +description: | + The Sophgo SG2044 clock controller requires an external oscillator + as input clock. + + All available clocks are defined as preprocessor macros in + include/dt-bindings/clock/sophgo,sg2044-clk.h + +properties: + compatible: + const: sophgo,sg2044-clk + + reg: + maxItems: 1 + + clocks: + items: + - description: fpll0 + - description: fpll1 + - description: fpll2 + - description: dpll0 + - description: dpll1 + - description: dpll2 + - description: dpll3 + - description: dpll4 + - description: dpll5 + - description: dpll6 + - description: dpll7 + - description: mpll0 + - description: mpll1 + - description: mpll2 + - description: mpll3 + - description: mpll4 + - description: mpll5 + + clock-names: + items: + - const: fpll0 + - const: fpll1 + - const: fpll2 + - const: dpll0 + - const: dpll1 + - const: dpll2 + - const: dpll3 + - const: dpll4 + - const: dpll5 + - const: dpll6 + - const: dpll7 + - const: mpll0 + - const: mpll1 + - const: mpll2 + - const: mpll3 + - const: mpll4 + - const: mpll5 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include + + clock-controller@50002000 { + compatible = "sophgo,sg2044-clk"; + reg = <0x50002000 0x1000>; + #clock-cells = <1>; + clocks = <&syscon CLK_FPLL0>, <&syscon CLK_FPLL1>, + <&syscon CLK_FPLL2>, <&syscon CLK_DPLL0>, + <&syscon CLK_DPLL1>, <&syscon CLK_DPLL2>, + <&syscon CLK_DPLL3>, <&syscon CLK_DPLL4>, + <&syscon CLK_DPLL5>, <&syscon CLK_DPLL6>, + <&syscon CLK_DPLL7>, <&syscon CLK_MPLL0>, + <&syscon CLK_MPLL1>, <&syscon CLK_MPLL2>, + <&syscon CLK_MPLL3>, <&syscon CLK_MPLL4>, + <&syscon CLK_MPLL5>; + clock-names = "fpll0", "fpll1", "fpll2", "dpll0", + "dpll1", "dpll2", "dpll3", "dpll4", + "dpll5", "dpll6", "dpll7", "mpll0", + "mpll1", "mpll2", "mpll3", "mpll4", + "mpll5"; + }; -- cgit v1.2.3 From 76517429dbfd8eca16fe85482cdb8024bbbd06bd Mon Sep 17 00:00:00 2001 From: Jingbao Qiu Date: Sat, 15 Mar 2025 23:49:12 +0100 Subject: dt-bindings: soc: sophgo: add RTC support for Sophgo CV1800 series Add RTC devicetree binding for Sophgo CV1800 series SoC. The device is called RTC, but contains control registers of other HW blocks in its address space, most notably of Power-on-Reset (PoR) module, DW8051 IP (MCU core), accompanying SRAM, hence putting it in SoC subsystem. Signed-off-by: Jingbao Qiu Signed-off-by: Alexander Sverdlin Reviewed-by: Krzysztof Kozlowski Reviewed-by: Inochi Amaoto Link: https://lore.kernel.org/r/20250315224921.3627852-2-alexander.sverdlin@gmail.com Signed-off-by: Inochi Amaoto Signed-off-by: Chen Wang Signed-off-by: Chen Wang --- .../bindings/soc/sophgo/sophgo,cv1800b-rtc.yaml | 86 ++++++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800b-rtc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800b-rtc.yaml b/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800b-rtc.yaml new file mode 100644 index 000000000000..5cf186c396c9 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800b-rtc.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sophgo/sophgo,cv1800b-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Real Time Clock of the Sophgo CV1800 SoC + +description: + The RTC (Real Time Clock) is an independently powered module in the chip. It + contains a 32KHz oscillator and a Power-On-Reset (POR) sub-module, which can + be used for time display and scheduled alarm produce. In addition, the + hardware state machine provides triggering and timing control for chip + power-on, power-off and reset. + + Furthermore, the 8051 subsystem is located within RTCSYS and is independently + powered. System software can use the 8051 to manage wake conditions and wake + the system while the system is asleep, and communicate with external devices + through peripheral controllers. + + Technical Reference Manual available at + https://github.com/sophgo/sophgo-doc/tree/main/SG200X/TRM + +maintainers: + - sophgo@lists.linux.dev + +allOf: + - $ref: /schemas/rtc/rtc.yaml# + +properties: + compatible: + items: + - const: sophgo,cv1800b-rtc + - const: syscon + + reg: + maxItems: 1 + + interrupts: + items: + - description: RTC Alarm + - description: RTC Longpress + - description: VBAT DET + + interrupt-names: + items: + - const: alarm + - const: longpress + - const: vbat + + clocks: + items: + - description: RTC clock source + - description: DW8051 MCU clock source + + clock-names: + items: + - const: rtc + - const: mcu + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + + rtc@5025000 { + compatible = "sophgo,cv1800b-rtc", "syscon"; + reg = <0x5025000 0x2000>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>, + <18 IRQ_TYPE_LEVEL_HIGH>, + <19 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "alarm", "longpress", "vbat"; + clocks = <&clk CLK_RTC_25M>, + <&clk CLK_SRC_RTC_SYS_0>; + clock-names = "rtc", "mcu"; + }; -- cgit v1.2.3 From 429ac6211494c12b668dac59811ea8a96db6d757 Mon Sep 17 00:00:00 2001 From: Jiri Pirko Date: Mon, 5 May 2025 13:45:11 +0200 Subject: devlink: define enum for attr types of dynamic attributes Devlink param and health reporter fmsg use attributes with dynamic type which is determined according to a different type. Currently used values are NLA_*. The problem is, they are not part of UAPI. They may change which would cause a break. To make this future safe, introduce a enum that shadows NLA_* values in it and is part of UAPI. Also, this allows to possibly carry types that are unrelated to NLA_* values. Signed-off-by: Saeed Mahameed Signed-off-by: Jiri Pirko Link: https://patch.msgid.link/20250505114513.53370-3-jiri@resnulli.us Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/devlink.yaml | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/devlink.yaml b/Documentation/netlink/specs/devlink.yaml index bd9726269b4f..05fee1b7fe19 100644 --- a/Documentation/netlink/specs/devlink.yaml +++ b/Documentation/netlink/specs/devlink.yaml @@ -202,6 +202,28 @@ definitions: name: exception - name: control + - + type: enum + name: var-attr-type + entries: + - + name: u8 + value: 1 + - + name: u16 + - + name: u32 + - + name: u64 + - + name: string + - + name: flag + - + name: nul_string + value: 10 + - + name: binary attribute-sets: - @@ -498,6 +520,7 @@ attribute-sets: - name: param-type type: u8 + enum: var-attr-type # TODO: fill in the attributes in between @@ -592,6 +615,7 @@ attribute-sets: - name: fmsg-obj-value-type type: u8 + enum: var-attr-type # TODO: fill in the attributes in between -- cgit v1.2.3 From f698ee1f40030118e3ae1af1a02fa76f79452b5c Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:48:12 -0500 Subject: dt-bindings: interrupt-controller: Convert openrisc,ompic to DT schema Convert the OpenRISC OMPIC interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Signed-off-by: Rob Herring (Arm) Signed-off-by: Stafford Horne --- .../interrupt-controller/openrisc,ompic.txt | 22 ----------- .../interrupt-controller/openrisc,ompic.yaml | 45 ++++++++++++++++++++++ 2 files changed, 45 insertions(+), 22 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt b/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt deleted file mode 100644 index caec07cc7149..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt +++ /dev/null @@ -1,22 +0,0 @@ -Open Multi-Processor Interrupt Controller - -Required properties: - -- compatible : This should be "openrisc,ompic" -- reg : Specifies base physical address and size of the register space. The - size is based on the number of cores the controller has been configured - to handle, this should be set to 8 bytes per cpu core. -- interrupt-controller : Identifies the node as an interrupt controller. -- #interrupt-cells : This should be set to 0 as this will not be an irq - parent. -- interrupts : Specifies the interrupt line to which the ompic is wired. - -Example: - -ompic: interrupt-controller@98000000 { - compatible = "openrisc,ompic"; - reg = <0x98000000 16>; - interrupt-controller; - #interrupt-cells = <0>; - interrupts = <1>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml b/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml new file mode 100644 index 000000000000..4efbfba3aa6b --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/openrisc,ompic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Open Multi-Processor Interrupt Controller + +maintainers: + - Stafford Horne + +properties: + compatible: + items: + - const: openrisc,ompic + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 0 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - interrupts + +additionalProperties: false + +examples: + - | + interrupt-controller@98000000 { + compatible = "openrisc,ompic"; + reg = <0x98000000 16>; + interrupt-controller; + #interrupt-cells = <0>; + interrupts = <1>; + }; -- cgit v1.2.3 From 40e71e32c8585e0b8655b14f09dd0cc24f6c2d8b Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Fri, 2 May 2025 14:45:05 +0700 Subject: Documentation: ioctl-number: Update outdated submission info Much like device numbers that used to be assigned by LANANA (see commit ebdf4040c16df5 ("Documentation: update the devices.txt documentation"), ioctl numbers list is maintained by general kernel community nowadays instead of contacting Michael directly as he's long stepped down from kernel-related activity (his last LKML message was from 2003 [1] and he's in CREDITS since the beginning of kernel's git history). Also, patch (including one to update ioctl numbers list) submission now follows process as described in Documentation/process/submitting-patches.rst rather than sending patches directly to Linus as in the distant past. Update the docs to reflect that. Link: https://lore.kernel.org/r/200305261446.h4QEkBVv023861@duracef.shout.net/ [1] Signed-off-by: Bagas Sanjaya Signed-off-by: Jonathan Corbet Message-ID: <20250502074504.26933-2-bagasdotme@gmail.com> --- Documentation/userspace-api/ioctl/ioctl-number.rst | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/userspace-api/ioctl/ioctl-number.rst b/Documentation/userspace-api/ioctl/ioctl-number.rst index 7a1409ecc238..83e5d2abdad6 100644 --- a/Documentation/userspace-api/ioctl/ioctl-number.rst +++ b/Documentation/userspace-api/ioctl/ioctl-number.rst @@ -28,10 +28,10 @@ or number from the table below. Because of the large number of drivers, many drivers share a partial letter with other drivers. If you are writing a driver for a new device and need a letter, pick an -unused block with enough room for expansion: 32 to 256 ioctl commands. -You can register the block by patching this file and submitting the -patch to Linus Torvalds. Or you can e-mail me at and -I'll register one for you. +unused block with enough room for expansion: 32 to 256 ioctl commands +should suffice. You can register the block by patching this file and +submitting the patch through :doc:`usual patch submission process +`. The second argument to _IO, _IOW, _IOR, or _IOWR is a sequence number to distinguish ioctls from each other. The third argument to _IOW, -- cgit v1.2.3 From a5b57bd9b1f9ff69327fa2e5bd272c8694e626fb Mon Sep 17 00:00:00 2001 From: Akira Yokosawa Date: Thu, 1 May 2025 17:21:07 +0900 Subject: docs: Makefile: Inherit PYTHONPYCACHEPREFIX setting as env variable Commit 6c2f0b28d76e ("docs: Makefile: store __pycache__ at the output directory") assigns a new path to PYTHONPYCACHEPREFIX for building kernel documentation. However, it is not necessarily optimal for everyone. If you find PYTHONPYCACHEPREFIX is already set, it strongly suggests that the developer has selected the setting as best suited for one's own workflow. Use "?=" in the assignment to PYTHONPYCACHEPREFIX so that the path of $(abspath $(BUILDDIR)/__pycache__) works only as a safeguard. Signed-off-by: Akira Yokosawa Cc: Mauro Carvalho Chehab Signed-off-by: Jonathan Corbet Message-ID: <0253ce98-960c-4498-8ace-a4354e3ebc26@gmail.com> --- Documentation/Makefile | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/Makefile b/Documentation/Makefile index 59e95ebae786..d30d66ddf1ad 100644 --- a/Documentation/Makefile +++ b/Documentation/Makefile @@ -82,9 +82,11 @@ loop_cmd = $(echo-cmd) $(cmd_$(1)) || exit; # $5 reST source folder relative to $(src), # e.g. "userspace-api/media" for the linux-tv book-set at ./Documentation/userspace-api/media +PYTHONPYCACHEPREFIX ?= $(abspath $(BUILDDIR)/__pycache__) + quiet_cmd_sphinx = SPHINX $@ --> file://$(abspath $(BUILDDIR)/$3/$4) cmd_sphinx = $(MAKE) BUILDDIR=$(abspath $(BUILDDIR)) $(build)=Documentation/userspace-api/media $2 && \ - PYTHONPYCACHEPREFIX=$(abspath $(BUILDDIR)/__pycache__) \ + PYTHONPYCACHEPREFIX="$(PYTHONPYCACHEPREFIX)" \ BUILDDIR=$(abspath $(BUILDDIR)) SPHINX_CONF=$(abspath $(src)/$5/$(SPHINX_CONF)) \ $(PYTHON3) $(srctree)/scripts/jobserver-exec \ $(CONFIG_SHELL) $(srctree)/Documentation/sphinx/parallel-wrapper.sh \ -- cgit v1.2.3 From 8f82b560c568981deab258f927cad02594aae8c6 Mon Sep 17 00:00:00 2001 From: Alexander Shatalin Date: Wed, 30 Apr 2025 14:27:26 +0000 Subject: docs: fix typo in firmware-related section Fix a minor grammar issue by changing 'firmwares' to 'firmware' in the Documentation/index.rst file. Signed-off-by: Alexander Shatalin Signed-off-by: Jonathan Corbet Message-ID: <20250430142726.3276-1-sashatalin03@gmail.com> --- Documentation/index.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/index.rst b/Documentation/index.rst index f9f525f4c0dd..c0cf79a87c3a 100644 --- a/Documentation/index.rst +++ b/Documentation/index.rst @@ -84,7 +84,7 @@ which are kept separately from the kernel's own documentation. Firmware-related documentation ============================== The following holds information on the kernel's expectations regarding the -platform firmwares. +platform firmware. .. toctree:: :maxdepth: 1 -- cgit v1.2.3 From 422f5b78bfb16e6e207d5f280ee75517ca365458 Mon Sep 17 00:00:00 2001 From: Jean-Michel Hautbois Date: Mon, 21 Apr 2025 18:48:10 +0200 Subject: Documentation: leds: improve readibility of multicolor doc When reading the documentation of multicolor leds, the HTML output is not easy to read. Improve it by adding a few markups, splitting the console in a dedicated block. Signed-off-by: Jean-Michel Hautbois Signed-off-by: Jonathan Corbet Message-ID: <20250421-leds-doc-v1-1-9a32df7fc6f4@yoseli.org> --- Documentation/leds/leds-class-multicolor.rst | 82 +++++++++++++++++----------- 1 file changed, 51 insertions(+), 31 deletions(-) (limited to 'Documentation') diff --git a/Documentation/leds/leds-class-multicolor.rst b/Documentation/leds/leds-class-multicolor.rst index c57b98bfd387..c6b47b4093c4 100644 --- a/Documentation/leds/leds-class-multicolor.rst +++ b/Documentation/leds/leds-class-multicolor.rst @@ -18,24 +18,28 @@ array. These files are children under the LED parent node created by the led_class framework. The led_class framework is documented in led-class.rst within this documentation directory. -Each colored LED will be indexed under the multi_* files. The order of the -colors will be arbitrary. The multi_index file can be read to determine the +Each colored LED will be indexed under the ``multi_*`` files. The order of the +colors will be arbitrary. The ``multi_index`` file can be read to determine the color name to indexed value. -The multi_index file is an array that contains the string list of the colors as -they are defined in each multi_* array file. +The ``multi_index`` file is an array that contains the string list of the colors as +they are defined in each ``multi_*`` array file. -The multi_intensity is an array that can be read or written to for the +The ``multi_intensity`` is an array that can be read or written to for the individual color intensities. All elements within this array must be written in order for the color LED intensities to be updated. Directory Layout Example ======================== -root:/sys/class/leds/multicolor:status# ls -lR --rw-r--r-- 1 root root 4096 Oct 19 16:16 brightness --r--r--r-- 1 root root 4096 Oct 19 16:16 max_brightness --r--r--r-- 1 root root 4096 Oct 19 16:16 multi_index --rw-r--r-- 1 root root 4096 Oct 19 16:16 multi_intensity +.. code-block:: console + + root:/sys/class/leds/multicolor:status# ls -lR + -rw-r--r-- 1 root root 4096 Oct 19 16:16 brightness + -r--r--r-- 1 root root 4096 Oct 19 16:16 max_brightness + -r--r--r-- 1 root root 4096 Oct 19 16:16 multi_index + -rw-r--r-- 1 root root 4096 Oct 19 16:16 multi_intensity + +.. Multicolor Class Brightness Control =================================== @@ -43,27 +47,31 @@ The brightness level for each LED is calculated based on the color LED intensity setting divided by the global max_brightness setting multiplied by the requested brightness. -led_brightness = brightness * multi_intensity/max_brightness +``led_brightness = brightness * multi_intensity/max_brightness`` Example: A user first writes the multi_intensity file with the brightness levels for each LED that are necessary to achieve a certain color output from a multicolor LED group. -cat /sys/class/leds/multicolor:status/multi_index -green blue red +.. code-block:: console + + # cat /sys/class/leds/multicolor:status/multi_index + green blue red -echo 43 226 138 > /sys/class/leds/multicolor:status/multi_intensity + # echo 43 226 138 > /sys/class/leds/multicolor:status/multi_intensity -red - - intensity = 138 - max_brightness = 255 -green - - intensity = 43 - max_brightness = 255 -blue - - intensity = 226 - max_brightness = 255 + red - + intensity = 138 + max_brightness = 255 + green - + intensity = 43 + max_brightness = 255 + blue - + intensity = 226 + max_brightness = 255 + +.. The user can control the brightness of that multicolor LED group by writing the global 'brightness' control. Assuming a max_brightness of 255 the user @@ -71,16 +79,28 @@ may want to dim the LED color group to half. The user would write a value of 128 to the global brightness file then the values written to each LED will be adjusted base on this value. -cat /sys/class/leds/multicolor:status/max_brightness -255 -echo 128 > /sys/class/leds/multicolor:status/brightness +.. code-block:: console + + # cat /sys/class/leds/multicolor:status/max_brightness + 255 + # echo 128 > /sys/class/leds/multicolor:status/brightness -adjusted_red_value = 128 * 138/255 = 69 -adjusted_green_value = 128 * 43/255 = 21 -adjusted_blue_value = 128 * 226/255 = 113 +.. + +.. code-block:: none + + adjusted_red_value = 128 * 138/255 = 69 + adjusted_green_value = 128 * 43/255 = 21 + adjusted_blue_value = 128 * 226/255 = 113 + +.. Reading the global brightness file will return the current brightness value of the color LED group. -cat /sys/class/leds/multicolor:status/brightness -128 +.. code-block:: console + + # cat /sys/class/leds/multicolor:status/brightness + 128 + +.. -- cgit v1.2.3 From fea017a99ba5e28b23f8249c04b2f475e4ed1fb3 Mon Sep 17 00:00:00 2001 From: Kendra Moore Date: Sun, 20 Apr 2025 21:02:05 -0400 Subject: docs: dmaengine: add explanation for DMA_ASYNC_TX capability This patch replaces the TODO for DMA_ASYNC_TX in the DMA engine provider documentation. The flag is automatically set by the DMA framework when a device supports key asynchronous memory-to-memory operations such as memcpy, memset, xor, pq, xor_val, and pq_val. It must not be set by drivers directly. Signed-off-by: Kendra Moore Signed-off-by: Jonathan Corbet Message-ID: <20250421010205.84719-1-kendra.j.moore3443@gmail.com> --- Documentation/driver-api/dmaengine/provider.rst | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst index 3085f8b460fa..8f0910668ca3 100644 --- a/Documentation/driver-api/dmaengine/provider.rst +++ b/Documentation/driver-api/dmaengine/provider.rst @@ -217,10 +217,12 @@ Currently, the types available are: - DMA_ASYNC_TX - - Must not be set by the device, and will be set by the framework - if needed + - The device supports asynchronous memory-to-memory operations, + including memcpy, memset, xor, pq, xor_val, and pq_val. - - TODO: What is it about? + - This capability is automatically set by the DMA engine + framework and must not be configured manually by device + drivers. - DMA_SLAVE -- cgit v1.2.3 From 4a98ec836a201d34ac27636960c2c81d9b3b7e19 Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Mon, 28 Apr 2025 10:58:30 +0200 Subject: dt-bindings: memory-controllers: Add STM32 Octo Memory Manager controller Add bindings for STM32 Octo Memory Manager (OMM) controller. OMM manages: - the muxing between 2 OSPI busses and 2 output ports. There are 4 possible muxing configurations: - direct mode (no multiplexing): OSPI1 output is on port 1 and OSPI2 output is on port 2 - OSPI1 and OSPI2 are multiplexed over the same output port 1 - swapped mode (no multiplexing), OSPI1 output is on port 2, OSPI2 output is on port 1 - OSPI1 and OSPI2 are multiplexed over the same output port 2 - the split of the memory area shared between the 2 OSPI instances. - chip select selection override. - the time between 2 transactions in multiplexed mode. Signed-off-by: Patrice Chotard Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250428-upstream_ospi_v6-v11-1-1548736fd9d2@foss.st.com Signed-off-by: Krzysztof Kozlowski --- .../memory-controllers/st,stm32mp25-omm.yaml | 226 +++++++++++++++++++++ 1 file changed, 226 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/st,stm32mp25-omm.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/memory-controllers/st,stm32mp25-omm.yaml b/Documentation/devicetree/bindings/memory-controllers/st,stm32mp25-omm.yaml new file mode 100644 index 000000000000..344878db8818 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/st,stm32mp25-omm.yaml @@ -0,0 +1,226 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/st,stm32mp25-omm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STM32 Octo Memory Manager (OMM) + +maintainers: + - Patrice Chotard + +description: | + The STM32 Octo Memory Manager is a low-level interface that enables an + efficient OCTOSPI pin assignment with a full I/O matrix (before alternate + function map) and multiplex of single/dual/quad/octal SPI interfaces over + the same bus. It Supports up to: + - Two single/dual/quad/octal SPI interfaces + - Two ports for pin assignment + +properties: + compatible: + const: st,stm32mp25-omm + + "#address-cells": + const: 2 + + "#size-cells": + const: 1 + + ranges: + description: | + Reflects the memory layout per OSPI instance. + Format: + 0 + minItems: 2 + maxItems: 2 + + reg: + items: + - description: OMM registers + - description: OMM memory map area + + reg-names: + items: + - const: regs + - const: memory_map + + memory-region: + description: + Memory region shared between the 2 OCTOSPI instance. + One or two phandle to a node describing a memory mapped region + depending of child number. + minItems: 1 + maxItems: 2 + + memory-region-names: + description: + Identify to which OSPI instance the memory region belongs to. + items: + enum: [ospi1, ospi2] + minItems: 1 + maxItems: 2 + + clocks: + maxItems: 3 + + clock-names: + items: + - const: omm + - const: ospi1 + - const: ospi2 + + resets: + maxItems: 3 + + reset-names: + items: + - const: omm + - const: ospi1 + - const: ospi2 + + access-controllers: + maxItems: 1 + + power-domains: + maxItems: 1 + + st,syscfg-amcr: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + The Address Mapping Control Register (AMCR) is used to split the 256MB + memory map area shared between the 2 OSPI instance. The Octo Memory + Manager sets the AMCR depending of the memory-region configuration. + The memory split bitmask description is: + - 000: OCTOSPI1 (256 Mbytes), OCTOSPI2 unmapped + - 001: OCTOSPI1 (192 Mbytes), OCTOSPI2 (64 Mbytes) + - 010: OCTOSPI1 (128 Mbytes), OCTOSPI2 (128 Mbytes) + - 011: OCTOSPI1 (64 Mbytes), OCTOSPI2 (192 Mbytes) + - 1xx: OCTOSPI1 unmapped, OCTOSPI2 (256 Mbytes) + items: + - items: + - description: phandle to syscfg + - description: register offset within syscfg + - description: register bitmask for memory split + + st,omm-req2ack-ns: + description: + In multiplexed mode (MUXEN = 1), this field defines the time in + nanoseconds between two transactions. + default: 0 + + st,omm-cssel-ovr: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Configure the chip select selector override for the 2 OCTOSPIs. + - 0: OCTOSPI1 chip select send to NCS1 OCTOSPI2 chip select send to NCS1 + - 1: OCTOSPI1 chip select send to NCS2 OCTOSPI2 chip select send to NCS1 + - 2: OCTOSPI1 chip select send to NCS1 OCTOSPI2 chip select send to NCS2 + - 3: OCTOSPI1 chip select send to NCS2 OCTOSPI2 chip select send to NCS2 + minimum: 0 + maximum: 3 + default: 0 + + st,omm-mux: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Configure the muxing between the 2 OCTOSPIs busses and the 2 output ports. + - 0: direct mode + - 1: mux OCTOSPI1 and OCTOSPI2 to port 1 + - 2: swapped mode + - 3: mux OCTOSPI1 and OCTOSPI2 to port 2 + minimum: 0 + maximum: 3 + default: 0 + +patternProperties: + ^spi@[0-9]: + type: object + $ref: /schemas/spi/st,stm32mp25-ospi.yaml# + description: Required spi child node + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - clocks + - clock-names + - resets + - reset-names + - st,syscfg-amcr + - ranges + +additionalProperties: false + +examples: + - | + #include + #include + #include + ommanager@40500000 { + compatible = "st,stm32mp25-omm"; + reg = <0x40500000 0x400>, <0x60000000 0x10000000>; + reg-names = "regs", "memory_map"; + ranges = <0 0 0x40430000 0x400>, + <1 0 0x40440000 0x400>; + memory-region = <&mm_ospi1>, <&mm_ospi2>; + memory-region-names = "ospi1", "ospi2"; + pinctrl-0 = <&ospi_port1_clk_pins_a + &ospi_port1_io03_pins_a + &ospi_port1_cs0_pins_a>; + pinctrl-1 = <&ospi_port1_clk_sleep_pins_a + &ospi_port1_io03_sleep_pins_a + &ospi_port1_cs0_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + clocks = <&rcc CK_BUS_OSPIIOM>, + <&scmi_clk CK_SCMI_OSPI1>, + <&scmi_clk CK_SCMI_OSPI2>; + clock-names = "omm", "ospi1", "ospi2"; + resets = <&rcc OSPIIOM_R>, + <&scmi_reset RST_SCMI_OSPI1>, + <&scmi_reset RST_SCMI_OSPI2>; + reset-names = "omm", "ospi1", "ospi2"; + access-controllers = <&rifsc 111>; + power-domains = <&CLUSTER_PD>; + #address-cells = <2>; + #size-cells = <1>; + st,syscfg-amcr = <&syscfg 0x2c00 0x7>; + st,omm-req2ack-ns = <0>; + st,omm-mux = <0>; + st,omm-cssel-ovr = <0>; + + spi@0 { + compatible = "st,stm32mp25-ospi"; + reg = <0 0 0x400>; + memory-region = <&mm_ospi1>; + interrupts = ; + dmas = <&hpdma 2 0x62 0x00003121 0x0>, + <&hpdma 2 0x42 0x00003112 0x0>; + dma-names = "tx", "rx"; + clocks = <&scmi_clk CK_SCMI_OSPI1>; + resets = <&scmi_reset RST_SCMI_OSPI1>, <&scmi_reset RST_SCMI_OSPI1DLL>; + access-controllers = <&rifsc 74>; + power-domains = <&CLUSTER_PD>; + #address-cells = <1>; + #size-cells = <0>; + st,syscfg-dlyb = <&syscfg 0x1000>; + }; + + spi@1 { + compatible = "st,stm32mp25-ospi"; + reg = <1 0 0x400>; + memory-region = <&mm_ospi1>; + interrupts = ; + dmas = <&hpdma 3 0x62 0x00003121 0x0>, + <&hpdma 3 0x42 0x00003112 0x0>; + dma-names = "tx", "rx"; + clocks = <&scmi_clk CK_KER_OSPI2>; + resets = <&scmi_reset RST_SCMI_OSPI2>, <&scmi_reset RST_SCMI_OSPI1DLL>; + access-controllers = <&rifsc 75>; + power-domains = <&CLUSTER_PD>; + #address-cells = <1>; + #size-cells = <0>; + st,syscfg-dlyb = <&syscfg 0x1000>; + }; + }; -- cgit v1.2.3 From a6aed6b9c79e57064fa8c028662214b436578e80 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Mon, 14 Apr 2025 14:30:58 -0400 Subject: dt-bindings: PCI: pci-ep: Add support for iommu-map and msi-map Document the use of (msi|iommu)-map for PCI Endpoint (EP) controllers, which can use MSI as a doorbell mechanism. Each EP controller can support up to 8 physical functions and 65,536 virtual functions. Define how to construct device IDs using function bits [2:0] and virtual function index bits [31:3], enabling (msi|iommu)-map to associate each child device with a specific (msi|iommu)-specifier. The EP cannot rely on PCI Requester ID (RID) because the RID is determined by the PCI topology of the host system. Since the EP may be connected to different PCI hosts, the RID can vary between systems and is therefore not a reliable identifier. Signed-off-by: Frank Li Signed-off-by: Thomas Gleixner Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/all/20250414-ep-msi-v18-4-f69b49917464@nxp.com --- Documentation/devicetree/bindings/pci/pci-ep.yaml | 68 +++++++++++++++++++++++ 1 file changed, 68 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/pci-ep.yaml b/Documentation/devicetree/bindings/pci/pci-ep.yaml index f75000e3093d..214caa4ec3d5 100644 --- a/Documentation/devicetree/bindings/pci/pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/pci-ep.yaml @@ -17,6 +17,24 @@ properties: $nodename: pattern: "^pcie-ep@" + iommu-map: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: Device ID (see msi-map) base + maximum: 0x7ffff + - description: phandle to IOMMU + - description: IOMMU specifier base (currently always 1 cell) + - description: Number of Device IDs + maximum: 0x80000 + + iommu-map-mask: + description: + A mask to be applied to each Device ID prior to being mapped to an + IOMMU specifier per the iommu-map property. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 0x7ffff + max-functions: description: Maximum number of functions that can be configured $ref: /schemas/types.yaml#/definitions/uint8 @@ -35,6 +53,56 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 enum: [ 1, 2, 3, 4 ] + msi-map: + description: | + Maps a Device ID to an MSI and associated MSI specifier data. + + A PCI Endpoint (EP) can use MSI as a doorbell function. This is achieved by + mapping the MSI controller's address into PCI BAR. The PCI Root Complex + can write to this BAR, triggering the EP to generate IRQ. This notifies + the EP-side driver of an event, eliminating the need for the driver to + continuously poll for status changes. + + However, the EP cannot rely on Requester ID (RID) because the RID is + determined by the PCI topology of the host system. Since the EP may be + connected to different PCI hosts, the RID can vary between systems and is + therefore not a reliable identifier. + + Each EP can support up to 8 physical functions and up to 65,536 virtual + functions. To uniquely identify each child device, a device ID is defined + as + - Bits [2:0] for the function number (func) + - Bits [18:3] for the virtual function index (vfunc) + + The resulting device ID is computed as: + + (func & 0x7) | (vfunc << 3) + + The property is an arbitrary number of tuples of + (device-id-base, msi, msi-base,length). + + Any Device ID id in the interval [id-base, id-base + length) is + associated with the listed MSI, with the MSI specifier + (id - id-base + msi-base). + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: The Device ID base matched by the entry + maximum: 0x7ffff + - description: phandle to msi-controller node + - description: (optional) The msi-specifier produced for the first + Device ID matched by the entry. Currently, msi-specifier is 0 or + 1 cells. + - description: The length of consecutive Device IDs following the + Device ID base + maximum: 0x80000 + + msi-map-mask: + description: A mask to be applied to each Device ID prior to being + mapped to an msi-specifier per the msi-map property. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 0x7ffff + num-lanes: description: maximum number of lanes $ref: /schemas/types.yaml#/definitions/uint32 -- cgit v1.2.3 From bd4718d97d308fdc20ddcd471444b3e398ce877d Mon Sep 17 00:00:00 2001 From: Danila Tikhonov Date: Wed, 23 Apr 2025 00:31:35 +0300 Subject: dt-bindings: arm: qcom: Add SM7150 Google Pixel 4a Google Pixel 4a (google,sunfish) is a smartphone based on the SM7150 SoC Signed-off-by: Danila Tikhonov Link: https://lore.kernel.org/r/20250422213137.80366-15-danila@jiaxyga.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index bb589021a97a..a61c85a47e2e 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -90,6 +90,7 @@ description: | sm6350 sm6375 sm7125 + sm7150 sm7225 sm7325 sm8150 @@ -1040,6 +1041,11 @@ properties: - xiaomi,joyeuse - const: qcom,sm7125 + - items: + - enum: + - google,sunfish + - const: qcom,sm7150 + - items: - enum: - fairphone,fp4 -- cgit v1.2.3 From 1b4bb451f3adeb7e5fb86c09cd83609638964b68 Mon Sep 17 00:00:00 2001 From: Michal Wilczynski Date: Thu, 3 Apr 2025 11:44:23 +0200 Subject: dt-bindings: clock: thead: Add TH1520 VO clock controller Add device tree bindings for the TH1520 Video Output (VO) subsystem clock controller. The VO sub-system manages clock gates for multimedia components including HDMI, MIPI, and GPU. Document the VIDEO_PLL requirements for the VO clock controller, which receives its input from the AP clock controller. The VIDEO_PLL is a Silicon Creations Sigma-Delta (integer) PLL typically running at 792 MHz with maximum FOUTVCO of 2376 MHz. This binding complements the existing AP sub-system clock controller which manages CPU, DPU, GMAC and TEE PLLs. Reviewed-by: Krzysztof Kozlowski Acked-by: Conor Dooley Signed-off-by: Michal Wilczynski Reviewed-by: Drew Fustini Signed-off-by: Drew Fustini --- .../devicetree/bindings/clock/thead,th1520-clk-ap.yaml | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml b/Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml index 0129bd0ba4b3..9d058c00ab3d 100644 --- a/Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml +++ b/Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml @@ -8,7 +8,8 @@ title: T-HEAD TH1520 AP sub-system clock controller description: | The T-HEAD TH1520 AP sub-system clock controller configures the - CPU, DPU, GMAC and TEE PLLs. + CPU, DPU, GMAC and TEE PLLs. Additionally the VO subsystem configures + the clock gates for the HDMI, MIPI and the GPU. SoC reference manual https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf @@ -20,14 +21,24 @@ maintainers: properties: compatible: - const: thead,th1520-clk-ap + enum: + - thead,th1520-clk-ap + - thead,th1520-clk-vo reg: maxItems: 1 clocks: items: - - description: main oscillator (24MHz) + - description: | + One input clock: + - For "thead,th1520-clk-ap": the clock input must be the 24 MHz + main oscillator. + - For "thead,th1520-clk-vo": the clock input must be the VIDEO_PLL, + which is configured by the AP clock controller. According to the + TH1520 manual, VIDEO_PLL is a Silicon Creations Sigma-Delta PLL + (integer PLL) typically running at 792 MHz (FOUTPOSTDIV), with + a maximum FOUTVCO of 2376 MHz. "#clock-cells": const: 1 -- cgit v1.2.3 From 252c4711973de4e4f3ecddcc18912aecfd4e537c Mon Sep 17 00:00:00 2001 From: Raag Jadav Date: Tue, 6 May 2025 11:18:35 +0530 Subject: drm/xe/doc: Wire up PCIe Gen5 limitations Append PCIe Gen5 limitations to xe_firmware document. Signed-off-by: Raag Jadav Reviewed-by: Rodrigo Vivi Link: https://lore.kernel.org/r/20250506054835.3395220-4-raag.jadav@intel.com Signed-off-by: Rodrigo Vivi --- Documentation/gpu/xe/xe_firmware.rst | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/gpu/xe/xe_firmware.rst b/Documentation/gpu/xe/xe_firmware.rst index afcb561cd37d..5d23e9f27391 100644 --- a/Documentation/gpu/xe/xe_firmware.rst +++ b/Documentation/gpu/xe/xe_firmware.rst @@ -31,6 +31,12 @@ GuC Power Conservation (PC) .. kernel-doc:: drivers/gpu/drm/xe/xe_guc_pc.c :doc: GuC Power Conservation (PC) +PCIe Gen5 Limitations +===================== + +.. kernel-doc:: drivers/gpu/drm/xe/xe_device_sysfs.c + :doc: PCIe Gen5 Limitations + Internal API ============ -- cgit v1.2.3 From fdccdb6578991b2ba770390957ca04c59f9bfff6 Mon Sep 17 00:00:00 2001 From: Srinivas Pandruvada Date: Mon, 28 Apr 2025 17:01:10 -0700 Subject: thermal: int340x: processor_thermal: Platform temperature control documentation Update documentation of attributes for platform temperature control. Signed-off-by: Srinivas Pandruvada Link: https://patch.msgid.link/20250429000110.236243-4-srinivas.pandruvada@linux.intel.com Signed-off-by: Rafael J. Wysocki --- Documentation/driver-api/thermal/intel_dptf.rst | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'Documentation') diff --git a/Documentation/driver-api/thermal/intel_dptf.rst b/Documentation/driver-api/thermal/intel_dptf.rst index 8fb8c5b2d685..ec5769accae0 100644 --- a/Documentation/driver-api/thermal/intel_dptf.rst +++ b/Documentation/driver-api/thermal/intel_dptf.rst @@ -191,6 +191,27 @@ ABI. User space can specify any one of the available workload type using this interface. +:file:`/sys/bus/pci/devices/0000\:00\:04.0/ptc_0_control` +:file:`/sys/bus/pci/devices/0000\:00\:04.0/ptc_1_control` +:file:`/sys/bus/pci/devices/0000\:00\:04.0/ptc_2_control` + +All these controls needs admin privilege to update. + +``enable`` (RW) + 1 for enable, 0 for disable. Shows the current enable status of + platform temperature control feature. User space can enable/disable + hardware controls. + +``temperature_target`` (RW) + Update a new temperature target in milli degree celsius for hardware to + use for the temperature control. + +Given that this is platform temperature control, it is expected that a +single user-level manager owns and manages the controls. If multiple +user-level software applications attempt to write different targets, it +can lead to unexpected behavior. + + DPTF Processor thermal RFIM interface -------------------------------------------- -- cgit v1.2.3 From 4528b9052731f14c1a9be16b98e33c9401e6d1bc Mon Sep 17 00:00:00 2001 From: "Darrick J. Wong" Date: Wed, 7 May 2025 14:18:34 -0700 Subject: xfs: allow sysadmins to specify a maximum atomic write limit at mount time Introduce a mount option to allow sysadmins to specify the maximum size of an atomic write. If the filesystem can work with the supplied value, that becomes the new guaranteed maximum. The value mustn't be too big for the existing filesystem geometry (max write size, max AG/rtgroup size). We dynamically recompute the tr_atomic_write transaction reservation based on the given block size, check that the current log size isn't less than the new minimum log size constraints, and set a new maximum. The actual software atomic write max is still computed based off of tr_atomic_ioend the same way it has for the past few commits. Note also that xfs_calc_atomic_write_log_geometry is non-static because mkfs will need that. Signed-off-by: Darrick J. Wong Signed-off-by: John Garry Reviewed-by: John Garry --- Documentation/admin-guide/xfs.rst | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/xfs.rst b/Documentation/admin-guide/xfs.rst index 5becb441c3cb..a18328a5fb93 100644 --- a/Documentation/admin-guide/xfs.rst +++ b/Documentation/admin-guide/xfs.rst @@ -151,6 +151,17 @@ When mounting an XFS filesystem, the following options are accepted. optional, and the log section can be separate from the data section or contained within it. + max_atomic_write=value + Set the maximum size of an atomic write. The size may be + specified in bytes, in kilobytes with a "k" suffix, in megabytes + with a "m" suffix, or in gigabytes with a "g" suffix. The size + cannot be larger than the maximum write size, larger than the + size of any allocation group, or larger than the size of a + remapping operation that the log can complete atomically. + + The default value is to set the maximum I/O completion size + to allow each CPU to handle one at a time. + max_open_zones=value Specify the max number of zones to keep open for writing on a zoned rt device. Many open zones aids file data separation -- cgit v1.2.3 From dd3d035a78384f7389020810ac2882de50efe934 Mon Sep 17 00:00:00 2001 From: Rodrigo Siqueira Date: Sat, 3 May 2025 14:38:43 -0600 Subject: Documentation/gpu: Add new entries to amdgpu glossary Add some additional entries. Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/amdgpu-glossary.rst | 33 ++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst b/Documentation/gpu/amdgpu/amdgpu-glossary.rst index 8e6af7cc76c2..2040da593b14 100644 --- a/Documentation/gpu/amdgpu/amdgpu-glossary.rst +++ b/Documentation/gpu/amdgpu/amdgpu-glossary.rst @@ -24,6 +24,9 @@ we have a dedicated glossary for Display Core at CIK Sea Islands + CB + Color Buffer + CP Command Processor @@ -39,6 +42,9 @@ we have a dedicated glossary for Display Core at CU Compute Unit + DB + Depth Buffer + DFS Digital Frequency Synthesizer @@ -63,6 +69,12 @@ we have a dedicated glossary for Display Core at GC Graphics and Compute + GDS + Global Data Share + + GE + Geometry Engine + GMC Graphic Memory Controller @@ -128,6 +140,9 @@ we have a dedicated glossary for Display Core at MQD Memory Queue Descriptor + PA + Primitive Assembler / Physical Address + PFP Pre-Fetch Parser (Graphics) @@ -146,6 +161,9 @@ we have a dedicated glossary for Display Core at the GFX block. It's involved in GFX power management and SR-IOV, among other things. + SC + Scan Converter + SDMA System DMA @@ -164,6 +182,9 @@ we have a dedicated glossary for Display Core at SMU/SMC System Management Unit / System Management Controller + SPI + Shader Processor Input + SRLC Save/Restore List Control @@ -176,6 +197,9 @@ we have a dedicated glossary for Display Core at SS Spread Spectrum + SX + Shader Export + TA Trusted Application @@ -185,6 +209,9 @@ we have a dedicated glossary for Display Core at TOC Table of Contents + UMSCH + User Mode Scheduler + UVD Unified Video Decoder @@ -202,3 +229,9 @@ we have a dedicated glossary for Display Core at VPE Video Processing Engine + + XCC + Accelerator Core Complex + + XCP + Accelerator Core Partition -- cgit v1.2.3 From be816bc4f8413f227a48278f14693674d9296fe2 Mon Sep 17 00:00:00 2001 From: Corey Minyard Date: Tue, 15 Apr 2025 19:56:27 -0500 Subject: Documentation:ipmi: Remove comments about interrupt level Callbacks no longer run at interrupt level or bh, so remove those comments. Signed-off-by: Corey Minyard --- Documentation/driver-api/ipmi.rst | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/ipmi.rst b/Documentation/driver-api/ipmi.rst index dfa021eacd63..3a533cd2ef60 100644 --- a/Documentation/driver-api/ipmi.rst +++ b/Documentation/driver-api/ipmi.rst @@ -280,10 +280,8 @@ Creating the User To use the message handler, you must first create a user using ipmi_create_user. The interface number specifies which SMI you want to connect to, and you must supply callback functions to be called -when data comes in. The callback function can run at interrupt level, -so be careful using the callbacks. This also allows to you pass in a -piece of data, the handler_data, that will be passed back to you on -all calls. +when data comes in. This also allows to you pass in a piece of data, +the handler_data, that will be passed back to you on all calls. Once you are done, call ipmi_destroy_user() to get rid of the user. @@ -303,8 +301,7 @@ use it for anything you like. Responses come back in the function pointed to by the ipmi_recv_hndl field of the "handler" that you passed in to ipmi_create_user(). -Remember again, these may be running at interrupt level. Remember to -look at the receive type, too. +Remember to look at the receive type, too. From userland, you fill out an ipmi_req_t structure and use the IPMICTL_SEND_COMMAND ioctl. For incoming stuff, you can use select() -- cgit v1.2.3 From f22e764d7775b9f6e0ffd7d944d9c740156d5f34 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 6 May 2025 12:40:57 -0700 Subject: netlink: specs: nl80211: drop structs which are not uAPI C codegen will soon use structs for binary types. A handful of structs in WiFi carry information elements from the wire, defined by the standard. The structs are not part of uAPI, so we can't use them in C directly. We could add them to the uAPI or add some annotation to tell the codegen to output a local version to the user header. The former seems arbitrary since we don't expose structs for most of the standard. The latter seems like a lot of work for a rare occurrence. Drop the struct info for now. Reviewed-by: Donald Hunter Link: https://lore.kernel.org/004030652d592b379e730be2f0344bebc4a03475.camel@sipsolutions.net Link: https://patch.msgid.link/20250506194101.696272-2-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/nl80211.yaml | 68 -------------------------------- 1 file changed, 68 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/nl80211.yaml b/Documentation/netlink/specs/nl80211.yaml index 1ec49c3562cd..3611b11a7d8f 100644 --- a/Documentation/netlink/specs/nl80211.yaml +++ b/Documentation/netlink/specs/nl80211.yaml @@ -203,71 +203,6 @@ definitions: - scan-random-mac-addr - sched-scan-random-mac-addr - no-random-mac-addr - - - name: ieee80211-mcs-info - type: struct - members: - - - name: rx-mask - type: binary - len: 10 - - - name: rx-highest - type: u16 - byte-order: little-endian - - - name: tx-params - type: u8 - - - name: reserved - type: binary - len: 3 - - - name: ieee80211-vht-mcs-info - type: struct - members: - - - name: rx-mcs-map - type: u16 - byte-order: little-endian - - - name: rx-highest - type: u16 - byte-order: little-endian - - - name: tx-mcs-map - type: u16 - byte-order: little-endian - - - name: tx-highest - type: u16 - byte-order: little-endian - - - name: ieee80211-ht-cap - type: struct - members: - - - name: cap-info - type: u16 - byte-order: little-endian - - - name: ampdu-params-info - type: u8 - - - name: mcs - type: binary - struct: ieee80211-mcs-info - - - name: extended-ht-cap-info - type: u16 - byte-order: little-endian - - - name: tx-bf-cap-info - type: u32 - byte-order: little-endian - - - name: antenna-selection-info - type: u8 - name: channel-type type: enum @@ -761,7 +696,6 @@ attribute-sets: - name: ht-capability-mask type: binary - struct: ieee80211-ht-cap - name: noack-map type: u16 @@ -1382,7 +1316,6 @@ attribute-sets: - name: ht-mcs-set type: binary - struct: ieee80211-mcs-info - name: ht-capa type: u16 @@ -1395,7 +1328,6 @@ attribute-sets: - name: vht-mcs-set type: binary - struct: ieee80211-vht-mcs-info - name: vht-capa type: u32 -- cgit v1.2.3 From 6c2422396d53e2f37ddf5821acb7704df15699c9 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 6 May 2025 12:40:58 -0700 Subject: netlink: specs: ovs: correct struct names C codegen will soon support using struct types for binary attrs. Correct the struct names in OvS specs. Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250506194101.696272-3-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/ovs_datapath.yaml | 10 ++++------ Documentation/netlink/specs/ovs_vport.yaml | 5 ++--- 2 files changed, 6 insertions(+), 9 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/ovs_datapath.yaml b/Documentation/netlink/specs/ovs_datapath.yaml index edc8c95ca6f5..df6a8f94975e 100644 --- a/Documentation/netlink/specs/ovs_datapath.yaml +++ b/Documentation/netlink/specs/ovs_datapath.yaml @@ -35,8 +35,7 @@ definitions: name: dispatch-upcall-per-cpu doc: Allow per-cpu dispatch of upcalls - - name: datapath-stats - enum-name: ovs-dp-stats + name: ovs-dp-stats type: struct members: - @@ -52,8 +51,7 @@ definitions: name: n-flows type: u64 - - name: megaflow-stats - enum-name: ovs-dp-megaflow-stats + name: ovs-dp-megaflow-stats type: struct members: - @@ -88,11 +86,11 @@ attribute-sets: - name: stats type: binary - struct: datapath-stats + struct: ovs-dp-stats - name: megaflow-stats type: binary - struct: megaflow-stats + struct: ovs-dp-megaflow-stats - name: user-features type: u32 diff --git a/Documentation/netlink/specs/ovs_vport.yaml b/Documentation/netlink/specs/ovs_vport.yaml index b538bb99ee9b..306da6bb842d 100644 --- a/Documentation/netlink/specs/ovs_vport.yaml +++ b/Documentation/netlink/specs/ovs_vport.yaml @@ -23,9 +23,8 @@ definitions: name-prefix: ovs-vport-type- entries: [ unspec, netdev, internal, gre, vxlan, geneve ] - - name: vport-stats + name: ovs-vport-stats type: struct - enum-name: ovs-vport-stats members: - name: rx-packets @@ -106,7 +105,7 @@ attribute-sets: - name: stats type: binary - struct: vport-stats + struct: ovs-vport-stats - name: pad type: unused -- cgit v1.2.3 From ab91c140bea9c2c23ee34ae831e06806e044a80e Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 6 May 2025 12:40:59 -0700 Subject: netlink: specs: remove implicit structs for SNMP counters uAPI doesn't define structs for the SNMP counters, just enums to index them as arrays. Switch to the same representation in the spec. C codegen will soon need all the struct types to actually exist. Note that the existing definition was broken, anyway, as the first member should be the number of counters reported. Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250506194101.696272-4-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-link.yaml | 60 +++++++------------------------- 1 file changed, 12 insertions(+), 48 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-link.yaml b/Documentation/netlink/specs/rt-link.yaml index 25f0c3c6a886..fa5ff70f2f5f 100644 --- a/Documentation/netlink/specs/rt-link.yaml +++ b/Documentation/netlink/specs/rt-link.yaml @@ -585,138 +585,102 @@ definitions: type: u32 - name: ifla-icmp6-stats - type: struct - members: + enum-name: + type: enum + entries: + - + name: num - name: inmsgs - type: u64 - name: inerrors - type: u64 - name: outmsgs - type: u64 - name: outerrors - type: u64 - name: csumerrors - type: u64 - name: ratelimithost - type: u64 - name: ifla-inet6-stats - type: struct - members: + enum-name: + type: enum + entries: + - + name: num - name: inpkts - type: u64 - name: inoctets - type: u64 - name: indelivers - type: u64 - name: outforwdatagrams - type: u64 - name: outpkts - type: u64 - name: outoctets - type: u64 - name: inhdrerrors - type: u64 - name: intoobigerrors - type: u64 - name: innoroutes - type: u64 - name: inaddrerrors - type: u64 - name: inunknownprotos - type: u64 - name: intruncatedpkts - type: u64 - name: indiscards - type: u64 - name: outdiscards - type: u64 - name: outnoroutes - type: u64 - name: reasmtimeout - type: u64 - name: reasmreqds - type: u64 - name: reasmoks - type: u64 - name: reasmfails - type: u64 - name: fragoks - type: u64 - name: fragfails - type: u64 - name: fragcreates - type: u64 - name: inmcastpkts - type: u64 - name: outmcastpkts - type: u64 - name: inbcastpkts - type: u64 - name: outbcastpkts - type: u64 - name: inmcastoctets - type: u64 - name: outmcastoctets - type: u64 - name: inbcastoctets - type: u64 - name: outbcastoctets - type: u64 - name: csumerrors - type: u64 - name: noectpkts - type: u64 - name: ect1-pkts - type: u64 - name: ect0-pkts - type: u64 - name: cepkts - type: u64 - name: reasm-overlaps - type: u64 - name: br-boolopt-multi type: struct members: @@ -2195,7 +2159,7 @@ attribute-sets: - name: stats type: binary - struct: ifla-inet6-stats + sub-type: u64 - name: mcast type: binary @@ -2206,7 +2170,7 @@ attribute-sets: - name: icmp6stats type: binary - struct: ifla-icmp6-stats + sub-type: u64 - name: token type: binary -- cgit v1.2.3 From 720447bd0b24d2f0904eb4055e559fa9a8fe42ac Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 6 May 2025 12:41:00 -0700 Subject: netlink: specs: rt-link: remove implicit structs from devconf devconf is even odder than SNMP. On input it reports an array of u32s which seem to be indexed by the enum values - 1. On output kernel expects a nest where each attr has the enum type as the nla type. sub-type: u32 is probably best we can do right now. Reviewed-by: Donald Hunter Link: https://patch.msgid.link/20250506194101.696272-5-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/rt-link.yaml | 107 +++---------------------------- 1 file changed, 10 insertions(+), 97 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/rt-link.yaml b/Documentation/netlink/specs/rt-link.yaml index fa5ff70f2f5f..7f91f474ff25 100644 --- a/Documentation/netlink/specs/rt-link.yaml +++ b/Documentation/netlink/specs/rt-link.yaml @@ -304,285 +304,196 @@ definitions: type: u8 - name: ipv4-devconf - type: struct - members: + enum-name: + type: enum + entries: - name: forwarding - type: u32 - name: mc-forwarding - type: u32 - name: proxy-arp - type: u32 - name: accept-redirects - type: u32 - name: secure-redirects - type: u32 - name: send-redirects - type: u32 - name: shared-media - type: u32 - name: rp-filter - type: u32 - name: accept-source-route - type: u32 - name: bootp-relay - type: u32 - name: log-martians - type: u32 - name: tag - type: u32 - name: arpfilter - type: u32 - name: medium-id - type: u32 - name: noxfrm - type: u32 - name: nopolicy - type: u32 - name: force-igmp-version - type: u32 - name: arp-announce - type: u32 - name: arp-ignore - type: u32 - name: promote-secondaries - type: u32 - name: arp-accept - type: u32 - name: arp-notify - type: u32 - name: accept-local - type: u32 - name: src-vmark - type: u32 - name: proxy-arp-pvlan - type: u32 - name: route-localnet - type: u32 - name: igmpv2-unsolicited-report-interval - type: u32 - name: igmpv3-unsolicited-report-interval - type: u32 - name: ignore-routes-with-linkdown - type: u32 - name: drop-unicast-in-l2-multicast - type: u32 - name: drop-gratuitous-arp - type: u32 - name: bc-forwarding - type: u32 - name: arp-evict-nocarrier - type: u32 - name: ipv6-devconf - type: struct - members: + enum-name: + type: enum + entries: - name: forwarding - type: u32 - name: hoplimit - type: u32 - name: mtu6 - type: u32 - name: accept-ra - type: u32 - name: accept-redirects - type: u32 - name: autoconf - type: u32 - name: dad-transmits - type: u32 - name: rtr-solicits - type: u32 - name: rtr-solicit-interval - type: u32 - name: rtr-solicit-delay - type: u32 - name: use-tempaddr - type: u32 - name: temp-valid-lft - type: u32 - name: temp-prefered-lft - type: u32 - name: regen-max-retry - type: u32 - name: max-desync-factor - type: u32 - name: max-addresses - type: u32 - name: force-mld-version - type: u32 - name: accept-ra-defrtr - type: u32 - name: accept-ra-pinfo - type: u32 - name: accept-ra-rtr-pref - type: u32 - name: rtr-probe-interval - type: u32 - name: accept-ra-rt-info-max-plen - type: u32 - name: proxy-ndp - type: u32 - name: optimistic-dad - type: u32 - name: accept-source-route - type: u32 - name: mc-forwarding - type: u32 - name: disable-ipv6 - type: u32 - name: accept-dad - type: u32 - name: force-tllao - type: u32 - name: ndisc-notify - type: u32 - name: mldv1-unsolicited-report-interval - type: u32 - name: mldv2-unsolicited-report-interval - type: u32 - name: suppress-frag-ndisc - type: u32 - name: accept-ra-from-local - type: u32 - name: use-optimistic - type: u32 - name: accept-ra-mtu - type: u32 - name: stable-secret - type: u32 - name: use-oif-addrs-only - type: u32 - name: accept-ra-min-hop-limit - type: u32 - name: ignore-routes-with-linkdown - type: u32 - name: drop-unicast-in-l2-multicast - type: u32 - name: drop-unsolicited-na - type: u32 - name: keep-addr-on-down - type: u32 - name: rtr-solicit-max-interval - type: u32 - name: seg6-enabled - type: u32 - name: seg6-require-hmac - type: u32 - name: enhanced-dad - type: u32 - name: addr-gen-mode - type: u8 - name: disable-policy - type: u32 - name: accept-ra-rt-info-min-plen - type: u32 - name: ndisc-tclass - type: u32 - name: rpl-seg-enabled - type: u32 - name: ra-defrtr-metric - type: u32 - name: ioam6-enabled - type: u32 - name: ioam6-id - type: u32 - name: ioam6-id-wide - type: u32 - name: ndisc-evict-nocarrier - type: u32 - name: accept-untracked-na - type: u32 - name: ifla-icmp6-stats enum-name: @@ -2144,7 +2055,8 @@ attribute-sets: - name: conf type: binary - struct: ipv4-devconf + sub-type: u32 + doc: u32 indexed by ipv4-devconf - 1 on output, on input it's a nest - name: ifla6-attrs name-prefix: ifla-inet6- @@ -2155,7 +2067,8 @@ attribute-sets: - name: conf type: binary - struct: ipv6-devconf + sub-type: u32 + doc: u32 indexed by ipv6-devconf - 1 on output, on input it's a nest - name: stats type: binary -- cgit v1.2.3 From e9c695067b68da6b39e0d70cd4a061d0f70050d3 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Thu, 27 Mar 2025 10:06:28 +0000 Subject: dt-bindings: mux: add optional regulator binding to gpio mux On some platforms to minimise pop and click during switching between CTIA and OMTP headset an additional HiFi Mux Switch is used. Most common case is that this switch is switched on by default, but on some platforms this needs a regulator enable. One such platform is Lenovo T14s. Adds required bindings in gpio-mux to add such optional regulator. Signed-off-by: Srinivas Kandagatla Reviewed-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250327100633.11530-2-srinivas.kandagatla@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/mux/gpio-mux.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mux/gpio-mux.yaml b/Documentation/devicetree/bindings/mux/gpio-mux.yaml index b597c1f2c577..ef7e33ec85d4 100644 --- a/Documentation/devicetree/bindings/mux/gpio-mux.yaml +++ b/Documentation/devicetree/bindings/mux/gpio-mux.yaml @@ -25,6 +25,10 @@ properties: description: List of gpios used to control the multiplexer, least significant bit first. + mux-supply: + description: + Regulator to power on the multiplexer. + '#mux-control-cells': enum: [ 0, 1 ] -- cgit v1.2.3 From 4e29dd3821dfc6531979c4a87ca450a236d78e46 Mon Sep 17 00:00:00 2001 From: Vadim Pasternak Date: Sun, 4 May 2025 19:55:07 +0300 Subject: Documentation/ABI: Add new attribute for mlxreg-io sysfs interfaces MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add documentation for the new attributes: - Request and response for access to protetced flashes: "global_wp_request", "global_wp_response". Only for systems equipped with BMC - grant can be provided only by BMC in case its security policy allows to grant access. - Request to unlock ASICs, which has been shutdown due-to ASIC thermal event: "shutdown_unlock". - Data processor Units (DPU) boot progress: "boot_progress". - DPU reset causes: "reset_aux_pwr_or_reload", "reset_dpu_thermal", "reset_from_main_board". - Reset control for DPU components: "perst_rst", "phy_rst", "tpm_rst", "usbphy_rst". - DPU Unified Fabric Manager upgrade - "ufm_upgrade". - Hardware Id of Data Process Unit board - "dpu_id". Reviewed-by: Michael Shych Signed-off-by: Vadim Pasternak Link: https://lore.kernel.org/r/20250504165507.9003-3-vadimp@nvidia.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/ABI/stable/sysfs-driver-mlxreg-io | 98 +++++++++++++++++++++++++ 1 file changed, 98 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/stable/sysfs-driver-mlxreg-io b/Documentation/ABI/stable/sysfs-driver-mlxreg-io index 2cdfd09123da..f59461111221 100644 --- a/Documentation/ABI/stable/sysfs-driver-mlxreg-io +++ b/Documentation/ABI/stable/sysfs-driver-mlxreg-io @@ -715,3 +715,101 @@ Description: This file shows 1 in case the system reset happened due to the switch board. The file is read only. + +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/global_wp_request +Date: May 2025 +KernelVersion: 6.16 +Contact: Vadim Pasternak +Description: This file when written 1 activates request to allow access to + the write protected flashes. Such request can be performed only + for system equipped with BMC (Board Management Controller), + which can grant access to protected flashes. In case BMC allows + access - it will respond with "global_wp_response". BMC decides + regarding time window of granted access. After granted window is + expired, BMC will change value back to 0. + Default value is 0. + + The file is read/write. + +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/global_wp_response +Date: May 2025 +KernelVersion: 6.16 +Contact: Vadim Pasternak +Description: This file, when set 1, indicates that access to protected + flashes have been granted to host CPU by BMC. + Default value is 0. + + The file is read only. + +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/shutdown_unlock +Date: May 2025 +KernelVersion: 6.16 +Contact: Vadim Pasternak +Description: When ASICs are getting overheated, system protection + hardware mechanism enforces system reboot. After system + reboot ASICs come up in locked state. To unlock ASICs, + this file should be written 1 + Default value is 0. + + The file is read/write. + +What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/boot_progress +Date: May 2025 +KernelVersion: 6.16 +Contact: Vadim Pasternak +Description: These files show the Data Process Unit board boot progress + state. Valid states are: + - 4 : OS starting. + - 5 : OS running. + - 6 : Low-Power Standby. + + The file is read only. + +What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/dpu_id +Date: May 2025 +KernelVersion: 6.16 +Contact: Vadim Pasternak +Description: This file shows hardware Id of Data Process Unit board. + + The file is read only. + +What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/reset_aux_pwr_or_reload +What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/reset_dpu_thermal +What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/reset_from_main_board +Date: May 2025 +KernelVersion: 6.16 +Contact: Vadim Pasternak +Description: These files expose the cause of the most recent reset of the Data + Processing Unit (DPU) board. The possible causes are: + - Power auxiliary outage or power reload. + - Thermal shutdown. + - Reset request from the main board. + Value 1 in file means this is reset cause, 0 - otherwise. Only one of + the above causes could be 1 at the same time, representing only last + reset cause. + + The files are read only. + +What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/perst_rst +What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/phy_rst +What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/tpm_rst +What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/usbphy_rst +Date: May 2025 +KernelVersion: 6.16 +Contact: Vadim Pasternak +Description: These files allow to reset hardware components of Data Process + Unit board. Respectively PCI, Ethernet PHY, TPM and USB PHY + resets. + Default values for all the attributes is 1. Writing 0 will + cause reset of the related component. + + The files are read/write. + +What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/ufm_upgrade +Date: May 2025 +KernelVersion: 6.16 +Contact: Vadim Pasternak +Description: These files show status of Unified Fabric Manager upgrade. + state. 0 - means upgrade is done, 1 - otherwise. + + The file is read only. -- cgit v1.2.3 From aee5cf935cf94006307600015a3df44eda55c4b9 Mon Sep 17 00:00:00 2001 From: Kurt Borja Date: Mon, 5 May 2025 15:43:31 -0300 Subject: platform/x86: alienware-wmi-wmax: Expose GPIO debug methods MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Expose GPIO control methods present on the AWCC interface through DebugFS. These models come with an RGB lighting STM32 MCU, which usually has two GPIO pins with debug capabilities: - Pin 0: Device Firmware Update mode (DFU) - Pin 1: Negative Reset (NRST) Suggested-by: Gabriel Marcano Reviewed-by: Armin Wolf Signed-off-by: Kurt Borja Link: https://lore.kernel.org/r/20250505-awcc-gpio-v4-1-edda44c3a0dc@gmail.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/ABI/testing/debugfs-alienware-wmi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/debugfs-alienware-wmi b/Documentation/ABI/testing/debugfs-alienware-wmi index 48cfd4d0b002..c7f525d6baac 100644 --- a/Documentation/ABI/testing/debugfs-alienware-wmi +++ b/Documentation/ABI/testing/debugfs-alienware-wmi @@ -42,3 +42,23 @@ Description: details. RO + +What: /sys/kernel/debug/alienware-wmi-/gpio_ctl/total_gpios +Date: May 2025 +KernelVersion: 6.16 +Contact: Kurt Borja +Description: + Total number of GPIO pins reported by the device. + + RO + +What: /sys/kernel/debug/alienware-wmi-/gpio_ctl/pinX +Date: May 2025 +KernelVersion: 6.16 +Contact: Kurt Borja +Description: + This file controls GPIO pin X status. + + See Documentation/wmi/devices/alienware-wmi.rst for details. + + RW -- cgit v1.2.3 From df6061c276903ae718bf7f91262c74777b4be8e0 Mon Sep 17 00:00:00 2001 From: Kurt Borja Date: Mon, 5 May 2025 15:43:32 -0300 Subject: Documentation: wmi: alienware-wmi: Add GPIO control documentation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add documentation for the GPIO control methods. Reviewed-by: Armin Wolf Signed-off-by: Kurt Borja Link: https://lore.kernel.org/r/20250505-awcc-gpio-v4-2-edda44c3a0dc@gmail.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/wmi/devices/alienware-wmi.rst | 82 +++++++++++++++++++++++++++-- 1 file changed, 78 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/wmi/devices/alienware-wmi.rst b/Documentation/wmi/devices/alienware-wmi.rst index 79238051b18b..1d9d43e2e314 100644 --- a/Documentation/wmi/devices/alienware-wmi.rst +++ b/Documentation/wmi/devices/alienware-wmi.rst @@ -231,6 +231,74 @@ WMI method MemoryOCControl([in] uint32 arg2, [out] uint32 argr) AWCC supports memory overclocking, but this method is very intricate and has not been deciphered yet. +GPIO control Methods +==================== + +Alienware and Dell G Series devices with the AWCC interface usually have an +embedded STM32 RGB lighting controller with USB/HID capabilities. It's vendor ID +is ``187c`` while it's product ID may vary from model to model. + +The control of two GPIO pins of this MCU is exposed as WMI methods for debugging +purposes. + ++--------------+--------------------------------------------------------------+ +| Pin | Description | ++==============+===============================+==============================+ +| 0 | Device Firmware Update (DFU) | **HIGH**: Enables DFU mode | +| | mode pin. | on next MCU boot. | +| | +------------------------------+ +| | | **LOW**: Disables DFU mode | +| | | on next MCU boot. | ++--------------+-------------------------------+------------------------------+ +| 1 | Negative Reset (NRST) pin. | **HIGH**: MCU is ON. | +| | | | +| | +------------------------------+ +| | | **LOW**: MCU is OFF. | +| | | | ++--------------+-------------------------------+------------------------------+ + +See :ref:`acknowledgements` for more information on this MCU. + +.. note:: + Some GPIO control methods break the usual argument structure and take a + **Pin number** instead of an operation on the first byte. + +WMI method FWUpdateGPIOtoggle([in] uint32 arg2, [out] uint32 argr) +------------------------------------------------------------------ + ++--------------------+------------------------------------+--------------------+ +| Operation (Byte 0) | Description | Arguments | ++====================+====================================+====================+ +| Pin number | Set the pin status | - Byte 1: Pin | +| | | status | ++--------------------+------------------------------------+--------------------+ + +WMI method ReadTotalofGPIOs([out] uint32 argr) +---------------------------------------------- + ++--------------------+------------------------------------+--------------------+ +| Operation (Byte 0) | Description | Arguments | ++====================+====================================+====================+ +| N/A | Get the total number of GPIOs | - None | ++--------------------+------------------------------------+--------------------+ + +.. note:: + Due to how WMI methods are implemented on the firmware level, this method + requires a dummy uint32 input argument when invoked. + +WMI method ReadGPIOpPinStatus([in] uint32 arg2, [out] uint32 argr) +------------------------------------------------------------------ + ++--------------------+------------------------------------+--------------------+ +| Operation (Byte 0) | Description | Arguments | ++====================+====================================+====================+ +| Pin number | Get the pin status | - None | ++--------------------+------------------------------------+--------------------+ + +.. note:: + There known firmware bug in some laptops where reading the status of a pin + also flips it. + Other information Methods ========================= @@ -239,10 +307,16 @@ WMI method ReadChassisColor([out] uint32 argr) Returns the chassis color internal ID. +.. _acknowledgements: + Acknowledgements ================ -Kudos to `AlexIII `_ and -`T-Troll `_ for documenting and -testing some of this device's functionality, making it possible to generalize -this driver. +Kudos to + +* `AlexIII `_ +* `T-Troll `_ +* `Gabriel Marcano `_ + +for documenting and testing some of this device's functionality, making it +possible to generalize this driver. -- cgit v1.2.3 From cde5c32db55740659fca6d56c09b88800d88fd29 Mon Sep 17 00:00:00 2001 From: Mark Rutland Date: Thu, 8 May 2025 14:26:33 +0100 Subject: arm64/fpsimd: Make clone() compatible with ZA lazy saving Linux is intended to be compatible with userspace written to Arm's AAPCS64 procedure call standard [1,2]. For the Scalable Matrix Extension (SME), AAPCS64 was extended with a "ZA lazy saving scheme", where SME's ZA tile is lazily callee-saved and caller-restored. In this scheme, TPIDR2_EL0 indicates whether the ZA tile is live or has been saved by pointing to a "TPIDR2 block" in memory, which has a "za_save_buffer" pointer. This scheme has been implemented in GCC and LLVM, with necessary runtime support implemented in glibc and bionic. AAPCS64 does not specify how the ZA lazy saving scheme is expected to interact with thread creation mechanisms such as fork() and pthread_create(), which would be implemented in terms of the Linux clone syscall. The behaviour implemented by Linux and glibc/bionic doesn't always compose safely, as explained below. Currently the clone syscall is implemented such that PSTATE.ZA and the ZA tile are always inherited by the new task, and TPIDR2_EL0 is inherited unless the 'flags' argument includes CLONE_SETTLS, in which case TPIDR2_EL0 is set to 0/NULL. This doesn't make much sense: (a) TPIDR2_EL0 is part of the calling convention, and changes as control is passed between functions. It is *NOT* used for thread local storage, despite superficial similarity to TPIDR_EL0, which is is used as the TLS register. (b) TPIDR2_EL0 and PSTATE.ZA are tightly coupled in the procedure call standard, and some combinations of states are illegal. In general, manipulating the two independently is not guaranteed to be safe. In practice, code which is compliant with the procedure call standard may issue a clone syscall while in the "ZA dormant" state, where PSTATE.ZA==1 and TPIDR2_EL0 is non-null and indicates that ZA needs to be saved. This can cause a variety of problems, including: * If the implementation of pthread_create() passes CLONE_SETTLS, the new thread will start with PSTATE.ZA==1 and TPIDR2==NULL. Per the procedure call standard this is not a legitimate state for most functions. This can cause data corruption (e.g. as code may rely on PSTATE.ZA being 0 to guarantee that an SMSTART ZA instruction will zero the ZA tile contents), and may result in other undefined behaviour. * If the implementation of pthread_create() does not pass CLONE_SETTLS, the new thread will start with PSTATE.ZA==1 and TPIDR2 pointing to a TPIDR2 block on the parent thread's stack. This can result in a variety of problems, e.g. - The child may write back to the parent's za_save_buffer, corrupting its contents. - The child may read from the TPIDR2 block after the parent has reused this memory for something else, and consequently the child may abort or clobber arbitrary memory. Ideally we'd require that userspace ensures that a task is in the "ZA off" state (with PSTATE.ZA==0 and TPIDR2_EL0==NULL) prior to issuing a clone syscall, and have the kernel force this state for new threads. Unfortunately, contemporary C libraries do not do this, and simply forcing this state within the implementation of clone would break fork(). Instead, we can bodge around this by considering the CLONE_VM flag, and manipulate PSTATE.ZA and TPIDR2_EL0 as a pair. CLONE_VM indicates that the new task will run in the same address space as its parent, and in that case it doesn't make sense to inherit a stale pointer to the parent's TPIDR2 block: * For fork(), CLONE_VM will not be set, and it is safe to inherit both PSTATE.ZA and TPIDR2_EL0 as the new task will have its own copy of the address space, and cannot clobber its parent's stack. * For pthread_create() and vfork(), CLONE_VM will be set, and discarding PSTATE.ZA and TPIDR2_EL0 for the new task doesn't break any existing assumptions in userspace. Implement this behaviour for clone(). We currently inherit PSTATE.ZA in arch_dup_task_struct(), but this does not have access to the clone flags, so move this logic under copy_thread(). Documentation is updated to describe the new behaviour. [1] https://github.com/ARM-software/abi-aa/releases/download/2025Q1/aapcs64.pdf [2] https://github.com/ARM-software/abi-aa/blob/c51addc3dc03e73a016a1e4edf25440bcac76431/aapcs64/aapcs64.rst Suggested-by: Catalin Marinas Signed-off-by: Mark Rutland Cc: Catalin Marinas Cc: Daniel Kiss Cc: Marc Zyngier Cc: Mark Brown Cc: Richard Sandiford Cc: Sander De Smalen Cc: Tamas Petz Cc: Will Deacon Cc: Yury Khrustalev Acked-by: Yury Khrustalev Link: https://lore.kernel.org/r/20250508132644.1395904-14-mark.rutland@arm.com Signed-off-by: Will Deacon --- Documentation/arch/arm64/sme.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/arch/arm64/sme.rst b/Documentation/arch/arm64/sme.rst index 3a98aed92732..1c1e48d8bd1a 100644 --- a/Documentation/arch/arm64/sme.rst +++ b/Documentation/arch/arm64/sme.rst @@ -69,8 +69,8 @@ model features for SME is included in Appendix A. vectors from 0 to VL/8-1 stored in the same endianness invariant format as is used for SVE vectors. -* On thread creation TPIDR2_EL0 is preserved unless CLONE_SETTLS is specified, - in which case it is set to 0. +* On thread creation PSTATE.ZA and TPIDR2_EL0 are preserved unless CLONE_VM + is specified, in which case PSTATE.ZA is set to 0 and TPIDR2_EL0 is set to 0. 2. Vector lengths ------------------ -- cgit v1.2.3 From b87c8c4aca1163ae4791507089007863e9c3ca1b Mon Sep 17 00:00:00 2001 From: Mark Rutland Date: Thu, 8 May 2025 14:26:35 +0100 Subject: arm64/fpsimd: ptrace/prctl: Ensure VL changes leave task in a valid state Currently, vec_set_vector_length() can manipulate a task into an invalid state as a result of a prctl/ptrace syscall which changes the SVE/SME vector length, resulting in several problems: (1) When changing the SVE vector length, if the task initially has PSTATE.ZA==1, and sve_alloc() fails to allocate memory, the task will be left with PSTATE.ZA==1 and sve_state==NULL. This is not a legitimate state, and could result in a subsequent null pointer dereference. (2) When changing the SVE vector length, if the task initially has PSTATE.SM==1, the task will be left with PSTATE.SM==1 and fp_type==FP_STATE_FPSIMD. Streaming mode state always needs to be saved in SVE format, so this is not a legitimate state. Attempting to restore this state may cause a task to erroneously inherit stale streaming mode predicate registers and FFR contents, behaving non-deterministically and potentially leaving information from another task. While in this state, reads of the NT_ARM_SSVE regset will indicate that the registers are not stored in SVE format. For the NT_ARM_SSVE regset specifically, debuggers interpret this as meaning that PSTATE.SM==0. (3) When changing the SME vector length, if the task initially has PSTATE.SM==1, the lower 128 bits of task's streaming mode vector state will be migrated to non-streaming mode, rather than these bits being zeroed as is usually the case for changes to PSTATE.SM. To fix the first issue, we can eagerly allocate the new sve_state and sme_state before modifying the task. This makes it possible to handle memory allocation failure without modifying the task state at all, and removes the need to clear TIF_SVE and TIF_SME. To fix the second issue, we either need to clear PSTATE.SM or not change the saved fp_type. Given we're going to eagerly allocate sve_state and sme_state, the simplest option is to preserve PSTATE.SM and the saves fp_type, and consistently truncate the SVE state. This ensures that the task always stays in a valid state, and by virtue of not exiting streaming mode, this also sidesteps the third issue. I believe these changes should not be problematic for realistic usage: * When the SVE/SME vector length is changed via prctl(), syscall entry will have cleared PSTATE.SM. Unless the task's state has been manipulated via ptrace after entry, the task will have PSTATE.SM==0. * When the SVE/SME vector length is changed via a write to the NT_ARM_SVE or NT_ARM_SSVE regsets, PSTATE.SM will be forced immediately after the length change, and new vector state will be copied from userspace. * When the SME vector length is changed via a write to the NT_ARM_ZA regset, the (S)SVE state is clobbered today, so anyone who cares about the specific state would need to install this after writing to the NT_ARM_ZA regset. As we need to free the old SVE state while TIF_SVE may still be set, we cannot use sve_free(), and using kfree() directly makes it clear that the free pairs with the subsequent assignment. As this leaves sve_free() unused, I've removed the existing sve_free() and renamed __sve_free() to mirror sme_free(). Fixes: 8bd7f91c03d8 ("arm64/sme: Implement traps and syscall handling for SME") Fixes: baa8515281b3 ("arm64/fpsimd: Track the saved FPSIMD state type separately to TIF_SVE") Signed-off-by: Mark Rutland Cc: Catalin Marinas Cc: David Spickett Cc: Luis Machado Cc: Marc Zyngier Cc: Mark Brown Cc: Will Deacon Link: https://lore.kernel.org/r/20250508132644.1395904-16-mark.rutland@arm.com Signed-off-by: Will Deacon --- Documentation/arch/arm64/sme.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/arch/arm64/sme.rst b/Documentation/arch/arm64/sme.rst index 1c1e48d8bd1a..4cb38330e704 100644 --- a/Documentation/arch/arm64/sme.rst +++ b/Documentation/arch/arm64/sme.rst @@ -241,7 +241,7 @@ prctl(PR_SME_SET_VL, unsigned long arg) length, or calling PR_SME_SET_VL with the PR_SME_SET_VL_ONEXEC flag, does not constitute a change to the vector length for this purpose. - * Changing the vector length causes PSTATE.ZA and PSTATE.SM to be cleared. + * Changing the vector length causes PSTATE.ZA to be cleared. Calling PR_SME_SET_VL with vl equal to the thread's current vector length, or calling PR_SME_SET_VL with the PR_SME_SET_VL_ONEXEC flag, does not constitute a change to the vector length for this purpose. -- cgit v1.2.3 From 0e7c523c58dd46e417963a9878971bf74026083a Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 7 May 2025 11:19:21 +0200 Subject: dt-bindings: display: panel: convert truly,nt35597.txt to dt-schema Convert the Truly NT35597 2K display panel bindings to dt-schema. The vdispp-supply & vdispn-supply are not marked as required since in practice they are not defined in sdm845-mtp.dts which is the only used of these bindings. Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250507-topic-misc-truly-nt35597-yaml-v1-1-bc719ad8dfff@linaro.org Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20250507-topic-misc-truly-nt35597-yaml-v1-1-bc719ad8dfff@linaro.org --- .../display/panel/truly,nt35597-2K-display.yaml | 97 ++++++++++++++++++++++ .../devicetree/bindings/display/truly,nt35597.txt | 59 ------------- 2 files changed, 97 insertions(+), 59 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/panel/truly,nt35597-2K-display.yaml delete mode 100644 Documentation/devicetree/bindings/display/truly,nt35597.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/truly,nt35597-2K-display.yaml b/Documentation/devicetree/bindings/display/panel/truly,nt35597-2K-display.yaml new file mode 100644 index 000000000000..36be09c900f2 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/truly,nt35597-2K-display.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/truly,nt35597-2K-display.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Truly NT35597 DSI 2K display + +maintainers: + - Neil Armstrong + +description: | + Truly NT35597 DSI 2K display is used on the Qualcomm SDM845 MTP board. + +allOf: + - $ref: panel-common-dual.yaml# + +properties: + compatible: + const: truly,nt35597-2K-display + + reg: + maxItems: 1 + + vdda-supply: + description: regulator that provides the supply voltage Power IC supply + + vdispp-supply: + description: regulator that provides the supply voltage for positive LCD bias + + vdispn-supply: + description: regulator that provides the supply voltage for negative LCD bias + + reset-gpios: true + + mode-gpios: + description: + Gpio for choosing the mode of the display for single DSI or Dual DSI. + This should be low for dual DSI and high for single DSI mode. + + ports: + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - vdda-supply + - reset-gpios + - mode-gpios + - ports + +additionalProperties: false + +examples: + - | + #include + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "truly,nt35597-2K-display"; + reg = <0>; + + vdda-supply = <&pm8998_l14>; + vdispp-supply = <&lab_regulator>; + vdispn-supply = <&ibb_regulator>; + + reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; + mode-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + panel0_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + + panel1_in: endpoint { + remote-endpoint = <&dsi1_out>; + }; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/display/truly,nt35597.txt b/Documentation/devicetree/bindings/display/truly,nt35597.txt deleted file mode 100644 index f39c77ee36ea..000000000000 --- a/Documentation/devicetree/bindings/display/truly,nt35597.txt +++ /dev/null @@ -1,59 +0,0 @@ -Truly model NT35597 DSI display driver - -The Truly NT35597 is a generic display driver, currently only configured -for use in the 2K display on the Qualcomm SDM845 MTP board. - -Required properties: -- compatible: should be "truly,nt35597-2K-display" -- vdda-supply: phandle of the regulator that provides the supply voltage - Power IC supply -- vdispp-supply: phandle of the regulator that provides the supply voltage - for positive LCD bias -- vdispn-supply: phandle of the regulator that provides the supply voltage - for negative LCD bias -- reset-gpios: phandle of gpio for reset line - This should be 8mA, gpio can be configured using mux, pinctrl, pinctrl-names - (active low) -- mode-gpios: phandle of the gpio for choosing the mode of the display - for single DSI or Dual DSI - This should be low for dual DSI and high for single DSI mode -- ports: This device has two video ports driven by two DSIs. Their connections - are modeled using the OF graph bindings specified in - Documentation/devicetree/bindings/graph.txt. - - port@0: DSI input port driven by master DSI - - port@1: DSI input port driven by secondary DSI - -Example: - - dsi@ae94000 { - panel@0 { - compatible = "truly,nt35597-2K-display"; - reg = <0>; - vdda-supply = <&pm8998_l14>; - vdispp-supply = <&lab_regulator>; - vdispn-supply = <&ibb_regulator>; - pinctrl-names = "default", "suspend"; - pinctrl-0 = <&dpu_dsi_active>; - pinctrl-1 = <&dpu_dsi_suspend>; - - reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; - mode-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>; - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - panel0_in: endpoint { - remote-endpoint = <&dsi0_out>; - }; - }; - - port@1 { - reg = <1>; - panel1_in: endpoint { - remote-endpoint = <&dsi1_out>; - }; - }; - }; - }; - }; -- cgit v1.2.3 From 0311e0fd07919b4b8ea651a632eedb0e3f9f540c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 8 May 2025 16:34:47 +0200 Subject: dt-bindings: display: panel: Add Novatek NT37801 Add bindings for the Novatek NT37801 or NT37810 AMOLED DSI panel. Sources, like downstream DTS, schematics and hardware manuals, use two model names (NT37801 and NT37810), so choose one and hope it is correct. Reviewed-by: Linus Walleij Signed-off-by: Krzysztof Kozlowski Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250508-sm8750-display-panel-v2-1-3ca072e3d1fa@linaro.org Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20250508-sm8750-display-panel-v2-1-3ca072e3d1fa@linaro.org --- .../bindings/display/panel/novatek,nt37801.yaml | 69 ++++++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/novatek,nt37801.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt37801.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt37801.yaml new file mode 100644 index 000000000000..1b38c1d0af68 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/novatek,nt37801.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/novatek,nt37801.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Novatek NT37801 AMOLED DSI Panel + +maintainers: + - Krzysztof Kozlowski + +description: + Naming is inconclusive and different sources claim this is either Novatek + NT37801 or NT37810 AMOLED DSI Panel. + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: novatek,nt37801 + + reg: + maxItems: 1 + description: DSI virtual channel + + vci-supply: true + vdd-supply: true + vddio-supply: true + port: true + reset-gpios: true + +required: + - compatible + - reg + - vci-supply + - vdd-supply + - vddio-supply + - port + - reset-gpios + +additionalProperties: false + +examples: + - | + #include + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "novatek,nt37801"; + reg = <0>; + + vci-supply = <&vreg_l13b_3p0>; + vdd-supply = <&vreg_l11b_1p2>; + vddio-supply = <&vreg_l12b_1p8>; + + reset-gpios = <&tlmm 98 GPIO_ACTIVE_LOW>; + + port { + endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + }; + }; +... -- cgit v1.2.3 From 0f733b5be9658b75496127e23e1f7edfc45bb423 Mon Sep 17 00:00:00 2001 From: Cyan Yang Date: Fri, 18 Apr 2025 13:32:28 +0800 Subject: dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description Add "xsfvqmaccdod" and "xsfvqmaccqoq" ISA extensions which are provided by SiFive for int8 matrix multiplication instructions support. Signed-off-by: Cyan Yang Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250418053239.4351-2-cyan.yang@sifive.com Signed-off-by: Palmer Dabbelt --- Documentation/devicetree/bindings/riscv/extensions.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index bcab59e0cc2e..d36e7c68d69a 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -662,6 +662,19 @@ properties: Registers in the AX45MP datasheet. https://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf + # SiFive + - const: xsfvqmaccdod + description: + SiFive Int8 Matrix Multiplication Extensions Specification. + See more details in + https://www.sifive.com/document-file/sifive-int8-matrix-multiplication-extensions-specification + + - const: xsfvqmaccqoq + description: + SiFive Int8 Matrix Multiplication Extensions Specification. + See more details in + https://www.sifive.com/document-file/sifive-int8-matrix-multiplication-extensions-specification + # T-HEAD - const: xtheadvector description: -- cgit v1.2.3 From e8fd215ed0eb814486d50b4835007cbc50b2c2b7 Mon Sep 17 00:00:00 2001 From: Cyan Yang Date: Fri, 18 Apr 2025 13:32:30 +0800 Subject: riscv: hwprobe: Document SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions Document the support for sifive vendor extensions using the key RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0 and two vendor extensions for SiFive Int8 Matrix Multiplication Instructions using RISCV_HWPROBE_VENDOR_EXT_XSFVQMACCDOD and RISCV_HWPROBE_VENDOR_EXT_XSFVQMACCQOQ. Signed-off-by: Cyan Yang Link: https://lore.kernel.org/r/20250418053239.4351-4-cyan.yang@sifive.com Signed-off-by: Palmer Dabbelt --- Documentation/arch/riscv/hwprobe.rst | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'Documentation') diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst index 53607d962653..16085b2ee64e 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -335,3 +335,17 @@ The following keys are defined: * :c:macro:`RISCV_HWPROBE_KEY_ZICBOM_BLOCK_SIZE`: An unsigned int which represents the size of the Zicbom block in bytes. + +* :c:macro:`RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0`: A bitmask containing the + sifive vendor extensions that are compatible with the + :c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_IMA`: base system behavior. + + * SIFIVE + + * :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XSFVQMACCDOD`: The Xsfqmaccdod vendor + extension is supported in version 1.1 of SiFive Int8 Matrix Multiplication + Extensions Specification. + + * :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XSFVQMACCQOQ`: The Xsfqmaccqoq vendor + extension is supported in version 1.1 of SiFive Int8 Matrix Multiplication + Instruction Extensions Specification. -- cgit v1.2.3 From a5a15e07cbb900b59fbdb927189d24d1d01ad2e7 Mon Sep 17 00:00:00 2001 From: Cyan Yang Date: Fri, 18 Apr 2025 13:32:32 +0800 Subject: dt-bindings: riscv: Add xsfvfnrclipxfqf ISA extension description Add "xsfvfnrclipxfqf" ISA extension which is provided by SiFive for FP32-to-int8 ranged clip instructions support. Signed-off-by: Cyan Yang Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250418053239.4351-6-cyan.yang@sifive.com Signed-off-by: Palmer Dabbelt --- Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index d36e7c68d69a..be203df29eb8 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -675,6 +675,12 @@ properties: See more details in https://www.sifive.com/document-file/sifive-int8-matrix-multiplication-extensions-specification + - const: xsfvfnrclipxfqf + description: + SiFive FP32-to-int8 Ranged Clip Instructions Extensions Specification. + See more details in + https://www.sifive.com/document-file/fp32-to-int8-ranged-clip-instructions + # T-HEAD - const: xtheadvector description: -- cgit v1.2.3 From 659d664f7df8e5c094e260434bebd0efaa547e49 Mon Sep 17 00:00:00 2001 From: Cyan Yang Date: Fri, 18 Apr 2025 13:32:34 +0800 Subject: riscv: hwprobe: Document SiFive xsfvfnrclipxfqf vendor extension Document the support for SiFive vendor extensions for FP32-to-int8 Ranged Clip Instructions using RISCV_HWPROBE_VENDOR_EXT_XSFVFNRCLIPXFQF. Signed-off-by: Cyan Yang Link: https://lore.kernel.org/r/20250418053239.4351-8-cyan.yang@sifive.com Signed-off-by: Palmer Dabbelt --- Documentation/arch/riscv/hwprobe.rst | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst index 16085b2ee64e..e15405e12239 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -349,3 +349,7 @@ The following keys are defined: * :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XSFVQMACCQOQ`: The Xsfqmaccqoq vendor extension is supported in version 1.1 of SiFive Int8 Matrix Multiplication Instruction Extensions Specification. + + * :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XSFVFNRCLIPXFQF`: The Xsfvfnrclipxfqf + vendor extension is supported in version 1.0 of SiFive FP32-to-int8 Ranged + Clip Instructions Extensions Specification. -- cgit v1.2.3 From d5ca02b25f5dbe44a25afe35cd75d49f1f0b9763 Mon Sep 17 00:00:00 2001 From: Cyan Yang Date: Fri, 18 Apr 2025 13:32:36 +0800 Subject: dt-bindings: riscv: Add xsfvfwmaccqqq ISA extension description Add "xsfvfwmaccqqq" ISA extension which is provided by SiFive for matrix multiply accumulate instructions support. Signed-off-by: Cyan Yang Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250418053239.4351-10-cyan.yang@sifive.com Signed-off-by: Palmer Dabbelt --- Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index be203df29eb8..ede6a58ccf53 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -681,6 +681,12 @@ properties: See more details in https://www.sifive.com/document-file/fp32-to-int8-ranged-clip-instructions + - const: xsfvfwmaccqqq + description: + SiFive Matrix Multiply Accumulate Instruction Extensions Specification. + See more details in + https://www.sifive.com/document-file/matrix-multiply-accumulate-instruction + # T-HEAD - const: xtheadvector description: -- cgit v1.2.3 From a3ca43dc527159aa6f55058a9fa506fa720d6514 Mon Sep 17 00:00:00 2001 From: Cyan Yang Date: Fri, 18 Apr 2025 13:32:38 +0800 Subject: riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension Document the support for matrix multiply accumulate instruction from SiFive using RISCV_HWPROBE_VENDOR_EXT_XSFVFWMACCQQQ. Signed-off-by: Cyan Yang Link: https://lore.kernel.org/r/20250418053239.4351-12-cyan.yang@sifive.com Signed-off-by: Palmer Dabbelt --- Documentation/arch/riscv/hwprobe.rst | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst index e15405e12239..7c11351b1383 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -353,3 +353,7 @@ The following keys are defined: * :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XSFVFNRCLIPXFQF`: The Xsfvfnrclipxfqf vendor extension is supported in version 1.0 of SiFive FP32-to-int8 Ranged Clip Instructions Extensions Specification. + + * :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XSFVFWMACCQQQ`: The Xsfvfwmaccqqq + vendor extension is supported in version 1.0 of Matrix Multiply Accumulate + Instruction Extensions Specification. \ No newline at end of file -- cgit v1.2.3 From d2c9d354802abfdb9585ec00ddcf9c50c7fb5e12 Mon Sep 17 00:00:00 2001 From: Charan Pedumuru Date: Wed, 7 May 2025 04:57:34 +0000 Subject: dt-bindings: dma: nvidia,tegra20-apbdma: convert text based binding to json schema Update text binding to YAML. Changes during conversion: - Add a fallback for "nvidia,tegra30-apbdma" as it is compatible with the IP core on "nvidia,tegra20-apbdma". - Update examples and include appropriate file directives to resolve errors identified by `dt_binding_check` and `dtbs_check`. Signed-off-by: Charan Pedumuru Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250507-nvidea-dma-v4-2-6161a8de376f@gmail.com Signed-off-by: Thierry Reding --- .../bindings/dma/nvidia,tegra20-apbdma.txt | 44 ----------- .../bindings/dma/nvidia,tegra20-apbdma.yaml | 90 ++++++++++++++++++++++ 2 files changed, 90 insertions(+), 44 deletions(-) delete mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.txt create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.txt b/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.txt deleted file mode 100644 index 447fb44e7abe..000000000000 --- a/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.txt +++ /dev/null @@ -1,44 +0,0 @@ -* NVIDIA Tegra APB DMA controller - -Required properties: -- compatible: Should be "nvidia,-apbdma" -- reg: Should contain DMA registers location and length. This should include - all of the per-channel registers. -- interrupts: Should contain all of the per-channel DMA interrupts. -- clocks: Must contain one entry, for the module clock. - See ../clocks/clock-bindings.txt for details. -- resets : Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names : Must include the following entries: - - dma -- #dma-cells : Must be <1>. This dictates the length of DMA specifiers in - client nodes' dmas properties. The specifier represents the DMA request - select value for the peripheral. For more details, consult the Tegra TRM's - documentation of the APB DMA channel control register REQ_SEL field. - -Examples: - -apbdma: dma@6000a000 { - compatible = "nvidia,tegra20-apbdma"; - reg = <0x6000a000 0x1200>; - interrupts = < 0 136 0x04 - 0 137 0x04 - 0 138 0x04 - 0 139 0x04 - 0 140 0x04 - 0 141 0x04 - 0 142 0x04 - 0 143 0x04 - 0 144 0x04 - 0 145 0x04 - 0 146 0x04 - 0 147 0x04 - 0 148 0x04 - 0 149 0x04 - 0 150 0x04 - 0 151 0x04 >; - clocks = <&tegra_car 34>; - resets = <&tegra_car 34>; - reset-names = "dma"; - #dma-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.yaml new file mode 100644 index 000000000000..a2ffd5209b3b --- /dev/null +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.yaml @@ -0,0 +1,90 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/nvidia,tegra20-apbdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra APB DMA Controller + +description: + The NVIDIA Tegra APB DMA controller is a hardware component that + enables direct memory access (DMA) on Tegra systems. It facilitates + data transfer between I/O devices and main memory without constant + CPU intervention. + +maintainers: + - Jonathan Hunter + +properties: + compatible: + oneOf: + - const: nvidia,tegra20-apbdma + - items: + - const: nvidia,tegra30-apbdma + - const: nvidia,tegra20-apbdma + + reg: + maxItems: 1 + + "#dma-cells": + const: 1 + + clocks: + maxItems: 1 + + interrupts: + description: + Should contain all of the per-channel DMA interrupts in + ascending order with respect to the DMA channel index. + minItems: 1 + maxItems: 32 + + resets: + maxItems: 1 + + reset-names: + const: dma + +required: + - compatible + - reg + - "#dma-cells" + - clocks + - interrupts + - resets + - reset-names + +allOf: + - $ref: dma-controller.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + dma-controller@6000a000 { + compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma"; + reg = <0x6000a000 0x1200>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + clocks = <&tegra_car 34>; + resets = <&tegra_car 34>; + reset-names = "dma"; + #dma-cells = <1>; + }; +... -- cgit v1.2.3 From c4cd2aa6a374e0f7eee46f8263c2ffc7577f8c47 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:47:58 -0500 Subject: dt-bindings: interrupt-controller: Convert nvidia,tegra20-ictlr to DT schema Convert the NVIDIA Legacy interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. All the possible compatibles were not documented, so add the ones in use. Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250505144759.1291261-1-robh@kernel.org Signed-off-by: Thierry Reding --- .../interrupt-controller/nvidia,tegra20-ictlr.txt | 41 ----------- .../interrupt-controller/nvidia,tegra20-ictlr.yaml | 82 ++++++++++++++++++++++ 2 files changed, 82 insertions(+), 41 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra20-ictlr.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra20-ictlr.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra20-ictlr.txt b/Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra20-ictlr.txt deleted file mode 100644 index 2ff356640100..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra20-ictlr.txt +++ /dev/null @@ -1,41 +0,0 @@ -NVIDIA Legacy Interrupt Controller - -All Tegra SoCs contain a legacy interrupt controller that routes -interrupts to the GIC, and also serves as a wakeup source. It is also -referred to as "ictlr", hence the name of the binding. - -The HW block exposes a number of interrupt controllers, each -implementing a set of 32 interrupts. - -Required properties: - -- compatible : should be: "nvidia,tegra-ictlr". The LIC on - subsequent SoCs remained backwards-compatible with Tegra30, so on - Tegra generations later than Tegra30 the compatible value should - include "nvidia,tegra30-ictlr". -- reg : Specifies base physical address and size of the registers. - Each controller must be described separately (Tegra20 has 4 of them, - whereas Tegra30 and later have 5). -- interrupt-controller : Identifies the node as an interrupt controller. -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value must be 3. - -Notes: - -- Because this HW ultimately routes interrupts to the GIC, the - interrupt specifier must be that of the GIC. -- Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs - are explicitly forbidden. - -Example: - - ictlr: interrupt-controller@60004000 { - compatible = "nvidia,tegra20-ictlr", "nvidia,tegra-ictlr"; - reg = <0x60004000 64>, - <0x60004100 64>, - <0x60004200 64>, - <0x60004300 64>; - interrupt-controller; - #interrupt-cells = <3>; - interrupt-parent = <&intc>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra20-ictlr.yaml b/Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra20-ictlr.yaml new file mode 100644 index 000000000000..074a873880e5 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra20-ictlr.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/nvidia,tegra20-ictlr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra20 Legacy Interrupt Controller + +maintainers: + - Thierry Reding + - Jonathan Hunter + +description: > + All Tegra SoCs contain a legacy interrupt controller that routes interrupts to + the GIC, and also serves as a wakeup source. It is also referred to as + "ictlr", hence the name of the binding. + + The HW block exposes a number of interrupt controllers, each implementing a + set of 32 interrupts. + + Notes: + - Because this HW ultimately routes interrupts to the GIC, the + interrupt specifier must be that of the GIC. + - Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs + are explicitly forbidden. + +properties: + compatible: + oneOf: + - items: + - enum: + - nvidia,tegra114-ictlr + - nvidia,tegra124-ictlr + - const: nvidia,tegra30-ictlr + - enum: + - nvidia,tegra20-ictlr + - nvidia,tegra30-ictlr + + reg: + description: Each entry is a block of 32 interrupts + minItems: 4 + maxItems: 5 + + interrupt-controller: true + + '#interrupt-cells': + const: 3 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + contains: + const: nvidia,tegra20-ictlr + then: + properties: + reg: + maxItems: 4 + else: + properties: + reg: + minItems: 5 + +examples: + - | + interrupt-controller@60004000 { + compatible = "nvidia,tegra20-ictlr"; + reg = <0x60004000 64>, + <0x60004100 64>, + <0x60004200 64>, + <0x60004300 64>; + interrupt-controller; + #interrupt-cells = <3>; + }; -- cgit v1.2.3 From cca0fe281687dccb032f84067776a1018ad46e0b Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Sat, 3 May 2025 13:29:48 +0300 Subject: dt-bindings: arm: tegra: Group Tegra30 based ASUS Transformers Group Tegra30 based ASUS Transformers under a common description. Signed-off-by: Svyatoslav Ryhel Link: https://lore.kernel.org/r/20250503102950.32744-2-clamor95@gmail.com Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/arm/tegra.yaml | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml index 65e0ff1fdf1e..49021e940d3c 100644 --- a/Documentation/devicetree/bindings/arm/tegra.yaml +++ b/Documentation/devicetree/bindings/arm/tegra.yaml @@ -52,17 +52,13 @@ properties: - nvidia,cardhu-a04 - const: nvidia,cardhu - const: nvidia,tegra30 - - items: - - const: asus,tf201 - - const: nvidia,tegra30 - - items: - - const: asus,tf300t - - const: nvidia,tegra30 - - items: - - const: asus,tf300tg - - const: nvidia,tegra30 - - items: - - const: asus,tf700t + - description: ASUS Transformers Device family + items: + - enum: + - asus,tf201 + - asus,tf300t + - asus,tf300tg + - asus,tf700t - const: nvidia,tegra30 - description: LG Optimus 4X P880 items: -- cgit v1.2.3 From 236d4257572f4cd7167ac417701b887d138bed31 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Sat, 3 May 2025 13:29:49 +0300 Subject: dt-bindings: arm: tegra: Add Asus Transformer Pad TF300TL Add a compatible for the Asus Transformer Pad TF300TL. Signed-off-by: Svyatoslav Ryhel Link: https://lore.kernel.org/r/20250503102950.32744-3-clamor95@gmail.com Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/arm/tegra.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml index 49021e940d3c..9cae3268a827 100644 --- a/Documentation/devicetree/bindings/arm/tegra.yaml +++ b/Documentation/devicetree/bindings/arm/tegra.yaml @@ -58,6 +58,7 @@ properties: - asus,tf201 - asus,tf300t - asus,tf300tg + - asus,tf300tl - asus,tf700t - const: nvidia,tegra30 - description: LG Optimus 4X P880 -- cgit v1.2.3 From 0d4d6e699a4acff8d15f83185d269ab59c02107a Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Sun, 13 Apr 2025 14:35:32 -0500 Subject: media: dt-bindings: Document Tegra186 and Tegra194 cec These are already used in device trees, so describe them here. As the driver only declares up through Tegra210, these must use a fallback compatible of tegra210-cec. Acked-by: Krzysztof Kozlowski Signed-off-by: Aaron Kling Link: https://lore.kernel.org/r/20250413-tegra-cec-v4-1-b6337b66ccad@gmail.com Signed-off-by: Thierry Reding --- .../devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml b/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml index a6b73498bc21..4b46aa755ccd 100644 --- a/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml +++ b/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml @@ -14,10 +14,16 @@ allOf: properties: compatible: - enum: - - nvidia,tegra114-cec - - nvidia,tegra124-cec - - nvidia,tegra210-cec + oneOf: + - enum: + - nvidia,tegra114-cec + - nvidia,tegra124-cec + - nvidia,tegra210-cec + - items: + - enum: + - nvidia,tegra186-cec + - nvidia,tegra194-cec + - const: nvidia,tegra210-cec clocks: maxItems: 1 -- cgit v1.2.3 From b9e22b35d4598aefed642928ed2856a9900e5b37 Mon Sep 17 00:00:00 2001 From: Cedric Xing Date: Thu, 8 May 2025 19:07:39 -0700 Subject: tsm-mr: Add TVM Measurement Register support Introduce new TSM Measurement helper library (tsm-mr) for TVM guest drivers to expose MRs (Measurement Registers) as sysfs attributes, with Crypto Agility support. Add the following new APIs (see include/linux/tsm-mr.h for details): - tsm_mr_create_attribute_group(): Take on input a `struct tsm_measurements` instance, which includes one `struct tsm_measurement_register` per MR with properties like `TSM_MR_F_READABLE` and `TSM_MR_F_WRITABLE`, to determine the supported operations and create the sysfs attributes accordingly. On success, return a `struct attribute_group` instance that will typically be included by the guest driver into `miscdevice.groups` before calling misc_register(). - tsm_mr_free_attribute_group(): Free the memory allocated to the attrubute group returned by tsm_mr_create_attribute_group(). tsm_mr_create_attribute_group() creates one attribute for each MR, with names following this pattern: MRNAME[:HASH] - MRNAME - Placeholder for the MR name, as specified by `tsm_measurement_register.mr_name`. - :HASH - Optional suffix indicating the hash algorithm associated with this MR, as specified by `tsm_measurement_register.mr_hash`. Support Crypto Agility by allowing multiple definitions of the same MR (i.e., with the same `mr_name`) with distinct HASH algorithms. NOTE: Crypto Agility, introduced in TPM 2.0, allows new hash algorithms to be introduced without breaking compatibility with applications using older algorithms. CC architectures may face the same challenge in the future, needing new hashes for security while retaining compatibility with older hashes, hence the need for Crypto Agility. Signed-off-by: Cedric Xing Reviewed-by: Dan Williams Acked-by: Dionna Amalie Glaze [djbw: fixup bin_attr const conflict] Link: https://patch.msgid.link/20250509020739.882913-1-dan.j.williams@intel.com Signed-off-by: Dan Williams --- Documentation/driver-api/coco/index.rst | 12 ++++++++++++ Documentation/driver-api/coco/measurement-registers.rst | 12 ++++++++++++ Documentation/driver-api/index.rst | 1 + 3 files changed, 25 insertions(+) create mode 100644 Documentation/driver-api/coco/index.rst create mode 100644 Documentation/driver-api/coco/measurement-registers.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/coco/index.rst b/Documentation/driver-api/coco/index.rst new file mode 100644 index 000000000000..af9f08ca0cfd --- /dev/null +++ b/Documentation/driver-api/coco/index.rst @@ -0,0 +1,12 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================== +Confidential Computing +====================== + +.. toctree:: + :maxdepth: 1 + + measurement-registers + +.. only:: subproject and html diff --git a/Documentation/driver-api/coco/measurement-registers.rst b/Documentation/driver-api/coco/measurement-registers.rst new file mode 100644 index 000000000000..cef85945a9a7 --- /dev/null +++ b/Documentation/driver-api/coco/measurement-registers.rst @@ -0,0 +1,12 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. include:: + +===================== +Measurement Registers +===================== + +.. kernel-doc:: include/linux/tsm-mr.h + :internal: + +.. kernel-doc:: drivers/virt/coco/tsm-mr.c + :export: diff --git a/Documentation/driver-api/index.rst b/Documentation/driver-api/index.rst index 16e2c4ec3c01..3e2a270bd828 100644 --- a/Documentation/driver-api/index.rst +++ b/Documentation/driver-api/index.rst @@ -81,6 +81,7 @@ Subsystem-specific APIs acpi/index backlight/lp855x-driver.rst clk + coco/index console crypto/index dmaengine/index -- cgit v1.2.3 From 4d2a7bfad5b79b3a362fc7cfed8d7ddbd263a838 Mon Sep 17 00:00:00 2001 From: Cedric Xing Date: Wed, 7 May 2025 18:06:06 -0700 Subject: virt: tdx-guest: Expose TDX MRs as sysfs attributes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Expose the most commonly used TDX MRs (Measurement Registers) as sysfs attributes. Use the ioctl() interface of /dev/tdx_guest to request a full TDREPORT for access to other TD measurements. Directory structure of TDX MRs inside a TDVM is as follows: /sys/class/misc/tdx_guest └── measurements ├── mrconfigid ├── mrowner ├── mrownerconfig ├── mrtd:sha384 ├── rtmr0:sha384 ├── rtmr1:sha384 ├── rtmr2:sha384 └── rtmr3:sha384 Read the file/attribute to retrieve the current value of an MR. Write to the file/attribute (if writable) to extend the corresponding RTMR. Refer to Documentation/ABI/testing/sysfs-devices-virtual-misc-tdx_guest for more information. Signed-off-by: Cedric Xing Acked-by: Dionna Amalie Glaze [djbw: fixup exit order] Link: https://patch.msgid.link/20250508010606.4129953-1-dan.j.williams@intel.com Signed-off-by: Dan Williams --- .../testing/sysfs-devices-virtual-misc-tdx_guest | 63 ++++++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-devices-virtual-misc-tdx_guest (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-devices-virtual-misc-tdx_guest b/Documentation/ABI/testing/sysfs-devices-virtual-misc-tdx_guest new file mode 100644 index 000000000000..8fca56c8c9df --- /dev/null +++ b/Documentation/ABI/testing/sysfs-devices-virtual-misc-tdx_guest @@ -0,0 +1,63 @@ +What: /sys/devices/virtual/misc/tdx_guest/measurements/MRNAME[:HASH] +Date: April, 2025 +KernelVersion: v6.16 +Contact: linux-coco@lists.linux.dev +Description: + Value of a TDX measurement register (MR). MRNAME and HASH above + are placeholders. The optional suffix :HASH is used for MRs + that have associated hash algorithms. See below for a complete + list of TDX MRs exposed via sysfs. Refer to Intel TDX Module + ABI Specification for the definition of TDREPORT and the full + list of TDX measurements. + + Intel TDX Module ABI Specification can be found at: + https://www.intel.com/content/www/us/en/developer/tools/trust-domain-extensions/documentation.html#architecture + + See also: + https://docs.kernel.org/driver-api/coco/measurement-registers.html + +What: /sys/devices/virtual/misc/tdx_guest/measurements/mrconfigid +Date: April, 2025 +KernelVersion: v6.16 +Contact: linux-coco@lists.linux.dev +Description: + (RO) MRCONFIGID - 48-byte immutable storage typically used for + software-defined ID for non-owner-defined configuration of the + guest TD – e.g., run-time or OS configuration. + +What: /sys/devices/virtual/misc/tdx_guest/measurements/mrowner +Date: April, 2025 +KernelVersion: v6.16 +Contact: linux-coco@lists.linux.dev +Description: + (RO) MROWNER - 48-byte immutable storage typically used for + software-defined ID for the guest TD’s owner. + +What: /sys/devices/virtual/misc/tdx_guest/measurements/mrownerconfig +Date: April, 2025 +KernelVersion: v6.16 +Contact: linux-coco@lists.linux.dev +Description: + (RO) MROWNERCONFIG - 48-byte immutable storage typically used + for software-defined ID for owner-defined configuration of the + guest TD – e.g., specific to the workload rather than the + run-time or OS. + +What: /sys/devices/virtual/misc/tdx_guest/measurements/mrtd:sha384 +Date: April, 2025 +KernelVersion: v6.16 +Contact: linux-coco@lists.linux.dev +Description: + (RO) MRTD - Measurement of the initial contents of the TD. + +What: /sys/devices/virtual/misc/tdx_guest/measurements/rtmr[0123]:sha384 +Date: April, 2025 +KernelVersion: v6.16 +Contact: linux-coco@lists.linux.dev +Description: + (RW) RTMR[0123] - 4 Run-Time extendable Measurement Registers. + Read from any of these returns the current value of the + corresponding RTMR. Write extends the written buffer to the + RTMR. All writes must start at offset 0 and be 48 bytes in + size. Partial writes will result in EINVAL returned by the + write() syscall. -- cgit v1.2.3 From d34db26e9ea504a758841afcd04c73928cd238de Mon Sep 17 00:00:00 2001 From: Yannic Moog Date: Thu, 17 Apr 2025 14:01:12 +0200 Subject: dt-bindings: arm: add imx8mp-libra-rdk-fpsc imx8mp-libra-rdk-fpsc is a development board based on the phyCORE-i.MX 8M Plus FPSC SoM. Add its description and binding. The imx8mp-phycore-fpsc som differs from the existing phyCORE-i.MX 8M Plus (dts: imx8mp-phycore-som.dtsi) in its physical form regarding the ball grid array. Other differences between the SoMs are missing SPI-NOR on this SoM and 1.8V IO voltage instead of 3.3V as found on the existing imx8mp-phycore-som. As a result the imx8mp-phycore-som is not compatible with this new libra development board. Acked-by: Krzysztof Kozlowski Signed-off-by: Yannic Moog Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 447054b52ea3..179d45a4623d 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1162,6 +1162,13 @@ properties: - const: kontron,imx8mp-osm-s # Kontron i.MX8MP OSM-S SoM - const: fsl,imx8mp + - description: PHYTEC phyCORE-i.MX8MP FPSC based boards + items: + - enum: + - phytec,imx8mp-libra-rdk-fpsc # i.MX 8M Plus Libra RDK + - const: phytec,imx8mp-phycore-fpsc # phyCORE-i.MX 8M Plus FPSC + - const: fsl,imx8mp + - description: PHYTEC phyCORE-i.MX8MP SoM based boards items: - const: phytec,imx8mp-phyboard-pollux-rdk # phyBOARD-Pollux RDK -- cgit v1.2.3 From 8005e2afb7028bf05935af722c38d1ccba88b525 Mon Sep 17 00:00:00 2001 From: Keke Li Date: Sun, 27 Apr 2025 14:27:09 +0800 Subject: media: dt-bindings: Add amlogic,c3-mipi-csi2.yaml c3-mipi-csi2 is used to receive mipi data from image sensor. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Keke Li Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- .../bindings/media/amlogic,c3-mipi-csi2.yaml | 127 +++++++++++++++++++++ 1 file changed, 127 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/amlogic,c3-mipi-csi2.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/amlogic,c3-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/amlogic,c3-mipi-csi2.yaml new file mode 100644 index 000000000000..b0129beab0c3 --- /dev/null +++ b/Documentation/devicetree/bindings/media/amlogic,c3-mipi-csi2.yaml @@ -0,0 +1,127 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/amlogic,c3-mipi-csi2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic C3 MIPI CSI-2 receiver + +maintainers: + - Keke Li + +description: + MIPI CSI-2 receiver contains CSI-2 RX PHY and host controller. + It receives the MIPI data from the image sensor and sends MIPI data + to MIPI adapter. + +properties: + compatible: + enum: + - amlogic,c3-mipi-csi2 + + reg: + maxItems: 3 + + reg-names: + items: + - const: aphy + - const: dphy + - const: host + + power-domains: + maxItems: 1 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: vapb + - const: phy0 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: input port node, connected to sensor. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - data-lanes + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: output port node + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - reg-names + - power-domains + - clocks + - clock-names + - ports + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + csi: csi@ff018000 { + compatible = "amlogic,c3-mipi-csi2"; + reg = <0x0 0xff018000 0x0 0x400>, + <0x0 0xff019000 0x0 0x300>, + <0x0 0xff01a000 0x0 0x100>; + reg-names = "aphy", "dphy", "host"; + power-domains = <&pwrc PWRC_C3_MIPI_ISP_WRAP_ID>; + clocks = <&clkc_periphs CLKID_VAPB>, + <&clkc_periphs CLKID_CSI_PHY0>; + clock-names = "vapb", "phy0"; + assigned-clocks = <&clkc_periphs CLKID_VAPB>, + <&clkc_periphs CLKID_CSI_PHY0>; + assigned-clock-rates = <0>, <200000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + c3_mipi_csi_in: endpoint { + remote-endpoint = <&imx290_out>; + data-lanes = <1 2 3 4>; + }; + }; + + port@1 { + reg = <1>; + c3_mipi_csi_out: endpoint { + remote-endpoint = <&c3_adap_in>; + }; + }; + }; + }; + }; +... -- cgit v1.2.3 From a789e6fc7686c81e59af5697d344df8cf93b8716 Mon Sep 17 00:00:00 2001 From: Keke Li Date: Sun, 27 Apr 2025 14:27:11 +0800 Subject: media: dt-bindings: Add amlogic,c3-mipi-adapter.yaml c3-mipi-adapter is used to organize mipi data and send raw data to ISP module. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Keke Li Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- .../bindings/media/amlogic,c3-mipi-adapter.yaml | 111 +++++++++++++++++++++ 1 file changed, 111 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/amlogic,c3-mipi-adapter.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/amlogic,c3-mipi-adapter.yaml b/Documentation/devicetree/bindings/media/amlogic,c3-mipi-adapter.yaml new file mode 100644 index 000000000000..ba43bc6709a0 --- /dev/null +++ b/Documentation/devicetree/bindings/media/amlogic,c3-mipi-adapter.yaml @@ -0,0 +1,111 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/amlogic,c3-mipi-adapter.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic C3 MIPI adapter receiver + +maintainers: + - Keke Li + +description: + MIPI adapter is used to convert the MIPI CSI-2 data + into an ISP supported data format. + +properties: + compatible: + enum: + - amlogic,c3-mipi-adapter + + reg: + maxItems: 3 + + reg-names: + items: + - const: top + - const: fd + - const: rd + + power-domains: + maxItems: 1 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: vapb + - const: isp0 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: input port node. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: output port node. + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - reg-names + - power-domains + - clocks + - clock-names + - ports + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + adap: adap@ff010000 { + compatible = "amlogic,c3-mipi-adapter"; + reg = <0x0 0xff010000 0x0 0x100>, + <0x0 0xff01b000 0x0 0x100>, + <0x0 0xff01d000 0x0 0x200>; + reg-names = "top", "fd", "rd"; + power-domains = <&pwrc PWRC_C3_ISP_TOP_ID>; + clocks = <&clkc_periphs CLKID_VAPB>, + <&clkc_periphs CLKID_ISP0>; + clock-names = "vapb", "isp0"; + assigned-clocks = <&clkc_periphs CLKID_VAPB>, + <&clkc_periphs CLKID_ISP0>; + assigned-clock-rates = <0>, <400000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + c3_adap_in: endpoint { + remote-endpoint = <&c3_mipi_csi_out>; + }; + }; + + port@1 { + reg = <1>; + c3_adap_out: endpoint { + remote-endpoint = <&c3_isp_in>; + }; + }; + }; + }; + }; +... -- cgit v1.2.3 From d0a02f67f032873922dccca70d26340e41d62072 Mon Sep 17 00:00:00 2001 From: Keke Li Date: Sun, 27 Apr 2025 14:27:13 +0800 Subject: media: dt-bindings: Add amlogic,c3-isp.yaml c3-isp is used to process raw image. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Keke Li Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- .../devicetree/bindings/media/amlogic,c3-isp.yaml | 88 ++++++++++++++++++++++ 1 file changed, 88 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/amlogic,c3-isp.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/amlogic,c3-isp.yaml b/Documentation/devicetree/bindings/media/amlogic,c3-isp.yaml new file mode 100644 index 000000000000..123bf462f098 --- /dev/null +++ b/Documentation/devicetree/bindings/media/amlogic,c3-isp.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/amlogic,c3-isp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic C3 Image Signal Processing Unit + +maintainers: + - Keke Li + +description: + Amlogic ISP is the RAW image processing module + and supports three channels image output. + +properties: + compatible: + enum: + - amlogic,c3-isp + + reg: + maxItems: 1 + + reg-names: + items: + - const: isp + + power-domains: + maxItems: 1 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: vapb + - const: isp0 + + interrupts: + maxItems: 1 + + port: + $ref: /schemas/graph.yaml#/properties/port + description: input port node. + +required: + - compatible + - reg + - reg-names + - power-domains + - clocks + - clock-names + - interrupts + - port + +additionalProperties: false + +examples: + - | + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + isp: isp@ff000000 { + compatible = "amlogic,c3-isp"; + reg = <0x0 0xff000000 0x0 0xf000>; + reg-names = "isp"; + power-domains = <&pwrc PWRC_C3_ISP_TOP_ID>; + clocks = <&clkc_periphs CLKID_VAPB>, + <&clkc_periphs CLKID_ISP0>; + clock-names = "vapb", "isp0"; + assigned-clocks = <&clkc_periphs CLKID_VAPB>, + <&clkc_periphs CLKID_ISP0>; + assigned-clock-rates = <0>, <400000000>; + interrupts = ; + + port { + c3_isp_in: endpoint { + remote-endpoint = <&c3_adap_out>; + }; + }; + }; + }; +... -- cgit v1.2.3 From f0d3a857ae4e0ea67b99bab3cf00c5c46eb7cefb Mon Sep 17 00:00:00 2001 From: Keke Li Date: Sun, 27 Apr 2025 14:27:17 +0800 Subject: Documentation: media: Add documentation file metafmt-c3-isp.rst Add the file 'metafmt-c3-isp.rst' that documents the meta format of c3-isp. Reviewed-by: Jacopo Mondi Signed-off-by: Keke Li Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- .../userspace-api/media/v4l/meta-formats.rst | 1 + .../userspace-api/media/v4l/metafmt-c3-isp.rst | 86 ++++++++++++++++++++++ 2 files changed, 87 insertions(+) create mode 100644 Documentation/userspace-api/media/v4l/metafmt-c3-isp.rst (limited to 'Documentation') diff --git a/Documentation/userspace-api/media/v4l/meta-formats.rst b/Documentation/userspace-api/media/v4l/meta-formats.rst index 86ffb3bc8ade..bb6876cfc271 100644 --- a/Documentation/userspace-api/media/v4l/meta-formats.rst +++ b/Documentation/userspace-api/media/v4l/meta-formats.rst @@ -12,6 +12,7 @@ These formats are used for the :ref:`metadata` interface only. .. toctree:: :maxdepth: 1 + metafmt-c3-isp metafmt-d4xx metafmt-generic metafmt-intel-ipu3 diff --git a/Documentation/userspace-api/media/v4l/metafmt-c3-isp.rst b/Documentation/userspace-api/media/v4l/metafmt-c3-isp.rst new file mode 100644 index 000000000000..449b45c2ec24 --- /dev/null +++ b/Documentation/userspace-api/media/v4l/metafmt-c3-isp.rst @@ -0,0 +1,86 @@ +.. SPDX-License-Identifier: (GPL-2.0-only OR MIT) + +.. _v4l2-meta-fmt-c3isp-stats: +.. _v4l2-meta-fmt-c3isp-params: + +*********************************************************************** +V4L2_META_FMT_C3ISP_STATS ('C3ST'), V4L2_META_FMT_C3ISP_PARAMS ('C3PM') +*********************************************************************** + +.. c3_isp_stats_info + +3A Statistics +============= + +The C3 ISP can collect different statistics over an input Bayer frame. +Those statistics are obtained from the "c3-isp-stats" metadata capture video nodes, +using the :c:type:`v4l2_meta_format` interface. +They are formatted as described by the :c:type:`c3_isp_stats_info` structure. + +The statistics collected are Auto-white balance, +Auto-exposure and Auto-focus information. + +.. c3_isp_params_cfg + +Configuration Parameters +======================== + +The configuration parameters are passed to the c3-isp-params metadata output video node, +using the :c:type:`v4l2_meta_format` interface. Rather than a single struct containing +sub-structs for each configurable area of the ISP, parameters for the C3-ISP +are defined as distinct structs or "blocks" which may be added to the data +member of :c:type:`c3_isp_params_cfg`. Userspace is responsible for +populating the data member with the blocks that need to be configured by the driver, but +need not populate it with **all** the blocks, or indeed with any at all if there +are no configuration changes to make. Populated blocks **must** be consecutive +in the buffer. To assist both userspace and the driver in identifying the +blocks each block-specific struct embeds +:c:type:`c3_isp_params_block_header` as its first member and userspace +must populate the type member with a value from +:c:type:`c3_isp_params_block_type`. Once the blocks have been populated +into the data buffer, the combined size of all populated blocks shall be set in +the data_size member of :c:type:`c3_isp_params_cfg`. For example: + +.. code-block:: c + + struct c3_isp_params_cfg *params = + (struct c3_isp_params_cfg *)buffer; + + params->version = C3_ISP_PARAM_BUFFER_V0; + params->data_size = 0; + + void *data = (void *)params->data; + + struct c3_isp_params_awb_gains *gains = + (struct c3_isp_params_awb_gains *)data; + + gains->header.type = C3_ISP_PARAMS_BLOCK_AWB_GAINS; + gains->header.flags = C3_ISP_PARAMS_BLOCK_FL_ENABLE; + gains->header.size = sizeof(struct c3_isp_params_awb_gains); + + gains->gr_gain = 256; + gains->r_gain = 256; + gains->b_gain = 256; + gains->gb_gain = 256; + + data += sizeof(struct c3_isp__params_awb_gains); + params->data_size += sizeof(struct c3_isp_params_awb_gains); + + struct c3_isp_params_awb_config *awb_cfg = + (struct c3_isp_params_awb_config *)data; + + awb_cfg->header.type = C3_ISP_PARAMS_BLOCK_AWB_CONFIG; + awb_cfg->header.flags = C3_ISP_PARAMS_BLOCK_FL_ENABLE; + awb_cfg->header.size = sizeof(struct c3_isp_params_awb_config); + + awb_cfg->tap_point = C3_ISP_AWB_STATS_TAP_BEFORE_WB; + awb_cfg->satur = 1; + awb_cfg->horiz_zones_num = 32; + awb_cfg->vert_zones_num = 24; + + params->data_size += sizeof(struct c3_isp_params_awb_config); + +Amlogic C3 ISP uAPI data types +=============================== + +.. kernel-doc:: include/uapi/linux/media/amlogic/c3-isp-config.h -- cgit v1.2.3 From f8953ee959546ae8faaa20f405647e5aecc42614 Mon Sep 17 00:00:00 2001 From: Keke Li Date: Sun, 27 Apr 2025 14:27:18 +0800 Subject: Documentation: media: Add documentation file c3-isp.rst Add the file 'c3-isp.rst' that documents the c3-isp driver. Signed-off-by: Keke Li Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- Documentation/admin-guide/media/c3-isp.dot | 26 ++++++ Documentation/admin-guide/media/c3-isp.rst | 101 ++++++++++++++++++++++++ Documentation/admin-guide/media/v4l-drivers.rst | 1 + 3 files changed, 128 insertions(+) create mode 100644 Documentation/admin-guide/media/c3-isp.dot create mode 100644 Documentation/admin-guide/media/c3-isp.rst (limited to 'Documentation') diff --git a/Documentation/admin-guide/media/c3-isp.dot b/Documentation/admin-guide/media/c3-isp.dot new file mode 100644 index 000000000000..42dc931ee84a --- /dev/null +++ b/Documentation/admin-guide/media/c3-isp.dot @@ -0,0 +1,26 @@ +digraph board { + rankdir=TB + n00000001 [label="{{ 0 | 1} | c3-isp-core\n/dev/v4l-subdev0 | { 2 | 3 | 4 | 5}}", shape=Mrecord, style=filled, fillcolor=green] + n00000001:port3 -> n00000008:port0 + n00000001:port4 -> n0000000b:port0 + n00000001:port5 -> n0000000e:port0 + n00000001:port2 -> n00000027 + n00000008 [label="{{ 0} | c3-isp-resizer0\n/dev/v4l-subdev1 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n00000008:port1 -> n00000016 [style=bold] + n0000000b [label="{{ 0} | c3-isp-resizer1\n/dev/v4l-subdev2 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n0000000b:port1 -> n0000001a [style=bold] + n0000000e [label="{{ 0} | c3-isp-resizer2\n/dev/v4l-subdev3 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n0000000e:port1 -> n00000023 [style=bold] + n00000011 [label="{{ 0} | c3-mipi-adapter\n/dev/v4l-subdev4 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n00000011:port1 -> n00000001:port0 [style=bold] + n00000016 [label="c3-isp-cap0\n/dev/video0", shape=box, style=filled, fillcolor=yellow] + n0000001a [label="c3-isp-cap1\n/dev/video1", shape=box, style=filled, fillcolor=yellow] + n0000001e [label="{{ 0} | c3-mipi-csi2\n/dev/v4l-subdev5 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n0000001e:port1 -> n00000011:port0 [style=bold] + n00000023 [label="c3-isp-cap2\n/dev/video2", shape=box, style=filled, fillcolor=yellow] + n00000027 [label="c3-isp-stats\n/dev/video3", shape=box, style=filled, fillcolor=yellow] + n0000002b [label="c3-isp-params\n/dev/video4", shape=box, style=filled, fillcolor=yellow] + n0000002b -> n00000001:port1 + n0000003f [label="{{} | imx290 2-001a\n/dev/v4l-subdev6 | { 0}}", shape=Mrecord, style=filled, fillcolor=green] + n0000003f:port0 -> n0000001e:port0 [style=bold] +} diff --git a/Documentation/admin-guide/media/c3-isp.rst b/Documentation/admin-guide/media/c3-isp.rst new file mode 100644 index 000000000000..ac508b8c6831 --- /dev/null +++ b/Documentation/admin-guide/media/c3-isp.rst @@ -0,0 +1,101 @@ +.. SPDX-License-Identifier: (GPL-2.0-only OR MIT) + +.. include:: + +================================================= +Amlogic C3 Image Signal Processing (C3ISP) driver +================================================= + +Introduction +============ + +This file documents the Amlogic C3ISP driver located under +drivers/media/platform/amlogic/c3/isp. + +The current version of the driver supports the C3ISP found on +Amlogic C308L processor. + +The driver implements V4L2, Media controller and V4L2 subdev interfaces. +Camera sensor using V4L2 subdev interface in the kernel is supported. + +The driver has been tested on AW419-C308L-Socket platform. + +Amlogic C3 ISP +============== + +The Camera hardware found on C308L processors and supported by +the driver consists of: + +- 1 MIPI-CSI-2 module: handles the physical layer of the MIPI CSI-2 receiver and + receives data from the connected camera sensor. +- 1 MIPI-ADAPTER module: organizes MIPI data to meet ISP input requirements and + send MIPI data to ISP. +- 1 ISP (Image Signal Processing) module: contains a pipeline of image processing + hardware blocks. The ISP pipeline contains three resizers at the end each of + them connected to a DMA interface which writes the output data to memory. + +A high-level functional view of the C3 ISP is presented below.:: + + +----------+ +-------+ + | Resizer |--->| WRMIF | + +---------+ +------------+ +--------------+ +-------+ |----------+ +-------+ + | Sensor |--->| MIPI CSI-2 |--->| MIPI ADAPTER |--->| ISP |---|----------+ +-------+ + +---------+ +------------+ +--------------+ +-------+ | Resizer |--->| WRMIF | + +----------+ +-------+ + |----------+ +-------+ + | Resizer |--->| WRMIF | + +----------+ +-------+ + +Driver architecture and design +============================== + +With the goal to model the hardware links between the modules and to expose a +clean, logical and usable interface, the driver registers the following V4L2 +sub-devices: + +- 1 `c3-mipi-csi2` sub-device - the MIPI CSI-2 receiver +- 1 `c3-mipi-adapter` sub-device - the MIPI adapter +- 1 `c3-isp-core` sub-device - the ISP core +- 3 `c3-isp-resizer` sub-devices - the ISP resizers + +The `c3-isp-core` sub-device is linked to 2 video device nodes for statistics +capture and parameters programming: + +- the `c3-isp-stats` capture video device node for statistics capture +- the `c3-isp-params` output video device for parameters programming + +Each `c3-isp-resizer` sub-device is linked to a capture video device node where +frames are captured from: + +- `c3-isp-resizer0` is linked to the `c3-isp-cap0` capture video device +- `c3-isp-resizer1` is linked to the `c3-isp-cap1` capture video device +- `c3-isp-resizer2` is linked to the `c3-isp-cap2` capture video device + +The media controller pipeline graph is as follows (with connected a +IMX290 camera sensor): + +.. _isp_topology_graph: + +.. kernel-figure:: c3-isp.dot + :alt: c3-isp.dot + :align: center + + Media pipeline topology + +Implementation +============== + +Runtime configuration of the ISP hardware is performed on the `c3-isp-params` +video device node using the :ref:`V4L2_META_FMT_C3ISP_PARAMS +` as data format. The buffer structure is defined by +:c:type:`c3_isp_params_cfg`. + +Statistics are captured from the `c3-isp-stats` video device node using the +:ref:`V4L2_META_FMT_C3ISP_STATS ` data format. + +The final picture size and format is configured using the V4L2 video +capture interface on the `c3-isp-cap[0, 2]` video device nodes. + +The Amlogic C3 ISP is supported by `libcamera `_ with a +dedicated pipeline handler and algorithms that perform run-time image correction +and enhancement. diff --git a/Documentation/admin-guide/media/v4l-drivers.rst b/Documentation/admin-guide/media/v4l-drivers.rst index e8761561b2fe..3bac5165b134 100644 --- a/Documentation/admin-guide/media/v4l-drivers.rst +++ b/Documentation/admin-guide/media/v4l-drivers.rst @@ -10,6 +10,7 @@ Video4Linux (V4L) driver-specific documentation :maxdepth: 2 bttv + c3-isp cafe_ccic cx88 fimc -- cgit v1.2.3 From 4f28aeab5293317d5dc031d77ff2a35270b012aa Mon Sep 17 00:00:00 2001 From: Jacky Bai Date: Mon, 21 Apr 2025 14:51:37 +0800 Subject: dt-bindings: arm: fsl: add i.MX943 EVK board Add DT compatible string for NXP i.MX943 EVK board. Signed-off-by: Jacky Bai Acked-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 179d45a4623d..a25160abe902 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1366,6 +1366,12 @@ properties: - fsl,imx93-14x14-evk # i.MX93 14x14 EVK Board - const: fsl,imx93 + - description: i.MX94 based Boards + items: + - enum: + - fsl,imx943-evk # i.MX943 EVK Board + - const: fsl,imx94 + - description: i.MX95 based Boards items: - enum: -- cgit v1.2.3 From 50c9bb30dc1f9731995a191deafbc49be717053e Mon Sep 17 00:00:00 2001 From: Zihuan Zhang Date: Wed, 7 May 2025 14:35:20 +0800 Subject: PM: hibernate: add configurable delay for pm_test Turn the default 5 second test delay for hibernation into a configurable module parameter, so users can determine how long to wait in this pseudo-hibernate state before resuming the system. The configurable delay parameter has been added for suspend, so add an analogous one for hibernation. Example (wait 30 seconds); # echo 30 > /sys/module/hibernate/parameters/pm_test_delay # echo core > /sys/power/pm_test Signed-off-by: Zihuan Zhang Reviewed-by: Randy Dunlap Link: https://patch.msgid.link/20250507063520.419635-1-zhangzihuan@kylinos.cn [ rjw: Subject and changelog edits ] Signed-off-by: Rafael J. Wysocki --- Documentation/admin-guide/kernel-parameters.txt | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 76e538c77e31..ccd61e22403f 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -1831,6 +1831,13 @@ lz4: Select LZ4 compression algorithm to compress/decompress hibernation image. + hibernate.pm_test_delay= + [HIBERNATION] + Sets the number of seconds to remain in a hibernation test + mode before resuming the system (see + /sys/power/pm_test). Only available when CONFIG_PM_DEBUG + is set. Default value is 5. + highmem=nn[KMG] [KNL,BOOT,EARLY] forces the highmem zone to have an exact size of . This works even on boxes that have no highmem otherwise. This also works to reduce highmem -- cgit v1.2.3 From 3f7de71cce2c7bac38d472dc486f57bfcb0903f5 Mon Sep 17 00:00:00 2001 From: Markus Niebel Date: Thu, 24 Apr 2025 09:55:29 +0200 Subject: dt-bindings: arm: add TQMa8XxS boards TQMa8XxS is a SOM series featuring NXP i.MX8X SoC. They are called TQMa8XQPS and TQMa8XDPS respectively. MB-SMARC-2 is a carrier reference design. Signed-off-by: Markus Niebel Signed-off-by: Alexander Stein Acked-by: Rob Herring (Arm) Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index a25160abe902..4ae7d10a4352 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1352,6 +1352,22 @@ properties: - const: tq,imx8qxp-tqma8xqp # TQ-Systems GmbH TQMa8XQP SOM (with i.MX8QXP) - const: fsl,imx8qxp + - description: + TQMa8XxS is a series of SOM featuring NXP i.MX8X system-on-chip + variants. It has the SMARC-2.0 form factor and is designed to be placed on + different carrier boards. MB-SMARC-2 is a carrier reference design. + oneOf: + - items: + - enum: + - tq,imx8qxp-tqma8xqps-mb-smarc-2 # TQ-Systems GmbH TQMa8QXPS SOM on MB-SMARC-2 + - const: tq,imx8qxp-tqma8xqps # TQ-Systems GmbH TQMa8QXPS SOM + - const: fsl,imx8qxp + - items: + - enum: + - tq,imx8dxp-tqma8xdps-mb-smarc-2 # TQ-Systems GmbH TQMa8XDPS SOM on MB-SMARC-2 + - const: tq,imx8dxp-tqma8xdps # TQ-Systems GmbH TQMa8XDPS SOM + - const: fsl,imx8dxp + - description: i.MX8ULP based Boards items: - enum: -- cgit v1.2.3 From 190b565788ed82163dec6fc8778b618cdc1644c7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andr=C3=A9=20Draszik?= Date: Tue, 25 Mar 2025 08:27:02 +0000 Subject: dt-bindings: gpio: Add max77759 binding MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Maxim MAX77759 is a companion PMIC for USB Type-C applications and includes Battery Charger, Fuel Gauge, temperature sensors, USB Type-C Port Controller (TCPC), NVMEM, and a GPIO expander. This describes its GPIO module. Signed-off-by: André Draszik Reviewed-by: "Rob Herring (Arm)" Acked-by: Bartosz Golaszewski Link: https://lore.kernel.org/r/20250325-max77759-mfd-v6-1-c0870ca662ba@linaro.org Signed-off-by: Lee Jones --- .../bindings/gpio/maxim,max77759-gpio.yaml | 44 ++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/maxim,max77759-gpio.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpio/maxim,max77759-gpio.yaml b/Documentation/devicetree/bindings/gpio/maxim,max77759-gpio.yaml new file mode 100644 index 000000000000..55734190d5eb --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/maxim,max77759-gpio.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/maxim,max77759-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim Integrated MAX77759 GPIO + +maintainers: + - André Draszik + +description: | + This module is part of the MAX77759 PMIC. For additional information, see + Documentation/devicetree/bindings/mfd/maxim,max77759.yaml. + + The MAX77759 is a PMIC integrating, amongst others, a GPIO controller + including interrupt support for 2 GPIO lines. + +properties: + compatible: + const: maxim,max77759-gpio + + "#gpio-cells": + const: 2 + + gpio-controller: true + + gpio-line-names: + minItems: 1 + maxItems: 2 + + "#interrupt-cells": + const: 2 + + interrupt-controller: true + +required: + - compatible + - "#gpio-cells" + - gpio-controller + - "#interrupt-cells" + - interrupt-controller + +additionalProperties: false -- cgit v1.2.3 From ee71546b8120593ff4c292d2d4c2250d11182746 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andr=C3=A9=20Draszik?= Date: Tue, 25 Mar 2025 08:27:03 +0000 Subject: dt-bindings: nvmem: Add max77759 binding MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Maxim MAX77759 is a companion PMIC for USB Type-C applications and includes Battery Charger, Fuel Gauge, temperature sensors, USB Type-C Port Controller (TCPC), NVMEM, and a GPIO expander. This describes its storage module (NVMEM). Signed-off-by: André Draszik Reviewed-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250325-max77759-mfd-v6-2-c0870ca662ba@linaro.org Signed-off-by: Lee Jones --- .../bindings/nvmem/maxim,max77759-nvmem.yaml | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/maxim,max77759-nvmem.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/nvmem/maxim,max77759-nvmem.yaml b/Documentation/devicetree/bindings/nvmem/maxim,max77759-nvmem.yaml new file mode 100644 index 000000000000..1e3bd4433007 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/maxim,max77759-nvmem.yaml @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/maxim,max77759-nvmem.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim Integrated MAX77759 Non Volatile Memory + +maintainers: + - André Draszik + +description: | + This module is part of the MAX77759 PMIC. For additional information, see + Documentation/devicetree/bindings/mfd/maxim,max77759.yaml. + + The MAX77759 is a PMIC integrating, amongst others, Non Volatile Memory + (NVMEM) with 30 bytes of storage which can be used by software to store + information or communicate with a boot loader. + +properties: + compatible: + const: maxim,max77759-nvmem + + wp-gpios: false + +required: + - compatible + +allOf: + - $ref: nvmem.yaml# + +unevaluatedProperties: false -- cgit v1.2.3 From 81fec13be95345a57cd97b7f2b823ca1ef7c9dd5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andr=C3=A9=20Draszik?= Date: Tue, 25 Mar 2025 08:27:04 +0000 Subject: dt-bindings: mfd: Add max77759 binding MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Maxim MAX77759 is a companion PMIC for USB Type-C applications and includes Battery Charger, Fuel Gauge, temperature sensors, USB Type-C Port Controller (TCPC), NVMEM, and a GPIO expander. This describes the top-level device. Signed-off-by: André Draszik Reviewed-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250325-max77759-mfd-v6-3-c0870ca662ba@linaro.org Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/maxim,max77759.yaml | 99 ++++++++++++++++++++++ 1 file changed, 99 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/maxim,max77759.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/maxim,max77759.yaml b/Documentation/devicetree/bindings/mfd/maxim,max77759.yaml new file mode 100644 index 000000000000..525de9ab3c2b --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/maxim,max77759.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/maxim,max77759.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim Integrated MAX77759 PMIC for USB Type-C applications + +maintainers: + - André Draszik + +description: | + This is a part of device tree bindings for the MAX77759 companion Power + Management IC for USB Type-C applications. + + The MAX77759 includes Battery Charger, Fuel Gauge, temperature sensors, USB + Type-C Port Controller (TCPC), NVMEM, and a GPIO expander. + +properties: + compatible: + const: maxim,max77759 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + reg: + maxItems: 1 + + gpio: + $ref: /schemas/gpio/maxim,max77759-gpio.yaml + + nvmem-0: + $ref: /schemas/nvmem/maxim,max77759-nvmem.yaml + +required: + - compatible + - interrupts + - reg + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@66 { + compatible = "maxim,max77759"; + reg = <0x66>; + interrupts-extended = <&gpa8 3 IRQ_TYPE_LEVEL_LOW>; + + interrupt-controller; + #interrupt-cells = <2>; + + gpio { + compatible = "maxim,max77759-gpio"; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + nvmem-0 { + compatible = "maxim,max77759-nvmem"; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + reboot-mode@0 { + reg = <0x0 0x4>; + }; + + boot-reason@4 { + reg = <0x4 0x4>; + }; + + shutdown-user-flag@8 { + reg = <0x8 0x1>; + }; + + rsoc@10 { + reg = <0xa 0x2>; + }; + }; + }; + }; + }; -- cgit v1.2.3 From 6495d690aa78f0c118331c48155ebb9f4086edc9 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 28 Apr 2025 15:59:08 +0200 Subject: dt: bindings: arm: add bindings for TQMa95xxSA TQMa95xxSA is a SOM using NXP i.MX95 CPU. MB-SMARC-2 is a carrier reference design. [1] https://www.tq-group.com/en/products/tq-embedded/arm-architecture/tqma95xxsa/ Signed-off-by: Alexander Stein Acked-by: Conor Dooley Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 4ae7d10a4352..651c7822aa1b 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1448,6 +1448,16 @@ properties: - const: kontron,imx93-osm-s # Kontron OSM-S i.MX93 SoM - const: fsl,imx93 + - description: + TQMa95xxSA is a series of SOM featuring NXP i.MX95 SoC variants. + It has the SMARC form factor and is designed to be placed on + different carrier boards. MB-SMARC-2 is a carrier reference design. + items: + - enum: + - tq,imx95-tqma9596sa-mb-smarc-2 # TQ-Systems GmbH i.MX95 TQMa95xxSA SOM on MB-SMARC-2 + - const: tq,imx95-tqma9596sa # TQ-Systems GmbH i.MX95 TQMa95xxSA SOM + - const: fsl,imx95 + - description: Freescale Vybrid Platform Device Tree Bindings -- cgit v1.2.3 From b20c69cd708b8f1b61e311cf05632fefe583f1c4 Mon Sep 17 00:00:00 2001 From: Primoz Fiser Date: Mon, 5 May 2025 09:51:06 +0200 Subject: bindings: arm: fsl: Add PHYTEC phyBOARD-Nash-i.MX93 board Add devicetree bindings for PHYTEC phyBOARD-Nash-i.MX93 board based on the existing PHYTEC phyCORE-i.MX93 SoM (System-on-Module). Adjust the compatibles for the existing phyBOARD-Segin-i.MX93 board, to be able to add additional board based on the phyCORE-i.MX93 SoM. Signed-off-by: Primoz Fiser Reviewed-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 651c7822aa1b..d3b5e6923e41 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1432,8 +1432,10 @@ properties: - description: PHYTEC phyCORE-i.MX93 SoM based boards items: - - const: phytec,imx93-phyboard-segin # phyBOARD-Segin with i.MX93 - - const: phytec,imx93-phycore-som # phyCORE-i.MX93 SoM + - enum: + - phytec,imx93-phyboard-nash # phyBOARD-Nash-i.MX93 + - phytec,imx93-phyboard-segin # phyBOARD-Segin with i.MX93 + - const: phytec,imx93-phycore-som # phyCORE-i.MX93 SoM - const: fsl,imx93 - description: Variscite VAR-SOM-MX93 based boards -- cgit v1.2.3 From 87b480e04af45833deb5af1584694b0077805ea6 Mon Sep 17 00:00:00 2001 From: Zelong Dong Date: Fri, 11 Apr 2025 19:38:15 +0800 Subject: dt-bindings: reset: Add compatible for Amlogic A4/A5 Reset Controller Add compatibles for Amlogic A4 and A5 reset controllers, which fall back to 'amlogic,meson-s4-reset'. Signed-off-by: Zelong Dong Acked-by: Conor Dooley Acked-by: Philipp Zabel Link: https://lore.kernel.org/r/20240918074211.8067-2-zelong.dong@amlogic.com Signed-off-by: Kelvin Zhang Link: https://lore.kernel.org/r/20250411-a4-a5-reset-v6-1-89963278c686@amlogic.com Signed-off-by: Neil Armstrong --- .../bindings/reset/amlogic,meson-reset.yaml | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml index 695ef38a7bb3..150e95c0d9be 100644 --- a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml +++ b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml @@ -12,14 +12,20 @@ maintainers: properties: compatible: - enum: - - amlogic,meson8b-reset # Reset Controller on Meson8b and compatible SoCs - - amlogic,meson-gxbb-reset # Reset Controller on GXBB and compatible SoCs - - amlogic,meson-axg-reset # Reset Controller on AXG and compatible SoCs - - amlogic,meson-a1-reset # Reset Controller on A1 and compatible SoCs - - amlogic,meson-s4-reset # Reset Controller on S4 and compatible SoCs - - amlogic,c3-reset # Reset Controller on C3 and compatible SoCs - - amlogic,t7-reset + oneOf: + - enum: + - amlogic,meson8b-reset # Reset Controller on Meson8b and compatible SoCs + - amlogic,meson-gxbb-reset # Reset Controller on GXBB and compatible SoCs + - amlogic,meson-axg-reset # Reset Controller on AXG and compatible SoCs + - amlogic,meson-a1-reset # Reset Controller on A1 and compatible SoCs + - amlogic,meson-s4-reset # Reset Controller on S4 and compatible SoCs + - amlogic,c3-reset # Reset Controller on C3 and compatible SoCs + - amlogic,t7-reset + - items: + - enum: + - amlogic,a4-reset + - amlogic,a5-reset + - const: amlogic,meson-s4-reset reg: maxItems: 1 -- cgit v1.2.3 From 40f983aa2d809b4934a260c76b82e9ff19c09a88 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=2E=20Neusch=C3=A4fer?= Date: Mon, 28 Apr 2025 12:44:28 +0200 Subject: dt-bindings: vendor-prefixes: Add TC Unterhaltungselektronik AG MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit TC Unterhaltungselektronik is the company behind Fernsehfee branded set-top boxes. Acked-by: Krzysztof Kozlowski Signed-off-by: J. Neuschäfer Link: https://lore.kernel.org/r/20250428-fernsehfee-v2-1-293b98a43a91@posteo.net Signed-off-by: Neil Armstrong --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 86f6a19b28ae..c61c5e11ff54 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1494,6 +1494,8 @@ patternProperties: description: Toby Churchill Ltd. "^tcs,.*": description: Shenzhen City Tang Cheng Technology Co., Ltd. + "^tcu,.*": + description: TC Unterhaltungselektronik AG "^tdo,.*": description: Shangai Top Display Optoelectronics Co., Ltd "^team-source-display,.*": -- cgit v1.2.3 From eb7af1268e0042e83607918229cd62c3669cdcb8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=2E=20Neusch=C3=A4fer?= Date: Mon, 28 Apr 2025 12:44:29 +0200 Subject: dt-bindings: arm: amlogic: Add TCU Fernsehfee 3.0 board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fernsehfee ("TV fairy") 3.0 is a set-top box with HDMI input and output ports. It originally ran Android 4.4 and a Linux 3.10 kernel. https://fernsehfee.de/ (German) https://telefairy.com/ (English) Acked-by: Krzysztof Kozlowski Reviewed-by: Martin Blumenstingl Signed-off-by: J. Neuschäfer Link: https://lore.kernel.org/r/20250428-fernsehfee-v2-2-293b98a43a91@posteo.net Signed-off-by: Neil Armstrong --- Documentation/devicetree/bindings/arm/amlogic.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml index 0647851ae1f5..f6f045528da3 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -27,6 +27,7 @@ properties: items: - enum: - minix,neo-x8 + - tcu,fernsehfee3 - const: amlogic,meson8 - description: Boards with the Amlogic Meson8m2 SoC -- cgit v1.2.3 From 7330e002c050eea6a47dfa57c7f128af2e8dc592 Mon Sep 17 00:00:00 2001 From: Moon Hee Lee Date: Tue, 6 May 2025 15:00:57 -0700 Subject: PM: EM: Documentation: fix typo in energy-model.rst Fixes a grammar issue ("than" -> "then") and changes "re-use" to "reuse" for consistency with modern spelling. Signed-off-by: Moon Hee Lee Link: https://patch.msgid.link/20250506220057.5589-1-moonhee.lee.ca@gmail.com [ rjw: Subject edits ] Signed-off-by: Rafael J. Wysocki --- Documentation/power/energy-model.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/power/energy-model.rst b/Documentation/power/energy-model.rst index ada4938c37e5..490ddd483f46 100644 --- a/Documentation/power/energy-model.rst +++ b/Documentation/power/energy-model.rst @@ -230,7 +230,7 @@ Drivers must provide a pointer to the allocated and initialized new EM and will be visible to other sub-systems in the kernel (thermal, powercap). The main design goal for this API is to be fast and avoid extra calculations or memory allocations at runtime. When pre-computed EMs are available in the -device driver, than it should be possible to simply re-use them with low +device driver, then it should be possible to simply reuse them with low performance overhead. In order to free the EM, provided earlier by the driver (e.g. when the module -- cgit v1.2.3 From 7b382efd5e8af4c0c67e70ad3fb599dcd2dc0b86 Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Thu, 8 May 2025 09:56:39 -0400 Subject: tracing: Allow the top level trace_marker to write into another instances There are applications that have it hard coded to write into the top level trace_marker instance (/sys/kernel/tracing/trace_marker). This can be annoying if a profiler is using that instance for other work, or if it needs all writes to go into a new instance. A new option is created called "copy_trace_marker". By default, the top level has this set, as that is the default buffer that writing into the top level trace_marker file will go to. But now if an instance is created and sets this option, all writes into the top level trace_marker will also be written into that instance buffer just as if an application were to write into the instance's trace_marker file. If the top level instance disables this option, then writes to its own trace_marker and trace_marker_raw files will not go into its buffer. If no instance has this option set, then the write will return an error and errno will contain ENODEV. Cc: Masami Hiramatsu Cc: Mathieu Desnoyers Link: https://lore.kernel.org/20250508095639.39f84eda@gandalf.local.home Signed-off-by: Steven Rostedt (Google) --- Documentation/trace/ftrace.rst | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'Documentation') diff --git a/Documentation/trace/ftrace.rst b/Documentation/trace/ftrace.rst index c9e88bf65709..af66a05e18cc 100644 --- a/Documentation/trace/ftrace.rst +++ b/Documentation/trace/ftrace.rst @@ -1205,6 +1205,19 @@ Here are the available options: default instance. The only way the top level instance has this flag cleared, is by it being set in another instance. + copy_trace_marker + If there are applications that hard code writing into the top level + trace_marker file (/sys/kernel/tracing/trace_marker or trace_marker_raw), + and the tooling would like it to go into an instance, this option can + be used. Create an instance and set this option, and then all writes + into the top level trace_marker file will also be redirected into this + instance. + + Note, by default this option is set for the top level instance. If it + is disabled, then writes to the trace_marker or trace_marker_raw files + will not be written into the top level file. If no instance has this + option set, then a write will error with the errno of ENODEV. + annotate It is sometimes confusing when the CPU buffers are full and one CPU buffer had a lot of events recently, thus -- cgit v1.2.3 From ff7c417e54a8cca74db147ba0417ecdfcb99f89c Mon Sep 17 00:00:00 2001 From: Chaoyi Chen Date: Tue, 6 May 2025 11:43:46 +0800 Subject: dt-bindings: arm: rockchip: Add rk3399 industry evaluation board Add devicetree binding for the rk3399 industry evaluation board. Signed-off-by: Chaoyi Chen Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250506034347.57-2-kernel@airkyi.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 455fbb290b77..3a6d85a3beb2 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -1047,6 +1047,11 @@ properties: - const: rockchip,rk3399-evb - const: rockchip,rk3399 + - description: Rockchip RK3399 Industry Evaluation board + items: + - const: rockchip,rk3399-evb-ind + - const: rockchip,rk3399 + - description: Rockchip RK3399 Sapphire standalone items: - const: rockchip,rk3399-sapphire -- cgit v1.2.3 From 874c1117621d441e0ef4a609665f228a4b8a1932 Mon Sep 17 00:00:00 2001 From: FUKAUMI Naoki Date: Thu, 8 May 2025 19:48:52 +0200 Subject: dt-bindings: arm: rockchip: Add Radxa ROCK 5B+ The Radxa ROCK 5B+ is an improved version of the ROCK 5B. Signed-off-by: FUKAUMI Naoki Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel Link: https://lore.kernel.org/r/20250508-rock5bp-for-upstream-v2-3-677033cc1ac2@kernel.org Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 3a6d85a3beb2..e6d7a3fd9a63 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -946,6 +946,11 @@ properties: - const: radxa,rock-5b - const: rockchip,rk3588 + - description: Radxa ROCK 5B+ + items: + - const: radxa,rock-5b-plus + - const: rockchip,rk3588 + - description: Radxa ROCK 5C items: - const: radxa,rock-5c -- cgit v1.2.3 From 1ac116ce6468670eeda39345a5585df308243dca Mon Sep 17 00:00:00 2001 From: Pawan Gupta Date: Fri, 11 Apr 2025 15:36:38 -0700 Subject: Documentation: x86/bugs/its: Add ITS documentation Add the admin-guide for Indirect Target Selection (ITS). Signed-off-by: Pawan Gupta Signed-off-by: Dave Hansen Reviewed-by: Josh Poimboeuf Reviewed-by: Alexandre Chartre --- Documentation/admin-guide/hw-vuln/index.rst | 1 + .../hw-vuln/indirect-target-selection.rst | 168 +++++++++++++++++++++ 2 files changed, 169 insertions(+) create mode 100644 Documentation/admin-guide/hw-vuln/indirect-target-selection.rst (limited to 'Documentation') diff --git a/Documentation/admin-guide/hw-vuln/index.rst b/Documentation/admin-guide/hw-vuln/index.rst index 451874b8135d..ce296b8430fc 100644 --- a/Documentation/admin-guide/hw-vuln/index.rst +++ b/Documentation/admin-guide/hw-vuln/index.rst @@ -23,3 +23,4 @@ are configurable at compile, boot or run time. gather_data_sampling reg-file-data-sampling rsb + indirect-target-selection diff --git a/Documentation/admin-guide/hw-vuln/indirect-target-selection.rst b/Documentation/admin-guide/hw-vuln/indirect-target-selection.rst new file mode 100644 index 000000000000..d9ca64108d23 --- /dev/null +++ b/Documentation/admin-guide/hw-vuln/indirect-target-selection.rst @@ -0,0 +1,168 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Indirect Target Selection (ITS) +=============================== + +ITS is a vulnerability in some Intel CPUs that support Enhanced IBRS and were +released before Alder Lake. ITS may allow an attacker to control the prediction +of indirect branches and RETs located in the lower half of a cacheline. + +ITS is assigned CVE-2024-28956 with a CVSS score of 4.7 (Medium). + +Scope of Impact +--------------- +- **eIBRS Guest/Host Isolation**: Indirect branches in KVM/kernel may still be + predicted with unintended target corresponding to a branch in the guest. + +- **Intra-Mode BTI**: In-kernel training such as through cBPF or other native + gadgets. + +- **Indirect Branch Prediction Barrier (IBPB)**: After an IBPB, indirect + branches may still be predicted with targets corresponding to direct branches + executed prior to the IBPB. This is fixed by the IPU 2025.1 microcode, which + should be available via distro updates. Alternatively microcode can be + obtained from Intel's github repository [#f1]_. + +Affected CPUs +------------- +Below is the list of ITS affected CPUs [#f2]_ [#f3]_: + + ======================== ============ ==================== =============== + Common name Family_Model eIBRS Intra-mode BTI + Guest/Host Isolation + ======================== ============ ==================== =============== + SKYLAKE_X (step >= 6) 06_55H Affected Affected + ICELAKE_X 06_6AH Not affected Affected + ICELAKE_D 06_6CH Not affected Affected + ICELAKE_L 06_7EH Not affected Affected + TIGERLAKE_L 06_8CH Not affected Affected + TIGERLAKE 06_8DH Not affected Affected + KABYLAKE_L (step >= 12) 06_8EH Affected Affected + KABYLAKE (step >= 13) 06_9EH Affected Affected + COMETLAKE 06_A5H Affected Affected + COMETLAKE_L 06_A6H Affected Affected + ROCKETLAKE 06_A7H Not affected Affected + ======================== ============ ==================== =============== + +- All affected CPUs enumerate Enhanced IBRS feature. +- IBPB isolation is affected on all ITS affected CPUs, and need a microcode + update for mitigation. +- None of the affected CPUs enumerate BHI_CTRL which was introduced in Golden + Cove (Alder Lake and Sapphire Rapids). This can help guests to determine the + host's affected status. +- Intel Atom CPUs are not affected by ITS. + +Mitigation +---------- +As only the indirect branches and RETs that have their last byte of instruction +in the lower half of the cacheline are vulnerable to ITS, the basic idea behind +the mitigation is to not allow indirect branches in the lower half. + +This is achieved by relying on existing retpoline support in the kernel, and in +compilers. ITS-vulnerable retpoline sites are runtime patched to point to newly +added ITS-safe thunks. These safe thunks consists of indirect branch in the +second half of the cacheline. Not all retpoline sites are patched to thunks, if +a retpoline site is evaluated to be ITS-safe, it is replaced with an inline +indirect branch. + +Dynamic thunks +~~~~~~~~~~~~~~ +From a dynamically allocated pool of safe-thunks, each vulnerable site is +replaced with a new thunk, such that they get a unique address. This could +improve the branch prediction accuracy. Also, it is a defense-in-depth measure +against aliasing. + +Note, for simplicity, indirect branches in eBPF programs are always replaced +with a jump to a static thunk in __x86_indirect_its_thunk_array. If required, +in future this can be changed to use dynamic thunks. + +All vulnerable RETs are replaced with a static thunk, they do not use dynamic +thunks. This is because RETs get their prediction from RSB mostly that does not +depend on source address. RETs that underflow RSB may benefit from dynamic +thunks. But, RETs significantly outnumber indirect branches, and any benefit +from a unique source address could be outweighed by the increased icache +footprint and iTLB pressure. + +Retpoline +~~~~~~~~~ +Retpoline sequence also mitigates ITS-unsafe indirect branches. For this +reason, when retpoline is enabled, ITS mitigation only relocates the RETs to +safe thunks. Unless user requested the RSB-stuffing mitigation. + +RSB Stuffing +~~~~~~~~~~~~ +RSB-stuffing via Call Depth Tracking is a mitigation for Retbleed RSB-underflow +attacks. And it also mitigates RETs that are vulnerable to ITS. + +Mitigation in guests +^^^^^^^^^^^^^^^^^^^^ +All guests deploy ITS mitigation by default, irrespective of eIBRS enumeration +and Family/Model of the guest. This is because eIBRS feature could be hidden +from a guest. One exception to this is when a guest enumerates BHI_DIS_S, which +indicates that the guest is running on an unaffected host. + +To prevent guests from unnecessarily deploying the mitigation on unaffected +platforms, Intel has defined ITS_NO bit(62) in MSR IA32_ARCH_CAPABILITIES. When +a guest sees this bit set, it should not enumerate the ITS bug. Note, this bit +is not set by any hardware, but is **intended for VMMs to synthesize** it for +guests as per the host's affected status. + +Mitigation options +^^^^^^^^^^^^^^^^^^ +The ITS mitigation can be controlled using the "indirect_target_selection" +kernel parameter. The available options are: + + ======== =================================================================== + on (default) Deploy the "Aligned branch/return thunks" mitigation. + If spectre_v2 mitigation enables retpoline, aligned-thunks are only + deployed for the affected RET instructions. Retpoline mitigates + indirect branches. + + off Disable ITS mitigation. + + vmexit Equivalent to "=on" if the CPU is affected by guest/host isolation + part of ITS. Otherwise, mitigation is not deployed. This option is + useful when host userspace is not in the threat model, and only + attacks from guest to host are considered. + + stuff Deploy RSB-fill mitigation when retpoline is also deployed. + Otherwise, deploy the default mitigation. When retpoline mitigation + is enabled, RSB-stuffing via Call-Depth-Tracking also mitigates + ITS. + + force Force the ITS bug and deploy the default mitigation. + ======== =================================================================== + +Sysfs reporting +--------------- + +The sysfs file showing ITS mitigation status is: + + /sys/devices/system/cpu/vulnerabilities/indirect_target_selection + +Note, microcode mitigation status is not reported in this file. + +The possible values in this file are: + +.. list-table:: + + * - Not affected + - The processor is not vulnerable. + * - Vulnerable + - System is vulnerable and no mitigation has been applied. + * - Vulnerable, KVM: Not affected + - System is vulnerable to intra-mode BTI, but not affected by eIBRS + guest/host isolation. + * - Mitigation: Aligned branch/return thunks + - The mitigation is enabled, affected indirect branches and RETs are + relocated to safe thunks. + * - Mitigation: Retpolines, Stuffing RSB + - The mitigation is enabled using retpoline and RSB stuffing. + +References +---------- +.. [#f1] Microcode repository - https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files + +.. [#f2] Affected Processors list - https://www.intel.com/content/www/us/en/developer/topic-technology/software-security-guidance/processors-affected-consolidated-product-cpu-model.html + +.. [#f3] Affected Processors list (machine readable) - https://github.com/intel/Intel-affected-processor-list -- cgit v1.2.3 From f4818881c47fd91fcb6d62373c57c7844e3de1c0 Mon Sep 17 00:00:00 2001 From: Pawan Gupta Date: Fri, 21 Jun 2024 20:23:23 -0700 Subject: x86/its: Enable Indirect Target Selection mitigation Indirect Target Selection (ITS) is a bug in some pre-ADL Intel CPUs with eIBRS. It affects prediction of indirect branch and RETs in the lower half of cacheline. Due to ITS such branches may get wrongly predicted to a target of (direct or indirect) branch that is located in the upper half of the cacheline. Scope of impact =============== Guest/host isolation -------------------- When eIBRS is used for guest/host isolation, the indirect branches in the VMM may still be predicted with targets corresponding to branches in the guest. Intra-mode ---------- cBPF or other native gadgets can be used for intra-mode training and disclosure using ITS. User/kernel isolation --------------------- When eIBRS is enabled user/kernel isolation is not impacted. Indirect Branch Prediction Barrier (IBPB) ----------------------------------------- After an IBPB, indirect branches may be predicted with targets corresponding to direct branches which were executed prior to IBPB. This is mitigated by a microcode update. Add cmdline parameter indirect_target_selection=off|on|force to control the mitigation to relocate the affected branches to an ITS-safe thunk i.e. located in the upper half of cacheline. Also add the sysfs reporting. When retpoline mitigation is deployed, ITS safe-thunks are not needed, because retpoline sequence is already ITS-safe. Similarly, when call depth tracking (CDT) mitigation is deployed (retbleed=stuff), ITS safe return thunk is not used, as CDT prevents RSB-underflow. To not overcomplicate things, ITS mitigation is not supported with spectre-v2 lfence;jmp mitigation. Moreover, it is less practical to deploy lfence;jmp mitigation on ITS affected parts anyways. Signed-off-by: Pawan Gupta Signed-off-by: Dave Hansen Reviewed-by: Josh Poimboeuf Reviewed-by: Alexandre Chartre --- Documentation/ABI/testing/sysfs-devices-system-cpu | 1 + Documentation/admin-guide/kernel-parameters.txt | 13 +++++++++++++ 2 files changed, 14 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu index 206079d3bd5b..6a1acabb29d8 100644 --- a/Documentation/ABI/testing/sysfs-devices-system-cpu +++ b/Documentation/ABI/testing/sysfs-devices-system-cpu @@ -511,6 +511,7 @@ Description: information about CPUs heterogeneity. What: /sys/devices/system/cpu/vulnerabilities /sys/devices/system/cpu/vulnerabilities/gather_data_sampling + /sys/devices/system/cpu/vulnerabilities/indirect_target_selection /sys/devices/system/cpu/vulnerabilities/itlb_multihit /sys/devices/system/cpu/vulnerabilities/l1tf /sys/devices/system/cpu/vulnerabilities/mds diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index d9fd26b95b34..d3e78e795e0d 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -2202,6 +2202,18 @@ different crypto accelerators. This option can be used to achieve best performance for particular HW. + indirect_target_selection= [X86,Intel] Mitigation control for Indirect + Target Selection(ITS) bug in Intel CPUs. Updated + microcode is also required for a fix in IBPB. + + on: Enable mitigation (default). + off: Disable mitigation. + force: Force the ITS bug and deploy default + mitigation. + + For details see: + Documentation/admin-guide/hw-vuln/indirect-target-selection.rst + init= [KNL] Format: Run specified binary instead of /sbin/init as init @@ -3693,6 +3705,7 @@ expose users to several CPU vulnerabilities. Equivalent to: if nokaslr then kpti=0 [ARM64] gather_data_sampling=off [X86] + indirect_target_selection=off [X86] kvm.nx_huge_pages=off [X86] l1tf=off [X86] mds=off [X86] -- cgit v1.2.3 From 2665281a07e19550944e8354a2024635a7b2714a Mon Sep 17 00:00:00 2001 From: Pawan Gupta Date: Mon, 18 Nov 2024 09:53:12 -0800 Subject: x86/its: Add "vmexit" option to skip mitigation on some CPUs Ice Lake generation CPUs are not affected by guest/host isolation part of ITS. If a user is only concerned about KVM guests, they can now choose a new cmdline option "vmexit" that will not deploy the ITS mitigation when CPU is not affected by guest/host isolation. This saves the performance overhead of ITS mitigation on Ice Lake gen CPUs. When "vmexit" option selected, if the CPU is affected by ITS guest/host isolation, the default ITS mitigation is deployed. Signed-off-by: Pawan Gupta Signed-off-by: Dave Hansen Reviewed-by: Josh Poimboeuf Reviewed-by: Alexandre Chartre --- Documentation/admin-guide/kernel-parameters.txt | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index d3e78e795e0d..e70d15095f28 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -2210,6 +2210,8 @@ off: Disable mitigation. force: Force the ITS bug and deploy default mitigation. + vmexit: Only deploy mitigation if CPU is affected by + guest/host isolation part of ITS. For details see: Documentation/admin-guide/hw-vuln/indirect-target-selection.rst -- cgit v1.2.3 From facd226f7e0c8ca936ac114aba43cb3e8b94e41e Mon Sep 17 00:00:00 2001 From: Pawan Gupta Date: Mon, 2 Dec 2024 12:07:08 -0800 Subject: x86/its: Add support for RSB stuffing mitigation When retpoline mitigation is enabled for spectre-v2, enabling call-depth-tracking and RSB stuffing also mitigates ITS. Add cmdline option indirect_target_selection=stuff to allow enabling RSB stuffing mitigation. When retpoline mitigation is not enabled, =stuff option is ignored, and default mitigation for ITS is deployed. Signed-off-by: Pawan Gupta Signed-off-by: Dave Hansen Reviewed-by: Josh Poimboeuf Reviewed-by: Alexandre Chartre --- Documentation/admin-guide/kernel-parameters.txt | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index e70d15095f28..8f75ec177399 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -2212,6 +2212,9 @@ mitigation. vmexit: Only deploy mitigation if CPU is affected by guest/host isolation part of ITS. + stuff: Deploy RSB-fill mitigation when retpoline is + also deployed. Otherwise, deploy the default + mitigation. For details see: Documentation/admin-guide/hw-vuln/indirect-target-selection.rst -- cgit v1.2.3 From dc4ec780313c698dd75f685250f98f98e07f9f17 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 18 Mar 2025 15:21:54 +0200 Subject: dt-bindings: soc: qcom,rpm: add missing clock-controller node On Qualcomm platforms in addition to regulators the RPM also provides clocks via the child clock-controller node. Describe it properly in the schema. Fixes: 872f91b5ea72 ("clk: qcom: Add support for RPM Clocks") Reviewed-by: Krzysztof Kozlowski Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20250318-fix-nexus-4-v2-1-bcedd1406790@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml index b00be9e01206..10956240df08 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml @@ -46,6 +46,14 @@ properties: description: Three entries specifying the outgoing ipc bit used for signaling the RPM. + clock-controller: + type: object + additionalProperties: true + properties: + compatible: + contains: + const: qcom,rpmcc + patternProperties: "^regulators(-[01])?$": type: object -- cgit v1.2.3 From 3022ae40e92b1458901867a114472cff76dd3531 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 18 Mar 2025 15:21:55 +0200 Subject: dt-bindings: soc: qcom: qcom,rpm: add missing clock/-names properties Qualcomm MSM8660 and IPQ0864 platforms use additional clock for the RPM device. Document it in the schema. Fixes: aa0c4b815045 ("mfd: devicetree: bindings: Add Qualcomm RPM DT binding") Signed-off-by: Dmitry Baryshkov Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250318-fix-nexus-4-v2-2-bcedd1406790@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml index 10956240df08..3e8d99cb4dc3 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml @@ -36,6 +36,13 @@ properties: - const: err - const: wakeup + clocks: + maxItems: 1 + + clock-names: + items: + - const: ram + qcom,ipc: $ref: /schemas/types.yaml#/definitions/phandle-array items: -- cgit v1.2.3 From a92b9efaf2cff15a28723f592ee21df0561e58c3 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Fri, 2 May 2025 17:25:40 +0100 Subject: dt-bindings: gpu: mali-bifrost: Add compatible for RZ/V2N SoC Add a compatible string for the Renesas RZ/V2N SoC variants that include a Mali-G31 GPU. These variants share the same restrictions on interrupts, clocks, and power domains as the RZ/G2L SoC, so extend the existing schema validation accordingly. Signed-off-by: Lad Prabhakar Acked-by: Conor Dooley Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20250502162540.165962-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml index 019bd28a29f1..3297ed160ebc 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml @@ -25,6 +25,7 @@ properties: - realtek,rtd1619-mali - renesas,r9a07g044-mali - renesas,r9a07g054-mali + - renesas,r9a09g056-mali - renesas,r9a09g057-mali - rockchip,px30-mali - rockchip,rk3562-mali @@ -145,6 +146,7 @@ allOf: enum: - renesas,r9a07g044-mali - renesas,r9a07g054-mali + - renesas,r9a09g056-mali - renesas,r9a09g057-mali then: properties: -- cgit v1.2.3 From 7220eabff8cb4af3b93cd021aa853b9f5df2923f Mon Sep 17 00:00:00 2001 From: Andrii Nakryiko Date: Fri, 9 May 2025 11:03:50 -0700 Subject: bpf, docs: document open-coded BPF iterators Extract BPF open-coded iterators documentation spread out across a few original commit messages ([0], [1]) into a dedicated doc section under Documentation/bpf/bpf_iterators.rst. Also make explicit expectation that BPF iterator program type should be accompanied by a corresponding open-coded BPF iterator implementation, going forward. [0] https://lore.kernel.org/all/20230308184121.1165081-3-andrii@kernel.org/ [1] https://lore.kernel.org/all/20230308184121.1165081-4-andrii@kernel.org/ Acked-by: Kumar Kartikeya Dwivedi Signed-off-by: Andrii Nakryiko Link: https://lore.kernel.org/r/20250509180350.2604946-1-andrii@kernel.org Signed-off-by: Alexei Starovoitov --- Documentation/bpf/bpf_iterators.rst | 113 +++++++++++++++++++++++++++++++++++- 1 file changed, 110 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/bpf/bpf_iterators.rst b/Documentation/bpf/bpf_iterators.rst index 385cd05aabf5..8f0a4a91b77a 100644 --- a/Documentation/bpf/bpf_iterators.rst +++ b/Documentation/bpf/bpf_iterators.rst @@ -2,10 +2,117 @@ BPF Iterators ============= +-------- +Overview +-------- + +BPF supports two separate entities collectively known as "BPF iterators": BPF +iterator *program type* and *open-coded* BPF iterators. The former is +a stand-alone BPF program type which, when attached and activated by user, +will be called once for each entity (task_struct, cgroup, etc) that is being +iterated. The latter is a set of BPF-side APIs implementing iterator +functionality and available across multiple BPF program types. Open-coded +iterators provide similar functionality to BPF iterator programs, but gives +more flexibility and control to all other BPF program types. BPF iterator +programs, on the other hand, can be used to implement anonymous or BPF +FS-mounted special files, whose contents are generated by attached BPF iterator +program, backed by seq_file functionality. Both are useful depending on +specific needs. + +When adding a new BPF iterator program, it is expected that similar +functionality will be added as open-coded iterator for maximum flexibility. +It's also expected that iteration logic and code will be maximally shared and +reused between two iterator API surfaces. ----------- -Motivation ----------- +------------------------ +Open-coded BPF Iterators +------------------------ + +Open-coded BPF iterators are implemented as tightly-coupled trios of kfuncs +(constructor, next element fetch, destructor) and iterator-specific type +describing on-the-stack iterator state, which is guaranteed by the BPF +verifier to not be tampered with outside of the corresponding +constructor/destructor/next APIs. + +Each kind of open-coded BPF iterator has its own associated +struct bpf_iter_, where denotes a specific type of iterator. +bpf_iter_ state needs to live on BPF program stack, so make sure it's +small enough to fit on BPF stack. For performance reasons its best to avoid +dynamic memory allocation for iterator state and size the state struct big +enough to fit everything necessary. But if necessary, dynamic memory +allocation is a way to bypass BPF stack limitations. Note, state struct size +is part of iterator's user-visible API, so changing it will break backwards +compatibility, so be deliberate about designing it. + +All kfuncs (constructor, next, destructor) have to be named consistently as +bpf_iter__{new,next,destroy}(), respectively. represents iterator +type, and iterator state should be represented as a matching +`struct bpf_iter_` state type. Also, all iter kfuncs should have +a pointer to this `struct bpf_iter_` as the very first argument. + +Additionally: + - Constructor, i.e., `bpf_iter__new()`, can have arbitrary extra + number of arguments. Return type is not enforced either. + - Next method, i.e., `bpf_iter__next()`, has to return a pointer + type and should have exactly one argument: `struct bpf_iter_ *` + (const/volatile/restrict and typedefs are ignored). + - Destructor, i.e., `bpf_iter__destroy()`, should return void and + should have exactly one argument, similar to the next method. + - `struct bpf_iter_` size is enforced to be positive and + a multiple of 8 bytes (to fit stack slots correctly). + +Such strictness and consistency allows to build generic helpers abstracting +important, but boilerplate, details to be able to use open-coded iterators +effectively and ergonomically (see libbpf's bpf_for_each() macro). This is +enforced at kfunc registration point by the kernel. + +Constructor/next/destructor implementation contract is as follows: + - constructor, `bpf_iter__new()`, always initializes iterator state on + the stack. If any of the input arguments are invalid, constructor should + make sure to still initialize it such that subsequent next() calls will + return NULL. I.e., on error, *return error and construct empty iterator*. + Constructor kfunc is marked with KF_ITER_NEW flag. + + - next method, `bpf_iter__next()`, accepts pointer to iterator state + and produces an element. Next method should always return a pointer. The + contract between BPF verifier is that next method *guarantees* that it + will eventually return NULL when elements are exhausted. Once NULL is + returned, subsequent next calls *should keep returning NULL*. Next method + is marked with KF_ITER_NEXT (and should also have KF_RET_NULL as + NULL-returning kfunc, of course). + + - destructor, `bpf_iter__destroy()`, is always called once. Even if + constructor failed or next returned nothing. Destructor frees up any + resources and marks stack space used by `struct bpf_iter_` as usable + for something else. Destructor is marked with KF_ITER_DESTROY flag. + +Any open-coded BPF iterator implementation has to implement at least these +three methods. It is enforced that for any given type of iterator only +applicable constructor/destructor/next are callable. I.e., verifier ensures +you can't pass number iterator state into, say, cgroup iterator's next method. + +From a 10,000-feet BPF verification point of view, next methods are the points +of forking a verification state, which are conceptually similar to what +verifier is doing when validating conditional jumps. Verifier is branching out +`call bpf_iter__next` instruction and simulates two outcomes: NULL +(iteration is done) and non-NULL (new element is returned). NULL is simulated +first and is supposed to reach exit without looping. After that non-NULL case +is validated and it either reaches exit (for trivial examples with no real +loop), or reaches another `call bpf_iter__next` instruction with the +state equivalent to already (partially) validated one. State equivalency at +that point means we technically are going to be looping forever without +"breaking out" out of established "state envelope" (i.e., subsequent +iterations don't add any new knowledge or constraints to the verifier state, +so running 1, 2, 10, or a million of them doesn't matter). But taking into +account the contract stating that iterator next method *has to* return NULL +eventually, we can conclude that loop body is safe and will eventually +terminate. Given we validated logic outside of the loop (NULL case), and +concluded that loop body is safe (though potentially looping many times), +verifier can claim safety of the overall program logic. + +------------------------ +BPF Iterators Motivation +------------------------ There are a few existing ways to dump kernel data into user space. The most popular one is the ``/proc`` system. For example, ``cat /proc/net/tcp6`` dumps -- cgit v1.2.3 From 9a5f8c7a81cde01738d4fa25624669a3d6f859e3 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 17:01:37 -0500 Subject: dt-bindings: PCI: Convert v3,v360epc-pci to DT schema Convert the v3,v360epc-pci binding to DT schema format. Add "clocks" which was not documented and is required. Drop "syscon" which was documented, but is not used. Drop the "v3,v360epc-pci" compatible by itself as this device is only used on the Arm Integrator/AP and not likely going to be used anywhere else at this point. Signed-off-by: Rob Herring (Arm) Signed-off-by: Manivannan Sadhasivam Reviewed-by: Linus Walleij Link: https://patch.msgid.link/20250505220139.2202164-1-robh@kernel.org --- .../devicetree/bindings/pci/v3,v360epc-pci.yaml | 100 +++++++++++++++++++++ .../devicetree/bindings/pci/v3-v360epc-pci.txt | 76 ---------------- 2 files changed, 100 insertions(+), 76 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/v3,v360epc-pci.yaml delete mode 100644 Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pci/v3,v360epc-pci.yaml b/Documentation/devicetree/bindings/pci/v3,v360epc-pci.yaml new file mode 100644 index 000000000000..38cac88f17bf --- /dev/null +++ b/Documentation/devicetree/bindings/pci/v3,v360epc-pci.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/v3,v360epc-pci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: V3 Semiconductor V360 EPC PCI bridge + +maintainers: + - Linus Walleij + +description: + This bridge is found in the ARM Integrator/AP (Application Platform) + +allOf: + - $ref: /schemas/pci/pci-host-bridge.yaml# + +properties: + compatible: + items: + - const: arm,integrator-ap-pci + - const: v3,v360epc-pci + + reg: + items: + - description: V3 host bridge controller + - description: Configuration space + + clocks: + maxItems: 1 + + dma-ranges: + maxItems: 2 + description: + The inbound ranges must be aligned to a 1MB boundary, and may be 1MB, 2MB, + 4MB, 8MB, 16MB, 32MB, 64MB, 128MB, 256MB, 512MB, 1GB or 2GB in size. The + memory should be marked as pre-fetchable. + + interrupts: + description: Bus Error IRQ + maxItems: 1 + + ranges: + description: + The non-prefetchable and prefetchable memory windows must each be exactly + 256MB (0x10000000) in size. The prefetchable memory window must be + immediately adjacent to the non-prefetchable memory window. + +required: + - compatible + - reg + - clocks + - dma-ranges + - "#interrupt-cells" + - interrupt-map + - interrupt-map-mask + +unevaluatedProperties: false + +examples: + - | + pci@62000000 { + compatible = "arm,integrator-ap-pci", "v3,v360epc-pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0x62000000 0x10000>, <0x61000000 0x01000000>; + device_type = "pci"; + interrupt-parent = <&pic>; + interrupts = <17>; /* Bus error IRQ */ + clocks = <&pciclk>; + ranges = <0x01000000 0 0x00000000 0x60000000 0 0x01000000>, /* 16 MiB @ LB 60000000 */ + <0x02000000 0 0x40000000 0x40000000 0 0x10000000>, /* 256 MiB @ LB 40000000 1:1 */ + <0x42000000 0 0x50000000 0x50000000 0 0x10000000>; /* 256 MiB @ LB 50000000 1:1 */ + dma-ranges = <0x02000000 0 0x20000000 0x20000000 0 0x20000000>, /* EBI: 512 MB @ LB 20000000 1:1 */ + <0x02000000 0 0x80000000 0x80000000 0 0x40000000>; /* CM alias: 1GB @ LB 80000000 */ + interrupt-map-mask = <0xf800 0 0 0x7>; + interrupt-map = + /* IDSEL 9 */ + <0x4800 0 0 1 &pic 13>, /* INT A on slot 9 is irq 13 */ + <0x4800 0 0 2 &pic 14>, /* INT B on slot 9 is irq 14 */ + <0x4800 0 0 3 &pic 15>, /* INT C on slot 9 is irq 15 */ + <0x4800 0 0 4 &pic 16>, /* INT D on slot 9 is irq 16 */ + /* IDSEL 10 */ + <0x5000 0 0 1 &pic 14>, /* INT A on slot 10 is irq 14 */ + <0x5000 0 0 2 &pic 15>, /* INT B on slot 10 is irq 15 */ + <0x5000 0 0 3 &pic 16>, /* INT C on slot 10 is irq 16 */ + <0x5000 0 0 4 &pic 13>, /* INT D on slot 10 is irq 13 */ + /* IDSEL 11 */ + <0x5800 0 0 1 &pic 15>, /* INT A on slot 11 is irq 15 */ + <0x5800 0 0 2 &pic 16>, /* INT B on slot 11 is irq 16 */ + <0x5800 0 0 3 &pic 13>, /* INT C on slot 11 is irq 13 */ + <0x5800 0 0 4 &pic 14>, /* INT D on slot 11 is irq 14 */ + /* IDSEL 12 */ + <0x6000 0 0 1 &pic 16>, /* INT A on slot 12 is irq 16 */ + <0x6000 0 0 2 &pic 13>, /* INT B on slot 12 is irq 13 */ + <0x6000 0 0 3 &pic 14>, /* INT C on slot 12 is irq 14 */ + <0x6000 0 0 4 &pic 15>; /* INT D on slot 12 is irq 15 */ + }; +... diff --git a/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt b/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt deleted file mode 100644 index 11063293f761..000000000000 --- a/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt +++ /dev/null @@ -1,76 +0,0 @@ -V3 Semiconductor V360 EPC PCI bridge - -This bridge is found in the ARM Integrator/AP (Application Platform) - -Required properties: -- compatible: should be one of: - "v3,v360epc-pci" - "arm,integrator-ap-pci", "v3,v360epc-pci" -- reg: should contain two register areas: - first the base address of the V3 host bridge controller, 64KB - second the configuration area register space, 16MB -- interrupts: should contain a reference to the V3 error interrupt - as routed on the system. -- bus-range: see pci.txt -- ranges: this follows the standard PCI bindings in the IEEE Std - 1275-1994 (see pci.txt) with the following restriction: - - The non-prefetchable and prefetchable memory windows must - each be exactly 256MB (0x10000000) in size. - - The prefetchable memory window must be immediately adjacent - to the non-prefetcable memory window -- dma-ranges: three ranges for the inbound memory region. The ranges must - be aligned to a 1MB boundary, and may be 1MB, 2MB, 4MB, 8MB, 16MB, 32MB, - 64MB, 128MB, 256MB, 512MB, 1GB or 2GB in size. The memory should be marked - as pre-fetchable. Two ranges are supported by the hardware. - -Integrator-specific required properties: -- syscon: should contain a link to the syscon device node, since - on the Integrator, some registers in the syscon are required to - operate the V3 host bridge. - -Example: - -pci: pciv3@62000000 { - compatible = "arm,integrator-ap-pci", "v3,v360epc-pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0x62000000 0x10000>, <0x61000000 0x01000000>; - interrupt-parent = <&pic>; - interrupts = <17>; /* Bus error IRQ */ - clocks = <&pciclk>; - bus-range = <0x00 0xff>; - ranges = 0x01000000 0 0x00000000 /* I/O space @00000000 */ - 0x60000000 0 0x01000000 /* 16 MiB @ LB 60000000 */ - 0x02000000 0 0x40000000 /* non-prefectable memory @40000000 */ - 0x40000000 0 0x10000000 /* 256 MiB @ LB 40000000 1:1 */ - 0x42000000 0 0x50000000 /* prefetchable memory @50000000 */ - 0x50000000 0 0x10000000>; /* 256 MiB @ LB 50000000 1:1 */ - dma-ranges = <0x02000000 0 0x20000000 /* EBI memory space */ - 0x20000000 0 0x20000000 /* 512 MB @ LB 20000000 1:1 */ - 0x02000000 0 0x80000000 /* Core module alias memory */ - 0x80000000 0 0x40000000>; /* 1GB @ LB 80000000 */ - interrupt-map-mask = <0xf800 0 0 0x7>; - interrupt-map = < - /* IDSEL 9 */ - 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */ - 0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */ - 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */ - 0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */ - /* IDSEL 10 */ - 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */ - 0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */ - 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */ - 0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */ - /* IDSEL 11 */ - 0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */ - 0x5800 0 0 2 &pic 16 /* INT B on slot 11 is irq 16 */ - 0x5800 0 0 3 &pic 13 /* INT C on slot 11 is irq 13 */ - 0x5800 0 0 4 &pic 14 /* INT D on slot 11 is irq 14 */ - /* IDSEL 12 */ - 0x6000 0 0 1 &pic 16 /* INT A on slot 12 is irq 16 */ - 0x6000 0 0 2 &pic 13 /* INT B on slot 12 is irq 13 */ - 0x6000 0 0 3 &pic 14 /* INT C on slot 12 is irq 14 */ - 0x6000 0 0 4 &pic 15 /* INT D on slot 12 is irq 15 */ - >; -}; -- cgit v1.2.3 From 01ccbe64f9e5702a530cca614f203d71462c67e1 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Fri, 9 May 2025 18:23:04 +0800 Subject: dt-bindings: rockchip: pmu: Add rk3562 compatible Add the compatible for the pmu mfd on rk3562. Signed-off-by: Kever Yang Acked-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250509102308.761424-2-kever.yang@rock-chips.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip/pmu.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml index 52016a141227..46c1af851be7 100644 --- a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml @@ -25,6 +25,7 @@ select: - rockchip,rk3288-pmu - rockchip,rk3368-pmu - rockchip,rk3399-pmu + - rockchip,rk3562-pmu - rockchip,rk3568-pmu - rockchip,rk3576-pmu - rockchip,rk3588-pmu @@ -43,6 +44,7 @@ properties: - rockchip,rk3288-pmu - rockchip,rk3368-pmu - rockchip,rk3399-pmu + - rockchip,rk3562-pmu - rockchip,rk3568-pmu - rockchip,rk3576-pmu - rockchip,rk3588-pmu -- cgit v1.2.3 From 472a4e77a2070ffbf47eb6c934ae56d362eae992 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Fri, 9 May 2025 18:23:05 +0800 Subject: dt-bindings: soc: rockchip: Add rk3562 syscon compatibles Add all syscon compatibles for rk3562. Signed-off-by: Kever Yang Acked-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250509102308.761424-3-kever.yang@rock-chips.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml index 2f61c1b95fea..8cbf5b6772dd 100644 --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml @@ -18,6 +18,12 @@ properties: - rockchip,rk3528-ioc-grf - rockchip,rk3528-vo-grf - rockchip,rk3528-vpu-grf + - rockchip,rk3562-ioc-grf + - rockchip,rk3562-peri-grf + - rockchip,rk3562-pipephy-grf + - rockchip,rk3562-pmu-grf + - rockchip,rk3562-sys-grf + - rockchip,rk3562-usbphy-grf - rockchip,rk3566-pipe-grf - rockchip,rk3568-pcie3-phy-grf - rockchip,rk3568-pipe-grf @@ -82,6 +88,7 @@ properties: - rockchip,rk3368-pmugrf - rockchip,rk3399-grf - rockchip,rk3399-pmugrf + - rockchip,rk3562-pmu-grf - rockchip,rk3568-grf - rockchip,rk3568-pmugrf - rockchip,rk3576-ioc-grf -- cgit v1.2.3 From b7016249819f5b61c5e59cea36e8c261091b48b3 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Fri, 9 May 2025 18:23:06 +0800 Subject: dt-bindings: arm: rockchip: Add rk3562 evb2 board Add device tree documentation for rk3562-evb2-v10. Signed-off-by: Kever Yang Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250509102308.761424-4-kever.yang@rock-chips.com Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index e6d7a3fd9a63..115c3ca43997 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -1067,6 +1067,11 @@ properties: - const: rockchip,rk3399-sapphire-excavator - const: rockchip,rk3399 + - description: Rockchip RK3562 Evaluation board 2 + items: + - const: rockchip,rk3562-evb2-v10 + - const: rockchip,rk3562 + - description: Rockchip RK3566 BOX Evaluation Demo board items: - const: rockchip,rk3566-box-demo -- cgit v1.2.3 From 846656f278e803cb60161f0cba4ee90a058440cc Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 9 May 2025 13:21:31 +0200 Subject: spi: dt-bindings: fsl,dspi: Fix example indentation DTS example in the bindings should be indented with 2- or 4-spaces, so correct a mixture of different styles to keep consistent 4-spaces. Signed-off-by: Krzysztof Kozlowski Acked-by: Conor Dooley Link: https://patch.msgid.link/20250509112130.123462-3-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/fsl,dspi.yaml | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/fsl,dspi.yaml b/Documentation/devicetree/bindings/spi/fsl,dspi.yaml index 7ca8fceda717..bf9cce53c48d 100644 --- a/Documentation/devicetree/bindings/spi/fsl,dspi.yaml +++ b/Documentation/devicetree/bindings/spi/fsl,dspi.yaml @@ -105,12 +105,12 @@ examples: big-endian; flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <16000000>; - spi-cpol; - spi-cpha; - spi-cs-setup-delay-ns = <100>; - spi-cs-hold-delay-ns = <50>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <16000000>; + spi-cpol; + spi-cpha; + spi-cs-setup-delay-ns = <100>; + spi-cs-hold-delay-ns = <50>; }; }; -- cgit v1.2.3 From a4ca02454821cbc411e0bf16e527d392f188c218 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 9 May 2025 13:21:32 +0200 Subject: spi: dt-bindings: nuvoton,wpcm450-fiu: Drop unrelated nodes from DTS example Binding example should not contain other nodes, including other providers like syscon, because this is redundant and only adds unnecessary bloat. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250509112130.123462-4-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml | 5 ----- 1 file changed, 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml b/Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml index 4e0d391e1d69..c97bf48b56b4 100644 --- a/Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml +++ b/Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml @@ -59,8 +59,3 @@ examples: reg = <0>; }; }; - - shm: syscon@c8001000 { - compatible = "nuvoton,wpcm450-shm", "syscon"; - reg = <0xc8001000 0x1000>; - }; -- cgit v1.2.3 From b887afb9b2362b15c1ee5585df1fb8cf3a3384c6 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 24 Mar 2025 09:41:02 +0100 Subject: dt-bindings: clock: add SM6350 QCOM video clock bindings Add device tree bindings for video clock controller for SM6350 SoCs. Signed-off-by: Konrad Dybcio Co-developed-by: Luca Weiss Signed-off-by: Luca Weiss Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250324-sm6350-videocc-v2-2-cc22386433f4@fairphone.com Signed-off-by: Bjorn Andersson --- .../devicetree/bindings/clock/qcom,videocc.yaml | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml index 340c7e5cf980..5f7738d6835c 100644 --- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml @@ -14,6 +14,7 @@ description: | domains on Qualcomm SoCs. See also:: + include/dt-bindings/clock/qcom,sm6350-videocc.h include/dt-bindings/clock/qcom,videocc-sc7180.h include/dt-bindings/clock/qcom,videocc-sc7280.h include/dt-bindings/clock/qcom,videocc-sdm845.h @@ -26,6 +27,7 @@ properties: - qcom,sc7180-videocc - qcom,sc7280-videocc - qcom,sdm845-videocc + - qcom,sm6350-videocc - qcom,sm8150-videocc - qcom,sm8250-videocc @@ -87,6 +89,24 @@ allOf: - const: bi_tcxo - const: bi_tcxo_ao + - if: + properties: + compatible: + enum: + - qcom,sm6350-videocc + then: + properties: + clocks: + items: + - description: Video AHB clock from GCC + - description: Board XO source + - description: Sleep Clock source + clock-names: + items: + - const: iface + - const: bi_tcxo + - const: sleep_clk + - if: properties: compatible: -- cgit v1.2.3 From 79d04e73ba481f8537691095cdd2cfd3acdb9c80 Mon Sep 17 00:00:00 2001 From: Miguel Ojeda Date: Wed, 16 Apr 2025 13:24:54 +0200 Subject: docs: rust: explain that `///` vs. `//` applies to private items too Sometimes kernel developers use `//` for documenting private items, since those do not get rendered at the moment. That is reasonable, but the intention behind `///` (and `//!`) vs. `//` is to convey the distinction between documentation and other kinds of comments, such as implementation details or TODOs. It also increases consistency with the public items and thus e.g. allows to change visibility of an item with less changes involved. It is not just useful for human readers, but also tooling. For instance, we may want to eventually generate documentation for private items (perhaps as a toggle in the HTML UI). On top of that, `rustdoc` lints as usual for those, too, so we may want to do it even if we do not use the result. Thus document this explicitly. Link: https://lore.kernel.org/rust-for-linux/CANiq72n_C7exSOMe5yf-7jKKnhSCv+a9QcD=OE2B_Q2UFBL3Xg@mail.gmail.com/ Link: https://github.com/Rust-for-Linux/linux/issues/1157 Reviewed-by: Alice Ryhl Reviewed-by: Christian Schrefl Reviewed-by: Viresh Kumar Link: https://lore.kernel.org/r/20250416112454.2503872-1-ojeda@kernel.org [ Fixed typo. - Miguel ] Signed-off-by: Miguel Ojeda --- Documentation/rust/coding-guidelines.rst | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'Documentation') diff --git a/Documentation/rust/coding-guidelines.rst b/Documentation/rust/coding-guidelines.rst index 27f2a7bb5a4a..6c6c51b4cf46 100644 --- a/Documentation/rust/coding-guidelines.rst +++ b/Documentation/rust/coding-guidelines.rst @@ -85,6 +85,18 @@ written after the documentation, e.g.: // ... } +This applies to both public and private items. This increases consistency with +public items, allows changes to visibility with less changes involved and will +allow us to potentially generate the documentation for private items as well. +In other words, if documentation is written for a private item, then ``///`` +should still be used. For instance: + +.. code-block:: rust + + /// My private function. + // TODO: ... + fn f() {} + One special kind of comments are the ``// SAFETY:`` comments. These must appear before every ``unsafe`` block, and they explain why the code inside the block is correct/sound, i.e. why it cannot trigger undefined behavior in any case, e.g.: -- cgit v1.2.3 From cf42d4cccf0d01e375175393776a16dc47b9996f Mon Sep 17 00:00:00 2001 From: Sergey Senozhatsky Date: Thu, 27 Mar 2025 10:58:09 +0900 Subject: zram: modernize writeback interface The writeback interface supports a page_index=N parameter which performs writeback of the given page. Since we rarely need to writeback just one single page, the typical use case involves a number of writeback calls, each performing writeback of one page: echo page_index=100 > zram0/writeback ... echo page_index=200 > zram0/writeback echo page_index=500 > zram0/writeback ... echo page_index=700 > zram0/writeback One obvious downside of this is that it increases the number of syscalls. Less obvious, but a significantly more important downside, is that when given only one page to post-process zram cannot perform an optimal target selection. This becomes a critical limitation when writeback_limit is enabled, because under writeback_limit we want to guarantee the highest memory savings hence we first need to writeback pages that release the highest amount of zsmalloc pool memory. This patch adds page_indexes=LOW-HIGH parameter to the writeback interface: echo page_indexes=100-200 page_indexes=500-700 > zram0/writeback This gives zram a chance to apply an optimal target selection strategy on each iteration of the writeback loop. We also now permit multiple page_index parameters per call (previously zram would recognize only one page_index) and a mix or single pages and page ranges: echo page_index=42 page_index=99 page_indexes=100-200 \ page_indexes=500-700 > zram0/writeback Apart from that the patch also unifies parameters passing and resembles other "modern" zram device attributes (e.g. recompression), while the old interface used a mixed scheme: values-less parameters for mode and a key=value format for page_index. We still support the "old" value-less format for compatibility reasons. [senozhatsky@chromium.org: simplify parse_page_index() range checks, per Brian] nk: https://lkml.kernel.org/r/20250404015327.2427684-1-senozhatsky@chromium.org [sozhatsky@chromium.org: fix uninitialized variable in zram_writeback_slots(), per Dan] nk: https://lkml.kernel.org/r/20250409112611.1154282-1-senozhatsky@chromium.org Link: https://lkml.kernel.org/r/20250327015818.4148660-1-senozhatsky@chromium.org Signed-off-by: Sergey Senozhatsky Reviewed-by: Brian Geffon Cc: Minchan Kim Cc: Richard Chang Cc: Sergey Senozhatsky Cc: Dan Carpenter Signed-off-by: Andrew Morton --- Documentation/admin-guide/blockdev/zram.rst | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/blockdev/zram.rst b/Documentation/admin-guide/blockdev/zram.rst index 9bdb30901a93..b8d36134a151 100644 --- a/Documentation/admin-guide/blockdev/zram.rst +++ b/Documentation/admin-guide/blockdev/zram.rst @@ -369,6 +369,23 @@ they could write a page index into the interface:: echo "page_index=1251" > /sys/block/zramX/writeback +In Linux 6.16 this interface underwent some rework. First, the interface +now supports `key=value` format for all of its parameters (`type=huge_idle`, +etc.) Second, the support for `page_indexes` was introduced, which specify +`LOW-HIGH` range (or ranges) of pages to be written-back. This reduces the +number of syscalls, but more importantly this enables optimal post-processing +target selection strategy. Usage example:: + + echo "type=idle" > /sys/block/zramX/writeback + echo "page_indexes=1-100 page_indexes=200-300" > \ + /sys/block/zramX/writeback + +We also now permit multiple page_index params per call and a mix of +single pages and page ranges:: + + echo page_index=42 page_index=99 page_indexes=100-200 \ + page_indexes=500-700 > /sys/block/zramX/writeback + If there are lots of write IO with flash device, potentially, it has flash wearout problem so that admin needs to design write limitation to guarantee storage health for entire product life. -- cgit v1.2.3 From 98c9389042f4d1e6aa73fbaf79e2e962c9497fc5 Mon Sep 17 00:00:00 2001 From: Michal Clapinski Date: Fri, 4 Apr 2025 13:11:03 +0200 Subject: mm/compaction: reduce the difference between low and high watermarks Reduce the diff between low and high watermarks when compaction proactiveness is set to high. This allows users who set the proactiveness really high to have more stable fragmentation score over time. Link: https://lkml.kernel.org/r/20250404111103.1994507-3-mclapinski@google.com Signed-off-by: Michal Clapinski Cc: Mel Gorman Cc: Vlastimil Babka Signed-off-by: Andrew Morton --- Documentation/admin-guide/sysctl/vm.rst | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/sysctl/vm.rst b/Documentation/admin-guide/sysctl/vm.rst index 8290177b4f75..b325bfbc2611 100644 --- a/Documentation/admin-guide/sysctl/vm.rst +++ b/Documentation/admin-guide/sysctl/vm.rst @@ -131,6 +131,12 @@ to latency spikes in unsuspecting applications. The kernel employs various heuristics to avoid wasting CPU cycles if it detects that proactive compaction is not being effective. +Setting the value above 80 will, in addition to lowering the acceptable level +of fragmentation, make the compaction code more sensitive to increases in +fragmentation, i.e. compaction will trigger more often, but reduce +fragmentation by a smaller amount. +This makes the fragmentation level more stable over time. + Be careful when setting it to extreme values like 100, as that may cause excessive background compaction activity. -- cgit v1.2.3 From a516403787e08119b70ce8bfff985272ef318a58 Mon Sep 17 00:00:00 2001 From: Andrei Vagin Date: Mon, 24 Mar 2025 06:53:26 +0000 Subject: fs/proc: extend the PAGEMAP_SCAN ioctl to report guard regions Patch series "fs/proc: extend the PAGEMAP_SCAN ioctl to report guard regions", v2. Introduce the PAGE_IS_GUARD flag in the PAGEMAP_SCAN ioctl to expose information about guard regions. This allows userspace tools, such as CRIU, to detect and handle guard regions. Currently, CRIU utilizes PAGEMAP_SCAN as a more efficient alternative to parsing /proc/pid/pagemap. Without this change, guard regions are incorrectly reported as swap-anon regions, leading CRIU to attempt dumping them and subsequently failing. The series includes updates to the documentation and selftests to reflect the new functionality. This patch (of 3): Introduce the PAGE_IS_GUARD flag in the PAGEMAP_SCAN ioctl to expose information about guard regions. This allows userspace tools, such as CRIU, to detect and handle guard regions. Link: https://lkml.kernel.org/r/20250324065328.107678-1-avagin@google.com Link: https://lkml.kernel.org/r/20250324065328.107678-2-avagin@google.com Signed-off-by: Andrei Vagin Acked-by: David Hildenbrand Reviewed-by: Lorenzo Stoakes Cc: Jonathan Corbet Cc: Shuah Khan Signed-off-by: Andrew Morton --- Documentation/admin-guide/mm/pagemap.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/mm/pagemap.rst b/Documentation/admin-guide/mm/pagemap.rst index afce291649dd..e60e9211fd9b 100644 --- a/Documentation/admin-guide/mm/pagemap.rst +++ b/Documentation/admin-guide/mm/pagemap.rst @@ -250,6 +250,7 @@ Following flags about pages are currently supported: - ``PAGE_IS_PFNZERO`` - Page has zero PFN - ``PAGE_IS_HUGE`` - Page is PMD-mapped THP or Hugetlb backed - ``PAGE_IS_SOFT_DIRTY`` - Page is soft-dirty +- ``PAGE_IS_GUARD`` - Page is a part of a guard region The ``struct pm_scan_arg`` is used as the argument of the IOCTL. -- cgit v1.2.3 From b05f8d7e077952d14acb63e3ccdf5f64404b59a4 Mon Sep 17 00:00:00 2001 From: Sergey Senozhatsky Date: Wed, 16 Apr 2025 13:27:59 +0900 Subject: Documentation: zram: update IDLE pages tracking documentation Move IDLE pages tracking into a separate chapter because there are multiple features that use (or depend on) it either in built-in variant ("mark all") or in extended variant (ac-time tracking). In addition, recompression doesn't require memory tracking to be enabled in order to be able to perform idle recompression. Link: https://lkml.kernel.org/r/20250416042833.3858827-1-senozhatsky@chromium.org Signed-off-by: Sergey Senozhatsky Reported-by: Shin Kawamura Cc: Jonathan Corbet Cc: Minchan Kim Signed-off-by: Andrew Morton --- Documentation/admin-guide/blockdev/zram.rst | 41 +++++++++++++++-------------- 1 file changed, 21 insertions(+), 20 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/blockdev/zram.rst b/Documentation/admin-guide/blockdev/zram.rst index b8d36134a151..3e273c1bb749 100644 --- a/Documentation/admin-guide/blockdev/zram.rst +++ b/Documentation/admin-guide/blockdev/zram.rst @@ -317,6 +317,26 @@ a single line of text and contains the following stats separated by whitespace: Optional Feature ================ +IDLE pages tracking +------------------- + +zram has built-in support for idle pages tracking (that is, allocated but +not used pages). This feature is useful for e.g. zram writeback and +recompression. In order to mark pages as idle, execute the following command:: + + echo all > /sys/block/zramX/idle + +This will mark all allocated zram pages as idle. The idle mark will be +removed only when the page (block) is accessed (e.g. overwritten or freed). +Additionally, when CONFIG_ZRAM_TRACK_ENTRY_ACTIME is enabled, pages can be +marked as idle based on how many seconds have passed since the last access to +a particular zram page:: + + echo 86400 > /sys/block/zramX/idle + +In this example, all pages which haven't been accessed in more than 86400 +seconds (one day) will be marked idle. + writeback --------- @@ -331,24 +351,7 @@ If admin wants to use incompressible page writeback, they could do it via:: echo huge > /sys/block/zramX/writeback -To use idle page writeback, first, user need to declare zram pages -as idle:: - - echo all > /sys/block/zramX/idle - -From now on, any pages on zram are idle pages. The idle mark -will be removed until someone requests access of the block. -IOW, unless there is access request, those pages are still idle pages. -Additionally, when CONFIG_ZRAM_TRACK_ENTRY_ACTIME is enabled pages can be -marked as idle based on how long (in seconds) it's been since they were -last accessed:: - - echo 86400 > /sys/block/zramX/idle - -In this example all pages which haven't been accessed in more than 86400 -seconds (one day) will be marked idle. - -Admin can request writeback of those idle pages at right timing via:: +Admin can request writeback of idle pages at right timing via:: echo idle > /sys/block/zramX/writeback @@ -499,8 +502,6 @@ attempt to recompress::: echo "type=huge_idle max_pages=42" > /sys/block/zramX/recompress -Recompression of idle pages requires memory tracking. - During re-compression for every page, that matches re-compression criteria, ZRAM iterates the list of registered alternative compression algorithms in order of their priorities. ZRAM stops either when re-compression was -- cgit v1.2.3 From 247021624a99a35e0b04cfd784a84bd65b5a0c59 Mon Sep 17 00:00:00 2001 From: Zhiquan Li Date: Thu, 3 Apr 2025 11:08:01 +0800 Subject: crash: export PAGE_UNACCEPTED_MAPCOUNT_VALUE to vmcoreinfo On Intel TDX guest, unaccepted memory is unusable free memory which is not managed by buddy, until it's accepted by guest. Before that, it cannot be accessed by the first kernel as well as the kexec'ed kernel. The kexec'ed kernel will skip these pages and fill in zero data for the reader of vmcore. The dump tool like makedumpfile creates a page descriptor (size 24 bytes) for each non-free page, including zero data page, but it will not create descriptor for free pages. If it is not able to distinguish these unaccepted pages with zero data pages, a certain amount of space will be wasted in proportion (~1/170). In fact, as a special kind of free page the unaccepted pages should be excluded, like the real free pages. Export the page type PAGE_UNACCEPTED_MAPCOUNT_VALUE to vmcoreinfo, so that dump tool can identify whether a page is unaccepted. [zhiquan1.li@intel.com: fix docs: "Title underline too short" warning] Link: https://lore.kernel.org/all/20240809114854.3745464-5-kirill.shutemov@linux.intel.com/ Link: https://lkml.kernel.org/r/20250405060610.860465-1-zhiquan1.li@intel.com Link: https://lore.kernel.org/all/20240809114854.3745464-5-kirill.shutemov@linux.intel.com/ Link: https://lkml.kernel.org/r/20250403030801.758687-1-zhiquan1.li@intel.com Signed-off-by: Zhiquan Li Reviewed-by: Kirill A. Shutemov Acked-by: Baoquan He Cc: Dave Young Cc: Vivek Goyal Cc: Zhiquan Li Signed-off-by: Andrew Morton --- Documentation/admin-guide/kdump/vmcoreinfo.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kdump/vmcoreinfo.rst b/Documentation/admin-guide/kdump/vmcoreinfo.rst index 0f714fc945ac..8cf4614385b7 100644 --- a/Documentation/admin-guide/kdump/vmcoreinfo.rst +++ b/Documentation/admin-guide/kdump/vmcoreinfo.rst @@ -331,8 +331,8 @@ PG_lru|PG_private|PG_swapcache|PG_swapbacked|PG_slab|PG_hwpoision|PG_head_mask|P Page attributes. These flags are used to filter various unnecessary for dumping pages. -PAGE_BUDDY_MAPCOUNT_VALUE(~PG_buddy)|PAGE_OFFLINE_MAPCOUNT_VALUE(~PG_offline) ------------------------------------------------------------------------------ +PAGE_BUDDY_MAPCOUNT_VALUE(~PG_buddy)|PAGE_OFFLINE_MAPCOUNT_VALUE(~PG_offline)|PAGE_OFFLINE_MAPCOUNT_VALUE(~PG_unaccepted) +------------------------------------------------------------------------------------------------------------------------- More page attributes. These flags are used to filter various unnecessary for dumping pages. -- cgit v1.2.3 From 2a1c6158131f05c228001e1f73304535bc205444 Mon Sep 17 00:00:00 2001 From: "Dr. David Alan Gilbert" Date: Sat, 19 Apr 2025 00:49:32 +0100 Subject: relay: remove unused relay_late_setup_files The last use of relay_late_setup_files() was removed in 2018 by commit 2b47733045aa ("drm/i915/guc: Merge log relay file and channel creation") Remove it and the helper it used. relay_late_setup_files() was used for eventually registering 'buffer only' channels. With it gone, delete the docs that explain how to do that. Which suggests it should be possible to lose the 'has_base_filename' flags. (Are there any other uses??) Link: https://lkml.kernel.org/r/20250418234932.490863-1-linux@treblig.org Signed-off-by: Dr. David Alan Gilbert Reviewed-by: Jens Axboe Cc: Al Viro Cc: Andriy Shevchenko Cc: Jonathan Corbet Signed-off-by: Andrew Morton --- Documentation/filesystems/relay.rst | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/filesystems/relay.rst b/Documentation/filesystems/relay.rst index 04ad083cfe62..292ba8492aeb 100644 --- a/Documentation/filesystems/relay.rst +++ b/Documentation/filesystems/relay.rst @@ -301,16 +301,6 @@ user-defined data with a channel, and is immediately available (including in create_buf_file()) via chan->private_data or buf->chan->private_data. -Buffer-only channels --------------------- - -These channels have no files associated and can be created with -relay_open(NULL, NULL, ...). Such channels are useful in scenarios such -as when doing early tracing in the kernel, before the VFS is up. In these -cases, one may open a buffer-only channel and then call -relay_late_setup_files() when the kernel is ready to handle files, -to expose the buffered data to the userspace. - Channel 'modes' --------------- -- cgit v1.2.3 From 09e1d93a421fa5f6699a9dbdbfc09c1008de4b9a Mon Sep 17 00:00:00 2001 From: Illia Ostapyshyn Date: Sat, 3 May 2025 14:32:32 +0200 Subject: scripts/gdb: update documentation for lx_per_cpu Commit db08c53fdd542bb7f83b ("scripts/gdb: fix parameter handling in $lx_per_cpu") changed the parameter handling of lx_per_cpu to use GdbValue instead of parsing the variable name. Update the documentation to reflect the new lx_per_cpu usage. Update the hrtimer_bases example to use rb_tree instead of the timerqueue_head.next pointer removed in commit 511885d7061eda3eb1fa ("lib/timerqueue: Rely on rbtree semantics for next timer"). Link: https://lkml.kernel.org/r/20250503123234.2407184-3-illia@yshyn.com Signed-off-by: Illia Ostapyshyn Cc: Alex Shi Cc: Brendan Jackman Cc: Dongliang Mu Cc: Florian Rommel Cc: Hu Haowen <2023002089@link.tyut.edu.cn> Cc: Jan Kiszka Cc: Jonathan Corbet Cc: Kieran Bingham Cc: Yanteng Si Signed-off-by: Andrew Morton --- .../process/debugging/gdb-kernel-debugging.rst | 34 ++++++++++------------ .../zh_CN/dev-tools/gdb-kernel-debugging.rst | 34 ++++++++++------------ .../zh_TW/dev-tools/gdb-kernel-debugging.rst | 34 ++++++++++------------ 3 files changed, 45 insertions(+), 57 deletions(-) (limited to 'Documentation') diff --git a/Documentation/process/debugging/gdb-kernel-debugging.rst b/Documentation/process/debugging/gdb-kernel-debugging.rst index 895285c037c7..9475c759c722 100644 --- a/Documentation/process/debugging/gdb-kernel-debugging.rst +++ b/Documentation/process/debugging/gdb-kernel-debugging.rst @@ -127,35 +127,31 @@ Examples of using the Linux-provided gdb helpers - Make use of the per-cpu function for the current or a specified CPU:: - (gdb) p $lx_per_cpu("runqueues").nr_running + (gdb) p $lx_per_cpu(runqueues).nr_running $3 = 1 - (gdb) p $lx_per_cpu("runqueues", 2).nr_running + (gdb) p $lx_per_cpu(runqueues, 2).nr_running $4 = 0 - Dig into hrtimers using the container_of helper:: - (gdb) set $next = $lx_per_cpu("hrtimer_bases").clock_base[0].active.next - (gdb) p *$container_of($next, "struct hrtimer", "node") + (gdb) set $leftmost = $lx_per_cpu(hrtimer_bases).clock_base[0].active.rb_root.rb_leftmost + (gdb) p *$container_of($leftmost, "struct hrtimer", "node") $5 = { node = { node = { - __rb_parent_color = 18446612133355256072, - rb_right = 0x0 , - rb_left = 0x0 + __rb_parent_color = 18446612686384860673, + rb_right = 0xffff888231da8b00, + rb_left = 0x0 }, - expires = { - tv64 = 1835268000000 - } + expires = 1228461000000 }, - _softexpires = { - tv64 = 1835268000000 - }, - function = 0xffffffff81078232 , - base = 0xffff88003fd0d6f0, - state = 1, - start_pid = 0, - start_site = 0xffffffff81055c1f , - start_comm = "swapper/2\000\000\000\000\000\000" + _softexpires = 1228461000000, + function = 0xffffffff8137ab20 , + base = 0xffff888231d9b4c0, + state = 1 '\001', + is_rel = 0 '\000', + is_soft = 0 '\000', + is_hard = 1 '\001' } diff --git a/Documentation/translations/zh_CN/dev-tools/gdb-kernel-debugging.rst b/Documentation/translations/zh_CN/dev-tools/gdb-kernel-debugging.rst index 3c133a918f30..282aacd33442 100644 --- a/Documentation/translations/zh_CN/dev-tools/gdb-kernel-debugging.rst +++ b/Documentation/translations/zh_CN/dev-tools/gdb-kernel-debugging.rst @@ -120,35 +120,31 @@ Kgdb内核调试器、QEMU等虚拟机管理程序或基于JTAG的硬件接口 - 对当前或指定的CPU使用per-cpu函数:: - (gdb) p $lx_per_cpu("runqueues").nr_running + (gdb) p $lx_per_cpu(runqueues).nr_running $3 = 1 - (gdb) p $lx_per_cpu("runqueues", 2).nr_running + (gdb) p $lx_per_cpu(runqueues, 2).nr_running $4 = 0 - 使用container_of查看更多hrtimers信息:: - (gdb) set $next = $lx_per_cpu("hrtimer_bases").clock_base[0].active.next - (gdb) p *$container_of($next, "struct hrtimer", "node") + (gdb) set $leftmost = $lx_per_cpu(hrtimer_bases).clock_base[0].active.rb_root.rb_leftmost + (gdb) p *$container_of($leftmost, "struct hrtimer", "node") $5 = { node = { node = { - __rb_parent_color = 18446612133355256072, - rb_right = 0x0 , - rb_left = 0x0 + __rb_parent_color = 18446612686384860673, + rb_right = 0xffff888231da8b00, + rb_left = 0x0 }, - expires = { - tv64 = 1835268000000 - } + expires = 1228461000000 }, - _softexpires = { - tv64 = 1835268000000 - }, - function = 0xffffffff81078232 , - base = 0xffff88003fd0d6f0, - state = 1, - start_pid = 0, - start_site = 0xffffffff81055c1f , - start_comm = "swapper/2\000\000\000\000\000\000" + _softexpires = 1228461000000, + function = 0xffffffff8137ab20 , + base = 0xffff888231d9b4c0, + state = 1 '\001', + is_rel = 0 '\000', + is_soft = 0 '\000', + is_hard = 1 '\001' } diff --git a/Documentation/translations/zh_TW/dev-tools/gdb-kernel-debugging.rst b/Documentation/translations/zh_TW/dev-tools/gdb-kernel-debugging.rst index c881e8872b19..b595af59ba78 100644 --- a/Documentation/translations/zh_TW/dev-tools/gdb-kernel-debugging.rst +++ b/Documentation/translations/zh_TW/dev-tools/gdb-kernel-debugging.rst @@ -116,35 +116,31 @@ Kgdb內核調試器、QEMU等虛擬機管理程序或基於JTAG的硬件接口 - 對當前或指定的CPU使用per-cpu函數:: - (gdb) p $lx_per_cpu("runqueues").nr_running + (gdb) p $lx_per_cpu(runqueues).nr_running $3 = 1 - (gdb) p $lx_per_cpu("runqueues", 2).nr_running + (gdb) p $lx_per_cpu(runqueues, 2).nr_running $4 = 0 - 使用container_of查看更多hrtimers信息:: - (gdb) set $next = $lx_per_cpu("hrtimer_bases").clock_base[0].active.next - (gdb) p *$container_of($next, "struct hrtimer", "node") + (gdb) set $leftmost = $lx_per_cpu(hrtimer_bases).clock_base[0].active.rb_root.rb_leftmost + (gdb) p *$container_of($leftmost, "struct hrtimer", "node") $5 = { node = { node = { - __rb_parent_color = 18446612133355256072, - rb_right = 0x0 , - rb_left = 0x0 + __rb_parent_color = 18446612686384860673, + rb_right = 0xffff888231da8b00, + rb_left = 0x0 }, - expires = { - tv64 = 1835268000000 - } + expires = 1228461000000 }, - _softexpires = { - tv64 = 1835268000000 - }, - function = 0xffffffff81078232 , - base = 0xffff88003fd0d6f0, - state = 1, - start_pid = 0, - start_site = 0xffffffff81055c1f , - start_comm = "swapper/2\000\000\000\000\000\000" + _softexpires = 1228461000000, + function = 0xffffffff8137ab20 , + base = 0xffff888231d9b4c0, + state = 1 '\001', + is_rel = 0 '\000', + is_soft = 0 '\000', + is_hard = 1 '\001' } -- cgit v1.2.3 From 020d7f14489b8bc38c6bd4c5b3c25262e8b6de63 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= Date: Sun, 11 May 2025 08:02:27 +0200 Subject: Revert "kbuild: make all file references relative to source root" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This reverts commit cacd22ce69585a91c386243cd662ada962431e63. -ffile-prefix-map breaks the ability of debuggers to find the source file corresponding to object files. As there is no simple or uniform way to specify the source directory explicitly, this breaks developers workflows. Revert the unconditional usage of -ffile-prefix-map. Reported-by: Matthieu Baerts Closes: https://lore.kernel.org/lkml/edc50aa7-0740-4942-8c15-96f12f2acc7e@kernel.org/ Reported-by: Ville Syrjälä Closes: https://lore.kernel.org/lkml/aBEttQH4kimHFScx@intel.com/ Fixes: cacd22ce6958 ("kbuild: make all file references relative to source root") Signed-off-by: Thomas Weißschuh Signed-off-by: Masahiro Yamada --- Documentation/kbuild/reproducible-builds.rst | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'Documentation') diff --git a/Documentation/kbuild/reproducible-builds.rst b/Documentation/kbuild/reproducible-builds.rst index a7762486c93f..f2dcc39044e6 100644 --- a/Documentation/kbuild/reproducible-builds.rst +++ b/Documentation/kbuild/reproducible-builds.rst @@ -46,6 +46,21 @@ The kernel embeds the building user and host names in `KBUILD_BUILD_USER and KBUILD_BUILD_HOST`_ variables. If you are building from a git commit, you could use its committer address. +Absolute filenames +------------------ + +When the kernel is built out-of-tree, debug information may include +absolute filenames for the source files. This must be overridden by +including the ``-fdebug-prefix-map`` option in the `KCFLAGS`_ variable. + +Depending on the compiler used, the ``__FILE__`` macro may also expand +to an absolute filename in an out-of-tree build. Kbuild automatically +uses the ``-fmacro-prefix-map`` option to prevent this, if it is +supported. + +The Reproducible Builds web site has more information about these +`prefix-map options`_. + Generated files in source packages ---------------------------------- @@ -116,5 +131,7 @@ See ``scripts/setlocalversion`` for details. .. _KBUILD_BUILD_TIMESTAMP: kbuild.html#kbuild-build-timestamp .. _KBUILD_BUILD_USER and KBUILD_BUILD_HOST: kbuild.html#kbuild-build-user-kbuild-build-host +.. _KCFLAGS: kbuild.html#kcflags +.. _prefix-map options: https://reproducible-builds.org/docs/build-path/ .. _Reproducible Builds project: https://reproducible-builds.org/ .. _SOURCE_DATE_EPOCH: https://reproducible-builds.org/docs/source-date-epoch/ -- cgit v1.2.3 From 3e96de394ca0d426b2df6f63991057036b89e643 Mon Sep 17 00:00:00 2001 From: Alexey Charkov Date: Fri, 25 Apr 2025 19:02:22 +0400 Subject: dt-bindings: arm: vt8500: Add VIA APC Rock/Paper boards APC Rock is a development board based on WonderMedia WM8950 SoC released around 2013. Paper is the same as Rock but lacking a VGA port and shipped with a recycled cardboard case. While at that, put myself as the maintainer, given that Tony is unavailable as of lately. Acked-by: Conor Dooley Signed-off-by: Alexey Charkov Link: https://lore.kernel.org/r/20250425-apc_paper_binding-v5-1-3aef49e97332@gmail.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/vt8500.yaml | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/vt8500.yaml b/Documentation/devicetree/bindings/arm/vt8500.yaml index 5d5ad5a60451..fa47b8989bbf 100644 --- a/Documentation/devicetree/bindings/arm/vt8500.yaml +++ b/Documentation/devicetree/bindings/arm/vt8500.yaml @@ -7,14 +7,13 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: VIA/Wondermedia VT8500 Platforms maintainers: - - Tony Prisk -description: test + - Alexey Charkov properties: $nodename: const: '/' compatible: - items: + oneOf: - enum: - via,vt8500 - wm,wm8505 @@ -22,4 +21,9 @@ properties: - wm,wm8750 - wm,wm8850 + - description: VIA APC Rock and Paper boards + items: + - const: via,apc-rock + - const: wm,wm8950 + additionalProperties: true -- cgit v1.2.3 From 18ee43c398af0b7e2eb2a4cd8469967834b0802d Mon Sep 17 00:00:00 2001 From: Chen Linxuan Date: Wed, 7 May 2025 16:42:17 +0800 Subject: docs: filesystems: add fuse-passthrough.rst Add a documentation about FUSE passthrough. It's mainly about why FUSE passthrough needs CAP_SYS_ADMIN. Link: https://lore.kernel.org/all/4b64a41c-6167-4c02-8bae-3021270ca519@fastmail.fm/T/#mc73e04df56b8830b1d7b06b5d9f22e594fba423e Link: https://lore.kernel.org/linux-fsdevel/CAOQ4uxhAY1m7ubJ3p-A3rSufw_53WuDRMT1Zqe_OC0bP_Fb3Zw@mail.gmail.com/ Reviewed-by: Amir Goldstein Signed-off-by: Chen Linxuan Signed-off-by: Miklos Szeredi --- Documentation/filesystems/fuse-passthrough.rst | 133 +++++++++++++++++++++++++ Documentation/filesystems/index.rst | 1 + 2 files changed, 134 insertions(+) create mode 100644 Documentation/filesystems/fuse-passthrough.rst (limited to 'Documentation') diff --git a/Documentation/filesystems/fuse-passthrough.rst b/Documentation/filesystems/fuse-passthrough.rst new file mode 100644 index 000000000000..2b0e7c2da54a --- /dev/null +++ b/Documentation/filesystems/fuse-passthrough.rst @@ -0,0 +1,133 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================ +FUSE Passthrough +================ + +Introduction +============ + +FUSE (Filesystem in Userspace) passthrough is a feature designed to improve the +performance of FUSE filesystems for I/O operations. Typically, FUSE operations +involve communication between the kernel and a userspace FUSE daemon, which can +incur overhead. Passthrough allows certain operations on a FUSE file to bypass +the userspace daemon and be executed directly by the kernel on an underlying +"backing file". + +This is achieved by the FUSE daemon registering a file descriptor (pointing to +the backing file on a lower filesystem) with the FUSE kernel module. The kernel +then receives an identifier (``backing_id``) for this registered backing file. +When a FUSE file is subsequently opened, the FUSE daemon can, in its response to +the ``OPEN`` request, include this ``backing_id`` and set the +``FOPEN_PASSTHROUGH`` flag. This establishes a direct link for specific +operations. + +Currently, passthrough is supported for operations like ``read(2)``/``write(2)`` +(via ``read_iter``/``write_iter``), ``splice(2)``, and ``mmap(2)``. + +Enabling Passthrough +==================== + +To use FUSE passthrough: + + 1. The FUSE filesystem must be compiled with ``CONFIG_FUSE_PASSTHROUGH`` + enabled. + 2. The FUSE daemon, during the ``FUSE_INIT`` handshake, must negotiate the + ``FUSE_PASSTHROUGH`` capability and specify its desired + ``max_stack_depth``. + 3. The (privileged) FUSE daemon uses the ``FUSE_DEV_IOC_BACKING_OPEN`` ioctl + on its connection file descriptor (e.g., ``/dev/fuse``) to register a + backing file descriptor and obtain a ``backing_id``. + 4. When handling an ``OPEN`` or ``CREATE`` request for a FUSE file, the daemon + replies with the ``FOPEN_PASSTHROUGH`` flag set in + ``fuse_open_out::open_flags`` and provides the corresponding ``backing_id`` + in ``fuse_open_out::backing_id``. + 5. The FUSE daemon should eventually call ``FUSE_DEV_IOC_BACKING_CLOSE`` with + the ``backing_id`` to release the kernel's reference to the backing file + when it's no longer needed for passthrough setups. + +Privilege Requirements +====================== + +Setting up passthrough functionality currently requires the FUSE daemon to +possess the ``CAP_SYS_ADMIN`` capability. This requirement stems from several +security and resource management considerations that are actively being +discussed and worked on. The primary reasons for this restriction are detailed +below. + +Resource Accounting and Visibility +---------------------------------- + +The core mechanism for passthrough involves the FUSE daemon opening a file +descriptor to a backing file and registering it with the FUSE kernel module via +the ``FUSE_DEV_IOC_BACKING_OPEN`` ioctl. This ioctl returns a ``backing_id`` +associated with a kernel-internal ``struct fuse_backing`` object, which holds a +reference to the backing ``struct file``. + +A significant concern arises because the FUSE daemon can close its own file +descriptor to the backing file after registration. The kernel, however, will +still hold a reference to the ``struct file`` via the ``struct fuse_backing`` +object as long as it's associated with a ``backing_id`` (or subsequently, with +an open FUSE file in passthrough mode). + +This behavior leads to two main issues for unprivileged FUSE daemons: + + 1. **Invisibility to lsof and other inspection tools**: Once the FUSE + daemon closes its file descriptor, the open backing file held by the kernel + becomes "hidden." Standard tools like ``lsof``, which typically inspect + process file descriptor tables, would not be able to identify that this + file is still open by the system on behalf of the FUSE filesystem. This + makes it difficult for system administrators to track resource usage or + debug issues related to open files (e.g., preventing unmounts). + + 2. **Bypassing RLIMIT_NOFILE**: The FUSE daemon process is subject to + resource limits, including the maximum number of open file descriptors + (``RLIMIT_NOFILE``). If an unprivileged daemon could register backing files + and then close its own FDs, it could potentially cause the kernel to hold + an unlimited number of open ``struct file`` references without these being + accounted against the daemon's ``RLIMIT_NOFILE``. This could lead to a + denial-of-service (DoS) by exhausting system-wide file resources. + +The ``CAP_SYS_ADMIN`` requirement acts as a safeguard against these issues, +restricting this powerful capability to trusted processes. + +**NOTE**: ``io_uring`` solves this similar issue by exposing its "fixed files", +which are visible via ``fdinfo`` and accounted under the registering user's +``RLIMIT_NOFILE``. + +Filesystem Stacking and Shutdown Loops +-------------------------------------- + +Another concern relates to the potential for creating complex and problematic +filesystem stacking scenarios if unprivileged users could set up passthrough. +A FUSE passthrough filesystem might use a backing file that resides: + + * On the *same* FUSE filesystem. + * On another filesystem (like OverlayFS) which itself might have an upper or + lower layer that is a FUSE filesystem. + +These configurations could create dependency loops, particularly during +filesystem shutdown or unmount sequences, leading to deadlocks or system +instability. This is conceptually similar to the risks associated with the +``LOOP_SET_FD`` ioctl, which also requires ``CAP_SYS_ADMIN``. + +To mitigate this, FUSE passthrough already incorporates checks based on +filesystem stacking depth (``sb->s_stack_depth`` and ``fc->max_stack_depth``). +For example, during the ``FUSE_INIT`` handshake, the FUSE daemon can negotiate +the ``max_stack_depth`` it supports. When a backing file is registered via +``FUSE_DEV_IOC_BACKING_OPEN``, the kernel checks if the backing file's +filesystem stack depth is within the allowed limit. + +The ``CAP_SYS_ADMIN`` requirement provides an additional layer of security, +ensuring that only privileged users can create these potentially complex +stacking arrangements. + +General Security Posture +------------------------ + +As a general principle for new kernel features that allow userspace to instruct +the kernel to perform direct operations on its behalf based on user-provided +file descriptors, starting with a higher privilege requirement (like +``CAP_SYS_ADMIN``) is a conservative and common security practice. This allows +the feature to be used and tested while further security implications are +evaluated and addressed. diff --git a/Documentation/filesystems/index.rst b/Documentation/filesystems/index.rst index a9cf8e950b15..2913f4f2e00c 100644 --- a/Documentation/filesystems/index.rst +++ b/Documentation/filesystems/index.rst @@ -99,6 +99,7 @@ Documentation for filesystem implementations. fuse fuse-io fuse-io-uring + fuse-passthrough inotify isofs nilfs2 -- cgit v1.2.3 From 92c025db52bb94a032eb3d473bb81e62c19ddbd3 Mon Sep 17 00:00:00 2001 From: Suma Hegde Date: Tue, 6 May 2025 10:15:41 +0000 Subject: platform/x86/amd/hsmp: Report power via hwmon sensors MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Expose power reading and power limits via hwmon power sensors. Signed-off-by: Suma Hegde Reviewed-by: Naveen Krishna Chatradhi Link: https://lore.kernel.org/r/20250506101542.200811-2-suma.hegde@amd.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/arch/x86/amd_hsmp.rst | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/arch/x86/amd_hsmp.rst b/Documentation/arch/x86/amd_hsmp.rst index 2fd917638e42..3ef3e0a71df9 100644 --- a/Documentation/arch/x86/amd_hsmp.rst +++ b/Documentation/arch/x86/amd_hsmp.rst @@ -116,6 +116,14 @@ for socket with ID00 is given below:: }) } +HSMP HWMON interface +==================== +HSMP power sensors are registered with the hwmon interface. A separate hwmon +directory is created for each socket and the following files are generated +within the hwmon directory. +- power1_input (read only) +- power1_cap_max (read only) +- power1_cap (read, write) An example ========== -- cgit v1.2.3 From 511a4a5ea2b6f1d4e0c719f27db6b627b2b52e49 Mon Sep 17 00:00:00 2001 From: Suma Hegde Date: Tue, 6 May 2025 10:15:42 +0000 Subject: platform/x86/amd/hsmp: acpi: Add sysfs files to display HSMP telemetry MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make frequently fetched telemetry available via sysfs. These parameters do not fit in hwmon sensor model, hence make them available via sysfs. Create following sysfs files per acpi device node. * c0_residency_input * prochot_status * smu_fw_version * protocol_version * ddr_max_bw(GB/s) * ddr_utilised_bw_input(GB/s) * ddr_utilised_bw_perc_input(%) * mclk_input(MHz) * fclk_input(MHz) * clk_fmax(MHz) * clk_fmin(MHz) * cclk_freq_limit_input(MHz) * pwr_current_active_freq_limit(MHz) * pwr_current_active_freq_limit_source Signed-off-by: Suma Hegde Reviewed-by: Naveen Krishna Chatradhi Reviewed-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20250506101542.200811-3-suma.hegde@amd.com Signed-off-by: Ilpo Järvinen --- Documentation/arch/x86/amd_hsmp.rst | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'Documentation') diff --git a/Documentation/arch/x86/amd_hsmp.rst b/Documentation/arch/x86/amd_hsmp.rst index 3ef3e0a71df9..a094f55c10b0 100644 --- a/Documentation/arch/x86/amd_hsmp.rst +++ b/Documentation/arch/x86/amd_hsmp.rst @@ -71,6 +71,28 @@ Note: lseek() is not supported as entire metrics table is read. Metrics table definitions will be documented as part of Public PPR. The same is defined in the amd_hsmp.h header. +2. HSMP telemetry sysfs files + +Following sysfs files are available at /sys/devices/platform/AMDI0097:0X/. + +* c0_residency_input: Percentage of cores in C0 state. +* prochot_status: Reports 1 if the processor is at thermal threshold value, + 0 otherwise. +* smu_fw_version: SMU firmware version. +* protocol_version: HSMP interface version. +* ddr_max_bw: Theoretical maximum DDR bandwidth in GB/s. +* ddr_utilised_bw_input: Current utilized DDR bandwidth in GB/s. +* ddr_utilised_bw_perc_input(%): Percentage of current utilized DDR bandwidth. +* mclk_input: Memory clock in MHz. +* fclk_input: Fabric clock in MHz. +* clk_fmax: Maximum frequency of socket in MHz. +* clk_fmin: Minimum frequency of socket in MHz. +* cclk_freq_limit_input: Core clock frequency limit per socket in MHz. +* pwr_current_active_freq_limit: Current active frequency limit of socket + in MHz. +* pwr_current_active_freq_limit_source: Source of current active frequency + limit. + ACPI device object format ========================= The ACPI object format expected from the amd_hsmp driver -- cgit v1.2.3 From f4856c20c137a73d73e448caa3964098024248bf Mon Sep 17 00:00:00 2001 From: Armin Wolf Date: Tue, 29 Apr 2025 02:36:03 +0200 Subject: power: supply: core: Add additional health status values MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some batteries can signal when an internal fuse was blown. In such a case POWER_SUPPLY_HEALTH_DEAD is too vague for userspace applications to perform meaningful diagnostics. Additionally some batteries can also signal when some of their internal cells are imbalanced. In such a case returning POWER_SUPPLY_HEALTH_UNSPEC_FAILURE is again too vague for userspace applications to perform meaningful diagnostics. Add new health status values for both cases. Signed-off-by: Armin Wolf Reviewed-by: Sebastian Reichel Link: https://lore.kernel.org/r/20250429003606.303870-1-W_Armin@gmx.de Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/ABI/testing/sysfs-class-power | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-class-power b/Documentation/ABI/testing/sysfs-class-power index 78afb2422fc5..dfa824bccf82 100644 --- a/Documentation/ABI/testing/sysfs-class-power +++ b/Documentation/ABI/testing/sysfs-class-power @@ -456,7 +456,7 @@ Description: "Over voltage", "Under voltage", "Unspecified failure", "Cold", "Watchdog timer expire", "Safety timer expire", "Over current", "Calibration required", "Warm", - "Cool", "Hot", "No battery" + "Cool", "Hot", "No battery", "Blown fuse", "Cell imbalance" What: /sys/class/power_supply//precharge_current Date: June 2017 -- cgit v1.2.3 From 058de163a376b28816f91ff5e2fe6d7bc227e2ae Mon Sep 17 00:00:00 2001 From: Armin Wolf Date: Tue, 29 Apr 2025 02:36:04 +0200 Subject: platform/x86: dell-ddv: Implement the battery matching algorithm MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since commit db0a507cb24d ("ACPICA: Update integer-to-hex-string conversions") the battery serial number is no longer distorted, allowing us to finally implement the battery matching algorithm. The battery matchign algorithm is necessary when translating between ACPI batteries and the associated indices used by the WMI interface based on the battery serial number. Since this serial number can only be retrieved when the battery is present we cannot perform the initial translation inside dell_wmi_ddv_add_battery() because the ACPI battery might be absent at this point in time. Introduce dell_wmi_ddv_battery_translate() which implements the battery matching algorithm and replaces dell_wmi_ddv_battery_index(). Also implement a translation cache for caching previous translations between ACPI batteries and indices. This is necessary because performing a translation can be very expensive. Tested on a Dell Inspiron 3505. Signed-off-by: Armin Wolf Link: https://lore.kernel.org/r/20250429003606.303870-2-W_Armin@gmx.de Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/wmi/devices/dell-wmi-ddv.rst | 8 -------- 1 file changed, 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/wmi/devices/dell-wmi-ddv.rst b/Documentation/wmi/devices/dell-wmi-ddv.rst index e0c20af30948..f10a623acca1 100644 --- a/Documentation/wmi/devices/dell-wmi-ddv.rst +++ b/Documentation/wmi/devices/dell-wmi-ddv.rst @@ -260,14 +260,6 @@ Some machines like the Dell Inspiron 3505 only support a single battery and thus ignore the battery index. Because of this the driver depends on the ACPI battery hook mechanism to discover batteries. -.. note:: - The ACPI battery matching algorithm currently used inside the driver is - outdated and does not match the algorithm described above. The reasons for - this are differences in the handling of the ToHexString() ACPI opcode between - Linux and Windows, which distorts the serial number of ACPI batteries on many - machines. Until this issue is resolved, the driver cannot use the above - algorithm. - Reverse-Engineering the DDV WMI interface ========================================= -- cgit v1.2.3 From 303ecf690ae2882f1138ea1437207fba5294da34 Mon Sep 17 00:00:00 2001 From: Armin Wolf Date: Tue, 29 Apr 2025 02:36:05 +0200 Subject: platform/x86: dell-ddv: Expose the battery manufacture date to userspace MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The manufacture date of a given battery is exposed over the Dell DDV WMI interface using the "BatteryManufactureDate" WMI method. The resulting data contains the manufacture date of the battery encoded inside a 16-bit value as described in the Smart Battery Data Specification. Expose this value to userspace using the power supply extension interface. Tested on a Dell Inspiron 3505. Signed-off-by: Armin Wolf Link: https://lore.kernel.org/r/20250429003606.303870-3-W_Armin@gmx.de Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/wmi/devices/dell-wmi-ddv.rst | 3 --- 1 file changed, 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/wmi/devices/dell-wmi-ddv.rst b/Documentation/wmi/devices/dell-wmi-ddv.rst index f10a623acca1..41c553d5c77d 100644 --- a/Documentation/wmi/devices/dell-wmi-ddv.rst +++ b/Documentation/wmi/devices/dell-wmi-ddv.rst @@ -118,9 +118,6 @@ The date is encoded in the following manner: - bits 5 to 8 contain the manufacture month. - bits 9 to 15 contain the manufacture year biased by 1980. -.. note:: - The data format needs to be verified on more machines. - WMI method BatterySerialNumber() -------------------------------- -- cgit v1.2.3 From 2bd1870a67692bb7bbeba80bb3135934d78eba66 Mon Sep 17 00:00:00 2001 From: Armin Wolf Date: Tue, 29 Apr 2025 02:36:06 +0200 Subject: platform/x86: dell-ddv: Expose the battery health to userspace MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The health of a given battery is exposed over the Dell DDV WMI interface using the "BatteryManufactureAceess" WMI method. The resulting data contains, among other data, the health status of the battery. Expose this value to userspace using the power supply extension interface. Tested on a Dell Inspiron 3505. Signed-off-by: Armin Wolf Link: https://lore.kernel.org/r/20250429003606.303870-4-W_Armin@gmx.de Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/wmi/devices/dell-wmi-ddv.rst | 35 +++++++++++++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/wmi/devices/dell-wmi-ddv.rst b/Documentation/wmi/devices/dell-wmi-ddv.rst index 41c553d5c77d..109d4c5c922e 100644 --- a/Documentation/wmi/devices/dell-wmi-ddv.rst +++ b/Documentation/wmi/devices/dell-wmi-ddv.rst @@ -150,7 +150,40 @@ Returns the voltage flow of the battery in mV as an u16. WMI method BatteryManufactureAccess() ------------------------------------- -Returns a manufacture-defined value as an u16. +Returns the health status of the battery as a u16. +The health status encoded in the following manner: + + - the third nibble contains the general failure mode + - the fourth nibble contains the specific failure code + +Valid failure modes are: + + - permanent failure (``0x9``) + - overheat failure (``0xa``) + - overcurrent failure (``0xb``) + +All other failure modes are to be considered normal. + +The following failure codes are valid for a permanent failure: + + - fuse blown (``0x0``) + - cell imbalance (``0x1``) + - overvoltage (``0x2``) + - fet failure (``0x3``) + +The last two bits of the failure code are to be ignored when the battery +signals a permanent failure. + +The following failure codes a valid for a overheat failure: + + - overheat at start of charging (``0x5``) + - overheat during charging (``0x7``) + - overheat during discharging (``0x8``) + +The following failure codes are valid for a overcurrent failure: + + - overcurrent during charging (``0x6``) + - overcurrent during discharging (``0xb``) WMI method BatteryRelativeStateOfCharge() ----------------------------------------- -- cgit v1.2.3 From 0a07a5af234b8cc6c2982e5c1e7bdff806902e16 Mon Sep 17 00:00:00 2001 From: Tony Luck Date: Mon, 5 May 2025 10:38:19 -0700 Subject: ACPI: Add documentation for exposing MRRM data Initial implementation provides enumeration of the address ranges NUMA node numbers, and BIOS assigned region IDs for each range. Signed-off-by: Tony Luck Link: https://patch.msgid.link/20250505173819.419271-4-tony.luck@intel.com Signed-off-by: Rafael J. Wysocki --- Documentation/ABI/testing/sysfs-firmware-acpi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-firmware-acpi b/Documentation/ABI/testing/sysfs-firmware-acpi index 5249ad5a96d9..f4de60c4134d 100644 --- a/Documentation/ABI/testing/sysfs-firmware-acpi +++ b/Documentation/ABI/testing/sysfs-firmware-acpi @@ -248,3 +248,24 @@ Description: # cat ff_pwr_btn 7 enabled +What: /sys/firmware/acpi/memory_ranges/rangeX +Date: February 2025 +Contact: Tony Luck +Description: + On systems with the ACPI MRRM table reports the parameters for + each range. + + base: Starting system physical address. + + length: Length of this range in bytes. + + node: NUMA node that this range belongs to. Negative numbers + indicate that the node number could not be determined (e.g + for an address range that is reserved for future hot add of + memory). + + local_region_id: ID associated with access by agents + local to this range of addresses. + + remote_region_id: ID associated with access by agents + non-local to this range of addresses. -- cgit v1.2.3 From d58a73c96d8ae87936579689af1dd60a09bda432 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Mon, 12 May 2025 14:48:14 +0100 Subject: dt-bindings: cache: add specific RZ/Five compatible to ax45mp When the binding was originally written, it was assumed that all ax45mp-caches had the same properties etc. This has turned out to be incorrect, as the QiLai SoC has a different number of cache-sets. Add a specific compatible for the RZ/Five for property enforcement and in case there turns out to be additional differences between these implementations of the cache controller. Acked-by: Ben Zong-You Xie Reviewed-by: Geert Uytterhoeven Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml index d2cbe49f4e15..82668d327344 100644 --- a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml +++ b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml @@ -28,6 +28,7 @@ select: properties: compatible: items: + - const: renesas,r9a07g043f-ax45mp-cache - const: andestech,ax45mp-cache - const: cache @@ -70,7 +71,8 @@ examples: #include cache-controller@13400000 { - compatible = "andestech,ax45mp-cache", "cache"; + compatible = "renesas,r9a07g043f-ax45mp-cache", "andestech,ax45mp-cache", + "cache"; reg = <0x13400000 0x100000>; interrupts = <508 IRQ_TYPE_LEVEL_HIGH>; cache-line-size = <64>; -- cgit v1.2.3 From ab1a94b504b6f19c294786b5920574fb374fb5cc Mon Sep 17 00:00:00 2001 From: Ryan Walklin Date: Sun, 11 May 2025 22:31:15 +1200 Subject: dt-bindings: allwinner: add H616 DE33 clock binding The Allwinner H616 and variants have a new display engine revision (DE33). Add a clock binding for the DE33. Signed-off-by: Ryan Walklin Acked-by: Conor Dooley Reviewed-by: Chen-Yu Tsai Link: https://patch.msgid.link/20250511104042.24249-7-ryan@testtoast.com Signed-off-by: Chen-Yu Tsai --- .../devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml index 70369bd633e4..7fcd55d468d4 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml @@ -25,6 +25,7 @@ properties: - const: allwinner,sun50i-a64-de2-clk - const: allwinner,sun50i-h5-de2-clk - const: allwinner,sun50i-h6-de3-clk + - const: allwinner,sun50i-h616-de33-clk - items: - const: allwinner,sun8i-r40-de2-clk - const: allwinner,sun8i-h3-de2-clk -- cgit v1.2.3 From 90957ca46abe41f61b318a18852eaed1aa828f11 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Mon, 5 May 2025 03:14:45 +0300 Subject: dt-bindings: display/msm/hdmi: drop obsolete GPIOs from schema The commit 68e674b13b17 ("drm/msm/hdmi: drop unused GPIO support") dropped support for obsolete qcom,hdmi-tx-mux-* gpios. They were not used by any of the upstream platforms. Drop them from the bindings too. Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski Patchwork: https://patchwork.freedesktop.org/patch/651708/ Link: https://lore.kernel.org/r/20250505-fd-hdmi-hpd-v5-1-48541f76318c@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/display/msm/hdmi.yaml | 15 --------------- 1 file changed, 15 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.yaml b/Documentation/devicetree/bindings/display/msm/hdmi.yaml index d4a2033afea8..7e6f776a047a 100644 --- a/Documentation/devicetree/bindings/display/msm/hdmi.yaml +++ b/Documentation/devicetree/bindings/display/msm/hdmi.yaml @@ -66,21 +66,6 @@ properties: maxItems: 1 description: hpd pin - qcom,hdmi-tx-mux-en-gpios: - maxItems: 1 - deprecated: true - description: HDMI mux enable pin - - qcom,hdmi-tx-mux-sel-gpios: - maxItems: 1 - deprecated: true - description: HDMI mux select pin - - qcom,hdmi-tx-mux-lpm-gpios: - maxItems: 1 - deprecated: true - description: HDMI mux lpm pin - '#sound-dai-cells': const: 1 -- cgit v1.2.3 From d92801d8e6b43887ca5acc1713e89e26bbc64643 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 7 May 2025 16:59:12 -0500 Subject: dt-bindings: display/msm: hdmi: Fix constraints on additional 'port' properties The MSM HDMI port nodes are missing any restrictions on additional properties. The $ref should be to "/properties/port" rather than "/$defs/port-base" as there are not additional properties in the nodes to define. Signed-off-by: Rob Herring (Arm) Reviewed-by: Dmitry Baryshkov Patchwork: https://patchwork.freedesktop.org/patch/652299/ Link: https://lore.kernel.org/r/20250507215912.2748964-1-robh@kernel.org Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/display/msm/hdmi.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.yaml b/Documentation/devicetree/bindings/display/msm/hdmi.yaml index 7e6f776a047a..dfec6c3480f3 100644 --- a/Documentation/devicetree/bindings/display/msm/hdmi.yaml +++ b/Documentation/devicetree/bindings/display/msm/hdmi.yaml @@ -74,12 +74,12 @@ properties: $ref: /schemas/graph.yaml#/properties/ports properties: port@0: - $ref: /schemas/graph.yaml#/$defs/port-base + $ref: /schemas/graph.yaml#/properties/port description: | Input endpoints of the controller. port@1: - $ref: /schemas/graph.yaml#/$defs/port-base + $ref: /schemas/graph.yaml#/properties/port description: | Output endpoints of the controller. -- cgit v1.2.3 From 00ca54bee4b25fb23534f9d8ba3a75ea0f1abc66 Mon Sep 17 00:00:00 2001 From: Wenliang Yan Date: Tue, 6 May 2025 01:37:41 -0400 Subject: dt-bindings: Add SQ52206 to ina2xx devicetree bindings Add the sq52206 compatible to the ina2xx.yaml Signed-off-by: Wenliang Yan Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250506053741.4837-5-wenliang202407@163.com Signed-off-by: Guenter Roeck --- Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml index bc03781342c0..d1fb7b9abda0 100644 --- a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml +++ b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml @@ -19,6 +19,7 @@ description: | properties: compatible: enum: + - silergy,sq52206 - silergy,sy24655 - ti,ina209 - ti,ina219 @@ -58,6 +59,9 @@ properties: shunt voltage, and a value of 4 maps to ADCRANGE=0 such that a wider voltage range is used. + For SQ52206,the shunt-gain value 1 mapps to ADCRANGE=10/11, the value 2 + mapps to ADCRANGE=01, and the value 4 mapps to ADCRANGE=00. + The default value is device dependent, and is defined by the reset value of PGA/ADCRANGE in the respective configuration registers. $ref: /schemas/types.yaml#/definitions/uint32 @@ -97,6 +101,7 @@ allOf: compatible: contains: enum: + - silergy,sq52206 - silergy,sy24655 - ti,ina209 - ti,ina219 -- cgit v1.2.3 From 6daaf15a11731c32f1c34920b1d22903704375f9 Mon Sep 17 00:00:00 2001 From: Wenliang Yan Date: Tue, 6 May 2025 01:37:39 -0400 Subject: hwmon: (ina238) Add support for SQ52206 Add support for SQ52206 to the Ina238 driver. Add registers, increase compatibility, add compatibility programs for multiple chips. Signed-off-by: Wenliang Yan Link: https://lore.kernel.org/r/20250506053741.4837-3-wenliang202407@163.com [groeck: Fixed checkpatch issues (alignment, {} placing)] Signed-off-by: Guenter Roeck --- Documentation/hwmon/ina238.rst | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'Documentation') diff --git a/Documentation/hwmon/ina238.rst b/Documentation/hwmon/ina238.rst index d9f479984420..d1b93cf8627f 100644 --- a/Documentation/hwmon/ina238.rst +++ b/Documentation/hwmon/ina238.rst @@ -14,6 +14,12 @@ Supported chips: Datasheet: https://www.ti.com/lit/gpn/ina238 + * Silergy SQ52206 + + Prefix: 'SQ52206' + + Addresses: I2C 0x40 - 0x4f + Author: Nathan Rossi Description @@ -54,3 +60,12 @@ temp1_input Die temperature measurement (mC) temp1_max Maximum die temperature threshold (mC) temp1_max_alarm Maximum die temperature alarm ======================= ======================================================= + +Additional sysfs entries for sq52206 +------------------------------------ + +======================= ======================================================= +energy1_input Energy measurement (mJ) + +power1_input_highest Peak Power (uW) +======================= ======================================================= -- cgit v1.2.3 From e00fe40065b874f5622949d5a6734a632b3fd76a Mon Sep 17 00:00:00 2001 From: Pawel Dembicki Date: Sun, 11 May 2025 05:55:44 +0200 Subject: dt-bindings: hwmon: Add bindings for mpq8785 driver Add device tree bindings for Monolithic Power Systems MPQ8785, MPM82504 and MPM3695 PMBus-compliant voltage regulators. These bindings also documents the optional "mps,vout-fb-divider-ratio-permille" property. Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250511035701.2607947-2-paweldembicki@gmail.com Signed-off-by: Pawel Dembicki Signed-off-by: Guenter Roeck --- .../bindings/hwmon/pmbus/mps,mpq8785.yaml | 74 ++++++++++++++++++++++ .../devicetree/bindings/trivial-devices.yaml | 2 - 2 files changed, 74 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/hwmon/pmbus/mps,mpq8785.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/hwmon/pmbus/mps,mpq8785.yaml b/Documentation/devicetree/bindings/hwmon/pmbus/mps,mpq8785.yaml new file mode 100644 index 000000000000..90970a0433e9 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/pmbus/mps,mpq8785.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/pmbus/mps,mpq8785.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Monolithic Power Systems Multiphase Voltage Regulators with PMBus + +maintainers: + - Charles Hsu + +description: + Monolithic Power Systems digital multiphase voltage regulators with PMBus. + +properties: + compatible: + enum: + - mps,mpm3695 + - mps,mpm3695-25 + - mps,mpm82504 + - mps,mpq8785 + + reg: + maxItems: 1 + + mps,vout-fb-divider-ratio-permille: + description: + The feedback resistor divider ratio, expressed in permille + (Vfb / Vout * 1000). This value is written to the PMBUS_VOUT_SCALE_LOOP + register and is required for correct output voltage presentation. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 4095 + default: 706 + +required: + - compatible + - reg + +allOf: + - if: + properties: + compatible: + enum: + - mps,mpm3695 + - mps,mpm82504 + then: + properties: + mps,vout-fb-divider-ratio-permille: + maximum: 1023 + + - if: + properties: + compatible: + const: mps,mpq8785 + then: + properties: + mps,vout-fb-divider-ratio-permille: + maximum: 2047 + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@30 { + compatible = "mps,mpm82504"; + reg = <0x30>; + mps,vout-fb-divider-ratio-permille = <600>; + }; + }; diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index 8da408107e55..7c1c0cc29655 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -293,8 +293,6 @@ properties: - mps,mp5990 # Monolithic Power Systems Inc. digital step-down converter mp9941 - mps,mp9941 - # Monolithic Power Systems Inc. synchronous step-down converter mpq8785 - - mps,mpq8785 # Temperature sensor with integrated fan control - national,lm63 # Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor -- cgit v1.2.3 From c27291468eb957b11dc81cd35fad36faf0861c07 Mon Sep 17 00:00:00 2001 From: Pawel Dembicki Date: Sun, 11 May 2025 05:55:47 +0200 Subject: hwmon: pmbus: mpq8785: Add support for MPM82504 Add support for the Monolithic Power Systems MPM82504 digital voltage regulator. MPM82504 uses PMBus direct format for voltage output. Tested with device tree based matching. Signed-off-by: Pawel Dembicki Link: https://lore.kernel.org/r/20250511035701.2607947-5-paweldembicki@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/mpq8785.rst | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/hwmon/mpq8785.rst b/Documentation/hwmon/mpq8785.rst index bf8176b87086..b91fefb1a84c 100644 --- a/Documentation/hwmon/mpq8785.rst +++ b/Documentation/hwmon/mpq8785.rst @@ -5,6 +5,7 @@ Kernel driver mpq8785 Supported chips: + * MPS MPM82504 * MPS MPQ8785 Prefix: 'mpq8785' @@ -14,6 +15,14 @@ Author: Charles Hsu Description ----------- +The MPM82504 is a quad 25A, scalable, fully integrated power module with a PMBus +interface. The device offers a complete power solution that achieves up to 25A +per output channel. The MPM82504 has four output channels that can be paralleled +to provide 50A, 75A, or 100A of output current for flexible configurations. +The device can also operate in parallel with the MPM3695-100 and additional +MPM82504 devices to provide a higher output current. The MPM82504 operates +at high efficiency across a wide load range. + The MPQ8785 is a fully integrated, PMBus-compatible, high-frequency, synchronous buck converter. The MPQ8785 offers a very compact solution that achieves up to 40A output current per phase, with excellent load and line regulation over a @@ -23,18 +32,19 @@ output current load range. The PMBus interface provides converter configurations and key parameters monitoring. -The MPQ8785 adopts MPS's proprietary multi-phase digital constant-on-time (MCOT) +The devices adopts MPS's proprietary multi-phase digital constant-on-time (MCOT) control, which provides fast transient response and eases loop stabilization. -The MCOT scheme also allows multiple MPQ8785 devices to be connected in parallel -with excellent current sharing and phase interleaving for high-current +The MCOT scheme also allows multiple devices or channels to be connected in +parallel with excellent current sharing and phase interleaving for high-current applications. Fully integrated protection features include over-current protection (OCP), over-voltage protection (OVP), under-voltage protection (UVP), and over-temperature protection (OTP). -The MPQ8785 requires a minimal number of readily available, standard external -components, and is available in a TLGA (5mmx6mm) package. +All supported modules require a minimal number of readily available, standard +external components. The MPM82504 is available in a BGA (15mmx30mmx5.18mm) +package and the MPQ8785 is available in a TLGA (5mmx6mm) package. Device compliant with: -- cgit v1.2.3 From 8fcefe7812f246fff86d6f7ad8e166a564916202 Mon Sep 17 00:00:00 2001 From: Pawel Dembicki Date: Sun, 11 May 2025 05:55:48 +0200 Subject: hwmon: pmbus: mpq8785: Add support for MPM3695 family Add support for the Monolithic Power Systems MPM3695 family. It contains four devices with suffixes: -10, -20, -25 and -100. The device is PMBus compliant and shares characteristics with the MPM82504. MPM3695-25 has different VOLTAGE_SCALE_LOOP register size [11:0] and therefore needs to have a separate compatible entry. Tested with device tree based matching (MPM3695-10). Signed-off-by: Pawel Dembicki Link: https://lore.kernel.org/r/20250511035701.2607947-6-paweldembicki@gmail.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/mpq8785.rst | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/hwmon/mpq8785.rst b/Documentation/hwmon/mpq8785.rst index b91fefb1a84c..198d5dfd7c30 100644 --- a/Documentation/hwmon/mpq8785.rst +++ b/Documentation/hwmon/mpq8785.rst @@ -5,6 +5,7 @@ Kernel driver mpq8785 Supported chips: + * MPS MPM3695 family * MPS MPM82504 * MPS MPQ8785 @@ -15,6 +16,14 @@ Author: Charles Hsu Description ----------- +The MPM3695 family is a scalable, ultra-thin, fully integrated power module with +a PMBus interface. It offers a complete power solution that achieves up to +10A (-10 variant), 20A (-25 variant), 25A (-20 variant), 100A (-100 variant) +of output current with excellent load and line regulation across a wide input +voltage range. It operates at high efficiency over a wide load range, and can +be parallled to deliver higher current. Variants -10,-20 and -100 have different +voltage scale configuration register range (10 bits) than -25 version (11 bits). + The MPM82504 is a quad 25A, scalable, fully integrated power module with a PMBus interface. The device offers a complete power solution that achieves up to 25A per output channel. The MPM82504 has four output channels that can be paralleled @@ -42,10 +51,6 @@ Fully integrated protection features include over-current protection (OCP), over-voltage protection (OVP), under-voltage protection (UVP), and over-temperature protection (OTP). -All supported modules require a minimal number of readily available, standard -external components. The MPM82504 is available in a BGA (15mmx30mmx5.18mm) -package and the MPQ8785 is available in a TLGA (5mmx6mm) package. - Device compliant with: - PMBus rev 1.3 interface. -- cgit v1.2.3 From 33f7187efd3b5f9e03d50e8209d86a08d215d413 Mon Sep 17 00:00:00 2001 From: Melody Olvera Date: Mon, 12 May 2025 13:54:41 -0700 Subject: dt-bindings: cache: qcom,llcc: Document SM8750 LLCC block Add documentation for the SM8750 LLCC. Signed-off-by: Melody Olvera Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250512-sm8750_llcc_master-v5-1-d78dca6282a5@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml index e5effbb4a606..37e3ebd55487 100644 --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml @@ -40,6 +40,7 @@ properties: - qcom,sm8450-llcc - qcom,sm8550-llcc - qcom,sm8650-llcc + - qcom,sm8750-llcc - qcom,x1e80100-llcc reg: @@ -274,6 +275,7 @@ allOf: - qcom,sm8450-llcc - qcom,sm8550-llcc - qcom,sm8650-llcc + - qcom,sm8750-llcc then: properties: reg: -- cgit v1.2.3 From 9b96f82c782c9d3f614c7d34e13382d91bb4854c Mon Sep 17 00:00:00 2001 From: Gerhard Engleder Date: Fri, 25 Apr 2025 21:48:23 +0200 Subject: hwmon: Add KEBA fan controller support The KEBA fan controller is found in the system FPGA of KEBA PLC devices. It detects if the fan is removed or blocked. For fans with tacho signal the monitoring of the speed of the fan is supported. It also supports to regulate the speed of fans with PWM input. The auxiliary device for this driver is instantiated by the cp500 misc driver. Signed-off-by: Gerhard Engleder Link: https://lore.kernel.org/r/20250425194823.54664-1-gerhard@engleder-embedded.com [groeck: Added various missing "break;" statements] Signed-off-by: Guenter Roeck --- Documentation/hwmon/index.rst | 1 + Documentation/hwmon/kfan.rst | 39 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) create mode 100644 Documentation/hwmon/kfan.rst (limited to 'Documentation') diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index 946b8a266d89..983aa0233e4a 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -107,6 +107,7 @@ Hardware Monitoring Kernel Drivers k10temp k8temp kbatt + kfan lan966x lineage-pem lm25066 diff --git a/Documentation/hwmon/kfan.rst b/Documentation/hwmon/kfan.rst new file mode 100644 index 000000000000..ce02dddfb4b8 --- /dev/null +++ b/Documentation/hwmon/kfan.rst @@ -0,0 +1,39 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Kernel driver kfan +================== + +Supported chips: + + * KEBA fan controller (IP core in FPGA) + + Prefix: 'kfan' + +Authors: + + Gerhard Engleder + Petar Bojanic + +Description +----------- + +The KEBA fan controller is an IP core for FPGAs, which monitors the health +and controls the speed of a fan. The fan is typically used to cool the CPU +and the whole device. E.g., the CP500 FPGA includes this IP core to monitor +and control the fan of PLCs and the corresponding cp500 driver creates an +auxiliary device for the kfan driver. + +This driver provides information about the fan health to user space. +The user space shall be informed if the fan is removed or blocked. +Additionally, the speed in RPM is reported for fans with tacho signal. + +For fan control PWM is supported. For PWM 255 equals 100%. None-regulable +fans can be turned on with PWM 255 and turned off with PWM 0. + +====================== ==== =================================================== +Attribute R/W Contents +====================== ==== =================================================== +fan1_fault R Fan fault +fan1_input R Fan tachometer input (in RPM) +pwm1 RW Fan target duty cycle (0..255) +====================== ==== =================================================== -- cgit v1.2.3 From 6b466efc6365e904b4b7eb65218a5b2969f978e2 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Wed, 7 May 2025 18:35:50 +0100 Subject: dt-bindings: net: renesas-gbeth: Add support for RZ/V2N (R9A09G056) SoC Document support for the GBETH IP found on the Renesas RZ/V2N (R9A09G056) SoC. The GBETH controller on the RZ/V2N SoC is functionally identical to the one found on the RZ/V2H(P) (R9A09G057) SoC, so `renesas,rzv2h-gbeth` will be used as a fallback compatible. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Link: https://patch.msgid.link/20250507173551.100280-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml b/Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml index 02a6793c26f5..c498a9999289 100644 --- a/Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml +++ b/Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml @@ -14,6 +14,7 @@ select: compatible: contains: enum: + - renesas,r9a09g056-gbeth - renesas,r9a09g057-gbeth - renesas,rzv2h-gbeth required: @@ -23,6 +24,7 @@ properties: compatible: items: - enum: + - renesas,r9a09g056-gbeth # RZ/V2N - renesas,r9a09g057-gbeth # RZ/V2H(P) - const: renesas,rzv2h-gbeth - const: snps,dwmac-5.20 -- cgit v1.2.3 From a29a72866616ef670c4b050419c6753ca6b0245c Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Fri, 9 May 2025 14:04:30 +0200 Subject: dt-bindings: vertexcom-mse102x: Fix IRQ type in example According to the MSE102x documentation the trigger type is a high level. Signed-off-by: Stefan Wahren Reviewed-by: Andrew Lunn Acked-by: Conor Dooley Link: https://patch.msgid.link/20250509120435.43646-2-wahrenst@gmx.net Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml b/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml index 4158673f723c..8359de7ad272 100644 --- a/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml +++ b/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml @@ -63,7 +63,7 @@ examples: compatible = "vertexcom,mse1021"; reg = <0>; interrupt-parent = <&gpio>; - interrupts = <23 IRQ_TYPE_EDGE_RISING>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH>; spi-cpha; spi-cpol; spi-max-frequency = <7142857>; -- cgit v1.2.3 From 73349697fd997cce9c2f04f35fbcc3544b643a89 Mon Sep 17 00:00:00 2001 From: Randy Dunlap Date: Thu, 1 May 2025 18:51:36 -0700 Subject: scsi: docs: Clean up some style in scsi_mid_low_api Capitalize Linux but not "kernel." Spell out Linux instead of using "lk". Hyphenate "system-wide." Hyphenate "32-bit". End a sentence with a period (full stop). Change "double linked" to "doubly linked" list. Use SCSI or scsi but not Scsi. Signed-off-by: Randy Dunlap Link: https://lore.kernel.org/r/20250502015136.683691-1-rdunlap@infradead.org Cc: James E.J. Bottomley Cc: Martin K. Petersen Cc: linux-scsi@vger.kernel.org Cc: Jonathan Corbet Cc: linux-doc@vger.kernel.org Signed-off-by: Martin K. Petersen --- Documentation/scsi/scsi_mid_low_api.rst | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'Documentation') diff --git a/Documentation/scsi/scsi_mid_low_api.rst b/Documentation/scsi/scsi_mid_low_api.rst index 3cd6dce98e74..3ac4c7fafb55 100644 --- a/Documentation/scsi/scsi_mid_low_api.rst +++ b/Documentation/scsi/scsi_mid_low_api.rst @@ -37,7 +37,7 @@ ISA adapters).] The SCSI mid level isolates an LLD from other layers such as the SCSI upper layer drivers and the block layer. -This version of the document roughly matches linux kernel version 2.6.8 . +This version of the document roughly matches Linux kernel version 2.6.8 . Documentation ============= @@ -48,7 +48,7 @@ found in that directory. A more recent copy of this document may be found at https://docs.kernel.org/scsi/scsi_mid_low_api.html. Many LLDs are documented in Documentation/scsi (e.g. aic7xxx.rst). The SCSI mid-level is briefly described in scsi.rst which contains a URL to a document describing -the SCSI subsystem in the Linux Kernel 2.4 series. Two upper level +the SCSI subsystem in the Linux kernel 2.4 series. Two upper level drivers have documents in that directory: st.rst (SCSI tape driver) and scsi-generic.rst (for the sg driver). @@ -75,7 +75,7 @@ It is probably best to study how existing LLDs are organized. As the 2.5 series development kernels evolve into the 2.6 series production series, changes are being introduced into this interface. An example of this is driver initialization code where there are now 2 models -available. The older one, similar to what was found in the lk 2.4 series, +available. The older one, similar to what was found in the Linux 2.4 series, is based on hosts that are detected at HBA driver load time. This will be referred to the "passive" initialization model. The newer model allows HBAs to be hot plugged (and unplugged) during the lifetime of the LLD and will @@ -1026,7 +1026,7 @@ initialized from the driver's struct scsi_host_template instance. Members of interest: host_no - - system wide unique number that is used for identifying + - system-wide unique number that is used for identifying this host. Issued in ascending order from 0. can_queue - must be greater than 0; do not send more than can_queue @@ -1053,7 +1053,7 @@ of interest: - pointer to driver's struct scsi_host_template from which this struct Scsi_Host instance was spawned hostt->proc_name - - name of LLD. This is the driver name that sysfs uses + - name of LLD. This is the driver name that sysfs uses. transportt - pointer to driver's struct scsi_transport_template instance (if any). FC and SPI transports currently supported. @@ -1067,7 +1067,7 @@ The scsi_host structure is defined in include/scsi/scsi_host.h struct scsi_device ------------------ Generally, there is one instance of this structure for each SCSI logical unit -on a host. Scsi devices connected to a host are uniquely identified by a +on a host. SCSI devices connected to a host are uniquely identified by a channel number, target id and logical unit number (lun). The structure is defined in include/scsi/scsi_device.h @@ -1091,7 +1091,7 @@ Members of interest: - should be set by LLD prior to calling 'done'. A value of 0 implies a successfully completed command (and all data (if any) has been transferred to or from the SCSI - target device). 'result' is a 32 bit unsigned integer that + target device). 'result' is a 32-bit unsigned integer that can be viewed as 2 related bytes. The SCSI status value is in the LSB. See include/scsi/scsi.h status_byte() and host_byte() macros and related constants. @@ -1180,8 +1180,8 @@ may get out of synchronization. This is why it is best for the LLD to perform autosense. -Changes since lk 2.4 series -=========================== +Changes since Linux kernel 2.4 series +===================================== io_request_lock has been replaced by several finer grained locks. The lock relevant to LLDs is struct Scsi_Host::host_lock and there is one per SCSI host. -- cgit v1.2.3 From b3b95a3594530643972220a70d738db96544be45 Mon Sep 17 00:00:00 2001 From: SeongJae Park Date: Sun, 20 Apr 2025 12:40:27 -0700 Subject: Docs/mm/damon/design: document node_mem_{used,free}_bp Add description of DAMOS quota goal metrics for NUMA node utilization on the DAMON deesign document. Link: https://lkml.kernel.org/r/20250420194030.75838-5-sj@kernel.org Signed-off-by: SeongJae Park Cc: Jonathan Corbet Cc: Yunjeong Mun Signed-off-by: Andrew Morton --- Documentation/mm/damon/design.rst | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/mm/damon/design.rst b/Documentation/mm/damon/design.rst index f12d33749329..728bf5754343 100644 --- a/Documentation/mm/damon/design.rst +++ b/Documentation/mm/damon/design.rst @@ -550,10 +550,10 @@ aggressiveness (the quota) of the corresponding scheme. For example, if DAMOS is under achieving the goal, DAMOS automatically increases the quota. If DAMOS is over achieving the goal, it decreases the quota. -The goal can be specified with three parameters, namely ``target_metric``, -``target_value``, and ``current_value``. The auto-tuning mechanism tries to -make ``current_value`` of ``target_metric`` be same to ``target_value``. -Currently, two ``target_metric`` are provided. +The goal can be specified with four parameters, namely ``target_metric``, +``target_value``, ``current_value`` and ``nid``. The auto-tuning mechanism +tries to make ``current_value`` of ``target_metric`` be same to +``target_value``. - ``user_input``: User-provided value. Users could use any metric that they has interest in for the value. Use space main workload's latency or @@ -565,6 +565,11 @@ Currently, two ``target_metric`` are provided. in microseconds that measured from last quota reset to next quota reset. DAMOS does the measurement on its own, so only ``target_value`` need to be set by users at the initial time. In other words, DAMOS does self-feedback. +- ``node_mem_used_bp``: Specific NUMA node's used memory ratio in bp (1/10,000). +- ``node_mem_free_bp``: Specific NUMA node's free memory ratio in bp (1/10,000). + +``nid`` is optionally required for only ``node_mem_used_bp`` and +``node_mem_free_bp`` to point the specific NUMA node. To know how user-space can set the tuning goal metric, the target value, and/or the current value via :ref:`DAMON sysfs interface `, refer to -- cgit v1.2.3 From a7bb1e754559dc1de14c1927c39c5295ab363e01 Mon Sep 17 00:00:00 2001 From: SeongJae Park Date: Sun, 20 Apr 2025 12:40:28 -0700 Subject: Docs/admin-guide/mm/damon/usage: document 'nid' file Add description of 'nid' file, which is optionally used for specific DAMOS quota goal metrics such as node_mem_{used,free}_bp on DAMON usage document. Link: https://lkml.kernel.org/r/20250420194030.75838-6-sj@kernel.org Signed-off-by: SeongJae Park Cc: Jonathan Corbet Cc: Yunjeong Mun Signed-off-by: Andrew Morton --- Documentation/admin-guide/mm/damon/usage.rst | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/mm/damon/usage.rst b/Documentation/admin-guide/mm/damon/usage.rst index ced2013db3df..d960aba72b82 100644 --- a/Documentation/admin-guide/mm/damon/usage.rst +++ b/Documentation/admin-guide/mm/damon/usage.rst @@ -81,7 +81,7 @@ comma (","). │ │ │ │ │ │ │ :ref:`quotas `/ms,bytes,reset_interval_ms,effective_bytes │ │ │ │ │ │ │ │ weights/sz_permil,nr_accesses_permil,age_permil │ │ │ │ │ │ │ │ :ref:`goals `/nr_goals - │ │ │ │ │ │ │ │ │ 0/target_metric,target_value,current_value + │ │ │ │ │ │ │ │ │ 0/target_metric,target_value,current_value,nid │ │ │ │ │ │ │ :ref:`watermarks `/metric,interval_us,high,mid,low │ │ │ │ │ │ │ :ref:`{core_,ops_,}filters `/nr_filters │ │ │ │ │ │ │ │ 0/type,matching,allow,memcg_path,addr_start,addr_end,target_idx,min,max @@ -390,11 +390,11 @@ number (``N``) to the file creates the number of child directories named ``0`` to ``N-1``. Each directory represents each goal and current achievement. Among the multiple feedback, the best one is used. -Each goal directory contains three files, namely ``target_metric``, -``target_value`` and ``current_value``. Users can set and get the three -parameters for the quota auto-tuning goals that specified on the :ref:`design -doc ` by writing to and reading from each -of the files. Note that users should further write +Each goal directory contains four files, namely ``target_metric``, +``target_value``, ``current_value`` and ``nid``. Users can set and get the +four parameters for the quota auto-tuning goals that specified on the +:ref:`design doc ` by writing to and +reading from each of the files. Note that users should further write ``commit_schemes_quota_goals`` to the ``state`` file of the :ref:`kdamond directory ` to pass the feedback to DAMON. -- cgit v1.2.3 From f77cb462261bfe55fb0ae33eb911e3cad7694880 Mon Sep 17 00:00:00 2001 From: SeongJae Park Date: Sun, 20 Apr 2025 12:40:29 -0700 Subject: Docs/ABI/damon: document nid file Add a description of 'nid' file, which is optionally used for specific DAMOS quota goal metrics such as node_mem_{used,free}_bp on the DAMON sysfs ABI document. Link: https://lkml.kernel.org/r/20250420194030.75838-7-sj@kernel.org Signed-off-by: SeongJae Park Cc: Jonathan Corbet Cc: Yunjeong Mun Signed-off-by: Andrew Morton --- Documentation/ABI/testing/sysfs-kernel-mm-damon | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-kernel-mm-damon b/Documentation/ABI/testing/sysfs-kernel-mm-damon index 293197f180ad..5697ab154c1f 100644 --- a/Documentation/ABI/testing/sysfs-kernel-mm-damon +++ b/Documentation/ABI/testing/sysfs-kernel-mm-damon @@ -283,6 +283,12 @@ Contact: SeongJae Park Description: Writing to and reading from this file sets and gets the current value of the goal metric. +What: /sys/kernel/mm/damon/admin/kdamonds//contexts//schemes//quotas/goals//nid +Date: Apr 2025 +Contact: SeongJae Park +Description: Writing to and reading from this file sets and gets the nid + parameter of the goal. + What: /sys/kernel/mm/damon/admin/kdamonds//contexts//schemes//quotas/weights/sz_permil Date: Mar 2022 Contact: SeongJae Park -- cgit v1.2.3 From 786d5cc2b92ac331d0654452c6c3cea611772e09 Mon Sep 17 00:00:00 2001 From: "Christoph Lameter (Ampere)" Date: Mon, 21 Apr 2025 13:58:06 -0700 Subject: Update Christoph's Email address and make it consistent Use cl@gentwo.org throughout and remove the old email addresses. Link: https://lkml.kernel.org/r/8b962f57-4d98-cbb0-cd82-b6ba456733e8@gentwo.org Signed-off-by: Christoph Lameter Signed-off-by: Andrew Morton --- Documentation/ABI/testing/sysfs-kernel-slab | 96 ++++++++++++------------- Documentation/admin-guide/cgroup-v1/cgroups.rst | 2 +- Documentation/admin-guide/cgroup-v1/cpusets.rst | 2 +- Documentation/networking/arcnet-hardware.rst | 2 +- 4 files changed, 51 insertions(+), 51 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-kernel-slab b/Documentation/ABI/testing/sysfs-kernel-slab index cd5fb8fa3ddf..658999be5164 100644 --- a/Documentation/ABI/testing/sysfs-kernel-slab +++ b/Documentation/ABI/testing/sysfs-kernel-slab @@ -2,7 +2,7 @@ What: /sys/kernel/slab Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The /sys/kernel/slab directory contains a snapshot of the internal state of the SLUB allocator for each cache. Certain @@ -14,7 +14,7 @@ What: /sys/kernel/slab//aliases Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The aliases file is read-only and specifies how many caches have merged into this cache. @@ -23,7 +23,7 @@ What: /sys/kernel/slab//align Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The align file is read-only and specifies the cache's object alignment in bytes. @@ -32,7 +32,7 @@ What: /sys/kernel/slab//alloc_calls Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The alloc_calls file is read-only and lists the kernel code locations from which allocations for this cache were performed. @@ -43,7 +43,7 @@ What: /sys/kernel/slab//alloc_fastpath Date: February 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The alloc_fastpath file shows how many objects have been allocated using the fast path. It can be written to clear the @@ -54,7 +54,7 @@ What: /sys/kernel/slab//alloc_from_partial Date: February 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The alloc_from_partial file shows how many times a cpu slab has been full and it has been refilled by using a slab from the list @@ -66,7 +66,7 @@ What: /sys/kernel/slab//alloc_refill Date: February 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The alloc_refill file shows how many times the per-cpu freelist was empty but there were objects available as the result of @@ -77,7 +77,7 @@ What: /sys/kernel/slab//alloc_slab Date: February 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The alloc_slab file is shows how many times a new slab had to be allocated from the page allocator. It can be written to @@ -88,7 +88,7 @@ What: /sys/kernel/slab//alloc_slowpath Date: February 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The alloc_slowpath file shows how many objects have been allocated using the slow path because of a refill or @@ -100,7 +100,7 @@ What: /sys/kernel/slab//cache_dma Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The cache_dma file is read-only and specifies whether objects are from ZONE_DMA. @@ -110,7 +110,7 @@ What: /sys/kernel/slab//cpu_slabs Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The cpu_slabs file is read-only and displays how many cpu slabs are active and their NUMA locality. @@ -119,7 +119,7 @@ What: /sys/kernel/slab//cpuslab_flush Date: April 2009 KernelVersion: 2.6.31 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The file cpuslab_flush shows how many times a cache's cpu slabs have been flushed as the result of destroying or shrinking a @@ -132,7 +132,7 @@ What: /sys/kernel/slab//ctor Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The ctor file is read-only and specifies the cache's object constructor function, which is invoked for each object when a @@ -142,7 +142,7 @@ What: /sys/kernel/slab//deactivate_empty Date: February 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The deactivate_empty file shows how many times an empty cpu slab was deactivated. It can be written to clear the current count. @@ -152,7 +152,7 @@ What: /sys/kernel/slab//deactivate_full Date: February 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The deactivate_full file shows how many times a full cpu slab was deactivated. It can be written to clear the current count. @@ -162,7 +162,7 @@ What: /sys/kernel/slab//deactivate_remote_frees Date: February 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The deactivate_remote_frees file shows how many times a cpu slab has been deactivated and contained free objects that were freed @@ -173,7 +173,7 @@ What: /sys/kernel/slab//deactivate_to_head Date: February 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The deactivate_to_head file shows how many times a partial cpu slab was deactivated and added to the head of its node's partial @@ -184,7 +184,7 @@ What: /sys/kernel/slab//deactivate_to_tail Date: February 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The deactivate_to_tail file shows how many times a partial cpu slab was deactivated and added to the tail of its node's partial @@ -195,7 +195,7 @@ What: /sys/kernel/slab//destroy_by_rcu Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The destroy_by_rcu file is read-only and specifies whether slabs (not objects) are freed by rcu. @@ -204,7 +204,7 @@ What: /sys/kernel/slab//free_add_partial Date: February 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The free_add_partial file shows how many times an object has been freed in a full slab so that it had to added to its node's @@ -215,7 +215,7 @@ What: /sys/kernel/slab//free_calls Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The free_calls file is read-only and lists the locations of object frees if slab debugging is enabled (see @@ -225,7 +225,7 @@ What: /sys/kernel/slab//free_fastpath Date: February 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The free_fastpath file shows how many objects have been freed using the fast path because it was an object from the cpu slab. @@ -236,7 +236,7 @@ What: /sys/kernel/slab//free_frozen Date: February 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The free_frozen file shows how many objects have been freed to a frozen slab (i.e. a remote cpu slab). It can be written to @@ -247,7 +247,7 @@ What: /sys/kernel/slab//free_remove_partial Date: February 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The free_remove_partial file shows how many times an object has been freed to a now-empty slab so that it had to be removed from @@ -259,7 +259,7 @@ What: /sys/kernel/slab//free_slab Date: February 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The free_slab file shows how many times an empty slab has been freed back to the page allocator. It can be written to clear @@ -270,7 +270,7 @@ What: /sys/kernel/slab//free_slowpath Date: February 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The free_slowpath file shows how many objects have been freed using the slow path (i.e. to a full or partial slab). It can @@ -281,7 +281,7 @@ What: /sys/kernel/slab//hwcache_align Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The hwcache_align file is read-only and specifies whether objects are aligned on cachelines. @@ -301,7 +301,7 @@ What: /sys/kernel/slab//object_size Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The object_size file is read-only and specifies the cache's object size. @@ -310,7 +310,7 @@ What: /sys/kernel/slab//objects Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The objects file is read-only and displays how many objects are active and from which nodes they are from. @@ -319,7 +319,7 @@ What: /sys/kernel/slab//objects_partial Date: April 2008 KernelVersion: 2.6.26 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The objects_partial file is read-only and displays how many objects are on partial slabs and from which nodes they are @@ -329,7 +329,7 @@ What: /sys/kernel/slab//objs_per_slab Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The file objs_per_slab is read-only and specifies how many objects may be allocated from a single slab of the order @@ -339,7 +339,7 @@ What: /sys/kernel/slab//order Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The order file specifies the page order at which new slabs are allocated. It is writable and can be changed to increase the @@ -356,7 +356,7 @@ What: /sys/kernel/slab//order_fallback Date: April 2008 KernelVersion: 2.6.26 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The order_fallback file shows how many times an allocation of a new slab has not been possible at the cache's order and instead @@ -369,7 +369,7 @@ What: /sys/kernel/slab//partial Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The partial file is read-only and displays how long many partial slabs there are and how long each node's list is. @@ -378,7 +378,7 @@ What: /sys/kernel/slab//poison Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The poison file specifies whether objects should be poisoned when a new slab is allocated. @@ -387,7 +387,7 @@ What: /sys/kernel/slab//reclaim_account Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The reclaim_account file specifies whether the cache's objects are reclaimable (and grouped by their mobility). @@ -396,7 +396,7 @@ What: /sys/kernel/slab//red_zone Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The red_zone file specifies whether the cache's objects are red zoned. @@ -405,7 +405,7 @@ What: /sys/kernel/slab//remote_node_defrag_ratio Date: January 2008 KernelVersion: 2.6.25 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The file remote_node_defrag_ratio specifies the percentage of times SLUB will attempt to refill the cpu slab with a partial @@ -419,7 +419,7 @@ What: /sys/kernel/slab//sanity_checks Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The sanity_checks file specifies whether expensive checks should be performed on free and, at minimum, enables double free @@ -430,7 +430,7 @@ What: /sys/kernel/slab//shrink Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The shrink file is used to reclaim unused slab cache memory from a cache. Empty per-cpu or partial slabs @@ -446,7 +446,7 @@ What: /sys/kernel/slab//slab_size Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The slab_size file is read-only and specifies the object size with metadata (debugging information and alignment) in bytes. @@ -455,7 +455,7 @@ What: /sys/kernel/slab//slabs Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The slabs file is read-only and displays how long many slabs there are (both cpu and partial) and from which nodes they are @@ -465,7 +465,7 @@ What: /sys/kernel/slab//store_user Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The store_user file specifies whether the location of allocation or free should be tracked for a cache. @@ -474,7 +474,7 @@ What: /sys/kernel/slab//total_objects Date: April 2008 KernelVersion: 2.6.26 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The total_objects file is read-only and displays how many total objects a cache has and from which nodes they are from. @@ -483,7 +483,7 @@ What: /sys/kernel/slab//trace Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: The trace file specifies whether object allocations and frees should be traced. @@ -492,7 +492,7 @@ What: /sys/kernel/slab//validate Date: May 2007 KernelVersion: 2.6.22 Contact: Pekka Enberg , - Christoph Lameter + Christoph Lameter Description: Writing to the validate file causes SLUB to traverse all of its cache's objects and check the validity of metadata. @@ -506,14 +506,14 @@ Description: What: /sys/kernel/slab//slabs_cpu_partial Date: Aug 2011 -Contact: Christoph Lameter +Contact: Christoph Lameter Description: This read-only file shows the number of partialli allocated frozen slabs. What: /sys/kernel/slab//cpu_partial Date: Aug 2011 -Contact: Christoph Lameter +Contact: Christoph Lameter Description: This read-only file shows the number of per cpu partial pages to keep around. diff --git a/Documentation/admin-guide/cgroup-v1/cgroups.rst b/Documentation/admin-guide/cgroup-v1/cgroups.rst index a3e2edb3d274..463f98453323 100644 --- a/Documentation/admin-guide/cgroup-v1/cgroups.rst +++ b/Documentation/admin-guide/cgroup-v1/cgroups.rst @@ -13,7 +13,7 @@ Portions Copyright (c) 2004-2006 Silicon Graphics, Inc. Modified by Paul Jackson -Modified by Christoph Lameter +Modified by Christoph Lameter .. CONTENTS: diff --git a/Documentation/admin-guide/cgroup-v1/cpusets.rst b/Documentation/admin-guide/cgroup-v1/cpusets.rst index f401af5e2f09..c7909e5ac136 100644 --- a/Documentation/admin-guide/cgroup-v1/cpusets.rst +++ b/Documentation/admin-guide/cgroup-v1/cpusets.rst @@ -10,7 +10,7 @@ Written by Simon.Derr@bull.net - Portions Copyright (c) 2004-2006 Silicon Graphics, Inc. - Modified by Paul Jackson -- Modified by Christoph Lameter +- Modified by Christoph Lameter - Modified by Paul Menage - Modified by Hidetoshi Seto diff --git a/Documentation/networking/arcnet-hardware.rst b/Documentation/networking/arcnet-hardware.rst index 982215723582..3bf7f99cd7bb 100644 --- a/Documentation/networking/arcnet-hardware.rst +++ b/Documentation/networking/arcnet-hardware.rst @@ -3152,7 +3152,7 @@ Tiara (model unknown) --------------- - - from Christoph Lameter + - from Christoph Lameter Here is information about my card as far as I could figure it out:: -- cgit v1.2.3 From 7d709f49babc28907b0ac60228f522d2e6216add Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Thu, 24 Apr 2025 16:28:06 -0400 Subject: vmscan,cgroup: apply mems_effective to reclaim MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It is possible for a reclaimer to cause demotions of an lruvec belonging to a cgroup with cpuset.mems set to exclude some nodes. Attempt to apply this limitation based on the lruvec's memcg and prevent demotion. Notably, this may still allow demotion of shared libraries or any memory first instantiated in another cgroup. This means cpusets still cannot cannot guarantee complete isolation when demotion is enabled, and the docs have been updated to reflect this. This is useful for isolating workloads on a multi-tenant system from certain classes of memory more consistently - with the noted exceptions. Note on locking: The cgroup_get_e_css reference protects the css->effective_mems, and calls of this interface would be subject to the same race conditions associated with a non-atomic access to cs->effective_mems. So while this interface cannot make strong guarantees of correctness, it can therefore avoid taking a global or rcu_read_lock for performance. Link: https://lkml.kernel.org/r/20250424202806.52632-3-gourry@gourry.net Signed-off-by: Gregory Price Suggested-by: Shakeel Butt Suggested-by: Waiman Long Acked-by: Tejun Heo Acked-by: Johannes Weiner Reviewed-by: Shakeel Butt Reviewed-by: Waiman Long Cc: Michal Hocko Cc: Michal Koutný Cc: Muchun Song Cc: Roman Gushchin Signed-off-by: Andrew Morton --- Documentation/ABI/testing/sysfs-kernel-mm-numa | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-kernel-mm-numa b/Documentation/ABI/testing/sysfs-kernel-mm-numa index 77e559d4ed80..90e375ff54cb 100644 --- a/Documentation/ABI/testing/sysfs-kernel-mm-numa +++ b/Documentation/ABI/testing/sysfs-kernel-mm-numa @@ -16,9 +16,13 @@ Description: Enable/disable demoting pages during reclaim Allowing page migration during reclaim enables these systems to migrate pages from fast tiers to slow tiers when the fast tier is under pressure. This migration - is performed before swap. It may move data to a NUMA - node that does not fall into the cpuset of the - allocating process which might be construed to violate - the guarantees of cpusets. This should not be enabled - on systems which need strict cpuset location - guarantees. + is performed before swap if an eligible numa node is + present in cpuset.mems for the cgroup (or if cpuset v1 + is being used). If cpusets.mems changes at runtime, it + may move data to a NUMA node that does not fall into the + cpuset of the new cpusets.mems, which might be construed + to violate the guarantees of cpusets. Shared memory, + such as libraries, owned by another cgroup may still be + demoted and result in memory use on a node not present + in cpusets.mem. This should not be enabled on systems + which need strict cpuset location guarantees. -- cgit v1.2.3 From c8e6002bd611c68dab892565039b60c7ad5b8d6a Mon Sep 17 00:00:00 2001 From: Shakeel Butt Date: Sat, 19 Apr 2025 11:35:45 -0700 Subject: memcg: introduce non-blocking limit setting option MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Setting the max and high limits can trigger synchronous reclaim and/or oom-kill if the usage is higher than the given limit. This behavior is fine for newly created cgroups but it can cause issues for the node controller while setting limits for existing cgroups. In our production multi-tenant and overcommitted environment, we are seeing priority inversion when the node controller dynamically adjusts the limits of running jobs of different priorities. Based on the system situation, the node controller may reduce the limits of lower priority jobs and increase the limits of higher priority jobs. However we are seeing node controller getting stuck for long period of time while reclaiming from lower priority jobs while setting their limits and also spends a lot of its own CPU. One of the workaround we are trying is to fork a new process which sets the limit of the lower priority job along with setting an alarm to get itself killed if it get stuck in the reclaim for lower priority job. However we are finding it very unreliable and costly. Either we need a good enough time buffer for the alarm to be delivered after setting limit and potentialy spend a lot of CPU in the reclaim or be unreliable in setting the limit for much shorter but cheaper (less reclaim) alarms. Let's introduce new limit setting option which does not trigger reclaim and/or oom-kill and let the processes in the target cgroup to trigger reclaim and/or throttling and/or oom-kill in their next charge request. This will make the node controller on multi-tenant overcommitted environment much more reliable. Explanation from Johannes on side-effects of O_NONBLOCK limit change: It's usually the allocating tasks inside the group bearing the cost of limit enforcement and reclaim. This allows a (privileged) updater from outside the group to keep that cost in there - instead of having to help, from a context that doesn't necessarily make sense. I suppose the tradeoff with that - and the reason why this was doing sync reclaim in the first place - is that, if the group is idle and not trying to allocate more, it can take indefinitely for the new limit to actually be met. It should be okay in most scenarios in practice. As the capacity is reallocated from group A to B, B will exert pressure on A once it tries to claim it and thereby shrink it down. If A is idle, that shouldn't be hard. If A is running, it's likely to fault/allocate soon-ish and then join the effort. It does leave a (malicious) corner case where A is just busy-hitting its memory to interfere with the clawback. This is comparable to reclaiming memory.low overage from the outside, though, which is an acceptable risk. Users of O_NONBLOCK just need to be aware. Link: https://lkml.kernel.org/r/20250419183545.1982187-1-shakeel.butt@linux.dev Signed-off-by: Shakeel Butt Acked-by: Roman Gushchin Acked-by: Johannes Weiner Acked-by: Michal Hocko Cc: Greg Thelen Cc: Michal Koutný Cc: Muchun Song Cc: Tejun Heo Cc: Christian Brauner Cc: Yosry Ahmed Signed-off-by: Andrew Morton --- Documentation/admin-guide/cgroup-v2.rst | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/cgroup-v2.rst b/Documentation/admin-guide/cgroup-v2.rst index 1a16ce68a4d7..b34f1dd969e0 100644 --- a/Documentation/admin-guide/cgroup-v2.rst +++ b/Documentation/admin-guide/cgroup-v2.rst @@ -1299,6 +1299,13 @@ PAGE_SIZE multiple when read back. monitors the limited cgroup to alleviate heavy reclaim pressure. + If memory.high is opened with O_NONBLOCK then the synchronous + reclaim is bypassed. This is useful for admin processes that + need to dynamically adjust the job's memory limits without + expending their own CPU resources on memory reclamation. The + job will trigger the reclaim and/or get throttled on its + next charge request. + memory.max A read-write single value file which exists on non-root cgroups. The default is "max". @@ -1316,6 +1323,13 @@ PAGE_SIZE multiple when read back. Caller could retry them differently, return into userspace as -ENOMEM or silently ignore in cases like disk readahead. + If memory.max is opened with O_NONBLOCK, then the synchronous + reclaim and oom-kill are bypassed. This is useful for admin + processes that need to dynamically adjust the job's memory limits + without expending their own CPU resources on memory reclamation. + The job will trigger the reclaim and/or oom-kill on its next + charge request. + memory.reclaim A write-only nested-keyed file which exists for all cgroups. -- cgit v1.2.3 From c6c895cf2d323373a66d61c6acc331431de2ae5a Mon Sep 17 00:00:00 2001 From: Shakeel Butt Date: Tue, 6 May 2025 16:28:33 -0700 Subject: memcg-introduce-non-blocking-limit-setting-option-v3 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit add more explanation in doc and commit message on O_NONBLOCK side-effects (Johannes) Link: https://lkml.kernel.org/r/20250506232833.3109790-1-shakeel.butt@linux.dev Signed-off-by: Shakeel Butt Acked-by: Roman Gushchin Acked-by: Johannes Weiner Cc: Greg Thelen Cc: Michal Hocko Cc: Michal Koutný Cc: Muchun Song Cc: Tejun Heo Cc: Yosry Ahmed Cc: Christian Brauner Signed-off-by: Andrew Morton --- Documentation/admin-guide/cgroup-v2.rst | 34 +++++++++++++++++++++------------ 1 file changed, 22 insertions(+), 12 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/cgroup-v2.rst b/Documentation/admin-guide/cgroup-v2.rst index b34f1dd969e0..d537f3d3fed9 100644 --- a/Documentation/admin-guide/cgroup-v2.rst +++ b/Documentation/admin-guide/cgroup-v2.rst @@ -1299,12 +1299,17 @@ PAGE_SIZE multiple when read back. monitors the limited cgroup to alleviate heavy reclaim pressure. - If memory.high is opened with O_NONBLOCK then the synchronous - reclaim is bypassed. This is useful for admin processes that - need to dynamically adjust the job's memory limits without - expending their own CPU resources on memory reclamation. The - job will trigger the reclaim and/or get throttled on its - next charge request. + If memory.high is opened with O_NONBLOCK then the synchronous + reclaim is bypassed. This is useful for admin processes that + need to dynamically adjust the job's memory limits without + expending their own CPU resources on memory reclamation. The + job will trigger the reclaim and/or get throttled on its + next charge request. + + Please note that with O_NONBLOCK, there is a chance that the + target memory cgroup may take indefinite amount of time to + reduce usage below the limit due to delayed charge request or + busy-hitting its memory to slow down reclaim. memory.max A read-write single value file which exists on non-root @@ -1323,12 +1328,17 @@ PAGE_SIZE multiple when read back. Caller could retry them differently, return into userspace as -ENOMEM or silently ignore in cases like disk readahead. - If memory.max is opened with O_NONBLOCK, then the synchronous - reclaim and oom-kill are bypassed. This is useful for admin - processes that need to dynamically adjust the job's memory limits - without expending their own CPU resources on memory reclamation. - The job will trigger the reclaim and/or oom-kill on its next - charge request. + If memory.max is opened with O_NONBLOCK, then the synchronous + reclaim and oom-kill are bypassed. This is useful for admin + processes that need to dynamically adjust the job's memory limits + without expending their own CPU resources on memory reclamation. + The job will trigger the reclaim and/or oom-kill on its next + charge request. + + Please note that with O_NONBLOCK, there is a chance that the + target memory cgroup may take indefinite amount of time to + reduce usage below the limit due to delayed charge request or + busy-hitting its memory to slow down reclaim. memory.reclaim A write-only nested-keyed file which exists for all cgroups. -- cgit v1.2.3 From 68a1436bde00b40327efe27926076b53088775a3 Mon Sep 17 00:00:00 2001 From: Zhongkun He Date: Mon, 21 Apr 2025 17:13:28 +0800 Subject: mm: add swappiness=max arg to memory.reclaim for only anon reclaim Patch series "add max arg to swappiness in memory.reclaim and lru_gen", v4. This patchset adds max arg to swappiness in memory.reclaim and lru_gen for anon only proactive memory reclaim. With commit <68cd9050d871> ("mm: add swappiness= arg to memory.reclaim") we can submit an additional swappiness= argument to memory.reclaim. It is very useful because we can dynamically adjust the reclamation ratio based on the anonymous folios and file folios of each cgroup. For example,when swappiness is set to 0, we only reclaim from file folios. But we can not relciam memory just from anon folios. This patchset introduces a new macro, SWAPPINESS_ANON_ONLY, defined as MAX_SWAPPINESS + 1, represent the max arg semantics. It specifically indicates that reclamation should occur only from anonymous pages. Patch 1 adds swappiness=max arg to memory.reclaim suggested-by: Yosry Ahmed Patch 2 add more comments for cache_trim_mode from Johannes Weiner in [1]. Patch 3 add max arg to lru_gen for proactive memory reclaim in MGLRU. The MGLRU already supports reclaiming exclusively from anonymous pages. This patch formalizes that behavior by introducing a max parameter to represent the corresponding semantics. Patch 4 using SWAPPINESS_ANON_ONLY in MGLRU Using SWAPPINESS_ANON_ONLY instead of MAX_SWAPPINESS + 1 to indicate reclaiming only from anonymous pages makes the code more readable and explicit Here is the previous discussion: https://lore.kernel.org/all/20250314033350.1156370-1-hezhongkun.hzk@bytedance.com/ https://lore.kernel.org/all/20250312094337.2296278-1-hezhongkun.hzk@bytedance.com/ https://lore.kernel.org/all/20250318135330.3358345-1-hezhongkun.hzk@bytedance.com/ This patch (of 4): With commit <68cd9050d871> ("mm: add swappiness= arg to memory.reclaim") we can submit an additional swappiness= argument to memory.reclaim. It is very useful because we can dynamically adjust the reclamation ratio based on the anonymous folios and file folios of each cgroup. For example,when swappiness is set to 0, we only reclaim from file folios. However,we have also encountered a new issue: when swappiness is set to the MAX_SWAPPINESS, it may still only reclaim file folios. So, we hope to add a new arg 'swappiness=max' in memory.reclaim where proactive memory reclaim only reclaims from anonymous folios when swappiness is set to max. The swappiness semantics from a user perspective remain unchanged. For example, something like this: echo "2M swappiness=max" > /sys/fs/cgroup/memory.reclaim will perform reclaim on the rootcg with a swappiness setting of 'max' (a new mode) regardless of the file folios. Users have a more comprehensive view of the application's memory distribution because there are many metrics available. For example, if we find that a certain cgroup has a large number of inactive anon folios, we can reclaim only those and skip file folios, because with the zram/zswap, the IO tradeoff that cache_trim_mode or other file first logic is making doesn't hold - file refaults will cause IO, whereas anon decompression will not. With this patch, the swappiness argument of memory.reclaim has a new mode 'max', means reclaiming just from anonymous folios both in traditional LRU and MGLRU. Link: https://lkml.kernel.org/r/cover.1745225696.git.hezhongkun.hzk@bytedance.com Link: https://lore.kernel.org/all/20250314141833.GA1316033@cmpxchg.org/ [1] Link: https://lkml.kernel.org/r/519e12b9b1f8c31a01e228c8b4b91a2419684f77.1745225696.git.hezhongkun.hzk@bytedance.com Signed-off-by: Zhongkun He Suggested-by: Yosry Ahmed Acked-by: Muchun Song Cc: Johannes Weiner Cc: Michal Hocko Cc: Yu Zhao Signed-off-by: Andrew Morton --- Documentation/admin-guide/cgroup-v2.rst | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/cgroup-v2.rst b/Documentation/admin-guide/cgroup-v2.rst index d537f3d3fed9..acf855851c03 100644 --- a/Documentation/admin-guide/cgroup-v2.rst +++ b/Documentation/admin-guide/cgroup-v2.rst @@ -1372,6 +1372,9 @@ The following nested keys are defined. same semantics as vm.swappiness applied to memcg reclaim with all the existing limitations and potential future extensions. + The valid range for swappiness is [0-200, max], setting + swappiness=max exclusively reclaims anonymous memory. + memory.peak A read-write single value file which exists on non-root cgroups. -- cgit v1.2.3 From b40599930f001b651cc3e1863e268dd35cbbf806 Mon Sep 17 00:00:00 2001 From: Zhongkun He Date: Mon, 21 Apr 2025 17:13:30 +0800 Subject: mm: add max swappiness arg to lru_gen for anonymous memory only The MGLRU already supports reclaiming only from anonymous memory via the /sys/kernel/debug/lru_gen interface. Now, memory.reclaim also supports the swappiness=max parameter to enable reclaiming solely from anonymous memory. To unify the semantics of proactive reclaiming from anonymous folios, the max parameter is introduced. [hezhongkun.hzk@bytedance.com: use strcmp instead of strncmp, if swappiness is not set, use the default value] Link: https://lkml.kernel.org/r/20250507071057.3184240-1-hezhongkun.hzk@bytedance.com [akpm@linux-foundation.org: tweak coding style] Link: https://lkml.kernel.org/r/65181f7745d657d664d833c26d8a94cae40538b9.1745225696.git.hezhongkun.hzk@bytedance.com Signed-off-by: Zhongkun He Acked-by: Muchun Song Cc: Johannes Weiner Cc: Michal Hocko Cc: Yosry Ahmed Cc: Yu Zhao Signed-off-by: Andrew Morton --- Documentation/admin-guide/mm/multigen_lru.rst | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/mm/multigen_lru.rst b/Documentation/admin-guide/mm/multigen_lru.rst index 33e068830497..9cb54b4ff5d9 100644 --- a/Documentation/admin-guide/mm/multigen_lru.rst +++ b/Documentation/admin-guide/mm/multigen_lru.rst @@ -151,8 +151,9 @@ generations less than or equal to ``min_gen_nr``. ``min_gen_nr`` should be less than ``max_gen_nr-1``, since ``max_gen_nr`` and ``max_gen_nr-1`` are not fully aged (equivalent to the active list) and therefore cannot be evicted. ``swappiness`` -overrides the default value in ``/proc/sys/vm/swappiness``. -``nr_to_reclaim`` limits the number of pages to evict. +overrides the default value in ``/proc/sys/vm/swappiness`` and the valid +range is [0-200, max], with max being exclusively used for the reclamation +of anonymous memory. ``nr_to_reclaim`` limits the number of pages to evict. A typical use case is that a job scheduler runs this command before it tries to land a new job on a server. If it fails to materialize enough -- cgit v1.2.3 From 3498209ff64ea72e7c15f96274427250f9ad9c97 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Fri, 9 May 2025 00:46:34 -0700 Subject: Documentation: add documentation for KHO With KHO in place, let's add documentation that describes what it is and how to use it. Link: https://lkml.kernel.org/r/20250509074635.3187114-17-changyuanl@google.com Signed-off-by: Alexander Graf Co-developed-by: Mike Rapoport (Microsoft) Signed-off-by: Mike Rapoport (Microsoft) Co-developed-by: Changyuan Lyu Signed-off-by: Changyuan Lyu Cc: Andy Lutomirski Cc: Anthony Yznaga Cc: Arnd Bergmann Cc: Ashish Kalra Cc: Ben Herrenschmidt Cc: Borislav Betkov Cc: Catalin Marinas Cc: Dave Hansen Cc: David Woodhouse Cc: Eric Biederman Cc: "H. Peter Anvin" Cc: Ingo Molnar Cc: James Gowans Cc: Jason Gunthorpe Cc: Jonathan Corbet Cc: Krzysztof Kozlowski Cc: Marc Rutland Cc: Paolo Bonzini Cc: Pasha Tatashin Cc: Peter Zijlstra Cc: Pratyush Yadav Cc: Rob Herring Cc: Saravana Kannan Cc: Stanislav Kinsburskii Cc: Steven Rostedt Cc: Thomas Gleinxer Cc: Thomas Lendacky Cc: Will Deacon Signed-off-by: Andrew Morton --- Documentation/admin-guide/kernel-parameters.txt | 25 +++++ Documentation/admin-guide/mm/index.rst | 1 + Documentation/admin-guide/mm/kho.rst | 115 +++++++++++++++++++++++ Documentation/core-api/index.rst | 1 + Documentation/core-api/kho/bindings/kho.yaml | 43 +++++++++ Documentation/core-api/kho/bindings/sub-fdt.yaml | 27 ++++++ Documentation/core-api/kho/concepts.rst | 74 +++++++++++++++ Documentation/core-api/kho/fdt.rst | 80 ++++++++++++++++ Documentation/core-api/kho/index.rst | 13 +++ 9 files changed, 379 insertions(+) create mode 100644 Documentation/admin-guide/mm/kho.rst create mode 100644 Documentation/core-api/kho/bindings/kho.yaml create mode 100644 Documentation/core-api/kho/bindings/sub-fdt.yaml create mode 100644 Documentation/core-api/kho/concepts.rst create mode 100644 Documentation/core-api/kho/fdt.rst create mode 100644 Documentation/core-api/kho/index.rst (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index d9fd26b95b34..54cb1d46e41f 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -2725,6 +2725,31 @@ kgdbwait [KGDB,EARLY] Stop kernel execution and enter the kernel debugger at the earliest opportunity. + kho= [KEXEC,EARLY] + Format: { "0" | "1" | "off" | "on" | "y" | "n" } + Enables or disables Kexec HandOver. + "0" | "off" | "n" - kexec handover is disabled + "1" | "on" | "y" - kexec handover is enabled + + kho_scratch= [KEXEC,EARLY] + Format: ll[KMG],mm[KMG],nn[KMG] | nn% + Defines the size of the KHO scratch region. The KHO + scratch regions are physically contiguous memory + ranges that can only be used for non-kernel + allocations. That way, even when memory is heavily + fragmented with handed over memory, the kexeced + kernel will always have enough contiguous ranges to + bootstrap itself. + + It is possible to specify the exact amount of + memory in the form of "ll[KMG],mm[KMG],nn[KMG]" + where the first parameter defines the size of a low + memory scratch area, the second parameter defines + the size of a global scratch area and the third + parameter defines the size of additional per-node + scratch areas. The form "nn%" defines scale factor + (in percents) of memory that was used during boot. + kmac= [MIPS] Korina ethernet MAC address. Configure the RouterBoard 532 series on-chip Ethernet adapter MAC address. diff --git a/Documentation/admin-guide/mm/index.rst b/Documentation/admin-guide/mm/index.rst index 8b35795b664b..2d2f6c222308 100644 --- a/Documentation/admin-guide/mm/index.rst +++ b/Documentation/admin-guide/mm/index.rst @@ -42,3 +42,4 @@ the Linux memory management. transhuge userfaultfd zswap + kho diff --git a/Documentation/admin-guide/mm/kho.rst b/Documentation/admin-guide/mm/kho.rst new file mode 100644 index 000000000000..6dc18ed4b886 --- /dev/null +++ b/Documentation/admin-guide/mm/kho.rst @@ -0,0 +1,115 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +==================== +Kexec Handover Usage +==================== + +Kexec HandOver (KHO) is a mechanism that allows Linux to preserve memory +regions, which could contain serialized system states, across kexec. + +This document expects that you are familiar with the base KHO +:ref:`concepts `. If you have not read +them yet, please do so now. + +Prerequisites +============= + +KHO is available when the kernel is compiled with ``CONFIG_KEXEC_HANDOVER`` +set to y. Every KHO producer may have its own config option that you +need to enable if you would like to preserve their respective state across +kexec. + +To use KHO, please boot the kernel with the ``kho=on`` command line +parameter. You may use ``kho_scratch`` parameter to define size of the +scratch regions. For example ``kho_scratch=16M,512M,256M`` will reserve a +16 MiB low memory scratch area, a 512 MiB global scratch region, and 256 MiB +per NUMA node scratch regions on boot. + +Perform a KHO kexec +=================== + +First, before you perform a KHO kexec, you need to move the system into +the :ref:`KHO finalization phase ` :: + + $ echo 1 > /sys/kernel/debug/kho/out/finalize + +After this command, the KHO FDT is available in +``/sys/kernel/debug/kho/out/fdt``. Other subsystems may also register +their own preserved sub FDTs under +``/sys/kernel/debug/kho/out/sub_fdts/``. + +Next, load the target payload and kexec into it. It is important that you +use the ``-s`` parameter to use the in-kernel kexec file loader, as user +space kexec tooling currently has no support for KHO with the user space +based file loader :: + + # kexec -l /path/to/bzImage --initrd /path/to/initrd -s + # kexec -e + +The new kernel will boot up and contain some of the previous kernel's state. + +For example, if you used ``reserve_mem`` command line parameter to create +an early memory reservation, the new kernel will have that memory at the +same physical address as the old kernel. + +Abort a KHO exec +================ + +You can move the system out of KHO finalization phase again by calling :: + + $ echo 0 > /sys/kernel/debug/kho/out/active + +After this command, the KHO FDT is no longer available in +``/sys/kernel/debug/kho/out/fdt``. + +debugfs Interfaces +================== + +Currently KHO creates the following debugfs interfaces. Notice that these +interfaces may change in the future. They will be moved to sysfs once KHO is +stabilized. + +``/sys/kernel/debug/kho/out/finalize`` + Kexec HandOver (KHO) allows Linux to transition the state of + compatible drivers into the next kexec'ed kernel. To do so, + device drivers will instruct KHO to preserve memory regions, + which could contain serialized kernel state. + While the state is serialized, they are unable to perform + any modifications to state that was serialized, such as + handed over memory allocations. + + When this file contains "1", the system is in the transition + state. When contains "0", it is not. To switch between the + two states, echo the respective number into this file. + +``/sys/kernel/debug/kho/out/fdt`` + When KHO state tree is finalized, the kernel exposes the + flattened device tree blob that carries its current KHO + state in this file. Kexec user space tooling can use this + as input file for the KHO payload image. + +``/sys/kernel/debug/kho/out/scratch_len`` + Lengths of KHO scratch regions, which are physically contiguous + memory regions that will always stay available for future kexec + allocations. Kexec user space tools can use this file to determine + where it should place its payload images. + +``/sys/kernel/debug/kho/out/scratch_phys`` + Physical locations of KHO scratch regions. Kexec user space tools + can use this file in conjunction to scratch_phys to determine where + it should place its payload images. + +``/sys/kernel/debug/kho/out/sub_fdts/`` + In the KHO finalization phase, KHO producers register their own + FDT blob under this directory. + +``/sys/kernel/debug/kho/in/fdt`` + When the kernel was booted with Kexec HandOver (KHO), + the state tree that carries metadata about the previous + kernel's state is in this file in the format of flattened + device tree. This file may disappear when all consumers of + it finished to interpret their metadata. + +``/sys/kernel/debug/kho/in/sub_fdts/`` + Similar to ``kho/out/sub_fdts/``, but contains sub FDT blobs + of KHO producers passed from the old kernel. diff --git a/Documentation/core-api/index.rst b/Documentation/core-api/index.rst index e9789bd381d8..7a4ca18ca6e2 100644 --- a/Documentation/core-api/index.rst +++ b/Documentation/core-api/index.rst @@ -115,6 +115,7 @@ more memory-management documentation in Documentation/mm/index.rst. pin_user_pages boot-time-mm gfp_mask-from-fs-io + kho/index Interfaces for kernel debugging =============================== diff --git a/Documentation/core-api/kho/bindings/kho.yaml b/Documentation/core-api/kho/bindings/kho.yaml new file mode 100644 index 000000000000..11e8ab7b219d --- /dev/null +++ b/Documentation/core-api/kho/bindings/kho.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +title: Kexec HandOver (KHO) root tree + +maintainers: + - Mike Rapoport + - Changyuan Lyu + +description: | + System memory preserved by KHO across kexec. + +properties: + compatible: + enum: + - kho-v1 + + preserved-memory-map: + description: | + physical address (u64) of an in-memory structure describing all preserved + folios and memory ranges. + +patternProperties: + "$[0-9a-f_]+^": + $ref: sub-fdt.yaml# + description: physical address of a KHO user's own FDT. + +required: + - compatible + - preserved-memory-map + +additionalProperties: false + +examples: + - | + kho { + compatible = "kho-v1"; + preserved-memory-map = <0xf0be16 0x1000000>; + + memblock { + fdt = <0x80cc16 0x1000000>; + }; + }; diff --git a/Documentation/core-api/kho/bindings/sub-fdt.yaml b/Documentation/core-api/kho/bindings/sub-fdt.yaml new file mode 100644 index 000000000000..b9a3d2d24850 --- /dev/null +++ b/Documentation/core-api/kho/bindings/sub-fdt.yaml @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +title: KHO users' FDT address + +maintainers: + - Mike Rapoport + - Changyuan Lyu + +description: | + Physical address of an FDT blob registered by a KHO user. + +properties: + fdt: + description: | + physical address (u64) of an FDT blob. + +required: + - fdt + +additionalProperties: false + +examples: + - | + memblock { + fdt = <0x80cc16 0x1000000>; + }; diff --git a/Documentation/core-api/kho/concepts.rst b/Documentation/core-api/kho/concepts.rst new file mode 100644 index 000000000000..36d5c05cfb30 --- /dev/null +++ b/Documentation/core-api/kho/concepts.rst @@ -0,0 +1,74 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later +.. _kho-concepts: + +======================= +Kexec Handover Concepts +======================= + +Kexec HandOver (KHO) is a mechanism that allows Linux to preserve memory +regions, which could contain serialized system states, across kexec. + +It introduces multiple concepts: + +KHO FDT +======= + +Every KHO kexec carries a KHO specific flattened device tree (FDT) blob +that describes preserved memory regions. These regions contain either +serialized subsystem states, or in-memory data that shall not be touched +across kexec. After KHO, subsystems can retrieve and restore preserved +memory regions from KHO FDT. + +KHO only uses the FDT container format and libfdt library, but does not +adhere to the same property semantics that normal device trees do: Properties +are passed in native endianness and standardized properties like ``regs`` and +``ranges`` do not exist, hence there are no ``#...-cells`` properties. + +KHO is still under development. The FDT schema is unstable and would change +in the future. + +Scratch Regions +=============== + +To boot into kexec, we need to have a physically contiguous memory range that +contains no handed over memory. Kexec then places the target kernel and initrd +into that region. The new kernel exclusively uses this region for memory +allocations before during boot up to the initialization of the page allocator. + +We guarantee that we always have such regions through the scratch regions: On +first boot KHO allocates several physically contiguous memory regions. Since +after kexec these regions will be used by early memory allocations, there is a +scratch region per NUMA node plus a scratch region to satisfy allocations +requests that do not require particular NUMA node assignment. +By default, size of the scratch region is calculated based on amount of memory +allocated during boot. The ``kho_scratch`` kernel command line option may be +used to explicitly define size of the scratch regions. +The scratch regions are declared as CMA when page allocator is initialized so +that their memory can be used during system lifetime. CMA gives us the +guarantee that no handover pages land in that region, because handover pages +must be at a static physical memory location and CMA enforces that only +movable pages can be located inside. + +After KHO kexec, we ignore the ``kho_scratch`` kernel command line option and +instead reuse the exact same region that was originally allocated. This allows +us to recursively execute any amount of KHO kexecs. Because we used this region +for boot memory allocations and as target memory for kexec blobs, some parts +of that memory region may be reserved. These reservations are irrelevant for +the next KHO, because kexec can overwrite even the original kernel. + +.. _kho-finalization-phase: + +KHO finalization phase +====================== + +To enable user space based kexec file loader, the kernel needs to be able to +provide the FDT that describes the current kernel's state before +performing the actual kexec. The process of generating that FDT is +called serialization. When the FDT is generated, some properties +of the system may become immutable because they are already written down +in the FDT. That state is called the KHO finalization phase. + +Public API +========== +.. kernel-doc:: kernel/kexec_handover.c + :export: diff --git a/Documentation/core-api/kho/fdt.rst b/Documentation/core-api/kho/fdt.rst new file mode 100644 index 000000000000..62505285d60d --- /dev/null +++ b/Documentation/core-api/kho/fdt.rst @@ -0,0 +1,80 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +======= +KHO FDT +======= + +KHO uses the flattened device tree (FDT) container format and libfdt +library to create and parse the data that is passed between the +kernels. The properties in KHO FDT are stored in native format. +It includes the physical address of an in-memory structure describing +all preserved memory regions, as well as physical addresses of KHO users' +own FDTs. Interpreting those sub FDTs is the responsibility of KHO users. + +KHO nodes and properties +======================== + +Property ``preserved-memory-map`` +--------------------------------- + +KHO saves a special property named ``preserved-memory-map`` under the root node. +This node contains the physical address of an in-memory structure for KHO to +preserve memory regions across kexec. + +Property ``compatible`` +----------------------- + +The ``compatible`` property determines compatibility between the kernel +that created the KHO FDT and the kernel that attempts to load it. +If the kernel that loads the KHO FDT is not compatible with it, the entire +KHO process will be bypassed. + +Property ``fdt`` +---------------- + +Generally, a KHO user serialize its state into its own FDT and instructs +KHO to preserve the underlying memory, such that after kexec, the new kernel +can recover its state from the preserved FDT. + +A KHO user thus can create a node in KHO root tree and save the physical address +of its own FDT in that node's property ``fdt`` . + +Examples +======== + +The following example demonstrates KHO FDT that preserves two memory +regions created with ``reserve_mem`` kernel command line parameter:: + + /dts-v1/; + + / { + compatible = "kho-v1"; + + preserved-memory-map = <0x40be16 0x1000000>; + + memblock { + fdt = <0x1517 0x1000000>; + }; + }; + +where the ``memblock`` node contains an FDT that is requested by the +subsystem memblock for preservation. The FDT contains the following +serialized data:: + + /dts-v1/; + + / { + compatible = "memblock-v1"; + + n1 { + compatible = "reserve-mem-v1"; + start = <0xc06b 0x4000000>; + size = <0x04 0x00>; + }; + + n2 { + compatible = "reserve-mem-v1"; + start = <0xc067 0x4000000>; + size = <0x04 0x00>; + }; + }; diff --git a/Documentation/core-api/kho/index.rst b/Documentation/core-api/kho/index.rst new file mode 100644 index 000000000000..0c63b0c5c143 --- /dev/null +++ b/Documentation/core-api/kho/index.rst @@ -0,0 +1,13 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +======================== +Kexec Handover Subsystem +======================== + +.. toctree:: + :maxdepth: 1 + + concepts + fdt + +.. only:: subproject and html -- cgit v1.2.3 From a3d2e34dce2041cf6994919430e75e5eafb99bcd Mon Sep 17 00:00:00 2001 From: "Mike Rapoport (Microsoft)" Date: Fri, 9 May 2025 00:46:35 -0700 Subject: Documentation: KHO: add memblock bindings We introduced KHO into Linux: A framework that allows Linux to pass metadata and memory across kexec from Linux to Linux. KHO reuses fdt as file format and shares a lot of the same properties of firmware-to- Linux boot formats: It needs a stable, documented ABI that allows for forward and backward compatibility as well as versioning. As first user of KHO, we introduced memblock which can now preserve memory ranges reserved with reserve_mem command line options contents across kexec, so you can use the post-kexec kernel to read traces from the pre-kexec kernel. This patch adds memblock schemas similar to "device" device tree ones to a new kho bindings directory. This allows us to force contributors to document the data that moves across KHO kexecs and catch breaking change during review. Link: https://lkml.kernel.org/r/20250509074635.3187114-18-changyuanl@google.com Co-developed-by: Alexander Graf Signed-off-by: Alexander Graf Signed-off-by: Mike Rapoport (Microsoft) Signed-off-by: Changyuan Lyu Cc: Andy Lutomirski Cc: Anthony Yznaga Cc: Arnd Bergmann Cc: Ashish Kalra Cc: Ben Herrenschmidt Cc: Borislav Betkov Cc: Catalin Marinas Cc: Dave Hansen Cc: David Woodhouse Cc: Eric Biederman Cc: "H. Peter Anvin" Cc: Ingo Molnar Cc: James Gowans Cc: Jason Gunthorpe Cc: Jonathan Corbet Cc: Krzysztof Kozlowski Cc: Marc Rutland Cc: Paolo Bonzini Cc: Pasha Tatashin Cc: Peter Zijlstra Cc: Pratyush Yadav Cc: Rob Herring Cc: Saravana Kannan Cc: Stanislav Kinsburskii Cc: Steven Rostedt Cc: Thomas Gleinxer Cc: Thomas Lendacky Cc: Will Deacon Signed-off-by: Andrew Morton --- .../core-api/kho/bindings/memblock/memblock.yaml | 39 +++++++++++++++++++++ .../kho/bindings/memblock/reserve-mem.yaml | 40 ++++++++++++++++++++++ 2 files changed, 79 insertions(+) create mode 100644 Documentation/core-api/kho/bindings/memblock/memblock.yaml create mode 100644 Documentation/core-api/kho/bindings/memblock/reserve-mem.yaml (limited to 'Documentation') diff --git a/Documentation/core-api/kho/bindings/memblock/memblock.yaml b/Documentation/core-api/kho/bindings/memblock/memblock.yaml new file mode 100644 index 000000000000..d388c28eb91d --- /dev/null +++ b/Documentation/core-api/kho/bindings/memblock/memblock.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +title: Memblock reserved memory + +maintainers: + - Mike Rapoport + +description: | + Memblock can serialize its current memory reservations created with + reserve_mem command line option across kexec through KHO. + The post-KHO kernel can then consume these reservations and they are + guaranteed to have the same physical address. + +properties: + compatible: + enum: + - reserve-mem-v1 + +patternProperties: + "$[0-9a-f_]+^": + $ref: reserve-mem.yaml# + description: reserved memory regions + +required: + - compatible + +additionalProperties: false + +examples: + - | + memblock { + compatible = "memblock-v1"; + n1 { + compatible = "reserve-mem-v1"; + start = <0xc06b 0x4000000>; + size = <0x04 0x00>; + }; + }; diff --git a/Documentation/core-api/kho/bindings/memblock/reserve-mem.yaml b/Documentation/core-api/kho/bindings/memblock/reserve-mem.yaml new file mode 100644 index 000000000000..10282d3d1bcd --- /dev/null +++ b/Documentation/core-api/kho/bindings/memblock/reserve-mem.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +title: Memblock reserved memory regions + +maintainers: + - Mike Rapoport + +description: | + Memblock can serialize its current memory reservations created with + reserve_mem command line option across kexec through KHO. + This object describes each such region. + +properties: + compatible: + enum: + - reserve-mem-v1 + + start: + description: | + physical address (u64) of the reserved memory region. + + size: + description: | + size (u64) of the reserved memory region. + +required: + - compatible + - start + - size + +additionalProperties: false + +examples: + - | + n1 { + compatible = "reserve-mem-v1"; + start = <0xc06b 0x4000000>; + size = <0x04 0x00>; + }; -- cgit v1.2.3 From 5ec56c1cb651eb70ab2cfc92264c82c3a6d584dc Mon Sep 17 00:00:00 2001 From: "Thushara.M.S" Date: Mon, 5 May 2025 14:29:12 -0700 Subject: docs/mm/damon/design: fix spelling mistake The word accuracy was misspelled as "accruracy". Signed-off-by: Thushara.M.S Reviewed-by: SeongJae Park Signed-off-by: Andrew Morton --- Documentation/mm/damon/design.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/mm/damon/design.rst b/Documentation/mm/damon/design.rst index 728bf5754343..ddc50db3afa4 100644 --- a/Documentation/mm/damon/design.rst +++ b/Documentation/mm/damon/design.rst @@ -54,7 +54,7 @@ monitoring are address-space dependent. DAMON consolidates these implementations in a layer called DAMON Operations Set, and defines the interface between it and the upper layer. The upper layer is dedicated for DAMON's core logics including the mechanism for control of the -monitoring accruracy and the overhead. +monitoring accuracy and the overhead. Hence, DAMON can easily be extended for any address space and/or available hardware features by configuring the core logic to use the appropriate -- cgit v1.2.3 From 678927c0c96bc94043d73526def00a73371c46d0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Petr=20Van=C4=9Bk?= Date: Mon, 12 May 2025 13:08:27 +0200 Subject: Documentation: fix typo in root= kernel parameter description MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fixes a typo in the root= parameter description, changing "this a a" to "this is a". Fixes: c0c1a7dcb6f5 ("init: move the nfs/cifs/ram special cases out of name_to_dev_t") Signed-off-by: Petr Vaněk Link: https://lore.kernel.org/20250512110827.32530-1-arkamar@atlas.cz Reviewed-by: Christoph Hellwig Signed-off-by: Christian Brauner --- Documentation/admin-guide/kernel-parameters.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 76e538c77e31..a82f30012fee 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -6253,7 +6253,7 @@ port and the regular usb controller gets disabled. root= [KNL] Root filesystem - Usually this a a block device specifier of some kind, + Usually this is a block device specifier of some kind, see the early_lookup_bdev comment in block/early-lookup.c for details. Alternatively this can be "ram" for the legacy initial -- cgit v1.2.3 From 0475b0d8a1e0f80a47536dfb19c28dc4bb6adc05 Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Tue, 6 May 2025 21:57:27 +0100 Subject: dt-bindings: soc: google: Add gs101-pmu-intr-gen binding documentation Add bindings documentation for the Power Management Unit (PMU) interrupt generator. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Peter Griffin Link: https://lore.kernel.org/r/20250506-contrib-pg-cpu-hotplug-suspend2ram-fixes-v1-v4-1-9f64a2657316@linaro.org Signed-off-by: Krzysztof Kozlowski --- .../soc/google/google,gs101-pmu-intr-gen.yaml | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml b/Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml new file mode 100644 index 000000000000..2be022ca6a7d --- /dev/null +++ b/Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/google/google,gs101-pmu-intr-gen.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Google Power Management Unit (PMU) Interrupt Generation + +description: | + PMU interrupt generator for handshaking between PMU through interrupts. + +maintainers: + - Peter Griffin + +properties: + compatible: + items: + - const: google,gs101-pmu-intr-gen + - const: syscon + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pmu_intr_gen: syscon@17470000 { + compatible = "google,gs101-pmu-intr-gen", "syscon"; + reg = <0x17470000 0x10000>; + }; -- cgit v1.2.3 From 83b66cdb5d5b6aa4ed1f085b3b2f917af0c2890b Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Tue, 6 May 2025 21:57:28 +0100 Subject: dt-bindings: soc: samsung: exynos-pmu: gs101: add google,pmu-intr-gen phandle gs101 requires access to the pmu interrupt generation register region which is exposed as a syscon. Update the exynos-pmu bindings documentation to reflect this. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Peter Griffin Link: https://lore.kernel.org/r/20250506-contrib-pg-cpu-hotplug-suspend2ram-fixes-v1-v4-2-9f64a2657316@linaro.org Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/soc/samsung/exynos-pmu.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml index 204da6fe458d..3109df43d502 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml @@ -129,6 +129,11 @@ properties: description: Node for reboot method + google,pmu-intr-gen-syscon: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to PMU interrupt generation interface. + required: - compatible - reg @@ -189,6 +194,16 @@ allOf: properties: dp-phy: false + - if: + properties: + compatible: + contains: + enum: + - google,gs101-pmu + then: + required: + - google,pmu-intr-gen-syscon + examples: - | #include -- cgit v1.2.3 From 8802087d20c0e1c26c4b4fe30e22264bf8285e51 Mon Sep 17 00:00:00 2001 From: Stanislav Fomichev Date: Thu, 8 May 2025 00:48:23 +0000 Subject: net: devmem: TCP tx netlink api Add bind-tx netlink call to attach dmabuf for TX; queue is not required, only ifindex and dmabuf fd for attachment. Signed-off-by: Stanislav Fomichev Signed-off-by: Mina Almasry Link: https://patch.msgid.link/20250508004830.4100853-4-almasrymina@google.com Signed-off-by: Paolo Abeni --- Documentation/netlink/specs/netdev.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/netdev.yaml b/Documentation/netlink/specs/netdev.yaml index f5e0750ab71d..c0ef6d0d7786 100644 --- a/Documentation/netlink/specs/netdev.yaml +++ b/Documentation/netlink/specs/netdev.yaml @@ -743,6 +743,18 @@ operations: - defer-hard-irqs - gro-flush-timeout - irq-suspend-timeout + - + name: bind-tx + doc: Bind dmabuf to netdev for TX + attribute-set: dmabuf + do: + request: + attributes: + - ifindex + - fd + reply: + attributes: + - id kernel-family: headers: [ "net/netdev_netlink.h"] -- cgit v1.2.3 From 17af8cc06a5a302f22994e765ddb7268373ad1db Mon Sep 17 00:00:00 2001 From: Mina Almasry Date: Thu, 8 May 2025 00:48:25 +0000 Subject: net: add devmem TCP TX documentation Add documentation outlining the usage and details of the devmem TCP TX API. Signed-off-by: Mina Almasry Acked-by: Stanislav Fomichev Link: https://patch.msgid.link/20250508004830.4100853-6-almasrymina@google.com Signed-off-by: Paolo Abeni --- Documentation/networking/devmem.rst | 150 +++++++++++++++++++++++++++++++++++- 1 file changed, 146 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/devmem.rst b/Documentation/networking/devmem.rst index eb678ca45496..a6cd7236bfbd 100644 --- a/Documentation/networking/devmem.rst +++ b/Documentation/networking/devmem.rst @@ -62,15 +62,15 @@ More Info https://lore.kernel.org/netdev/20240831004313.3713467-1-almasrymina@google.com/ -Interface -========= +RX Interface +============ Example ------- -tools/testing/selftests/net/ncdevmem.c:do_server shows an example of setting up -the RX path of this API. +./tools/testing/selftests/drivers/net/hw/ncdevmem:do_server shows an example of +setting up the RX path of this API. NIC Setup @@ -235,6 +235,148 @@ can be less than the tokens provided by the user in case of: (a) an internal kernel leak bug. (b) the user passed more than 1024 frags. +TX Interface +============ + + +Example +------- + +./tools/testing/selftests/drivers/net/hw/ncdevmem:do_client shows an example of +setting up the TX path of this API. + + +NIC Setup +--------- + +The user must bind a TX dmabuf to a given NIC using the netlink API:: + + struct netdev_bind_tx_req *req = NULL; + struct netdev_bind_tx_rsp *rsp = NULL; + struct ynl_error yerr; + + *ys = ynl_sock_create(&ynl_netdev_family, &yerr); + + req = netdev_bind_tx_req_alloc(); + netdev_bind_tx_req_set_ifindex(req, ifindex); + netdev_bind_tx_req_set_fd(req, dmabuf_fd); + + rsp = netdev_bind_tx(*ys, req); + + tx_dmabuf_id = rsp->id; + + +The netlink API returns a dmabuf_id: a unique ID that refers to this dmabuf +that has been bound. + +The user can unbind the dmabuf from the netdevice by closing the netlink socket +that established the binding. We do this so that the binding is automatically +unbound even if the userspace process crashes. + +Note that any reasonably well-behaved dmabuf from any exporter should work with +devmem TCP, even if the dmabuf is not actually backed by devmem. An example of +this is udmabuf, which wraps user memory (non-devmem) in a dmabuf. + +Socket Setup +------------ + +The user application must use MSG_ZEROCOPY flag when sending devmem TCP. Devmem +cannot be copied by the kernel, so the semantics of the devmem TX are similar +to the semantics of MSG_ZEROCOPY:: + + setsockopt(socket_fd, SOL_SOCKET, SO_ZEROCOPY, &opt, sizeof(opt)); + +It is also recommended that the user binds the TX socket to the same interface +the dma-buf has been bound to via SO_BINDTODEVICE:: + + setsockopt(socket_fd, SOL_SOCKET, SO_BINDTODEVICE, ifname, strlen(ifname) + 1); + + +Sending data +------------ + +Devmem data is sent using the SCM_DEVMEM_DMABUF cmsg. + +The user should create a msghdr where, + +* iov_base is set to the offset into the dmabuf to start sending from +* iov_len is set to the number of bytes to be sent from the dmabuf + +The user passes the dma-buf id to send from via the dmabuf_tx_cmsg.dmabuf_id. + +The example below sends 1024 bytes from offset 100 into the dmabuf, and 2048 +from offset 2000 into the dmabuf. The dmabuf to send from is tx_dmabuf_id:: + + char ctrl_data[CMSG_SPACE(sizeof(struct dmabuf_tx_cmsg))]; + struct dmabuf_tx_cmsg ddmabuf; + struct msghdr msg = {}; + struct cmsghdr *cmsg; + struct iovec iov[2]; + + iov[0].iov_base = (void*)100; + iov[0].iov_len = 1024; + iov[1].iov_base = (void*)2000; + iov[1].iov_len = 2048; + + msg.msg_iov = iov; + msg.msg_iovlen = 2; + + msg.msg_control = ctrl_data; + msg.msg_controllen = sizeof(ctrl_data); + + cmsg = CMSG_FIRSTHDR(&msg); + cmsg->cmsg_level = SOL_SOCKET; + cmsg->cmsg_type = SCM_DEVMEM_DMABUF; + cmsg->cmsg_len = CMSG_LEN(sizeof(struct dmabuf_tx_cmsg)); + + ddmabuf.dmabuf_id = tx_dmabuf_id; + + *((struct dmabuf_tx_cmsg *)CMSG_DATA(cmsg)) = ddmabuf; + + sendmsg(socket_fd, &msg, MSG_ZEROCOPY); + + +Reusing TX dmabufs +------------------ + +Similar to MSG_ZEROCOPY with regular memory, the user should not modify the +contents of the dma-buf while a send operation is in progress. This is because +the kernel does not keep a copy of the dmabuf contents. Instead, the kernel +will pin and send data from the buffer available to the userspace. + +Just as in MSG_ZEROCOPY, the kernel notifies the userspace of send completions +using MSG_ERRQUEUE:: + + int64_t tstop = gettimeofday_ms() + waittime_ms; + char control[CMSG_SPACE(100)] = {}; + struct sock_extended_err *serr; + struct msghdr msg = {}; + struct cmsghdr *cm; + int retries = 10; + __u32 hi, lo; + + msg.msg_control = control; + msg.msg_controllen = sizeof(control); + + while (gettimeofday_ms() < tstop) { + if (!do_poll(fd)) continue; + + ret = recvmsg(fd, &msg, MSG_ERRQUEUE); + + for (cm = CMSG_FIRSTHDR(&msg); cm; cm = CMSG_NXTHDR(&msg, cm)) { + serr = (void *)CMSG_DATA(cm); + + hi = serr->ee_data; + lo = serr->ee_info; + + fprintf(stdout, "tx complete [%d,%d]\n", lo, hi); + } + } + +After the associated sendmsg has been completed, the dmabuf can be reused by +the userspace. + + Implementation & Caveats ======================== -- cgit v1.2.3 From 383faec0fd64b9bff15eb5f700f023ec35520a96 Mon Sep 17 00:00:00 2001 From: Mina Almasry Date: Thu, 8 May 2025 00:48:26 +0000 Subject: net: enable driver support for netmem TX Drivers need to make sure not to pass netmem dma-addrs to the dma-mapping API in order to support netmem TX. Add helpers and netmem_dma_*() helpers that enables special handling of netmem dma-addrs that drivers can use. Document in netmem.rst what drivers need to do to support netmem TX. Signed-off-by: Mina Almasry Acked-by: Stanislav Fomichev Link: https://patch.msgid.link/20250508004830.4100853-7-almasrymina@google.com Signed-off-by: Paolo Abeni --- .../networking/net_cachelines/net_device.rst | 1 + Documentation/networking/netdev-features.rst | 5 +++++ Documentation/networking/netmem.rst | 23 ++++++++++++++++++++-- 3 files changed, 27 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/net_cachelines/net_device.rst b/Documentation/networking/net_cachelines/net_device.rst index ca8605eb82ff..c69cc89c958e 100644 --- a/Documentation/networking/net_cachelines/net_device.rst +++ b/Documentation/networking/net_cachelines/net_device.rst @@ -10,6 +10,7 @@ Type Name fastpath_tx_acce =================================== =========================== =================== =================== =================================================================================== unsigned_long:32 priv_flags read_mostly __dev_queue_xmit(tx) unsigned_long:1 lltx read_mostly HARD_TX_LOCK,HARD_TX_TRYLOCK,HARD_TX_UNLOCK(tx) +unsigned long:1 netmem_tx:1; read_mostly char name[16] struct netdev_name_node* name_node struct dev_ifalias* ifalias diff --git a/Documentation/networking/netdev-features.rst b/Documentation/networking/netdev-features.rst index 5014f7cc1398..02bd7536fc0c 100644 --- a/Documentation/networking/netdev-features.rst +++ b/Documentation/networking/netdev-features.rst @@ -188,3 +188,8 @@ Redundancy) frames from one port to another in hardware. This should be set for devices which duplicate outgoing HSR (High-availability Seamless Redundancy) or PRP (Parallel Redundancy Protocol) tags automatically frames in hardware. + +* netmem-tx + +This should be set for devices which support netmem TX. See +Documentation/networking/netmem.rst diff --git a/Documentation/networking/netmem.rst b/Documentation/networking/netmem.rst index 7de21ddb5412..b63aded46337 100644 --- a/Documentation/networking/netmem.rst +++ b/Documentation/networking/netmem.rst @@ -19,8 +19,8 @@ Benefits of Netmem : * Simplified Development: Drivers interact with a consistent API, regardless of the underlying memory implementation. -Driver Requirements -=================== +Driver RX Requirements +====================== 1. The driver must support page_pool. @@ -77,3 +77,22 @@ Driver Requirements that purpose, but be mindful that some netmem types might have longer circulation times, such as when userspace holds a reference in zerocopy scenarios. + +Driver TX Requirements +====================== + +1. The Driver must not pass the netmem dma_addr to any of the dma-mapping APIs + directly. This is because netmem dma_addrs may come from a source like + dma-buf that is not compatible with the dma-mapping APIs. + + Helpers like netmem_dma_unmap_page_attrs() & netmem_dma_unmap_addr_set() + should be used in lieu of dma_unmap_page[_attrs](), dma_unmap_addr_set(). + The netmem variants will handle netmem dma_addrs correctly regardless of the + source, delegating to the dma-mapping APIs when appropriate. + + Not all dma-mapping APIs have netmem equivalents at the moment. If your + driver relies on a missing netmem API, feel free to add and propose to + netdev@, or reach out to the maintainers and/or almasrymina@google.com for + help adding the netmem API. + +2. Driver should declare support by setting `netdev->netmem_tx = true` -- cgit v1.2.3 From 9baa27a2e9fc746143ab686b6dbe2d515284a4c5 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Mon, 5 May 2025 17:47:27 +0100 Subject: dt-bindings: vendor-prefixes: Add Liontron name Liontron is a company based in Shenzen, China, making industrial development boards and embedded computers, mostly using Rockchip and Allwinner SoCs. Add their name to the list of vendors. Signed-off-by: Andre Przywara Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250505164729.18175-2-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 411fd65e0bde..580dfd62dc9a 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -864,6 +864,8 @@ patternProperties: description: Linux-specific binding "^linx,.*": description: Linx Technologies + "^liontron,.*": + description: Shenzhen Liontron Technology Co., Ltd "^liteon,.*": description: LITE-ON Technology Corp. "^litex,.*": -- cgit v1.2.3 From d26382bb852cd9020a276765d3f2695f2aa7f607 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Mon, 5 May 2025 17:47:28 +0100 Subject: dt-bindings: arm: sunxi: Add Liontron H-A133L board name The Liontron H-A133L is an industrial development board using the Allwinner A133 SoC. Add its compatible name to the list of valid board names. Signed-off-by: Andre Przywara Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250505164729.18175-3-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai --- Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index cb354c2c61b2..7807ea613258 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -492,6 +492,11 @@ properties: - const: lamobo,lamobo-r1 - const: allwinner,sun7i-a20 + - description: Liontron H-A133L + items: + - const: liontron,h-a133l + - const: allwinner,sun50i-a100 + - description: HAOYU Electronics Marsboard A10 items: - const: haoyu,a10-marsboard -- cgit v1.2.3 From 3f9ce9d0760ad68a9c20167664d026d91da66879 Mon Sep 17 00:00:00 2001 From: Fabrice Gasnier Date: Tue, 29 Apr 2025 14:51:27 +0200 Subject: dt-bindings: mfd: stm32-lptimer: Add support for stm32mp25 Add a new stm32mp25 compatible to stm32-lptimer dt-bindings, to support STM32MP25 SoC. Some features has been updated or added to the low-power timer: - new capture compare channels - up to two PWM channels - PWM input capture - peripheral interconnect in stm32mp25 has been updated (new triggers). - registers/bits has been added or revisited (IER access). So introduce a new compatible to handle this diversity. Signed-off-by: Fabrice Gasnier Reviewed-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250429125133.1574167-2-fabrice.gasnier@foss.st.com Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/st,stm32-lptimer.yaml | 40 ++++++++++++++++++---- 1 file changed, 34 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml index d41308856408..4eabafb8079d 100644 --- a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml +++ b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml @@ -21,7 +21,12 @@ maintainers: properties: compatible: - const: st,stm32-lptimer + oneOf: + - items: + - const: st,stm32mp25-lptimer + - const: st,stm32-lptimer + - items: + - const: st,stm32-lptimer reg: maxItems: 1 @@ -48,13 +53,21 @@ properties: minItems: 1 maxItems: 2 + power-domains: + maxItems: 1 + pwm: type: object additionalProperties: false properties: compatible: - const: st,stm32-pwm-lp + oneOf: + - items: + - const: st,stm32mp25-pwm-lp + - const: st,stm32-pwm-lp + - items: + - const: st,stm32-pwm-lp "#pwm-cells": const: 3 @@ -69,7 +82,12 @@ properties: properties: compatible: - const: st,stm32-lptimer-counter + oneOf: + - items: + - const: st,stm32mp25-lptimer-counter + - const: st,stm32-lptimer-counter + - items: + - const: st,stm32-lptimer-counter required: - compatible @@ -80,7 +98,12 @@ properties: properties: compatible: - const: st,stm32-lptimer-timer + oneOf: + - items: + - const: st,stm32mp25-lptimer-timer + - const: st,stm32-lptimer-timer + - items: + - const: st,stm32-lptimer-timer required: - compatible @@ -92,13 +115,18 @@ patternProperties: properties: compatible: - const: st,stm32-lptimer-trigger + oneOf: + - items: + - const: st,stm32mp25-lptimer-trigger + - const: st,stm32-lptimer-trigger + - items: + - const: st,stm32-lptimer-trigger reg: description: Identify trigger hardware block. items: minimum: 0 - maximum: 2 + maximum: 4 required: - compatible -- cgit v1.2.3 From c9b83cbe46c645712988a53ce513aaf56728dcd3 Mon Sep 17 00:00:00 2001 From: Atul Kumar Pant Date: Sun, 11 May 2025 12:41:41 +0530 Subject: PM: EM: Documentation: Fix typos in example driver code Fix the API name to free the allocated table in the example driver code that modifies the EM. Also fix the passing of correct table when updating the cost. Signed-off-by: Atul Kumar Pant Link: https://patch.msgid.link/20250511071141.13237-1-atulpant.linux@gmail.com Signed-off-by: Rafael J. Wysocki --- Documentation/power/energy-model.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/power/energy-model.rst b/Documentation/power/energy-model.rst index 490ddd483f46..cbdf7520aaa6 100644 --- a/Documentation/power/energy-model.rst +++ b/Documentation/power/energy-model.rst @@ -381,17 +381,17 @@ up periodically to check the temperature and modify the EM data:: 26 rcu_read_unlock(); 27 28 /* Calculate 'cost' values for EAS */ - 29 ret = em_dev_compute_costs(dev, table, pd->nr_perf_states); + 29 ret = em_dev_compute_costs(dev, new_table, pd->nr_perf_states); 30 if (ret) { 31 dev_warn(dev, "EM: compute costs failed %d\n", ret); - 32 em_free_table(em_table); + 32 em_table_free(em_table); 33 return; 34 } 35 36 ret = em_dev_update_perf_domain(dev, em_table); 37 if (ret) { 38 dev_warn(dev, "EM: update failed %d\n", ret); - 39 em_free_table(em_table); + 39 em_table_free(em_table); 40 return; 41 } 42 -- cgit v1.2.3 From f20af84c29b222f68df53bfa72dcfbd4a3491603 Mon Sep 17 00:00:00 2001 From: "Rafael J. Wysocki" Date: Tue, 6 May 2025 22:48:59 +0200 Subject: cpufreq: intel_pstate: Document hybrid processor support Describe the support for hybrid processors in intel_pstate, including the CAS and EAS support, in the admin-guide documentation. Signed-off-by: Rafael J. Wysocki Link: https://patch.msgid.link/1935040.CQOukoFCf9@rjwysocki.net --- Documentation/admin-guide/pm/intel_pstate.rst | 104 +++++++++++++++++++++++++- 1 file changed, 102 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/pm/intel_pstate.rst b/Documentation/admin-guide/pm/intel_pstate.rst index 78fc83ed2a7e..26e702c7016e 100644 --- a/Documentation/admin-guide/pm/intel_pstate.rst +++ b/Documentation/admin-guide/pm/intel_pstate.rst @@ -329,6 +329,106 @@ information listed above is the same for all of the processors supporting the HWP feature, which is why ``intel_pstate`` works with all of them.] +Support for Hybrid Processors +============================= + +Some processors supported by ``intel_pstate`` contain two or more types of CPU +cores differing by the maximum turbo P-state, performance vs power characteristics, +cache sizes, and possibly other properties. They are commonly referred to as +hybrid processors. To support them, ``intel_pstate`` requires HWP to be enabled +and it assumes the HWP performance units to be the same for all CPUs in the +system, so a given HWP performance level always represents approximately the +same physical performance regardless of the core (CPU) type. + +Hybrid Processors with SMT +-------------------------- + +On systems where SMT (Simultaneous Multithreading), also referred to as +HyperThreading (HT) in the context of Intel processors, is enabled on at least +one core, ``intel_pstate`` assigns performance-based priorities to CPUs. Namely, +the priority of a given CPU reflects its highest HWP performance level which +causes the CPU scheduler to generally prefer more performant CPUs, so the less +performant CPUs are used when the other ones are fully loaded. However, SMT +siblings (that is, logical CPUs sharing one physical core) are treated in a +special way such that if one of them is in use, the effective priority of the +other ones is lowered below the priorities of the CPUs located in the other +physical cores. + +This approach maximizes performance in the majority of cases, but unfortunately +it also leads to excessive energy usage in some important scenarios, like video +playback, which is not generally desirable. While there is no other viable +choice with SMT enabled because the effective capacity and utilization of SMT +siblings are hard to determine, hybrid processors without SMT can be handled in +more energy-efficient ways. + +.. _CAS: + +Capacity-Aware Scheduling Support +--------------------------------- + +The capacity-aware scheduling (CAS) support in the CPU scheduler is enabled by +``intel_pstate`` by default on hybrid processors without SMT. CAS generally +causes the scheduler to put tasks on a CPU so long as there is a sufficient +amount of spare capacity on it, and if the utilization of a given task is too +high for it, the task will need to go somewhere else. + +Since CAS takes CPU capacities into account, it does not require CPU +prioritization and it allows tasks to be distributed more symmetrically among +the more performant and less performant CPUs. Once placed on a CPU with enough +capacity to accommodate it, a task may just continue to run there regardless of +whether or not the other CPUs are fully loaded, so on average CAS reduces the +utilization of the more performant CPUs which causes the energy usage to be more +balanced because the more performant CPUs are generally less energy-efficient +than the less performant ones. + +In order to use CAS, the scheduler needs to know the capacity of each CPU in +the system and it needs to be able to compute scale-invariant utilization of +CPUs, so ``intel_pstate`` provides it with the requisite information. + +First of all, the capacity of each CPU is represented by the ratio of its highest +HWP performance level, multiplied by 1024, to the highest HWP performance level +of the most performant CPU in the system, which works because the HWP performance +units are the same for all CPUs. Second, the frequency-invariance computations, +carried out by the scheduler to always express CPU utilization in the same units +regardless of the frequency it is currently running at, are adjusted to take the +CPU capacity into account. All of this happens when ``intel_pstate`` has +registered itself with the ``CPUFreq`` core and it has figured out that it is +running on a hybrid processor without SMT. + +Energy-Aware Scheduling Support +------------------------------- + +If ``CONFIG_ENERGY_MODEL`` has been set during kernel configuration and +``intel_pstate`` runs on a hybrid processor without SMT, in addition to enabling +`CAS `_ it registers an Energy Model for the processor. This allows the +Energy-Aware Scheduling (EAS) support to be enabled in the CPU scheduler if +``schedutil`` is used as the ``CPUFreq`` governor which requires ``intel_pstate`` +to operate in the `passive mode `_. + +The Energy Model registered by ``intel_pstate`` is artificial (that is, it is +based on abstract cost values and it does not include any real power numbers) +and it is relatively simple to avoid unnecessary computations in the scheduler. +There is a performance domain in it for every CPU in the system and the cost +values for these performance domains have been chosen so that running a task on +a less performant (small) CPU appears to be always cheaper than running that +task on a more performant (big) CPU. However, for two CPUs of the same type, +the cost difference depends on their current utilization, and the CPU whose +current utilization is higher generally appears to be a more expensive +destination for a given task. This helps to balance the load among CPUs of the +same type. + +Since EAS works on top of CAS, high-utilization tasks are always migrated to +CPUs with enough capacity to accommodate them, but thanks to EAS, low-utilization +tasks tend to be placed on the CPUs that look less expensive to the scheduler. +Effectively, this causes the less performant and less loaded CPUs to be +preferred as long as they have enough spare capacity to run the given task +which generally leads to reduced energy usage. + +The Energy Model created by ``intel_pstate`` can be inspected by looking at +the ``energy_model`` directory in ``debugfs`` (typlically mounted on +``/sys/kernel/debug/``). + + User Space Interface in ``sysfs`` ================================= @@ -697,8 +797,8 @@ of them have to be prepended with the ``intel_pstate=`` prefix. Limits`_ for details). ``no_cas`` - Do not enable capacity-aware scheduling (CAS) which is enabled by - default on hybrid systems. + Do not enable `capacity-aware scheduling `_ which is enabled by + default on hybrid systems without SMT. Diagnostics and Tuning ====================== -- cgit v1.2.3 From 2f87c9aa90e9f149a0c763dbd6ec662d2fbea977 Mon Sep 17 00:00:00 2001 From: Lijuan Gao Date: Tue, 6 May 2025 14:22:58 +0800 Subject: dt-bindings: pinctrl: qcom: correct gpio-ranges in examples for qcs615 Correct the gpio-ranges in the QCS615 TLMM pin controller example to include the UFS_RESET pin, which is expected to be wired to the reset pin of the primary UFS memory. This allows the UFS driver to toggle it. Fixes: 55c487ea6084 ("dt-bindings: pinctrl: document the QCS615 Top Level Mode Multiplexer") Acked-by: Rob Herring (Arm) Signed-off-by: Lijuan Gao Link: https://lore.kernel.org/20250506-correct_gpio_ranges-v3-1-49a7d292befa@quicinc.com Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/pinctrl/qcom,qcs615-tlmm.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,qcs615-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,qcs615-tlmm.yaml index 1ce4b5df584a..2791e578c1de 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,qcs615-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,qcs615-tlmm.yaml @@ -110,7 +110,7 @@ examples: <0x03c00000 0x300000>; reg-names = "east", "west", "south"; interrupts = ; - gpio-ranges = <&tlmm 0 0 123>; + gpio-ranges = <&tlmm 0 0 124>; gpio-controller; #gpio-cells = <2>; interrupt-controller; -- cgit v1.2.3 From b4b6c80ed8d1cca0fb262117c575571c26633711 Mon Sep 17 00:00:00 2001 From: Lijuan Gao Date: Tue, 6 May 2025 14:22:59 +0800 Subject: dt-bindings: pinctrl: qcom: correct gpio-ranges in examples for qcs8300 Correct the gpio-ranges in the QCS8300 TLMM pin controller example to include the UFS_RESET pin, which is expected to be wired to the reset pin of the primary UFS memory. This allows the UFS driver to toggle it. Fixes: 5778535972e2 ("dt-bindings: pinctrl: describe qcs8300-tlmm") Acked-by: Rob Herring (Arm) Signed-off-by: Lijuan Gao Link: https://lore.kernel.org/20250506-correct_gpio_ranges-v3-2-49a7d292befa@quicinc.com Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/pinctrl/qcom,qcs8300-tlmm.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,qcs8300-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,qcs8300-tlmm.yaml index bb0d7132886a..489b41dcc179 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,qcs8300-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,qcs8300-tlmm.yaml @@ -106,7 +106,7 @@ examples: interrupts = ; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&tlmm 0 0 133>; + gpio-ranges = <&tlmm 0 0 134>; interrupt-controller; #interrupt-cells = <2>; -- cgit v1.2.3 From c3f22262670da259d7cf1fda199d8f06f1d6ff6d Mon Sep 17 00:00:00 2001 From: Alexandre Courbot Date: Wed, 7 May 2025 22:52:32 +0900 Subject: gpu: nova-core: define registers layout using helper macro Add the register!() macro, which defines a given register's layout and provide bit-field accessors with a way to convert them to a given type. This macro will allow us to make clear definitions of the registers and manipulate their fields safely. The long-term goal is to eventually move it to the kernel crate so it can be used by other drivers as well, but it was agreed to first land it into nova-core and make it mature there. To illustrate its usage, use it to define the layout for the Boot0 (renamed to NV_PMC_BOOT_0 to match OpenRM's naming scheme) and take advantage of its accessors. Suggested-by: Danilo Krummrich Signed-off-by: Alexandre Courbot Link: https://lore.kernel.org/r/20250507-nova-frts-v3-5-fcb02749754d@nvidia.com [ Fix typo in commit message. - Danilo ] Signed-off-by: Danilo Krummrich --- Documentation/gpu/nova/core/todo.rst | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation') diff --git a/Documentation/gpu/nova/core/todo.rst b/Documentation/gpu/nova/core/todo.rst index 234d753d3eac..8a459fc08812 100644 --- a/Documentation/gpu/nova/core/todo.rst +++ b/Documentation/gpu/nova/core/todo.rst @@ -102,7 +102,13 @@ Usage: let boot0 = Boot0::read(&bar); pr_info!("Revision: {}\n", boot0.revision()); +Note: a work-in-progress implementation currently resides in +`drivers/gpu/nova-core/regs/macros.rs` and is used in nova-core. It would be +nice to improve it (possibly using proc macros) and move it to the `kernel` +crate so it can be used by other components as well. + | Complexity: Advanced +| Contact: Alexandre Courbot Delay / Sleep abstractions -------------------------- -- cgit v1.2.3 From 73b7fd4b209263a92726daca6453a37ecb89eb9d Mon Sep 17 00:00:00 2001 From: Bagas Sanjaya Date: Mon, 12 May 2025 14:42:16 +0700 Subject: Documentation/gpu: Disambiguate SPI term Documentation/userspace-api/media/glossary.rst:170: WARNING: duplicate term description of SPI, other instance in gpu/amdgpu/amdgpu-glossary That's because SPI of amdgpu (Shader Processor Input) shares the same global glossary term as SPI of media subsystem (which is Serial Peripheral Interface Bus). Disambiguate the former from the latter to fix the warning. Note that adding context qualifiers in the term is strictly necessary in order to make Sphinx happy. Fixes: dd3d035a7838 ("Documentation/gpu: Add new entries to amdgpu glossary") Reported-by: Stephen Rothwell Closes: https://lore.kernel.org/linux-next/20250509185845.60bf5e7b@canb.auug.org.au/ Signed-off-by: Bagas Sanjaya Signed-off-by: Alex Deucher --- Documentation/gpu/amdgpu/amdgpu-glossary.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst b/Documentation/gpu/amdgpu/amdgpu-glossary.rst index 2040da593b14..30812d9d53c6 100644 --- a/Documentation/gpu/amdgpu/amdgpu-glossary.rst +++ b/Documentation/gpu/amdgpu/amdgpu-glossary.rst @@ -182,7 +182,7 @@ we have a dedicated glossary for Display Core at SMU/SMC System Management Unit / System Management Controller - SPI + SPI (AMDGPU) Shader Processor Input SRLC -- cgit v1.2.3 From 438d216e6791a2a7f546707afbb4ce02f792ebc3 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 12 May 2025 20:52:51 -0500 Subject: dt-bindings: cache: Convert marvell,{feroceon,kirkwood}-cache to DT schema Convert the Marvell Feroceon/Kirkwood Cache binding to DT schema format. Use "marvell,kirkwood-cache" for the filename instead as that's only compatible used in a .dts upstream. Signed-off-by: Rob Herring (Arm) Reviewed-by: Andrew Lunn Signed-off-by: Conor Dooley --- .../bindings/cache/marvell,feroceon-cache.txt | 16 -------- .../bindings/cache/marvell,kirkwood-cache.yaml | 45 ++++++++++++++++++++++ 2 files changed, 45 insertions(+), 16 deletions(-) delete mode 100644 Documentation/devicetree/bindings/cache/marvell,feroceon-cache.txt create mode 100644 Documentation/devicetree/bindings/cache/marvell,kirkwood-cache.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/cache/marvell,feroceon-cache.txt b/Documentation/devicetree/bindings/cache/marvell,feroceon-cache.txt deleted file mode 100644 index 0d244b999d10..000000000000 --- a/Documentation/devicetree/bindings/cache/marvell,feroceon-cache.txt +++ /dev/null @@ -1,16 +0,0 @@ -* Marvell Feroceon Cache - -Required properties: -- compatible : Should be either "marvell,feroceon-cache" or - "marvell,kirkwood-cache". - -Optional properties: -- reg : Address of the L2 cache control register. Mandatory for - "marvell,kirkwood-cache", not used by "marvell,feroceon-cache" - - -Example: - l2: l2-cache@20128 { - compatible = "marvell,kirkwood-cache"; - reg = <0x20128 0x4>; - }; diff --git a/Documentation/devicetree/bindings/cache/marvell,kirkwood-cache.yaml b/Documentation/devicetree/bindings/cache/marvell,kirkwood-cache.yaml new file mode 100644 index 000000000000..2bfa3c29f6a6 --- /dev/null +++ b/Documentation/devicetree/bindings/cache/marvell,kirkwood-cache.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/cache/marvell,kirkwood-cache.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Feroceon/Kirkwood Cache + +maintainers: + - Andrew Lunn + - Gregory Clement + +properties: + compatible: + enum: + - marvell,feroceon-cache + - marvell,kirkwood-cache + + reg: + maxItems: 1 + +allOf: + - if: + properties: + compatible: + contains: + const: marvell,kirkwood-cache + then: + required: + - reg + else: + properties: + reg: false + +required: + - compatible + +additionalProperties: false + +examples: + - | + l2-cache@20128 { + compatible = "marvell,kirkwood-cache"; + reg = <0x20128 0x4>; + }; -- cgit v1.2.3 From 64d60a02036ce589ac8d6c374346a4e48755ff1d Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 12 May 2025 20:53:01 -0500 Subject: dt-bindings: cache: Convert marvell,tauros2-cache to DT schema Convert the Marvell Tauros2 Cache binding to DT schema. Signed-off-by: Rob Herring (Arm) Reviewed-by: Andrew Lunn Signed-off-by: Conor Dooley --- .../bindings/cache/marvell,tauros2-cache.txt | 17 ---------- .../bindings/cache/marvell,tauros2-cache.yaml | 39 ++++++++++++++++++++++ 2 files changed, 39 insertions(+), 17 deletions(-) delete mode 100644 Documentation/devicetree/bindings/cache/marvell,tauros2-cache.txt create mode 100644 Documentation/devicetree/bindings/cache/marvell,tauros2-cache.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/cache/marvell,tauros2-cache.txt b/Documentation/devicetree/bindings/cache/marvell,tauros2-cache.txt deleted file mode 100644 index 31af1cbb60bd..000000000000 --- a/Documentation/devicetree/bindings/cache/marvell,tauros2-cache.txt +++ /dev/null @@ -1,17 +0,0 @@ -* Marvell Tauros2 Cache - -Required properties: -- compatible : Should be "marvell,tauros2-cache". -- marvell,tauros2-cache-features : Specify the features supported for the - tauros2 cache. - The features including - CACHE_TAUROS2_PREFETCH_ON (1 << 0) - CACHE_TAUROS2_LINEFILL_BURST8 (1 << 1) - The definition can be found at - arch/arm/include/asm/hardware/cache-tauros2.h - -Example: - L2: l2-cache { - compatible = "marvell,tauros2-cache"; - marvell,tauros2-cache-features = <0x3>; - }; diff --git a/Documentation/devicetree/bindings/cache/marvell,tauros2-cache.yaml b/Documentation/devicetree/bindings/cache/marvell,tauros2-cache.yaml new file mode 100644 index 000000000000..9f7f0d031631 --- /dev/null +++ b/Documentation/devicetree/bindings/cache/marvell,tauros2-cache.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/cache/marvell,tauros2-cache.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Tauros2 Cache + +maintainers: + - Andrew Lunn + - Gregory Clement + +properties: + compatible: + const: marvell,tauros2-cache + + marvell,tauros2-cache-features: + description: > + Specify the features supported for the tauros2 cache. The features include: + + - CACHE_TAUROS2_PREFETCH_ON (1 << 0) + - CACHE_TAUROS2_LINEFILL_BURST8 (1 << 1) + + The definition can be found at arch/arm/include/asm/hardware/cache-tauros2.h + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 0x3 + +required: + - compatible + - marvell,tauros2-cache-features + +additionalProperties: false + +examples: + - | + l2-cache { + compatible = "marvell,tauros2-cache"; + marvell,tauros2-cache-features = <0x3>; + }; -- cgit v1.2.3 From 6a4adb7349241c00cefde8c765c1f64382b17563 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Sat, 3 May 2025 00:37:59 +0200 Subject: dt-bindings: remoteproc: qcom,sm8350-pas: Add SC8280XP From the software POV, it matches the SM8350's implementation. Describe it as such, with a fallback. Signed-off-by: Konrad Dybcio Acked-by: Rob Herring (Arm) Tested-by: Dmitry Baryshkov # Lenovo X13s Link: https://lore.kernel.org/r/20250503-topic-8280_slpi-v1-1-9400a35574f7@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- .../bindings/remoteproc/qcom,sm8350-pas.yaml | 54 ++++++++++++---------- 1 file changed, 30 insertions(+), 24 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml index fd3423e6051b..6d09823153fc 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml @@ -15,16 +15,20 @@ description: properties: compatible: - enum: - - qcom,sar2130p-adsp-pas - - qcom,sm8350-adsp-pas - - qcom,sm8350-cdsp-pas - - qcom,sm8350-slpi-pas - - qcom,sm8350-mpss-pas - - qcom,sm8450-adsp-pas - - qcom,sm8450-cdsp-pas - - qcom,sm8450-mpss-pas - - qcom,sm8450-slpi-pas + oneOf: + - enum: + - qcom,sar2130p-adsp-pas + - qcom,sm8350-adsp-pas + - qcom,sm8350-cdsp-pas + - qcom,sm8350-slpi-pas + - qcom,sm8350-mpss-pas + - qcom,sm8450-adsp-pas + - qcom,sm8450-cdsp-pas + - qcom,sm8450-mpss-pas + - qcom,sm8450-slpi-pas + - items: + - const: qcom,sc8280xp-slpi-pas + - const: qcom,sm8350-slpi-pas reg: maxItems: 1 @@ -61,14 +65,15 @@ allOf: - if: properties: compatible: - enum: - - qcom,sar2130p-adsp-pas - - qcom,sm8350-adsp-pas - - qcom,sm8350-cdsp-pas - - qcom,sm8350-slpi-pas - - qcom,sm8450-adsp-pas - - qcom,sm8450-cdsp-pas - - qcom,sm8450-slpi-pas + contains: + enum: + - qcom,sar2130p-adsp-pas + - qcom,sm8350-adsp-pas + - qcom,sm8350-cdsp-pas + - qcom,sm8350-slpi-pas + - qcom,sm8450-adsp-pas + - qcom,sm8450-cdsp-pas + - qcom,sm8450-slpi-pas then: properties: interrupts: @@ -102,12 +107,13 @@ allOf: - if: properties: compatible: - enum: - - qcom,sar2130p-adsp-pas - - qcom,sm8350-adsp-pas - - qcom,sm8350-slpi-pas - - qcom,sm8450-adsp-pas - - qcom,sm8450-slpi-pas + contains: + enum: + - qcom,sar2130p-adsp-pas + - qcom,sm8350-adsp-pas + - qcom,sm8350-slpi-pas + - qcom,sm8450-adsp-pas + - qcom,sm8450-slpi-pas then: properties: power-domains: -- cgit v1.2.3 From b278981b5ac109e6f6986b20a5cb19654aba8f68 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 28 Apr 2025 09:52:44 +0200 Subject: dt-bindings: remoteproc: qcom,sm8150-pas: Add missing SC8180X compatible Commit 4b4ab93ddc5f ("dt-bindings: remoteproc: Consolidate SC8180X and SM8150 PAS files") moved SC8180X bindings from separate file into this one, but it forgot to add actual compatibles in top-level properties section making the entire binding un-selectable (no-op) for SC8180X PAS. Fixes: 4b4ab93ddc5f ("dt-bindings: remoteproc: Consolidate SC8180X and SM8150 PAS files") Cc: stable@vger.kernel.org Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250428075243.44256-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml index 56ff6386534d..5dcc2a32c080 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml @@ -16,6 +16,9 @@ description: properties: compatible: enum: + - qcom,sc8180x-adsp-pas + - qcom,sc8180x-cdsp-pas + - qcom,sc8180x-slpi-pas - qcom,sm8150-adsp-pas - qcom,sm8150-cdsp-pas - qcom,sm8150-mpss-pas -- cgit v1.2.3 From 13be8795761b7967261e19a26d13f6ce19e53b0a Mon Sep 17 00:00:00 2001 From: Chao Yu Date: Mon, 12 May 2025 19:55:14 +0800 Subject: f2fs: fix 32-bits hexademical number in fault injection doc FAULT_KMALLOC 0x000000001 There is one redundant '0' in 32-bits hexademical number of fault type, remove it. Signed-off-by: Chao Yu Signed-off-by: Jaegeuk Kim --- Documentation/ABI/testing/sysfs-fs-f2fs | 52 ++++++++++++++++----------------- Documentation/filesystems/f2fs.rst | 52 ++++++++++++++++----------------- 2 files changed, 52 insertions(+), 52 deletions(-) (limited to 'Documentation') diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs index feafb36fd921..e060798f9fc1 100644 --- a/Documentation/ABI/testing/sysfs-fs-f2fs +++ b/Documentation/ABI/testing/sysfs-fs-f2fs @@ -710,33 +710,33 @@ Description: Support configuring fault injection type, should be enabled with fault_injection option, fault type value is shown below, it supports single or combined type. - =========================== =========== + =========================== ========== Type_Name Type_Value - =========================== =========== - FAULT_KMALLOC 0x000000001 - FAULT_KVMALLOC 0x000000002 - FAULT_PAGE_ALLOC 0x000000004 - FAULT_PAGE_GET 0x000000008 - FAULT_ALLOC_BIO 0x000000010 (obsolete) - FAULT_ALLOC_NID 0x000000020 - FAULT_ORPHAN 0x000000040 - FAULT_BLOCK 0x000000080 - FAULT_DIR_DEPTH 0x000000100 - FAULT_EVICT_INODE 0x000000200 - FAULT_TRUNCATE 0x000000400 - FAULT_READ_IO 0x000000800 - FAULT_CHECKPOINT 0x000001000 - FAULT_DISCARD 0x000002000 - FAULT_WRITE_IO 0x000004000 - FAULT_SLAB_ALLOC 0x000008000 - FAULT_DQUOT_INIT 0x000010000 - FAULT_LOCK_OP 0x000020000 - FAULT_BLKADDR_VALIDITY 0x000040000 - FAULT_BLKADDR_CONSISTENCE 0x000080000 - FAULT_NO_SEGMENT 0x000100000 - FAULT_INCONSISTENT_FOOTER 0x000200000 - FAULT_TIMEOUT 0x000400000 (1000ms) - =========================== =========== + =========================== ========== + FAULT_KMALLOC 0x00000001 + FAULT_KVMALLOC 0x00000002 + FAULT_PAGE_ALLOC 0x00000004 + FAULT_PAGE_GET 0x00000008 + FAULT_ALLOC_BIO 0x00000010 (obsolete) + FAULT_ALLOC_NID 0x00000020 + FAULT_ORPHAN 0x00000040 + FAULT_BLOCK 0x00000080 + FAULT_DIR_DEPTH 0x00000100 + FAULT_EVICT_INODE 0x00000200 + FAULT_TRUNCATE 0x00000400 + FAULT_READ_IO 0x00000800 + FAULT_CHECKPOINT 0x00001000 + FAULT_DISCARD 0x00002000 + FAULT_WRITE_IO 0x00004000 + FAULT_SLAB_ALLOC 0x00008000 + FAULT_DQUOT_INIT 0x00010000 + FAULT_LOCK_OP 0x00020000 + FAULT_BLKADDR_VALIDITY 0x00040000 + FAULT_BLKADDR_CONSISTENCE 0x00080000 + FAULT_NO_SEGMENT 0x00100000 + FAULT_INCONSISTENT_FOOTER 0x00200000 + FAULT_TIMEOUT 0x00400000 (1000ms) + =========================== ========== What: /sys/fs/f2fs//discard_io_aware_gran Date: January 2023 diff --git a/Documentation/filesystems/f2fs.rst b/Documentation/filesystems/f2fs.rst index 157743ab107d..724fc5e2889a 100644 --- a/Documentation/filesystems/f2fs.rst +++ b/Documentation/filesystems/f2fs.rst @@ -182,33 +182,33 @@ fault_type=%d Support configuring fault injection type, should be enabled with fault_injection option, fault type value is shown below, it supports single or combined type. - =========================== =========== + =========================== ========== Type_Name Type_Value - =========================== =========== - FAULT_KMALLOC 0x000000001 - FAULT_KVMALLOC 0x000000002 - FAULT_PAGE_ALLOC 0x000000004 - FAULT_PAGE_GET 0x000000008 - FAULT_ALLOC_BIO 0x000000010 (obsolete) - FAULT_ALLOC_NID 0x000000020 - FAULT_ORPHAN 0x000000040 - FAULT_BLOCK 0x000000080 - FAULT_DIR_DEPTH 0x000000100 - FAULT_EVICT_INODE 0x000000200 - FAULT_TRUNCATE 0x000000400 - FAULT_READ_IO 0x000000800 - FAULT_CHECKPOINT 0x000001000 - FAULT_DISCARD 0x000002000 - FAULT_WRITE_IO 0x000004000 - FAULT_SLAB_ALLOC 0x000008000 - FAULT_DQUOT_INIT 0x000010000 - FAULT_LOCK_OP 0x000020000 - FAULT_BLKADDR_VALIDITY 0x000040000 - FAULT_BLKADDR_CONSISTENCE 0x000080000 - FAULT_NO_SEGMENT 0x000100000 - FAULT_INCONSISTENT_FOOTER 0x000200000 - FAULT_TIMEOUT 0x000400000 (1000ms) - =========================== =========== + =========================== ========== + FAULT_KMALLOC 0x00000001 + FAULT_KVMALLOC 0x00000002 + FAULT_PAGE_ALLOC 0x00000004 + FAULT_PAGE_GET 0x00000008 + FAULT_ALLOC_BIO 0x00000010 (obsolete) + FAULT_ALLOC_NID 0x00000020 + FAULT_ORPHAN 0x00000040 + FAULT_BLOCK 0x00000080 + FAULT_DIR_DEPTH 0x00000100 + FAULT_EVICT_INODE 0x00000200 + FAULT_TRUNCATE 0x00000400 + FAULT_READ_IO 0x00000800 + FAULT_CHECKPOINT 0x00001000 + FAULT_DISCARD 0x00002000 + FAULT_WRITE_IO 0x00004000 + FAULT_SLAB_ALLOC 0x00008000 + FAULT_DQUOT_INIT 0x00010000 + FAULT_LOCK_OP 0x00020000 + FAULT_BLKADDR_VALIDITY 0x00040000 + FAULT_BLKADDR_CONSISTENCE 0x00080000 + FAULT_NO_SEGMENT 0x00100000 + FAULT_INCONSISTENT_FOOTER 0x00200000 + FAULT_TIMEOUT 0x00400000 (1000ms) + =========================== ========== mode=%s Control block allocation mode which supports "adaptive" and "lfs". In "lfs" mode, there should be no random writes towards main area. -- cgit v1.2.3 From 79af71c5fe44f3973c666bab3e9e5845812d3b8b Mon Sep 17 00:00:00 2001 From: Khaled Elnaggar Date: Tue, 13 May 2025 04:58:59 +0300 Subject: docs: bpf: Fix bullet point formatting warning Fix indentation for a bullet list item in bpf_iterators.rst. According to reStructuredText rules, bullet list item bodies must be consistently indented relative to the bullet. The indentation of the first line after the bullet determines the alignment for the rest of the item body. Reported by smatch: /linux/Documentation/bpf/bpf_iterators.rst:55: WARNING: Bullet list ends without a blank line; unexpected unindent. [docutils] Fixes: 7220eabff8cb ("bpf, docs: document open-coded BPF iterators") Signed-off-by: Khaled Elnaggar Signed-off-by: Andrii Nakryiko Link: https://lore.kernel.org/bpf/20250513015901.475207-1-khaledelnaggarlinux@gmail.com --- Documentation/bpf/bpf_iterators.rst | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/bpf/bpf_iterators.rst b/Documentation/bpf/bpf_iterators.rst index 8f0a4a91b77a..189e3ec1c6c8 100644 --- a/Documentation/bpf/bpf_iterators.rst +++ b/Documentation/bpf/bpf_iterators.rst @@ -52,14 +52,14 @@ a pointer to this `struct bpf_iter_` as the very first argument. Additionally: - Constructor, i.e., `bpf_iter__new()`, can have arbitrary extra - number of arguments. Return type is not enforced either. + number of arguments. Return type is not enforced either. - Next method, i.e., `bpf_iter__next()`, has to return a pointer - type and should have exactly one argument: `struct bpf_iter_ *` - (const/volatile/restrict and typedefs are ignored). + type and should have exactly one argument: `struct bpf_iter_ *` + (const/volatile/restrict and typedefs are ignored). - Destructor, i.e., `bpf_iter__destroy()`, should return void and - should have exactly one argument, similar to the next method. + should have exactly one argument, similar to the next method. - `struct bpf_iter_` size is enforced to be positive and - a multiple of 8 bytes (to fit stack slots correctly). + a multiple of 8 bytes (to fit stack slots correctly). Such strictness and consistency allows to build generic helpers abstracting important, but boilerplate, details to be able to use open-coded iterators -- cgit v1.2.3 From fc5c669c902c3039aa41731b6c58c0960d0b1bbf Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Mon, 5 May 2025 15:56:26 +0300 Subject: dt-bindings: display: msm: correct example in SM8350 MDSS schema Fix the interconnects in the example to follow the schema changes. Fixes: 60b8d3a2365a ("dt-bindings: display: msm: sm8350-mdss: Describe the CPU-CFG icc path") Reported-by: Rob Herring Closes: http://lore.kernel.org/r/CAL_JsqKr8Xd8uxFzE0YJTyD+V6N++VV8SX-GB5Xt0_BKkeoGUQ@mail.gmail.com Signed-off-by: Dmitry Baryshkov Patchwork: https://patchwork.freedesktop.org/patch/651775/ Link: https://lore.kernel.org/r/20250505-sm8350-fix-example-v1-1-36d5d9ccba66@oss.qualcomm.com --- .../devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml index 3733d8cd2ae0..68176de854b3 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml @@ -92,6 +92,7 @@ examples: #include #include #include + #include #include #include @@ -101,8 +102,10 @@ examples: reg-names = "mdss"; interconnects = <&mmss_noc MASTER_MDP0 0 &mc_virt SLAVE_EBI1 0>, - <&mmss_noc MASTER_MDP1 0 &mc_virt SLAVE_EBI1 0>; - interconnect-names = "mdp0-mem", "mdp1-mem"; + <&mmss_noc MASTER_MDP1 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; + interconnect-names = "mdp0-mem", "mdp1-mem", "cpu-cfg"; power-domains = <&dispcc MDSS_GDSC>; resets = <&dispcc DISP_CC_MDSS_CORE_BCR>; -- cgit v1.2.3 From 051398f52b7cb0dbeda8da355b948fad3d23cb0f Mon Sep 17 00:00:00 2001 From: Jake Rice Date: Tue, 13 May 2025 13:03:44 -0400 Subject: Documentation: scheduler: Changed lowercase acronyms to uppercase Everywhere else in this doc, the dispatch queue acronym (DSQ) is uppercase. There were a couple places where the acronym was written in lowercase. I changed them to uppercase to make it homogeneous. Signed-off-by: Jake Rice Signed-off-by: Tejun Heo --- Documentation/scheduler/sched-ext.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/scheduler/sched-ext.rst b/Documentation/scheduler/sched-ext.rst index 0b2654e2164b..878762b6379d 100644 --- a/Documentation/scheduler/sched-ext.rst +++ b/Documentation/scheduler/sched-ext.rst @@ -197,8 +197,8 @@ Dispatch Queues To match the impedance between the scheduler core and the BPF scheduler, sched_ext uses DSQs (dispatch queues) which can operate as both a FIFO and a priority queue. By default, there is one global FIFO (``SCX_DSQ_GLOBAL``), -and one local dsq per CPU (``SCX_DSQ_LOCAL``). The BPF scheduler can manage -an arbitrary number of dsq's using ``scx_bpf_create_dsq()`` and +and one local DSQ per CPU (``SCX_DSQ_LOCAL``). The BPF scheduler can manage +an arbitrary number of DSQs using ``scx_bpf_create_dsq()`` and ``scx_bpf_destroy_dsq()``. A CPU always executes a task from its local DSQ. A task is "inserted" into a -- cgit v1.2.3 From a770647294bb679c48b5fbc49388f1d85e9f2e9f Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:18 -0400 Subject: cxl: update documentation structure in prep for new docs Restructure the cxl folder to make adding docs per-page cleaner. Signed-off-by: Gregory Price Reviewed-by: Dave Jiang Link: https://patch.msgid.link/20250512162134.3596150-2-gourry@gourry.net Signed-off-by: Dave Jiang --- .../driver-api/cxl/access-coordinates.rst | 91 ----- Documentation/driver-api/cxl/index.rst | 16 +- .../driver-api/cxl/linux/access-coordinates.rst | 91 +++++ Documentation/driver-api/cxl/memory-devices.rst | 398 --------------------- .../driver-api/cxl/theory-of-operation.rst | 398 +++++++++++++++++++++ 5 files changed, 502 insertions(+), 492 deletions(-) delete mode 100644 Documentation/driver-api/cxl/access-coordinates.rst create mode 100644 Documentation/driver-api/cxl/linux/access-coordinates.rst delete mode 100644 Documentation/driver-api/cxl/memory-devices.rst create mode 100644 Documentation/driver-api/cxl/theory-of-operation.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/access-coordinates.rst b/Documentation/driver-api/cxl/access-coordinates.rst deleted file mode 100644 index b07950ea30c9..000000000000 --- a/Documentation/driver-api/cxl/access-coordinates.rst +++ /dev/null @@ -1,91 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 -.. include:: - -================================== -CXL Access Coordinates Computation -================================== - -Shared Upstream Link Calculation -================================ -For certain CXL region construction with endpoints behind CXL switches (SW) or -Root Ports (RP), there is the possibility of the total bandwidth for all -the endpoints behind a switch being more than the switch upstream link. -A similar situation can occur within the host, upstream of the root ports. -The CXL driver performs an additional pass after all the targets have -arrived for a region in order to recalculate the bandwidths with possible -upstream link being a limiting factor in mind. - -The algorithm assumes the configuration is a symmetric topology as that -maximizes performance. When asymmetric topology is detected, the calculation -is aborted. An asymmetric topology is detected during topology walk where the -number of RPs detected as a grandparent is not equal to the number of devices -iterated in the same iteration loop. The assumption is made that subtle -asymmetry in properties does not happen and all paths to EPs are equal. - -There can be multiple switches under an RP. There can be multiple RPs under -a CXL Host Bridge (HB). There can be multiple HBs under a CXL Fixed Memory -Window Structure (CFMWS). - -An example hierarchy: - -> CFMWS 0 -> | -> _________|_________ -> | | -> ACPI0017-0 ACPI0017-1 -> GP0/HB0/ACPI0016-0 GP1/HB1/ACPI0016-1 -> | | | | -> RP0 RP1 RP2 RP3 -> | | | | -> SW 0 SW 1 SW 2 SW 3 -> | | | | | | | | -> EP0 EP1 EP2 EP3 EP4 EP5 EP6 EP7 - -Computation for the example hierarchy: - -Min (GP0 to CPU BW, - Min(SW 0 Upstream Link to RP0 BW, - Min(SW0SSLBIS for SW0DSP0 (EP0), EP0 DSLBIS, EP0 Upstream Link) + - Min(SW0SSLBIS for SW0DSP1 (EP1), EP1 DSLBIS, EP1 Upstream link)) + - Min(SW 1 Upstream Link to RP1 BW, - Min(SW1SSLBIS for SW1DSP0 (EP2), EP2 DSLBIS, EP2 Upstream Link) + - Min(SW1SSLBIS for SW1DSP1 (EP3), EP3 DSLBIS, EP3 Upstream link))) + -Min (GP1 to CPU BW, - Min(SW 2 Upstream Link to RP2 BW, - Min(SW2SSLBIS for SW2DSP0 (EP4), EP4 DSLBIS, EP4 Upstream Link) + - Min(SW2SSLBIS for SW2DSP1 (EP5), EP5 DSLBIS, EP5 Upstream link)) + - Min(SW 3 Upstream Link to RP3 BW, - Min(SW3SSLBIS for SW3DSP0 (EP6), EP6 DSLBIS, EP6 Upstream Link) + - Min(SW3SSLBIS for SW3DSP1 (EP7), EP7 DSLBIS, EP7 Upstream link)))) - -The calculation starts at cxl_region_shared_upstream_perf_update(). A xarray -is created to collect all the endpoint bandwidths via the -cxl_endpoint_gather_bandwidth() function. The min() of bandwidth from the -endpoint CDAT and the upstream link bandwidth is calculated. If the endpoint -has a CXL switch as a parent, then min() of calculated bandwidth and the -bandwidth from the SSLBIS for the switch downstream port that is associated -with the endpoint is calculated. The final bandwidth is stored in a -'struct cxl_perf_ctx' in the xarray indexed by a device pointer. If the -endpoint is direct attached to a root port (RP), the device pointer would be an -RP device. If the endpoint is behind a switch, the device pointer would be the -upstream device of the parent switch. - -At the next stage, the code walks through one or more switches if they exist -in the topology. For endpoints directly attached to RPs, this step is skipped. -If there is another switch upstream, the code takes the min() of the current -gathered bandwidth and the upstream link bandwidth. If there's a switch -upstream, then the SSLBIS of the upstream switch. - -Once the topology walk reaches the RP, whether it's direct attached endpoints -or walking through the switch(es), cxl_rp_gather_bandwidth() is called. At -this point all the bandwidths are aggregated per each host bridge, which is -also the index for the resulting xarray. - -The next step is to take the min() of the per host bridge bandwidth and the -bandwidth from the Generic Port (GP). The bandwidths for the GP is retrieved -via ACPI tables SRAT/HMAT. The min bandwidth are aggregated under the same -ACPI0017 device to form a new xarray. - -Finally, the cxl_region_update_bandwidth() is called and the aggregated -bandwidth from all the members of the last xarray is updated for the -access coordinates residing in the cxl region (cxlr) context. diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-api/cxl/index.rst index 965ba90e8fb7..fe1594dc6778 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -4,12 +4,22 @@ Compute Express Link ==================== +CXL device configuration has a complex handoff between platform (Hardware, +BIOS, EFI), OS (early boot, core kernel, driver), and user policy decisions +that have impacts on each other. The docs here break up configurations steps. + +.. toctree:: + :maxdepth: 2 + :caption: Overview + + theory-of-operation + maturity-map + .. toctree:: :maxdepth: 1 + :caption: Linux Kernel Configuration - memory-devices - access-coordinates + linux/access-coordinates - maturity-map .. only:: subproject and html diff --git a/Documentation/driver-api/cxl/linux/access-coordinates.rst b/Documentation/driver-api/cxl/linux/access-coordinates.rst new file mode 100644 index 000000000000..b07950ea30c9 --- /dev/null +++ b/Documentation/driver-api/cxl/linux/access-coordinates.rst @@ -0,0 +1,91 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. include:: + +================================== +CXL Access Coordinates Computation +================================== + +Shared Upstream Link Calculation +================================ +For certain CXL region construction with endpoints behind CXL switches (SW) or +Root Ports (RP), there is the possibility of the total bandwidth for all +the endpoints behind a switch being more than the switch upstream link. +A similar situation can occur within the host, upstream of the root ports. +The CXL driver performs an additional pass after all the targets have +arrived for a region in order to recalculate the bandwidths with possible +upstream link being a limiting factor in mind. + +The algorithm assumes the configuration is a symmetric topology as that +maximizes performance. When asymmetric topology is detected, the calculation +is aborted. An asymmetric topology is detected during topology walk where the +number of RPs detected as a grandparent is not equal to the number of devices +iterated in the same iteration loop. The assumption is made that subtle +asymmetry in properties does not happen and all paths to EPs are equal. + +There can be multiple switches under an RP. There can be multiple RPs under +a CXL Host Bridge (HB). There can be multiple HBs under a CXL Fixed Memory +Window Structure (CFMWS). + +An example hierarchy: + +> CFMWS 0 +> | +> _________|_________ +> | | +> ACPI0017-0 ACPI0017-1 +> GP0/HB0/ACPI0016-0 GP1/HB1/ACPI0016-1 +> | | | | +> RP0 RP1 RP2 RP3 +> | | | | +> SW 0 SW 1 SW 2 SW 3 +> | | | | | | | | +> EP0 EP1 EP2 EP3 EP4 EP5 EP6 EP7 + +Computation for the example hierarchy: + +Min (GP0 to CPU BW, + Min(SW 0 Upstream Link to RP0 BW, + Min(SW0SSLBIS for SW0DSP0 (EP0), EP0 DSLBIS, EP0 Upstream Link) + + Min(SW0SSLBIS for SW0DSP1 (EP1), EP1 DSLBIS, EP1 Upstream link)) + + Min(SW 1 Upstream Link to RP1 BW, + Min(SW1SSLBIS for SW1DSP0 (EP2), EP2 DSLBIS, EP2 Upstream Link) + + Min(SW1SSLBIS for SW1DSP1 (EP3), EP3 DSLBIS, EP3 Upstream link))) + +Min (GP1 to CPU BW, + Min(SW 2 Upstream Link to RP2 BW, + Min(SW2SSLBIS for SW2DSP0 (EP4), EP4 DSLBIS, EP4 Upstream Link) + + Min(SW2SSLBIS for SW2DSP1 (EP5), EP5 DSLBIS, EP5 Upstream link)) + + Min(SW 3 Upstream Link to RP3 BW, + Min(SW3SSLBIS for SW3DSP0 (EP6), EP6 DSLBIS, EP6 Upstream Link) + + Min(SW3SSLBIS for SW3DSP1 (EP7), EP7 DSLBIS, EP7 Upstream link)))) + +The calculation starts at cxl_region_shared_upstream_perf_update(). A xarray +is created to collect all the endpoint bandwidths via the +cxl_endpoint_gather_bandwidth() function. The min() of bandwidth from the +endpoint CDAT and the upstream link bandwidth is calculated. If the endpoint +has a CXL switch as a parent, then min() of calculated bandwidth and the +bandwidth from the SSLBIS for the switch downstream port that is associated +with the endpoint is calculated. The final bandwidth is stored in a +'struct cxl_perf_ctx' in the xarray indexed by a device pointer. If the +endpoint is direct attached to a root port (RP), the device pointer would be an +RP device. If the endpoint is behind a switch, the device pointer would be the +upstream device of the parent switch. + +At the next stage, the code walks through one or more switches if they exist +in the topology. For endpoints directly attached to RPs, this step is skipped. +If there is another switch upstream, the code takes the min() of the current +gathered bandwidth and the upstream link bandwidth. If there's a switch +upstream, then the SSLBIS of the upstream switch. + +Once the topology walk reaches the RP, whether it's direct attached endpoints +or walking through the switch(es), cxl_rp_gather_bandwidth() is called. At +this point all the bandwidths are aggregated per each host bridge, which is +also the index for the resulting xarray. + +The next step is to take the min() of the per host bridge bandwidth and the +bandwidth from the Generic Port (GP). The bandwidths for the GP is retrieved +via ACPI tables SRAT/HMAT. The min bandwidth are aggregated under the same +ACPI0017 device to form a new xarray. + +Finally, the cxl_region_update_bandwidth() is called and the aggregated +bandwidth from all the members of the last xarray is updated for the +access coordinates residing in the cxl region (cxlr) context. diff --git a/Documentation/driver-api/cxl/memory-devices.rst b/Documentation/driver-api/cxl/memory-devices.rst deleted file mode 100644 index d732c42526df..000000000000 --- a/Documentation/driver-api/cxl/memory-devices.rst +++ /dev/null @@ -1,398 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 -.. include:: - -=================================== -Compute Express Link Memory Devices -=================================== - -A Compute Express Link Memory Device is a CXL component that implements the -CXL.mem protocol. It contains some amount of volatile memory, persistent memory, -or both. It is enumerated as a PCI device for configuration and passing -messages over an MMIO mailbox. Its contribution to the System Physical -Address space is handled via HDM (Host Managed Device Memory) decoders -that optionally define a device's contribution to an interleaved address -range across multiple devices underneath a host-bridge or interleaved -across host-bridges. - -CXL Bus: Theory of Operation -============================ -Similar to how a RAID driver takes disk objects and assembles them into a new -logical device, the CXL subsystem is tasked to take PCIe and ACPI objects and -assemble them into a CXL.mem decode topology. The need for runtime configuration -of the CXL.mem topology is also similar to RAID in that different environments -with the same hardware configuration may decide to assemble the topology in -contrasting ways. One may choose performance (RAID0) striping memory across -multiple Host Bridges and endpoints while another may opt for fault tolerance -and disable any striping in the CXL.mem topology. - -Platform firmware enumerates a menu of interleave options at the "CXL root port" -(Linux term for the top of the CXL decode topology). From there, PCIe topology -dictates which endpoints can participate in which Host Bridge decode regimes. -Each PCIe Switch in the path between the root and an endpoint introduces a point -at which the interleave can be split. For example platform firmware may say at a -given range only decodes to 1 one Host Bridge, but that Host Bridge may in turn -interleave cycles across multiple Root Ports. An intervening Switch between a -port and an endpoint may interleave cycles across multiple Downstream Switch -Ports, etc. - -Here is a sample listing of a CXL topology defined by 'cxl_test'. The 'cxl_test' -module generates an emulated CXL topology of 2 Host Bridges each with 2 Root -Ports. Each of those Root Ports are connected to 2-way switches with endpoints -connected to those downstream ports for a total of 8 endpoints:: - - # cxl list -BEMPu -b cxl_test - { - "bus":"root3", - "provider":"cxl_test", - "ports:root3":[ - { - "port":"port5", - "host":"cxl_host_bridge.1", - "ports:port5":[ - { - "port":"port8", - "host":"cxl_switch_uport.1", - "endpoints:port8":[ - { - "endpoint":"endpoint9", - "host":"mem2", - "memdev":{ - "memdev":"mem2", - "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":"256.00 MiB (268.44 MB)", - "serial":"0x1", - "numa_node":1, - "host":"cxl_mem.1" - } - }, - { - "endpoint":"endpoint15", - "host":"mem6", - "memdev":{ - "memdev":"mem6", - "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":"256.00 MiB (268.44 MB)", - "serial":"0x5", - "numa_node":1, - "host":"cxl_mem.5" - } - } - ] - }, - { - "port":"port12", - "host":"cxl_switch_uport.3", - "endpoints:port12":[ - { - "endpoint":"endpoint17", - "host":"mem8", - "memdev":{ - "memdev":"mem8", - "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":"256.00 MiB (268.44 MB)", - "serial":"0x7", - "numa_node":1, - "host":"cxl_mem.7" - } - }, - { - "endpoint":"endpoint13", - "host":"mem4", - "memdev":{ - "memdev":"mem4", - "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":"256.00 MiB (268.44 MB)", - "serial":"0x3", - "numa_node":1, - "host":"cxl_mem.3" - } - } - ] - } - ] - }, - { - "port":"port4", - "host":"cxl_host_bridge.0", - "ports:port4":[ - { - "port":"port6", - "host":"cxl_switch_uport.0", - "endpoints:port6":[ - { - "endpoint":"endpoint7", - "host":"mem1", - "memdev":{ - "memdev":"mem1", - "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":"256.00 MiB (268.44 MB)", - "serial":"0", - "numa_node":0, - "host":"cxl_mem.0" - } - }, - { - "endpoint":"endpoint14", - "host":"mem5", - "memdev":{ - "memdev":"mem5", - "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":"256.00 MiB (268.44 MB)", - "serial":"0x4", - "numa_node":0, - "host":"cxl_mem.4" - } - } - ] - }, - { - "port":"port10", - "host":"cxl_switch_uport.2", - "endpoints:port10":[ - { - "endpoint":"endpoint16", - "host":"mem7", - "memdev":{ - "memdev":"mem7", - "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":"256.00 MiB (268.44 MB)", - "serial":"0x6", - "numa_node":0, - "host":"cxl_mem.6" - } - }, - { - "endpoint":"endpoint11", - "host":"mem3", - "memdev":{ - "memdev":"mem3", - "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":"256.00 MiB (268.44 MB)", - "serial":"0x2", - "numa_node":0, - "host":"cxl_mem.2" - } - } - ] - } - ] - } - ] - } - -In that listing each "root", "port", and "endpoint" object correspond a kernel -'struct cxl_port' object. A 'cxl_port' is a device that can decode CXL.mem to -its descendants. So "root" claims non-PCIe enumerable platform decode ranges and -decodes them to "ports", "ports" decode to "endpoints", and "endpoints" -represent the decode from SPA (System Physical Address) to DPA (Device Physical -Address). - -Continuing the RAID analogy, disks have both topology metadata and on device -metadata that determine RAID set assembly. CXL Port topology and CXL Port link -status is metadata for CXL.mem set assembly. The CXL Port topology is enumerated -by the arrival of a CXL.mem device. I.e. unless and until the PCIe core attaches -the cxl_pci driver to a CXL Memory Expander there is no role for CXL Port -objects. Conversely for hot-unplug / removal scenarios, there is no need for -the Linux PCI core to tear down switch-level CXL resources because the endpoint -->remove() event cleans up the port data that was established to support that -Memory Expander. - -The port metadata and potential decode schemes that a give memory device may -participate can be determined via a command like:: - - # cxl list -BDMu -d root -m mem3 - { - "bus":"root3", - "provider":"cxl_test", - "decoders:root3":[ - { - "decoder":"decoder3.1", - "resource":"0x8030000000", - "size":"512.00 MiB (536.87 MB)", - "volatile_capable":true, - "nr_targets":2 - }, - { - "decoder":"decoder3.3", - "resource":"0x8060000000", - "size":"512.00 MiB (536.87 MB)", - "pmem_capable":true, - "nr_targets":2 - }, - { - "decoder":"decoder3.0", - "resource":"0x8020000000", - "size":"256.00 MiB (268.44 MB)", - "volatile_capable":true, - "nr_targets":1 - }, - { - "decoder":"decoder3.2", - "resource":"0x8050000000", - "size":"256.00 MiB (268.44 MB)", - "pmem_capable":true, - "nr_targets":1 - } - ], - "memdevs:root3":[ - { - "memdev":"mem3", - "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":"256.00 MiB (268.44 MB)", - "serial":"0x2", - "numa_node":0, - "host":"cxl_mem.2" - } - ] - } - -...which queries the CXL topology to ask "given CXL Memory Expander with a kernel -device name of 'mem3' which platform level decode ranges may this device -participate". A given expander can participate in multiple CXL.mem interleave -sets simultaneously depending on how many decoder resource it has. In this -example mem3 can participate in one or more of a PMEM interleave that spans to -Host Bridges, a PMEM interleave that targets a single Host Bridge, a Volatile -memory interleave that spans 2 Host Bridges, and a Volatile memory interleave -that only targets a single Host Bridge. - -Conversely the memory devices that can participate in a given platform level -decode scheme can be determined via a command like the following:: - - # cxl list -MDu -d 3.2 - [ - { - "memdevs":[ - { - "memdev":"mem1", - "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":"256.00 MiB (268.44 MB)", - "serial":"0", - "numa_node":0, - "host":"cxl_mem.0" - }, - { - "memdev":"mem5", - "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":"256.00 MiB (268.44 MB)", - "serial":"0x4", - "numa_node":0, - "host":"cxl_mem.4" - }, - { - "memdev":"mem7", - "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":"256.00 MiB (268.44 MB)", - "serial":"0x6", - "numa_node":0, - "host":"cxl_mem.6" - }, - { - "memdev":"mem3", - "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":"256.00 MiB (268.44 MB)", - "serial":"0x2", - "numa_node":0, - "host":"cxl_mem.2" - } - ] - }, - { - "root decoders":[ - { - "decoder":"decoder3.2", - "resource":"0x8050000000", - "size":"256.00 MiB (268.44 MB)", - "pmem_capable":true, - "nr_targets":1 - } - ] - } - ] - -...where the naming scheme for decoders is "decoder.". - -Driver Infrastructure -===================== - -This section covers the driver infrastructure for a CXL memory device. - -CXL Memory Device ------------------ - -.. kernel-doc:: drivers/cxl/pci.c - :doc: cxl pci - -.. kernel-doc:: drivers/cxl/pci.c - :internal: - -.. kernel-doc:: drivers/cxl/mem.c - :doc: cxl mem - -.. kernel-doc:: drivers/cxl/cxlmem.h - :internal: - -.. kernel-doc:: drivers/cxl/core/memdev.c - :identifiers: - -CXL Port --------- -.. kernel-doc:: drivers/cxl/port.c - :doc: cxl port - -CXL Core --------- -.. kernel-doc:: drivers/cxl/cxl.h - :doc: cxl objects - -.. kernel-doc:: drivers/cxl/cxl.h - :internal: - -.. kernel-doc:: drivers/cxl/core/hdm.c - :doc: cxl core hdm - -.. kernel-doc:: drivers/cxl/core/hdm.c - :identifiers: - -.. kernel-doc:: drivers/cxl/core/cdat.c - :identifiers: - -.. kernel-doc:: drivers/cxl/core/port.c - :doc: cxl core - -.. kernel-doc:: drivers/cxl/core/port.c - :identifiers: - -.. kernel-doc:: drivers/cxl/core/pci.c - :doc: cxl core pci - -.. kernel-doc:: drivers/cxl/core/pci.c - :identifiers: - -.. kernel-doc:: drivers/cxl/core/pmem.c - :doc: cxl pmem - -.. kernel-doc:: drivers/cxl/core/regs.c - :doc: cxl registers - -.. kernel-doc:: drivers/cxl/core/mbox.c - :doc: cxl mbox - -CXL Regions ------------ -.. kernel-doc:: drivers/cxl/core/region.c - :doc: cxl core region - -.. kernel-doc:: drivers/cxl/core/region.c - :identifiers: - -External Interfaces -=================== - -CXL IOCTL Interface -------------------- - -.. kernel-doc:: include/uapi/linux/cxl_mem.h - :doc: UAPI - -.. kernel-doc:: include/uapi/linux/cxl_mem.h - :internal: diff --git a/Documentation/driver-api/cxl/theory-of-operation.rst b/Documentation/driver-api/cxl/theory-of-operation.rst new file mode 100644 index 000000000000..32739e253453 --- /dev/null +++ b/Documentation/driver-api/cxl/theory-of-operation.rst @@ -0,0 +1,398 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. include:: + +=============================================== +Compute Express Link Driver Theory of Operation +=============================================== + +A Compute Express Link Memory Device is a CXL component that implements the +CXL.mem protocol. It contains some amount of volatile memory, persistent memory, +or both. It is enumerated as a PCI device for configuration and passing +messages over an MMIO mailbox. Its contribution to the System Physical +Address space is handled via HDM (Host Managed Device Memory) decoders +that optionally define a device's contribution to an interleaved address +range across multiple devices underneath a host-bridge or interleaved +across host-bridges. + +The CXL Bus +=========== +Similar to how a RAID driver takes disk objects and assembles them into a new +logical device, the CXL subsystem is tasked to take PCIe and ACPI objects and +assemble them into a CXL.mem decode topology. The need for runtime configuration +of the CXL.mem topology is also similar to RAID in that different environments +with the same hardware configuration may decide to assemble the topology in +contrasting ways. One may choose performance (RAID0) striping memory across +multiple Host Bridges and endpoints while another may opt for fault tolerance +and disable any striping in the CXL.mem topology. + +Platform firmware enumerates a menu of interleave options at the "CXL root port" +(Linux term for the top of the CXL decode topology). From there, PCIe topology +dictates which endpoints can participate in which Host Bridge decode regimes. +Each PCIe Switch in the path between the root and an endpoint introduces a point +at which the interleave can be split. For example platform firmware may say at a +given range only decodes to 1 one Host Bridge, but that Host Bridge may in turn +interleave cycles across multiple Root Ports. An intervening Switch between a +port and an endpoint may interleave cycles across multiple Downstream Switch +Ports, etc. + +Here is a sample listing of a CXL topology defined by 'cxl_test'. The 'cxl_test' +module generates an emulated CXL topology of 2 Host Bridges each with 2 Root +Ports. Each of those Root Ports are connected to 2-way switches with endpoints +connected to those downstream ports for a total of 8 endpoints:: + + # cxl list -BEMPu -b cxl_test + { + "bus":"root3", + "provider":"cxl_test", + "ports:root3":[ + { + "port":"port5", + "host":"cxl_host_bridge.1", + "ports:port5":[ + { + "port":"port8", + "host":"cxl_switch_uport.1", + "endpoints:port8":[ + { + "endpoint":"endpoint9", + "host":"mem2", + "memdev":{ + "memdev":"mem2", + "pmem_size":"256.00 MiB (268.44 MB)", + "ram_size":"256.00 MiB (268.44 MB)", + "serial":"0x1", + "numa_node":1, + "host":"cxl_mem.1" + } + }, + { + "endpoint":"endpoint15", + "host":"mem6", + "memdev":{ + "memdev":"mem6", + "pmem_size":"256.00 MiB (268.44 MB)", + "ram_size":"256.00 MiB (268.44 MB)", + "serial":"0x5", + "numa_node":1, + "host":"cxl_mem.5" + } + } + ] + }, + { + "port":"port12", + "host":"cxl_switch_uport.3", + "endpoints:port12":[ + { + "endpoint":"endpoint17", + "host":"mem8", + "memdev":{ + "memdev":"mem8", + "pmem_size":"256.00 MiB (268.44 MB)", + "ram_size":"256.00 MiB (268.44 MB)", + "serial":"0x7", + "numa_node":1, + "host":"cxl_mem.7" + } + }, + { + "endpoint":"endpoint13", + "host":"mem4", + "memdev":{ + "memdev":"mem4", + "pmem_size":"256.00 MiB (268.44 MB)", + "ram_size":"256.00 MiB (268.44 MB)", + "serial":"0x3", + "numa_node":1, + "host":"cxl_mem.3" + } + } + ] + } + ] + }, + { + "port":"port4", + "host":"cxl_host_bridge.0", + "ports:port4":[ + { + "port":"port6", + "host":"cxl_switch_uport.0", + "endpoints:port6":[ + { + "endpoint":"endpoint7", + "host":"mem1", + "memdev":{ + "memdev":"mem1", + "pmem_size":"256.00 MiB (268.44 MB)", + "ram_size":"256.00 MiB (268.44 MB)", + "serial":"0", + "numa_node":0, + "host":"cxl_mem.0" + } + }, + { + "endpoint":"endpoint14", + "host":"mem5", + "memdev":{ + "memdev":"mem5", + "pmem_size":"256.00 MiB (268.44 MB)", + "ram_size":"256.00 MiB (268.44 MB)", + "serial":"0x4", + "numa_node":0, + "host":"cxl_mem.4" + } + } + ] + }, + { + "port":"port10", + "host":"cxl_switch_uport.2", + "endpoints:port10":[ + { + "endpoint":"endpoint16", + "host":"mem7", + "memdev":{ + "memdev":"mem7", + "pmem_size":"256.00 MiB (268.44 MB)", + "ram_size":"256.00 MiB (268.44 MB)", + "serial":"0x6", + "numa_node":0, + "host":"cxl_mem.6" + } + }, + { + "endpoint":"endpoint11", + "host":"mem3", + "memdev":{ + "memdev":"mem3", + "pmem_size":"256.00 MiB (268.44 MB)", + "ram_size":"256.00 MiB (268.44 MB)", + "serial":"0x2", + "numa_node":0, + "host":"cxl_mem.2" + } + } + ] + } + ] + } + ] + } + +In that listing each "root", "port", and "endpoint" object correspond a kernel +'struct cxl_port' object. A 'cxl_port' is a device that can decode CXL.mem to +its descendants. So "root" claims non-PCIe enumerable platform decode ranges and +decodes them to "ports", "ports" decode to "endpoints", and "endpoints" +represent the decode from SPA (System Physical Address) to DPA (Device Physical +Address). + +Continuing the RAID analogy, disks have both topology metadata and on device +metadata that determine RAID set assembly. CXL Port topology and CXL Port link +status is metadata for CXL.mem set assembly. The CXL Port topology is enumerated +by the arrival of a CXL.mem device. I.e. unless and until the PCIe core attaches +the cxl_pci driver to a CXL Memory Expander there is no role for CXL Port +objects. Conversely for hot-unplug / removal scenarios, there is no need for +the Linux PCI core to tear down switch-level CXL resources because the endpoint +->remove() event cleans up the port data that was established to support that +Memory Expander. + +The port metadata and potential decode schemes that a give memory device may +participate can be determined via a command like:: + + # cxl list -BDMu -d root -m mem3 + { + "bus":"root3", + "provider":"cxl_test", + "decoders:root3":[ + { + "decoder":"decoder3.1", + "resource":"0x8030000000", + "size":"512.00 MiB (536.87 MB)", + "volatile_capable":true, + "nr_targets":2 + }, + { + "decoder":"decoder3.3", + "resource":"0x8060000000", + "size":"512.00 MiB (536.87 MB)", + "pmem_capable":true, + "nr_targets":2 + }, + { + "decoder":"decoder3.0", + "resource":"0x8020000000", + "size":"256.00 MiB (268.44 MB)", + "volatile_capable":true, + "nr_targets":1 + }, + { + "decoder":"decoder3.2", + "resource":"0x8050000000", + "size":"256.00 MiB (268.44 MB)", + "pmem_capable":true, + "nr_targets":1 + } + ], + "memdevs:root3":[ + { + "memdev":"mem3", + "pmem_size":"256.00 MiB (268.44 MB)", + "ram_size":"256.00 MiB (268.44 MB)", + "serial":"0x2", + "numa_node":0, + "host":"cxl_mem.2" + } + ] + } + +...which queries the CXL topology to ask "given CXL Memory Expander with a kernel +device name of 'mem3' which platform level decode ranges may this device +participate". A given expander can participate in multiple CXL.mem interleave +sets simultaneously depending on how many decoder resource it has. In this +example mem3 can participate in one or more of a PMEM interleave that spans to +Host Bridges, a PMEM interleave that targets a single Host Bridge, a Volatile +memory interleave that spans 2 Host Bridges, and a Volatile memory interleave +that only targets a single Host Bridge. + +Conversely the memory devices that can participate in a given platform level +decode scheme can be determined via a command like the following:: + + # cxl list -MDu -d 3.2 + [ + { + "memdevs":[ + { + "memdev":"mem1", + "pmem_size":"256.00 MiB (268.44 MB)", + "ram_size":"256.00 MiB (268.44 MB)", + "serial":"0", + "numa_node":0, + "host":"cxl_mem.0" + }, + { + "memdev":"mem5", + "pmem_size":"256.00 MiB (268.44 MB)", + "ram_size":"256.00 MiB (268.44 MB)", + "serial":"0x4", + "numa_node":0, + "host":"cxl_mem.4" + }, + { + "memdev":"mem7", + "pmem_size":"256.00 MiB (268.44 MB)", + "ram_size":"256.00 MiB (268.44 MB)", + "serial":"0x6", + "numa_node":0, + "host":"cxl_mem.6" + }, + { + "memdev":"mem3", + "pmem_size":"256.00 MiB (268.44 MB)", + "ram_size":"256.00 MiB (268.44 MB)", + "serial":"0x2", + "numa_node":0, + "host":"cxl_mem.2" + } + ] + }, + { + "root decoders":[ + { + "decoder":"decoder3.2", + "resource":"0x8050000000", + "size":"256.00 MiB (268.44 MB)", + "pmem_capable":true, + "nr_targets":1 + } + ] + } + ] + +...where the naming scheme for decoders is "decoder.". + +Driver Infrastructure +===================== + +This section covers the driver infrastructure for a CXL memory device. + +CXL Memory Device +----------------- + +.. kernel-doc:: drivers/cxl/pci.c + :doc: cxl pci + +.. kernel-doc:: drivers/cxl/pci.c + :internal: + +.. kernel-doc:: drivers/cxl/mem.c + :doc: cxl mem + +.. kernel-doc:: drivers/cxl/cxlmem.h + :internal: + +.. kernel-doc:: drivers/cxl/core/memdev.c + :identifiers: + +CXL Port +-------- +.. kernel-doc:: drivers/cxl/port.c + :doc: cxl port + +CXL Core +-------- +.. kernel-doc:: drivers/cxl/cxl.h + :doc: cxl objects + +.. kernel-doc:: drivers/cxl/cxl.h + :internal: + +.. kernel-doc:: drivers/cxl/core/hdm.c + :doc: cxl core hdm + +.. kernel-doc:: drivers/cxl/core/hdm.c + :identifiers: + +.. kernel-doc:: drivers/cxl/core/cdat.c + :identifiers: + +.. kernel-doc:: drivers/cxl/core/port.c + :doc: cxl core + +.. kernel-doc:: drivers/cxl/core/port.c + :identifiers: + +.. kernel-doc:: drivers/cxl/core/pci.c + :doc: cxl core pci + +.. kernel-doc:: drivers/cxl/core/pci.c + :identifiers: + +.. kernel-doc:: drivers/cxl/core/pmem.c + :doc: cxl pmem + +.. kernel-doc:: drivers/cxl/core/regs.c + :doc: cxl registers + +.. kernel-doc:: drivers/cxl/core/mbox.c + :doc: cxl mbox + +CXL Regions +----------- +.. kernel-doc:: drivers/cxl/core/region.c + :doc: cxl core region + +.. kernel-doc:: drivers/cxl/core/region.c + :identifiers: + +External Interfaces +=================== + +CXL IOCTL Interface +------------------- + +.. kernel-doc:: include/uapi/linux/cxl_mem.h + :doc: UAPI + +.. kernel-doc:: include/uapi/linux/cxl_mem.h + :internal: -- cgit v1.2.3 From a3bf6b417b99b12db7b6c2d007c89a5623f9be0c Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:19 -0400 Subject: cxl: docs - access-coordinates doc fixups Place the hierarchy diagram in access-coordinates.rst in a code block. Fix a few grammar issues. Suggested-by: Randy Dunlap Suggested-by: Bagas Sanjaya Signed-off-by: Gregory Price Reviewed-by: Dave Jiang Link: https://patch.msgid.link/20250512162134.3596150-3-gourry@gourry.net Signed-off-by: Dave Jiang --- .../driver-api/cxl/linux/access-coordinates.rst | 30 +++++++++++----------- 1 file changed, 15 insertions(+), 15 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/linux/access-coordinates.rst b/Documentation/driver-api/cxl/linux/access-coordinates.rst index b07950ea30c9..e408ecbc4038 100644 --- a/Documentation/driver-api/cxl/linux/access-coordinates.rst +++ b/Documentation/driver-api/cxl/linux/access-coordinates.rst @@ -26,20 +26,20 @@ There can be multiple switches under an RP. There can be multiple RPs under a CXL Host Bridge (HB). There can be multiple HBs under a CXL Fixed Memory Window Structure (CFMWS). -An example hierarchy: +An example hierarchy:: -> CFMWS 0 -> | -> _________|_________ -> | | -> ACPI0017-0 ACPI0017-1 -> GP0/HB0/ACPI0016-0 GP1/HB1/ACPI0016-1 -> | | | | -> RP0 RP1 RP2 RP3 -> | | | | -> SW 0 SW 1 SW 2 SW 3 -> | | | | | | | | -> EP0 EP1 EP2 EP3 EP4 EP5 EP6 EP7 + CFMWS 0 + | + _________|_________ + | | + ACPI0017-0 ACPI0017-1 + GP0/HB0/ACPI0016-0 GP1/HB1/ACPI0016-1 + | | | | + RP0 RP1 RP2 RP3 + | | | | + SW 0 SW 1 SW 2 SW 3 + | | | | | | | | + EP0 EP1 EP2 EP3 EP4 EP5 EP6 EP7 Computation for the example hierarchy: @@ -82,8 +82,8 @@ this point all the bandwidths are aggregated per each host bridge, which is also the index for the resulting xarray. The next step is to take the min() of the per host bridge bandwidth and the -bandwidth from the Generic Port (GP). The bandwidths for the GP is retrieved -via ACPI tables SRAT/HMAT. The min bandwidth are aggregated under the same +bandwidth from the Generic Port (GP). The bandwidths for the GP are retrieved +via ACPI tables SRAT/HMAT. The minimum bandwidth are aggregated under the same ACPI0017 device to form a new xarray. Finally, the cxl_region_update_bandwidth() is called and the aggregated -- cgit v1.2.3 From 750d662c555227b14e8e3b11384e925265174af7 Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:20 -0400 Subject: cxl: docs/devices - add cxl device and protocol reference Add a simple device primer sufficient to understand the theory of operation documentation. Signed-off-by: Gregory Price Link: https://patch.msgid.link/20250512162134.3596150-4-gourry@gourry.net Signed-off-by: Dave Jiang --- .../driver-api/cxl/devices/device-types.rst | 165 +++++++++++++++++++++ Documentation/driver-api/cxl/index.rst | 6 + 2 files changed, 171 insertions(+) create mode 100644 Documentation/driver-api/cxl/devices/device-types.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/devices/device-types.rst b/Documentation/driver-api/cxl/devices/device-types.rst new file mode 100644 index 000000000000..c70564cf0be3 --- /dev/null +++ b/Documentation/driver-api/cxl/devices/device-types.rst @@ -0,0 +1,165 @@ +.. SPDX-License-Identifier: GPL-2.0 + +===================== +Devices and Protocols +===================== + +The type of CXL device (Memory, Accelerator, etc) dictates many configuration steps. This section +covers some basic background on device types and on-device resources used by the platform and OS +which impact configuration. + +Protocols +========= + +There are three core protocols to CXL. For the purpose of this documentation, +we will only discuss very high level definitions as the specific hardware +details are largely abstracted away from Linux. See the CXL specification +for more details. + +CXL.io +------ +The basic interaction protocol, similar to PCIe configuration mechanisms. +Typically used for initialization, configuration, and I/O access for anything +other than memory (CXL.mem) or cache (CXL.cache) operations. + +The Linux CXL driver exposes access to .io functionalty via the various sysfs +interfaces and /dev/cxl/ devices (which exposes direct access to device +mailboxes). + +CXL.cache +--------- +The mechanism by which a device may coherently access and cache host memory. + +Largely transparent to Linux once configured. + +CXL.mem +--------- +The mechanism by which the CPU may coherently access and cache device memory. + +Largely transparent to Linux once configured. + + +Device Types +============ + +Type-1 +------ + +A Type-1 CXL device: + +* Supports cxl.io and cxl.cache protocols +* Implements a fully coherent cache +* Allows Device-to-Host coherence and Host-to-Device snoops. +* Does NOT have host-managed device memory (HDM) + +Typical examples of type-1 devices is a Smart NIC - which may want to +directly operate on host-memory (DMA) to store incoming packets. These +devices largely rely on CPU-attached memory. + +Type-2 +------ + +A Type-2 CXL Device: + +* Supports cxl.io, cxl.cache, and cxl.mem protocols +* Optionally implements coherent cache and Host-Managed Device Memory +* Is typically an accelerator device w/ high bandwidth memory. + +The primary difference between a type-1 and type-2 device is the presence +of host-managed device memory, which allows the device to operate on a +local memory bank - while the CPU sill has coherent DMA to the same memory. + +The allows things like GPUs to expose their memory via DAX devices or file +descriptors, allows drivers and programs direct access to device memory +rather than use block-transfer semantics. + +Type-3 +------ + +A Type-3 CXL Device + +* Supports cxl.io and cxl.mem +* Implements Host-Managed Device Memory +* May provide either Volatile or Persistent memory capacity (or both). + +A basic example of a type-3 device is a simple memory expander, whose +local memory capacity is exposed to the CPU for access directly via +basic coherent DMA. + +Switch +------ + +A CXL switch is a device capacity of routing any CXL (and by extension, PCIe) +protocol between an upstream, downstream, or peer devices. Many devices, such +as Multi-Logical Devices, imply the presence of switching in some manner. + +Logical Devices and Heads +------------------------- + +A CXL device may present one or more "Logical Devices" to one or more hosts +(via physical "Heads"). + +A Single-Logical Device (SLD) is a device which presents a single device to +one or more heads. + +A Multi-Logical Device (MLD) is a device which may present multiple devices +to one or more devices. + +A Single-Headed Device exposes only a single physical connection. + +A Multi-Headed Device exposes multiple physical connections. + +MHSLD +~~~~~ +A Multi-Headed Single-Logical Device (MHSLD) exposes a single logical +device to multiple heads which may be connected to one or more discrete +hosts. An example of this would be a simple memory-pool which may be +statically configured (prior to boot) to expose portions of its memory +to Linux via the CEDT ACPI table. + +MHMLD +~~~~~ +A Multi-Headed Multi-Logical Device (MHMLD) exposes multiple logical +devices to multiple heads which may be connected to one or more discrete +hosts. An example of this would be a Dynamic Capacity Device or which +may be configured at runtime to expose portions of its memory to Linux. + +Example Devices +=============== + +Memory Expander +--------------- +The simplest form of Type-3 device is a memory expander. A memory expander +exposes Host-Managed Device Memory (HDM) to Linux. This memory may be +Volatile or Non-Volatile (Persistent). + +Memory Expanders will typically be considered a form of Single-Headed, +Single-Logical Device - as its form factor will typically be an add-in-card +(AIC) or some other similar form-factor. + +The Linux CXL driver provides support for static or dynamic configuration of +basic memory expanders. The platform may program decoders prior to OS init +(e.g. auto-decoders), or the user may program the fabric if the platform +defers these operations to the OS. + +Multiple Memory Expanders may be added to an external chassis and exposed to +a host via a head attached to a CXL switch. This is a "memory pool", and +would be considered an MHSLD or MHMLD depending on the management capabilities +provided by the switch platform. + +As of v6.14, Linux does not provide a formalized interface to manage non-DCD +MHSLD or MHMLD devices. + +Dynamic Capacity Device (DCD) +----------------------------- + +A Dynamic Capacity Device is a Type-3 device which provides dynamic management +of memory capacity. The basic premise of a DCD to provide an allocator-like +interface for physical memory capacity to a "Fabric Manager" (an external, +privileged host with privileges to change configurations for other hosts). + +A DCD manages "Memory Extents", which may be volatile or persistent. Extents +may also be exclusive to a single host or shared across multiple hosts. + +As of v6.14, Linux does not provide a formalized interface to manage DCD +devices, however there is active work on LKML targeting future release. diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-api/cxl/index.rst index fe1594dc6778..a2d1c5b18a8a 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -15,6 +15,12 @@ that have impacts on each other. The docs here break up configurations steps. theory-of-operation maturity-map +.. toctree:: + :maxdepth: 2 + :caption: Device Reference + + devices/device-types + .. toctree:: :maxdepth: 1 :caption: Linux Kernel Configuration -- cgit v1.2.3 From e4528b9ef0b6e7df1e8eaede2a7f45566fb7970b Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:21 -0400 Subject: cxl: docs/platform/bios-and-efi documentation Add some docs on CXL configurations done in bios/efi that affect linux configuration - information vendors may care to consider. Signed-off-by: Gregory Price Reviewed-by: Dave Jiang Link: https://patch.msgid.link/20250512162134.3596150-5-gourry@gourry.net Signed-off-by: Dave Jiang --- Documentation/driver-api/cxl/index.rst | 6 + .../driver-api/cxl/platform/bios-and-efi.rst | 262 +++++++++++++++++++++ 2 files changed, 268 insertions(+) create mode 100644 Documentation/driver-api/cxl/platform/bios-and-efi.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-api/cxl/index.rst index a2d1c5b18a8a..ffa0462ad950 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -21,6 +21,12 @@ that have impacts on each other. The docs here break up configurations steps. devices/device-types +.. toctree:: + :maxdepth: 2 + :caption: Platform Configuration + + platform/bios-and-efi + .. toctree:: :maxdepth: 1 :caption: Linux Kernel Configuration diff --git a/Documentation/driver-api/cxl/platform/bios-and-efi.rst b/Documentation/driver-api/cxl/platform/bios-and-efi.rst new file mode 100644 index 000000000000..552a83992bcc --- /dev/null +++ b/Documentation/driver-api/cxl/platform/bios-and-efi.rst @@ -0,0 +1,262 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================== +BIOS/EFI Configuration +====================== + +BIOS and EFI are largely responsible for configuring static information about +devices (or potential future devices) such that Linux can build the appropriate +logical representations of these devices. + +At a high level, this is what occurs during this phase of configuration. + +* The bootloader starts the BIOS/EFI. + +* BIOS/EFI do early device probe to determine static configuration + +* BIOS/EFI creates ACPI Tables that describe static config for the OS + +* BIOS/EFI create the system memory map (EFI Memory Map, E820, etc) + +* BIOS/EFI calls :code:`start_kernel` and begins the Linux Early Boot process. + +Much of what this section is concerned with is ACPI Table production and +static memory map configuration. More detail on these tables can be found +under Platform Configuration -> ACPI Table Reference. + +.. note:: + Platform Vendors should read carefully, as this sections has recommendations + on physical memory region size and alignment, memory holes, HDM interleave, + and what linux expects of HDM decoders trying to work with these features. + +UEFI Settings +============= +If your platform supports it, the :code:`uefisettings` command can be used to +read/write EFI settings. Changes will be reflected on the next reboot. Kexec +is not a sufficient reboot. + +One notable configuration here is the EFI_MEMORY_SP (Specific Purpose) bit. +When this is enabled, this bit tells linux to defer management of a memory +region to a driver (in this case, the CXL driver). Otherwise, the memory is +treated as "normal memory", and is exposed to the page allocator during +:code:`__init`. + +uefisettings examples +--------------------- + +:code:`uefisettings identify` :: + + uefisettings identify + + bios_vendor: xxx + bios_version: xxx + bios_release: xxx + bios_date: xxx + product_name: xxx + product_family: xxx + product_version: xxx + +On some AMD platforms, the :code:`EFI_MEMORY_SP` bit is set via the :code:`CXL +Memory Attribute` field. This may be called something else on your platform. + +:code:`uefisettings get "CXL Memory Attribute"` :: + + selector: xxx + ... + question: Question { + name: "CXL Memory Attribute", + answer: "Enabled", + ... + } + +Physical Memory Map +=================== + +Physical Address Region Alignment +--------------------------------- + +As of Linux v6.14, the hotplug memory system requires memory regions to be +uniform in size and alignment. While the CXL specification allows for memory +regions as small as 256MB, the supported memory block size and alignment for +hotplugged memory is architecture-defined. + +A Linux memory blocks may be as small as 128MB and increase in powers of two. + +* On ARM, the default block size and alignment is either 128MB or 256MB. + +* On x86, the default block size is 256MB, and increases to 2GB as the + capacity of the system increases up to 64GB. + +For best support across versions, platform vendors should place CXL memory at +a 2GB aligned base address, and regions should be 2GB aligned. This also helps +prevent the creating thousands of memory devices (one per block). + +Memory Holes +------------ + +Holes in the memory map are tricky. Consider a 4GB device located at base +address 0x100000000, but with the following memory map :: + + --------------------- + | 0x100000000 | + | CXL | + | 0x1BFFFFFFF | + --------------------- + | 0x1C0000000 | + | MEMORY HOLE | + | 0x1FFFFFFFF | + --------------------- + | 0x200000000 | + | CXL CONT. | + | 0x23FFFFFFF | + --------------------- + +There are two issues to consider: + +* decoder programming, and +* memory block alignment. + +If your architecture requires 2GB uniform size and aligned memory blocks, the +only capacity Linux is capable of mapping (as of v6.14) would be the capacity +from `0x100000000-0x180000000`. The remaining capacity will be stranded, as +they are not of 2GB aligned length. + +Assuming your architecture and memory configuration allows 1GB memory blocks, +this memory map is supported and this should be presented as multiple CFMWS +in the CEDT that describe each side of the memory hole separately - along with +matching decoders. + +Multiple decoders can (and should) be used to manage such a memory hole (see +below), but each chunk of a memory hole should be aligned to a reasonable block +size (larger alignment is always better). If you intend to have memory holes +in the memory map, expect to use one decoder per contiguous chunk of host +physical memory. + +As of v6.14, Linux does provide support for memory hotplug of multiple +physical memory regions separated by a memory hole described by a single +HDM decoder. + + +Decoder Programming +=================== +If BIOS/EFI intends to program the decoders to be statically configured, +there are a few things to consider to avoid major pitfalls that will +prevent Linux compatibility. Some of these recommendations are not +required "per the specification", but Linux makes no guarantees of support +otherwise. + + +Translation Point +----------------- +Per the specification, the only decoders which **TRANSLATE** Host Physical +Address (HPA) to Device Physical Address (DPA) are the **Endpoint Decoders**. +All other decoders in the fabric are intended to route accesses without +translating the addresses. + +This is heavily implied by the specification, see: :: + + CXL Specification 3.1 + 8.2.4.20: CXL HDM Decoder Capability Structure + - Implementation Note: CXL Host Bridge and Upstream Switch Port Decoder Flow + - Implementation Note: Device Decoder Logic + +Given this, Linux makes a strong assumption that decoders between CPU and +endpoint will all be programmed with addresses ranges that are subsets of +their parent decoder. + +Due to some ambiguity in how Architecture, ACPI, PCI, and CXL specifications +"hand off" responsibility between domains, some early adopting platforms +attempted to do translation at the originating memory controller or host +bridge. This configuration requires a platform specific extension to the +driver and is not officially endorsed - despite being supported. + +It is *highly recommended* **NOT** to do this; otherwise, you are on your own +to implement driver support for your platform. + +Interleave and Configuration Flexibility +---------------------------------------- +If providing cross-host-bridge interleave, a CFMWS entry in the CEDT must be +presented with target host-bridges for the interleaved device sets (there may +be multiple behind each host bridge). + +If providing intra-host-bridge interleaving, only 1 CFMWS entry in the CEDT is +required for that host bridge - if it covers the entire capacity of the devices +behind the host bridge. + +If intending to provide users flexibility in programming decoders beyond the +root, you may want to provide multiple CFMWS entries in the CEDT intended for +different purposes. For example, you may want to consider adding: + +1) A CFMWS entry to cover all interleavable host bridges. +2) A CFMWS entry to cover all devices on a single host bridge. +3) A CFMWS entry to cover each device. + +A platform may choose to add all of these, or change the mode based on a BIOS +setting. For each CFMWS entry, Linux expects descriptions of the described +memory regions in the SRAT to determine the number of NUMA nodes it should +reserve during early boot / init. + +As of v6.14, Linux will create a NUMA node for each CEDT CFMWS entry, even if +a matching SRAT entry does not exist; however, this is not guaranteed in the +future and such a configuration should be avoided. + +Memory Holes +------------ +If your platform includes memory holes intersparsed between your CXL memory, it +is recommended to utilize multiple decoders to cover these regions of memory, +rather than try to program the decoders to accept the entire range and expect +Linux to manage the overlap. + +For example, consider the Memory Hole described above :: + + --------------------- + | 0x100000000 | + | CXL | + | 0x1BFFFFFFF | + --------------------- + | 0x1C0000000 | + | MEMORY HOLE | + | 0x1FFFFFFFF | + --------------------- + | 0x200000000 | + | CXL CONT. | + | 0x23FFFFFFF | + --------------------- + +Assuming this is provided by a single device attached directly to a host bridge, +Linux would expect the following decoder programming :: + + ----------------------- ----------------------- + | root-decoder-0 | | root-decoder-1 | + | base: 0x100000000 | | base: 0x200000000 | + | size: 0xC0000000 | | size: 0x40000000 | + ----------------------- ----------------------- + | | + ----------------------- ----------------------- + | HB-decoder-0 | | HB-decoder-1 | + | base: 0x100000000 | | base: 0x200000000 | + | size: 0xC0000000 | | size: 0x40000000 | + ----------------------- ----------------------- + | | + ----------------------- ----------------------- + | ep-decoder-0 | | ep-decoder-1 | + | base: 0x100000000 | | base: 0x200000000 | + | size: 0xC0000000 | | size: 0x40000000 | + ----------------------- ----------------------- + +With a CEDT configuration with two CFMWS describing the above root decoders. + +Linux makes no guarantee of support for strange memory hole situations. + +Multi-Media Devices +------------------- +The CFMWS field of the CEDT has special restriction bits which describe whether +the described memory region allows volatile or persistent memory (or both). If +the platform intends to support either: + +1) A device with multiple medias, or +2) Using a persistent memory device as normal memory + +A platform may wish to create multiple CEDT CFMWS entries to describe the same +memory, with the intent of allowing the end user flexibility in how that memory +is configured. Linux does not presently have strong requirements in this area. -- cgit v1.2.3 From d1ba364627d5dc3429735c846ca2a8ea925073bd Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:22 -0400 Subject: cxl: docs/platform/acpi reference documentation Add basic ACPI table information needed to understand the CXL driver probe process. Signed-off-by: Gregory Price Reviewed-by: Dave Jiang Link: https://patch.msgid.link/20250512162134.3596150-6-gourry@gourry.net Signed-off-by: Dave Jiang --- Documentation/driver-api/cxl/index.rst | 1 + Documentation/driver-api/cxl/platform/acpi.rst | 76 ++++++++++++++++++++++ .../driver-api/cxl/platform/acpi/cedt.rst | 62 ++++++++++++++++++ .../driver-api/cxl/platform/acpi/dsdt.rst | 28 ++++++++ .../driver-api/cxl/platform/acpi/hmat.rst | 32 +++++++++ .../driver-api/cxl/platform/acpi/slit.rst | 21 ++++++ .../driver-api/cxl/platform/acpi/srat.rst | 44 +++++++++++++ 7 files changed, 264 insertions(+) create mode 100644 Documentation/driver-api/cxl/platform/acpi.rst create mode 100644 Documentation/driver-api/cxl/platform/acpi/cedt.rst create mode 100644 Documentation/driver-api/cxl/platform/acpi/dsdt.rst create mode 100644 Documentation/driver-api/cxl/platform/acpi/hmat.rst create mode 100644 Documentation/driver-api/cxl/platform/acpi/slit.rst create mode 100644 Documentation/driver-api/cxl/platform/acpi/srat.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-api/cxl/index.rst index ffa0462ad950..336322dc35a0 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -26,6 +26,7 @@ that have impacts on each other. The docs here break up configurations steps. :caption: Platform Configuration platform/bios-and-efi + platform/acpi .. toctree:: :maxdepth: 1 diff --git a/Documentation/driver-api/cxl/platform/acpi.rst b/Documentation/driver-api/cxl/platform/acpi.rst new file mode 100644 index 000000000000..ee7e6bd4c43d --- /dev/null +++ b/Documentation/driver-api/cxl/platform/acpi.rst @@ -0,0 +1,76 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=========== +ACPI Tables +=========== + +ACPI is the "Advanced Configuration and Power Interface", which is a standard +that defines how platforms and OS manage power and configure computer hardware. +For the purpose of this theory of operation, when referring to "ACPI" we will +usually refer to "ACPI Tables" - which are the way a platform (BIOS/EFI) +communicates static configuration information to the operation system. + +The Following ACPI tables contain *static* configuration and performance data +about CXL devices. + +.. toctree:: + :maxdepth: 1 + + acpi/cedt.rst + acpi/srat.rst + acpi/hmat.rst + acpi/slit.rst + acpi/dsdt.rst + +The SRAT table may also contain generic port/initiator content that is intended +to describe the generic port, but not information about the rest of the path to +the endpoint. + +Linux uses these tables to configure kernel resources for statically configured +(by BIOS/EFI) CXL devices, such as: + +- NUMA nodes +- Memory Tiers +- NUMA Abstract Distances +- SystemRAM Memory Regions +- Weighted Interleave Node Weights + +ACPI Debugging +============== + +The :code:`acpidump -b` command dumps the ACPI tables into binary format. + +The :code:`iasl -d` command disassembles the files into human readable format. + +Example :code:`acpidump -b && iasl -d cedt.dat` :: + + [000h 0000 4] Signature : "CEDT" [CXL Early Discovery Table] + +Common Issues +------------- +Most failures described here result in a failure of the driver to surface +memory as a DAX device and/or kmem. + +* CEDT CFMWS targets list UIDs do not match CEDT CHBS UIDs. +* CEDT CFMWS targets list UIDs do not match DSDT CXL Host Bridge UIDs. +* CEDT CFMWS Restriction Bits are not correct. +* CEDT CFMWS Memory regions are poorly aligned. +* CEDT CFMWS Memory regions spans a platform memory hole. +* CEDT CHBS UIDs do not match DSDT CXL Host Bridge UIDs. +* CEDT CHBS Specification version is incorrect. +* SRAT is missing regions described in CEDT CFMWS. + + * Result: failure to create a NUMA node for the region, or + region is placed in wrong node. + +* HMAT is missing data for regions described in CEDT CFMWS. + + * Result: NUMA node being placed in the wrong memory tier. + +* SLIT has bad data. + + * Result: Lots of performance mechanisms in the kernel will be very unhappy. + +All of these issues will appear to users as if the driver is failing to +support CXL - when in reality they are all the failure of a platform to +configure the ACPI tables correctly. diff --git a/Documentation/driver-api/cxl/platform/acpi/cedt.rst b/Documentation/driver-api/cxl/platform/acpi/cedt.rst new file mode 100644 index 000000000000..1d9c9d3592dc --- /dev/null +++ b/Documentation/driver-api/cxl/platform/acpi/cedt.rst @@ -0,0 +1,62 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================================ +CEDT - CXL Early Discovery Table +================================ + +The CXL Early Discovery Table is generated by BIOS to describe the CXL memory +regions configured at boot by the BIOS. + +CHBS +==== +The CXL Host Bridge Structure describes CXL host bridges. Other than describing +device register information, it reports the specific host bridge UID for this +host bridge. These host bridge ID's will be referenced in other tables. + +Example :: + + Subtable Type : 00 [CXL Host Bridge Structure] + Reserved : 00 + Length : 0020 + Associated host bridge : 00000007 <- Host bridge _UID + Specification version : 00000001 + Reserved : 00000000 + Register base : 0000010370400000 + Register length : 0000000000010000 + +CFMWS +===== +The CXL Fixed Memory Window structure describes a memory region associated +with one or more CXL host bridges (as described by the CHBS). It additionally +describes any inter-host-bridge interleave configuration that may have been +programmed by BIOS. + +Example :: + + Subtable Type : 01 [CXL Fixed Memory Window Structure] + Reserved : 00 + Length : 002C + Reserved : 00000000 + Window base address : 000000C050000000 <- Memory Region + Window size : 0000003CA0000000 + Interleave Members (2^n) : 01 <- Interleave configuration + Interleave Arithmetic : 00 + Reserved : 0000 + Granularity : 00000000 + Restrictions : 0006 + QtgId : 0001 + First Target : 00000007 <- Host Bridge _UID + Next Target : 00000006 <- Host Bridge _UID + +The restriction field dictates what this SPA range may be used for (memory type, +voltile vs persistent, etc). One or more bits may be set. :: + + Bit[0]: CXL Type 2 Memory + Bit[1]: CXL Type 3 Memory + Bit[2]: Volatile Memory + Bit[3]: Persistent Memory + Bit[4]: Fixed Config (HPA cannot be re-used) + +INTRA-host-bridge interleave (multiple devices on one host bridge) is NOT +reported in this structure, and is solely defined via CXL device decoder +programming (host bridge and endpoint decoders). diff --git a/Documentation/driver-api/cxl/platform/acpi/dsdt.rst b/Documentation/driver-api/cxl/platform/acpi/dsdt.rst new file mode 100644 index 000000000000..b4583b01d67d --- /dev/null +++ b/Documentation/driver-api/cxl/platform/acpi/dsdt.rst @@ -0,0 +1,28 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================================== +DSDT - Differentiated system Description Table +============================================== + +This table describes what peripherals a machine has. + +This table's UIDs for CXL devices - specifically host bridges, must be +consistent with the contents of the CEDT, otherwise the CXL driver will +fail to probe correctly. + +Example Compute Express Link Host Bridge :: + + Scope (_SB) + { + Device (S0D0) + { + Name (_HID, "ACPI0016" /* Compute Express Link Host Bridge */) // _HID: Hardware ID + Name (_CID, Package (0x02) // _CID: Compatible ID + { + EisaId ("PNP0A08") /* PCI Express Bus */, + EisaId ("PNP0A03") /* PCI Bus */ + }) + ... + Name (_UID, 0x05) // _UID: Unique ID + ... + } diff --git a/Documentation/driver-api/cxl/platform/acpi/hmat.rst b/Documentation/driver-api/cxl/platform/acpi/hmat.rst new file mode 100644 index 000000000000..095a26f02a37 --- /dev/null +++ b/Documentation/driver-api/cxl/platform/acpi/hmat.rst @@ -0,0 +1,32 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=========================================== +HMAT - Heterogeneous Memory Attribute Table +=========================================== + +The Heterogeneous Memory Attributes Table contains information such as cache +attributes and bandwidth and latency details for memory proximity domains. +For the purpose of this document, we will only discuss the SSLIB entry. + +SLLBI +===== +The System Locality Latency and Bandwidth Information records latency and +bandwidth information for proximity domains. + +This table is used by Linux to configure interleave weights and memory tiers. + +Example (Heavily truncated for brevity) :: + + Structure Type : 0001 [SLLBI] + Data Type : 00 <- Latency + Target Proximity Domain List : 00000000 + Target Proximity Domain List : 00000001 + Entry : 0080 <- DRAM LTC + Entry : 0100 <- CXL LTC + + Structure Type : 0001 [SLLBI] + Data Type : 03 <- Bandwidth + Target Proximity Domain List : 00000000 + Target Proximity Domain List : 00000001 + Entry : 1200 <- DRAM BW + Entry : 0200 <- CXL BW diff --git a/Documentation/driver-api/cxl/platform/acpi/slit.rst b/Documentation/driver-api/cxl/platform/acpi/slit.rst new file mode 100644 index 000000000000..a56768e8fe41 --- /dev/null +++ b/Documentation/driver-api/cxl/platform/acpi/slit.rst @@ -0,0 +1,21 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======================================== +SLIT - System Locality Information Table +======================================== + +The system locality information table provides "abstract distances" between +accessor and memory nodes. Node without initiators (cpus) are infinitely (FF) +distance away from all other nodes. + +The abstract distance described in this table does not describe any real +latency of bandwidth information. + +Example :: + + Signature : "SLIT" [System Locality Information Table] + Localities : 0000000000000004 + Locality 0 : 10 20 20 30 + Locality 1 : 20 10 30 20 + Locality 2 : FF FF 0A FF + Locality 3 : FF FF FF 0A diff --git a/Documentation/driver-api/cxl/platform/acpi/srat.rst b/Documentation/driver-api/cxl/platform/acpi/srat.rst new file mode 100644 index 000000000000..56d7bbb18c3b --- /dev/null +++ b/Documentation/driver-api/cxl/platform/acpi/srat.rst @@ -0,0 +1,44 @@ +.. SPDX-License-Identifier: GPL-2.0 + +===================================== +SRAT - Static Resource Affinity Table +===================================== + +The System/Static Resource Affinity Table describes resource (CPU, Memory) +affinity to "Proximity Domains". This table is technically optional, but for +performance information (see "HMAT") to be enumerated by linux it must be +present. + +There is a careful dance between the CEDT and SRAT tables and how NUMA nodes are +created. If things don't look quite the way you expect - check the SRAT Memory +Affinity entries and CEDT CFMWS to determine what your platform actually +supports in terms of flexible topologies. + +The SRAT may statically assign portions of a CFMWS SPA range to a specific +proximity domains. See linux numa creation for more information about how +this presents in the NUMA topology. + +Proximity Domain +================ +A proximity domain is ROUGHLY equivalent to "NUMA Node" - though a 1-to-1 +mapping is not guaranteed. There are scenarios where "Proximity Domain 4" may +map to "NUMA Node 3", for example. (See "NUMA Node Creation") + +Memory Affinity +=============== +Generally speaking, if a host does any amount of CXL fabric (decoder) +programming in BIOS - an SRAT entry for that memory needs to be present. + +Example :: + + Subtable Type : 01 [Memory Affinity] + Length : 28 + Proximity Domain : 00000001 <- NUMA Node 1 + Reserved1 : 0000 + Base Address : 000000C050000000 <- Physical Memory Region + Address Length : 0000003CA0000000 + Reserved2 : 00000000 + Flags (decoded below) : 0000000B + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 -- cgit v1.2.3 From 8545940bd420e7a79c66bccee330a947581d259b Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:23 -0400 Subject: cxl: docs/platform/example-configs documentation Add example ACPI Table configurations for different sample platforms. Signed-off-by: Gregory Price Reviewed-by: Dave Jiang Link: https://patch.msgid.link/20250512162134.3596150-7-gourry@gourry.net Signed-off-by: Dave Jiang --- Documentation/driver-api/cxl/index.rst | 1 + .../driver-api/cxl/platform/example-configs.rst | 13 + .../platform/example-configurations/flexible.rst | 296 +++++++++++++++++++++ .../example-configurations/hb-interleave.rst | 107 ++++++++ .../example-configurations/multi-dev-per-hb.rst | 90 +++++++ .../example-configurations/one-dev-per-hb.rst | 136 ++++++++++ 6 files changed, 643 insertions(+) create mode 100644 Documentation/driver-api/cxl/platform/example-configs.rst create mode 100644 Documentation/driver-api/cxl/platform/example-configurations/flexible.rst create mode 100644 Documentation/driver-api/cxl/platform/example-configurations/hb-interleave.rst create mode 100644 Documentation/driver-api/cxl/platform/example-configurations/multi-dev-per-hb.rst create mode 100644 Documentation/driver-api/cxl/platform/example-configurations/one-dev-per-hb.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-api/cxl/index.rst index 336322dc35a0..6a5fb7e00c52 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -27,6 +27,7 @@ that have impacts on each other. The docs here break up configurations steps. platform/bios-and-efi platform/acpi + platform/example-configs .. toctree:: :maxdepth: 1 diff --git a/Documentation/driver-api/cxl/platform/example-configs.rst b/Documentation/driver-api/cxl/platform/example-configs.rst new file mode 100644 index 000000000000..90a10d7473c6 --- /dev/null +++ b/Documentation/driver-api/cxl/platform/example-configs.rst @@ -0,0 +1,13 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Example Platform Configurations +############################### + +.. toctree:: + :maxdepth: 1 + :caption: Contents + + example-configurations/one-dev-per-hb.rst + example-configurations/multi-dev-per-hb.rst + example-configurations/hb-interleave.rst + example-configurations/flexible.rst diff --git a/Documentation/driver-api/cxl/platform/example-configurations/flexible.rst b/Documentation/driver-api/cxl/platform/example-configurations/flexible.rst new file mode 100644 index 000000000000..e39daba65fa0 --- /dev/null +++ b/Documentation/driver-api/cxl/platform/example-configurations/flexible.rst @@ -0,0 +1,296 @@ +.. SPDX-License-Identifier: GPL-2.0 + +===================== +Flexible Presentation +===================== +This system has a single socket with two CXL host bridges. Each host bridge +has two CXL memory expanders with a 4GB of memory (32GB total). + +On this system, the platform designer wanted to provide the user flexibility +to configure the memory devices in various interleave or NUMA node +configurations. So they provided every combination. + +Things to note: + +* Cross-Bridge interleave is described in one CFMWS that covers all capacity. +* One CFMWS is also described per-host bridge. +* One CFMWS is also described per-device. +* This SRAT describes one node for each of the above CFMWS. +* The HMAT describes performance for each node in the SRAT. + +CEDT :: + + Subtable Type : 00 [CXL Host Bridge Structure] + Reserved : 00 + Length : 0020 + Associated host bridge : 00000007 + Specification version : 00000001 + Reserved : 00000000 + Register base : 0000010370400000 + Register length : 0000000000010000 + + Subtable Type : 00 [CXL Host Bridge Structure] + Reserved : 00 + Length : 0020 + Associated host bridge : 00000006 + Specification version : 00000001 + Reserved : 00000000 + Register base : 0000010380800000 + Register length : 0000000000010000 + + Subtable Type : 01 [CXL Fixed Memory Window Structure] + Reserved : 00 + Length : 002C + Reserved : 00000000 + Window base address : 0000001000000000 + Window size : 0000000400000000 + Interleave Members (2^n) : 01 + Interleave Arithmetic : 00 + Reserved : 0000 + Granularity : 00000000 + Restrictions : 0006 + QtgId : 0001 + First Target : 00000007 + Second Target : 00000006 + + Subtable Type : 01 [CXL Fixed Memory Window Structure] + Reserved : 00 + Length : 002C + Reserved : 00000000 + Window base address : 0000002000000000 + Window size : 0000000200000000 + Interleave Members (2^n) : 00 + Interleave Arithmetic : 00 + Reserved : 0000 + Granularity : 00000000 + Restrictions : 0006 + QtgId : 0001 + First Target : 00000007 + + Subtable Type : 01 [CXL Fixed Memory Window Structure] + Reserved : 00 + Length : 002C + Reserved : 00000000 + Window base address : 0000002200000000 + Window size : 0000000200000000 + Interleave Members (2^n) : 00 + Interleave Arithmetic : 00 + Reserved : 0000 + Granularity : 00000000 + Restrictions : 0006 + QtgId : 0001 + First Target : 00000006 + + Subtable Type : 01 [CXL Fixed Memory Window Structure] + Reserved : 00 + Length : 002C + Reserved : 00000000 + Window base address : 0000003000000000 + Window size : 0000000100000000 + Interleave Members (2^n) : 00 + Interleave Arithmetic : 00 + Reserved : 0000 + Granularity : 00000000 + Restrictions : 0006 + QtgId : 0001 + First Target : 00000007 + + Subtable Type : 01 [CXL Fixed Memory Window Structure] + Reserved : 00 + Length : 002C + Reserved : 00000000 + Window base address : 0000003100000000 + Window size : 0000000100000000 + Interleave Members (2^n) : 00 + Interleave Arithmetic : 00 + Reserved : 0000 + Granularity : 00000000 + Restrictions : 0006 + QtgId : 0001 + First Target : 00000007 + + Subtable Type : 01 [CXL Fixed Memory Window Structure] + Reserved : 00 + Length : 002C + Reserved : 00000000 + Window base address : 0000003200000000 + Window size : 0000000100000000 + Interleave Members (2^n) : 00 + Interleave Arithmetic : 00 + Reserved : 0000 + Granularity : 00000000 + Restrictions : 0006 + QtgId : 0001 + First Target : 00000006 + + Subtable Type : 01 [CXL Fixed Memory Window Structure] + Reserved : 00 + Length : 002C + Reserved : 00000000 + Window base address : 0000003300000000 + Window size : 0000000100000000 + Interleave Members (2^n) : 00 + Interleave Arithmetic : 00 + Reserved : 0000 + Granularity : 00000000 + Restrictions : 0006 + QtgId : 0001 + First Target : 00000006 + +SRAT :: + + Subtable Type : 01 [Memory Affinity] + Length : 28 + Proximity Domain : 00000001 + Reserved1 : 0000 + Base Address : 0000001000000000 + Address Length : 0000000400000000 + Reserved2 : 00000000 + Flags (decoded below) : 0000000B + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 + + Subtable Type : 01 [Memory Affinity] + Length : 28 + Proximity Domain : 00000002 + Reserved1 : 0000 + Base Address : 0000002000000000 + Address Length : 0000000200000000 + Reserved2 : 00000000 + Flags (decoded below) : 0000000B + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 + + Subtable Type : 01 [Memory Affinity] + Length : 28 + Proximity Domain : 00000003 + Reserved1 : 0000 + Base Address : 0000002200000000 + Address Length : 0000000200000000 + Reserved2 : 00000000 + Flags (decoded below) : 0000000B + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 + + Subtable Type : 01 [Memory Affinity] + Length : 28 + Proximity Domain : 00000004 + Reserved1 : 0000 + Base Address : 0000003000000000 + Address Length : 0000000100000000 + Reserved2 : 00000000 + Flags (decoded below) : 0000000B + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 + + Subtable Type : 01 [Memory Affinity] + Length : 28 + Proximity Domain : 00000005 + Reserved1 : 0000 + Base Address : 0000003100000000 + Address Length : 0000000100000000 + Reserved2 : 00000000 + Flags (decoded below) : 0000000B + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 + + Subtable Type : 01 [Memory Affinity] + Length : 28 + Proximity Domain : 00000006 + Reserved1 : 0000 + Base Address : 0000003200000000 + Address Length : 0000000100000000 + Reserved2 : 00000000 + Flags (decoded below) : 0000000B + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 + + Subtable Type : 01 [Memory Affinity] + Length : 28 + Proximity Domain : 00000007 + Reserved1 : 0000 + Base Address : 0000003300000000 + Address Length : 0000000100000000 + Reserved2 : 00000000 + Flags (decoded below) : 0000000B + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 + +HMAT :: + + Structure Type : 0001 [SLLBI] + Data Type : 00 [Latency] + Target Proximity Domain List : 00000000 + Target Proximity Domain List : 00000001 + Target Proximity Domain List : 00000002 + Target Proximity Domain List : 00000003 + Target Proximity Domain List : 00000004 + Target Proximity Domain List : 00000005 + Target Proximity Domain List : 00000006 + Target Proximity Domain List : 00000007 + Entry : 0080 + Entry : 0100 + Entry : 0100 + Entry : 0100 + Entry : 0100 + Entry : 0100 + Entry : 0100 + Entry : 0100 + + Structure Type : 0001 [SLLBI] + Data Type : 03 [Bandwidth] + Target Proximity Domain List : 00000000 + Target Proximity Domain List : 00000001 + Target Proximity Domain List : 00000002 + Target Proximity Domain List : 00000003 + Target Proximity Domain List : 00000004 + Target Proximity Domain List : 00000005 + Target Proximity Domain List : 00000006 + Target Proximity Domain List : 00000007 + Entry : 1200 + Entry : 0400 + Entry : 0200 + Entry : 0200 + Entry : 0100 + Entry : 0100 + Entry : 0100 + Entry : 0100 + +SLIT :: + + Signature : "SLIT" [System Locality Information Table] + Localities : 0000000000000003 + Locality 0 : 10 20 20 20 20 20 20 20 + Locality 1 : FF 0A FF FF FF FF FF FF + Locality 2 : FF FF 0A FF FF FF FF FF + Locality 3 : FF FF FF 0A FF FF FF FF + Locality 4 : FF FF FF FF 0A FF FF FF + Locality 5 : FF FF FF FF FF 0A FF FF + Locality 6 : FF FF FF FF FF FF 0A FF + Locality 7 : FF FF FF FF FF FF FF 0A + +DSDT :: + + Scope (_SB) + { + Device (S0D0) + { + Name (_HID, "ACPI0016" /* Compute Express Link Host Bridge */) // _HID: Hardware ID + ... + Name (_UID, 0x07) // _UID: Unique ID + } + ... + Device (S0D5) + { + Name (_HID, "ACPI0016" /* Compute Express Link Host Bridge */) // _HID: Hardware ID + ... + Name (_UID, 0x06) // _UID: Unique ID + } + } diff --git a/Documentation/driver-api/cxl/platform/example-configurations/hb-interleave.rst b/Documentation/driver-api/cxl/platform/example-configurations/hb-interleave.rst new file mode 100644 index 000000000000..ce07e6162f26 --- /dev/null +++ b/Documentation/driver-api/cxl/platform/example-configurations/hb-interleave.rst @@ -0,0 +1,107 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================ +Cross-Host-Bridge Interleave +============================ +This system has a single socket with two CXL host bridges. Each host bridge +has a single CXL memory expander with a 4GB of memory. + +Things to note: + +* Cross-Bridge interleave is described. +* The expanders are described by a single CFMWS. +* This SRAT describes one node for both host bridges. +* The HMAT describes a single node's performance. + +CEDT :: + + Subtable Type : 00 [CXL Host Bridge Structure] + Reserved : 00 + Length : 0020 + Associated host bridge : 00000007 + Specification version : 00000001 + Reserved : 00000000 + Register base : 0000010370400000 + Register length : 0000000000010000 + + Subtable Type : 00 [CXL Host Bridge Structure] + Reserved : 00 + Length : 0020 + Associated host bridge : 00000006 + Specification version : 00000001 + Reserved : 00000000 + Register base : 0000010380800000 + Register length : 0000000000010000 + + Subtable Type : 01 [CXL Fixed Memory Window Structure] + Reserved : 00 + Length : 002C + Reserved : 00000000 + Window base address : 0000001000000000 + Window size : 0000000200000000 + Interleave Members (2^n) : 01 + Interleave Arithmetic : 00 + Reserved : 0000 + Granularity : 00000000 + Restrictions : 0006 + QtgId : 0001 + First Target : 00000007 + Second Target : 00000006 + +SRAT :: + + Subtable Type : 01 [Memory Affinity] + Length : 28 + Proximity Domain : 00000001 + Reserved1 : 0000 + Base Address : 0000001000000000 + Address Length : 0000000200000000 + Reserved2 : 00000000 + Flags (decoded below) : 0000000B + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 + +HMAT :: + + Structure Type : 0001 [SLLBI] + Data Type : 00 [Latency] + Target Proximity Domain List : 00000000 + Target Proximity Domain List : 00000001 + Target Proximity Domain List : 00000002 + Entry : 0080 + Entry : 0100 + + Structure Type : 0001 [SLLBI] + Data Type : 03 [Bandwidth] + Target Proximity Domain List : 00000000 + Target Proximity Domain List : 00000001 + Target Proximity Domain List : 00000002 + Entry : 1200 + Entry : 0400 + +SLIT :: + + Signature : "SLIT" [System Locality Information Table] + Localities : 0000000000000003 + Locality 0 : 10 20 + Locality 1 : FF 0A + +DSDT :: + + Scope (_SB) + { + Device (S0D0) + { + Name (_HID, "ACPI0016" /* Compute Express Link Host Bridge */) // _HID: Hardware ID + ... + Name (_UID, 0x07) // _UID: Unique ID + } + ... + Device (S0D5) + { + Name (_HID, "ACPI0016" /* Compute Express Link Host Bridge */) // _HID: Hardware ID + ... + Name (_UID, 0x06) // _UID: Unique ID + } + } diff --git a/Documentation/driver-api/cxl/platform/example-configurations/multi-dev-per-hb.rst b/Documentation/driver-api/cxl/platform/example-configurations/multi-dev-per-hb.rst new file mode 100644 index 000000000000..6adf7c639490 --- /dev/null +++ b/Documentation/driver-api/cxl/platform/example-configurations/multi-dev-per-hb.rst @@ -0,0 +1,90 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================================ +Multiple Devices per Host Bridge +================================ + +In this example system we will have a single socket and one CXL host bridge. +There are two CXL memory expanders with 4GB attached to the host bridge. + +Things to note: + +* Intra-Bridge interleave is not described here. +* The expanders are described by a single CEDT/CFMWS. +* This CEDT/SRAT describes one node for both devices. +* There is only one proximity domain the HMAT for both devices. + +CEDT :: + + Subtable Type : 00 [CXL Host Bridge Structure] + Reserved : 00 + Length : 0020 + Associated host bridge : 00000007 + Specification version : 00000001 + Reserved : 00000000 + Register base : 0000010370400000 + Register length : 0000000000010000 + + Subtable Type : 01 [CXL Fixed Memory Window Structure] + Reserved : 00 + Length : 002C + Reserved : 00000000 + Window base address : 0000001000000000 + Window size : 0000000200000000 + Interleave Members (2^n) : 00 + Interleave Arithmetic : 00 + Reserved : 0000 + Granularity : 00000000 + Restrictions : 0006 + QtgId : 0001 + First Target : 00000007 + +SRAT :: + + Subtable Type : 01 [Memory Affinity] + Length : 28 + Proximity Domain : 00000001 + Reserved1 : 0000 + Base Address : 0000001000000000 + Address Length : 0000000200000000 + Reserved2 : 00000000 + Flags (decoded below) : 0000000B + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 + +HMAT :: + + Structure Type : 0001 [SLLBI] + Data Type : 00 [Latency] + Target Proximity Domain List : 00000000 + Target Proximity Domain List : 00000001 + Entry : 0080 + Entry : 0100 + + Structure Type : 0001 [SLLBI] + Data Type : 03 [Bandwidth] + Target Proximity Domain List : 00000000 + Target Proximity Domain List : 00000001 + Entry : 1200 + Entry : 0200 + +SLIT :: + + Signature : "SLIT" [System Locality Information Table] + Localities : 0000000000000003 + Locality 0 : 10 20 + Locality 1 : FF 0A + +DSDT :: + + Scope (_SB) + { + Device (S0D0) + { + Name (_HID, "ACPI0016" /* Compute Express Link Host Bridge */) // _HID: Hardware ID + ... + Name (_UID, 0x07) // _UID: Unique ID + } + ... + } diff --git a/Documentation/driver-api/cxl/platform/example-configurations/one-dev-per-hb.rst b/Documentation/driver-api/cxl/platform/example-configurations/one-dev-per-hb.rst new file mode 100644 index 000000000000..b89ba3cab98f --- /dev/null +++ b/Documentation/driver-api/cxl/platform/example-configurations/one-dev-per-hb.rst @@ -0,0 +1,136 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========================== +One Device per Host Bridge +========================== + +This system has a single socket with two CXL host bridges. Each host bridge +has a single CXL memory expander with a 4GB of memory. + +Things to note: + +* Cross-Bridge interleave is not being used. +* The expanders are in two separate but adjascent memory regions. +* This CEDT/SRAT describes one node per device +* The expanders have the same performance and will be in the same memory tier. + +CEDT :: + + Subtable Type : 00 [CXL Host Bridge Structure] + Reserved : 00 + Length : 0020 + Associated host bridge : 00000007 + Specification version : 00000001 + Reserved : 00000000 + Register base : 0000010370400000 + Register length : 0000000000010000 + + Subtable Type : 00 [CXL Host Bridge Structure] + Reserved : 00 + Length : 0020 + Associated host bridge : 00000006 + Specification version : 00000001 + Reserved : 00000000 + Register base : 0000010380800000 + Register length : 0000000000010000 + + Subtable Type : 01 [CXL Fixed Memory Window Structure] + Reserved : 00 + Length : 002C + Reserved : 00000000 + Window base address : 0000001000000000 + Window size : 0000000100000000 + Interleave Members (2^n) : 00 + Interleave Arithmetic : 00 + Reserved : 0000 + Granularity : 00000000 + Restrictions : 0006 + QtgId : 0001 + First Target : 00000007 + + Subtable Type : 01 [CXL Fixed Memory Window Structure] + Reserved : 00 + Length : 002C + Reserved : 00000000 + Window base address : 0000001100000000 + Window size : 0000000100000000 + Interleave Members (2^n) : 00 + Interleave Arithmetic : 00 + Reserved : 0000 + Granularity : 00000000 + Restrictions : 0006 + QtgId : 0001 + First Target : 00000006 + +SRAT :: + + Subtable Type : 01 [Memory Affinity] + Length : 28 + Proximity Domain : 00000001 + Reserved1 : 0000 + Base Address : 0000001000000000 + Address Length : 0000000100000000 + Reserved2 : 00000000 + Flags (decoded below) : 0000000B + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 + + Subtable Type : 01 [Memory Affinity] + Length : 28 + Proximity Domain : 00000002 + Reserved1 : 0000 + Base Address : 0000001100000000 + Address Length : 0000000100000000 + Reserved2 : 00000000 + Flags (decoded below) : 0000000B + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 + +HMAT :: + + Structure Type : 0001 [SLLBI] + Data Type : 00 [Latency] + Target Proximity Domain List : 00000000 + Target Proximity Domain List : 00000001 + Target Proximity Domain List : 00000002 + Entry : 0080 + Entry : 0100 + Entry : 0100 + + Structure Type : 0001 [SLLBI] + Data Type : 03 [Bandwidth] + Target Proximity Domain List : 00000000 + Target Proximity Domain List : 00000001 + Target Proximity Domain List : 00000002 + Entry : 1200 + Entry : 0200 + Entry : 0200 + +SLIT :: + + Signature : "SLIT" [System Locality Information Table] + Localities : 0000000000000003 + Locality 0 : 10 20 20 + Locality 1 : FF 0A FF + Locality 2 : FF FF 0A + +DSDT :: + + Scope (_SB) + { + Device (S0D0) + { + Name (_HID, "ACPI0016" /* Compute Express Link Host Bridge */) // _HID: Hardware ID + ... + Name (_UID, 0x07) // _UID: Unique ID + } + ... + Device (S0D5) + { + Name (_HID, "ACPI0016" /* Compute Express Link Host Bridge */) // _HID: Hardware ID + ... + Name (_UID, 0x06) // _UID: Unique ID + } + } -- cgit v1.2.3 From 9bd8546e59542657a7c5a4ee02ea67d3e68f964a Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:24 -0400 Subject: cxl: docs/linux - overview Add type-3 device configuration overview that explains the probe process for a type-3 device from early-boot through memory-hotplug. Signed-off-by: Gregory Price Reviewed-by: Dave Jiang Link: https://patch.msgid.link/20250512162134.3596150-8-gourry@gourry.net Signed-off-by: Dave Jiang --- Documentation/driver-api/cxl/index.rst | 3 +- Documentation/driver-api/cxl/linux/overview.rst | 103 ++++++++++++++++++++++++ 2 files changed, 105 insertions(+), 1 deletion(-) create mode 100644 Documentation/driver-api/cxl/linux/overview.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-api/cxl/index.rst index 6a5fb7e00c52..bc2228c77c32 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -30,9 +30,10 @@ that have impacts on each other. The docs here break up configurations steps. platform/example-configs .. toctree:: - :maxdepth: 1 + :maxdepth: 2 :caption: Linux Kernel Configuration + linux/overview linux/access-coordinates diff --git a/Documentation/driver-api/cxl/linux/overview.rst b/Documentation/driver-api/cxl/linux/overview.rst new file mode 100644 index 000000000000..648beb2c8c83 --- /dev/null +++ b/Documentation/driver-api/cxl/linux/overview.rst @@ -0,0 +1,103 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======== +Overview +======== + +This section presents the configuration process of a CXL Type-3 memory device, +and how it is ultimately exposed to users as either a :code:`DAX` device or +normal memory pages via the kernel's page allocator. + +Portions marked with a bullet are points at which certain kernel objects +are generated. + +1) Early Boot + + a) BIOS, Build, and Boot Parameters + + i) EFI_MEMORY_SP + ii) CONFIG_EFI_SOFT_RESERVE + iii) CONFIG_MHP_DEFAULT_ONLINE_TYPE + iv) nosoftreserve + + b) Memory Map Creation + + i) EFI Memory Map / E820 Consulted for Soft-Reserved + + * CXL Memory is set aside to be handled by the CXL driver + + * Soft-Reserved IO Resource created for CFMWS entry + + c) NUMA Node Creation + + * Nodes created from ACPI CEDT CFMWS and SRAT Proximity domains (PXM) + + d) Memory Tier Creation + + * A default memory_tier is created with all nodes. + + e) Contiguous Memory Allocation + + * Any requested CMA is allocated from Online nodes + + f) Init Finishes, Drivers start probing + +2) ACPI and PCI Drivers + + a) Detects PCI device is CXL, marking it for probe by CXL driver + +3) CXL Driver Operation + + a) Base device creation + + * root, port, and memdev devices created + * CEDT CFMWS IO Resource creation + + b) Decoder creation + + * root, switch, and endpoint decoders created + + c) Logical device creation + + * memory_region and endpoint devices created + + d) Devices are associated with each other + + * If auto-decoder (BIOS-programmed decoders), driver validates + configurations, builds associations, and locks configs at probe time. + + * If user-configured, validation and associations are built at + decoder-commit time. + + e) Regions surfaced as DAX region + + * dax_region created + + * DAX device created via DAX driver + +4) DAX Driver Operation + + a) DAX driver surfaces DAX region as one of two dax device modes + + * kmem - dax device is converted to hotplug memory blocks + + * DAX kmem IO Resource creation + + * hmem - dax device is left as daxdev to be accessed as a file. + + * If hmem, journey ends here. + + b) DAX kmem surfaces memory region to Memory Hotplug to add to page + allocator as "driver managed memory" + +5) Memory Hotplug + + a) mhp component surfaces a dax device memory region as multiple memory + blocks to the page allocator + + * blocks appear in :code:`/sys/bus/memory/devices` and linked to a NUMA node + + b) blocks are onlined into the requested zone (NORMAL or MOVABLE) + + * Memory is marked "Driver Managed" to avoid kexec from using it as region + for kernel updates -- cgit v1.2.3 From bef826ead3cde244b1a7393bd0c7eee7bbbec8cf Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:25 -0400 Subject: cxl: docs/linux - early boot configuration Document __init time configurations that affect CXL driver probe process and memory region configuration. Signed-off-by: Gregory Price Reviewed-by: Dave Jiang Link: https://patch.msgid.link/20250512162134.3596150-9-gourry@gourry.net Signed-off-by: Dave Jiang --- Documentation/driver-api/cxl/index.rst | 1 + Documentation/driver-api/cxl/linux/early-boot.rst | 131 ++++++++++++++++++++++ 2 files changed, 132 insertions(+) create mode 100644 Documentation/driver-api/cxl/linux/early-boot.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-api/cxl/index.rst index bc2228c77c32..d2eefe575604 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -34,6 +34,7 @@ that have impacts on each other. The docs here break up configurations steps. :caption: Linux Kernel Configuration linux/overview + linux/early-boot linux/access-coordinates diff --git a/Documentation/driver-api/cxl/linux/early-boot.rst b/Documentation/driver-api/cxl/linux/early-boot.rst new file mode 100644 index 000000000000..8c1c497bc772 --- /dev/null +++ b/Documentation/driver-api/cxl/linux/early-boot.rst @@ -0,0 +1,131 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======================= +Linux Init (Early Boot) +======================= + +Linux configuration is split into two major steps: Early-Boot and everything else. + +During early boot, Linux sets up immutable resources (such as numa nodes), while +later operations include things like driver probe and memory hotplug. Linux may +read EFI and ACPI information throughout this process to configure logical +representations of the devices. + +During Linux Early Boot stage (functions in the kernel that have the __init +decorator), the system takes the resources created by EFI/BIOS (ACPI tables) +and turns them into resources that the kernel can consume. + + +BIOS, Build and Boot Options +============================ + +There are 4 pre-boot options that need to be considered during kernel build +which dictate how memory will be managed by Linux during early boot. + +* EFI_MEMORY_SP + + * BIOS/EFI Option that dictates whether memory is SystemRAM or + Specific Purpose. Specific Purpose memory will be deferred to + drivers to manage - and not immediately exposed as system RAM. + +* CONFIG_EFI_SOFT_RESERVE + + * Linux Build config option that dictates whether the kernel supports + Specific Purpose memory. + +* CONFIG_MHP_DEFAULT_ONLINE_TYPE + + * Linux Build config that dictates whether and how Specific Purpose memory + converted to a dax device should be managed (left as DAX or onlined as + SystemRAM in ZONE_NORMAL or ZONE_MOVABLE). + +* nosoftreserve + + * Linux kernel boot option that dictates whether Soft Reserve should be + supported. Similar to CONFIG_EFI_SOFT_RESERVE. + +Memory Map Creation +=================== + +While the kernel parses the EFI memory map, if :code:`Specific Purpose` memory +is supported and detected, it will set this region aside as +:code:`SOFT_RESERVED`. + +If :code:`EFI_MEMORY_SP=0`, :code:`CONFIG_EFI_SOFT_RESERVE=n`, or +:code:`nosoftreserve=y` - Linux will default a CXL device memory region to +SystemRAM. This will expose the memory to the kernel page allocator in +:code:`ZONE_NORMAL`, making it available for use for most allocations (including +:code:`struct page` and page tables). + +If `Specific Purpose` is set and supported, :code:`CONFIG_MHP_DEFAULT_ONLINE_TYPE_*` +dictates whether the memory is onlined by default (:code:`_OFFLINE` or +:code:`_ONLINE_*`), and if online which zone to online this memory to by default +(:code:`_NORMAL` or :code:`_MOVABLE`). + +If placed in :code:`ZONE_MOVABLE`, the memory will not be available for most +kernel allocations (such as :code:`struct page` or page tables). This may +significant impact performance depending on the memory capacity of the system. + + +NUMA Node Reservation +===================== + +Linux refers to the proximity domains (:code:`PXM`) defined in the SRAT to +create NUMA nodes in :code:`acpi_numa_init`. Typically, there is a 1:1 relation +between :code:`PXM` and NUMA node IDs. + +SRAT is the only ACPI defined way of defining Proximity Domains. Linux chooses +to, at most, map those 1:1 with NUMA nodes. CEDT adds a description of SPA +ranges which Linux may wish to map to one or more NUMA nodes. + +If there are CXL ranges in the CFMWS but not in SRAT, then a fake :code:`PXM` +is created (as of v6.15). In the future, Linux may reject CFMWS not described +by SRAT due to the ambiguity of proximity domain association. + +It is important to note that NUMA node creation cannot be done at runtime. All +possible NUMA nodes are identified at :code:`__init` time, more specifically +during :code:`mm_init`. The CEDT and SRAT must contain sufficient :code:`PXM` +data for Linux to identify NUMA nodes their associated memory regions. + +The relevant code exists in: :code:`linux/drivers/acpi/numa/srat.c`. + +See the Example Platform Configurations section for more information. + +Memory Tiers Creation +===================== +Memory tiers are a collection of NUMA nodes grouped by performance characteristics. +During :code:`__init`, Linux initializes the system with a default memory tier that +contains all nodes marked :code:`N_MEMORY`. + +:code:`memory_tier_init` is called at boot for all nodes with memory online by +default. :code:`memory_tier_late_init` is called during late-init for nodes setup +during driver configuration. + +Nodes are only marked :code:`N_MEMORY` if they have *online* memory. + +Tier membership can be inspected in :: + + /sys/devices/virtual/memory_tiering/memory_tierN/nodelist + 0-1 + +If nodes are grouped which have clear difference in performance, check the HMAT +and CDAT information for the CXL nodes. All nodes default to the DRAM tier, +unless HMAT/CDAT information is reported to the memory_tier component via +`access_coordinates`. + +Contiguous Memory Allocation +============================ +The contiguous memory allocator (CMA) enables reservation of contiguous memory +regions on NUMA nodes during early boot. However, CMA cannot reserve memory +on NUMA nodes that are not online during early boot. :: + + void __init hugetlb_cma_reserve(int order) { + if (!node_online(nid)) + /* do not allow reservations */ + } + +This means if users intend to defer management of CXL memory to the driver, CMA +cannot be used to guarantee huge page allocations. If enabling CXL memory as +SystemRAM in `ZONE_NORMAL` during early boot, CMA reservations per-node can be +made with the :code:`cma_pernuma` or :code:`numa_cma` kernel command line +parameters. -- cgit v1.2.3 From 2e2865a1d0c56987d1eb328645911718f0e672da Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:26 -0400 Subject: cxl: docs/linux - add cxl-driver theory of operation Add docs for the CXL driver that explains the base devices, decoder types, region types, mailbox interfaces, and decoder programming. Signed-off-by: Gregory Price Link: https://patch.msgid.link/20250512162134.3596150-10-gourry@gourry.net Signed-off-by: Dave Jiang --- Documentation/driver-api/cxl/index.rst | 1 + Documentation/driver-api/cxl/linux/cxl-driver.rst | 522 ++++++++++++++++++++++ 2 files changed, 523 insertions(+) create mode 100644 Documentation/driver-api/cxl/linux/cxl-driver.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-api/cxl/index.rst index d2eefe575604..df3c7763c79a 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -35,6 +35,7 @@ that have impacts on each other. The docs here break up configurations steps. linux/overview linux/early-boot + linux/cxl-driver linux/access-coordinates diff --git a/Documentation/driver-api/cxl/linux/cxl-driver.rst b/Documentation/driver-api/cxl/linux/cxl-driver.rst new file mode 100644 index 000000000000..9a9e8ecee578 --- /dev/null +++ b/Documentation/driver-api/cxl/linux/cxl-driver.rst @@ -0,0 +1,522 @@ +.. SPDX-License-Identifier: GPL-2.0 + +==================== +CXL Driver Operation +==================== + +The devices described in this section are present in :: + + /sys/bus/cxl/devices/ + /dev/cxl/ + +The :code:`cxl-cli` library, maintained as part of the NDTCL project, may +be used to script interactions with these devices. + +Drivers +======= +The CXL driver is split into a number of drivers. + +* cxl_core - fundamental init interface and core object creation +* cxl_port - initializes root and provides port enumeration interface. +* cxl_acpi - initializes root decoders and interacts with ACPI data. +* cxl_p/mem - initializes memory devices +* cxl_pci - uses cxl_port to enumates the actual fabric hierarchy. + +Driver Devices +============== +Here is an example from a single-socket system with 4 host bridges. Two host +bridges have a single memory device attached, and the devices are interleaved +into a single memory region. The memory region has been converted to dax. :: + + # ls /sys/bus/cxl/devices/ + dax_region0 decoder3.0 decoder6.0 mem0 port3 + decoder0.0 decoder4.0 decoder6.1 mem1 port4 + decoder1.0 decoder5.0 endpoint5 port1 region0 + decoder2.0 decoder5.1 endpoint6 port2 root0 + +For this section we'll explore the devices present in this configuration, but +we'll explore more configurations in-depth in example configurations below. + +Base Devices +------------ +Most devices in a CXL fabric are a `port` of some kind (because each +device mostly routes request from one device to the next, rather than +provide a manageable service). + +Root +~~~~ +The `CXL Root` is logical object created by the `cxl_acpi` driver during +:code:`cxl_acpi_probe` - if the :code:`ACPI0017` `Compute Express Link +Root Object` Device Class is found. + +The Root contains links to: + +* `Host Bridge Ports` defined by ACPI CEDT CHBS. + +* `Root Decoders` defined by ACPI CEDT CFMWS. + +:: + + # ls /sys/bus/cxl/devices/root0 + decoder0.0 dport0 dport5 port2 subsystem + decoders_committed dport1 modalias port3 uevent + devtype dport4 port1 port4 uport + + # cat /sys/bus/cxl/devices/root0/devtype + cxl_port + + # cat port1/devtype + cxl_port + + # cat decoder0.0/devtype + cxl_decoder_root + +The root is first `logical port` in the CXL fabric, as presented by the Linux +CXL driver. The `CXL root` is a special type of `switch port`, in that it +only has downstream port connections. + +Port +~~~~ +A `port` object is better described as a `switch port`. It may represent a +host bridge to the root or an actual switch port on a switch. A `switch port` +contains one or more decoders used to route memory requests downstream ports, +which may be connected to another `switch port` or an `endpoint port`. + +:: + + # ls /sys/bus/cxl/devices/port1 + decoder1.0 dport0 driver parent_dport uport + decoders_committed dport113 endpoint5 subsystem + devtype dport2 modalias uevent + + # cat devtype + cxl_port + + # cat decoder1.0/devtype + cxl_decoder_switch + + # cat endpoint5/devtype + cxl_port + +CXL `Host Bridges` in the fabric are probed during :code:`cxl_acpi_probe` at +the time the `CXL Root` is probed. The allows for the immediate logical +connection to between the root and host bridge. + +* The root has a downstream port connection to a host bridge + +* The host bridge has an upstream port connection to the root. + +* The host bridge has one or more downstream port connections to switch + or endpoint ports. + +A `Host Bridge` is a special type of CXL `switch port`. It is explicitly +defined in the ACPI specification via `ACPI0016` ID. `Host Bridge` ports +will be probed at `acpi_probe` time, while similar ports on an actual switch +will be probed later. Otherwise, switch and host bridge ports look very +similar - the both contain switch decoders which route accesses between +upstream and downstream ports. + +Endpoint +~~~~~~~~ +An `endpoint` is a terminal port in the fabric. This is a `logical device`, +and may be one of many `logical devices` presented by a memory device. It +is still considered a type of `port` in the fabric. + +An `endpoint` contains `endpoint decoders` available for use and the +*Coherent Device Attribute Table* (CDAT) used to describe the capabilities +of the device. :: + + # ls /sys/bus/cxl/devices/endpoint5 + CDAT decoders_committed modalias uevent + decoder5.0 devtype parent_dport uport + decoder5.1 driver subsystem + + # cat /sys/bus/cxl/devices/endpoint5/devtype + cxl_port + + # cat /sys/bus/cxl/devices/endpoint5/decoder5.0/devtype + cxl_decoder_endpoint + + +Memory Device (memdev) +~~~~~~~~~~~~~~~~~~~~~~ +A `memdev` is probed and added by the `cxl_pci` driver in :code:`cxl_pci_probe` +and is managed by the `cxl_mem` driver. It primarily provides the `IOCTL` +interface to a memory device, via :code:`/dev/cxl/memN`, and exposes various +device configuration data. :: + + # ls /sys/bus/cxl/devices/mem0 + dev firmware_version payload_max security uevent + driver label_storage_size pmem serial + firmware numa_node ram subsystem + + +Decoders +-------- +A `Decoder` is short for a CXL Host-Managed Device Memory (HDM) Decoder. It is +a device that routes accesses through the CXL fabric to an endpoint, and at +the endpoint translates a `Host Physical` to `Device Physical` Addressing. + +The CXL 3.1 specification heavily implies that only endpoint decoders should +engage in translation of `Host Physical Address` to `Device Physical Address`. +:: + + 8.2.4.20 CXL HDM Decoder Capability Structure + + IMPLEMENTATION NOTE + CXL Host Bridge and Upstream Switch Port Decode Flow + + IMPLEMENTATION NOTE + Device Decode Logic + +These notes imply that there are two logical groups of decoders. + +* Routing Decoder - a decoder which routes accesses but does not translate + addresses from HPA to DPA. + +* Translating Decoder - a decoder which translates accesses from HPA to DPA + for an endpoint to service. + +The CXL drivers distinguish 3 decoder types: root, switch, and endpoint. Only +endpoint decoders are Translating Decoders, all others are Routing Decoders. + +.. note:: PLATFORM VENDORS BE AWARE + + Linux makes a strong assumption that endpoint decoders are the only decoder + in the fabric that actively translates HPA to DPA. Linux assumes routing + decoders pass the HPA unchanged to the next decoder in the fabric. + + It is therefore assumed that any given decoder in the fabric will have an + address range that is a subset of its upstream port decoder. Any deviation + from this scheme undefined per the specification. Linux prioritizes + spec-defined / architectural behavior. + +Decoders may have one or more `Downstream Targets` if configured to interleave +memory accesses. This will be presented in sysfs via the :code:`target_list` +parameter. + +Root Decoder +~~~~~~~~~~~~ +A `Root Decoder` is logical construct of the physical address and interleave +configurations present in the ACPI CEDT CFMWS. Linux presents this information +as a decoder present in the `CXL Root`. We consider this a `Root Decoder`, +though technically it exists on the boundary of the CXL specification and +platform-specific CXL root implementations. + +Linux considers these logical decoders a type of `Routing Decoder`, and is the +first decoder in the CXL fabric to receive a memory access from the platform's +memory controllers. + +`Root Decoders` are created during :code:`cxl_acpi_probe`. One root decoder +is created per CFMWS entry in the ACPI CEDT. + +The :code:`target_list` parameter is filled by the CFMWS target fields. Targets +of a root decoder are `Host Bridges`, which means interleave done at the root +decoder level is an `Inter-Host-Bridge Interleave`. + +Only root decoders are capable of `Inter-Host-Bridge Interleave`. + +Such interleaves must be configured by the platform and described in the ACPI +CEDT CFMWS, as the target CXL host bridge UIDs in the CFMWS must match the CXL +host bridge UIDs in the ACPI CEDT CHBS and ACPI DSDT. + +Interleave settings in a rootdecoder describe how to interleave accesses among +the *immediate downstream targets*, not the entire interleave set. + +The memory range described in the root decoder is used to + +1) Create a memory region (:code:`region0` in this example), and + +2) Associate the region with an IO Memory Resource (:code:`kernel/resource.c`) + +:: + + # ls /sys/bus/cxl/devices/decoder0.0/ + cap_pmem devtype region0 + cap_ram interleave_granularity size + cap_type2 interleave_ways start + cap_type3 locked subsystem + create_ram_region modalias target_list + delete_region qos_class uevent + + # cat /sys/bus/cxl/devices/decoder0.0/region0/resource + 0xc050000000 + +The IO Memory Resource is created during early boot when the CFMWS region is +identified in the EFI Memory Map or E820 table (on x86). + +Root decoders are defined as a separate devtype, but are also a type +of `Switch Decoder` due to having downstream targets. :: + + # cat /sys/bus/cxl/devices/decoder0.0/devtype + cxl_decoder_root + +Switch Decoder +~~~~~~~~~~~~~~ +Any non-root, translating decoder is considered a `Switch Decoder`, and will +present with the type :code:`cxl_decoder_switch`. Both `Host Bridge` and `CXL +Switch` (device) decoders are of type :code:`cxl_decoder_switch`. :: + + # ls /sys/bus/cxl/devices/decoder1.0/ + devtype locked size target_list + interleave_granularity modalias start target_type + interleave_ways region subsystem uevent + + # cat /sys/bus/cxl/devices/decoder1.0/devtype + cxl_decoder_switch + + # cat /sys/bus/cxl/devices/decoder1.0/region + region0 + +A `Switch Decoder` has associations between a region defined by a root +decoder and downstream target ports. Interleaving done within a switch decoder +is a multi-downstream-port interleave (or `Intra-Host-Bridge Interleave` for +host bridges). + +Interleave settings in a switch decoder describe how to interleave accesses +among the *immediate downstream targets*, not the entire interleave set. + +Switch decoders are created during :code:`cxl_switch_port_probe` in the +:code:`cxl_port` driver, and is created based on a PCI device's DVSEC +registers. + +Switch decoder programming is validated during probe if the platform programs +them during boot (See `Auto Decoders` below), or on commit if programmed at +runtime (See `Runtime Programming` below). + + +Endpoint Decoder +~~~~~~~~~~~~~~~~ +Any decoder attached to a *terminal* point in the CXL fabric (`An Endpoint`) is +considered an `Endpoint Decoder`. Endpoint decoders are of type +:code:`cxl_decoder_endpoint`. :: + + # ls /sys/bus/cxl/devices/decoder5.0 + devtype locked start + dpa_resource modalias subsystem + dpa_size mode target_type + interleave_granularity region uevent + interleave_ways size + + # cat /sys/bus/cxl/devices/decoder5.0/devtype + cxl_decoder_endpoint + + # cat /sys/bus/cxl/devices/decoder5.0/region + region0 + +An `Endpoint Decoder` has an association with a region defined by a root +decoder and describes the device-local resource associated with this region. + +Unlike root and switch decoders, endpoint decoders translate `Host Physical` to +`Device Physical` address ranges. The interleave settings on an endpoint +therefore describe the entire *interleave set*. + +`Device Physical Address` regions must be committed in-order. For example, the +DPA region starting at 0x80000000 cannot be committed before the DPA region +starting at 0x0. + +As of Linux v6.15, Linux does not support *imbalanced* interleave setups, all +endpoints in an interleave set are expected to have the same interleave +settings (granularity and ways must be the same). + +Endpoint decoders are created during :code:`cxl_endpoint_port_probe` in the +:code:`cxl_port` driver, and is created based on a PCI device's DVSEC registers. + +Regions +------- + +Memory Region +~~~~~~~~~~~~~ +A `Memory Region` is a logical construct that connects a set of CXL ports in +the fabric to an IO Memory Resource. It is ultimately used to expose the memory +on these devices to the DAX subsystem via a `DAX Region`. + +An example RAM region: :: + + # ls /sys/bus/cxl/devices/region0/ + access0 devtype modalias subsystem uuid + access1 driver mode target0 + commit interleave_granularity resource target1 + dax_region0 interleave_ways size uevent + +A memory region can be constructed during endpoint probe, if decoders were +programmed by BIOS/EFI (see `Auto Decoders`), or by creating a region manually +via a `Root Decoder`'s :code:`create_ram_region` or :code:`create_pmem_region` +interfaces. + +The interleave settings in a `Memory Region` describe the configuration of the +`Interleave Set` - and are what can be expected to be seen in the endpoint +interleave settings. + + +DAX Region +~~~~~~~~~~ +A `DAX Region` is used to convert a CXL `Memory Region` to a DAX device. A +DAX device may then be accessed directly via a file descriptor interface, or +converted to System RAM via the DAX kmem driver. See the DAX driver section +for more details. :: + + # ls /sys/bus/cxl/devices/dax_region0/ + dax0.0 devtype modalias uevent + dax_region driver subsystem + + +Mailbox Interfaces +------------------ +A mailbox command interface for each device is exposed in :: + + /dev/cxl/mem0 + /dev/cxl/mem1 + +These mailboxes may receive any specification-defined command. Raw commands +(custom commands) can only be sent to these interfaces if the build config +:code:`CXL_MEM_RAW_COMMANDS` is set. This is considered a debug and/or +development interface, not an officially supported mechanism for creation +of vendor-specific commands (see the `fwctl` subsystem for that). + +Decoder Programming +=================== + +Runtime Programming +------------------- +During probe, the only decoders *required* to be programmed are `Root Decoders`. +In reality, `Root Decoders` are a logical construct to describe the memory +region and interleave configuration at the host bridge level - as described +in the ACPI CEDT CFMWS. + +All other `Switch` and `Endpoint` decoders may be programmed by the user +at runtime - if the platform supports such configurations. + +This interaction is what creates a `Software Defined Memory` environment. + +See the :code:`cxl-cli` documentation for more information about how to +configure CXL decoders at runtime. + +Auto Decoders +------------- +Auto Decoders are decoders programmed by BIOS/EFI at boot time, and are +almost always locked (cannot be changed). This is done by a platform +which may have a static configuration - or certain quirks which may prevent +dynamic runtime changes to the decoders (such as requiring additional +controller programming within the CPU complex outside the scope of CXL). + +Auto Decoders are probed automatically as long as the devices and memory +regions they are associated with probe without issue. When probing Auto +Decoders, the driver's primary responsibility is to ensure the fabric is +sane - as-if validating runtime programmed regions and decoders. + +If Linux cannot validate auto-decoder configuration, the memory will not +be surfaced as a DAX device - and therefore not be exposed to the page +allocator - effectively stranding it. + +Interleave +---------- + +The Linux CXL driver supports `Cross-Link First` interleave. This dictates +how interleave is programmed at each decoder step, as the driver validates +the relationships between a decoder and it's parent. + +For example, in a `Cross-Link First` interleave setup with 16 endpoints +attached to 4 host bridges, linux expects the following ways/granularity +across the root, host bridge, and endpoints respectively. :: + + ways granularity + root 4 256 + host bridge 4 1024 + endpoint 16 256 + +At the root, every a given access will be routed to the +:code:`((HPA / 256) % 4)th` target host bridge. Within a host bridge, every +:code:`((HPA / 1024) % 4)th` target endpoint. Each endpoint will translate +the access based on the entire 16 device interleave set. + +Unbalanced interleave sets are not supported - decoders at a similar point +in the hierarchy (e.g. all host bridge decoders) must have the same ways and +granularity configuration. + +At Root +~~~~~~~ +Root decoder interleave is defined by the ACPI CEDT CFMWS. The CEDT +may actually define multiple CFMWS configurations to describe the same +physical capacity - with the intent to allow users to decide at runtime +whether to online memory as interleaved or non-interleaved. :: + + Subtable Type : 01 [CXL Fixed Memory Window Structure] + Window base address : 0000000100000000 + Window size : 0000000100000000 + Interleave Members (2^n) : 00 + Interleave Arithmetic : 00 + First Target : 00000007 + + Subtable Type : 01 [CXL Fixed Memory Window Structure] + Window base address : 0000000200000000 + Window size : 0000000100000000 + Interleave Members (2^n) : 00 + Interleave Arithmetic : 00 + First Target : 00000006 + + Subtable Type : 01 [CXL Fixed Memory Window Structure] + Window base address : 0000000300000000 + Window size : 0000000200000000 + Interleave Members (2^n) : 01 + Interleave Arithmetic : 00 + First Target : 00000007 + Next Target : 00000006 + +In this example, the CFMWS defines two discrete non-interleaved 4GB regions +for each host bridge, and one interleaved 8GB region that targets both. This +would result in 3 root decoders presenting in the root. :: + + # ls /sys/bus/cxl/devices/root0 + decoder0.0 decoder0.1 decoder0.2 + + # cat /sys/bus/cxl/devices/decoder0.0/target_list start size + 7 + 0x100000000 + 0x100000000 + + # cat /sys/bus/cxl/devices/decoder0.1/target_list start size + 6 + 0x200000000 + 0x100000000 + + # cat /sys/bus/cxl/devices/decoder0.2/target_list start size + 7,6 + 0x300000000 + 0x200000000 + +These decoders are not runtime programmable. They are used to generate a +`Memory Region` to bring this memory online with runtime programmed settings +at the `Switch` and `Endpoint` decoders. + +At Host Bridge or Switch +~~~~~~~~~~~~~~~~~~~~~~~~ +`Host Bridge` and `Switch` decoders are programmable via the following fields: + +- :code:`start` - the HPA region associated with the memory region +- :code:`size` - the size of the region +- :code:`target_list` - the list of downstream ports +- :code:`interleave_ways` - the number downstream ports to interleave across +- :code:`interleave_granularity` - the granularity to interleave at. + +Linux expects the :code:`interleave_granularity` of switch decoders to be +derived from their upstream port connections. In `Cross-Link First` interleave +configurations, the :code:`interleave_granularity` of a decoder is equal to +:code:`parent_interleave_granularity * parent_interleave_ways`. + +At Endpoint +~~~~~~~~~~~ +`Endpoint Decoders` are programmed similar to Host Bridge and Switch decoders, +with the exception that the ways and granularity are defined by the interleave +set (e.g. the interleave settings defined by the associated `Memory Region`). + +- :code:`start` - the HPA region associated with the memory region +- :code:`size` - the size of the region +- :code:`interleave_ways` - the number endpoints in the interleave set +- :code:`interleave_granularity` - the granularity to interleave at. + +These settings are used by endpoint decoders to *Translate* memory requests +from HPA to DPA. This is why they must be aware of the entire interleave set. + +Linux does not support unbalanced interleave configurations. As a result, all +endpoints in an interleave set must have the same ways and granularity. -- cgit v1.2.3 From ef3a43a69133a211118b5716615cd649ac73b8dc Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:27 -0400 Subject: cxl: docs/linux/cxl-driver - add example configurations Add 4 example configurations: - single device - cross-host-bridge interleave - intra-host-bridge-interleave - multi-level interleave Signed-off-by: Gregory Price Link: https://patch.msgid.link/20250512162134.3596150-11-gourry@gourry.net Signed-off-by: Dave Jiang --- Documentation/driver-api/cxl/linux/cxl-driver.rst | 10 + .../linux/example-configurations/hb-interleave.rst | 314 ++++++++++++++++ .../example-configurations/intra-hb-interleave.rst | 291 +++++++++++++++ .../example-configurations/multi-interleave.rst | 401 +++++++++++++++++++++ .../linux/example-configurations/single-device.rst | 246 +++++++++++++ 5 files changed, 1262 insertions(+) create mode 100644 Documentation/driver-api/cxl/linux/example-configurations/hb-interleave.rst create mode 100644 Documentation/driver-api/cxl/linux/example-configurations/intra-hb-interleave.rst create mode 100644 Documentation/driver-api/cxl/linux/example-configurations/multi-interleave.rst create mode 100644 Documentation/driver-api/cxl/linux/example-configurations/single-device.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/linux/cxl-driver.rst b/Documentation/driver-api/cxl/linux/cxl-driver.rst index 9a9e8ecee578..486baf8551aa 100644 --- a/Documentation/driver-api/cxl/linux/cxl-driver.rst +++ b/Documentation/driver-api/cxl/linux/cxl-driver.rst @@ -520,3 +520,13 @@ from HPA to DPA. This is why they must be aware of the entire interleave set. Linux does not support unbalanced interleave configurations. As a result, all endpoints in an interleave set must have the same ways and granularity. + +Example Configurations +====================== +.. toctree:: + :maxdepth: 1 + + example-configurations/single-device.rst + example-configurations/hb-interleave.rst + example-configurations/intra-hb-interleave.rst + example-configurations/multi-interleave.rst diff --git a/Documentation/driver-api/cxl/linux/example-configurations/hb-interleave.rst b/Documentation/driver-api/cxl/linux/example-configurations/hb-interleave.rst new file mode 100644 index 000000000000..f071490763a2 --- /dev/null +++ b/Documentation/driver-api/cxl/linux/example-configurations/hb-interleave.rst @@ -0,0 +1,314 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================ +Inter-Host-Bridge Interleave +============================ +This cxl-cli configuration dump shows the following host configuration: + +* A single socket system with one CXL root +* CXL Root has Four (4) CXL Host Bridges +* Two CXL Host Bridges have a single CXL Memory Expander Attached +* The CXL root is configured to interleave across the two host bridges. + +This output is generated by :code:`cxl list -v` and describes the relationships +between objects exposed in :code:`/sys/bus/cxl/devices/`. + +:: + + [ + { + "bus":"root0", + "provider":"ACPI.CXL", + "nr_dports":4, + "dports":[ + { + "dport":"pci0000:00", + "alias":"ACPI0016:01", + "id":0 + }, + { + "dport":"pci0000:a8", + "alias":"ACPI0016:02", + "id":4 + }, + { + "dport":"pci0000:2a", + "alias":"ACPI0016:03", + "id":1 + }, + { + "dport":"pci0000:d2", + "alias":"ACPI0016:00", + "id":5 + } + ], + +This chunk shows the CXL "bus" (root0) has 4 downstream ports attached to CXL +Host Bridges. The `Root` can be considered the singular upstream port attached +to the platform's memory controller - which routes memory requests to it. + +The `ports:root0` section lays out how each of these downstream ports are +configured. If a port is not configured (id's 0 and 1), they are omitted. + +:: + + "ports:root0":[ + { + "port":"port1", + "host":"pci0000:d2", + "depth":1, + "nr_dports":3, + "dports":[ + { + "dport":"0000:d2:01.1", + "alias":"device:02", + "id":0 + }, + { + "dport":"0000:d2:01.3", + "alias":"device:05", + "id":2 + }, + { + "dport":"0000:d2:07.1", + "alias":"device:0d", + "id":113 + } + ], + +This chunk shows the available downstream ports associated with the CXL Host +Bridge :code:`port1`. In this case, :code:`port1` has 3 available downstream +ports: :code:`dport1`, :code:`dport2`, and :code:`dport113`.. + +:: + + "endpoints:port1":[ + { + "endpoint":"endpoint5", + "host":"mem0", + "parent_dport":"0000:d2:01.1", + "depth":2, + "memdev":{ + "memdev":"mem0", + "ram_size":137438953472, + "serial":0, + "numa_node":0, + "host":"0000:d3:00.0" + }, + "decoders:endpoint5":[ + { + "decoder":"decoder5.0", + "resource":825975898112, + "size":274877906944, + "interleave_ways":2, + "interleave_granularity":256, + "region":"region0", + "dpa_resource":0, + "dpa_size":137438953472, + "mode":"ram" + } + ] + } + ], + +This chunk shows the endpoints attached to the host bridge :code:`port1`. + +:code:`endpoint5` contains a single configured decoder :code:`decoder5.0` +which has the same interleave configuration as :code:`region0` (shown later). + +Next we have the decodesr belonging to the host bridge: + +:: + + "decoders:port1":[ + { + "decoder":"decoder1.0", + "resource":825975898112, + "size":274877906944, + "interleave_ways":1, + "region":"region0", + "nr_targets":1, + "targets":[ + { + "target":"0000:d2:01.1", + "alias":"device:02", + "position":0, + "id":0 + } + ] + } + ] + }, + +Host Bridge :code:`port1` has a single decoder (:code:`decoder1.0`), whose only +target is :code:`dport1` - which is attached to :code:`endpoint5`. + +The following chunk shows a similar configuration for Host Bridge :code:`port3`, +the second host bridge with a memory device attached. + +:: + + { + "port":"port3", + "host":"pci0000:a8", + "depth":1, + "nr_dports":1, + "dports":[ + { + "dport":"0000:a8:01.1", + "alias":"device:c3", + "id":0 + } + ], + "endpoints:port3":[ + { + "endpoint":"endpoint6", + "host":"mem1", + "parent_dport":"0000:a8:01.1", + "depth":2, + "memdev":{ + "memdev":"mem1", + "ram_size":137438953472, + "serial":0, + "numa_node":0, + "host":"0000:a9:00.0" + }, + "decoders:endpoint6":[ + { + "decoder":"decoder6.0", + "resource":825975898112, + "size":274877906944, + "interleave_ways":2, + "interleave_granularity":256, + "region":"region0", + "dpa_resource":0, + "dpa_size":137438953472, + "mode":"ram" + } + ] + } + ], + "decoders:port3":[ + { + "decoder":"decoder3.0", + "resource":825975898112, + "size":274877906944, + "interleave_ways":1, + "region":"region0", + "nr_targets":1, + "targets":[ + { + "target":"0000:a8:01.1", + "alias":"device:c3", + "position":0, + "id":0 + } + ] + } + ] + }, + + +The next chunk shows the two CXL host bridges without attached endpoints. + +:: + + { + "port":"port2", + "host":"pci0000:00", + "depth":1, + "nr_dports":2, + "dports":[ + { + "dport":"0000:00:01.3", + "alias":"device:55", + "id":2 + }, + { + "dport":"0000:00:07.1", + "alias":"device:5d", + "id":113 + } + ] + }, + { + "port":"port4", + "host":"pci0000:2a", + "depth":1, + "nr_dports":1, + "dports":[ + { + "dport":"0000:2a:01.1", + "alias":"device:d0", + "id":0 + } + ] + } + ], + +Next we have the `Root Decoders` belonging to :code:`root0`. This root decoder +applies the interleave across the downstream ports :code:`port1` and +:code:`port3` - with a granularity of 256 bytes. + +This information is generated by the CXL driver reading the ACPI CEDT CMFWS. + +:: + + "decoders:root0":[ + { + "decoder":"decoder0.0", + "resource":825975898112, + "size":274877906944, + "interleave_ways":2, + "interleave_granularity":256, + "max_available_extent":0, + "volatile_capable":true, + "nr_targets":2, + "targets":[ + { + "target":"pci0000:a8", + "alias":"ACPI0016:02", + "position":1, + "id":4 + }, + { + "target":"pci0000:d2", + "alias":"ACPI0016:00", + "position":0, + "id":5 + } + ], + +Finally we have the `Memory Region` associated with the `Root Decoder` +:code:`decoder0.0`. This region describes the overall interleave configuration +of the interleave set. + +:: + + "regions:decoder0.0":[ + { + "region":"region0", + "resource":825975898112, + "size":274877906944, + "type":"ram", + "interleave_ways":2, + "interleave_granularity":256, + "decode_state":"commit", + "mappings":[ + { + "position":1, + "memdev":"mem1", + "decoder":"decoder6.0" + }, + { + "position":0, + "memdev":"mem0", + "decoder":"decoder5.0" + } + ] + } + ] + } + ] + } + ] diff --git a/Documentation/driver-api/cxl/linux/example-configurations/intra-hb-interleave.rst b/Documentation/driver-api/cxl/linux/example-configurations/intra-hb-interleave.rst new file mode 100644 index 000000000000..077dfaf8458d --- /dev/null +++ b/Documentation/driver-api/cxl/linux/example-configurations/intra-hb-interleave.rst @@ -0,0 +1,291 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================ +Intra-Host-Bridge Interleave +============================ +This cxl-cli configuration dump shows the following host configuration: + +* A single socket system with one CXL root +* CXL Root has Four (4) CXL Host Bridges +* One (1) CXL Host Bridges has two CXL Memory Expanders Attached +* The Host bridge decoder is programmed to interleave across the expanders. + +This output is generated by :code:`cxl list -v` and describes the relationships +between objects exposed in :code:`/sys/bus/cxl/devices/`. + +:: + + [ + { + "bus":"root0", + "provider":"ACPI.CXL", + "nr_dports":4, + "dports":[ + { + "dport":"pci0000:00", + "alias":"ACPI0016:01", + "id":0 + }, + { + "dport":"pci0000:a8", + "alias":"ACPI0016:02", + "id":4 + }, + { + "dport":"pci0000:2a", + "alias":"ACPI0016:03", + "id":1 + }, + { + "dport":"pci0000:d2", + "alias":"ACPI0016:00", + "id":5 + } + ], + +This chunk shows the CXL "bus" (root0) has 4 downstream ports attached to CXL +Host Bridges. The `Root` can be considered the singular upstream port attached +to the platform's memory controller - which routes memory requests to it. + +The `ports:root0` section lays out how each of these downstream ports are +configured. If a port is not configured (id's 0 and 1), they are omitted. + +:: + + "ports:root0":[ + { + "port":"port1", + "host":"pci0000:d2", + "depth":1, + "nr_dports":3, + "dports":[ + { + "dport":"0000:d2:01.1", + "alias":"device:02", + "id":0 + }, + { + "dport":"0000:d2:01.3", + "alias":"device:05", + "id":2 + }, + { + "dport":"0000:d2:07.1", + "alias":"device:0d", + "id":113 + } + ], + +This chunk shows the available downstream ports associated with the CXL Host +Bridge :code:`port1`. In this case, :code:`port1` has 3 available downstream +ports: :code:`dport1`, :code:`dport2`, and :code:`dport113`.. + +:: + + "endpoints:port1":[ + { + "endpoint":"endpoint5", + "host":"mem0", + "parent_dport":"0000:d2:01.1", + "depth":2, + "memdev":{ + "memdev":"mem0", + "ram_size":137438953472, + "serial":0, + "numa_node":0, + "host":"0000:d3:00.0" + }, + "decoders:endpoint5":[ + { + "decoder":"decoder5.0", + "resource":825975898112, + "size":274877906944, + "interleave_ways":2, + "interleave_granularity":256, + "region":"region0", + "dpa_resource":0, + "dpa_size":137438953472, + "mode":"ram" + } + ] + }, + { + "endpoint":"endpoint6", + "host":"mem1", + "parent_dport":"0000:d2:01.3, + "depth":2, + "memdev":{ + "memdev":"mem1", + "ram_size":137438953472, + "serial":0, + "numa_node":0, + "host":"0000:a9:00.0" + }, + "decoders:endpoint6":[ + { + "decoder":"decoder6.0", + "resource":825975898112, + "size":274877906944, + "interleave_ways":2, + "interleave_granularity":256, + "region":"region0", + "dpa_resource":0, + "dpa_size":137438953472, + "mode":"ram" + } + ] + } + ], + +This chunk shows the endpoints attached to the host bridge :code:`port1`. + +:code:`endpoint5` contains a single configured decoder :code:`decoder5.0` +which has the same interleave configuration memory region they belong to +(show later). + +Next we have the decoders belonging to the host bridge: + +:: + + "decoders:port1":[ + { + "decoder":"decoder1.0", + "resource":825975898112, + "size":274877906944, + "interleave_ways":2, + "interleave_granularity":256, + "region":"region0", + "nr_targets":2, + "targets":[ + { + "target":"0000:d2:01.1", + "alias":"device:02", + "position":0, + "id":0 + }, + { + "target":"0000:d2:01.3", + "alias":"device:05", + "position":1, + "id":0 + } + ] + } + ] + }, + +Host Bridge :code:`port1` has a single decoder (:code:`decoder1.0`) with two +targets: :code:`dport1` and :code:`dport3` - which are attached to +:code:`endpoint5` and :code:`endpoint6` respectively. + +The host bridge decoder interleaves these devices at a 256 byte granularity. + +The next chunk shows the three CXL host bridges without attached endpoints. + +:: + + { + "port":"port2", + "host":"pci0000:00", + "depth":1, + "nr_dports":2, + "dports":[ + { + "dport":"0000:00:01.3", + "alias":"device:55", + "id":2 + }, + { + "dport":"0000:00:07.1", + "alias":"device:5d", + "id":113 + } + ] + }, + { + "port":"port3", + "host":"pci0000:a8", + "depth":1, + "nr_dports":1, + "dports":[ + { + "dport":"0000:a8:01.1", + "alias":"device:c3", + "id":0 + } + ], + }, + { + "port":"port4", + "host":"pci0000:2a", + "depth":1, + "nr_dports":1, + "dports":[ + { + "dport":"0000:2a:01.1", + "alias":"device:d0", + "id":0 + } + ] + } + ], + +Next we have the `Root Decoders` belonging to :code:`root0`. This root decoder +applies the interleave across the downstream ports :code:`port1` and +:code:`port3` - with a granularity of 256 bytes. + +This information is generated by the CXL driver reading the ACPI CEDT CMFWS. + +:: + + "decoders:root0":[ + { + "decoder":"decoder0.0", + "resource":825975898112, + "size":274877906944, + "interleave_ways":1, + "max_available_extent":0, + "volatile_capable":true, + "nr_targets":2, + "targets":[ + { + "target":"pci0000:a8", + "alias":"ACPI0016:02", + "position":1, + "id":4 + }, + ], + +Finally we have the `Memory Region` associated with the `Root Decoder` +:code:`decoder0.0`. This region describes the overall interleave configuration +of the interleave set. + +:: + + "regions:decoder0.0":[ + { + "region":"region0", + "resource":825975898112, + "size":274877906944, + "type":"ram", + "interleave_ways":2, + "interleave_granularity":256, + "decode_state":"commit", + "mappings":[ + { + "position":1, + "memdev":"mem1", + "decoder":"decoder6.0" + }, + { + "position":0, + "memdev":"mem0", + "decoder":"decoder5.0" + } + ] + } + ] + } + ] + } + ] diff --git a/Documentation/driver-api/cxl/linux/example-configurations/multi-interleave.rst b/Documentation/driver-api/cxl/linux/example-configurations/multi-interleave.rst new file mode 100644 index 000000000000..008f9053c630 --- /dev/null +++ b/Documentation/driver-api/cxl/linux/example-configurations/multi-interleave.rst @@ -0,0 +1,401 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================== +Multi-Level Interleave +====================== +This cxl-cli configuration dump shows the following host configuration: + +* A single socket system with one CXL root +* CXL Root has Four (4) CXL Host Bridges +* Two CXL Host Bridges have a two CXL Memory Expanders Attached each. +* The CXL root is configured to interleave across the two host bridges. +* Each host bridge with expanders interleaves across two endpoints. + +This output is generated by :code:`cxl list -v` and describes the relationships +between objects exposed in :code:`/sys/bus/cxl/devices/`. + +:: + + [ + { + "bus":"root0", + "provider":"ACPI.CXL", + "nr_dports":4, + "dports":[ + { + "dport":"pci0000:00", + "alias":"ACPI0016:01", + "id":0 + }, + { + "dport":"pci0000:a8", + "alias":"ACPI0016:02", + "id":4 + }, + { + "dport":"pci0000:2a", + "alias":"ACPI0016:03", + "id":1 + }, + { + "dport":"pci0000:d2", + "alias":"ACPI0016:00", + "id":5 + } + ], + +This chunk shows the CXL "bus" (root0) has 4 downstream ports attached to CXL +Host Bridges. The `Root` can be considered the singular upstream port attached +to the platform's memory controller - which routes memory requests to it. + +The `ports:root0` section lays out how each of these downstream ports are +configured. If a port is not configured (id's 0 and 1), they are omitted. + +:: + + "ports:root0":[ + { + "port":"port1", + "host":"pci0000:d2", + "depth":1, + "nr_dports":3, + "dports":[ + { + "dport":"0000:d2:01.1", + "alias":"device:02", + "id":0 + }, + { + "dport":"0000:d2:01.3", + "alias":"device:05", + "id":2 + }, + { + "dport":"0000:d2:07.1", + "alias":"device:0d", + "id":113 + } + ], + +This chunk shows the available downstream ports associated with the CXL Host +Bridge :code:`port1`. In this case, :code:`port1` has 3 available downstream +ports: :code:`dport0`, :code:`dport2`, and :code:`dport113`. + +:: + + "endpoints:port1":[ + { + "endpoint":"endpoint5", + "host":"mem0", + "parent_dport":"0000:d2:01.1", + "depth":2, + "memdev":{ + "memdev":"mem0", + "ram_size":137438953472, + "serial":0, + "numa_node":0, + "host":"0000:d3:00.0" + }, + "decoders:endpoint5":[ + { + "decoder":"decoder5.0", + "resource":825975898112, + "size":549755813888, + "interleave_ways":4, + "interleave_granularity":256, + "region":"region0", + "dpa_resource":0, + "dpa_size":137438953472, + "mode":"ram" + } + ] + }, + { + "endpoint":"endpoint6", + "host":"mem1", + "parent_dport":"0000:d2:01.3", + "depth":2, + "memdev":{ + "memdev":"mem1", + "ram_size":137438953472, + "serial":0, + "numa_node":0, + "host":"0000:d3:00.0" + }, + "decoders:endpoint6":[ + { + "decoder":"decoder6.0", + "resource":825975898112, + "size":549755813888, + "interleave_ways":4, + "interleave_granularity":256, + "region":"region0", + "dpa_resource":0, + "dpa_size":137438953472, + "mode":"ram" + } + ] + } + ], + +This chunk shows the endpoints attached to the host bridge :code:`port1`. + +:code:`endpoint5` contains a single configured decoder :code:`decoder5.0` +which has the same interleave configuration as :code:`region0` (shown later). + +:code:`endpoint6` contains a single configured decoder :code:`decoder5.0` +which has the same interleave configuration as :code:`region0` (shown later). + +Next we have the decoders belonging to the host bridge: + +:: + + "decoders:port1":[ + { + "decoder":"decoder1.0", + "resource":825975898112, + "size":549755813888, + "interleave_ways":2, + "interleave_granularity":512, + "region":"region0", + "nr_targets":2, + "targets":[ + { + "target":"0000:d2:01.1", + "alias":"device:02", + "position":0, + "id":0 + }, + { + "target":"0000:d2:01.3", + "alias":"device:05", + "position":2, + "id":0 + } + ] + } + ] + }, + +Host Bridge :code:`port1` has a single decoder (:code:`decoder1.0`), whose +targets are :code:`dport0` and :code:`dport2` - which are attached to +:code:`endpoint5` and :code:`endpoint6` respectively. + +The following chunk shows a similar configuration for Host Bridge :code:`port3`, +the second host bridge with a memory device attached. + +:: + + { + "port":"port3", + "host":"pci0000:a8", + "depth":1, + "nr_dports":1, + "dports":[ + { + "dport":"0000:a8:01.1", + "alias":"device:c3", + "id":0 + }, + { + "dport":"0000:a8:01.3", + "alias":"device:c5", + "id":0 + } + ], + "endpoints:port3":[ + { + "endpoint":"endpoint7", + "host":"mem2", + "parent_dport":"0000:a8:01.1", + "depth":2, + "memdev":{ + "memdev":"mem2", + "ram_size":137438953472, + "serial":0, + "numa_node":0, + "host":"0000:a9:00.0" + }, + "decoders:endpoint7":[ + { + "decoder":"decoder7.0", + "resource":825975898112, + "size":549755813888, + "interleave_ways":4, + "interleave_granularity":256, + "region":"region0", + "dpa_resource":0, + "dpa_size":137438953472, + "mode":"ram" + } + ] + }, + { + "endpoint":"endpoint8", + "host":"mem3", + "parent_dport":"0000:a8:01.3", + "depth":2, + "memdev":{ + "memdev":"mem3", + "ram_size":137438953472, + "serial":0, + "numa_node":0, + "host":"0000:a9:00.0" + }, + "decoders:endpoint8":[ + { + "decoder":"decoder8.0", + "resource":825975898112, + "size":549755813888, + "interleave_ways":4, + "interleave_granularity":256, + "region":"region0", + "dpa_resource":0, + "dpa_size":137438953472, + "mode":"ram" + } + ] + } + ], + "decoders:port3":[ + { + "decoder":"decoder3.0", + "resource":825975898112, + "size":549755813888, + "interleave_ways":2, + "interleave_granularity":512, + "region":"region0", + "nr_targets":1, + "targets":[ + { + "target":"0000:a8:01.1", + "alias":"device:c3", + "position":1, + "id":0 + }, + { + "target":"0000:a8:01.3", + "alias":"device:c5", + "position":3, + "id":0 + } + ] + } + ] + }, + + +The next chunk shows the two CXL host bridges without attached endpoints. + +:: + + { + "port":"port2", + "host":"pci0000:00", + "depth":1, + "nr_dports":2, + "dports":[ + { + "dport":"0000:00:01.3", + "alias":"device:55", + "id":2 + }, + { + "dport":"0000:00:07.1", + "alias":"device:5d", + "id":113 + } + ] + }, + { + "port":"port4", + "host":"pci0000:2a", + "depth":1, + "nr_dports":1, + "dports":[ + { + "dport":"0000:2a:01.1", + "alias":"device:d0", + "id":0 + } + ] + } + ], + +Next we have the `Root Decoders` belonging to :code:`root0`. This root decoder +applies the interleave across the downstream ports :code:`port1` and +:code:`port3` - with a granularity of 256 bytes. + +This information is generated by the CXL driver reading the ACPI CEDT CMFWS. + +:: + + "decoders:root0":[ + { + "decoder":"decoder0.0", + "resource":825975898112, + "size":549755813888, + "interleave_ways":2, + "interleave_granularity":256, + "max_available_extent":0, + "volatile_capable":true, + "nr_targets":2, + "targets":[ + { + "target":"pci0000:a8", + "alias":"ACPI0016:02", + "position":1, + "id":4 + }, + { + "target":"pci0000:d2", + "alias":"ACPI0016:00", + "position":0, + "id":5 + } + ], + +Finally we have the `Memory Region` associated with the `Root Decoder` +:code:`decoder0.0`. This region describes the overall interleave configuration +of the interleave set. So we see there are a total of :code:`4` interleave +targets across 4 endpoint decoders. + +:: + + "regions:decoder0.0":[ + { + "region":"region0", + "resource":825975898112, + "size":549755813888, + "type":"ram", + "interleave_ways":4, + "interleave_granularity":256, + "decode_state":"commit", + "mappings":[ + { + "position":3, + "memdev":"mem3", + "decoder":"decoder8.0" + }, + { + "position":2, + "memdev":"mem1", + "decoder":"decoder6.0" + } + { + "position":1, + "memdev":"mem2", + "decoder":"decoder7.0" + }, + { + "position":0, + "memdev":"mem0", + "decoder":"decoder5.0" + } + ] + } + ] + } + ] + } + ] diff --git a/Documentation/driver-api/cxl/linux/example-configurations/single-device.rst b/Documentation/driver-api/cxl/linux/example-configurations/single-device.rst new file mode 100644 index 000000000000..5fd38eb0aaf4 --- /dev/null +++ b/Documentation/driver-api/cxl/linux/example-configurations/single-device.rst @@ -0,0 +1,246 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============= +Single Device +============= +This cxl-cli configuration dump shows the following host configuration: + +* A single socket system with one CXL root +* CXL Root has Four (4) CXL Host Bridges +* One CXL Host Bridges has a single CXL Memory Expander Attached +* No interleave is present. + +This output is generated by :code:`cxl list -v` and describes the relationships +between objects exposed in :code:`/sys/bus/cxl/devices/`. + +:: + + [ + { + "bus":"root0", + "provider":"ACPI.CXL", + "nr_dports":4, + "dports":[ + { + "dport":"pci0000:00", + "alias":"ACPI0016:01", + "id":0 + }, + { + "dport":"pci0000:a8", + "alias":"ACPI0016:02", + "id":4 + }, + { + "dport":"pci0000:2a", + "alias":"ACPI0016:03", + "id":1 + }, + { + "dport":"pci0000:d2", + "alias":"ACPI0016:00", + "id":5 + } + ], + +This chunk shows the CXL "bus" (root0) has 4 downstream ports attached to CXL +Host Bridges. The `Root` can be considered the singular upstream port attached +to the platform's memory controller - which routes memory requests to it. + +The `ports:root0` section lays out how each of these downstream ports are +configured. If a port is not configured (id's 0, 1, and 4), they are omitted. + +:: + + "ports:root0":[ + { + "port":"port1", + "host":"pci0000:d2", + "depth":1, + "nr_dports":3, + "dports":[ + { + "dport":"0000:d2:01.1", + "alias":"device:02", + "id":0 + }, + { + "dport":"0000:d2:01.3", + "alias":"device:05", + "id":2 + }, + { + "dport":"0000:d2:07.1", + "alias":"device:0d", + "id":113 + } + ], + +This chunk shows the available downstream ports associated with the CXL Host +Bridge :code:`port1`. In this case, :code:`port1` has 3 available downstream +ports: :code:`dport1`, :code:`dport2`, and :code:`dport113`.. + +:: + + "endpoints:port1":[ + { + "endpoint":"endpoint5", + "host":"mem0", + "parent_dport":"0000:d2:01.1", + "depth":2, + "memdev":{ + "memdev":"mem0", + "ram_size":137438953472, + "serial":0, + "numa_node":0, + "host":"0000:d3:00.0" + }, + "decoders:endpoint5":[ + { + "decoder":"decoder5.0", + "resource":825975898112, + "size":137438953472, + "interleave_ways":1, + "region":"region0", + "dpa_resource":0, + "dpa_size":137438953472, + "mode":"ram" + } + ] + } + ], + +This chunk shows the endpoints attached to the host bridge :code:`port1`. + +:code:`endpoint5` contains a single configured decoder :code:`decoder5.0` +which has the same interleave configuration as :code:`region0` (shown later). + +Next we have the decoders belonging to the host bridge: + +:: + + "decoders:port1":[ + { + "decoder":"decoder1.0", + "resource":825975898112, + "size":137438953472, + "interleave_ways":1, + "region":"region0", + "nr_targets":1, + "targets":[ + { + "target":"0000:d2:01.1", + "alias":"device:02", + "position":0, + "id":0 + } + ] + } + ] + }, + +Host Bridge :code:`port1` has a single decoder (:code:`decoder1.0`), whose only +target is :code:`dport1` - which is attached to :code:`endpoint5`. + +The next chunk shows the three CXL host bridges without attached endpoints. + +:: + + { + "port":"port2", + "host":"pci0000:00", + "depth":1, + "nr_dports":2, + "dports":[ + { + "dport":"0000:00:01.3", + "alias":"device:55", + "id":2 + }, + { + "dport":"0000:00:07.1", + "alias":"device:5d", + "id":113 + } + ] + }, + { + "port":"port3", + "host":"pci0000:a8", + "depth":1, + "nr_dports":1, + "dports":[ + { + "dport":"0000:a8:01.1", + "alias":"device:c3", + "id":0 + } + ] + }, + { + "port":"port4", + "host":"pci0000:2a", + "depth":1, + "nr_dports":1, + "dports":[ + { + "dport":"0000:2a:01.1", + "alias":"device:d0", + "id":0 + } + ] + } + ], + +Next we have the `Root Decoders` belonging to :code:`root0`. This root decoder +is a pass-through decoder because :code:`interleave_ways` is set to :code:`1`. + +This information is generated by the CXL driver reading the ACPI CEDT CMFWS. + +:: + + "decoders:root0":[ + { + "decoder":"decoder0.0", + "resource":825975898112, + "size":137438953472, + "interleave_ways":1, + "max_available_extent":0, + "volatile_capable":true, + "nr_targets":1, + "targets":[ + { + "target":"pci0000:d2", + "alias":"ACPI0016:00", + "position":0, + "id":5 + } + ], + +Finally we have the `Memory Region` associated with the `Root Decoder` +:code:`decoder0.0`. This region describes the discrete region associated +with the lone device. + +:: + + "regions:decoder0.0":[ + { + "region":"region0", + "resource":825975898112, + "size":137438953472, + "type":"ram", + "interleave_ways":1, + "decode_state":"commit", + "mappings":[ + { + "position":0, + "memdev":"mem0", + "decoder":"decoder5.0" + } + ] + } + ] + } + ] + } + ] -- cgit v1.2.3 From 36e9f71bd6fc0f7521c3f05bb57d3db1d821a11f Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:28 -0400 Subject: cxl: docs/linux/dax-driver documentation Add documentation on how the CXL driver interacts with the DAX driver. Signed-off-by: Gregory Price Link: https://patch.msgid.link/20250512162134.3596150-12-gourry@gourry.net Signed-off-by: Dave Jiang --- Documentation/driver-api/cxl/index.rst | 1 + Documentation/driver-api/cxl/linux/cxl-driver.rst | 115 ++++++++++++++++++++-- Documentation/driver-api/cxl/linux/dax-driver.rst | 43 ++++++++ 3 files changed, 149 insertions(+), 10 deletions(-) create mode 100644 Documentation/driver-api/cxl/linux/dax-driver.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-api/cxl/index.rst index df3c7763c79a..f2127968ea78 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -36,6 +36,7 @@ that have impacts on each other. The docs here break up configurations steps. linux/overview linux/early-boot linux/cxl-driver + linux/dax-driver linux/access-coordinates diff --git a/Documentation/driver-api/cxl/linux/cxl-driver.rst b/Documentation/driver-api/cxl/linux/cxl-driver.rst index 486baf8551aa..cf6b397abdb1 100644 --- a/Documentation/driver-api/cxl/linux/cxl-driver.rst +++ b/Documentation/driver-api/cxl/linux/cxl-driver.rst @@ -34,6 +34,32 @@ into a single memory region. The memory region has been converted to dax. :: decoder1.0 decoder5.0 endpoint5 port1 region0 decoder2.0 decoder5.1 endpoint6 port2 root0 + +.. kernel-render:: DOT + :alt: Digraph of CXL fabric describing host-bridge interleaving + :caption: Diagraph of CXL fabric with a host-bridge interleave memory region + + digraph foo { + "root0" -> "port1"; + "root0" -> "port3"; + "root0" -> "decoder0.0"; + "port1" -> "endpoint5"; + "port3" -> "endpoint6"; + "port1" -> "decoder1.0"; + "port3" -> "decoder3.0"; + "endpoint5" -> "decoder5.0"; + "endpoint6" -> "decoder6.0"; + "decoder0.0" -> "region0"; + "decoder0.0" -> "decoder1.0"; + "decoder0.0" -> "decoder3.0"; + "decoder1.0" -> "decoder5.0"; + "decoder3.0" -> "decoder6.0"; + "decoder5.0" -> "region0"; + "decoder6.0" -> "region0"; + "region0" -> "dax_region0"; + "dax_region0" -> "dax0.0"; + } + For this section we'll explore the devices present in this configuration, but we'll explore more configurations in-depth in example configurations below. @@ -41,7 +67,7 @@ Base Devices ------------ Most devices in a CXL fabric are a `port` of some kind (because each device mostly routes request from one device to the next, rather than -provide a manageable service). +provide a direct service). Root ~~~~ @@ -53,6 +79,8 @@ The Root contains links to: * `Host Bridge Ports` defined by ACPI CEDT CHBS. +* `Downstream Ports` typically connected to `Host Bridge Ports`. + * `Root Decoders` defined by ACPI CEDT CFMWS. :: @@ -150,6 +178,27 @@ device configuration data. :: driver label_storage_size pmem serial firmware numa_node ram subsystem +A Memory Device is a discrete base object that is not a port. While the +physical device it belongs to may also host an `endpoint`, the relationship +between an `endpoint` and a `memdev` is not captured in sysfs. + +Port Relationships +~~~~~~~~~~~~~~~~~~ +In our example described above, there are four host bridges attached to the +root, and two of the host bridges have one endpoint attached. + +.. kernel-render:: DOT + :alt: Digraph of CXL fabric describing host-bridge interleaving + :caption: Diagraph of CXL fabric with a host-bridge interleave memory region + + digraph foo { + "root0" -> "port1"; + "root0" -> "port2"; + "root0" -> "port3"; + "root0" -> "port4"; + "port1" -> "endpoint5"; + "port3" -> "endpoint6"; + } Decoders -------- @@ -322,6 +371,29 @@ settings (granularity and ways must be the same). Endpoint decoders are created during :code:`cxl_endpoint_port_probe` in the :code:`cxl_port` driver, and is created based on a PCI device's DVSEC registers. +Decoder Relationships +~~~~~~~~~~~~~~~~~~~~~ +In our example described above, there is one root decoder which routes memory +accesses over two host bridges. Each host bridge has a decoder which routes +access to their singular endpoint targets. Each endpoint has a decoder which +translates HPA to DPA and services the memory request. + +The driver validates relationships between ports by decoder programming, so +we can think of decoders being related in a similarly hierarchical fashion to +ports. + +.. kernel-render:: DOT + :alt: Digraph of hierarchical relationship between root, switch, and endpoint decoders. + :caption: Diagraph of CXL root, switch, and endpoint decoders. + + digraph foo { + "root0" -> "decoder0.0"; + "decoder0.0" -> "decoder1.0"; + "decoder0.0" -> "decoder3.0"; + "decoder1.0" -> "decoder5.0"; + "decoder3.0" -> "decoder6.0"; + } + Regions ------- @@ -348,6 +420,17 @@ The interleave settings in a `Memory Region` describe the configuration of the `Interleave Set` - and are what can be expected to be seen in the endpoint interleave settings. +.. kernel-render:: DOT + :alt: Digraph of CXL memory region relationships between root and endpoint decoders. + :caption: Regions are created based on root decoder configurations. Endpoint decoders + must be programmed with the same interleave settings as the region. + + digraph foo { + "root0" -> "decoder0.0"; + "decoder0.0" -> "region0"; + "region0" -> "decoder5.0"; + "region0" -> "decoder6.0"; + } DAX Region ~~~~~~~~~~ @@ -360,7 +443,6 @@ for more details. :: dax0.0 devtype modalias uevent dax_region driver subsystem - Mailbox Interfaces ------------------ A mailbox command interface for each device is exposed in :: @@ -418,17 +500,30 @@ the relationships between a decoder and it's parent. For example, in a `Cross-Link First` interleave setup with 16 endpoints attached to 4 host bridges, linux expects the following ways/granularity -across the root, host bridge, and endpoints respectively. :: +across the root, host bridge, and endpoints respectively. + +.. flat-table:: 4x4 cross-link first interleave settings + + * - decoder + - ways + - granularity - ways granularity - root 4 256 - host bridge 4 1024 - endpoint 16 256 + * - root + - 4 + - 256 + + * - host bridge + - 4 + - 1024 + + * - endpoint + - 16 + - 256 At the root, every a given access will be routed to the :code:`((HPA / 256) % 4)th` target host bridge. Within a host bridge, every -:code:`((HPA / 1024) % 4)th` target endpoint. Each endpoint will translate -the access based on the entire 16 device interleave set. +:code:`((HPA / 1024) % 4)th` target endpoint. Each endpoint translates based +on the entire 16 device interleave set. Unbalanced interleave sets are not supported - decoders at a similar point in the hierarchy (e.g. all host bridge decoders) must have the same ways and @@ -467,7 +562,7 @@ In this example, the CFMWS defines two discrete non-interleaved 4GB regions for each host bridge, and one interleaved 8GB region that targets both. This would result in 3 root decoders presenting in the root. :: - # ls /sys/bus/cxl/devices/root0 + # ls /sys/bus/cxl/devices/root0/decoder* decoder0.0 decoder0.1 decoder0.2 # cat /sys/bus/cxl/devices/decoder0.0/target_list start size diff --git a/Documentation/driver-api/cxl/linux/dax-driver.rst b/Documentation/driver-api/cxl/linux/dax-driver.rst new file mode 100644 index 000000000000..10d953a2167b --- /dev/null +++ b/Documentation/driver-api/cxl/linux/dax-driver.rst @@ -0,0 +1,43 @@ +.. SPDX-License-Identifier: GPL-2.0 + +==================== +DAX Driver Operation +==================== +The `Direct Access Device` driver was originally designed to provide a +memory-like access mechanism to memory-like block-devices. It was +extended to support CXL Memory Devices, which provide user-configured +memory devices. + +The CXL subsystem depends on the DAX subsystem to either: + +- Generate a file-like interface to userland via :code:`/dev/daxN.Y`, or +- Engage the memory-hotplug interface to add CXL memory to page allocator. + +The DAX subsystem exposes this ability through the `cxl_dax_region` driver. +A `dax_region` provides the translation between a CXL `memory_region` and +a `DAX Device`. + +DAX Device +========== +A `DAX Device` is a file-like interface exposed in :code:`/dev/daxN.Y`. A +memory region exposed via dax device can be accessed via userland software +via the :code:`mmap()` system-call. The result is direct mappings to the +CXL capacity in the task's page tables. + +Users wishing to manually handle allocation of CXL memory should use this +interface. + +kmem conversion +=============== +The :code:`dax_kmem` driver converts a `DAX Device` into a series of `hotplug +memory blocks` managed by :code:`kernel/memory-hotplug.c`. This capacity +will be exposed to the kernel page allocator in the user-selected memory +zone. + +The :code:`memmap_on_memory` setting (both global and DAX device local) +dictates where the kernell will allocate the :code:`struct folio` descriptors +for this memory will come from. If :code:`memmap_on_memory` is set, memory +hotplug will set aside a portion of the memory block capacity to allocate +folios. If unset, the memory is allocated via a normal :code:`GFP_KERNEL` +allocation - and as a result will most likely land on the local NUM node of the +CPU executing the hotplug operation. -- cgit v1.2.3 From 641fdea6b90ee5bd0bab883c767abac69c5389b5 Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:29 -0400 Subject: cxl: docs/linux/memory-hotplug Add documentation on how the CXL driver surfaces memory through the DAX driver and memory-hotplug. Signed-off-by: Gregory Price Link: https://patch.msgid.link/20250512162134.3596150-13-gourry@gourry.net Signed-off-by: Dave Jiang --- Documentation/driver-api/cxl/index.rst | 1 + .../driver-api/cxl/linux/memory-hotplug.rst | 78 ++++++++++++++++++++++ 2 files changed, 79 insertions(+) create mode 100644 Documentation/driver-api/cxl/linux/memory-hotplug.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-api/cxl/index.rst index f2127968ea78..35c5b0c6f95e 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -37,6 +37,7 @@ that have impacts on each other. The docs here break up configurations steps. linux/early-boot linux/cxl-driver linux/dax-driver + linux/memory-hotplug linux/access-coordinates diff --git a/Documentation/driver-api/cxl/linux/memory-hotplug.rst b/Documentation/driver-api/cxl/linux/memory-hotplug.rst new file mode 100644 index 000000000000..af368c2bc9cf --- /dev/null +++ b/Documentation/driver-api/cxl/linux/memory-hotplug.rst @@ -0,0 +1,78 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============== +Memory Hotplug +============== +The final phase of surfacing CXL memory to the kernel page allocator is for +the `DAX` driver to surface a `Driver Managed` memory region via the +memory-hotplug component. + +There are four major configurations to consider: + +1) Default Online Behavior (on/off and zone) +2) Hotplug Memory Block size +3) Memory Map Resource location +4) Driver-Managed Memory Designation + +Default Online Behavior +======================= +The default-online behavior of hotplug memory is dictated by the following, +in order of precedence: + +- :code:`CONFIG_MHP_DEFAULT_ONLINE_TYPE` Build Configuration +- :code:`memhp_default_state` Boot parameter +- :code:`/sys/devices/system/memory/auto_online_blocks` value + +These dictate whether hotplugged memory blocks arrive in one of three states: + +1) Offline +2) Online in :code:`ZONE_NORMAL` +3) Online in :code:`ZONE_MOVABLE` + +:code:`ZONE_NORMAL` implies this capacity may be used for almost any allocation, +while :code:`ZONE_MOVABLE` implies this capacity should only be used for +migratable allocations. + +:code:`ZONE_MOVABLE` attempts to retain the hotplug-ability of a memory block +so that it the entire region may be hot-unplugged at a later time. Any capacity +onlined into :code:`ZONE_NORMAL` should be considered permanently attached to +the page allocator. + +Hotplug Memory Block Size +========================= +By default, on most architectures, the Hotplug Memory Block Size is either +128MB or 256MB. On x86, the block size increases up to 2GB as total memory +capacity exceeds 64GB. As of v6.15, Linux does not take into account the +size and alignment of the ACPI CEDT CFMWS regions (see Early Boot docs) when +deciding the Hotplug Memory Block Size. + +Memory Map +========== +The location of :code:`struct folio` allocations to represent the hotplugged +memory capacity are dictated by the following system settings: + +- :code:`/sys_module/memory_hotplug/parameters/memmap_on_memory` +- :code:`/sys/bus/dax/devices/daxN.Y/memmap_on_memory` + +If both of these parameters are set to true, :code:`struct folio` for this +capacity will be carved out of the memory block being onlined. This has +performance implications if the memory is particularly high-latency and +its :code:`struct folio` becomes hotly contended. + +If either parameter is set to false, :code:`struct folio` for this capacity +will be allocated from the local node of the processor running the hotplug +procedure. This capacity will be allocated from :code:`ZONE_NORMAL` on +that node, as it is a :code:`GFP_KERNEL` allocation. + +Systems with extremely large amounts of :code:`ZONE_MOVABLE` memory (e.g. +CXL memory pools) must ensure that there is sufficient local +:code:`ZONE_NORMAL` capacity to host the memory map for the hotplugged capacity. + +Driver Managed Memory +===================== +The DAX driver surfaces this memory to memory-hotplug as "Driver Managed". This +is not a configurable setting, but it's important to note that driver managed +memory is explicitly excluded from use during kexec. This is required to ensure +any reset or out-of-band operations that the CXL device may be subject to during +a functional system-reboot (such as a reset-on-probe) will not cause portions of +the kexec kernel to be overwritten. -- cgit v1.2.3 From 78ab67510ed9933bb3622d313dde93c6739d37ae Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:30 -0400 Subject: cxl: docs/allocation/dax Small example of accessing CXL memory capacity via DAX device Signed-off-by: Gregory Price Link: https://patch.msgid.link/20250512162134.3596150-14-gourry@gourry.net Signed-off-by: Dave Jiang --- Documentation/driver-api/cxl/allocation/dax.rst | 60 +++++++++++++++++++++++++ Documentation/driver-api/cxl/index.rst | 5 +++ 2 files changed, 65 insertions(+) create mode 100644 Documentation/driver-api/cxl/allocation/dax.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/allocation/dax.rst b/Documentation/driver-api/cxl/allocation/dax.rst new file mode 100644 index 000000000000..c6f7a5da832f --- /dev/null +++ b/Documentation/driver-api/cxl/allocation/dax.rst @@ -0,0 +1,60 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=========== +DAX Devices +=========== +CXL capacity exposed as a DAX device can be accessed directly via mmap. +Users may wish to use this interface mechanism to write their own userland +CXL allocator, or to managed shared or persistent memory regions across multiple +hosts. + +If the capacity is shared across hosts or persistent, appropriate flushing +mechanisms must be employed unless the region supports Snoop Back-Invalidate. + +Note that mappings must be aligned (size and base) to the dax device's base +alignment, which is typically 2MB - but maybe be configured larger. + +:: + + #include + #include + #include + #include + #include + #include + + #define DEVICE_PATH "/dev/dax0.0" // Replace DAX device path + #define DEVICE_SIZE (4ULL * 1024 * 1024 * 1024) // 4GB + + int main() { + int fd; + void* mapped_addr; + + /* Open the DAX device */ + fd = open(DEVICE_PATH, O_RDWR); + if (fd < 0) { + perror("open"); + return -1; + } + + /* Map the device into memory */ + mapped_addr = mmap(NULL, DEVICE_SIZE, PROT_READ | PROT_WRITE, + MAP_SHARED, fd, 0); + if (mapped_addr == MAP_FAILED) { + perror("mmap"); + close(fd); + return -1; + } + + printf("Mapped address: %p\n", mapped_addr); + + /* You can now access the device through the mapped address */ + uint64_t* ptr = (uint64_t*)mapped_addr; + *ptr = 0x1234567890abcdef; // Write a value to the device + printf("Value at address %p: 0x%016llx\n", ptr, *ptr); + + /* Clean up */ + munmap(mapped_addr, DEVICE_SIZE); + close(fd); + return 0; + } diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-api/cxl/index.rst index 35c5b0c6f95e..6e7497f4811a 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -40,5 +40,10 @@ that have impacts on each other. The docs here break up configurations steps. linux/memory-hotplug linux/access-coordinates +.. toctree:: + :maxdepth: 2 + :caption: Memory Allocation + + allocation/dax .. only:: subproject and html -- cgit v1.2.3 From 419dc40b82374cc7c417f0af613b9e6ea1d34095 Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:31 -0400 Subject: cxl: docs/allocation/page-allocator Document some interesting interactions that occur when exposing CXL memory capacity to page allocator. Signed-off-by: Gregory Price Link: https://patch.msgid.link/20250512162134.3596150-15-gourry@gourry.net Signed-off-by: Dave Jiang --- .../driver-api/cxl/allocation/page-allocator.rst | 85 ++++++++++++++++++++++ Documentation/driver-api/cxl/index.rst | 1 + 2 files changed, 86 insertions(+) create mode 100644 Documentation/driver-api/cxl/allocation/page-allocator.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/allocation/page-allocator.rst b/Documentation/driver-api/cxl/allocation/page-allocator.rst new file mode 100644 index 000000000000..7b8fe1b8d5bb --- /dev/null +++ b/Documentation/driver-api/cxl/allocation/page-allocator.rst @@ -0,0 +1,85 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================== +The Page Allocator +================== + +The kernel page allocator services all general page allocation requests, such +as :code:`kmalloc`. CXL configuration steps affect the behavior of the page +allocator based on the selected `Memory Zone` and `NUMA node` the capacity is +placed in. + +This section mostly focuses on how these configurations affect the page +allocator (as of Linux v6.15) rather than the overall page allocator behavior. + +NUMA nodes and mempolicy +======================== +Unless a task explicitly registers a mempolicy, the default memory policy +of the linux kernel is to allocate memory from the `local NUMA node` first, +and fall back to other nodes only if the local node is pressured. + +Generally, we expect to see local DRAM and CXL memory on separate NUMA nodes, +with the CXL memory being non-local. Technically, however, it is possible +for a compute node to have no local DRAM, and for CXL memory to be the +`local` capacity for that compute node. + + +Memory Zones +============ +CXL capacity may be onlined in :code:`ZONE_NORMAL` or :code:`ZONE_MOVABLE`. + +As of v6.15, the page allocator attempts to allocate from the highest +available and compatible ZONE for an allocation from the local node first. + +An example of a `zone incompatibility` is attempting to service an allocation +marked :code:`GFP_KERNEL` from :code:`ZONE_MOVABLE`. Kernel allocations are +typically not migratable, and as a result can only be serviced from +:code:`ZONE_NORMAL` or lower. + +To simplify this, the page allocator will prefer :code:`ZONE_MOVABLE` over +:code:`ZONE_NORMAL` by default, but if :code:`ZONE_MOVABLE` is depleted, it +will fallback to allocate from :code:`ZONE_NORMAL`. + + +Zone and Node Quirks +==================== +Let's consider a configuration where the local DRAM capacity is largely onlined +into :code:`ZONE_NORMAL`, with no :code:`ZONE_MOVABLE` capacity present. The +CXL capacity has the opposite configuration - all onlined in +:code:`ZONE_MOVABLE`. + +Under the default allocation policy, the page allocator will completely skip +:code:`ZONE_MOVABLE` as a valid allocation target. This is because, as of +Linux v6.15, the page allocator does (approximately) the following: :: + + for (each zone in local_node): + + for (each node in fallback_order): + + attempt_allocation(gfp_flags); + +Because the local node does not have :code:`ZONE_MOVABLE`, the CXL node is +functionally unreachable for direct allocation. As a result, the only way +for CXL capacity to be used is via `demotion` in the reclaim path. + +This configuration also means that if the DRAM ndoe has :code:`ZONE_MOVABLE` +capacity - when that capacity is depleted, the page allocator will actually +prefer CXL :code:`ZONE_MOVABLE` pages over DRAM :code:`ZONE_NORMAL` pages. + +We may wish to invert this priority in future Linux versions. + +If `demotion` and `swap` are disabled, Linux will begin to cause OOM crashes +when the DRAM nodes are depleted. See the reclaim section for more details. + + +CGroups and CPUSets +=================== +Finally, assuming CXL memory is reachable via the page allocation (i.e. onlined +in :code:`ZONE_NORMAL`), the :code:`cpusets.mems_allowed` may be used by +containers to limit the accessibility of certain NUMA nodes for tasks in that +container. Users may wish to utilize this in multi-tenant systems where some +tasks prefer not to use slower memory. + +In the reclaim section we'll discuss some limitations of this interface to +prevent demotions of shared data to CXL memory (if demotions are enabled). + diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-api/cxl/index.rst index 6e7497f4811a..7acab7e7df96 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -45,5 +45,6 @@ that have impacts on each other. The docs here break up configurations steps. :caption: Memory Allocation allocation/dax + allocation/page-allocator .. only:: subproject and html -- cgit v1.2.3 From f109e77dde6e52439dce9fca19a0121c7cd04424 Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:32 -0400 Subject: cxl: docs/allocation/reclaim Document a bit about how reclaim interacts with various CXL configurations. Signed-off-by: Gregory Price Link: https://patch.msgid.link/20250512162134.3596150-16-gourry@gourry.net Signed-off-by: Dave Jiang --- .../driver-api/cxl/allocation/reclaim.rst | 51 ++++++++++++++++++++++ Documentation/driver-api/cxl/index.rst | 1 + 2 files changed, 52 insertions(+) create mode 100644 Documentation/driver-api/cxl/allocation/reclaim.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/allocation/reclaim.rst b/Documentation/driver-api/cxl/allocation/reclaim.rst new file mode 100644 index 000000000000..f40f1cae391a --- /dev/null +++ b/Documentation/driver-api/cxl/allocation/reclaim.rst @@ -0,0 +1,51 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======= +Reclaim +======= +Another way CXL memory can be utilized *indirectly* is via the reclaim system +in :code:`mm/vmscan.c`. Reclaim is engaged when memory capacity on the system +becomes pressured based on global and cgroup-local `watermark` settings. + +In this section we won't discuss the `watermark` configurations, just how CXL +memory can be consumed by various pieces of reclaim system. + +Demotion +======== +By default, the reclaim system will prefer swap (or zswap) when reclaiming +memory. Enabling :code:`kernel/mm/numa/demotion_enabled` will cause vmscan +to opportunistically prefer distant NUMA nodes to swap or zswap, if capacity +is available. + +Demotion engages the :code:`mm/memory_tier.c` component to determine the +next demotion node. The next demotion node is based on the :code:`HMAT` +or :code:`CDAT` performance data. + +cpusets.mems_allowed quirk +-------------------------- +In Linux v6.15 and below, demotion does not respect :code:`cpusets.mems_allowed` +when migrating pages. As a result, if demotion is enabled, vmscan cannot +guarantee isolation of a container's memory from nodes not set in mems_allowed. + +In Linux v6.XX and up, demotion does attempt to respect +:code:`cpusets.mems_allowed`; however, certain classes of shared memory +originally instantiated by another cgroup (such as common libraries - e.g. +libc) may still be demoted. As a result, the mems_allowed interface still +cannot provide perfect isolation from the remote nodes. + +ZSwap and Node Preference +========================= +In Linux v6.15 and below, ZSwap allocates memory from the local node of the +processor for the new pages being compressed. Since pages being compressed +are typically cold, the result is a cold page becomes promoted - only to +be later demoted as it ages off the LRU. + +In Linux v6.XX, ZSwap tries to prefer the node of the page being compressed +as the allocation target for the compression page. This helps prevent +thrashing. + +Demotion with ZSwap +=================== +When enabling both Demotion and ZSwap, you create a situation where ZSwap +will prefer the slowest form of CXL memory by default until that tier of +memory is exhausted. diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-api/cxl/index.rst index 7acab7e7df96..d3ab928d4d7c 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -46,5 +46,6 @@ that have impacts on each other. The docs here break up configurations steps. allocation/dax allocation/page-allocator + allocation/reclaim .. only:: subproject and html -- cgit v1.2.3 From df63e0120b5ee35896b05a5d96d686105509c3f7 Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:33 -0400 Subject: cxl: docs/allocation/hugepages Add docs on how CXL capacity interacts with CMA and HugeTLB allocation interfaces. Signed-off-by: Gregory Price Link: https://patch.msgid.link/20250512162134.3596150-17-gourry@gourry.net Signed-off-by: Dave Jiang --- .../driver-api/cxl/allocation/hugepages.rst | 32 ++++++++++++++++++++++ Documentation/driver-api/cxl/index.rst | 1 + 2 files changed, 33 insertions(+) create mode 100644 Documentation/driver-api/cxl/allocation/hugepages.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/allocation/hugepages.rst b/Documentation/driver-api/cxl/allocation/hugepages.rst new file mode 100644 index 000000000000..1023c6922829 --- /dev/null +++ b/Documentation/driver-api/cxl/allocation/hugepages.rst @@ -0,0 +1,32 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========== +Huge Pages +========== + +Contiguous Memory Allocator +=========================== +CXL Memory onlined as SystemRAM during early boot is eligible for use by CMA, +as the NUMA node hosting that capacity will be `Online` at the time CMA +carves out contiguous capacity. + +CXL Memory deferred to the CXL Driver for configuration cannot have its +capacity allocated by CMA - as the NUMA node hosting the capacity is `Offline` +at :code:`__init` time - when CMA carves out contiguous capacity. + +HugeTLB +======= +Different huge page sizes allow different memory configurations. + +2MB Huge Pages +-------------- +All CXL capacity regardless of configuration time or memory zone is eligible +for use as 2MB huge pages. + +1GB Huge Pages +-------------- +CXL capacity onlined in :code:`ZONE_NORMAL` is eligible for 1GB Gigantic Page +allocation. + +CXL capacity onlined in :code:`ZONE_MOVABLE` is not eligible for 1GB Gigantic +Page allocation. diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-api/cxl/index.rst index d3ab928d4d7c..366faf851fc7 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -47,5 +47,6 @@ that have impacts on each other. The docs here break up configurations steps. allocation/dax allocation/page-allocator allocation/reclaim + allocation/hugepages.rst .. only:: subproject and html -- cgit v1.2.3 From dba600d0f2e9d2dea53891d95f1ff38d3e089275 Mon Sep 17 00:00:00 2001 From: Gregory Price Date: Mon, 12 May 2025 12:21:34 -0400 Subject: cxl: docs - add self-referencing cross-links Add some crosslinks between pages in the CXL docs - mostly to the ACPI tables. Suggested-by: Bagas Sanjaya Signed-off-by: Gregory Price Link: https://patch.msgid.link/20250512162134.3596150-18-gourry@gourry.net Signed-off-by: Dave Jiang --- .../driver-api/cxl/devices/device-types.rst | 2 +- .../driver-api/cxl/linux/access-coordinates.rst | 7 +++-- Documentation/driver-api/cxl/linux/cxl-driver.rst | 35 ++++++++++++---------- Documentation/driver-api/cxl/linux/early-boot.rst | 32 ++++++++++++-------- .../driver-api/cxl/platform/bios-and-efi.rst | 12 ++++---- .../platform/example-configurations/flexible.rst | 10 +++---- .../example-configurations/hb-interleave.rst | 10 +++---- .../example-configurations/multi-dev-per-hb.rst | 10 +++---- .../example-configurations/one-dev-per-hb.rst | 10 +++---- 9 files changed, 69 insertions(+), 59 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/devices/device-types.rst b/Documentation/driver-api/cxl/devices/device-types.rst index c70564cf0be3..f5e4330c1cfe 100644 --- a/Documentation/driver-api/cxl/devices/device-types.rst +++ b/Documentation/driver-api/cxl/devices/device-types.rst @@ -115,7 +115,7 @@ A Multi-Headed Single-Logical Device (MHSLD) exposes a single logical device to multiple heads which may be connected to one or more discrete hosts. An example of this would be a simple memory-pool which may be statically configured (prior to boot) to expose portions of its memory -to Linux via the CEDT ACPI table. +to Linux via :doc:`CEDT <../platform/acpi/cedt>`. MHMLD ~~~~~ diff --git a/Documentation/driver-api/cxl/linux/access-coordinates.rst b/Documentation/driver-api/cxl/linux/access-coordinates.rst index e408ecbc4038..71024fa0f561 100644 --- a/Documentation/driver-api/cxl/linux/access-coordinates.rst +++ b/Documentation/driver-api/cxl/linux/access-coordinates.rst @@ -24,7 +24,7 @@ asymmetry in properties does not happen and all paths to EPs are equal. There can be multiple switches under an RP. There can be multiple RPs under a CXL Host Bridge (HB). There can be multiple HBs under a CXL Fixed Memory -Window Structure (CFMWS). +Window Structure (CFMWS) in the :doc:`CEDT <../platform/acpi/cedt>`. An example hierarchy:: @@ -83,8 +83,9 @@ also the index for the resulting xarray. The next step is to take the min() of the per host bridge bandwidth and the bandwidth from the Generic Port (GP). The bandwidths for the GP are retrieved -via ACPI tables SRAT/HMAT. The minimum bandwidth are aggregated under the same -ACPI0017 device to form a new xarray. +via ACPI tables (:doc:`SRAT <../platform/acpi/srat>` and +:doc:`HMAT <../platform/acpi/hmat>`). The minimum bandwidth are aggregated +under the same ACPI0017 device to form a new xarray. Finally, the cxl_region_update_bandwidth() is called and the aggregated bandwidth from all the members of the last xarray is updated for the diff --git a/Documentation/driver-api/cxl/linux/cxl-driver.rst b/Documentation/driver-api/cxl/linux/cxl-driver.rst index cf6b397abdb1..9759e90c3cf1 100644 --- a/Documentation/driver-api/cxl/linux/cxl-driver.rst +++ b/Documentation/driver-api/cxl/linux/cxl-driver.rst @@ -77,11 +77,11 @@ Root Object` Device Class is found. The Root contains links to: -* `Host Bridge Ports` defined by ACPI CEDT CHBS. +* `Host Bridge Ports` defined by CHBS in the :doc:`CEDT<../platform/acpi/cedt>` * `Downstream Ports` typically connected to `Host Bridge Ports`. -* `Root Decoders` defined by ACPI CEDT CFMWS. +* `Root Decoders` defined by CFMWS the :doc:`CEDT<../platform/acpi/cedt>` :: @@ -150,9 +150,8 @@ An `endpoint` is a terminal port in the fabric. This is a `logical device`, and may be one of many `logical devices` presented by a memory device. It is still considered a type of `port` in the fabric. -An `endpoint` contains `endpoint decoders` available for use and the -*Coherent Device Attribute Table* (CDAT) used to describe the capabilities -of the device. :: +An `endpoint` contains `endpoint decoders` and the device's Coherent Device +Attribute Table (which describes the device's capabilities). :: # ls /sys/bus/cxl/devices/endpoint5 CDAT decoders_committed modalias uevent @@ -247,17 +246,18 @@ parameter. Root Decoder ~~~~~~~~~~~~ A `Root Decoder` is logical construct of the physical address and interleave -configurations present in the ACPI CEDT CFMWS. Linux presents this information -as a decoder present in the `CXL Root`. We consider this a `Root Decoder`, -though technically it exists on the boundary of the CXL specification and -platform-specific CXL root implementations. +configurations present in the CFMWS field of the :doc:`CEDT +<../platform/acpi/cedt>`. +Linux presents this information as a decoder present in the `CXL Root`. We +consider this a `Root Decoder`, though technically it exists on the boundary +of the CXL specification and platform-specific CXL root implementations. Linux considers these logical decoders a type of `Routing Decoder`, and is the first decoder in the CXL fabric to receive a memory access from the platform's memory controllers. `Root Decoders` are created during :code:`cxl_acpi_probe`. One root decoder -is created per CFMWS entry in the ACPI CEDT. +is created per CFMWS entry in the :doc:`CEDT <../platform/acpi/cedt>`. The :code:`target_list` parameter is filled by the CFMWS target fields. Targets of a root decoder are `Host Bridges`, which means interleave done at the root @@ -267,9 +267,11 @@ Only root decoders are capable of `Inter-Host-Bridge Interleave`. Such interleaves must be configured by the platform and described in the ACPI CEDT CFMWS, as the target CXL host bridge UIDs in the CFMWS must match the CXL -host bridge UIDs in the ACPI CEDT CHBS and ACPI DSDT. +host bridge UIDs in the CHBS field of the :doc:`CEDT +<../platform/acpi/cedt>` and the UID field of CXL Host Bridges defined in +the :doc:`DSDT <../platform/acpi/dsdt>`. -Interleave settings in a rootdecoder describe how to interleave accesses among +Interleave settings in a root decoder describe how to interleave accesses among the *immediate downstream targets*, not the entire interleave set. The memory range described in the root decoder is used to @@ -531,10 +533,11 @@ granularity configuration. At Root ~~~~~~~ -Root decoder interleave is defined by the ACPI CEDT CFMWS. The CEDT -may actually define multiple CFMWS configurations to describe the same -physical capacity - with the intent to allow users to decide at runtime -whether to online memory as interleaved or non-interleaved. :: +Root decoder interleave is defined by CFMWS field of the :doc:`CEDT +<../platform/acpi/cedt>`. The CEDT may actually define multiple CFMWS +configurations to describe the same physical capacity, with the intent to allow +users to decide at runtime whether to online memory as interleaved or +non-interleaved. :: Subtable Type : 01 [CXL Fixed Memory Window Structure] Window base address : 0000000100000000 diff --git a/Documentation/driver-api/cxl/linux/early-boot.rst b/Documentation/driver-api/cxl/linux/early-boot.rst index 8c1c497bc772..a7fc6fc85fbe 100644 --- a/Documentation/driver-api/cxl/linux/early-boot.rst +++ b/Documentation/driver-api/cxl/linux/early-boot.rst @@ -12,8 +12,9 @@ read EFI and ACPI information throughout this process to configure logical representations of the devices. During Linux Early Boot stage (functions in the kernel that have the __init -decorator), the system takes the resources created by EFI/BIOS (ACPI tables) -and turns them into resources that the kernel can consume. +decorator), the system takes the resources created by EFI/BIOS +(:doc:`ACPI tables <../platform/acpi>`) and turns them into resources that the +kernel can consume. BIOS, Build and Boot Options @@ -70,13 +71,14 @@ significant impact performance depending on the memory capacity of the system. NUMA Node Reservation ===================== -Linux refers to the proximity domains (:code:`PXM`) defined in the SRAT to -create NUMA nodes in :code:`acpi_numa_init`. Typically, there is a 1:1 relation -between :code:`PXM` and NUMA node IDs. +Linux refers to the proximity domains (:code:`PXM`) defined in the :doc:`SRAT +<../platform/acpi/srat>` to create NUMA nodes in :code:`acpi_numa_init`. +Typically, there is a 1:1 relation between :code:`PXM` and NUMA node IDs. -SRAT is the only ACPI defined way of defining Proximity Domains. Linux chooses -to, at most, map those 1:1 with NUMA nodes. CEDT adds a description of SPA -ranges which Linux may wish to map to one or more NUMA nodes. +The SRAT is the only ACPI defined way of defining Proximity Domains. Linux +chooses to, at most, map those 1:1 with NUMA nodes. +:doc:`CEDT <../platform/acpi/cedt>` adds a description of SPA ranges which +Linux may map to one or more NUMA nodes. If there are CXL ranges in the CFMWS but not in SRAT, then a fake :code:`PXM` is created (as of v6.15). In the future, Linux may reject CFMWS not described @@ -89,7 +91,8 @@ data for Linux to identify NUMA nodes their associated memory regions. The relevant code exists in: :code:`linux/drivers/acpi/numa/srat.c`. -See the Example Platform Configurations section for more information. +See :doc:`Example Platform Configurations <../platform/example-configs>` +for more info. Memory Tiers Creation ===================== @@ -108,10 +111,13 @@ Tier membership can be inspected in :: /sys/devices/virtual/memory_tiering/memory_tierN/nodelist 0-1 -If nodes are grouped which have clear difference in performance, check the HMAT -and CDAT information for the CXL nodes. All nodes default to the DRAM tier, -unless HMAT/CDAT information is reported to the memory_tier component via -`access_coordinates`. +If nodes are grouped which have clear difference in performance, check the +:doc:`HMAT <../platform/acpi/hmat>` and CDAT information for the CXL nodes. All +nodes default to the DRAM tier, unless HMAT/CDAT information is reported to the +memory_tier component via `access_coordinates`. + +For more, see :doc:`CXL access coordinates documentation +<../linux/access-coordinates>`. Contiguous Memory Allocation ============================ diff --git a/Documentation/driver-api/cxl/platform/bios-and-efi.rst b/Documentation/driver-api/cxl/platform/bios-and-efi.rst index 552a83992bcc..645322632cc9 100644 --- a/Documentation/driver-api/cxl/platform/bios-and-efi.rst +++ b/Documentation/driver-api/cxl/platform/bios-and-efi.rst @@ -22,7 +22,7 @@ At a high level, this is what occurs during this phase of configuration. Much of what this section is concerned with is ACPI Table production and static memory map configuration. More detail on these tables can be found -under Platform Configuration -> ACPI Table Reference. +at :doc:`ACPI Tables `. .. note:: Platform Vendors should read carefully, as this sections has recommendations @@ -175,9 +175,9 @@ to implement driver support for your platform. Interleave and Configuration Flexibility ---------------------------------------- -If providing cross-host-bridge interleave, a CFMWS entry in the CEDT must be -presented with target host-bridges for the interleaved device sets (there may -be multiple behind each host bridge). +If providing cross-host-bridge interleave, a CFMWS entry in the :doc:`CEDT +` must be presented with target host-bridges for the interleaved +device sets (there may be multiple behind each host bridge). If providing intra-host-bridge interleaving, only 1 CFMWS entry in the CEDT is required for that host bridge - if it covers the entire capacity of the devices @@ -193,8 +193,8 @@ different purposes. For example, you may want to consider adding: A platform may choose to add all of these, or change the mode based on a BIOS setting. For each CFMWS entry, Linux expects descriptions of the described -memory regions in the SRAT to determine the number of NUMA nodes it should -reserve during early boot / init. +memory regions in the :doc:`SRAT ` to determine the number of +NUMA nodes it should reserve during early boot / init. As of v6.14, Linux will create a NUMA node for each CEDT CFMWS entry, even if a matching SRAT entry does not exist; however, this is not guaranteed in the diff --git a/Documentation/driver-api/cxl/platform/example-configurations/flexible.rst b/Documentation/driver-api/cxl/platform/example-configurations/flexible.rst index e39daba65fa0..dab704b6fcc2 100644 --- a/Documentation/driver-api/cxl/platform/example-configurations/flexible.rst +++ b/Documentation/driver-api/cxl/platform/example-configurations/flexible.rst @@ -18,7 +18,7 @@ Things to note: * This SRAT describes one node for each of the above CFMWS. * The HMAT describes performance for each node in the SRAT. -CEDT :: +:doc:`CEDT <../acpi/cedt>`:: Subtable Type : 00 [CXL Host Bridge Structure] Reserved : 00 @@ -137,7 +137,7 @@ CEDT :: QtgId : 0001 First Target : 00000006 -SRAT :: +:doc:`SRAT <../acpi/srat>`:: Subtable Type : 01 [Memory Affinity] Length : 28 @@ -223,7 +223,7 @@ SRAT :: Hot Pluggable : 1 Non-Volatile : 0 -HMAT :: +:doc:`HMAT <../acpi/hmat>`:: Structure Type : 0001 [SLLBI] Data Type : 00 [Latency] @@ -263,7 +263,7 @@ HMAT :: Entry : 0100 Entry : 0100 -SLIT :: +:doc:`SLIT <../acpi/slit>`:: Signature : "SLIT" [System Locality Information Table] Localities : 0000000000000003 @@ -276,7 +276,7 @@ SLIT :: Locality 6 : FF FF FF FF FF FF 0A FF Locality 7 : FF FF FF FF FF FF FF 0A -DSDT :: +:doc:`DSDT <../acpi/dsdt>`:: Scope (_SB) { diff --git a/Documentation/driver-api/cxl/platform/example-configurations/hb-interleave.rst b/Documentation/driver-api/cxl/platform/example-configurations/hb-interleave.rst index ce07e6162f26..c474dcf09fb0 100644 --- a/Documentation/driver-api/cxl/platform/example-configurations/hb-interleave.rst +++ b/Documentation/driver-api/cxl/platform/example-configurations/hb-interleave.rst @@ -13,7 +13,7 @@ Things to note: * This SRAT describes one node for both host bridges. * The HMAT describes a single node's performance. -CEDT :: +:doc:`CEDT <../acpi/cedt>`:: Subtable Type : 00 [CXL Host Bridge Structure] Reserved : 00 @@ -48,7 +48,7 @@ CEDT :: First Target : 00000007 Second Target : 00000006 -SRAT :: +:doc:`SRAT <../acpi/srat>`:: Subtable Type : 01 [Memory Affinity] Length : 28 @@ -62,7 +62,7 @@ SRAT :: Hot Pluggable : 1 Non-Volatile : 0 -HMAT :: +:doc:`HMAT <../acpi/hmat>`:: Structure Type : 0001 [SLLBI] Data Type : 00 [Latency] @@ -80,14 +80,14 @@ HMAT :: Entry : 1200 Entry : 0400 -SLIT :: +:doc:`SLIT <../acpi/slit>`:: Signature : "SLIT" [System Locality Information Table] Localities : 0000000000000003 Locality 0 : 10 20 Locality 1 : FF 0A -DSDT :: +:doc:`DSDT <../acpi/dsdt>`:: Scope (_SB) { diff --git a/Documentation/driver-api/cxl/platform/example-configurations/multi-dev-per-hb.rst b/Documentation/driver-api/cxl/platform/example-configurations/multi-dev-per-hb.rst index 6adf7c639490..a7854a79dbbd 100644 --- a/Documentation/driver-api/cxl/platform/example-configurations/multi-dev-per-hb.rst +++ b/Documentation/driver-api/cxl/platform/example-configurations/multi-dev-per-hb.rst @@ -14,7 +14,7 @@ Things to note: * This CEDT/SRAT describes one node for both devices. * There is only one proximity domain the HMAT for both devices. -CEDT :: +:doc:`CEDT <../acpi/cedt>`:: Subtable Type : 00 [CXL Host Bridge Structure] Reserved : 00 @@ -39,7 +39,7 @@ CEDT :: QtgId : 0001 First Target : 00000007 -SRAT :: +:doc:`SRAT <../acpi/srat>`:: Subtable Type : 01 [Memory Affinity] Length : 28 @@ -53,7 +53,7 @@ SRAT :: Hot Pluggable : 1 Non-Volatile : 0 -HMAT :: +:doc:`HMAT <../acpi/hmat>`:: Structure Type : 0001 [SLLBI] Data Type : 00 [Latency] @@ -69,14 +69,14 @@ HMAT :: Entry : 1200 Entry : 0200 -SLIT :: +:doc:`SLIT <../acpi/slit>`:: Signature : "SLIT" [System Locality Information Table] Localities : 0000000000000003 Locality 0 : 10 20 Locality 1 : FF 0A -DSDT :: +:doc:`DSDT <../acpi/dsdt>`:: Scope (_SB) { diff --git a/Documentation/driver-api/cxl/platform/example-configurations/one-dev-per-hb.rst b/Documentation/driver-api/cxl/platform/example-configurations/one-dev-per-hb.rst index b89ba3cab98f..aebda0eb3e17 100644 --- a/Documentation/driver-api/cxl/platform/example-configurations/one-dev-per-hb.rst +++ b/Documentation/driver-api/cxl/platform/example-configurations/one-dev-per-hb.rst @@ -14,7 +14,7 @@ Things to note: * This CEDT/SRAT describes one node per device * The expanders have the same performance and will be in the same memory tier. -CEDT :: +:doc:`CEDT <../acpi/cedt>`:: Subtable Type : 00 [CXL Host Bridge Structure] Reserved : 00 @@ -62,7 +62,7 @@ CEDT :: QtgId : 0001 First Target : 00000006 -SRAT :: +:doc:`SRAT <../acpi/srat>`:: Subtable Type : 01 [Memory Affinity] Length : 28 @@ -88,7 +88,7 @@ SRAT :: Hot Pluggable : 1 Non-Volatile : 0 -HMAT :: +:doc:`HMAT <../acpi/hmat>`:: Structure Type : 0001 [SLLBI] Data Type : 00 [Latency] @@ -108,7 +108,7 @@ HMAT :: Entry : 0200 Entry : 0200 -SLIT :: +:doc:`SLIT <../acpi/slit>`:: Signature : "SLIT" [System Locality Information Table] Localities : 0000000000000003 @@ -116,7 +116,7 @@ SLIT :: Locality 1 : FF 0A FF Locality 2 : FF FF 0A -DSDT :: +:doc:`DSDT <../acpi/dsdt>`:: Scope (_SB) { -- cgit v1.2.3 From f2e3df345c441ce2f24abc468812a73107cb8f20 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 7 May 2025 10:42:53 -0500 Subject: dt-bindings: Move altr,msi-controller to interrupt-controller directory While altr,msi-controller is used with PCI, it is not a PCI host bridge and is just an MSI provider. Move it with other MSI providers in the 'interrupt-controller' directory. Acked-by: Matthew Gerlach Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250507154253.1593870-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/altr,msi-controller.yaml | 65 ++++++++++++++++++++++ .../bindings/pci/altr,msi-controller.yaml | 65 ---------------------- 2 files changed, 65 insertions(+), 65 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/altr,msi-controller.yaml delete mode 100644 Documentation/devicetree/bindings/pci/altr,msi-controller.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/altr,msi-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/altr,msi-controller.yaml new file mode 100644 index 000000000000..d046954b8a27 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/altr,msi-controller.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (C) 2015, 2024, Intel Corporation +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/altr,msi-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Altera PCIe MSI controller + +maintainers: + - Matthew Gerlach + +properties: + compatible: + enum: + - altr,msi-1.0 + + reg: + items: + - description: CSR registers + - description: Vectors slave port region + + reg-names: + items: + - const: csr + - const: vector_slave + + interrupts: + maxItems: 1 + + msi-controller: true + + num-vectors: + description: number of vectors + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 32 + +required: + - compatible + - reg + - reg-names + - interrupts + - msi-controller + - num-vectors + +allOf: + - $ref: /schemas/interrupt-controller/msi-controller.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + msi@ff200000 { + compatible = "altr,msi-1.0"; + reg = <0xff200000 0x00000010>, + <0xff200010 0x00000080>; + reg-names = "csr", "vector_slave"; + interrupt-parent = <&hps_0_arm_gic_0>; + interrupts = ; + msi-controller; + num-vectors = <32>; + }; diff --git a/Documentation/devicetree/bindings/pci/altr,msi-controller.yaml b/Documentation/devicetree/bindings/pci/altr,msi-controller.yaml deleted file mode 100644 index 98814862d006..000000000000 --- a/Documentation/devicetree/bindings/pci/altr,msi-controller.yaml +++ /dev/null @@ -1,65 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -# Copyright (C) 2015, 2024, Intel Corporation -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/altr,msi-controller.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Altera PCIe MSI controller - -maintainers: - - Matthew Gerlach - -properties: - compatible: - enum: - - altr,msi-1.0 - - reg: - items: - - description: CSR registers - - description: Vectors slave port region - - reg-names: - items: - - const: csr - - const: vector_slave - - interrupts: - maxItems: 1 - - msi-controller: true - - num-vectors: - description: number of vectors - $ref: /schemas/types.yaml#/definitions/uint32 - minimum: 1 - maximum: 32 - -required: - - compatible - - reg - - reg-names - - interrupts - - msi-controller - - num-vectors - -allOf: - - $ref: /schemas/interrupt-controller/msi-controller.yaml# - -unevaluatedProperties: false - -examples: - - | - #include - #include - msi@ff200000 { - compatible = "altr,msi-1.0"; - reg = <0xff200000 0x00000010>, - <0xff200010 0x00000080>; - reg-names = "csr", "vector_slave"; - interrupt-parent = <&hps_0_arm_gic_0>; - interrupts = ; - msi-controller; - num-vectors = <32>; - }; -- cgit v1.2.3 From 66eb172b5e149368f9b1d12ec0d8846bc1751a68 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:46:43 -0500 Subject: dt-bindings: interrupt-controller: Convert cnxt,cx92755-ic to DT schema Convert the Conexant Digicolor interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Acked-by: Baruch Siach Link: https://lore.kernel.org/r/20250505144644.1288617-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/cnxt,cx92755-ic.yaml | 47 ++++++++++++++++++++++ .../bindings/interrupt-controller/digicolor-ic.txt | 21 ---------- 2 files changed, 47 insertions(+), 21 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/cnxt,cx92755-ic.yaml delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/cnxt,cx92755-ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/cnxt,cx92755-ic.yaml new file mode 100644 index 000000000000..3f016cf47812 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/cnxt,cx92755-ic.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/cnxt,cx92755-ic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Conexant Digicolor Interrupt Controller + +maintainers: + - Baruch Siach + +description: Conexant Digicolor Interrupt Controller + +properties: + compatible: + const: cnxt,cx92755-ic + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + + syscon: + description: A phandle to the syscon node describing UC registers + $ref: /schemas/types.yaml#/definitions/phandle + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - syscon + +additionalProperties: false + +examples: + - | + interrupt-controller@f0000040 { + compatible = "cnxt,cx92755-ic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0xf0000040 0x40>; + syscon = <&uc_regs>; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt deleted file mode 100644 index 42d41ec84c7b..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt +++ /dev/null @@ -1,21 +0,0 @@ -Conexant Digicolor Interrupt Controller - -Required properties: - -- compatible : should be "cnxt,cx92755-ic" -- reg : Specifies base physical address and size of the interrupt controller - registers (IC) area -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value shall be 1. -- syscon: A phandle to the syscon node describing UC registers - -Example: - - intc: interrupt-controller@f0000040 { - compatible = "cnxt,cx92755-ic"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0xf0000040 0x40>; - syscon = <&uc_regs>; - }; -- cgit v1.2.3 From 5511d95c05e496bc231393724d66cfcb4552b666 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:46:16 -0500 Subject: dt-bindings: interrupt-controller: Convert brcm,bcm2835-armctrl-ic to DT schema Convert the Broadcom BCM2835 ARMCTRL interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144618.1287539-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../brcm,bcm2835-armctrl-ic.txt | 131 ----------------- .../brcm,bcm2835-armctrl-ic.yaml | 162 +++++++++++++++++++++ 2 files changed, 162 insertions(+), 131 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt deleted file mode 100644 index bdd173056f72..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt +++ /dev/null @@ -1,131 +0,0 @@ -BCM2835 Top-Level ("ARMCTRL") Interrupt Controller - -The BCM2835 contains a custom top-level interrupt controller, which supports -72 interrupt sources using a 2-level register scheme. The interrupt -controller, or the HW block containing it, is referred to occasionally -as "armctrl" in the SoC documentation, hence naming of this binding. - -The BCM2836 contains the same interrupt controller with the same -interrupts, but the per-CPU interrupt controller is the root, and an -interrupt there indicates that the ARMCTRL has an interrupt to handle. - -Required properties: - -- compatible : should be "brcm,bcm2835-armctrl-ic" or - "brcm,bcm2836-armctrl-ic" -- reg : Specifies base physical address and size of the registers. -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value shall be 2. - - The 1st cell is the interrupt bank; 0 for interrupts in the "IRQ basic - pending" register, or 1/2 respectively for interrupts in the "IRQ pending - 1/2" register. - - The 2nd cell contains the interrupt number within the bank. Valid values - are 0..7 for bank 0, and 0..31 for bank 1. - -Additional required properties for brcm,bcm2836-armctrl-ic: -- interrupts : Specifies the interrupt on the parent for this interrupt - controller to handle. - -The interrupt sources are as follows: - -Bank 0: -0: ARM_TIMER -1: ARM_MAILBOX -2: ARM_DOORBELL_0 -3: ARM_DOORBELL_1 -4: VPU0_HALTED -5: VPU1_HALTED -6: ILLEGAL_TYPE0 -7: ILLEGAL_TYPE1 - -Bank 1: -0: TIMER0 -1: TIMER1 -2: TIMER2 -3: TIMER3 -4: CODEC0 -5: CODEC1 -6: CODEC2 -7: VC_JPEG -8: ISP -9: VC_USB -10: VC_3D -11: TRANSPOSER -12: MULTICORESYNC0 -13: MULTICORESYNC1 -14: MULTICORESYNC2 -15: MULTICORESYNC3 -16: DMA0 -17: DMA1 -18: VC_DMA2 -19: VC_DMA3 -20: DMA4 -21: DMA5 -22: DMA6 -23: DMA7 -24: DMA8 -25: DMA9 -26: DMA10 -27: DMA11-14 - shared interrupt for DMA 11 to 14 -28: DMAALL - triggers on all dma interrupts (including channel 15) -29: AUX -30: ARM -31: VPUDMA - -Bank 2: -0: HOSTPORT -1: VIDEOSCALER -2: CCP2TX -3: SDC -4: DSI0 -5: AVE -6: CAM0 -7: CAM1 -8: HDMI0 -9: HDMI1 -10: PIXELVALVE1 -11: I2CSPISLV -12: DSI1 -13: PWA0 -14: PWA1 -15: CPR -16: SMI -17: GPIO0 -18: GPIO1 -19: GPIO2 -20: GPIO3 -21: VC_I2C -22: VC_SPI -23: VC_I2SPCM -24: VC_SDIO -25: VC_UART -26: SLIMBUS -27: VEC -28: CPG -29: RNG -30: VC_ARASANSDIO -31: AVSPMON - -Example: - -/* BCM2835, first level */ -intc: interrupt-controller { - compatible = "brcm,bcm2835-armctrl-ic"; - reg = <0x7e00b200 0x200>; - interrupt-controller; - #interrupt-cells = <2>; -}; - -/* BCM2836, second level */ -intc: interrupt-controller { - compatible = "brcm,bcm2836-armctrl-ic"; - reg = <0x7e00b200 0x200>; - interrupt-controller; - #interrupt-cells = <2>; - - interrupt-parent = <&local_intc>; - interrupts = <8>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.yaml new file mode 100644 index 000000000000..625eb22bedf0 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.yaml @@ -0,0 +1,162 @@ +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2835-armctrl-ic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: BCM2835 ARMCTRL Interrupt Controller + +maintainers: + - Florian Fainelli + - Raspberry Pi Kernel Maintenance + +description: > + The BCM2835 contains a custom top-level interrupt controller, which supports + 72 interrupt sources using a 2-level register scheme. The interrupt + controller, or the HW block containing it, is referred to occasionally as + "armctrl" in the SoC documentation, hence naming of this binding. + + The BCM2836 contains the same interrupt controller with the same interrupts, + but the per-CPU interrupt controller is the root, and an interrupt there + indicates that the ARMCTRL has an interrupt to handle. + + The interrupt sources are as follows: + + Bank 0: + 0: ARM_TIMER + 1: ARM_MAILBOX + 2: ARM_DOORBELL_0 + 3: ARM_DOORBELL_1 + 4: VPU0_HALTED + 5: VPU1_HALTED + 6: ILLEGAL_TYPE0 + 7: ILLEGAL_TYPE1 + + Bank 1: + 0: TIMER0 + 1: TIMER1 + 2: TIMER2 + 3: TIMER3 + 4: CODEC0 + 5: CODEC1 + 6: CODEC2 + 7: VC_JPEG + 8: ISP + 9: VC_USB + 10: VC_3D + 11: TRANSPOSER + 12: MULTICORESYNC0 + 13: MULTICORESYNC1 + 14: MULTICORESYNC2 + 15: MULTICORESYNC3 + 16: DMA0 + 17: DMA1 + 18: VC_DMA2 + 19: VC_DMA3 + 20: DMA4 + 21: DMA5 + 22: DMA6 + 23: DMA7 + 24: DMA8 + 25: DMA9 + 26: DMA10 + 27: DMA11-14 - shared interrupt for DMA 11 to 14 + 28: DMAALL - triggers on all dma interrupts (including channel 15) + 29: AUX + 30: ARM + 31: VPUDMA + + Bank 2: + 0: HOSTPORT + 1: VIDEOSCALER + 2: CCP2TX + 3: SDC + 4: DSI0 + 5: AVE + 6: CAM0 + 7: CAM1 + 8: HDMI0 + 9: HDMI1 + 10: PIXELVALVE1 + 11: I2CSPISLV + 12: DSI1 + 13: PWA0 + 14: PWA1 + 15: CPR + 16: SMI + 17: GPIO0 + 18: GPIO1 + 19: GPIO2 + 20: GPIO3 + 21: VC_I2C + 22: VC_SPI + 23: VC_I2SPCM + 24: VC_SDIO + 25: VC_UART + 26: SLIMBUS + 27: VEC + 28: CPG + 29: RNG + 30: VC_ARASANSDIO + 31: AVSPMON + +properties: + compatible: + enum: + - brcm,bcm2835-armctrl-ic + - brcm,bcm2836-armctrl-ic + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + description: > + The 1st cell is the interrupt bank; 0 for interrupts in the "IRQ basic + pending" register, or 1/2 respectively for interrupts in the "IRQ pending + 1/2" register. + + The 2nd cell contains the interrupt number within the bank. Valid values + are 0..7 for bank 0, and 0..31 for bank 1. + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +allOf: + - if: + properties: + compatible: + contains: + const: brcm,bcm2836-armctrl-ic + then: + required: + - interrupts + else: + properties: + interrupts: false + +additionalProperties: false + +examples: + - | + interrupt-controller@7e00b200 { + compatible = "brcm,bcm2835-armctrl-ic"; + reg = <0x7e00b200 0x200>; + interrupt-controller; + #interrupt-cells = <2>; + }; + - | + interrupt-controller@7e00b200 { + compatible = "brcm,bcm2836-armctrl-ic"; + reg = <0x7e00b200 0x200>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <8>; + }; -- cgit v1.2.3 From bac0fb596ecc65ef4952a8d27f1d186c5188aea9 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:47:42 -0500 Subject: dt-bindings: interrupt-controller: Convert marvell,orion-bridge-intc to DT schema Convert the Marvell Orion bridge interrupt controller binding to schema format. marvell,orion-intc is already covered by mrvl,intc.yaml schema, so it can be dropped. Reviewed-by: Andrew Lunn Link: https://lore.kernel.org/r/20250505144743.1290672-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../marvell,orion-bridge-intc.yaml | 52 ++++++++++++++++++++++ .../interrupt-controller/marvell,orion-intc.txt | 48 -------------------- 2 files changed, 52 insertions(+), 48 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,orion-bridge-intc.yaml delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,orion-intc.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,orion-bridge-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/marvell,orion-bridge-intc.yaml new file mode 100644 index 000000000000..e1310ec65382 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,orion-bridge-intc.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +--- +$id: http://devicetree.org/schemas/interrupt-controller/marvell,orion-bridge-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Orion SoC Bridge Interrupt Controller + +maintainers: + - Andrew Lunn + - Gregory Clement + +properties: + compatible: + const: marvell,orion-bridge-intc + + reg: + minItems: 1 + maxItems: 2 + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + + interrupts: + description: Bridge interrupt of the main interrupt controller + + marvell,#interrupts: + description: Number of interrupts provided by bridge interrupt controller. + $ref: /schemas/types.yaml#/definitions/uint32 + default: 32 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - interrupts + +additionalProperties: false + +examples: + - | + interrupt-controller@20110 { + compatible = "marvell,orion-bridge-intc"; + reg = <0x20110 0x8>; + interrupt-controller; + #interrupt-cells = <1>; + interrupts = <0>; + /* Dove bridge provides 5 interrupts */ + marvell,#interrupts = <5>; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,orion-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,orion-intc.txt deleted file mode 100644 index 2c11ac76fac9..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/marvell,orion-intc.txt +++ /dev/null @@ -1,48 +0,0 @@ -Marvell Orion SoC interrupt controllers - -* Main interrupt controller - -Required properties: -- compatible: shall be "marvell,orion-intc" -- reg: base address(es) of interrupt registers starting with CAUSE register -- interrupt-controller: identifies the node as an interrupt controller -- #interrupt-cells: number of cells to encode an interrupt source, shall be 1 - -The interrupt sources map to the corresponding bits in the interrupt -registers, i.e. -- 0 maps to bit 0 of first base address, -- 1 maps to bit 1 of first base address, -- 32 maps to bit 0 of second base address, and so on. - -Example: - intc: interrupt-controller { - compatible = "marvell,orion-intc"; - interrupt-controller; - #interrupt-cells = <1>; - /* Dove has 64 first level interrupts */ - reg = <0x20200 0x10>, <0x20210 0x10>; - }; - -* Bridge interrupt controller - -Required properties: -- compatible: shall be "marvell,orion-bridge-intc" -- reg: base address of bridge interrupt registers starting with CAUSE register -- interrupts: bridge interrupt of the main interrupt controller -- interrupt-controller: identifies the node as an interrupt controller -- #interrupt-cells: number of cells to encode an interrupt source, shall be 1 - -Optional properties: -- marvell,#interrupts: number of interrupts provided by bridge interrupt - controller, defaults to 32 if not set - -Example: - bridge_intc: interrupt-controller { - compatible = "marvell,orion-bridge-intc"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0x20110 0x8>; - interrupts = <0>; - /* Dove bridge provides 5 interrupts */ - marvell,#interrupts = <5>; - }; -- cgit v1.2.3 From 3151c26c811a484f5234499cff5930f8166a3823 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:45:56 -0500 Subject: dt-bindings: interrupt-controller: Convert arm,versatile-fpga-irq to DT schema Convert the Arm Versatile FPGA interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Reviewed-by: Linus Walleij Link: https://lore.kernel.org/r/20250505144558.1286889-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../arm,versatile-fpga-irq.txt | 38 -------------- .../arm,versatile-fpga-irq.yaml | 61 ++++++++++++++++++++++ 2 files changed, 61 insertions(+), 38 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt b/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt deleted file mode 100644 index ea939f54c5eb..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt +++ /dev/null @@ -1,38 +0,0 @@ -* ARM Versatile FPGA interrupt controller - -One or more FPGA IRQ controllers can be synthesized in an ARM reference board -such as the Integrator or Versatile family. The output of these different -controllers are OR:ed together and fed to the CPU tile's IRQ input. Each -instance can handle up to 32 interrupts. - -Required properties: -- compatible: "arm,versatile-fpga-irq" -- interrupt-controller: Identifies the node as an interrupt controller -- #interrupt-cells: The number of cells to define the interrupts. Must be 1 - as the FPGA IRQ controller has no configuration options for interrupt - sources. The cell is a u32 and defines the interrupt number. -- reg: The register bank for the FPGA interrupt controller. -- clear-mask: a u32 number representing the mask written to clear all IRQs - on the controller at boot for example. -- valid-mask: a u32 number representing a bit mask determining which of - the interrupts are valid. Unconnected/unused lines are set to 0, and - the system till not make it possible for devices to request these - interrupts. - -The "oxsemi,ox810se-rps-irq" compatible is deprecated. - -Example: - -pic: pic@14000000 { - compatible = "arm,versatile-fpga-irq"; - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x14000000 0x100>; - clear-mask = <0xffffffff>; - valid-mask = <0x003fffff>; -}; - -Optional properties: -- interrupts: if the FPGA IRQ controller is cascaded, i.e. if its IRQ - output is simply connected to the input of another IRQ controller, - then the parent IRQ shall be specified in this property. diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.yaml new file mode 100644 index 000000000000..8d581b3aac3a --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/arm,versatile-fpga-irq.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Versatile FPGA IRQ Controller + +maintainers: + - Linus Walleij + +description: + One or more FPGA IRQ controllers can be synthesized in an ARM reference board + such as the Integrator or Versatile family. The output of these different + controllers are OR:ed together and fed to the CPU tile's IRQ input. Each + instance can handle up to 32 interrupts. + +properties: + compatible: + const: arm,versatile-fpga-irq + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + + reg: + maxItems: 1 + + clear-mask: + description: A mask written to clear all IRQs on the controller at boot. + $ref: /schemas/types.yaml#/definitions/uint32 + + valid-mask: + description: + A bit mask determining which interrupts are valid; unused lines are set to 0. + $ref: /schemas/types.yaml#/definitions/uint32 + + interrupts: + maxItems: 1 + +additionalProperties: false + +required: + - compatible + - interrupt-controller + - '#interrupt-cells' + - reg + - clear-mask + - valid-mask + +examples: + - | + interrupt-controller@14000000 { + compatible = "arm,versatile-fpga-irq"; + #interrupt-cells = <1>; + interrupt-controller; + reg = <0x14000000 0x100>; + clear-mask = <0xffffffff>; + valid-mask = <0x003fffff>; + }; -- cgit v1.2.3 From aacd3d6211e315642887acb9c73ef3413581a6f1 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:46:53 -0500 Subject: dt-bindings: interrupt-controller: Convert faraday,ftintc010 to DT schema Convert the Faraday FTINTC010 interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Reviewed-by: Linus Walleij Link: https://lore.kernel.org/r/20250505144654.1288979-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/faraday,ftintc010.txt | 25 ----------- .../interrupt-controller/faraday,ftintc010.yaml | 51 ++++++++++++++++++++++ 2 files changed, 51 insertions(+), 25 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.txt b/Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.txt deleted file mode 100644 index 24428d47f487..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.txt +++ /dev/null @@ -1,25 +0,0 @@ -* Faraday Technologt FTINTC010 interrupt controller - -This interrupt controller is a stock IP block from Faraday Technology found -in the Gemini SoCs and other designs. - -Required properties: -- compatible: must be one of - "faraday,ftintc010" - "cortina,gemini-interrupt-controller" (deprecated) -- reg: The register bank for the interrupt controller. -- interrupt-controller: Identifies the node as an interrupt controller -- #interrupt-cells: The number of cells to define the interrupts. - Must be 2 as the controller can specify level or rising edge - IRQs. The bindings follows the standard binding for controllers - with two cells specified in - interrupt-controller/interrupts.txt - -Example: - -interrupt-controller@48000000 { - compatible = "faraday,ftintc010" - reg = <0x48000000 0x1000>; - interrupt-controller; - #interrupt-cells = <2>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.yaml b/Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.yaml new file mode 100644 index 000000000000..980e5c45f25b --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +--- +$id: http://devicetree.org/schemas/interrupt-controller/faraday,ftintc010.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Faraday Technology FTINTC010 interrupt controller + +maintainers: + - Linus Walleij + +description: + This interrupt controller is a stock IP block from Faraday Technology found + in the Gemini SoCs and other designs. + +properties: + compatible: + oneOf: + - items: + - const: moxa,moxart-ic + - const: faraday,ftintc010 + - enum: + - faraday,ftintc010 + - cortina,gemini-interrupt-controller + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + interrupt-controller@48000000 { + compatible = "faraday,ftintc010"; + reg = <0x48000000 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + }; -- cgit v1.2.3 From 815d7b2c13590a77b295d0330c31429d367f2ece Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:46:04 -0500 Subject: dt-bindings: interrupt-controller: Convert aspeed,ast2400-i2c-ic to DT schema Convert the Aspeed I2C interrupt controller binding to schema format. Drop the "#address-cells" and "#size-cells" as they are unused and incorrect anyways. Reviewed-by: Andrew Jeffery Link: https://lore.kernel.org/r/20250505144605.1287121-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/aspeed,ast2400-i2c-ic.txt | 25 ------------ .../aspeed,ast2400-i2c-ic.yaml | 46 ++++++++++++++++++++++ 2 files changed, 46 insertions(+), 25 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.txt deleted file mode 100644 index 033cc82e5684..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.txt +++ /dev/null @@ -1,25 +0,0 @@ -Device tree configuration for the I2C Interrupt Controller on the AST24XX and -AST25XX SoCs. - -Required Properties: -- #address-cells : should be 1 -- #size-cells : should be 1 -- #interrupt-cells : should be 1 -- compatible : should be "aspeed,ast2400-i2c-ic" - or "aspeed,ast2500-i2c-ic" -- reg : address start and range of controller -- interrupts : interrupt number -- interrupt-controller : denotes that the controller receives and fires - new interrupts for child busses - -Example: - -i2c_ic: interrupt-controller@0 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <1>; - compatible = "aspeed,ast2400-i2c-ic"; - reg = <0x0 0x40>; - interrupts = <12>; - interrupt-controller; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.yaml new file mode 100644 index 000000000000..6cff6a7231bb --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2400-i2c-ic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Aspeed I2C Interrupt Controller (AST24XX/AST25XX) + +maintainers: + - Ryan Chen + +properties: + compatible: + enum: + - aspeed,ast2400-i2c-ic + - aspeed,ast2500-i2c-ic + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + +required: + - compatible + - reg + - '#interrupt-cells' + - interrupts + - interrupt-controller + +additionalProperties: false + +examples: + - | + interrupt-controller@0 { + compatible = "aspeed,ast2400-i2c-ic"; + reg = <0x0 0x40>; + #interrupt-cells = <1>; + interrupts = <12>; + interrupt-controller; + }; -- cgit v1.2.3 From 29c29b1361096268fdb8b9ba5af0fcd75b038c94 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:46:11 -0500 Subject: dt-bindings: interrupt-controller: Convert aspeed,ast2xxx-scu-ic to DT schema Convert the Aspeed SCU interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144613.1287360-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../aspeed,ast2500-scu-ic.yaml | 48 ++++++++++++++++++++++ .../interrupt-controller/aspeed,ast2xxx-scu-ic.txt | 23 ----------- .../bindings/mfd/aspeed,ast2x00-scu.yaml | 9 +++- 3 files changed, 56 insertions(+), 24 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml new file mode 100644 index 000000000000..d5287a2bf866 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2025 Eddie James +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2500-scu-ic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Aspeed AST25XX and AST26XX SCU Interrupt Controller + +maintainers: + - Eddie James + +properties: + compatible: + enum: + - aspeed,ast2500-scu-ic + - aspeed,ast2600-scu-ic0 + - aspeed,ast2600-scu-ic1 + + reg: + maxItems: 1 + + '#interrupt-cells': + const: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + +required: + - compatible + - reg + - '#interrupt-cells' + - interrupts + - interrupt-controller + +additionalProperties: false + +examples: + - | + interrupt-controller@18 { + compatible = "aspeed,ast2500-scu-ic"; + reg = <0x18 0x4>; + #interrupt-cells = <1>; + interrupts = <21>; + interrupt-controller; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt deleted file mode 100644 index 251ed44171db..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt +++ /dev/null @@ -1,23 +0,0 @@ -Aspeed AST25XX and AST26XX SCU Interrupt Controller - -Required Properties: - - #interrupt-cells : must be 1 - - compatible : must be "aspeed,ast2500-scu-ic", - "aspeed,ast2600-scu-ic0" or - "aspeed,ast2600-scu-ic1" - - interrupts : interrupt from the parent controller - - interrupt-controller : indicates that the controller receives and - fires new interrupts for child busses - -Example: - - syscon@1e6e2000 { - ranges = <0 0x1e6e2000 0x1a8>; - - scu_ic: interrupt-controller@18 { - #interrupt-cells = <1>; - compatible = "aspeed,ast2500-scu-ic"; - interrupts = <21>; - interrupt-controller; - }; - }; diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml index c800d5e53b65..5eccd10d95ce 100644 --- a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml +++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml @@ -66,8 +66,15 @@ patternProperties: - compatible '^interrupt-controller@[0-9a-f]+$': - description: See Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt type: object + additionalProperties: true + properties: + compatible: + contains: + enum: + - aspeed,ast2500-scu-ic + - aspeed,ast2600-scu-ic0 + - aspeed,ast2600-scu-ic1 '^silicon-id@[0-9a-f]+$': description: Unique hardware silicon identifiers within the SoC -- cgit v1.2.3 From 1276962ebc56a6535c6447f67110bd3bdbbbc584 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:49:00 -0500 Subject: dt-bindings: interrupt-controller: Convert ti,cp-intc to DT schema Convert the TI Common Platform interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Reviewed-by: Bartosz Golaszewski Link: https://lore.kernel.org/r/20250505144903.1293558-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/interrupt-controller/ti,cp-intc.txt | 27 ------------ .../bindings/interrupt-controller/ti,cp-intc.yaml | 50 ++++++++++++++++++++++ 2 files changed, 50 insertions(+), 27 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,cp-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,cp-intc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,cp-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,cp-intc.txt deleted file mode 100644 index 597e8a089fe4..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,cp-intc.txt +++ /dev/null @@ -1,27 +0,0 @@ -* TI Common Platform Interrupt Controller - -Common Platform Interrupt Controller (cp_intc) is used on -OMAP-L1x SoCs and can support several configurable number -of interrupts. - -Main node required properties: - -- compatible : should be: - "ti,cp-intc" -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The type shall be a and the value shall be 1. - - The cell contains the interrupt number in the range [0-128]. -- ti,intc-size: Number of interrupts handled by the interrupt controller. -- reg: physical base address and size of the intc registers map. - -Example: - - intc: interrupt-controller@1 { - compatible = "ti,cp-intc"; - interrupt-controller; - #interrupt-cells = <1>; - ti,intc-size = <101>; - reg = <0xfffee000 0x2000>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,cp-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,cp-intc.yaml new file mode 100644 index 000000000000..77d018d20f9f --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,cp-intc.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/ti,cp-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI Common Platform Interrupt Controller + +maintainers: + - Bartosz Golaszewski + +description: + Common Platform Interrupt Controller (cp_intc) is used on OMAP-L1x SoCs and + can support several configurable number of interrupts. + +properties: + compatible: + const: ti,cp-intc + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + description: Encodes an interrupt number in the range 0–128. + + ti,intc-size: + description: Number of interrupts handled by the interrupt controller. + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - ti,intc-size + +additionalProperties: false + +examples: + - | + interrupt-controller@fffee000 { + compatible = "ti,cp-intc"; + reg = <0xfffee000 0x2000>; + interrupt-controller; + #interrupt-cells = <1>; + ti,intc-size = <101>; + }; -- cgit v1.2.3 From 1ee0fd43803bf82b5388db9b406c1b5e1a08cac8 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:46:25 -0500 Subject: dt-bindings: interrupt-controller: Convert cdns,xtensa-{mx,pic} to DT schema Convert the Xtensa interrupt controller bindings to DT schema. Both only vary by the compatible string, so combine them into 1 schema doc. Acked-by: Max Filippov Link: https://lore.kernel.org/r/20250505144626.1287879-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/cdns,xtensa-mx.txt | 18 -------- .../interrupt-controller/cdns,xtensa-pic.txt | 25 ----------- .../interrupt-controller/cdns,xtensa-pic.yaml | 50 ++++++++++++++++++++++ 3 files changed, 50 insertions(+), 43 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-mx.txt delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-mx.txt b/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-mx.txt deleted file mode 100644 index d4de980e55fa..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-mx.txt +++ /dev/null @@ -1,18 +0,0 @@ -* Xtensa Interrupt Distributor and Programmable Interrupt Controller (MX) - -Required properties: -- compatible: Should be "cdns,xtensa-mx". - -Remaining properties have exact same meaning as in Xtensa PIC -(see cdns,xtensa-pic.txt). - -Examples: - pic: pic { - compatible = "cdns,xtensa-mx"; - /* one cell: internal irq number, - * two cells: second cell == 0: internal irq number - * second cell == 1: external irq number - */ - #interrupt-cells = <2>; - interrupt-controller; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.txt deleted file mode 100644 index 026ef4cfc1d5..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.txt +++ /dev/null @@ -1,25 +0,0 @@ -* Xtensa built-in Programmable Interrupt Controller (PIC) - -Required properties: -- compatible: Should be "cdns,xtensa-pic". -- interrupt-controller: Identifies the node as an interrupt controller. -- #interrupt-cells: The number of cells to define the interrupts. - It may be either 1 or 2. - When it's 1, the first cell is the internal IRQ number. - When it's 2, the first cell is the IRQ number, and the second cell - specifies whether it's internal (0) or external (1). - Periferals are usually connected to a fixed external IRQ, but for different - core variants it may be mapped to different internal IRQ. - IRQ sensitivity and priority are fixed for each core variant and may not be - changed at runtime. - -Examples: - pic: pic { - compatible = "cdns,xtensa-pic"; - /* one cell: internal irq number, - * two cells: second cell == 0: internal irq number - * second cell == 1: external irq number - */ - #interrupt-cells = <2>; - interrupt-controller; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.yaml new file mode 100644 index 000000000000..6773207fee01 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2025 Max Filippov + +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/cdns,xtensa-pic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xtensa Interrupt Controllers + +maintainers: + - Max Filippov + +description: + Xtensa Interrupt Distributor and Programmable Interrupt Controller (MX) and + Xtensa built-in Programmable Interrupt Controller (PIC) + +properties: + compatible: + enum: + - cdns,xtensa-mx + - cdns,xtensa-pic + + '#interrupt-cells': + enum: [ 1, 2 ] + description: + Number of cells to define the interrupts. When 1, the first cell is the + internal IRQ number; when 2, the second cell specifies internal (0) or + external (1). + + interrupt-controller: true + +required: + - compatible + - '#interrupt-cells' + - interrupt-controller + +additionalProperties: false + +examples: + - | + interrupt-controller { + compatible = "cdns,xtensa-pic"; + /* one cell: internal irq number, + * two cells: second cell == 0: internal irq number + * second cell == 1: external irq number + */ + #interrupt-cells = <2>; + interrupt-controller; + }; -- cgit v1.2.3 From a241f1a1b338b714e4d7417f71af9a93a9bd3c92 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:48:08 -0500 Subject: dt-bindings: interrupt-controller: Convert chrp,open-pic to DT schema Convert the Open PIC interrupt controller binding to schema format. While the Linux kernel supports the "open-pic" compatible, that's not used in any upstream .dts file. It used for "device_type" though. Add "fsl,mpic" compatible which was not documented. Link: https://lore.kernel.org/r/20250505144809.1291619-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/chrp,open-pic.yaml | 63 ++++++++++++++ .../bindings/interrupt-controller/open-pic.txt | 97 ---------------------- 2 files changed, 63 insertions(+), 97 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/chrp,open-pic.yaml delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/open-pic.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/chrp,open-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/chrp,open-pic.yaml new file mode 100644 index 000000000000..f0d9bbd7d510 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/chrp,open-pic.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/chrp,open-pic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Open PIC Interrupt Controller + +maintainers: + - Rob Herring + +description: + This binding specifies what properties must be available in the device tree + representation of an Open PIC compliant interrupt controller. This binding is + based on the binding defined for Open PIC in [1] and is a superset of that + binding. + +properties: + compatible: + oneOf: + - items: + - const: fsl,mpic + - const: chrp,open-pic + - const: chrp,open-pic + + device_type: + const: open-pci + deprecated: true + + reg: + maxItems: 1 + + interrupt-controller: true + + '#address-cells': + const: 0 + + '#interrupt-cells': + const: 2 + + pic-no-reset: + description: Indicates the PIC shall not be reset during runtime initialization. + type: boolean + +required: + - compatible + - reg + - interrupt-controller + - '#address-cells' + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + interrupt-controller@40000 { + compatible = "chrp,open-pic"; + reg = <0x40000 0x40000>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + pic-no-reset; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/open-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/open-pic.txt deleted file mode 100644 index ccbbfdc53c72..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/open-pic.txt +++ /dev/null @@ -1,97 +0,0 @@ -* Open PIC Binding - -This binding specifies what properties must be available in the device tree -representation of an Open PIC compliant interrupt controller. This binding is -based on the binding defined for Open PIC in [1] and is a superset of that -binding. - -Required properties: - - NOTE: Many of these descriptions were paraphrased here from [1] to aid - readability. - - - compatible: Specifies the compatibility list for the PIC. The type - shall be and the value shall include "open-pic". - - - reg: Specifies the base physical address(s) and size(s) of this - PIC's addressable register space. The type shall be . - - - interrupt-controller: The presence of this property identifies the node - as an Open PIC. No property value shall be defined. - - - #interrupt-cells: Specifies the number of cells needed to encode an - interrupt source. The type shall be a and the value shall be 2. - - - #address-cells: Specifies the number of cells needed to encode an - address. The type shall be and the value shall be 0. As such, - 'interrupt-map' nodes do not have to specify a parent unit address. - -Optional properties: - - - pic-no-reset: The presence of this property indicates that the PIC - shall not be reset during runtime initialization. No property value shall - be defined. The presence of this property also mandates that any - initialization related to interrupt sources shall be limited to sources - explicitly referenced in the device tree. - -* Interrupt Specifier Definition - - Interrupt specifiers consists of 2 cells encoded as - follows: - - - <1st-cell>: The interrupt-number that identifies the interrupt source. - - - <2nd-cell>: The level-sense information, encoded as follows: - 0 = low-to-high edge triggered - 1 = active low level-sensitive - 2 = active high level-sensitive - 3 = high-to-low edge triggered - -* Examples - -Example 1: - - /* - * An Open PIC interrupt controller - */ - mpic: pic@40000 { - // This is an interrupt controller node. - interrupt-controller; - - // No address cells so that 'interrupt-map' nodes which reference - // this Open PIC node do not need a parent address specifier. - #address-cells = <0>; - - // Two cells to encode interrupt sources. - #interrupt-cells = <2>; - - // Offset address of 0x40000 and size of 0x40000. - reg = <0x40000 0x40000>; - - // Compatible with Open PIC. - compatible = "open-pic"; - - // The PIC shall not be reset. - pic-no-reset; - }; - -Example 2: - - /* - * An interrupt generating device that is wired to an Open PIC. - */ - serial0: serial@4500 { - // Interrupt source '42' that is active high level-sensitive. - // Note that there are only two cells as specified in the interrupt - // parent's '#interrupt-cells' property. - interrupts = <42 2>; - - // The interrupt controller that this device is wired to. - interrupt-parent = <&mpic>; - }; - -* References - -[1] Devicetree Specification - (https://www.devicetree.org/specifications/) - -- cgit v1.2.3 From b1ae6881fbe3e86f74c2edb8c02681af6ab110b7 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:47:53 -0500 Subject: dt-bindings: interrupt-controller: Convert microchip,pic32mzda-evic to DT schema Convert the Microchip PIC32 interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250505144754.1291072-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/microchip,pic32-evic.txt | 67 ---------------------- .../microchip,pic32mzda-evic.yaml | 60 +++++++++++++++++++ 2 files changed, 60 insertions(+), 67 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/microchip,pic32-evic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/microchip,pic32mzda-evic.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32-evic.txt b/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32-evic.txt deleted file mode 100644 index c3a1b37c4c35..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32-evic.txt +++ /dev/null @@ -1,67 +0,0 @@ -Microchip PIC32 Interrupt Controller -==================================== - -The Microchip PIC32 contains an Enhanced Vectored Interrupt Controller (EVIC). -It handles all internal and external interrupts. This controller exists outside -of the CPU and is the arbitrator of all interrupts (including interrupts from -the CPU itself) before they are presented to the CPU. - -External interrupts have a software configurable edge polarity. Non external -interrupts have a type and polarity that is determined by the source of the -interrupt. - -Required properties -------------------- - -- compatible: Should be "microchip,pic32mzda-evic" -- reg: Specifies physical base address and size of register range. -- interrupt-controller: Identifies the node as an interrupt controller. -- #interrupt cells: Specifies the number of cells used to encode an interrupt - source connected to this controller. The value shall be 2 and interrupt - descriptor shall have the following format: - - - - hw_irq - represents the hardware interrupt number as in the data sheet. - irq_type - is used to describe the type and polarity of an interrupt. For - internal interrupts use IRQ_TYPE_EDGE_RISING for non persistent interrupts and - IRQ_TYPE_LEVEL_HIGH for persistent interrupts. For external interrupts use - IRQ_TYPE_EDGE_RISING or IRQ_TYPE_EDGE_FALLING to select the desired polarity. - -Optional properties -------------------- -- microchip,external-irqs: u32 array of external interrupts with software - polarity configuration. This array corresponds to the bits in the INTCON - SFR. - -Example -------- - -evic: interrupt-controller@1f810000 { - compatible = "microchip,pic32mzda-evic"; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x1f810000 0x1000>; - microchip,external-irqs = <3 8 13 18 23>; -}; - -Each device/peripheral must request its interrupt line with the associated type -and polarity. - -Internal interrupt DTS snippet ------------------------------- - -device@1f800000 { - ... - interrupts = <113 IRQ_TYPE_LEVEL_HIGH>; - ... -}; - -External interrupt DTS snippet ------------------------------- - -device@1f800000 { - ... - interrupts = <3 IRQ_TYPE_EDGE_RISING>; - ... -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32mzda-evic.yaml b/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32mzda-evic.yaml new file mode 100644 index 000000000000..74bfc42693f0 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32mzda-evic.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/microchip,pic32mzda-evic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip PIC32 EVIC Interrupt Controller + +maintainers: + - Cristian Birsan + +description: > + The Microchip PIC32 contains an Enhanced Vectored Interrupt Controller (EVIC). + It handles all internal and external interrupts. This controller exists + outside of the CPU and is the arbitrator of all interrupts (including + interrupts from the CPU itself) before they are presented to the CPU. + + External interrupts have a software configurable edge polarity. Non external + interrupts have a type and polarity that is determined by the source of the + interrupt. + +properties: + compatible: + items: + - const: microchip,pic32mzda-evic + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + interrupts: + maxItems: 1 + + microchip,external-irqs: + description: + External interrupts with software polarity configuration corresponding to + the INTCON SFR bits. + $ref: /schemas/types.yaml#/definitions/uint32-array + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + interrupt-controller@1f810000 { + compatible = "microchip,pic32mzda-evic"; + reg = <0x1f810000 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + microchip,external-irqs = <3 8 13 18 23>; + }; -- cgit v1.2.3 From fe972dd46a7ea89e2e9b27cca3286439ec30d8e8 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:45:33 -0500 Subject: dt-bindings: interrupt-controller: Convert abilis,tb10x-ictl to DT schema Convert the Abilis TB10x interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144534.1286092-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/abilis,tb10x-ictl.txt | 37 --------------- .../interrupt-controller/abilis,tb10x-ictl.yaml | 54 ++++++++++++++++++++++ 2 files changed, 54 insertions(+), 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.txt b/Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.txt deleted file mode 100644 index 5a4dd263fc12..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.txt +++ /dev/null @@ -1,37 +0,0 @@ -TB10x Top Level Interrupt Controller -==================================== - -The Abilis TB10x SOC contains a custom interrupt controller. It performs -one-to-one mapping of external interrupt sources to CPU interrupts and -provides support for reconfigurable trigger modes. - -Required properties -------------------- - -- compatible: Should be "abilis,tb10x-ictl" -- reg: specifies physical base address and size of register range. -- interrupt-congroller: Identifies the node as an interrupt controller. -- #interrupt cells: Specifies the number of cells used to encode an interrupt - source connected to this controller. The value shall be 2. -- interrupts: Specifies the list of interrupt lines which are handled by - the interrupt controller in the parent controller's notation. Interrupts - are mapped one-to-one to parent interrupts. - -Example -------- - -intc: interrupt-controller { /* Parent interrupt controller */ - interrupt-controller; - #interrupt-cells = <1>; /* For example below */ - /* ... */ -}; - -tb10x_ictl: pic@2000 { /* TB10x interrupt controller */ - compatible = "abilis,tb10x-ictl"; - reg = <0x2000 0x20>; - interrupt-controller; - #interrupt-cells = <2>; - interrupt-parent = <&intc>; - interrupts = <5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 - 20 21 22 23 24 25 26 27 28 29 30 31>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.yaml b/Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.yaml new file mode 100644 index 000000000000..cd2c49670e7b --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/abilis,tb10x-ictl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TB10x Top Level Interrupt Controller + +maintainers: + - Christian Ruppert + +description: + The Abilis TB10x SOC contains a custom interrupt controller. It performs + one-to-one mapping of external interrupt sources to CPU interrupts and + provides support for reconfigurable trigger modes. + +properties: + compatible: + const: abilis,tb10x-ictl + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + interrupts: + description: A one-to-one mapping of external interrupt sources to parent + interrupts. + minItems: 1 + maxItems: 32 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - interrupts + +additionalProperties: false + +examples: + - | + interrupt-controller@2000 { + compatible = "abilis,tb10x-ictl"; + reg = <0x2000 0x20>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <5>, <6>, <7>, <8>, <9>, <10>, <11>, <12>, <13>, <14>, + <15>, <16>, <17>, <18>, <19>, <20>, <21>, <22>, <23>, + <24>, <25>, <26>, <27>, <28>, <29>, <30>, <31>; + }; -- cgit v1.2.3 From a22fb93c49afc3c3ca37ccebfd6847bb68cba244 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:45:42 -0500 Subject: dt-bindings: interrupt-controller: Convert al,alpine-msix to DT schema Convert the Amazaon Alpine MSIX controller binding to schema format. Drop the interrupt-controller property as the MSIX controller doesn't provide interrupts. The interrupt-parent property is required in this case for custom MSI mapping properties. Link: https://lore.kernel.org/r/20250505144543.1286351-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/al,alpine-msix.txt | 25 ----------- .../interrupt-controller/al,alpine-msix.yaml | 49 ++++++++++++++++++++++ 2 files changed, 49 insertions(+), 25 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.txt b/Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.txt deleted file mode 100644 index 5669764f9cc9..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.txt +++ /dev/null @@ -1,25 +0,0 @@ -Alpine MSIX controller - -See arm,gic-v3.txt for SPI and MSI definitions. - -Required properties: - -- compatible: should be "al,alpine-msix" -- reg: physical base address and size of the registers -- interrupt-controller: identifies the node as an interrupt controller -- msi-controller: identifies the node as an PCI Message Signaled Interrupt - controller -- al,msi-base-spi: SPI base of the MSI frame -- al,msi-num-spis: number of SPIs assigned to the MSI frame, relative to SPI0 - -Example: - -msix: msix { - compatible = "al,alpine-msix"; - reg = <0x0 0xfbe00000 0x0 0x100000>; - interrupt-parent = <&gic>; - interrupt-controller; - msi-controller; - al,msi-base-spi = <160>; - al,msi-num-spis = <160>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.yaml b/Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.yaml new file mode 100644 index 000000000000..9f1ff8ec686f --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/al,alpine-msix.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Alpine MSIX controller + +maintainers: + - Antoine Tenart + +properties: + compatible: + const: al,alpine-msix + + reg: + maxItems: 1 + + interrupt-parent: true + + msi-controller: true + + al,msi-base-spi: + description: SPI base of the MSI frame + $ref: /schemas/types.yaml#/definitions/uint32 + + al,msi-num-spis: + description: number of SPIs assigned to the MSI frame, relative to SPI0 + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - compatible + - reg + - msi-controller + - al,msi-base-spi + - al,msi-num-spis + +additionalProperties: false + +examples: + - | + msi-controller@fbe00000 { + compatible = "al,alpine-msix"; + reg = <0xfbe00000 0x100000>; + interrupt-parent = <&gic>; + msi-controller; + al,msi-base-spi = <160>; + al,msi-num-spis = <160>; + }; -- cgit v1.2.3 From 30eb852aabff590cd3b1d5cb089b2e4341d05679 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:45:47 -0500 Subject: dt-bindings: interrupt-controller: Convert amazon,al-fic to DT schema Convert the Amazon FIC interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144548.1286525-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/amazon,al-fic.txt | 27 ------------- .../interrupt-controller/amazon,al-fic.yaml | 46 ++++++++++++++++++++++ 2 files changed, 46 insertions(+), 27 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.txt b/Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.txt deleted file mode 100644 index c676b03c752e..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.txt +++ /dev/null @@ -1,27 +0,0 @@ -Amazon's Annapurna Labs Fabric Interrupt Controller - -Required properties: - -- compatible: should be "amazon,al-fic" -- reg: physical base address and size of the registers -- interrupt-controller: identifies the node as an interrupt controller -- #interrupt-cells : must be 2. Specifies the number of cells needed to encode - an interrupt source. Supported trigger types are low-to-high edge - triggered and active high level-sensitive. -- interrupts: describes which input line in the interrupt parent, this - fic's output is connected to. This field property depends on the parent's - binding - -Please refer to interrupts.txt in this directory for details of the common -Interrupt Controllers bindings used by client devices. - -Example: - -amazon_fic: interrupt-controller@fd8a8500 { - compatible = "amazon,al-fic"; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x0 0xfd8a8500 0x0 0x1000>; - interrupt-parent = <&gic>; - interrupts = ; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.yaml b/Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.yaml new file mode 100644 index 000000000000..26bc05dee0bc --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/amazon,al-fic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amazon Annapurna Labs Fabric Interrupt Controller + +maintainers: + - Talel Shenhar + +properties: + compatible: + const: amazon,al-fic + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - interrupts + +additionalProperties: false + +examples: + - | + #include + + interrupt-controller@fd8a8500 { + compatible = "amazon,al-fic"; + reg = <0xfd8a8500 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; -- cgit v1.2.3 From 930222f3d1a19c4200c6afd867eb9cd984855531 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:45:52 -0500 Subject: dt-bindings: interrupt-controller: Convert arm,nvic to DT schema Convert the Arm NVIC interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144553.1286730-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/interrupt-controller/arm,nvic.txt | 36 ------------- .../bindings/interrupt-controller/arm,nvic.yaml | 61 ++++++++++++++++++++++ 2 files changed, 61 insertions(+), 36 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/arm,nvic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/arm,nvic.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,nvic.txt b/Documentation/devicetree/bindings/interrupt-controller/arm,nvic.txt deleted file mode 100644 index 386ab37a383f..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,nvic.txt +++ /dev/null @@ -1,36 +0,0 @@ -* ARM Nested Vector Interrupt Controller (NVIC) - -The NVIC provides an interrupt controller that is tightly coupled to -Cortex-M based processor cores. The NVIC implemented on different SoCs -vary in the number of interrupts and priority bits per interrupt. - -Main node required properties: - -- compatible : should be one of: - "arm,v6m-nvic" - "arm,v7m-nvic" - "arm,v8m-nvic" -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The type shall be a and the value shall be 2. - - The 1st cell contains the interrupt number for the interrupt type. - - The 2nd cell is the priority of the interrupt. - -- reg : Specifies base physical address(s) and size of the NVIC registers. - This is at a fixed address (0xe000e100) and size (0xc00). - -- arm,num-irq-priority-bits: The number of priority bits implemented by the - given SoC - -Example: - - intc: interrupt-controller@e000e100 { - compatible = "arm,v7m-nvic"; - #interrupt-cells = <2>; - #address-cells = <1>; - interrupt-controller; - reg = <0xe000e100 0xc00>; - arm,num-irq-priority-bits = <4>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,nvic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,nvic.yaml new file mode 100644 index 000000000000..d89eca956c5f --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,nvic.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/arm,nvic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Nested Vector Interrupt Controller (NVIC) + +maintainers: + - Rob Herring + +description: + The NVIC provides an interrupt controller that is tightly coupled to Cortex-M + based processor cores. The NVIC implemented on different SoCs vary in the + number of interrupts and priority bits per interrupt. + +properties: + compatible: + enum: + - arm,v6m-nvic + - arm,v7m-nvic + - arm,v8m-nvic + + reg: + maxItems: 1 + + '#address-cells': + const: 0 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + description: | + Number of cells to encode an interrupt source: + first = interrupt number, second = priority. + + arm,num-irq-priority-bits: + description: Number of priority bits implemented by the SoC + minimum: 1 + maximum: 8 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - arm,num-irq-priority-bits + +additionalProperties: false + +examples: + - | + interrupt-controller@e000e100 { + compatible = "arm,v7m-nvic"; + #interrupt-cells = <2>; + #address-cells = <0>; + interrupt-controller; + reg = <0xe000e100 0xc00>; + arm,num-irq-priority-bits = <4>; + }; -- cgit v1.2.3 From 928504c54d09a84aec40f7a1864356c6ae51c75c Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:46:21 -0500 Subject: dt-bindings: interrupt-controller: Convert brcm,bcm6345-l1-intc to DT schema Convert the Broadcom BCM6345 interrupt controller binding to schema format. The old schema indicated SoC specific compatibles should be present, but there are none in use. So drop them. The most number of CPUs on any platform seems to be 2, so document that as the maximum. Link: https://lore.kernel.org/r/20250505144622.1287712-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/brcm,bcm6345-l1-intc.txt | 55 --------------- .../interrupt-controller/brcm,bcm6345-l1-intc.yaml | 81 ++++++++++++++++++++++ 2 files changed, 81 insertions(+), 55 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.txt deleted file mode 100644 index 2bc19b1ac877..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.txt +++ /dev/null @@ -1,55 +0,0 @@ -Broadcom BCM6345-style Level 1 interrupt controller - -This block is a first level interrupt controller that is typically connected -directly to one of the HW INT lines on each CPU. - -Key elements of the hardware design include: - -- 32, 64 or 128 incoming level IRQ lines - -- Most onchip peripherals are wired directly to an L1 input - -- A separate instance of the register set for each CPU, allowing individual - peripheral IRQs to be routed to any CPU - -- Contains one or more enable/status word pairs per CPU - -- No atomic set/clear operations - -- No polarity/level/edge settings - -- No FIFO or priority encoder logic; software is expected to read all - 2-4 status words to determine which IRQs are pending - -Required properties: - -- compatible: should be "brcm,bcm-l1-intc", "brcm,bcm6345-l1-intc" -- reg: specifies the base physical address and size of the registers; - the number of supported IRQs is inferred from the size argument -- interrupt-controller: identifies the node as an interrupt controller -- #interrupt-cells: specifies the number of cells needed to encode an interrupt - source, should be 1. -- interrupts: specifies the interrupt line(s) in the interrupt-parent controller - node; valid values depend on the type of parent interrupt controller - -If multiple reg ranges and interrupt-parent entries are present on an SMP -system, the driver will allow IRQ SMP affinity to be set up through the -/proc/irq/ interface. In the simplest possible configuration, only one -reg range and one interrupt-parent is needed. - -The driver operates in native CPU endian by default, there is no support for -specifying an alternative endianness. - -Example: - -periph_intc: interrupt-controller@10000000 { - compatible = "brcm,bcm63168-l1-intc", "brcm,bcm6345-l1-intc"; - reg = <0x10000020 0x20>, - <0x10000040 0x20>; - - interrupt-controller; - #interrupt-cells = <1>; - - interrupt-parent = <&cpu_intc>; - interrupts = <2>, <3>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.yaml new file mode 100644 index 000000000000..ca6a2ff43acd --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm6345-l1-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM6345-style Level 1 interrupt controller + +maintainers: + - Simon Arlott + +description: > + This block is a first level interrupt controller that is typically connected + directly to one of the HW INT lines on each CPU. + + Key elements of the hardware design include: + + - 32, 64 or 128 incoming level IRQ lines + + - Most onchip peripherals are wired directly to an L1 input + + - A separate instance of the register set for each CPU, allowing individual + peripheral IRQs to be routed to any CPU + + - Contains one or more enable/status word pairs per CPU + + - No atomic set/clear operations + + - No polarity/level/edge settings + + - No FIFO or priority encoder logic; software is expected to read all + 2-4 status words to determine which IRQs are pending + + If multiple reg ranges and interrupt-parent entries are present on an SMP + system, the driver will allow IRQ SMP affinity to be set up through the + /proc/irq/ interface. In the simplest possible configuration, only one + reg range and one interrupt-parent is needed. + + The driver operates in native CPU endian by default, there is no support for + specifying an alternative endianness. + +properties: + compatible: + const: brcm,bcm6345-l1-intc + + reg: + description: One entry per CPU core + minItems: 1 + maxItems: 2 + + interrupt-controller: true + + "#interrupt-cells": + const: 1 + + interrupts: + description: One entry per CPU core + minItems: 1 + maxItems: 2 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - interrupts + +additionalProperties: false + +examples: + - | + interrupt-controller@10000000 { + compatible = "brcm,bcm6345-l1-intc"; + reg = <0x10000020 0x20>, + <0x10000040 0x20>; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupts = <2>, <3>; + }; -- cgit v1.2.3 From 3cbc6d0702375b2b961fe157d2125c0bd2acd4f3 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:46:30 -0500 Subject: dt-bindings: interrupt-controller: Convert cirrus,ep7209-intc to DT schema Convert the Cirrus EP7209 interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144631.1288086-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/cirrus,clps711x-intc.txt | 41 ------------- .../interrupt-controller/cirrus,ep7209-intc.yaml | 71 ++++++++++++++++++++++ 2 files changed, 71 insertions(+), 41 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/cirrus,clps711x-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/cirrus,ep7209-intc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/cirrus,clps711x-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/cirrus,clps711x-intc.txt deleted file mode 100644 index 969b4582ec60..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/cirrus,clps711x-intc.txt +++ /dev/null @@ -1,41 +0,0 @@ -Cirrus Logic CLPS711X Interrupt Controller - -Required properties: - -- compatible: Should be "cirrus,ep7209-intc". -- reg: Specifies base physical address of the registers set. -- interrupt-controller: Identifies the node as an interrupt controller. -- #interrupt-cells: Specifies the number of cells needed to encode an - interrupt source. The value shall be 1. - -The interrupt sources are as follows: -ID Name Description ---------------------------- -1: BLINT Battery low (FIQ) -3: MCINT Media changed (FIQ) -4: CSINT CODEC sound -5: EINT1 External 1 -6: EINT2 External 2 -7: EINT3 External 3 -8: TC1OI TC1 under flow -9: TC2OI TC2 under flow -10: RTCMI RTC compare match -11: TINT 64Hz tick -12: UTXINT1 UART1 transmit FIFO half empty -13: URXINT1 UART1 receive FIFO half full -14: UMSINT UART1 modem status changed -15: SSEOTI SSI1 end of transfer -16: KBDINT Keyboard -17: SS2RX SSI2 receive FIFO half or greater full -18: SS2TX SSI2 transmit FIFO less than half empty -28: UTXINT2 UART2 transmit FIFO half empty -29: URXINT2 UART2 receive FIFO half full -32: DAIINT DAI interface (FIQ) - -Example: - intc: interrupt-controller { - compatible = "cirrus,ep7312-intc", "cirrus,ep7209-intc"; - reg = <0x80000000 0x4000>; - interrupt-controller; - #interrupt-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/cirrus,ep7209-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/cirrus,ep7209-intc.yaml new file mode 100644 index 000000000000..d3cc49d29e10 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/cirrus,ep7209-intc.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/cirrus,ep7209-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cirrus Logic CLPS711X Interrupt Controller + +maintainers: + - Alexander Shiyan + +description: > + Cirrus Logic CLPS711X Interrupt Controller + + The interrupt sources are as follows: + ID Name Description + --------------------------- + 1: BLINT Battery low (FIQ) + 3: MCINT Media changed (FIQ) + 4: CSINT CODEC sound + 5: EINT1 External 1 + 6: EINT2 External 2 + 7: EINT3 External 3 + 8: TC1OI TC1 under flow + 9: TC2OI TC2 under flow + 10: RTCMI RTC compare match + 11: TINT 64Hz tick + 12: UTXINT1 UART1 transmit FIFO half empty + 13: URXINT1 UART1 receive FIFO half full + 14: UMSINT UART1 modem status changed + 15: SSEOTI SSI1 end of transfer + 16: KBDINT Keyboard + 17: SS2RX SSI2 receive FIFO half or greater full + 18: SS2TX SSI2 transmit FIFO less than half empty + 28: UTXINT2 UART2 transmit FIFO half empty + 29: URXINT2 UART2 receive FIFO half full + 32: DAIINT DAI interface (FIQ) + +properties: + compatible: + oneOf: + - items: + - const: cirrus,ep7312-intc + - const: cirrus,ep7209-intc + - items: + - const: cirrus,ep7209-intc + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + interrupt-controller@80000000 { + compatible = "cirrus,ep7312-intc", "cirrus,ep7209-intc"; + reg = <0x80000000 0x4000>; + interrupt-controller; + #interrupt-cells = <1>; + }; -- cgit v1.2.3 From 9a4d3926ea13df5a2e5d0d887a51bf408d854fa4 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:46:35 -0500 Subject: dt-bindings: interrupt-controller: Convert csky,apb-intc to DT schema Convert the C-SKY APB interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144636.1288261-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/csky,apb-intc.txt | 62 ---------------------- .../interrupt-controller/csky,apb-intc.yaml | 54 +++++++++++++++++++ 2 files changed, 54 insertions(+), 62 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt deleted file mode 100644 index 44286dcbac62..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt +++ /dev/null @@ -1,62 +0,0 @@ -============================== -C-SKY APB Interrupt Controller -============================== - -C-SKY APB Interrupt Controller is a simple soc interrupt controller -on the apb bus and we only use it as root irq controller. - - - csky,apb-intc is used in a lot of csky fpgas and socs, it support 64 irq nums. - - csky,dual-apb-intc consists of 2 apb-intc and 128 irq nums supported. - - csky,gx6605s-intc is gx6605s soc internal irq interrupt controller, 64 irq nums. - -============================= -intc node bindings definition -============================= - - Description: Describes APB interrupt controller - - PROPERTIES - - - compatible - Usage: required - Value type: - Definition: must be "csky,apb-intc" - "csky,dual-apb-intc" - "csky,gx6605s-intc" - - #interrupt-cells - Usage: required - Value type: - Definition: must be <1> - - reg - Usage: required - Value type: - Definition: in soc from cpu view - - interrupt-controller: - Usage: required - - csky,support-pulse-signal: - Usage: select - Description: to support pulse signal flag - -Examples: ---------- - - intc: interrupt-controller@500000 { - compatible = "csky,apb-intc"; - #interrupt-cells = <1>; - reg = <0x00500000 0x400>; - interrupt-controller; - }; - - intc: interrupt-controller@500000 { - compatible = "csky,dual-apb-intc"; - #interrupt-cells = <1>; - reg = <0x00500000 0x400>; - interrupt-controller; - }; - - intc: interrupt-controller@500000 { - compatible = "csky,gx6605s-intc"; - #interrupt-cells = <1>; - reg = <0x00500000 0x400>; - interrupt-controller; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.yaml new file mode 100644 index 000000000000..902648ead975 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/csky,apb-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: C-SKY APB Interrupt Controller + +maintainers: + - Guo Ren + +description: > + C-SKY APB Interrupt Controller is a simple soc interrupt controller on the apb + bus and we only use it as root irq controller. + + - csky,apb-intc is used in a lot of csky fpgas and socs, it support 64 irq nums. + - csky,dual-apb-intc consists of 2 apb-intc and 128 irq nums supported. + - csky,gx6605s-intc is gx6605s soc internal irq interrupt controller, 64 irq nums. + +properties: + compatible: + enum: + - csky,apb-intc + - csky,dual-apb-intc + - csky,gx6605s-intc + + reg: + maxItems: 1 + + '#interrupt-cells': + const: 1 + + interrupt-controller: true + + csky,support-pulse-signal: + type: boolean + description: Support for pulse signal flag. + +additionalProperties: false + +required: + - compatible + - reg + - '#interrupt-cells' + - interrupt-controller + +examples: + - | + intc: interrupt-controller@500000 { + compatible = "csky,apb-intc"; + #interrupt-cells = <1>; + reg = <0x00500000 0x400>; + interrupt-controller; + }; -- cgit v1.2.3 From 1e7ed4dc22d30e842c61abcb591685221c9f28d7 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:46:39 -0500 Subject: dt-bindings: interrupt-controller: Convert csky,mpintc to DT schema Convert the C-SKY Multi-processor interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144640.1288458-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/interrupt-controller/csky,mpintc.txt | 52 ---------------------- .../bindings/interrupt-controller/csky,mpintc.yaml | 43 ++++++++++++++++++ 2 files changed, 43 insertions(+), 52 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt b/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt deleted file mode 100644 index e6bbcae4d07f..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt +++ /dev/null @@ -1,52 +0,0 @@ -=========================================== -C-SKY Multi-processors Interrupt Controller -=========================================== - -C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860 -SMP soc, and it also could be used in non-SMP system. - -Interrupt number definition: - 0-15 : software irq, and we use 15 as our IPI_IRQ. - 16-31 : private irq, and we use 16 as the co-processor timer. - 31-1024: common irq for soc ip. - -Interrupt trigger mode: (Defined in dt-bindings/interrupt-controller/irq.h) - IRQ_TYPE_LEVEL_HIGH (default) - IRQ_TYPE_LEVEL_LOW - IRQ_TYPE_EDGE_RISING - IRQ_TYPE_EDGE_FALLING - -============================= -intc node bindings definition -============================= - - Description: Describes SMP interrupt controller - - PROPERTIES - - - compatible - Usage: required - Value type: - Definition: must be "csky,mpintc" - - #interrupt-cells - Usage: required - Value type: - Definition: <2> - - interrupt-controller: - Usage: required - -Examples: ("interrupts = ") ---------- -#include - - intc: interrupt-controller { - compatible = "csky,mpintc"; - #interrupt-cells = <2>; - interrupt-controller; - }; - - device: device-example { - ... - interrupts = <34 IRQ_TYPE_EDGE_RISING>; - interrupt-parent = <&intc>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.yaml b/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.yaml new file mode 100644 index 000000000000..3df7739e31c4 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/csky,mpintc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: C-SKY Multi-processors Interrupt Controller + +maintainers: + - Guo Ren + +description: > + C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860 + SMP soc, and it also could be used in non-SMP system. + + Interrupt number definition: + 0-15 : software irq, and we use 15 as our IPI_IRQ. + 16-31 : private irq, and we use 16 as the co-processor timer. + 31-1024: common irq for soc ip. + +properties: + compatible: + const: csky,mpintc + + '#interrupt-cells': + const: 2 + + interrupt-controller: true + +required: + - compatible + - "#interrupt-cells" + - interrupt-controller + +additionalProperties: false + +examples: + - | + interrupt-controller { + compatible = "csky,mpintc"; + #interrupt-cells = <2>; + interrupt-controller; + }; -- cgit v1.2.3 From a911481b448a80f67adbf716625c91d2ab687e82 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:46:48 -0500 Subject: dt-bindings: interrupt-controller: Convert ezchip,nps400-ic to DT schema Convert the EZchip NPS interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144649.1288786-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/ezchip,nps400-ic.txt | 17 ----------- .../interrupt-controller/ezchip,nps400-ic.yaml | 34 ++++++++++++++++++++++ 2 files changed, 34 insertions(+), 17 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.txt deleted file mode 100644 index 888b2b9f7064..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.txt +++ /dev/null @@ -1,17 +0,0 @@ -EZchip NPS Interrupt Controller - -Required properties: - -- compatible : should be "ezchip,nps400-ic" -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value shall be 1. - - -Example: - -intc: interrupt-controller { - compatible = "ezchip,nps400-ic"; - interrupt-controller; - #interrupt-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.yaml new file mode 100644 index 000000000000..589c6ebf6c1a --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.yaml @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ezchip,nps400-ic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: EZchip NPS Interrupt Controller + +maintainers: + - Noam Camus + +properties: + compatible: + const: ezchip,nps400-ic + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + +required: + - compatible + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + interrupt-controller { + compatible = "ezchip,nps400-ic"; + interrupt-controller; + #interrupt-cells = <1>; + }; -- cgit v1.2.3 From ee35e2ae49550c612c8d0ff2d0d789bd61c5857c Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:46:57 -0500 Subject: dt-bindings: interrupt-controller: Convert google,goldfish-pic to DT schema Convert the Google Goldfish PIC interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144658.1289158-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/google,goldfish-pic.txt | 30 -------------- .../interrupt-controller/google,goldfish-pic.yaml | 47 ++++++++++++++++++++++ 2 files changed, 47 insertions(+), 30 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt deleted file mode 100644 index 35f752706e7d..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt +++ /dev/null @@ -1,30 +0,0 @@ -Android Goldfish PIC - -Android Goldfish programmable interrupt device used by Android -emulator. - -Required properties: - -- compatible : should contain "google,goldfish-pic" -- reg : -- interrupts : - -Example for mips when used in cascade mode: - - cpuintc { - #interrupt-cells = <0x1>; - #address-cells = <0>; - interrupt-controller; - compatible = "mti,cpu-interrupt-controller"; - }; - - interrupt-controller@1f000000 { - compatible = "google,goldfish-pic"; - reg = <0x1f000000 0x1000>; - - interrupt-controller; - #interrupt-cells = <0x1>; - - interrupt-parent = <&cpuintc>; - interrupts = <0x2>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.yaml new file mode 100644 index 000000000000..ac3c3c3ca186 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/google,goldfish-pic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Android Goldfish PIC + +maintainers: + - Miodrag Dinic + +description: + Android Goldfish programmable interrupt device used by Android emulator. + +properties: + compatible: + const: google,goldfish-pic + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + +examples: + - | + interrupt-controller@1f000000 { + compatible = "google,goldfish-pic"; + reg = <0x1f000000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + interrupts = <2>; + }; + +additionalProperties: false -- cgit v1.2.3 From eb4d5a8296addb96c37a75074c7576122a6cb471 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:47:01 -0500 Subject: dt-bindings: interrupt-controller: Convert img,pdc-intc to DT schema Convert the ImgTec Powerdown Controller (PDC) interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144703.1289335-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/interrupt-controller/img,pdc-intc.txt | 105 --------------------- .../interrupt-controller/img,pdc-intc.yaml | 79 ++++++++++++++++ 2 files changed, 79 insertions(+), 105 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.txt deleted file mode 100644 index 5dc2a55ad811..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.txt +++ /dev/null @@ -1,105 +0,0 @@ -* ImgTec Powerdown Controller (PDC) Interrupt Controller Binding - -This binding specifies what properties must be available in the device tree -representation of a PDC IRQ controller. This has a number of input interrupt -lines which can wake the system, and are passed on through output interrupt -lines. - -Required properties: - - - compatible: Specifies the compatibility list for the interrupt controller. - The type shall be and the value shall include "img,pdc-intc". - - - reg: Specifies the base PDC physical address(s) and size(s) of the - addressable register space. The type shall be . - - - interrupt-controller: The presence of this property identifies the node - as an interrupt controller. No property value shall be defined. - - - #interrupt-cells: Specifies the number of cells needed to encode an - interrupt source. The type shall be a and the value shall be 2. - - - num-perips: Number of waking peripherals. - - - num-syswakes: Number of SysWake inputs. - - - interrupts: List of interrupt specifiers. The first specifier shall be the - shared SysWake interrupt, and remaining specifies shall be PDC peripheral - interrupts in order. - -* Interrupt Specifier Definition - - Interrupt specifiers consists of 2 cells encoded as follows: - - - <1st-cell>: The interrupt-number that identifies the interrupt source. - 0-7: Peripheral interrupts - 8-15: SysWake interrupts - - - <2nd-cell>: The level-sense information, encoded using the Linux interrupt - flags as follows (only 4 valid for peripheral interrupts): - 0 = none (decided by software) - 1 = low-to-high edge triggered - 2 = high-to-low edge triggered - 3 = both edge triggered - 4 = active-high level-sensitive (required for perip irqs) - 8 = active-low level-sensitive - -* Examples - -Example 1: - - /* - * TZ1090 PDC block - */ - pdc: pdc@02006000 { - // This is an interrupt controller node. - interrupt-controller; - - // Three cells to encode interrupt sources. - #interrupt-cells = <2>; - - // Offset address of 0x02006000 and size of 0x1000. - reg = <0x02006000 0x1000>; - - // Compatible with Meta hardware trigger block. - compatible = "img,pdc-intc"; - - // Three peripherals are connected. - num-perips = <3>; - - // Four SysWakes are connected. - num-syswakes = <4>; - - interrupts = <18 4 /* level */>, /* Syswakes */ - <30 4 /* level */>, /* Peripheral 0 (RTC) */ - <29 4 /* level */>, /* Peripheral 1 (IR) */ - <31 4 /* level */>; /* Peripheral 2 (WDT) */ - }; - -Example 2: - - /* - * An SoC peripheral that is wired through the PDC. - */ - rtc0 { - // The interrupt controller that this device is wired to. - interrupt-parent = <&pdc>; - - // Interrupt source Peripheral 0 - interrupts = <0 /* Peripheral 0 (RTC) */ - 4> /* IRQ_TYPE_LEVEL_HIGH */ - }; - -Example 3: - - /* - * An interrupt generating device that is wired to a SysWake pin. - */ - touchscreen0 { - // The interrupt controller that this device is wired to. - interrupt-parent = <&pdc>; - - // Interrupt source SysWake 0 that is active-low level-sensitive - interrupts = <8 /* SysWake0 */ - 8 /* IRQ_TYPE_LEVEL_LOW */>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.yaml new file mode 100644 index 000000000000..99e7a4281595 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/img,pdc-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ImgTec Powerdown Controller (PDC) Interrupt Controller + +maintainers: + - James Hogan + +description: + ImgTec Powerdown Controller (PDC) Interrupt Controller has a number of input + interrupt lines which can wake the system, and are passed on through output + interrupt lines. + +properties: + compatible: + const: img,pdc-intc + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + description: > + <1st-cell>: The interrupt-number that identifies the interrupt source. + 0-7: Peripheral interrupts + 8-15: SysWake interrupts + + <2nd-cell>: The level-sense information, encoded using the Linux interrupt + flags as follows (only 4 valid for peripheral interrupts): + 0 = none (decided by software) + 1 = low-to-high edge triggered + 2 = high-to-low edge triggered + 3 = both edge triggered + 4 = active-high level-sensitive (required for perip irqs) + 8 = active-low level-sensitive + const: 2 + + num-perips: + description: Number of waking peripherals + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 8 + + num-syswakes: + description: Number of SysWake inputs + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 8 + + interrupts: + description: + First entry is syswake IRQ. Subsequent entries are 1 per peripheral. + minItems: 2 + maxItems: 9 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - num-perips + - num-syswakes + - interrupts + +additionalProperties: false + +examples: + - | + interrupt-controller@2006000 { + compatible = "img,pdc-intc"; + reg = <0x02006000 0x1000>; + interrupts = <18 4>, <30 4>, <29 4>, <31 4>; + interrupt-controller; + #interrupt-cells = <2>; + num-perips = <3>; + num-syswakes = <4>; + }; -- cgit v1.2.3 From 50175534158ea94dd78a68d58072a1a8ea2587db Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:47:05 -0500 Subject: dt-bindings: interrupt-controller: Convert jcore,aic to DT schema Convert the J-Core advanced interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144707.1289503-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../bindings/interrupt-controller/jcore,aic.txt | 26 ------------- .../bindings/interrupt-controller/jcore,aic.yaml | 43 ++++++++++++++++++++++ 2 files changed, 43 insertions(+), 26 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/jcore,aic.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt b/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt deleted file mode 100644 index ee2ad36f8df8..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt +++ /dev/null @@ -1,26 +0,0 @@ -J-Core Advanced Interrupt Controller - -Required properties: - -- compatible: Should be "jcore,aic1" for the (obsolete) first-generation aic - with 8 interrupt lines with programmable priorities, or "jcore,aic2" for - the "aic2" core with 64 interrupts. - -- reg: Memory region(s) for configuration. For SMP, there should be one - region per cpu, indexed by the sequential, zero-based hardware cpu - number. - -- interrupt-controller: Identifies the node as an interrupt controller - -- #interrupt-cells: Specifies the number of cells needed to encode an - interrupt source. The value shall be 1. - - -Example: - -aic: interrupt-controller@200 { - compatible = "jcore,aic2"; - reg = < 0x200 0x30 0x500 0x30 >; - interrupt-controller; - #interrupt-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.yaml new file mode 100644 index 000000000000..df8abc24591c --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2018 Linaro Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/jcore,aic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: J-Core Advanced Interrupt Controller + +maintainers: + - Rich Felker + +properties: + compatible: + enum: + - jcore,aic1 + - jcore,aic2 + + reg: + description: Memory region(s) for configuration. For SMP, there should be one + region per CPU, indexed by the sequential, zero-based hardware CPU number. + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + aic: interrupt-controller@200 { + compatible = "jcore,aic2"; + reg = <0x200 0x30>, <0x500 0x30>; + interrupt-controller; + #interrupt-cells = <1>; + }; -- cgit v1.2.3 From 4f879955f7c5bf1c9a4971fff779732c60bffb7e Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:47:10 -0500 Subject: dt-bindings: interrupt-controller: Convert lsi,zevio-intc to DT schema Convert the TI-NSPIRE interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. '#interrupt-cells' was missing from the property list, but used in the example, so add it. Link: https://lore.kernel.org/r/20250505144711.1289677-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/lsi,zevio-intc.txt | 18 --------- .../interrupt-controller/lsi,zevio-intc.yaml | 43 ++++++++++++++++++++++ 2 files changed, 43 insertions(+), 18 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/lsi,zevio-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/lsi,zevio-intc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/lsi,zevio-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/lsi,zevio-intc.txt deleted file mode 100644 index aee38e7c13e7..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/lsi,zevio-intc.txt +++ /dev/null @@ -1,18 +0,0 @@ -TI-NSPIRE interrupt controller - -Required properties: -- compatible: Compatible property value should be "lsi,zevio-intc". - -- reg: Physical base address of the controller and length of memory mapped - region. - -- interrupt-controller : Identifies the node as an interrupt controller - -Example: - -interrupt-controller { - compatible = "lsi,zevio-intc"; - interrupt-controller; - reg = <0xDC000000 0x1000>; - #interrupt-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/lsi,zevio-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/lsi,zevio-intc.yaml new file mode 100644 index 000000000000..e66b25f579c3 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/lsi,zevio-intc.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2025 Daniel Tang +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/lsi,zevio-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI-NSPIRE Interrupt Controller + +maintainers: + - Daniel Tang + +description: | + TI-NSPIRE interrupt controller + +properties: + compatible: + const: lsi,zevio-intc + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + interrupt-controller@dc000000 { + compatible = "lsi,zevio-intc"; + interrupt-controller; + reg = <0xdc000000 0x1000>; + #interrupt-cells = <1>; + }; -- cgit v1.2.3 From f7c17ceb9b9b8dfc361a1c958032069a9644f848 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:47:14 -0500 Subject: dt-bindings: interrupt-controller: Convert marvell,armada-8k-pic to DT schema Convert the Marvell 7K/8K PIC interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144715.1289866-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/marvell,armada-8k-pic.txt | 25 ----------- .../marvell,armada-8k-pic.yaml | 52 ++++++++++++++++++++++ 2 files changed, 52 insertions(+), 25 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.txt deleted file mode 100644 index 86a7b4cd03f5..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.txt +++ /dev/null @@ -1,25 +0,0 @@ -Marvell Armada 7K/8K PIC Interrupt controller ---------------------------------------------- - -This is the Device Tree binding for the PIC, a secondary interrupt -controller available on the Marvell Armada 7K/8K ARM64 SoCs, and -typically connected to the GIC as the primary interrupt controller. - -Required properties: -- compatible: should be "marvell,armada-8k-pic" -- interrupt-controller: identifies the node as an interrupt controller -- #interrupt-cells: the number of cells to define interrupts on this - controller. Should be 1 -- reg: the register area for the PIC interrupt controller -- interrupts: the interrupt to the primary interrupt controller, - typically the GIC - -Example: - - pic: interrupt-controller@3f0100 { - compatible = "marvell,armada-8k-pic"; - reg = <0x3f0100 0x10>; - #interrupt-cells = <1>; - interrupt-controller; - interrupts = ; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.yaml new file mode 100644 index 000000000000..5a455f7353db --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/marvell,armada-8k-pic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 7K/8K PIC Interrupt controller + +maintainers: + - Thomas Petazzoni + +description: + The Marvell Armada 7K/8K PIC is a secondary interrupt controller available on + the Marvell Armada 7K/8K ARM64 SoCs, and typically connected to the GIC as the + primary interrupt controller. + +properties: + compatible: + const: marvell,armada-8k-pic + + reg: + maxItems: 1 + + "#interrupt-cells": + const: 1 + + interrupt-controller: true + + interrupts: + maxItems: 1 + description: Interrupt to the primary interrupt controller (GIC). + +required: + - compatible + - reg + - "#interrupt-cells" + - interrupt-controller + - interrupts + +additionalProperties: false + +examples: + - | + #include + + interrupt-controller@3f0100 { + compatible = "marvell,armada-8k-pic"; + reg = <0x3f0100 0x10>; + #interrupt-cells = <1>; + interrupt-controller; + interrupts = ; + }; -- cgit v1.2.3 From e11b723f4e7960905970686acc94d70fdc747a4f Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:47:20 -0500 Subject: dt-bindings: interrupt-controller: Convert marvell,ap806-gicp to DT schema Convert the Marvell GICP MSI controller binding to schema format. It's a straight-forward conversion of the typical MSI controller. Link: https://lore.kernel.org/r/20250505144721.1290068-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/marvell,ap806-gicp.yaml | 50 ++++++++++++++++++++++ .../bindings/interrupt-controller/marvell,gicp.txt | 27 ------------ 2 files changed, 50 insertions(+), 27 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-gicp.yaml delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,gicp.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-gicp.yaml b/Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-gicp.yaml new file mode 100644 index 000000000000..5faedd95b9a9 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-gicp.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/marvell,ap806-gicp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell GICP Controller + +maintainers: + - Thomas Petazzoni + +description: + GICP is a Marvell extension of the GIC that allows to trigger GIC SPI + interrupts by doing a memory transaction. It is used by the ICU + located in the Marvell CP110 to turn wired interrupts inside the CP + into GIC SPI interrupts. + +properties: + compatible: + const: marvell,ap806-gicp + + reg: + maxItems: 1 + + marvell,spi-ranges: + description: Tuples of GIC SPI interrupt ranges available for this GICP + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: SPI interrupt base + - description: Number of interrupts in the range + + msi-controller: true + +required: + - compatible + - reg + - msi-controller + - marvell,spi-ranges + +additionalProperties: false + +examples: + - | + msi-controller@3f0040 { + compatible = "marvell,ap806-gicp"; + reg = <0x3f0040 0x10>; + marvell,spi-ranges = <64 64>, <288 64>; + msi-controller; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,gicp.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,gicp.txt deleted file mode 100644 index 64a00ceb7da4..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/marvell,gicp.txt +++ /dev/null @@ -1,27 +0,0 @@ -Marvell GICP Controller ------------------------ - -GICP is a Marvell extension of the GIC that allows to trigger GIC SPI -interrupts by doing a memory transaction. It is used by the ICU -located in the Marvell CP110 to turn wired interrupts inside the CP -into GIC SPI interrupts. - -Required properties: - -- compatible: Must be "marvell,ap806-gicp" - -- reg: Must be the address and size of the GICP SPI registers - -- marvell,spi-ranges: tuples of GIC SPI interrupts ranges available - for this GICP - -- msi-controller: indicates that this is an MSI controller - -Example: - -gicp_spi: gicp-spi@3f0040 { - compatible = "marvell,ap806-gicp"; - reg = <0x3f0040 0x10>; - marvell,spi-ranges = <64 64>, <288 64>; - msi-controller; -}; -- cgit v1.2.3 From 270aaae0e720b4fe661b4dd912ba8794e29dd538 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:47:48 -0500 Subject: dt-bindings: interrupt-controller: Convert marvell,ap806-sei to DT schema Convert the Marvell SEI interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144749.1290862-1-robh@kernel.org Reviewed-by: Miquel Raynal Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/marvell,ap806-sei.yaml | 58 ++++++++++++++++++++++ .../bindings/interrupt-controller/marvell,sei.txt | 36 -------------- 2 files changed, 58 insertions(+), 36 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-sei.yaml delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-sei.yaml b/Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-sei.yaml new file mode 100644 index 000000000000..e812f9a86307 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-sei.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/marvell,ap806-sei.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell SEI (System Error Interrupt) Controller + +maintainers: + - Miquel Raynal + +description: > + Marvell SEI (System Error Interrupt) controller is an interrupt aggregator. It + receives interrupts from several sources and aggregates them to a single + interrupt line (an SPI) on the parent interrupt controller. + + This interrupt controller can handle up to 64 SEIs, a set comes from the AP + and is wired while a second set comes from the CPs by the mean of MSIs. + +properties: + compatible: + const: marvell,ap806-sei + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + '#interrupt-cells': + const: 1 + + interrupt-controller: true + + msi-controller: true + +required: + - compatible + - reg + - interrupts + - '#interrupt-cells' + - interrupt-controller + - msi-controller + +additionalProperties: false + +examples: + - | + #include + + interrupt-controller@3f0200 { + compatible = "marvell,ap806-sei"; + reg = <0x3f0200 0x40>; + interrupts = ; + #interrupt-cells = <1>; + interrupt-controller; + msi-controller; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt deleted file mode 100644 index 0beafed502f5..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt +++ /dev/null @@ -1,36 +0,0 @@ -Marvell SEI (System Error Interrupt) Controller ------------------------------------------------ - -Marvell SEI (System Error Interrupt) controller is an interrupt -aggregator. It receives interrupts from several sources and aggregates -them to a single interrupt line (an SPI) on the parent interrupt -controller. - -This interrupt controller can handle up to 64 SEIs, a set comes from the -AP and is wired while a second set comes from the CPs by the mean of -MSIs. - -Required properties: - -- compatible: should be one of: - * "marvell,ap806-sei" -- reg: SEI registers location and length. -- interrupts: identifies the parent IRQ that will be triggered. -- #interrupt-cells: number of cells to define an SEI wired interrupt - coming from the AP, should be 1. The cell is the IRQ - number. -- interrupt-controller: identifies the node as an interrupt controller - for AP interrupts. -- msi-controller: identifies the node as an MSI controller for the CPs - interrupts. - -Example: - - sei: interrupt-controller@3f0200 { - compatible = "marvell,ap806-sei"; - reg = <0x3f0200 0x40>; - interrupts = ; - #interrupt-cells = <1>; - interrupt-controller; - msi-controller; - }; -- cgit v1.2.3 From 26c70ec8812f1cabd11de5e87bce303e0c9298f2 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:45:23 -0500 Subject: dt-bindings: interrupt-controller: Convert marvell,cp110-icu to DT schema Convert the Marvell ICU interrupt controller to DT schema format. Add the missing addressing properties to read and translate child node addresses. Drop the legacy binding description and example. Link: https://lore.kernel.org/r/20250505144524.1285795-1-robh@kernel.org Reviewed-by: Miquel Raynal Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/marvell,cp110-icu.yaml | 98 ++++++++++++++++++ .../bindings/interrupt-controller/marvell,icu.txt | 112 --------------------- 2 files changed, 98 insertions(+), 112 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,icu.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml b/Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml new file mode 100644 index 000000000000..9d4f06f45372 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/marvell,cp110-icu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +maintainers: + - Miquel Raynal + - Thomas Petazzoni + +title: Marvell ICU Interrupt Controller + +description: + The Marvell ICU (Interrupt Consolidation Unit) controller is responsible for + collecting all wired-interrupt sources in the CP and communicating them to the + GIC in the AP. The unit translates interrupt requests on input wires to MSG + memory mapped transactions to the GIC. These messages access different GIC + memory areas depending on their type (NSR, SR, SEI, REI, etc). + +properties: + compatible: + const: marvell,cp110-icu + + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + + ranges: true + +patternProperties: + "^interrupt-controller@": + type: object + description: Interrupt group child nodes + additionalProperties: false + + properties: + compatible: + enum: + - marvell,cp110-icu-nsr + - marvell,cp110-icu-sr + - marvell,cp110-icu-sei + - marvell,cp110-icu-rei + + reg: + maxItems: 1 + + '#interrupt-cells': + const: 2 + + interrupt-controller: true + + msi-parent: + maxItems: 1 + description: Phandle to the GICP controller + + required: + - compatible + - reg + - '#interrupt-cells' + - interrupt-controller + - msi-parent + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + interrupt-controller@1e0000 { + compatible = "marvell,cp110-icu"; + reg = <0x1e0000 0x440>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + interrupt-controller@10 { + compatible = "marvell,cp110-icu-nsr"; + reg = <0x10 0x20>; + #interrupt-cells = <2>; + interrupt-controller; + msi-parent = <&gicp>; + }; + + interrupt-controller@50 { + compatible = "marvell,cp110-icu-sei"; + reg = <0x50 0x10>; + #interrupt-cells = <2>; + interrupt-controller; + msi-parent = <&sei>; + }; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,icu.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,icu.txt deleted file mode 100644 index 1c94a57a661e..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/marvell,icu.txt +++ /dev/null @@ -1,112 +0,0 @@ -Marvell ICU Interrupt Controller --------------------------------- - -The Marvell ICU (Interrupt Consolidation Unit) controller is -responsible for collecting all wired-interrupt sources in the CP and -communicating them to the GIC in the AP, the unit translates interrupt -requests on input wires to MSG memory mapped transactions to the GIC. -These messages will access a different GIC memory area depending on -their type (NSR, SR, SEI, REI, etc). - -Required properties: - -- compatible: Should be "marvell,cp110-icu" - -- reg: Should contain ICU registers location and length. - -Subnodes: Each group of interrupt is declared as a subnode of the ICU, -with their own compatible. - -Required properties for the icu_nsr/icu_sei subnodes: - -- compatible: Should be one of: - * "marvell,cp110-icu-nsr" - * "marvell,cp110-icu-sr" - * "marvell,cp110-icu-sei" - * "marvell,cp110-icu-rei" - -- #interrupt-cells: Specifies the number of cells needed to encode an - interrupt source. The value shall be 2. - - The 1st cell is the index of the interrupt in the ICU unit. - - The 2nd cell is the type of the interrupt. See arm,gic.txt for - details. - -- interrupt-controller: Identifies the node as an interrupt - controller. - -- msi-parent: Should point to the GICP controller, the GIC extension - that allows to trigger interrupts using MSG memory mapped - transactions. - -Note: each 'interrupts' property referring to any 'icu_xxx' node shall - have a different number within [0:206]. - -Example: - -icu: interrupt-controller@1e0000 { - compatible = "marvell,cp110-icu"; - reg = <0x1e0000 0x440>; - - CP110_LABEL(icu_nsr): interrupt-controller@10 { - compatible = "marvell,cp110-icu-nsr"; - reg = <0x10 0x20>; - #interrupt-cells = <2>; - interrupt-controller; - msi-parent = <&gicp>; - }; - - CP110_LABEL(icu_sei): interrupt-controller@50 { - compatible = "marvell,cp110-icu-sei"; - reg = <0x50 0x10>; - #interrupt-cells = <2>; - interrupt-controller; - msi-parent = <&sei>; - }; -}; - -node1 { - interrupt-parent = <&icu_nsr>; - interrupts = <106 IRQ_TYPE_LEVEL_HIGH>; -}; - -node2 { - interrupt-parent = <&icu_sei>; - interrupts = <107 IRQ_TYPE_LEVEL_HIGH>; -}; - -/* Would not work with the above nodes */ -node3 { - interrupt-parent = <&icu_nsr>; - interrupts = <107 IRQ_TYPE_LEVEL_HIGH>; -}; - -The legacy bindings were different in this way: - -- #interrupt-cells: The value was 3. - The 1st cell was the group type of the ICU interrupt. Possible - group types were: - ICU_GRP_NSR (0x0) : Shared peripheral interrupt, non-secure - ICU_GRP_SR (0x1) : Shared peripheral interrupt, secure - ICU_GRP_SEI (0x4) : System error interrupt - ICU_GRP_REI (0x5) : RAM error interrupt - The 2nd cell was the index of the interrupt in the ICU unit. - The 3rd cell was the type of the interrupt. See arm,gic.txt for - details. - -Example: - -icu: interrupt-controller@1e0000 { - compatible = "marvell,cp110-icu"; - reg = <0x1e0000 0x440>; - - #interrupt-cells = <3>; - interrupt-controller; - msi-parent = <&gicp>; -}; - -node1 { - interrupt-parent = <&icu>; - interrupts = ; -}; -- cgit v1.2.3 From bbb1999ac126ac9b5627c06ec52391048de13d70 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:47:26 -0500 Subject: dt-bindings: interrupt-controller: Convert marvell,odmi-controller to DT schema Convert the Marvell On-Die Message interrupt controller binding to schema format. Drop the 'interrupt-controller' property which isn't relevant for an MSI controller. Link: https://lore.kernel.org/r/20250505144727.1290271-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../marvell,odmi-controller.txt | 42 ----------------- .../marvell,odmi-controller.yaml | 54 ++++++++++++++++++++++ 2 files changed, 54 insertions(+), 42 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.txt deleted file mode 100644 index 0ebfc952cb34..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.txt +++ /dev/null @@ -1,42 +0,0 @@ - -* Marvell ODMI for MSI support - -Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller -which can be used by on-board peripheral for MSI interrupts. - -Required properties: - -- compatible : The value here should contain: - - "marvell,ap806-odmi-controller", "marvell,odmi-controller". - -- interrupt,controller : Identifies the node as an interrupt controller. - -- msi-controller : Identifies the node as an MSI controller. - -- marvell,odmi-frames : Number of ODMI frames available. Each frame - provides a number of events. - -- reg : List of register definitions, one for each - ODMI frame. - -- marvell,spi-base : List of GIC base SPI interrupts, one for each - ODMI frame. Those SPI interrupts are 0-based, - i.e marvell,spi-base = <128> will use SPI #96. - See Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml - for details about the GIC Device Tree binding. - -Example: - - odmi: odmi@300000 { - compatible = "marvell,ap806-odmi-controller", - "marvell,odmi-controller"; - interrupt-controller; - msi-controller; - marvell,odmi-frames = <4>; - reg = <0x300000 0x4000>, - <0x304000 0x4000>, - <0x308000 0x4000>, - <0x30C000 0x4000>; - marvell,spi-base = <128>, <136>, <144>, <152>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.yaml new file mode 100644 index 000000000000..9ec1ed4a5155 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/marvell,odmi-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell ODMI controller + +maintainers: + - Thomas Petazzoni + +description: + Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller which can + be used by on-board peripherals for MSI interrupts. + +properties: + compatible: + const: marvell,odmi-controller + + reg: + description: List of register definitions, one for each ODMI frame. + + msi-controller: true + + marvell,odmi-frames: + description: Number of ODMI frames available. Each frame provides a number of events. + $ref: /schemas/types.yaml#/definitions/uint32 + + marvell,spi-base: + description: > + List of GIC base SPI interrupts, one for each ODMI frame. Those SPI + interrupts are 0-based, i.e. marvell,spi-base = <128> will use SPI #96. + See Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml + for details. + $ref: /schemas/types.yaml#/definitions/uint32-array + +required: + - compatible + - reg + - msi-controller + - marvell,odmi-frames + - marvell,spi-base + +additionalProperties: false + +examples: + - | + msi-controller@300000 { + compatible = "marvell,odmi-controller"; + msi-controller; + marvell,odmi-frames = <4>; + reg = <0x300000 0x4000>, <0x304000 0x4000>, <0x308000 0x4000>, <0x30C000 0x4000>; + marvell,spi-base = <128>, <136>, <144>, <152>; + }; -- cgit v1.2.3 From f3ce2e12a2c266f850bfd475b6be5d47d4249772 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:48:16 -0500 Subject: dt-bindings: interrupt-controller: Convert qca,ar7100-cpu-intc to DT schema Convert the Qualcomm Atheros ath79 CPU interrupt controller binding to schema format. Link: https://lore.kernel.org/r/20250505144817.1291980-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/qca,ar7100-cpu-intc.yaml | 61 ++++++++++++++++++++++ .../interrupt-controller/qca,ath79-cpu-intc.txt | 44 ---------------- 2 files changed, 61 insertions(+), 44 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-cpu-intc.yaml delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/qca,ath79-cpu-intc.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-cpu-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-cpu-intc.yaml new file mode 100644 index 000000000000..ab32a91af4c4 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-cpu-intc.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/qca,ar7100-cpu-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Atheros ath79 CPU interrupt controller + +maintainers: + - Alban Bedel + +description: + On most SoC the IRQ controller need to flush the DDR FIFO before running the + interrupt handler of some devices. This is configured using the + qca,ddr-wb-channels and qca,ddr-wb-channel-interrupts properties. + +properties: + compatible: + oneOf: + - items: + - const: qca,ar9132-cpu-intc + - const: qca,ar7100-cpu-intc + - items: + - const: qca,ar7100-cpu-intc + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + + qca,ddr-wb-channel-interrupts: + description: List of interrupts needing a write buffer flush + $ref: /schemas/types.yaml#/definitions/uint32-array + + qca,ddr-wb-channels: + description: List of write buffer channel phandles for each interrupt + $ref: /schemas/types.yaml#/definitions/phandle-array + +required: + - compatible + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + interrupt-controller { + compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc"; + + interrupt-controller; + #interrupt-cells = <1>; + + qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>; + qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>, + <&ddr_ctrl 0>, <&ddr_ctrl 1>; + }; + + ddr_ctrl: memory-controller { + #qca,ddr-wb-channel-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-cpu-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-cpu-intc.txt deleted file mode 100644 index aabce7810d29..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-cpu-intc.txt +++ /dev/null @@ -1,44 +0,0 @@ -Binding for Qualcomm Atheros AR7xxx/AR9XXX CPU interrupt controller - -On most SoC the IRQ controller need to flush the DDR FIFO before running -the interrupt handler of some devices. This is configured using the -qca,ddr-wb-channels and qca,ddr-wb-channel-interrupts properties. - -Required Properties: - -- compatible: has to be "qca,-cpu-intc", "qca,ar7100-cpu-intc" - as fallback -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode interrupt - source, should be 1 for intc - -Please refer to interrupts.txt in this directory for details of the common -Interrupt Controllers bindings used by client devices. - -Optional Properties: - -- qca,ddr-wb-channel-interrupts: List of the interrupts needing a write - buffer flush -- qca,ddr-wb-channels: List of phandles to the write buffer channels for - each interrupt. If qca,ddr-wb-channel-interrupts is not present the interrupt - default to the entry's index. - -Example: - - interrupt-controller { - compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc"; - - interrupt-controller; - #interrupt-cells = <1>; - - qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>; - qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>, - <&ddr_ctrl 0>, <&ddr_ctrl 1>; - }; - - ... - - ddr_ctrl: memory-controller@18000000 { - ... - #qca,ddr-wb-channel-cells = <1>; - }; -- cgit v1.2.3 From fcec00d7f65e29f878f2045c915b6ebb78ed4ff5 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:48:20 -0500 Subject: dt-bindings: interrupt-controller: Convert qca,ar7100-misc-intc to DT schema Convert the Qualcomm Atheros ath79 Misc interrupt controller binding to schema format. Adjust the compatible values to match what's actually in use. Link: https://lore.kernel.org/r/20250505144821.1292151-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/qca,ar7100-misc-intc.yaml | 52 ++++++++++++++++++++++ .../interrupt-controller/qca,ath79-misc-intc.txt | 45 ------------------- 2 files changed, 52 insertions(+), 45 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-misc-intc.yaml delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-misc-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-misc-intc.yaml new file mode 100644 index 000000000000..ae813189f5ab --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-misc-intc.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/qca,ar7100-misc-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Atheros AR7xxx/AR9XXX MISC interrupt controller + +maintainers: + - Alban Bedel + - Alexander Couzens + +description: + The Qualcomm Atheros AR7xxx/AR9XXX MISC interrupt controller is a secondary + controller for lower priority interrupts. + +properties: + compatible: + oneOf: + - items: + - const: qca,ar9132-misc-intc + - const: qca,ar7100-misc-intc + - const: qca,ar7240-misc-intc + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - "#interrupt-cells" + +examples: + - | + interrupt-controller@18060010 { + compatible = "qca,ar9132-misc-intc", "qca,ar7100-misc-intc"; + reg = <0x18060010 0x4>; + interrupts = <6>; + interrupt-controller; + #interrupt-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt deleted file mode 100644 index ad70006c1848..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt +++ /dev/null @@ -1,45 +0,0 @@ -Binding for Qualcomm Atheros AR7xxx/AR9XXX MISC interrupt controller - -The MISC interrupt controller is a secondary controller for lower priority -interrupt. - -Required Properties: -- compatible: has to be "qca,-cpu-intc", "qca,ar7100-misc-intc" or - "qca,-cpu-intc", "qca,ar7240-misc-intc" -- reg: Base address and size of the controllers memory area -- interrupts: Interrupt specifier for the controllers interrupt. -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode interrupt - source, should be 1 - -Compatible fallback depends on the SoC. Use ar7100 for ar71xx and ar913x, -use ar7240 for all other SoCs. - -Please refer to interrupts.txt in this directory for details of the common -Interrupt Controllers bindings used by client devices. - -Example: - - interrupt-controller@18060010 { - compatible = "qca,ar9132-misc-intc", "qca,ar7100-misc-intc"; - reg = <0x18060010 0x4>; - - interrupt-parent = <&cpuintc>; - interrupts = <6>; - - interrupt-controller; - #interrupt-cells = <1>; - }; - -Another example: - - interrupt-controller@18060010 { - compatible = "qca,ar9331-misc-intc", qca,ar7240-misc-intc"; - reg = <0x18060010 0x4>; - - interrupt-parent = <&cpuintc>; - interrupts = <6>; - - interrupt-controller; - #interrupt-cells = <1>; - }; -- cgit v1.2.3 From 66276d212fddb78c8818fd8abd6112470c809712 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:48:25 -0500 Subject: dt-bindings: interrupt-controller: Convert snps,arc700-intc to DT schema Convert the Arc Core interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144826.1292329-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/snps,arc700-intc.txt | 24 ------------- .../interrupt-controller/snps,arc700-intc.yaml | 42 ++++++++++++++++++++++ 2 files changed, 42 insertions(+), 24 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,arc700-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,arc700-intc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,arc700-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,arc700-intc.txt deleted file mode 100644 index 9a5d562435ea..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/snps,arc700-intc.txt +++ /dev/null @@ -1,24 +0,0 @@ -* ARC700 incore Interrupt Controller - - The core interrupt controller provides 32 prioritised interrupts (2 levels) - to ARC700 core. - -Properties: - -- compatible: "snps,arc700-intc" -- interrupt-controller: This is an interrupt controller. -- #interrupt-cells: Must be <1>. - - Single Cell "interrupts" property of a device specifies the IRQ number - between 0 to 31 - - intc accessed via the special ARC AUX register interface, hence "reg" property - is not specified. - -Example: - - intc: interrupt-controller { - compatible = "snps,arc700-intc"; - interrupt-controller; - #interrupt-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,arc700-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/snps,arc700-intc.yaml new file mode 100644 index 000000000000..000a734d997c --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/snps,arc700-intc.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/snps,arc700-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARC700 incore Interrupt Controller + +maintainers: + - Vineet Gupta + +description: > + The core interrupt controller provides 32 prioritized interrupts (2 levels) + to ARC700 core. + + intc accessed via the special ARC AUX register interface, hence "reg" property + is not specified. + +properties: + compatible: + const: snps,arc700-intc + + interrupt-controller: true + + '#interrupt-cells': + description: An interrupt number 0-31 + const: 1 + +required: + - compatible + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + interrupt-controller { + compatible = "snps,arc700-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; -- cgit v1.2.3 From 76f75212f8f3d1c0e7180d3c0e706deb2eea9c57 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:48:29 -0500 Subject: dt-bindings: interrupt-controller: Convert snps,archs-idu-intc to DT schema Convert the ARC-HS Interrupt Distribution Unit interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144830.1292495-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/snps,archs-idu-intc.txt | 46 --------------------- .../interrupt-controller/snps,archs-idu-intc.yaml | 48 ++++++++++++++++++++++ 2 files changed, 48 insertions(+), 46 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt deleted file mode 100644 index a5c1db95b3ec..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt +++ /dev/null @@ -1,46 +0,0 @@ -* ARC-HS Interrupt Distribution Unit - - This optional 2nd level interrupt controller can be used in SMP configurations - for dynamic IRQ routing, load balancing of common/external IRQs towards core - intc. - -Properties: - -- compatible: "snps,archs-idu-intc" -- interrupt-controller: This is an interrupt controller. -- #interrupt-cells: Must be <1> or <2>. - - Value of the first cell specifies the "common" IRQ from peripheral to IDU. - Number N of the particular interrupt line of IDU corresponds to the line N+24 - of the core interrupt controller. - - The (optional) second cell specifies any of the following flags: - - bits[3:0] trigger type and level flags - 1 = low-to-high edge triggered - 2 = NOT SUPPORTED (high-to-low edge triggered) - 4 = active high level-sensitive <<< DEFAULT - 8 = NOT SUPPORTED (active low level-sensitive) - When no second cell is specified, the interrupt is assumed to be level - sensitive. - - The interrupt controller is accessed via the special ARC AUX register - interface, hence "reg" property is not specified. - -Example: - core_intc: core-interrupt-controller { - compatible = "snps,archs-intc"; - interrupt-controller; - #interrupt-cells = <1>; - }; - - idu_intc: idu-interrupt-controller { - compatible = "snps,archs-idu-intc"; - interrupt-controller; - interrupt-parent = <&core_intc>; - #interrupt-cells = <1>; - }; - - some_device: serial@c0fc1000 { - interrupt-parent = <&idu_intc>; - interrupts = <0>; /* upstream idu IRQ #24 */ - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.yaml new file mode 100644 index 000000000000..286a964f23e1 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/snps,archs-idu-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARC-HS Interrupt Distribution Unit + +maintainers: + - Vineet Gupta + +description: > + ARC-HS Interrupt Distribution Unit is an optional 2nd level interrupt + controller which can be used in SMP configurations for dynamic IRQ routing, + load balancing of common/external IRQs towards core intc. + + The interrupt controller is accessed via the special ARC AUX register + interface, hence "reg" property is not specified. + +properties: + compatible: + const: snps,archs-idu-intc + + interrupt-controller: true + + '#interrupt-cells': + description: | + Number of interrupt specifier cells: + - 1: only a common IRQ is specified. + - 2: a second cell encodes trigger type and level flags: + 1 = low-to-high edge triggered + 4 = active high level-sensitive (default) + enum: [1, 2] + +required: + - compatible + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + interrupt-controller { + compatible = "snps,archs-idu-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; -- cgit v1.2.3 From f7c3cf504db71b01d38d69c22da71cb36394413b Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:48:33 -0500 Subject: dt-bindings: interrupt-controller: Convert snps,archs-intc to DT schema Convert the ARC-HS incore interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144834.1292666-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/snps,archs-intc.txt | 22 ---------- .../interrupt-controller/snps,archs-intc.yaml | 48 ++++++++++++++++++++++ 2 files changed, 48 insertions(+), 22 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,archs-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,archs-intc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,archs-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,archs-intc.txt deleted file mode 100644 index 69f326d6a5ad..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/snps,archs-intc.txt +++ /dev/null @@ -1,22 +0,0 @@ -* ARC-HS incore Interrupt Controller (Provided by cores implementing ARCv2 ISA) - -Properties: - -- compatible: "snps,archs-intc" -- interrupt-controller: This is an interrupt controller. -- #interrupt-cells: Must be <1>. - - Single Cell "interrupts" property of a device specifies the IRQ number - between 16 to 256 - - intc accessed via the special ARC AUX register interface, hence "reg" property - is not specified. - -Example: - - intc: interrupt-controller { - compatible = "snps,archs-intc"; - interrupt-controller; - #interrupt-cells = <1>; - interrupts = <16 17 18 19 20 21 22 23 24 25>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,archs-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/snps,archs-intc.yaml new file mode 100644 index 000000000000..9d248ef7fe3d --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/snps,archs-intc.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/snps,archs-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARC-HS incore Interrupt Controller + +maintainers: + - Vineet Gupta + +description: + ARC-HS incore Interrupt Controller provided by cores implementing ARCv2 ISA. + intc accessed via the special ARC AUX register interface, hence "reg" property + is not specified. + +properties: + compatible: + const: snps,archs-intc + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + + interrupts: + description: List of IRQ numbers between 16 and 256 + items: + items: + - minimum: 16 + maximum: 256 + +required: + - compatible + - interrupt-controller + - '#interrupt-cells' + - interrupts + +additionalProperties: false + +examples: + - | + interrupt-controller { + compatible = "snps,archs-intc"; + interrupt-controller; + #interrupt-cells = <1>; + interrupts = <16>, <17>, <18>, <19>, <20>, <21>, <22>, <23>, <24>, <25>; + }; -- cgit v1.2.3 From 9665ca7a7cd3c85d08349349e9a25e74b69f8b13 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:48:37 -0500 Subject: dt-bindings: interrupt-controller: Convert snps,dw-apb-ictl to DT schema Convert the Synopsys DW-APB interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144842.1292840-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/snps,dw-apb-ictl.txt | 43 --------------- .../interrupt-controller/snps,dw-apb-ictl.yaml | 64 ++++++++++++++++++++++ 2 files changed, 64 insertions(+), 43 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt deleted file mode 100644 index 2db59df9408f..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt +++ /dev/null @@ -1,43 +0,0 @@ -Synopsys DesignWare APB interrupt controller (dw_apb_ictl) - -Synopsys DesignWare provides interrupt controller IP for APB known as -dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with -APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt -controller in some SoCs, e.g. Hisilicon SD5203. - -Required properties: -- compatible: shall be "snps,dw-apb-ictl" -- reg: physical base address of the controller and length of memory mapped - region starting with ENABLE_LOW register -- interrupt-controller: identifies the node as an interrupt controller -- #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1 - -Additional required property when it's used as secondary interrupt controller: -- interrupts: interrupt reference to primary interrupt controller - -The interrupt sources map to the corresponding bits in the interrupt -registers, i.e. -- 0 maps to bit 0 of low interrupts, -- 1 maps to bit 1 of low interrupts, -- 32 maps to bit 0 of high interrupts, -- 33 maps to bit 1 of high interrupts, -- (optional) fast interrupts start at 64. - -Example: - /* dw_apb_ictl is used as secondary interrupt controller */ - aic: interrupt-controller@3000 { - compatible = "snps,dw-apb-ictl"; - reg = <0x3000 0xc00>; - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = ; - }; - - /* dw_apb_ictl is used as primary interrupt controller */ - vic: interrupt-controller@10130000 { - compatible = "snps,dw-apb-ictl"; - reg = <0x10130000 0x1000>; - interrupt-controller; - #interrupt-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml new file mode 100644 index 000000000000..6b59b600a037 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/snps,dw-apb-ictl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare APB interrupt controller + +maintainers: + - Sebastian Hesselbarth + - Zhen Lei + +description: + Synopsys DesignWare provides interrupt controller IP for APB known as + dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs + with APB bus, e.g. Marvell Armada 1500. It can also be used as primary + interrupt controller in some SoCs, e.g. Hisilicon SD5203. + +properties: + compatible: + const: snps,dw-apb-ictl + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + + interrupts: + maxItems: 1 + description: > + Interrupt input connected to the primary interrupt controller when used + as a secondary controller. The interrupt specifier maps to bits in the + low and high interrupt registers (0⇒bit 0 low, 1⇒bit 1 low, 32⇒bit 0 high, + 33⇒bit 1 high, fast interrupts start at 64). + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + #include + + interrupt-controller@3000 { + compatible = "snps,dw-apb-ictl"; + reg = <0x3000 0xc00>; + interrupt-controller; + #interrupt-cells = <1>; + interrupts = ; + }; + - | + interrupt-controller@10130000 { + compatible = "snps,dw-apb-ictl"; + reg = <0x10130000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; -- cgit v1.2.3 From c67d52fa7a0eaa2dba163af19107ac7465cf391d Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:48:50 -0500 Subject: dt-bindings: interrupt-controller: Convert st,spear3xx-shirq to DT schema Convert the SPEAr3xx Shared interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144851.1293180-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/st,spear300-shirq.yaml | 67 ++++++++++++++++++++++ .../interrupt-controller/st,spear3xx-shirq.txt | 44 -------------- 2 files changed, 67 insertions(+), 44 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,spear300-shirq.yaml delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,spear3xx-shirq.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,spear300-shirq.yaml b/Documentation/devicetree/bindings/interrupt-controller/st,spear300-shirq.yaml new file mode 100644 index 000000000000..27d36173366a --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/st,spear300-shirq.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/st,spear300-shirq.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SPEAr3xx Shared IRQ controller + +maintainers: + - Viresh Kumar + - Shiraz Hashim + +description: | + SPEAr3xx architecture includes shared/multiplexed irqs for certain set of + devices. The multiplexor provides a single interrupt to parent interrupt + controller (VIC) on behalf of a group of devices. + + There can be multiple groups available on SPEAr3xx variants but not exceeding + 4. The number of devices in a group can differ, further they may share same + set of status/mask registers spanning across different bit masks. Also in some + cases the group may not have enable or other registers. This makes software + little complex. + + A single node in the device tree is used to describe the shared interrupt + multiplexer (one node for all groups). A group in the interrupt controller + shares config/control registers with other groups. For example, a 32-bit + interrupt enable/disable config register can accommodate up to 4 interrupt + groups. + +properties: + compatible: + enum: + - st,spear300-shirq + - st,spear310-shirq + - st,spear320-shirq + + reg: + maxItems: 1 + + '#interrupt-cells': + const: 1 + + interrupt-controller: true + + interrupts: + description: Interrupt specifier array for SHIRQ groups + minItems: 1 + maxItems: 4 + +required: + - compatible + - reg + - '#interrupt-cells' + - interrupt-controller + - interrupts + +additionalProperties: false + +examples: + - | + interrupt-controller@b3000000 { + compatible = "st,spear320-shirq"; + reg = <0xb3000000 0x1000>; + interrupts = <28 29 30 1>; + #interrupt-cells = <1>; + interrupt-controller; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,spear3xx-shirq.txt b/Documentation/devicetree/bindings/interrupt-controller/st,spear3xx-shirq.txt deleted file mode 100644 index a407c499b3cc..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/st,spear3xx-shirq.txt +++ /dev/null @@ -1,44 +0,0 @@ -* SPEAr Shared IRQ layer (shirq) - -SPEAr3xx architecture includes shared/multiplexed irqs for certain set -of devices. The multiplexor provides a single interrupt to parent -interrupt controller (VIC) on behalf of a group of devices. - -There can be multiple groups available on SPEAr3xx variants but not -exceeding 4. The number of devices in a group can differ, further they -may share same set of status/mask registers spanning across different -bit masks. Also in some cases the group may not have enable or other -registers. This makes software little complex. - -A single node in the device tree is used to describe the shared -interrupt multiplexor (one node for all groups). A group in the -interrupt controller shares config/control registers with other groups. -For example, a 32-bit interrupt enable/disable config register can -accommodate up to 4 interrupt groups. - -Required properties: - - compatible: should be, either of - - "st,spear300-shirq" - - "st,spear310-shirq" - - "st,spear320-shirq" - - interrupt-controller: Identifies the node as an interrupt controller. - - #interrupt-cells: should be <1> which basically contains the offset - (starting from 0) of interrupts for all the groups. - - reg: Base address and size of shirq registers. - - interrupts: The list of interrupts generated by the groups which are - then connected to a parent interrupt controller. Each group is - associated with one of the interrupts, hence number of interrupts (to - parent) is equal to number of groups. The format of the interrupt - specifier depends in the interrupt parent controller. - -Example: - -The following is an example from the SPEAr320 SoC dtsi file. - -shirq: interrupt-controller@b3000000 { - compatible = "st,spear320-shirq"; - reg = <0xb3000000 0x1000>; - interrupts = <28 29 30 1>; - #interrupt-cells = <1>; - interrupt-controller; -}; -- cgit v1.2.3 From dd0cea00d80a3c2fdd71be02df8e9d4345045ea8 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:48:55 -0500 Subject: dt-bindings: interrupt-controller: Convert technologic,ts4800-irqc to DT schema Convert the TS-4800 FPGA interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144856.1293370-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../technologic,ts4800-irqc.yaml | 49 ++++++++++++++++++++++ .../interrupt-controller/technologic,ts4800.txt | 14 ------- 2 files changed, 49 insertions(+), 14 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800-irqc.yaml delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800-irqc.yaml b/Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800-irqc.yaml new file mode 100644 index 000000000000..f1a15d725cd6 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800-irqc.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/technologic,ts4800-irqc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TS-4800 FPGA Interrupt Controller + +maintainers: + - Damien Riegel + +description: + TS-4800 FPGA has an internal interrupt controller. When one of the interrupts + is triggered, the SoC is notified, usually using a GPIO as parent interrupt + source. + +properties: + compatible: + const: technologic,ts4800-irqc + + reg: + maxItems: 1 + + '#interrupt-cells': + const: 1 + + interrupt-controller: true + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - interrupts + +additionalProperties: false + +examples: + - | + interrupt-controller@1000 { + compatible = "technologic,ts4800-irqc"; + reg = <0x1000 0x80>; + interrupt-controller; + #interrupt-cells = <1>; + interrupts = <10>; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800.txt b/Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800.txt deleted file mode 100644 index 341ae5909333..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800.txt +++ /dev/null @@ -1,14 +0,0 @@ -TS-4800 FPGA interrupt controller - -TS-4800 FPGA has an internal interrupt controller. When one of the -interrupts is triggered, the SoC is notified, usually using a GPIO as -parent interrupt source. - -Required properties: -- compatible: should be "technologic,ts4800-irqc" -- interrupt-controller: identifies the node as an interrupt controller -- reg: physical base address of the controller and length of memory mapped - region -- #interrupt-cells: specifies the number of cells needed to encode an interrupt - source, should be 1. -- interrupts: specifies the interrupt line in the interrupt-parent controller -- cgit v1.2.3 From 94555704bea7936f139a7865adbf9829010b2fda Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:49:07 -0500 Subject: dt-bindings: interrupt-controller: Convert ti,keystone-irq to DT schema Convert the TI Keystone 2 interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144908.1293785-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/ti,keystone-irq.txt | 36 ------------- .../interrupt-controller/ti,keystone-irq.yaml | 63 ++++++++++++++++++++++ 2 files changed, 63 insertions(+), 36 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.txt deleted file mode 100644 index 5f94d7739d8d..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.txt +++ /dev/null @@ -1,36 +0,0 @@ -Keystone 2 IRQ controller IP - -On Keystone SOCs, DSP cores can send interrupts to ARM -host using the IRQ controller IP. It provides 28 IRQ signals to ARM. -The IRQ handler running on HOST OS can identify DSP signal source by -analyzing SRCCx bits in IPCARx registers. This is one of the component -used by the IPC mechanism used on Keystone SOCs. - -Required Properties: -- compatible: should be "ti,keystone-irq" -- ti,syscon-dev : phandle and offset pair. The phandle to syscon used to - access device control registers and the offset inside - device control registers range. -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode interrupt - source should be 1. -- interrupts: interrupt reference to primary interrupt controller - -Please refer to interrupts.txt in this directory for details of the common -Interrupt Controllers bindings used by client devices. - -Example: - kirq0: keystone_irq0@26202a0 { - compatible = "ti,keystone-irq"; - ti,syscon-dev = <&devctrl 0x2a0>; - interrupts = ; - interrupt-controller; - #interrupt-cells = <1>; - }; - - dsp0: dsp0 { - compatible = "linux,rproc-user"; - ... - interrupt-parent = <&kirq0>; - interrupts = <10 2>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.yaml new file mode 100644 index 000000000000..27d448d1786a --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ti,keystone-irq.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Keystone 2 IRQ controller IP + +maintainers: + - Grygorii Strashko + +description: + On Keystone SOCs, DSP cores can send interrupts to ARM host using the IRQ + controller IP. It provides 28 IRQ signals to ARM. The IRQ handler running on + HOST OS can identify DSP signal source by analyzing SRCCx bits in IPCARx + registers. This is one of the component used by the IPC mechanism used on + Keystone SOCs. + +properties: + compatible: + const: ti,keystone-irq + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + + interrupts: + maxItems: 1 + + ti,syscon-dev: + description: Phandle and offset to syscon device + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: Phandle to syscon device control registers + - description: Offset to control register + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - interrupts + - ti,syscon-dev + +additionalProperties: false + +examples: + - | + #include + + interrupt-controller@2a0 { + compatible = "ti,keystone-irq"; + reg = <0x2a0 0x4>; + ti,syscon-dev = <&devctrl 0x2a0>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; -- cgit v1.2.3 From 6248d8ccc161c09755d035e99a31b793766eed6a Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:49:12 -0500 Subject: dt-bindings: interrupt-controller: Convert ti,omap4-wugen-mpu to DT schema Convert the TI Wakeup Generator interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144913.1293967-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/ti,omap4-wugen-mpu.txt | 31 ------------ .../interrupt-controller/ti,omap4-wugen-mpu.yaml | 55 ++++++++++++++++++++++ 2 files changed, 55 insertions(+), 31 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.txt deleted file mode 100644 index 422d6908f8b2..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.txt +++ /dev/null @@ -1,31 +0,0 @@ -TI OMAP4 Wake-up Generator - -All TI OMAP4/5 (and their derivatives) an interrupt controller that -routes interrupts to the GIC, and also serves as a wakeup source. It -is also referred to as "WUGEN-MPU", hence the name of the binding. - -Required properties: - -- compatible : should contain at least "ti,omap4-wugen-mpu" or - "ti,omap5-wugen-mpu" -- reg : Specifies base physical address and size of the registers. -- interrupt-controller : Identifies the node as an interrupt controller. -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value must be 3. - -Notes: - -- Because this HW ultimately routes interrupts to the GIC, the - interrupt specifier must be that of the GIC. -- Only SPIs can use the WUGEN as an interrupt parent. SGIs and PPIs - are explicitly forbidden. - -Example: - - wakeupgen: interrupt-controller@48281000 { - compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0x48281000 0x1000>; - interrupt-parent = <&gic>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.yaml new file mode 100644 index 000000000000..6e3d6e6d9e07 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/ti,omap4-wugen-mpu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI OMAP4 Wake-up Generator + +maintainers: + - Krzysztof Kozlowski + +description: > + All TI OMAP4/5 (and their derivatives) are interrupt controllers that route + interrupts to the GIC, and also serve as wakeup sources. They are also + referred to as "WUGEN-MPU", hence the name of the binding. + + Notes: + + - Because this HW ultimately routes interrupts to the GIC, the interrupt + specifier must be that of the GIC. + - Only SPIs can use the WUGEN as an interrupt parent. SGIs and PPIs are + explicitly forbidden. + +properties: + compatible: + oneOf: + - items: + - const: ti,omap5-wugen-mpu + - const: ti,omap4-wugen-mpu + - const: ti,omap4-wugen-mpu + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 3 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + interrupt-controller@48281000 { + compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu"; + reg = <0x48281000 0x1000>; + interrupt-controller; + #interrupt-cells = <3>; + }; -- cgit v1.2.3 From 896633412deec45d7bd6f378e93c05dcded83ccd Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 5 May 2025 09:49:16 -0500 Subject: dt-bindings: interrupt-controller: Convert ti,omap-intc-irq to DT schema Convert the TI OMAP2/3 interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. "ti,intc-size" property isn't actually used with "ti,omap2-intc", so the 2 bindings can be combined. Link: https://lore.kernel.org/r/20250505144917.1294150-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/ti,omap-intc-irq.txt | 28 ------------ .../interrupt-controller/ti,omap-intc-irq.yaml | 52 ++++++++++++++++++++++ .../interrupt-controller/ti,omap2-intc.txt | 27 ----------- 3 files changed, 52 insertions(+), 55 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,omap-intc-irq.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,omap-intc-irq.yaml delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,omap2-intc.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,omap-intc-irq.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,omap-intc-irq.txt deleted file mode 100644 index 38ce5d037722..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,omap-intc-irq.txt +++ /dev/null @@ -1,28 +0,0 @@ -Omap2/3 intc controller - -On TI omap2 and 3 the intc interrupt controller can provide -96 or 128 IRQ signals to the ARM host depending on the SoC. - -Required Properties: -- compatible: should be one of - "ti,omap2-intc" - "ti,omap3-intc" - "ti,dm814-intc" - "ti,dm816-intc" - "ti,am33xx-intc" - -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode interrupt - source, should be 1 for intc -- interrupts: interrupt reference to primary interrupt controller - -Please refer to interrupts.txt in this directory for details of the common -Interrupt Controllers bindings used by client devices. - -Example: - intc: interrupt-controller@48200000 { - compatible = "ti,omap3-intc"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0x48200000 0x1000>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,omap-intc-irq.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,omap-intc-irq.yaml new file mode 100644 index 000000000000..cb118180621f --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,omap-intc-irq.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/ti,omap-intc-irq.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI OMAP Interrupt Controller + +maintainers: + - Tony Lindgren + +description: + On TI omap2 and 3 the intc interrupt controller can provide 96 or 128 IRQ + signals to the ARM host depending on the SoC. + +properties: + compatible: + enum: + - ti,omap2-intc + - ti,omap3-intc + - ti,dm814-intc + - ti,dm816-intc + - ti,am33xx-intc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + interrupt-controller@48200000 { + compatible = "ti,omap3-intc"; + reg = <0x48200000 0x1000>; + interrupts = <32>; + interrupt-controller; + #interrupt-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,omap2-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,omap2-intc.txt deleted file mode 100644 index f2583e6ec060..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,omap2-intc.txt +++ /dev/null @@ -1,27 +0,0 @@ -* OMAP Interrupt Controller - -OMAP2/3 are using a TI interrupt controller that can support several -configurable number of interrupts. - -Main node required properties: - -- compatible : should be: - "ti,omap2-intc" -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The type shall be a and the value shall be 1. - - The cell contains the interrupt number in the range [0-128]. -- ti,intc-size: Number of interrupts handled by the interrupt controller. -- reg: physical base address and size of the intc registers map. - -Example: - - intc: interrupt-controller@1 { - compatible = "ti,omap2-intc"; - interrupt-controller; - #interrupt-cells = <1>; - ti,intc-size = <96>; - reg = <0x48200000 0x1000>; - }; - -- cgit v1.2.3 From 1090c38bbfd9ab7f22830c0e8a5c605e7d4ef084 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 7 May 2025 10:42:31 -0500 Subject: dt-bindings: soc: fsl,qman-fqd: Fix reserved-memory.yaml reference The reserved-memory.yaml reference needs the full path. No warnings were generated because the example has the wrong compatible string, so fix that too. Fixes: 304a90c4f75d ("dt-bindings: soc: fsl: Convert q(b)man-* to yaml format") Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250507154231.1590634-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/soc/fsl/fsl,qman-fqd.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/soc/fsl/fsl,qman-fqd.yaml b/Documentation/devicetree/bindings/soc/fsl/fsl,qman-fqd.yaml index de0b4ae740ff..a975bce59975 100644 --- a/Documentation/devicetree/bindings/soc/fsl/fsl,qman-fqd.yaml +++ b/Documentation/devicetree/bindings/soc/fsl/fsl,qman-fqd.yaml @@ -50,7 +50,7 @@ required: - compatible allOf: - - $ref: reserved-memory.yaml + - $ref: /schemas/reserved-memory/reserved-memory.yaml unevaluatedProperties: false @@ -61,7 +61,7 @@ examples: #size-cells = <2>; qman-fqd { - compatible = "shared-dma-pool"; + compatible = "fsl,qman-fqd"; size = <0 0x400000>; alignment = <0 0x400000>; no-map; -- cgit v1.2.3 From 54cec13d5726a88919b5bf3f47491b6c3fe67598 Mon Sep 17 00:00:00 2001 From: Rodrigo Gobbi Date: Sat, 3 May 2025 16:01:01 -0300 Subject: dt-bindings: trivial-devices: Add Maxim max30208 The temperature sensor for maxim is a simple i2c driver, it's eligible to trivial devices. Signed-off-by: Rodrigo Gobbi Link: https://lore.kernel.org/r/20250503190509.33074-1-rodrigo.gobbi.7@gmail.com Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index 8da408107e55..377722af6c00 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -173,6 +173,8 @@ properties: - maxim,ds3502 # Temperature Sensor, I2C interface - maxim,max1619 + # Digital temperature sensor with 0.1°C accuracy + - maxim,max30208 # 3-Channel Remote Temperature Sensor - maxim,max31730 # 10-bit 10 kOhm linear programmable voltage divider -- cgit v1.2.3 From d542461211543522daecb34b7972d8ac1044bc97 Mon Sep 17 00:00:00 2001 From: Alison Schofield Date: Tue, 13 May 2025 14:58:09 -0700 Subject: cxl: Sync up the driver-api/cxl documentation pmem.c regs.c mbox.c identifiers were missing. Add them to memory-devices.rst following their respective DOC comment includes. Two acpi.c identifiers were available, but not used in kernel-doc's: 1) Add add_cxl_resources to memory-devices.rst and fix up the Sphinx complaint on the ascii art by escaping it. 2) Add cxl_acpi_evaluate_qtg_dsm to access-coordinates.rst. core/features.c is new. Add a "DOC: cxl features" comment to the source and identifiers to memory_devices.rst. Signed-off-by: Alison Schofield Reviewed-by: Ira Weiny Link: https://patch.msgid.link/20250513215813.1419645-1-alison.schofield@intel.com Signed-off-by: Dave Jiang --- .../driver-api/cxl/linux/access-coordinates.rst | 3 +++ Documentation/driver-api/cxl/theory-of-operation.rst | 18 ++++++++++++++++++ 2 files changed, 21 insertions(+) (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/linux/access-coordinates.rst b/Documentation/driver-api/cxl/linux/access-coordinates.rst index 71024fa0f561..7f949cc4ece5 100644 --- a/Documentation/driver-api/cxl/linux/access-coordinates.rst +++ b/Documentation/driver-api/cxl/linux/access-coordinates.rst @@ -90,3 +90,6 @@ under the same ACPI0017 device to form a new xarray. Finally, the cxl_region_update_bandwidth() is called and the aggregated bandwidth from all the members of the last xarray is updated for the access coordinates residing in the cxl region (cxlr) context. + +.. kernel-doc:: drivers/cxl/acpi.c + :identifiers: cxl_acpi_evaluate_qtg_dsm diff --git a/Documentation/driver-api/cxl/theory-of-operation.rst b/Documentation/driver-api/cxl/theory-of-operation.rst index 32739e253453..1b854b11f575 100644 --- a/Documentation/driver-api/cxl/theory-of-operation.rst +++ b/Documentation/driver-api/cxl/theory-of-operation.rst @@ -347,6 +347,9 @@ CXL Core .. kernel-doc:: drivers/cxl/cxl.h :internal: +.. kernel-doc:: drivers/cxl/acpi.c + :identifiers: add_cxl_resources + .. kernel-doc:: drivers/cxl/core/hdm.c :doc: cxl core hdm @@ -371,12 +374,27 @@ CXL Core .. kernel-doc:: drivers/cxl/core/pmem.c :doc: cxl pmem +.. kernel-doc:: drivers/cxl/core/pmem.c + :identifiers: + .. kernel-doc:: drivers/cxl/core/regs.c :doc: cxl registers +.. kernel-doc:: drivers/cxl/core/regs.c + :identifiers: + .. kernel-doc:: drivers/cxl/core/mbox.c :doc: cxl mbox +.. kernel-doc:: drivers/cxl/core/mbox.c + :identifiers: + +.. kernel-doc:: drivers/cxl/core/features.c + :doc: cxl features + +.. kernel-doc:: drivers/cxl/core/features.c + :identifiers: + CXL Regions ----------- .. kernel-doc:: drivers/cxl/core/region.c -- cgit v1.2.3 From d5c17e36549cb417f249ecbd20c9ab008aaf45d3 Mon Sep 17 00:00:00 2001 From: Vladimir Oltean Date: Mon, 12 May 2025 16:17:51 +0300 Subject: docs: networking: timestamping: improve stacked PHC sentence The first paragraph makes no grammatical sense. I suppose a portion of the intended sentece is missing: "[The challenge with ] stacked PHCs (...) is that they uncover bugs". Rephrase, and at the same time simplify the structure of the sentence a little bit, it is not easy to follow. Fixes: 94d9f78f4d64 ("docs: networking: timestamping: add section for stacked PHC devices") Signed-off-by: Vladimir Oltean Acked-by: Richard Cochran Link: https://patch.msgid.link/20250512131751.320283-1-vladimir.oltean@nxp.com Signed-off-by: Jakub Kicinski --- Documentation/networking/timestamping.rst | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/networking/timestamping.rst b/Documentation/networking/timestamping.rst index b8fef8101176..7aabead90648 100644 --- a/Documentation/networking/timestamping.rst +++ b/Documentation/networking/timestamping.rst @@ -811,11 +811,9 @@ Documentation/devicetree/bindings/ptp/timestamper.txt for more details. 3.2.4 Other caveats for MAC drivers ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -Stacked PHCs, especially DSA (but not only) - since that doesn't require any -modification to MAC drivers, so it is more difficult to ensure correctness of -all possible code paths - is that they uncover bugs which were impossible to -trigger before the existence of stacked PTP clocks. One example has to do with -this line of code, already presented earlier:: +The use of stacked PHCs may uncover MAC driver bugs which were impossible to +trigger without them. One example has to do with this line of code, already +presented earlier:: skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; -- cgit v1.2.3 From bc049387b41f41bee61e8cc338a5e99ca9798a09 Mon Sep 17 00:00:00 2001 From: Kumar Kartikeya Dwivedi Date: Tue, 13 May 2025 07:28:12 -0700 Subject: bpf: Add support for __prog argument suffix to pass in prog->aux Instead of hardcoding the list of kfuncs that need prog->aux passed to them with a combination of fixup_kfunc_call adjustment + __ign suffix, combine both in __prog suffix, which ignores the argument passed in, and fixes it up to the prog->aux. This allows kfuncs to have the prog->aux passed into them without having to touch the verifier. Cc: Tejun Heo Signed-off-by: Kumar Kartikeya Dwivedi Link: https://lore.kernel.org/r/20250513142812.1021591-1-memxor@gmail.com Signed-off-by: Alexei Starovoitov --- Documentation/bpf/kfuncs.rst | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'Documentation') diff --git a/Documentation/bpf/kfuncs.rst b/Documentation/bpf/kfuncs.rst index a8f5782bd833..ae468b781d31 100644 --- a/Documentation/bpf/kfuncs.rst +++ b/Documentation/bpf/kfuncs.rst @@ -160,6 +160,23 @@ Or:: ... } +2.2.6 __prog Annotation +--------------------------- +This annotation is used to indicate that the argument needs to be fixed up to +the bpf_prog_aux of the caller BPF program. Any value passed into this argument +is ignored, and rewritten by the verifier. + +An example is given below:: + + __bpf_kfunc int bpf_wq_set_callback_impl(struct bpf_wq *wq, + int (callback_fn)(void *map, int *key, void *value), + unsigned int flags, + void *aux__prog) + { + struct bpf_prog_aux *aux = aux__prog; + ... + } + .. _BPF_kfunc_nodef: 2.3 Using an existing kernel function -- cgit v1.2.3 From f07f2b3fecac4096b2c89f2b89b5f564c279cfc8 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 12 May 2025 16:57:05 -0500 Subject: dt-bindings: ata: Convert ti,dm816-ahci to DT schema Convert the TI DM816 AHCI SATA Controller to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) Reviewed-by: Bartosz Golaszewski Signed-off-by: Damien Le Moal --- .../devicetree/bindings/ata/ahci-dm816.txt | 21 ----------- .../devicetree/bindings/ata/ti,dm816-ahci.yaml | 43 ++++++++++++++++++++++ 2 files changed, 43 insertions(+), 21 deletions(-) delete mode 100644 Documentation/devicetree/bindings/ata/ahci-dm816.txt create mode 100644 Documentation/devicetree/bindings/ata/ti,dm816-ahci.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ata/ahci-dm816.txt b/Documentation/devicetree/bindings/ata/ahci-dm816.txt deleted file mode 100644 index f8c535f3541f..000000000000 --- a/Documentation/devicetree/bindings/ata/ahci-dm816.txt +++ /dev/null @@ -1,21 +0,0 @@ -Device tree binding for the TI DM816 AHCI SATA Controller ---------------------------------------------------------- - -Required properties: - - compatible: must be "ti,dm816-ahci" - - reg: physical base address and size of the register region used by - the controller (as defined by the AHCI 1.1 standard) - - interrupts: interrupt specifier (refer to the interrupt binding) - - clocks: list of phandle and clock specifier pairs (or only - phandles for clock providers with '0' defined for - #clock-cells); two clocks must be specified: the functional - clock and an external reference clock - -Example: - - sata: sata@4a140000 { - compatible = "ti,dm816-ahci"; - reg = <0x4a140000 0x10000>; - interrupts = <16>; - clocks = <&sysclk5_ck>, <&sata_refclk>; - }; diff --git a/Documentation/devicetree/bindings/ata/ti,dm816-ahci.yaml b/Documentation/devicetree/bindings/ata/ti,dm816-ahci.yaml new file mode 100644 index 000000000000..d0ff9e78afe6 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/ti,dm816-ahci.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/ti,dm816-ahci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI DM816 AHCI SATA Controller + +maintainers: + - Bartosz Golaszewski + +allOf: + - $ref: ahci-common.yaml# + +properties: + compatible: + const: ti,dm816-ahci + + reg: + maxItems: 1 + + clocks: + items: + - description: functional clock + - description: external reference clock + + ti,hwmods: + const: sata + +required: + - compatible + - clocks + +unevaluatedProperties: false + +examples: + - | + sata@4a140000 { + compatible = "ti,dm816-ahci"; + reg = <0x4a140000 0x10000>; + interrupts = <16>; + clocks = <&sysclk5_ck>, <&sata_refclk>; + }; -- cgit v1.2.3 From 117d09e2830d6ff6c1bb2dc5629f972504fde51e Mon Sep 17 00:00:00 2001 From: Frank Wunderlich Date: Tue, 22 Apr 2025 15:24:26 +0200 Subject: dt-bindings: phy: mtk-xs-phy: Add mt7988 compatible Add compatible for xs-phy on mt7988. Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250422132438.15735-4-linux@fw-web.de Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml index a9e3139fd421..3b5253659e6f 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml @@ -49,6 +49,7 @@ properties: - enum: - mediatek,mt3611-xsphy - mediatek,mt3612-xsphy + - mediatek,mt7988-xsphy - const: mediatek,xsphy reg: -- cgit v1.2.3 From b484b25a486962b568ada1f55c1b96dfd96b912d Mon Sep 17 00:00:00 2001 From: Frank Wunderlich Date: Tue, 22 Apr 2025 15:24:27 +0200 Subject: dt-bindings: phy: mtk-xs-phy: support type switch by pericfg Add support for type switch by pericfg register between USB3/PCIe. Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250422132438.15735-5-linux@fw-web.de Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml index 3b5253659e6f..0bed847bb4ad 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml @@ -151,6 +151,21 @@ patternProperties: minimum: 1 maximum: 31 + mediatek,syscon-type: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + A phandle to syscon used to access the register of type switch, + the field should always be 3 cells long. + items: + - items: + - description: + Phandle to phy type configuration system controller + - description: + Phy type configuration register offset + - description: + Index of config segment + enum: [0, 1, 2, 3] + required: - reg - clocks -- cgit v1.2.3 From e00c9aea31035f46b04a13effaa801f8b3419d2a Mon Sep 17 00:00:00 2001 From: Siddharth Vadapalli Date: Fri, 11 Apr 2025 11:27:43 +0530 Subject: dt-bindings: phy: cadence-torrent: enable PHY_TYPE_USXGMII The Cadence Torrent SERDES supports USXGMII protocol. Hence, update the bindings to allow PHY_TYPE_USXGMII. Since PHY_TYPE_USXGMII has the value of "12" while the existing maximum allowed PHY TYPE is "9", switch back to using "enum" property in the bindings to account for this discontinuity. Signed-off-by: Siddharth Vadapalli Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250411055743.623135-1-s-vadapalli@ti.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml index 15dc8efe6ffe..9af39b33646a 100644 --- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml +++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml @@ -99,8 +99,7 @@ patternProperties: Specifies the type of PHY for which the group of PHY lanes is used. Refer include/dt-bindings/phy/phy.h. Constants from the header should be used. $ref: /schemas/types.yaml#/definitions/uint32 - minimum: 1 - maximum: 9 + enum: [1, 2, 3, 4, 5, 6, 7, 8, 9, 12] cdns,num-lanes: description: -- cgit v1.2.3 From 2063eedf3c9c4449fbf417c9b84ecd08251c3b34 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 16 Apr 2025 15:24:17 -0500 Subject: dt-bindings: phy: rockchip: Convert RK3399 Type-C PHY to schema Convert the Rockchip RK3399 Type-C PHY to DT schema format. Add the missing "power-domains" property and "port" and "orientation-switch" properties in the child nodes. Omit the previously deprecated properties as they aren't used anywhere. Drop the 2nd example which was pretty much identical to the 1st example. Signed-off-by: Rob Herring (Arm) Acked-by: Greg Kroah-Hartman Reviewed-by: Heiko Stuebner Link: https://lore.kernel.org/r/20250416202419.3836688-1-robh@kernel.org Signed-off-by: Vinod Koul --- .../devicetree/bindings/phy/phy-rockchip-typec.txt | 84 --------------- .../bindings/phy/rockchip,rk3399-typec-phy.yaml | 116 +++++++++++++++++++++ .../devicetree/bindings/usb/rockchip,dwc3.yaml | 2 +- 3 files changed, 117 insertions(+), 85 deletions(-) delete mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt create mode 100644 Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt deleted file mode 100644 index 960da7fcaa9e..000000000000 --- a/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt +++ /dev/null @@ -1,84 +0,0 @@ -* ROCKCHIP type-c PHY ---------------------- - -Required properties: - - compatible : must be "rockchip,rk3399-typec-phy" - - reg: Address and length of the usb phy control register set - - rockchip,grf : phandle to the syscon managing the "general - register files" - - clocks : phandle + clock specifier for the phy clocks - - clock-names : string, clock name, must be "tcpdcore", "tcpdphy-ref"; - - assigned-clocks: main clock, should be <&cru SCLK_UPHY0_TCPDCORE> or - <&cru SCLK_UPHY1_TCPDCORE>; - - assigned-clock-rates : the phy core clk frequency, shall be: 50000000 - - resets : a list of phandle + reset specifier pairs - - reset-names : string reset name, must be: - "uphy", "uphy-pipe", "uphy-tcphy" - -Optional properties: - - extcon : extcon specifier for the Power Delivery - -Required nodes : a sub-node is required for each port the phy provides. - The sub-node name is used to identify dp or usb3 port, - and shall be the following entries: - * "dp-port" : the name of DP port. - * "usb3-port" : the name of USB3 port. - -Required properties (port (child) node): -- #phy-cells : must be 0, See ./phy-bindings.txt for details. - -Deprecated properties, do not use in new device tree sources, these -properties are determined by the compatible value: - - rockchip,typec-conn-dir - - rockchip,usb3tousb2-en - - rockchip,external-psm - - rockchip,pipe-status - -Example: - tcphy0: phy@ff7c0000 { - compatible = "rockchip,rk3399-typec-phy"; - reg = <0x0 0xff7c0000 0x0 0x40000>; - rockchip,grf = <&grf>; - extcon = <&fusb0>; - clocks = <&cru SCLK_UPHY0_TCPDCORE>, - <&cru SCLK_UPHY0_TCPDPHY_REF>; - clock-names = "tcpdcore", "tcpdphy-ref"; - assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>; - assigned-clock-rates = <50000000>; - resets = <&cru SRST_UPHY0>, - <&cru SRST_UPHY0_PIPE_L00>, - <&cru SRST_P_UPHY0_TCPHY>; - reset-names = "uphy", "uphy-pipe", "uphy-tcphy"; - - tcphy0_dp: dp-port { - #phy-cells = <0>; - }; - - tcphy0_usb3: usb3-port { - #phy-cells = <0>; - }; - }; - - tcphy1: phy@ff800000 { - compatible = "rockchip,rk3399-typec-phy"; - reg = <0x0 0xff800000 0x0 0x40000>; - rockchip,grf = <&grf>; - extcon = <&fusb1>; - clocks = <&cru SCLK_UPHY1_TCPDCORE>, - <&cru SCLK_UPHY1_TCPDPHY_REF>; - clock-names = "tcpdcore", "tcpdphy-ref"; - assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>; - assigned-clock-rates = <50000000>; - resets = <&cru SRST_UPHY1>, - <&cru SRST_UPHY1_PIPE_L00>, - <&cru SRST_P_UPHY1_TCPHY>; - reset-names = "uphy", "uphy-pipe", "uphy-tcphy"; - - tcphy1_dp: dp-port { - #phy-cells = <0>; - }; - - tcphy1_usb3: usb3-port { - #phy-cells = <0>; - }; - }; diff --git a/Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml new file mode 100644 index 000000000000..91c011f68cd0 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/rockchip,rk3399-typec-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip Type-C PHY + +maintainers: + - Heiko Stuebner + +properties: + compatible: + const: rockchip,rk3399-typec-phy + + reg: + maxItems: 1 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: tcpdcore + - const: tcpdphy-ref + + extcon: true + + power-domains: + maxItems: 1 + + resets: + maxItems: 3 + + reset-names: + items: + - const: uphy + - const: uphy-pipe + - const: uphy-tcphy + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "general register files" (GRF). + + dp-port: + type: object + additionalProperties: false + + properties: + '#phy-cells': + const: 0 + + port: + $ref: /schemas/graph.yaml#/properties/port + description: Connection to USB Type-C connector + + required: + - '#phy-cells' + + usb3-port: + type: object + additionalProperties: false + + properties: + '#phy-cells': + const: 0 + + orientation-switch: true + + port: + $ref: /schemas/graph.yaml#/properties/port + description: Connection to USB Type-C connector SS port + + required: + - '#phy-cells' + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + - dp-port + - usb3-port + +additionalProperties: false + +examples: + - | + #include + + phy@ff7c0000 { + compatible = "rockchip,rk3399-typec-phy"; + reg = <0xff7c0000 0x40000>; + rockchip,grf = <&grf>; + extcon = <&fusb0>; + clocks = <&cru SCLK_UPHY0_TCPDCORE>, + <&cru SCLK_UPHY0_TCPDPHY_REF>; + clock-names = "tcpdcore", "tcpdphy-ref"; + resets = <&cru SRST_UPHY0>, + <&cru SRST_UPHY0_PIPE_L00>, + <&cru SRST_P_UPHY0_TCPHY>; + reset-names = "uphy", "uphy-pipe", "uphy-tcphy"; + + dp-port { + #phy-cells = <0>; + }; + + usb3-port { + #phy-cells = <0>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml index fba2cb05ecba..fd1b13c0ed6b 100644 --- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml @@ -18,7 +18,7 @@ description: Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml Type-C PHY - Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt + Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml select: properties: -- cgit v1.2.3 From 815d49f61ea049075482161f897aa13e1ae30cbb Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Sun, 27 Apr 2025 09:43:21 +0200 Subject: dt-bindings: arm: stm32: add compatible for stm32h747i-disco board The board includes an STM32H747XI SoC with the following resources: - 2 Mbytes Flash - 1 MByte SRAM - LCD-TFT controller - MIPI-DSI interface - FD-CAN - USB 2.0 high-speed/full-speed - Ethernet MAC - camera interface Detailed information can be found at: https://www.st.com/en/evaluation-tools/stm32h747i-disco.html Signed-off-by: Dario Binacchi Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250427074404.3278732-3-dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue --- Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml index 5fee2f38ff25..75ef877530f9 100644 --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -42,6 +42,10 @@ properties: - st,stm32h743i-disco - st,stm32h743i-eval - const: st,stm32h743 + - items: + - enum: + - st,stm32h747i-disco + - const: st,stm32h747 - items: - enum: - st,stm32h750i-art-pi -- cgit v1.2.3 From 8605b4d36f0ac021d66a0725da5fbda34e0924fd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Goran=20Ra=C4=91enovi=C4=87?= Date: Thu, 8 May 2025 16:38:13 +0200 Subject: dt-bindings: vendor-prefixes: Add Ultratronik MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Ultratronik GmbH is a German electronics company: https://www.ultratronik-ems.de/ Signed-off-by: Goran Rađenović Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250508143818.2574558-2-goran.radni@gmail.com Signed-off-by: Alexandre Torgue --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 86f6a19b28ae..e9f534c21bf5 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1607,6 +1607,8 @@ patternProperties: description: Universal Scientific Industrial Co., Ltd. "^usr,.*": description: U.S. Robotics Corporation + "^ultratronik,.*": + description: Ultratronik GmbH "^utoo,.*": description: Aigo Digital Technology Co., Ltd. "^v3,.*": -- cgit v1.2.3 From 21dc0aa4e777eeb68164332f2b9403179c28c9db Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Goran=20Ra=C4=91enovi=C4=87?= Date: Thu, 8 May 2025 16:38:14 +0200 Subject: dt-bindings: arm: stm32: Document Ultratronik's Fly board DT binding MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This commit documents ultra-fly-sbc devicetree binding based on STM32MP157 SoC. Signed-off-by: Goran Rađenović Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250508143818.2574558-3-goran.radni@gmail.com Signed-off-by: Alexandre Torgue --- Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml index 75ef877530f9..408532504a24 100644 --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -188,6 +188,11 @@ properties: - const: phytec,phycore-stm32mp157c-som - const: st,stm32mp157 + - description: Ultratronik STM32MP1 SBC based Boards + items: + - const: ultratronik,stm32mp157c-ultra-fly-sbc + - const: st,stm32mp157 + - description: ST STM32MP257 based Boards items: - enum: -- cgit v1.2.3 From fe750a871d90e081c52ce1988e1fbc85576152a3 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 16 Apr 2025 14:02:19 +0200 Subject: dt-bindings: phy: mediatek,dsi-phy: Add support for MT6893 Add support for the MediaTek Dimensity 1200 (MT6893) SoC: the DSI PHY found in this chip is fully compatible with the one found in the MT8183 SoC. Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250416120220.147798-1-angelogioacchino.delregno@collabora.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml index f6e494d0d89b..acdbce937b0a 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml @@ -30,6 +30,7 @@ properties: - const: mediatek,mt8173-mipi-tx - items: - enum: + - mediatek,mt6893-mipi-tx - mediatek,mt8188-mipi-tx - mediatek,mt8195-mipi-tx - mediatek,mt8365-mipi-tx -- cgit v1.2.3 From 1b1e949924fb59e98d9401681b139e92e75686ac Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 16 Apr 2025 14:02:20 +0200 Subject: dt-bindings: phy: mediatek,tphy: Add support for MT6893 Add a compatible string for the MediaTek Dimensity 1200 (MT6893) SoC: this chip integrates a MediaTek generic T-PHY version 2. Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250416120220.147798-2-angelogioacchino.delregno@collabora.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/mediatek,tphy.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml index 6be3aa4557e5..b2218c151939 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml @@ -78,6 +78,7 @@ properties: - items: - enum: - mediatek,mt2712-tphy + - mediatek,mt6893-tphy - mediatek,mt7629-tphy - mediatek,mt7986-tphy - mediatek,mt8183-tphy -- cgit v1.2.3 From c8e7d528284a0bb1cd462b994c464bf31d24a0ce Mon Sep 17 00:00:00 2001 From: Zhang Yi Date: Wed, 14 May 2025 17:45:46 +0800 Subject: ASoC: dt-bindings: Add Everest ES8389 audio CODEC Add device tree binding documentation for Everest ES8389 which is different from ES8388 Signed-off-by: Zhang Yi Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250514094546.35508-3-zhangyi@everest-semi.com Signed-off-by: Mark Brown --- .../devicetree/bindings/sound/everest,es8389.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/everest,es8389.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/everest,es8389.yaml b/Documentation/devicetree/bindings/sound/everest,es8389.yaml new file mode 100644 index 000000000000..a673df485ab3 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/everest,es8389.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/everest,es8389.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Everest ES8389 audio CODEC + +maintainers: + - Michael Zhang + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + const: everest,es8389 + + reg: + maxItems: 1 + + clocks: + items: + - description: clock for master clock (MCLK) + + clock-names: + items: + - const: mclk + + "#sound-dai-cells": + const: 0 + +required: + - compatible + - reg + - "#sound-dai-cells" + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + es8389: codec@10 { + compatible = "everest,es8389"; + reg = <0x10>; + #sound-dai-cells = <0>; + }; + }; -- cgit v1.2.3 From 5b3a91b207c00a8d27f75ce8aaa9860844da72c8 Mon Sep 17 00:00:00 2001 From: Xu Yang Date: Wed, 30 Apr 2025 17:44:59 +0800 Subject: dt-bindings: phy: imx8mq-usb: fix fsl,phy-tx-vboost-level-microvolt property The ticket TKT0676370 shows the description of TX_VBOOST_LVL is wrong in register PHY_CTRL3 bit[31:29]. 011: Corresponds to a launch amplitude of 1.12 V. 010: Corresponds to a launch amplitude of 1.04 V. 000: Corresponds to a launch amplitude of 0.88 V. After updated: 011: Corresponds to a launch amplitude of 0.844 V. 100: Corresponds to a launch amplitude of 1.008 V. 101: Corresponds to a launch amplitude of 1.156 V. This will correct it accordingly. Fixes: b2e75563dc39 ("dt-bindings: phy: imx8mq-usb: add phy tuning properties") Cc: stable@vger.kernel.org Reviewed-by: Jun Li Signed-off-by: Xu Yang Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250430094502.2723983-1-xu.yang_2@nxp.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml index daee0c0fc915..c468207eb951 100644 --- a/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml @@ -63,8 +63,7 @@ properties: fsl,phy-tx-vboost-level-microvolt: description: Adjust the boosted transmit launch pk-pk differential amplitude - minimum: 880 - maximum: 1120 + enum: [844, 1008, 1156] fsl,phy-comp-dis-tune-percent: description: -- cgit v1.2.3 From 7325e0995f414af1cfa38be965dc47248cb4ec45 Mon Sep 17 00:00:00 2001 From: Xu Yang Date: Wed, 30 Apr 2025 17:45:00 +0800 Subject: dt-bindings: phy: imx8mq-usb: add imx95 tuning support The parameter value of below 3 properties are USB PHY specific. i.MX8MP and i.MX95 USB PHY has different meanings. This will enlarge parameters value and add constraints for them. - fsl,phy-tx-vref-tune-percent - fsl,phy-tx-rise-tune-percent - fsl,phy-comp-dis-tune-percent Reviewed-by: Jun Li Signed-off-by: Xu Yang Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250430094502.2723983-2-xu.yang_2@nxp.com Signed-off-by: Vinod Koul --- .../bindings/phy/fsl,imx8mq-usb-phy.yaml | 34 ++++++++++++++++++++-- 1 file changed, 31 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml index c468207eb951..22dd91591a09 100644 --- a/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml @@ -43,15 +43,15 @@ properties: fsl,phy-tx-vref-tune-percent: description: Tunes the HS DC level relative to the nominal level - minimum: 94 + minimum: 90 maximum: 124 fsl,phy-tx-rise-tune-percent: description: Adjusts the rise/fall time duration of the HS waveform relative to its nominal value - minimum: 97 - maximum: 103 + minimum: 90 + maximum: 120 fsl,phy-tx-preemp-amp-tune-microamp: description: @@ -111,6 +111,34 @@ allOf: reg: maxItems: 1 + - if: + properties: + compatible: + enum: + - fsl,imx8mq-usb-phy + - fsl,imx8mp-usb-phy + then: + properties: + fsl,phy-tx-vref-tune-percent: + minimum: 94 + fsl,phy-tx-rise-tune-percent: + minimum: 97 + maximum: 103 + + - if: + properties: + compatible: + contains: + enum: + - fsl,imx95-usb-phy + then: + properties: + fsl,phy-tx-vref-tune-percent: + maximum: 108 + fsl,phy-comp-dis-tune-percent: + minimum: 94 + maximum: 104 + - if: required: - orientation-switch -- cgit v1.2.3 From 1d6fc048b86b76db73073ded8e84b0fd8757c908 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 14 Apr 2025 20:18:23 -0500 Subject: dt-bindings: phy: rockchip: Convert RK3399 PCIe PHY to schema Convert the Rockchip RK3399 PCIe PHY to DT schema format. Move the example to the GRF binding as that has the complete block. Signed-off-by: Rob Herring (Arm) Reviewed-by: Heiko Stuebner Link: https://lore.kernel.org/r/20250415011824.2320039-1-robh@kernel.org Signed-off-by: Vinod Koul --- .../bindings/phy/rockchip,rk3399-pcie-phy.yaml | 45 ++++++++++++++++++++++ .../devicetree/bindings/phy/rockchip-pcie-phy.txt | 36 ----------------- .../devicetree/bindings/soc/rockchip/grf.yaml | 13 ++++++- 3 files changed, 56 insertions(+), 38 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/rockchip,rk3399-pcie-phy.yaml delete mode 100644 Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/rockchip,rk3399-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,rk3399-pcie-phy.yaml new file mode 100644 index 000000000000..f46f065e5dbe --- /dev/null +++ b/Documentation/devicetree/bindings/phy/rockchip,rk3399-pcie-phy.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/rockchip,rk3399-pcie-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3399 PCIE PHY + +maintainers: + - Heiko Stuebner + +properties: + compatible: + const: rockchip,rk3399-pcie-phy + + '#phy-cells': + oneOf: + - const: 0 + deprecated: true + - const: 1 + description: One lane per phy mode + + clocks: + maxItems: 1 + + clock-names: + const: refclk + + resets: + maxItems: 1 + + reset-names: + const: phy + +required: + - compatible + - '#phy-cells' + - clocks + - clock-names + - resets + - reset-names + +additionalProperties: false + +... diff --git a/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt deleted file mode 100644 index b496042f1f44..000000000000 --- a/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt +++ /dev/null @@ -1,36 +0,0 @@ -Rockchip PCIE PHY ------------------------ - -Required properties: - - compatible: rockchip,rk3399-pcie-phy - - clocks: Must contain an entry in clock-names. - See ../clocks/clock-bindings.txt for details. - - clock-names: Must be "refclk" - - resets: Must contain an entry in reset-names. - See ../reset/reset.txt for details. - - reset-names: Must be "phy" - -Required properties for legacy PHY mode (deprecated): - - #phy-cells: must be 0 - -Required properties for per-lane PHY mode (preferred): - - #phy-cells: must be 1 - -Example: - -grf: syscon@ff770000 { - compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; - #address-cells = <1>; - #size-cells = <1>; - - ... - - pcie_phy: pcie-phy { - compatible = "rockchip,rk3399-pcie-phy"; - #phy-cells = <0>; - clocks = <&cru SCLK_PCIEPHY_REF>; - clock-names = "refclk"; - resets = <&cru SRST_PCIEPHY>; - reset-names = "phy"; - }; -}; diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml index 2f61c1b95fea..fc328c4a35e4 100644 --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml @@ -201,8 +201,8 @@ allOf: pcie-phy: type: object - description: - Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt + $ref: /schemas/phy/rockchip,rk3399-pcie-phy.yaml# + unevaluatedProperties: false patternProperties: "^phy@[0-9a-f]+$": @@ -326,6 +326,15 @@ examples: #phy-cells = <0>; }; + pcie-phy { + compatible = "rockchip,rk3399-pcie-phy"; + #phy-cells = <1>; + clocks = <&cru SCLK_PCIEPHY_REF>; + clock-names = "refclk"; + resets = <&cru SRST_PCIEPHY>; + reset-names = "phy"; + }; + phy@f780 { compatible = "rockchip,rk3399-emmc-phy"; reg = <0xf780 0x20>; -- cgit v1.2.3 From 59cf7546079e3d08d105369c48f8834970290082 Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Sun, 4 May 2025 17:45:18 +0300 Subject: dt-bindings: phy: add exynos2200 eusb2 phy support Document the exynos2200 eUSB2 compatible. Unlike the currently documented Qualcomm SoCs, the driver doesn't make use of reset lines for reset control and uses more clocks. Signed-off-by: Ivaylo Ivanov Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250504144527.1723980-2-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Vinod Koul --- .../bindings/phy/samsung,exynos2200-eusb2-phy.yaml | 80 ++++++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/samsung,exynos2200-eusb2-phy.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/samsung,exynos2200-eusb2-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,exynos2200-eusb2-phy.yaml new file mode 100644 index 000000000000..5e7e1bc2e39a --- /dev/null +++ b/Documentation/devicetree/bindings/phy/samsung,exynos2200-eusb2-phy.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/samsung,exynos2200-eusb2-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos2200 eUSB2 phy controller + +maintainers: + - Ivaylo Ivanov + +description: + Samsung Exynos2200 eUSB2 phy, based on Synopsys eUSB2 IP block, supports + LS/FS/HS usb connectivity. + +properties: + compatible: + enum: + - samsung,exynos2200-eusb2-phy + + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + clocks: + items: + - description: Reference clock + - description: Bus (APB) clock + - description: Control clock + + clock-names: + items: + - const: ref + - const: bus + - const: ctrl + + resets: + maxItems: 1 + + phys: + maxItems: 1 + description: + Phandle to eUSB2 to USB 2.0 repeater + + vdd-supply: + description: + Phandle to 0.88V regulator supply to PHY digital circuit. + + vdda12-supply: + description: + Phandle to 1.2V regulator supply to PHY refclk pll block. + +required: + - compatible + - reg + - "#phy-cells" + - clocks + - clock-names + - vdd-supply + - vdda12-supply + +additionalProperties: false + +examples: + - | + usb_hsphy: phy@10ab0000 { + compatible = "samsung,exynos2200-eusb2-phy"; + reg = <0x10ab0000 0x10000>; + #phy-cells = <0>; + + clocks = <&cmu_hsi0 7>, + <&cmu_hsi0 5>, + <&cmu_hsi0 8>; + clock-names = "ref", "bus", "ctrl"; + + vdd-supply = <&vreg_0p88>; + vdda12-supply = <&vreg_1p2>; + }; -- cgit v1.2.3 From e4c9a7b475e5d0d9b2440ee48f91d1364eabd6cb Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Sun, 4 May 2025 17:45:19 +0300 Subject: dt-bindings: phy: samsung,usb3-drd-phy: add exynos2200 support Document support for Exynos2200. As the USBDRD 3.2 4nm controller consists of Synopsys eUSB2.0 phy and USBDP/SS combophy, which will be handled by external drivers, define only the bus clocked used by the link controller. Signed-off-by: Ivaylo Ivanov Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250504144527.1723980-3-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Vinod Koul --- .../bindings/phy/samsung,usb3-drd-phy.yaml | 38 +++++++++++++++++++--- 1 file changed, 34 insertions(+), 4 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml index fdddddc7d611..cc60d2f6f70e 100644 --- a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml +++ b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml @@ -26,6 +26,7 @@ properties: compatible: enum: - google,gs101-usb31drd-phy + - samsung,exynos2200-usb32drd-phy - samsung,exynos5250-usbdrd-phy - samsung,exynos5420-usbdrd-phy - samsung,exynos5433-usbdrd-phy @@ -34,24 +35,32 @@ properties: - samsung,exynos850-usbdrd-phy clocks: - minItems: 2 + minItems: 1 maxItems: 5 clock-names: - minItems: 2 + minItems: 1 maxItems: 5 description: | - At least two clocks:: + Typically two clocks: - Main PHY clock (same as USB DRD controller i.e. DWC3 IP clock), used for register access. - PHY reference clock (usually crystal clock), used for PHY operations, associated by phy name. It is used to determine bit values for clock settings register. For Exynos5420 this is given as 'sclk_usbphy30' - in the CMU. + in the CMU. It's not needed for Exynos2200. "#phy-cells": const: 1 + phys: + maxItems: 1 + description: + USBDRD-underlying high-speed PHY + + phy-names: + const: hs + port: $ref: /schemas/graph.yaml#/properties/port description: @@ -151,6 +160,27 @@ allOf: - vdda-usbdp-supply - vddh-usbdp-supply + - if: + properties: + compatible: + contains: + enum: + - samsung,exynos2200-usb32drd-phy + then: + properties: + clocks: + maxItems: 1 + clock-names: + items: + - const: phy + reg: + maxItems: 1 + reg-names: + maxItems: 1 + required: + - phys + - phy-names + - if: properties: compatible: -- cgit v1.2.3 From 5161890f13623175924376bc423edb63d9cb28b5 Mon Sep 17 00:00:00 2001 From: Leo Yan Date: Tue, 1 Apr 2025 19:07:08 +0100 Subject: Documentation: coresight: Document AUX pause and resume This adds description for AUX pause and resume. It gives introduction for what's AUX pause and resume and records usage examples. Signed-off-by: Leo Yan Reviewed-by: James Clark Signed-off-by: Suzuki K Poulose Link: https://lore.kernel.org/r/20250401180708.385396-8-leo.yan@arm.com --- Documentation/trace/coresight/coresight-perf.rst | 31 ++++++++++++++++++++++++ 1 file changed, 31 insertions(+) (limited to 'Documentation') diff --git a/Documentation/trace/coresight/coresight-perf.rst b/Documentation/trace/coresight/coresight-perf.rst index d087aae7d492..30be89320621 100644 --- a/Documentation/trace/coresight/coresight-perf.rst +++ b/Documentation/trace/coresight/coresight-perf.rst @@ -78,6 +78,37 @@ enabled like:: Please refer to the kernel configuration help for more information. +Fine-grained tracing with AUX pause and resume +---------------------------------------------- + +Arm CoreSight may generate a large amount of hardware trace data, which +will lead to overhead in recording and distract users when reviewing +profiling result. To mitigate the issue of excessive trace data, Perf +provides AUX pause and resume functionality for fine-grained tracing. + +The AUX pause and resume can be triggered by associated events. These +events can be ftrace tracepoints (including static and dynamic +tracepoints) or PMU events (e.g. CPU PMU cycle event). To create a perf +session with AUX pause / resume, three configuration terms are +introduced: + +- "aux-action=start-paused": it is specified for the cs_etm PMU event to + launch in a paused state. +- "aux-action=pause": an associated event is specified with this term + to pause AUX trace. +- "aux-action=resume": an associated event is specified with this term + to resume AUX trace. + +Example for triggering AUX pause and resume with ftrace tracepoints:: + + perf record -e cs_etm/aux-action=start-paused/k,syscalls:sys_enter_openat/aux-action=resume/,syscalls:sys_exit_openat/aux-action=pause/ ls + +Example for triggering AUX pause and resume with PMU event:: + + perf record -a -e cs_etm/aux-action=start-paused/k \ + -e cycles/aux-action=pause,period=10000000/ \ + -e cycles/aux-action=resume,period=1050000/ -- sleep 1 + Perf test - Verify kernel and userspace perf CoreSight work ----------------------------------------------------------- -- cgit v1.2.3 From 31eebeef8cdd4c9bddc9d34053cab6553616d0b7 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 14 Apr 2025 15:57:26 +0100 Subject: dt-bindings: phy: renesas,usb2-phy: Add clock constraint for RZ/G2L family The RZ/G2L family requires two clocks for USB2 PHY, which are already defined in the DTSI files. Add a constraint in the DT binding document to ensure validation with `dtbs_check`. Signed-off-by: Lad Prabhakar Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250414145729.343133-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml index af275cea3456..f8d15f239b18 100644 --- a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml @@ -107,6 +107,9 @@ allOf: contains: const: renesas,rzg2l-usb2-phy then: + properties: + clocks: + minItems: 2 required: - resets -- cgit v1.2.3 From 9c4fbefc962dd13694b4a5051f432ed435c92220 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 14 Apr 2025 15:57:27 +0100 Subject: dt-bindings: phy: renesas,usb2-phy: Document RZ/V2H(P) SoC Document USB2.0 phy bindings for RZ/V2H(P) ("R9A09gG57") SoC. RZ/V2H(P) USB2.0 phy is similar to one found on the RZ/G2L SoC, but it needs additional configuration to be done as compared RZ/G2L USB2.0 phy. To handle this difference a SoC specific compat string is added for RZ/V2H(P) SoC. Like the RZ/G2L SoC, the RZ/V2H(P) USB2.0 PHY requires the `resets` property and has two clocks. Signed-off-by: Lad Prabhakar Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250414145729.343133-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml index f8d15f239b18..2822dce8d9f4 100644 --- a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml @@ -16,6 +16,7 @@ properties: - enum: - renesas,usb2-phy-r8a77470 # RZ/G1C - renesas,usb2-phy-r9a08g045 # RZ/G3S + - renesas,usb2-phy-r9a09g057 # RZ/V2H(P) - items: - enum: @@ -105,7 +106,9 @@ allOf: properties: compatible: contains: - const: renesas,rzg2l-usb2-phy + enum: + - renesas,usb2-phy-r9a09g057 + - renesas,rzg2l-usb2-phy then: properties: clocks: -- cgit v1.2.3 From d78b565371314e48242cb9383d0f9d331119ab2e Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Sat, 3 May 2025 22:15:10 +0200 Subject: dt-bindings: phy: rockchip,inno-usb2phy: add rk3036 compatible Add compatible for the USB2 phy in the Rockchip RK3036 SoC. Apart from some bits that got swapped around in the phy registers, the block is nearly the same as the one on the rk3128. Signed-off-by: Heiko Stuebner Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250503201512.991277-2-heiko@sntech.de Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml index 6a7ef556414c..7bcefe8c22d1 100644 --- a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml +++ b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml @@ -13,6 +13,7 @@ properties: compatible: enum: - rockchip,px30-usb2phy + - rockchip,rk3036-usb2phy - rockchip,rk3128-usb2phy - rockchip,rk3228-usb2phy - rockchip,rk3308-usb2phy @@ -184,6 +185,7 @@ allOf: contains: enum: - rockchip,px30-usb2phy + - rockchip,rk3036-usb2phy - rockchip,rk3128-usb2phy - rockchip,rk3228-usb2phy - rockchip,rk3308-usb2phy -- cgit v1.2.3 From abf55cdf9c5e58bac1feaff2e21bec43b898746c Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Tue, 15 Apr 2025 13:00:04 +0800 Subject: dt-bindings: phy: rockchip,inno-usb2phy: add rk3562 Add compatible for the USB2 phy in the Rockchip RK3562 SoC. Signed-off-by: Kever Yang Reviewed-by: Heiko Stuebner Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250415050005.52773-1-kever.yang@rock-chips.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml index 7bcefe8c22d1..58e735b5dd05 100644 --- a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml +++ b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml @@ -20,6 +20,7 @@ properties: - rockchip,rk3328-usb2phy - rockchip,rk3366-usb2phy - rockchip,rk3399-usb2phy + - rockchip,rk3562-usb2phy - rockchip,rk3568-usb2phy - rockchip,rk3576-usb2phy - rockchip,rk3588-usb2phy @@ -192,6 +193,7 @@ allOf: - rockchip,rk3328-usb2phy - rockchip,rk3366-usb2phy - rockchip,rk3399-usb2phy + - rockchip,rk3562-usb2phy - rockchip,rk3568-usb2phy - rockchip,rk3588-usb2phy - rockchip,rv1108-usb2phy -- cgit v1.2.3 From 9cfdd7752ba5f8cc9b8191e8c9aeeec246241fa4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= Date: Wed, 14 May 2025 08:36:06 -0400 Subject: regulator: dt-bindings: mt6357: Drop fixed compatible requirement MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some of the regulators on the MT6357 PMIC currently reference the fixed-regulator dt-binding, which enforces the presence of a regulator-fixed compatible. However since all regulators on the MT6357 PMIC are handled by a single mt6357-regulator driver, probed through MFD, the compatibles don't serve any purpose. In fact they cause failures in the DT kselftest since they aren't probed by the fixed regulator driver as would be expected. Furthermore this is the only dt-binding in this family like this: mt6359-regulator and mt6358-regulator don't require those compatibles. Commit d77e89b7b03f ("arm64: dts: mediatek: mt6357: Drop regulator-fixed compatibles") removed the compatibles from Devicetree, but missed updating the binding, which still requires them, introducing dt-binding errors. Remove the compatible requirement by referencing the plain regulator dt-binding instead to fix the dt-binding errors. Fixes: d77e89b7b03f ("arm64: dts: mediatek: mt6357: Drop regulator-fixed compatibles") Signed-off-by: Nícolas F. R. A. Prado Link: https://patch.msgid.link/20250514-mt6357-regulator-fixed-compatibles-removal-bindings-v1-1-2421e9cc6cc7@collabora.com Signed-off-by: Mark Brown --- .../bindings/regulator/mediatek,mt6357-regulator.yaml | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml index 6327bb2f6ee0..698266c09e25 100644 --- a/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml @@ -33,7 +33,7 @@ patternProperties: "^ldo-v(camio18|aud28|aux18|io18|io28|rf12|rf18|cn18|cn28|fe28)$": type: object - $ref: fixed-regulator.yaml# + $ref: regulator.yaml# unevaluatedProperties: false description: Properties for single fixed LDO regulator. @@ -112,7 +112,6 @@ examples: regulator-enable-ramp-delay = <220>; }; mt6357_vfe28_reg: ldo-vfe28 { - compatible = "regulator-fixed"; regulator-name = "vfe28"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; @@ -125,14 +124,12 @@ examples: regulator-enable-ramp-delay = <110>; }; mt6357_vrf18_reg: ldo-vrf18 { - compatible = "regulator-fixed"; regulator-name = "vrf18"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-enable-ramp-delay = <110>; }; mt6357_vrf12_reg: ldo-vrf12 { - compatible = "regulator-fixed"; regulator-name = "vrf12"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; @@ -157,14 +154,12 @@ examples: regulator-enable-ramp-delay = <264>; }; mt6357_vcn28_reg: ldo-vcn28 { - compatible = "regulator-fixed"; regulator-name = "vcn28"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-enable-ramp-delay = <264>; }; mt6357_vcn18_reg: ldo-vcn18 { - compatible = "regulator-fixed"; regulator-name = "vcn18"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -183,7 +178,6 @@ examples: regulator-enable-ramp-delay = <264>; }; mt6357_vcamio_reg: ldo-vcamio18 { - compatible = "regulator-fixed"; regulator-name = "vcamio"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -212,28 +206,24 @@ examples: regulator-always-on; }; mt6357_vaux18_reg: ldo-vaux18 { - compatible = "regulator-fixed"; regulator-name = "vaux18"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-enable-ramp-delay = <264>; }; mt6357_vaud28_reg: ldo-vaud28 { - compatible = "regulator-fixed"; regulator-name = "vaud28"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-enable-ramp-delay = <264>; }; mt6357_vio28_reg: ldo-vio28 { - compatible = "regulator-fixed"; regulator-name = "vio28"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-enable-ramp-delay = <264>; }; mt6357_vio18_reg: ldo-vio18 { - compatible = "regulator-fixed"; regulator-name = "vio18"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; -- cgit v1.2.3 From 0e4e9d75899cae4e7f379c50fa3d0121eff9641f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 14 May 2025 12:57:03 +0200 Subject: ASoC: dt-bindings: mediatek: Simplify mediatek,clk-provider "mediatek,clk-provider" property is a string, not an string array, thus "items" is not really correct. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250514105702.28622-2-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- .../devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml | 7 +++---- .../devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml | 7 +++---- 2 files changed, 6 insertions(+), 8 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml index 76d5a437dc8f..7ba2ea2dfa0b 100644 --- a/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml +++ b/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml @@ -96,10 +96,9 @@ patternProperties: mediatek,clk-provider: $ref: /schemas/types.yaml#/definitions/string description: Indicates dai-link clock master. - items: - enum: - - cpu - - codec + enum: + - cpu + - codec additionalProperties: false diff --git a/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml b/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml index cbc641ecbe94..037f21443ad1 100644 --- a/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml +++ b/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml @@ -124,10 +124,9 @@ patternProperties: mediatek,clk-provider: $ref: /schemas/types.yaml#/definitions/string description: Indicates dai-link clock master. - items: - enum: - - cpu - - codec + enum: + - cpu + - codec required: - link-name -- cgit v1.2.3 From b81cd165e4a5599bd96c11adf40872fcbc5fa54f Mon Sep 17 00:00:00 2001 From: Sheetal Date: Mon, 12 May 2025 05:00:09 +0000 Subject: dt-bindings: Document Tegra264 ADMA support Add Tegra264 ADMA support to the device tree bindings documentation. The Tegra264 ADMA hardware supports 64 DMA channels and requires specific register configurations. Signed-off-by: Sheetal Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250512050010.1025259-2-sheetal@nvidia.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml index d3f8c269916c..da0235e451d6 100644 --- a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml @@ -19,6 +19,7 @@ properties: - enum: - nvidia,tegra210-adma - nvidia,tegra186-adma + - nvidia,tegra264-adma - items: - enum: - nvidia,tegra234-adma @@ -92,6 +93,7 @@ allOf: contains: enum: - nvidia,tegra186-adma + - nvidia,tegra264-adma then: anyOf: - properties: -- cgit v1.2.3 From ec52f10a31dc69c1ded30812bd17335ac23b1c60 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Wed, 23 Apr 2025 15:34:17 +0100 Subject: dt-bindings: dma: rz-dmac: Restrict properties for RZ/A1H Make sure we don't allow for the clocks, clock-names, resets, reset-names. and power-domains properties for the Renesas RZ/A1H SoC because its DMAC doesn't have clocks, resets, and power domains. Fixes: 209efec19c4c ("dt-bindings: dma: rz-dmac: Document RZ/A1H SoC") Signed-off-by: Fabrizio Castro Acked-by: Conor Dooley Reviewed-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20250423143422.3747702-2-fabrizio.castro.jz@renesas.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml index b356251de5a8..82de3b927479 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml @@ -112,6 +112,14 @@ allOf: - resets - reset-names + else: + properties: + clocks: false + clock-names: false + power-domains: false + resets: false + reset-names: false + additionalProperties: false examples: -- cgit v1.2.3 From 22228b933ce2639d67168fd35423c1be196edab0 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Wed, 23 Apr 2025 15:34:18 +0100 Subject: dt-bindings: dma: rz-dmac: Document RZ/V2H(P) family of SoCs Document the Renesas RZ/V2H(P) family of SoCs DMAC block. The Renesas RZ/V2H(P) DMAC is very similar to the one found on the Renesas RZ/G2L family of SoCs, but there are some differences: * It only uses one register area * It only uses one clock * It only uses one reset * Instead of using MID/IRD it uses REQ No * It is connected to the Interrupt Control Unit (ICU) Signed-off-by: Fabrizio Castro Acked-by: Conor Dooley Reviewed-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250423143422.3747702-3-fabrizio.castro.jz@renesas.com Signed-off-by: Vinod Koul --- .../devicetree/bindings/dma/renesas,rz-dmac.yaml | 101 +++++++++++++++++---- 1 file changed, 82 insertions(+), 19 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml index 82de3b927479..92b12762c472 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml @@ -11,19 +11,23 @@ maintainers: properties: compatible: - items: - - enum: - - renesas,r7s72100-dmac # RZ/A1H - - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five - - renesas,r9a07g044-dmac # RZ/G2{L,LC} - - renesas,r9a07g054-dmac # RZ/V2L - - renesas,r9a08g045-dmac # RZ/G3S - - const: renesas,rz-dmac + oneOf: + - items: + - enum: + - renesas,r7s72100-dmac # RZ/A1H + - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five + - renesas,r9a07g044-dmac # RZ/G2{L,LC} + - renesas,r9a07g054-dmac # RZ/V2L + - renesas,r9a08g045-dmac # RZ/G3S + - const: renesas,rz-dmac + + - const: renesas,r9a09g057-dmac # RZ/V2H(P) reg: items: - description: Control and channel register block - description: DMA extended resource selector block + minItems: 1 interrupts: maxItems: 17 @@ -52,6 +56,7 @@ properties: items: - description: DMA main clock - description: DMA register access clock + minItems: 1 clock-names: items: @@ -61,10 +66,10 @@ properties: '#dma-cells': const: 1 description: - The cell specifies the encoded MID/RID values of the DMAC port - connected to the DMA client and the slave channel configuration - parameters. - bits[0:9] - Specifies MID/RID value + The cell specifies the encoded MID/RID or the REQ No values of + the DMAC port connected to the DMA client and the slave channel + configuration parameters. + bits[0:9] - Specifies the MID/RID or the REQ No value bit[10] - Specifies DMA request high enable (HIEN) bit[11] - Specifies DMA request detection type (LVL) bits[12:14] - Specifies DMAACK output mode (AM) @@ -80,12 +85,26 @@ properties: items: - description: Reset for DMA ARESETN reset terminal - description: Reset for DMA RST_ASYNC reset terminal + minItems: 1 reset-names: items: - const: arst - const: rst_async + renesas,icu: + description: + It must contain the phandle to the ICU and the index of the DMAC as seen + from the ICU. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: Phandle to the ICU node. + - description: + The number of the DMAC as seen from the ICU, i.e. parameter k from + register ICU_DMkSELy. This may differ from the actual DMAC instance + number. + required: - compatible - reg @@ -98,13 +117,25 @@ allOf: - $ref: dma-controller.yaml# - if: - not: - properties: - compatible: - contains: - enum: - - renesas,r7s72100-dmac + properties: + compatible: + contains: + enum: + - renesas,r9a07g043-dmac + - renesas,r9a07g044-dmac + - renesas,r9a07g054-dmac + - renesas,r9a08g045-dmac then: + properties: + reg: + minItems: 2 + clocks: + minItems: 2 + resets: + minItems: 2 + + renesas,icu: false + required: - clocks - clock-names @@ -112,13 +143,45 @@ allOf: - resets - reset-names - else: + - if: + properties: + compatible: + contains: + const: renesas,r7s72100-dmac + then: properties: + reg: + minItems: 2 + clocks: false clock-names: false power-domains: false resets: false reset-names: false + renesas,icu: false + + - if: + properties: + compatible: + contains: + const: renesas,r9a09g057-dmac + then: + properties: + reg: + maxItems: 1 + clocks: + maxItems: 1 + resets: + maxItems: 1 + + clock-names: false + reset-names: false + + required: + - clocks + - power-domains + - renesas,icu + - resets additionalProperties: false -- cgit v1.2.3 From 6f3e123439662b29736b02ea35b94049b103b7e1 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 20 Mar 2025 16:19:21 -0500 Subject: dt-bindings: mmc: Remove redundant sdhci.txt The properties in sdhci.txt are documented in sdhci-common.yaml, too. Remove the txt binding. Signed-off-by: Rob Herring (Arm) Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/20250320211922.1135669-1-robh@kernel.org Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/sdhci.txt | 13 ------------- 1 file changed, 13 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mmc/sdhci.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/sdhci.txt b/Documentation/devicetree/bindings/mmc/sdhci.txt deleted file mode 100644 index 0e9923a64024..000000000000 --- a/Documentation/devicetree/bindings/mmc/sdhci.txt +++ /dev/null @@ -1,13 +0,0 @@ -The properties specific for SD host controllers. For properties shared by MMC -host controllers refer to the mmc[1] bindings. - - [1] Documentation/devicetree/bindings/mmc/mmc.txt - -Optional properties: -- sdhci-caps-mask: The sdhci capabilities register is incorrect. This 64bit - property corresponds to the bits in the sdhci capability register. If the bit - is on in the mask then the bit is incorrect in the register and should be - turned off, before applying sdhci-caps. -- sdhci-caps: The sdhci capabilities register is incorrect. This 64bit - property corresponds to the bits in the sdhci capability register. If the - bit is on in the property then the bit should be turned on. -- cgit v1.2.3 From cff4ca59f946b53d155b48c07c9c02e30fac8de0 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 20 Mar 2025 16:35:46 -0500 Subject: dt-bindings: mmc: marvell,xenon-sdhci: Allow "dma-coherent" and "iommus" The Marvell xenon-sdhci block can be cache-coherent and needs the "dma-coherent" property. It can also be behind an IOMMU and needs the "iommus" property. Signed-off-by: Rob Herring (Arm) Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250320-dt-marvell-mmc-v1-1-e51002ea0238@kernel.org Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml index 3f48d8292d5b..259f465ea369 100644 --- a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml @@ -52,9 +52,14 @@ properties: - const: core - const: axi + dma-coherent: true + interrupts: maxItems: 1 + iommus: + maxItems: 1 + marvell,pad-type: $ref: /schemas/types.yaml#/definitions/string enum: -- cgit v1.2.3 From 3974f06454ce1e8ee79581bab41ad587032dc671 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 20 Mar 2025 16:35:47 -0500 Subject: dt-bindings: mmc: marvell,xenon-sdhci: Add reference to sdhci-common.yaml The Marvell xenon-sdhci block is an SDHCI and can use properties from sdhci-common.yaml, so change the reference. Signed-off-by: Rob Herring (Arm) Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250320-dt-marvell-mmc-v1-2-e51002ea0238@kernel.org Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml index 259f465ea369..e7df7a2a0331 100644 --- a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml @@ -147,7 +147,7 @@ properties: This property provides the re-tuning counter. allOf: - - $ref: mmc-controller.yaml# + - $ref: sdhci-common.yaml# - if: properties: compatible: -- cgit v1.2.3 From 44aa44051ffcb9fe2f230120c57d67c56f0d2d0f Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 20 Mar 2025 16:35:48 -0500 Subject: dt-bindings: mmc: marvell,xenon-sdhci: Drop requiring 2 clocks The "axi" clock is optional on at least the "marvell,armada-ap806-sdhci" variant. Not sure what's correct here, so just drop the constraint. Signed-off-by: Rob Herring (Arm) Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250320-dt-marvell-mmc-v1-3-e51002ea0238@kernel.org Signed-off-by: Ulf Hansson --- .../devicetree/bindings/mmc/marvell,xenon-sdhci.yaml | 20 -------------------- 1 file changed, 20 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml index e7df7a2a0331..ee2ddef36369 100644 --- a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml @@ -169,26 +169,6 @@ allOf: marvell,pad-type: false - - if: - properties: - compatible: - contains: - enum: - - marvell,armada-cp110-sdhci - - marvell,armada-ap807-sdhci - - marvell,armada-ap806-sdhci - - then: - properties: - clocks: - minItems: 2 - - clock-names: - items: - - const: core - - const: axi - - required: - compatible - reg -- cgit v1.2.3 From 8e127dbbf6c363e6b4bb486d631d936fd6d1646d Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Wed, 26 Mar 2025 14:39:37 +0000 Subject: dt-bindings: mmc: renesas,sdhi: Document RZ/V2N support Add SDHI bindings for the Renesas RZ/V2N (a.k.a R9A09G056) SoC. Use `renesas,sdhi-r9a09g057` as a fallback since the SD/MMC block on RZ/V2N is identical to the one on RZ/V2H(P), allowing reuse of the existing driver without modifications. Signed-off-by: Lad Prabhakar Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250326143945.82142-8-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml index 773baa6c2656..7563623876fc 100644 --- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml +++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml @@ -69,7 +69,9 @@ properties: - renesas,sdhi-r9a09g011 # RZ/V2M - const: renesas,rzg2l-sdhi - items: - - const: renesas,sdhi-r9a09g047 # RZ/G3E + - enum: + - renesas,sdhi-r9a09g047 # RZ/G3E + - renesas,sdhi-r9a09g056 # RZ/V2N - const: renesas,sdhi-r9a09g057 # RZ/V2H(P) reg: -- cgit v1.2.3 From a06f633e18bcc4b5513fd54269ce60a1357450b1 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Sat, 5 Apr 2025 19:35:26 +0200 Subject: dt-bindings: mmc: arasan,sdhci: Add Renesas RZ/N1D This instance has a wakeup irq defined. It is currently not used by the driver. Signed-off-by: Wolfram Sang Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250405173631.13564-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson --- .../devicetree/bindings/mmc/arasan,sdhci.yaml | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml index 9075add020bf..8e79de97b242 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml @@ -38,6 +38,15 @@ allOf: - items: - const: clk_out_sd1 - const: clk_in_sd1 + - if: + properties: + compatible: + contains: + const: renesas,rzn1-sdhci + then: + properties: + interrupts: + minItems: 2 properties: compatible: @@ -45,6 +54,10 @@ properties: - const: arasan,sdhci-8.9a # generic Arasan SDHCI 8.9a PHY - const: arasan,sdhci-4.9a # generic Arasan SDHCI 4.9a PHY - const: arasan,sdhci-5.1 # generic Arasan SDHCI 5.1 PHY + - items: + - const: renesas,r9a06g032-sdhci # Renesas RZ/N1D SoC + - const: renesas,rzn1-sdhci # Renesas RZ/N1 family + - const: arasan,sdhci-8.9a - items: - const: rockchip,rk3399-sdhci-5.1 # rk3399 eMMC PHY - const: arasan,sdhci-5.1 @@ -109,7 +122,14 @@ properties: - const: gate interrupts: - maxItems: 1 + minItems: 1 + maxItems: 2 + + interrupt-names: + minItems: 1 + items: + - const: int + - const: wakeup phys: maxItems: 1 -- cgit v1.2.3 From 157d4ba8dfdfb1aebf8c2d059e5aa187abe06182 Mon Sep 17 00:00:00 2001 From: Inochi Amaoto Date: Mon, 14 Apr 2025 06:35:01 +0800 Subject: dt-bindings: mmc: sdhci-of-dwcmhsc: Add Sophgo SG2044 support The sdhci IP of SG2044 is similar to it of SG2042. They share the same clock and controller configuration. Add compatible string for SG2044. Signed-off-by: Inochi Amaoto Reviewed-by: Chen Wang Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250413223507.46480-8-inochiama@gmail.com Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml index e6e604072d3c..5fb347167004 100644 --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml @@ -19,6 +19,9 @@ properties: - rockchip,rk3562-dwcmshc - rockchip,rk3576-dwcmshc - const: rockchip,rk3588-dwcmshc + - items: + - const: sophgo,sg2044-dwcmshc + - const: sophgo,sg2042-dwcmshc - enum: - rockchip,rk3568-dwcmshc - rockchip,rk3588-dwcmshc -- cgit v1.2.3 From fe1c2abfc8a34e7e58940cb43a033fa86a785072 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 16 Apr 2025 14:02:45 +0200 Subject: dt-bindings: mmc: mtk-sd: Add support for Dimensity 1200 MT6893 Add a compatible for the MediaTek Dimensity 1200 (MT6893) SoC. All of the MMC/SD controllers in this chip are compatible with the ones found in MT8183, but do also make use of an optional crypto clock when enabling HW disk encryption. Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250416120245.147951-1-angelogioacchino.delregno@collabora.com Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml index 0debccbd6519..6dd26ad31491 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -32,6 +32,7 @@ properties: - const: mediatek,mt2701-mmc - items: - enum: + - mediatek,mt6893-mmc - mediatek,mt8186-mmc - mediatek,mt8188-mmc - mediatek,mt8192-mmc @@ -299,6 +300,7 @@ allOf: properties: compatible: enum: + - mediatek,mt6893-mmc - mediatek,mt8186-mmc - mediatek,mt8188-mmc - mediatek,mt8195-mmc -- cgit v1.2.3 From 88f2f360de9f6d8d068dd7ef084fc36d21f3cc9f Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 17 Apr 2025 11:13:00 -0400 Subject: dt-bindings: mmc: fsl,esdhc: add compatible string fsl,ls1021a-esdhc Add compatible string fsl,ls1021a-esdhc for LS1021a SoC. Signed-off-by: Frank Li Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250417151300.3570021-1-Frank.Li@nxp.com Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml b/Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml index b86ffb53b18b..62087cf920df 100644 --- a/Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml +++ b/Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml @@ -24,6 +24,7 @@ properties: - fsl,t1040-esdhc - fsl,t4240-esdhc - fsl,ls1012a-esdhc + - fsl,ls1021a-esdhc - fsl,ls1028a-esdhc - fsl,ls1088a-esdhc - fsl,ls1043a-esdhc -- cgit v1.2.3 From a0ba0461c4f3750a310f77b1530768dccc0c8c39 Mon Sep 17 00:00:00 2001 From: Danila Tikhonov Date: Tue, 22 Apr 2025 23:17:12 +0300 Subject: dt-bindings: mmc: sdhci-msm: Add the SM7150 compatible Add compatible for the SDHCI block found in SM7150. Signed-off-by: Danila Tikhonov Link: https://lore.kernel.org/r/20250422-sm7150-upstream-v1-11-bf9a9081631d@jiaxyga.com Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml index eed9063e9bb3..2b2cbce2458b 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml @@ -60,6 +60,7 @@ properties: - qcom,sm6125-sdhci - qcom,sm6350-sdhci - qcom,sm6375-sdhci + - qcom,sm7150-sdhci - qcom,sm8150-sdhci - qcom,sm8250-sdhci - qcom,sm8350-sdhci -- cgit v1.2.3 From 1dfc7d1ab7839dff5b348d4f5915757203d4294c Mon Sep 17 00:00:00 2001 From: Alexey Charkov Date: Wed, 23 Apr 2025 14:53:29 +0400 Subject: dt-bindings: mmc: vt8500-sdmmc: Convert to YAML Rewrite the textual description for the WonderMedia SDMMC controller as YAML schema, and switch the filename to follow the compatible string. Signed-off-by: Alexey Charkov Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250423-vt8500-sdmmc-binding-v2-1-ea4f17fd0638@gmail.com Signed-off-by: Ulf Hansson --- .../devicetree/bindings/mmc/vt8500-sdmmc.txt | 23 -------- .../devicetree/bindings/mmc/wm,wm8505-sdhc.yaml | 66 ++++++++++++++++++++++ 2 files changed, 66 insertions(+), 23 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt create mode 100644 Documentation/devicetree/bindings/mmc/wm,wm8505-sdhc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt b/Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt deleted file mode 100644 index d7fb6abb3eb8..000000000000 --- a/Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt +++ /dev/null @@ -1,23 +0,0 @@ -* Wondermedia WM8505/WM8650 SD/MMC Host Controller - -This file documents differences between the core properties described -by mmc.txt and the properties used by the wmt-sdmmc driver. - -Required properties: -- compatible: Should be "wm,wm8505-sdhc". -- interrupts: Two interrupts are required - regular irq and dma irq. - -Optional properties: -- sdon-inverted: SD_ON bit is inverted on the controller - -Examples: - -sdhc@d800a000 { - compatible = "wm,wm8505-sdhc"; - reg = <0xd800a000 0x1000>; - interrupts = <20 21>; - clocks = <&sdhc>; - bus-width = <4>; - sdon-inverted; -}; - diff --git a/Documentation/devicetree/bindings/mmc/wm,wm8505-sdhc.yaml b/Documentation/devicetree/bindings/mmc/wm,wm8505-sdhc.yaml new file mode 100644 index 000000000000..5b55174e9088 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/wm,wm8505-sdhc.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/wm,wm8505-sdhc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: WonderMedia SoC SDHCI Controller + +maintainers: + - Alexey Charkov + +allOf: + - $ref: mmc-controller.yaml# + +properties: + compatible: + oneOf: + - const: wm,wm8505-sdhc + - items: + - const: wm,wm8650-sdhc + - const: wm,wm8505-sdhc + - items: + - const: wm,wm8750-sdhc + - const: wm,wm8505-sdhc + - items: + - const: wm,wm8850-sdhc + - const: wm,wm8505-sdhc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + items: + - description: SDMMC controller interrupt + - description: SDMMC controller DMA interrupt + + sdon-inverted: + type: boolean + description: All chips before (not including) WM8505 rev. A2 treated their + "clock stop" bit (register offset 0x08 a.k.a. SDMMC_BUSMODE, bit 0x10) + as "set 1 to disable SD clock", while all the later versions treated it + as "set 0 to disable SD clock". Set this property for later versions of + wm,wm8505-sdhc. On wm,wm8650-sdhc and later this property is implied and + does not need to be set explicitly + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + mmc@d800a000 { + compatible = "wm,wm8505-sdhc"; + reg = <0xd800a000 0x1000>; + interrupts = <20>, <21>; + clocks = <&sdhc>; + bus-width = <4>; + sdon-inverted; + }; -- cgit v1.2.3 From ac01fa73f5309a35eff83be61442a8891159b487 Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Sat, 10 May 2025 16:37:30 -0400 Subject: tracepoint: Have tracepoints created with DECLARE_TRACE() have _tp suffix Most tracepoints in the kernel are created with TRACE_EVENT(). The TRACE_EVENT() macro (and DECLARE_EVENT_CLASS() and DEFINE_EVENT() where in reality, TRACE_EVENT() is just a helper macro that calls those other two macros), will create not only a tracepoint (the function trace_() used in the kernel), it also exposes the tracepoint to user space along with defining what fields will be saved by that tracepoint. There are a few places that tracepoints are created in the kernel that are not exposed to userspace via tracefs. They can only be accessed from code within the kernel. These tracepoints are created with DEFINE_TRACE() Most of these tracepoints end with "_tp". This is useful as when the developer sees that, they know that the tracepoint is for in-kernel only (meaning it can only be accessed inside the kernel, either directly by the kernel or indirectly via modules and BPF programs) and is not exposed to user space. Instead of making this only a process to add "_tp", enforce it by making the DECLARE_TRACE() append the "_tp" suffix to the tracepoint. This requires adding DECLARE_TRACE_EVENT() macros for the TRACE_EVENT() macro to use that keeps the original name. Link: https://lore.kernel.org/all/20250418083351.20a60e64@gandalf.local.home/ Cc: netdev Cc: Jiri Olsa Cc: Peter Zijlstra Cc: David Ahern Cc: Juri Lelli Cc: Breno Leitao Cc: Alexei Starovoitov Cc: Andrii Nakryiko Cc: Gabriele Monaco Cc: Masami Hiramatsu Link: https://lore.kernel.org/20250510163730.092fad5b@gandalf.local.home Acked-by: Mathieu Desnoyers Acked-by: Andrii Nakryiko Signed-off-by: Steven Rostedt (Google) --- Documentation/trace/tracepoints.rst | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/trace/tracepoints.rst b/Documentation/trace/tracepoints.rst index decabcc77b56..b35c40e3abbe 100644 --- a/Documentation/trace/tracepoints.rst +++ b/Documentation/trace/tracepoints.rst @@ -71,7 +71,7 @@ In subsys/file.c (where the tracing statement must be added):: void somefct(void) { ... - trace_subsys_eventname(arg, task); + trace_subsys_eventname_tp(arg, task); ... } @@ -129,12 +129,12 @@ within an if statement with the following:: for (i = 0; i < count; i++) tot += calculate_nuggets(); - trace_foo_bar(tot); + trace_foo_bar_tp(tot); } -All trace_() calls have a matching trace__enabled() +All trace__tp() calls have a matching trace__enabled() function defined that returns true if the tracepoint is enabled and -false otherwise. The trace_() should always be within the +false otherwise. The trace__tp() should always be within the block of the if (trace__enabled()) to prevent races between the tracepoint being enabled and the check being seen. @@ -143,7 +143,10 @@ the static_key of the tracepoint to allow the if statement to be implemented with jump labels and avoid conditional branches. .. note:: The convenience macro TRACE_EVENT provides an alternative way to - define tracepoints. Check http://lwn.net/Articles/379903, + define tracepoints. Note, DECLARE_TRACE(foo) creates a function + "trace_foo_tp()" whereas TRACE_EVENT(foo) creates a function + "trace_foo()", and also exposes the tracepoint as a trace event in + /sys/kernel/tracing/events directory. Check http://lwn.net/Articles/379903, http://lwn.net/Articles/381064 and http://lwn.net/Articles/383362 for a series of articles with more details. @@ -159,7 +162,9 @@ In a C file:: void do_trace_foo_bar_wrapper(args) { - trace_foo_bar(args); + trace_foo_bar_tp(args); // for tracepoints created via DECLARE_TRACE + // or + trace_foo_bar(args); // for tracepoints created via TRACE_EVENT } In the header file:: -- cgit v1.2.3 From 1275c70c4c1ca764cbf9ced01fb4286e4f49747e Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Tue, 29 Apr 2025 16:33:31 -0500 Subject: dt-bindings: gpio: tegra186: Add gpio-ranges Add optional gpio-ranges property. Signed-off-by: Aaron Kling Reviewed-by: Linus Walleij Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250429-tegra186-pinctrl-v1-2-722c7c42394e@gmail.com Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml b/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml index 4ef06b2ff1ff..065f5761a93f 100644 --- a/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml @@ -111,6 +111,9 @@ properties: gpio-controller: true + gpio-ranges: + maxItems: 1 + "#gpio-cells": description: | Indicates how many cells are used in a consumer's GPIO specifier. In the -- cgit v1.2.3 From 51b081cdb92377d7f923912d589cab414db600c4 Mon Sep 17 00:00:00 2001 From: Ben Zong-You Xie Date: Wed, 14 May 2025 17:53:47 +0800 Subject: dt-bindings: cache: add QiLai compatible to ax45mp Add a new compatible string for ax45mp-cache on QiLai SoC. Also, add allOf constraints to enforce specific cache-sets and cache-size values for qilai-ax45mp-cache. Signed-off-by: Ben Zong-You Xie Signed-off-by: Conor Dooley --- .../bindings/cache/andestech,ax45mp-cache.yaml | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml index 82668d327344..4de5bb2e5f24 100644 --- a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml +++ b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml @@ -28,7 +28,9 @@ select: properties: compatible: items: - - const: renesas,r9a07g043f-ax45mp-cache + - enum: + - andestech,qilai-ax45mp-cache + - renesas,r9a07g043f-ax45mp-cache - const: andestech,ax45mp-cache - const: cache @@ -66,6 +68,20 @@ required: - cache-size - cache-unified +allOf: + - if: + properties: + compatible: + contains: + const: andestech,qilai-ax45mp-cache + + then: + properties: + cache-sets: + const: 2048 + cache-size: + const: 2097152 + examples: - | #include -- cgit v1.2.3 From 1d2c5d5f3f44ba45bf0e2ef9a51c77256b99afd2 Mon Sep 17 00:00:00 2001 From: George Moussalem Date: Mon, 12 May 2025 18:36:46 +0400 Subject: dt-bindings: mfd: qcom,tcsr: Add compatible for ipq5018 Document the qcom,tcsr-ipq5018 compatible. Signed-off-by: George Moussalem Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250512-ipq5018-syscon-v1-1-eb1ad2414c3c@outlook.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml index 7e7225aadae3..14ae3f00ef7e 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml @@ -41,6 +41,7 @@ properties: - qcom,sm8450-tcsr - qcom,tcsr-apq8064 - qcom,tcsr-apq8084 + - qcom,tcsr-ipq5018 - qcom,tcsr-ipq5332 - qcom,tcsr-ipq5424 - qcom,tcsr-ipq6018 -- cgit v1.2.3 From d8e66f9ab0488970394140638e876847b0316df8 Mon Sep 17 00:00:00 2001 From: Juerg Haefliger Date: Tue, 29 Apr 2025 16:49:55 +0200 Subject: dt-bindings: arm: qcom: Document HP EliteBook Ultra G1q Add a compatible for the HP EliteBook Ultra G1q 14 inch Notebook AI PC. The laptop is based on the Snapdragon X Elite (x1e80100) SoC. PDF link: http://www8.hp.com/h20195/v2/GetDocument.aspx?docname=c08996392 Signed-off-by: Juerg Haefliger Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250429144957.2088284-3-juerg.haefliger@canonical.com Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index a61c85a47e2e..56f78f0f3803 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1141,6 +1141,7 @@ properties: - asus,vivobook-s15 - asus,zenbook-a14-ux3407ra - dell,xps13-9345 + - hp,elitebook-ultra-g1q - hp,omnibook-x14 - lenovo,yoga-slim7x - microsoft,romulus13 -- cgit v1.2.3 From 31b6c343639e118cb8cd600736c55b88713e8ff6 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 1 May 2025 19:34:12 +0200 Subject: media: dt-bindings: renesas,fcp: add top-level constraints Properties with variable number of items per each device are expected to have widest constraints in top-level "properties:" block and further customized (narrowed) in "if:then:". Add missing top-level constraints for clocks and clock-names. Acked-by: Conor Dooley Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250501173411.134130-3-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/media/renesas,fcp.yaml | 25 +++++++++++----------- 1 file changed, 13 insertions(+), 12 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/renesas,fcp.yaml b/Documentation/devicetree/bindings/media/renesas,fcp.yaml index f94dacd96278..acc08ba7940b 100644 --- a/Documentation/devicetree/bindings/media/renesas,fcp.yaml +++ b/Documentation/devicetree/bindings/media/renesas,fcp.yaml @@ -35,9 +35,18 @@ properties: reg: maxItems: 1 - clocks: true - - clock-names: true + clocks: + minItems: 1 + items: + - description: Main clock + - description: Register access clock + - description: Video clock + + clock-names: + items: + - const: aclk + - const: pclk + - const: vclk iommus: maxItems: 1 @@ -69,15 +78,7 @@ allOf: then: properties: clocks: - items: - - description: Main clock - - description: Register access clock - - description: Video clock - clock-names: - items: - - const: aclk - - const: pclk - - const: vclk + minItems: 3 required: - clock-names else: -- cgit v1.2.3 From d8a9ea5d3bebd7b1641869e7cab3db615d4cc4e7 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 1 May 2025 19:34:13 +0200 Subject: media: dt-bindings: renesas,vsp1: add top-level constraints Properties with variable number of items per each device are expected to have widest constraints in top-level "properties:" block and further customized (narrowed) in "if:then:". Add missing top-level constraints for clocks and clock-names. Acked-by: Conor Dooley Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250501173411.134130-4-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/media/renesas,vsp1.yaml | 24 ++++++++++++---------- 1 file changed, 13 insertions(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml index 1a03e67462a4..dc4b8f00aa7d 100644 --- a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml +++ b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml @@ -33,8 +33,18 @@ properties: interrupts: maxItems: 1 - clocks: true - clock-names: true + clocks: + minItems: 1 + items: + - description: Main clock + - description: Register access clock + - description: Video clock + + clock-names: + items: + - const: aclk + - const: pclk + - const: vclk power-domains: maxItems: 1 @@ -78,15 +88,7 @@ allOf: then: properties: clocks: - items: - - description: Main clock - - description: Register access clock - - description: Video clock - clock-names: - items: - - const: aclk - - const: pclk - - const: vclk + minItems: 3 required: - clock-names else: -- cgit v1.2.3 From 4abc1f14e2b86f61ef7856f0f2c33fcf08d65c66 Mon Sep 17 00:00:00 2001 From: Alper Ak Date: Tue, 13 May 2025 12:24:51 +0300 Subject: documentation: networking: devlink: Fix a typo in devlink-trap.rst Fix a typo in the documentation: "errorrs" -> "errors". Signed-off-by: Alper Ak Reviewed-by: Simon Horman Link: https://patch.msgid.link/20250513092451.22387-1-alperyasinak1@gmail.com Signed-off-by: Jakub Kicinski --- Documentation/networking/devlink/devlink-trap.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/networking/devlink/devlink-trap.rst b/Documentation/networking/devlink/devlink-trap.rst index 2c14dfe69b3a..5885e21e2212 100644 --- a/Documentation/networking/devlink/devlink-trap.rst +++ b/Documentation/networking/devlink/devlink-trap.rst @@ -451,7 +451,7 @@ be added to the following table: * - ``udp_parsing`` - ``drop`` - Traps packets dropped due to an error in the UDP header parsing. - This packet trap could include checksum errorrs, an improper UDP + This packet trap could include checksum errors, an improper UDP length detected (smaller than 8 bytes) or detection of header truncation. * - ``tcp_parsing`` -- cgit v1.2.3 From 685e7b1522f7ba279030fa5d0e984a5781961309 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 13 May 2025 09:33:56 +0200 Subject: dt-bindings: net: snps,dwmac: Align mdio node in example with bindings According to the bindings, the MDIO subnode should be called "mdio". Update the example to match this. Signed-off-by: Geert Uytterhoeven Reviewed-by: Simon Horman Acked-by: Rob Herring (Arm) Link: https://patch.msgid.link/308d72c2fe8e575e6e137b99743329c2d53eceea.1747121550.git.geert+renesas@glider.be Signed-off-by: Jakub Kicinski --- Documentation/devicetree/bindings/net/snps,dwmac.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index b525eca53850..90b79283e228 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -710,7 +710,7 @@ examples: }; }; - mdio0 { + mdio { #address-cells = <1>; #size-cells = <0>; compatible = "snps,dwmac-mdio"; -- cgit v1.2.3 From a9fb87b8b86918e34ef6bf3316311f41bc1a5b1f Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 13 May 2025 15:13:16 -0700 Subject: netlink: specs: tc: fix a couple of attribute names Fix up spelling of two attribute names. These are clearly typoes and will prevent C codegen from working. Let's treat this as a fix to get the correction into users' hands ASAP, and prevent anyone depending on the wrong names. Fixes: a1bcfde83669 ("doc/netlink/specs: Add a spec for tc") Link: https://patch.msgid.link/20250513221316.841700-1-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/tc.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/tc.yaml b/Documentation/netlink/specs/tc.yaml index aacccea5dfe4..5e1ff04f51f2 100644 --- a/Documentation/netlink/specs/tc.yaml +++ b/Documentation/netlink/specs/tc.yaml @@ -2745,7 +2745,7 @@ attribute-sets: type: u16 byte-order: big-endian - - name: key-l2-tpv3-sid + name: key-l2tpv3-sid type: u32 byte-order: big-endian - @@ -3504,7 +3504,7 @@ attribute-sets: name: rate64 type: u64 - - name: prate4 + name: prate64 type: u64 - name: burst -- cgit v1.2.3 From f3dd5fb2fa494dcbdb10f8d27f2deac8ef61a2fc Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Tue, 13 May 2025 15:16:38 -0700 Subject: netlink: specs: tc: all actions are indexed arrays Some TC filters have actions listed as indexed arrays of nests and some as just nests. They are all indexed arrays, the handling is common across filters. Fixes: 2267672a6190 ("doc/netlink/specs: Update the tc spec") Link: https://patch.msgid.link/20250513221638.842532-1-kuba@kernel.org Signed-off-by: Jakub Kicinski --- Documentation/netlink/specs/tc.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/netlink/specs/tc.yaml b/Documentation/netlink/specs/tc.yaml index 5e1ff04f51f2..953aa837958b 100644 --- a/Documentation/netlink/specs/tc.yaml +++ b/Documentation/netlink/specs/tc.yaml @@ -2017,7 +2017,8 @@ attribute-sets: attributes: - name: act - type: nest + type: indexed-array + sub-type: nest nested-attributes: tc-act-attrs - name: police @@ -2250,7 +2251,8 @@ attribute-sets: attributes: - name: act - type: nest + type: indexed-array + sub-type: nest nested-attributes: tc-act-attrs - name: police -- cgit v1.2.3 From 4614fd6342ab69feebb067d5db84a9bfb9aada9f Mon Sep 17 00:00:00 2001 From: Vishwaroop A Date: Tue, 13 May 2025 20:00:42 +0000 Subject: spi: dt-bindings: tegra: Document IOMMU property for Tegra234 QSPI Add the 'iommus' property to the Tegra QSPI device tree binding. The property is needed for Tegra234 when using the internal DMA controller, and is not supported on other Tegra chips, as DMA is handled by an external controller. Signed-off-by: Vishwaroop A Acked-by: Conor Dooley Reviewed-by: Jon Hunter Link: https://patch.msgid.link/20250513200043.608292-1-va@nvidia.com Signed-off-by: Mark Brown --- .../devicetree/bindings/spi/nvidia,tegra210-quad.yaml | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml index 48e97e240265..8b3640280559 100644 --- a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml +++ b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml @@ -10,9 +10,6 @@ maintainers: - Thierry Reding - Jonathan Hunter -allOf: - - $ref: spi-controller.yaml# - properties: compatible: enum: @@ -47,6 +44,9 @@ properties: - const: rx - const: tx + iommus: + maxItems: 1 + patternProperties: "@[0-9a-f]+$": type: object @@ -69,6 +69,18 @@ required: unevaluatedProperties: false +allOf: + - $ref: spi-controller.yaml# + - if: + properties: + compatible: + not: + contains: + const: nvidia,tegra234-qspi + then: + properties: + iommus: false + examples: - | #include -- cgit v1.2.3 From e7b9cea718eee4585a947b10086ca51ad27ef5d4 Mon Sep 17 00:00:00 2001 From: Yafang Shao Date: Sun, 11 May 2025 16:36:24 +0800 Subject: vfs: Add sysctl vfs_cache_pressure_denom for bulk file operations On our HDFS servers with 12 HDDs per server, a HDFS datanode[0] startup involves scanning all files and caching their metadata (including dentries and inodes) in memory. Each HDD contains approximately 2 million files, resulting in a total of ~20 million cached dentries after initialization. To minimize dentry reclamation, we set vfs_cache_pressure to 1. Despite this configuration, memory pressure conditions can still trigger reclamation of up to 50% of cached dentries, reducing the cache from 20 million to approximately 10 million entries. During the subsequent cache rebuild period, any HDFS datanode restart operation incurs substantial latency penalties until full cache recovery completes. To maintain service stability, we need to preserve more dentries during memory reclamation. The current minimum reclaim ratio (1/100 of total dentries) remains too aggressive for our workload. This patch introduces vfs_cache_pressure_denom for more granular cache pressure control. The configuration [vfs_cache_pressure=1, vfs_cache_pressure_denom=10000] effectively maintains the full 20 million dentry cache under memory pressure, preventing datanode restart performance degradation. Link: https://hadoop.apache.org/docs/r1.2.1/hdfs_design.html#NameNode+and+DataNodes [0] Signed-off-by: Yafang Shao Link: https://lore.kernel.org/20250511083624.9305-1-laoar.shao@gmail.com Reviewed-by: Jan Kara Signed-off-by: Christian Brauner --- Documentation/admin-guide/sysctl/vm.rst | 32 +++++++++++++++++++++----------- 1 file changed, 21 insertions(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/admin-guide/sysctl/vm.rst b/Documentation/admin-guide/sysctl/vm.rst index 8290177b4f75..d385985b305f 100644 --- a/Documentation/admin-guide/sysctl/vm.rst +++ b/Documentation/admin-guide/sysctl/vm.rst @@ -75,6 +75,7 @@ Currently, these files are in /proc/sys/vm: - unprivileged_userfaultfd - user_reserve_kbytes - vfs_cache_pressure +- vfs_cache_pressure_denom - watermark_boost_factor - watermark_scale_factor - zone_reclaim_mode @@ -1017,19 +1018,28 @@ vfs_cache_pressure This percentage value controls the tendency of the kernel to reclaim the memory which is used for caching of directory and inode objects. -At the default value of vfs_cache_pressure=100 the kernel will attempt to -reclaim dentries and inodes at a "fair" rate with respect to pagecache and -swapcache reclaim. Decreasing vfs_cache_pressure causes the kernel to prefer -to retain dentry and inode caches. When vfs_cache_pressure=0, the kernel will -never reclaim dentries and inodes due to memory pressure and this can easily -lead to out-of-memory conditions. Increasing vfs_cache_pressure beyond 100 -causes the kernel to prefer to reclaim dentries and inodes. +At the default value of vfs_cache_pressure=vfs_cache_pressure_denom the kernel +will attempt to reclaim dentries and inodes at a "fair" rate with respect to +pagecache and swapcache reclaim. Decreasing vfs_cache_pressure causes the +kernel to prefer to retain dentry and inode caches. When vfs_cache_pressure=0, +the kernel will never reclaim dentries and inodes due to memory pressure and +this can easily lead to out-of-memory conditions. Increasing vfs_cache_pressure +beyond vfs_cache_pressure_denom causes the kernel to prefer to reclaim dentries +and inodes. -Increasing vfs_cache_pressure significantly beyond 100 may have negative -performance impact. Reclaim code needs to take various locks to find freeable -directory and inode objects. With vfs_cache_pressure=1000, it will look for -ten times more freeable objects than there are. +Increasing vfs_cache_pressure significantly beyond vfs_cache_pressure_denom may +have negative performance impact. Reclaim code needs to take various locks to +find freeable directory and inode objects. When vfs_cache_pressure equals +(10 * vfs_cache_pressure_denom), it will look for ten times more freeable +objects than there are. +Note: This setting should always be used together with vfs_cache_pressure_denom. + +vfs_cache_pressure_denom +======================== + +Defaults to 100 (minimum allowed value). Requires corresponding +vfs_cache_pressure setting to take effect. watermark_boost_factor ====================== -- cgit v1.2.3 From 132833405e61463d47d6badff1b8080b09b5808e Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Mon, 5 May 2025 19:54:39 +0530 Subject: PCI: Add debugfs support for exposing PTM context MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precision Time Management (PTM) mechanism defined in PCIe spec r6.0, sec 6.21 allows precise coordination of timing information across multiple components in a PCIe hierarchy with independent local time clocks. PCI core already supports enabling PTM in the root port and endpoint devices through PTM Extended Capability registers. But the PTM context supported by the PTM capable components such as Root Complex (RC) and Endpoint (EP) controllers were not exposed as of now. Part of the reason is that the spec doesn't define how the context information is exposed to the software and left it to the vendor implementation. So there is no standardized way to get access to the context information and each vendor have defined their own way. This commit adds debugfs support to expose the PTM context to userspace from both PCIe RC and EP controllers. Since the context information is exposed in a vendor specific way, the debugfs interface allows the controller drivers to implement callbacks for each attribute, to be called by the generic PTM driver. The Controller drivers are expected to call pcie_ptm_create_debugfs() to create the debugfs attributes for the PTM context and call pcie_ptm_destroy_debugfs() to destroy them. The drivers should also populate the relevant callbacks in the 'struct pcie_ptm_ops' structure based on the controller implementation. Below PTM context are exposed through debugfs: PCIe RC ======= 1. PTM Local clock 2. PTM T2 timestamp 3. PTM T3 timestamp 4. PTM Context valid PCIe EP ======= 1. PTM Local clock 2. PTM T1 timestamp 3. PTM T4 timestamp 4. PTM Master clock 5. PTM Context update Signed-off-by: Manivannan Sadhasivam [kwilczynski: fix overflow issue reported by Dan Carpenter from https://lore.kernel.org/linux-pci/b41c1754-c6b7-4805-9f14-7c643d6c5304@suswa.mountain] Signed-off-by: Krzysztof Wilczyński Link: https://patch.msgid.link/20250505-pcie-ptm-v4-1-02d26d51400b@linaro.org --- Documentation/ABI/testing/debugfs-pcie-ptm | 70 ++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 Documentation/ABI/testing/debugfs-pcie-ptm (limited to 'Documentation') diff --git a/Documentation/ABI/testing/debugfs-pcie-ptm b/Documentation/ABI/testing/debugfs-pcie-ptm new file mode 100644 index 000000000000..602d41363571 --- /dev/null +++ b/Documentation/ABI/testing/debugfs-pcie-ptm @@ -0,0 +1,70 @@ +What: /sys/kernel/debug/pcie_ptm_*/local_clock +Date: May 2025 +Contact: Manivannan Sadhasivam +Description: + (RO) PTM local clock in nanoseconds. Applicable for both Root + Complex and Endpoint controllers. + +What: /sys/kernel/debug/pcie_ptm_*/master_clock +Date: May 2025 +Contact: Manivannan Sadhasivam +Description: + (RO) PTM master clock in nanoseconds. Applicable only for + Endpoint controllers. + +What: /sys/kernel/debug/pcie_ptm_*/t1 +Date: May 2025 +Contact: Manivannan Sadhasivam +Description: + (RO) PTM T1 timestamp in nanoseconds. Applicable only for + Endpoint controllers. + +What: /sys/kernel/debug/pcie_ptm_*/t2 +Date: May 2025 +Contact: Manivannan Sadhasivam +Description: + (RO) PTM T2 timestamp in nanoseconds. Applicable only for + Root Complex controllers. + +What: /sys/kernel/debug/pcie_ptm_*/t3 +Date: May 2025 +Contact: Manivannan Sadhasivam +Description: + (RO) PTM T3 timestamp in nanoseconds. Applicable only for + Root Complex controllers. + +What: /sys/kernel/debug/pcie_ptm_*/t4 +Date: May 2025 +Contact: Manivannan Sadhasivam +Description: + (RO) PTM T4 timestamp in nanoseconds. Applicable only for + Endpoint controllers. + +What: /sys/kernel/debug/pcie_ptm_*/context_update +Date: May 2025 +Contact: Manivannan Sadhasivam +Description: + (RW) Control the PTM context update mode. Applicable only for + Endpoint controllers. + + Following values are supported: + + * auto = PTM context auto update trigger for every 10ms + + * manual = PTM context manual update. Writing 'manual' to this + file triggers PTM context update (default) + +What: /sys/kernel/debug/pcie_ptm_*/context_valid +Date: May 2025 +Contact: Manivannan Sadhasivam +Description: + (RW) Control the PTM context validity (local clock timing). + Applicable only for Root Complex controllers. PTM context is + invalidated by hardware if the Root Complex enters low power + mode or changes link frequency. + + Following values are supported: + + * 0 = PTM context invalid (default) + + * 1 = PTM context valid -- cgit v1.2.3 From 494475e5e1c11efa77979e421ee7a3d8e5e8f304 Mon Sep 17 00:00:00 2001 From: Sheetal Date: Mon, 12 May 2025 06:42:56 +0000 Subject: dt-bindings: Update Tegra194 and Tegra234 HDA bindings - Tegra194 and Tegra234 HDA is not compatible with Tegra30, hence update them as standalone compatibles. Also, add necessary logic to the binding doc as HDA clocks and resets for Tegra194 and Tegra234 are different from Tegra30. This fixes below dtbs_check errors: - compatible: 'oneOf' conditional failed, one must be fixed: ['nvidia,tegra194-hda'] is too short 'nvidia,tegra30-hda' was expected 'nvidia,tegra132-hda' was expected - compatible: 'oneOf' conditional failed, one must be fixed: ['nvidia,tegra234-hda'] is too short 'nvidia,tegra30-hda' was expected 'nvidia,tegra132-hda' was expected - hda@3510000: clock-names:1: 'hda2hdmi' was expected - hda@3510000: reset-names:1: 'hda2hdmi' was expected Signed-off-by: Sheetal Reviewed-by: Rob Herring (Arm) Signed-off-by: Takashi Iwai Link: https://patch.msgid.link/20250512064258.1028331-2-sheetal@nvidia.com --- .../bindings/sound/nvidia,tegra30-hda.yaml | 83 +++++++++++++++++++--- 1 file changed, 72 insertions(+), 11 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml index 3ca9affb79a2..703f009862a4 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml @@ -20,11 +20,12 @@ properties: compatible: oneOf: - - const: nvidia,tegra30-hda + - enum: + - nvidia,tegra30-hda + - nvidia,tegra194-hda + - nvidia,tegra234-hda - items: - enum: - - nvidia,tegra234-hda - - nvidia,tegra194-hda - nvidia,tegra186-hda - nvidia,tegra210-hda - nvidia,tegra124-hda @@ -48,10 +49,7 @@ properties: clock-names: minItems: 2 - items: - - const: hda - - const: hda2hdmi - - const: hda2codec_2x + maxItems: 3 resets: minItems: 2 @@ -59,10 +57,7 @@ properties: reset-names: minItems: 2 - items: - - const: hda - - const: hda2hdmi - - const: hda2codec_2x + maxItems: 3 power-domains: maxItems: 1 @@ -93,6 +88,72 @@ required: additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra30-hda + then: + properties: + clocks: + minItems: 3 + clock-names: + items: + - const: hda + - const: hda2hdmi + - const: hda2codec_2x + resets: + minItems: 3 + reset-names: + items: + - const: hda + - const: hda2hdmi + - const: hda2codec_2x + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra194-hda + then: + properties: + clocks: + minItems: 3 + clock-names: + items: + - const: hda + - const: hda2hdmi + - const: hda2codec_2x + resets: + maxItems: 2 + reset-names: + items: + - const: hda + - const: hda2hdmi + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra234-hda + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + items: + - const: hda + - const: hda2codec_2x + resets: + maxItems: 2 + reset-names: + items: + - const: hda + - const: hda2codec_2x + examples: - | #include -- cgit v1.2.3 From 3bc2f3ba7b4d81523f89dfa369edb56507bd63e6 Mon Sep 17 00:00:00 2001 From: Sheetal Date: Mon, 12 May 2025 06:42:57 +0000 Subject: dt-bindings: Document Tegra264 HDA Support For Tegra264 device there is one clock, two resets and no power-domain. Add the Tegra264 compatible and necessary logic to the binding doc to determine appropriate clocks, resets and power-domain properties based on the compatible string. Signed-off-by: Sheetal Reviewed-by: Rob Herring (Arm) Signed-off-by: Takashi Iwai Link: https://patch.msgid.link/20250512064258.1028331-3-sheetal@nvidia.com --- .../bindings/sound/nvidia,tegra30-hda.yaml | 25 ++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml index 703f009862a4..8a8767589ee0 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml @@ -24,6 +24,7 @@ properties: - nvidia,tegra30-hda - nvidia,tegra194-hda - nvidia,tegra234-hda + - nvidia,tegra264-hda - items: - enum: - nvidia,tegra186-hda @@ -44,11 +45,11 @@ properties: maxItems: 1 clocks: - minItems: 2 + minItems: 1 maxItems: 3 clock-names: - minItems: 2 + minItems: 1 maxItems: 3 resets: @@ -153,6 +154,26 @@ allOf: items: - const: hda - const: hda2codec_2x + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra264-hda + then: + properties: + clocks: + maxItems: 1 + clock-names: + items: + - const: hda + resets: + maxItems: 2 + reset-names: + items: + - const: hda + - const: hda2codec_2x + power-domains: false examples: - | -- cgit v1.2.3 From 82534f446daa0d2a995c9d64697add7265dff625 Mon Sep 17 00:00:00 2001 From: Lee Trager Date: Mon, 12 May 2025 11:54:01 -0700 Subject: eth: fbnic: Add devlink dev flash support Add support to update the CMRT and control firmware as well as the UEFI driver on fbnic using devlink dev flash. Make sure the shutdown / quiescence paths like suspend take the devlink lock to prevent them from interrupting the FW flashing process. Signed-off-by: Lee Trager Signed-off-by: Jakub Kicinski Reviewed-by: Jacob Keller Reviewed-by: Simon Horman Link: https://patch.msgid.link/20250512190109.2475614-6-lee@trager.us Signed-off-by: Paolo Abeni --- .../networking/device_drivers/ethernet/meta/fbnic.rst | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'Documentation') diff --git a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst index 3483e498c08e..f8592dec8851 100644 --- a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst +++ b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst @@ -28,6 +28,17 @@ devlink dev info provides version information for all three components. In addition to the version the hg commit hash of the build is included as a separate entry. +Upgrading Firmware +------------------ + +fbnic supports updating firmware using signed PLDM images with devlink dev +flash. PLDM images are written into the flash. Flashing does not interrupt +the operation of the device. + +On host boot the latest UEFI driver is always used, no explicit activation +is required. Firmware activation is required to run new control firmware. cmrt +firmware can only be activated by power cycling the NIC. + Statistics ---------- -- cgit v1.2.3 From bfbe7729d6dd2e2c8ef44f9179ad11ab766150e6 Mon Sep 17 00:00:00 2001 From: Srinivas Pandruvada Date: Thu, 8 May 2025 16:02:39 -0700 Subject: Documentation: admin-guide: pm: Add documentation for agent_types MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add documentation to describe agent_types attribute. Signed-off-by: Srinivas Pandruvada Reviewed-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20250508230250.1186619-3-srinivas.pandruvada@linux.intel.com Signed-off-by: Ilpo Järvinen --- Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst b/Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst index 5151ec312dc0..84608dad84bd 100644 --- a/Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst +++ b/Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst @@ -97,6 +97,11 @@ Attributes in each directory: ``package_id`` This attribute is used to get the package id of this instance. +``agent_types`` + This attribute displays all the hardware agents present within the + domain. Each agent has the capability to control one or more hardware + subsystems, which include: core, cache, memory, and I/O. + The other attributes are same as presented at package_*_die_* level. In most of current use cases, the "max_freq_khz" and "min_freq_khz" -- cgit v1.2.3 From e636e3f7421b2ff8e706a835f78f071cb0d8e197 Mon Sep 17 00:00:00 2001 From: Srinivas Pandruvada Date: Thu, 8 May 2025 16:02:42 -0700 Subject: Documentation: admin-guide: pm: Add documentation for die_id MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add documentation to describe die_id attribute. Signed-off-by: Srinivas Pandruvada Reviewed-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20250508230250.1186619-6-srinivas.pandruvada@linux.intel.com Signed-off-by: Ilpo Järvinen --- Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst b/Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst index 84608dad84bd..d367ba4d744a 100644 --- a/Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst +++ b/Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst @@ -91,6 +91,11 @@ Attributes in each directory: ``domain_id`` This attribute is used to get the power domain id of this instance. +``die_id`` + This attribute is used to get the Linux die id of this instance. + This attribute is only present for domains with core agents and + when the CPUID leaf 0x1f presents die ID. + ``fabric_cluster_id`` This attribute is used to get the fabric cluster id of this instance. -- cgit v1.2.3 From 2de72bb42c149ba7908291bd3dd46e315a7fe65f Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 12 May 2025 16:57:23 -0500 Subject: dt-bindings: ata: Convert st,ahci to DT schema Convert the ST AHCI SATA Controller to DT schema format. The phy-names changes from "ahci_phy" to "sata-phy" with the inclusion of ahci-common.yaml. That's an ABI change, but the Linux driver at least ignores the names. The binding uses "ports-implemented" property, so including ahci-common.yaml is required. Signed-off-by: Rob Herring (Arm) Signed-off-by: Damien Le Moal --- Documentation/devicetree/bindings/ata/ahci-st.txt | 35 ----------- Documentation/devicetree/bindings/ata/st,ahci.yaml | 72 ++++++++++++++++++++++ 2 files changed, 72 insertions(+), 35 deletions(-) delete mode 100644 Documentation/devicetree/bindings/ata/ahci-st.txt create mode 100644 Documentation/devicetree/bindings/ata/st,ahci.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ata/ahci-st.txt b/Documentation/devicetree/bindings/ata/ahci-st.txt deleted file mode 100644 index 909c9935360d..000000000000 --- a/Documentation/devicetree/bindings/ata/ahci-st.txt +++ /dev/null @@ -1,35 +0,0 @@ -STMicroelectronics STi SATA controller - -This binding describes a SATA device. - -Required properties: - - compatible : Must be "st,ahci" - - reg : Physical base addresses and length of register sets - - interrupts : Interrupt associated with the SATA device - - interrupt-names : Associated name must be; "hostc" - - clocks : The phandle for the clock - - clock-names : Associated name must be; "ahci_clk" - - phys : The phandle for the PHY port - - phy-names : Associated name must be; "ahci_phy" - -Optional properties: - - resets : The power-down, soft-reset and power-reset lines of SATA IP - - reset-names : Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst" - -Example: - - /* Example for stih407 family silicon */ - sata0: sata@9b20000 { - compatible = "st,ahci"; - reg = <0x9b20000 0x1000>; - interrupts = ; - interrupt-names = "hostc"; - phys = <&phy_port0 PHY_TYPE_SATA>; - phy-names = "ahci_phy"; - resets = <&powerdown STIH407_SATA0_POWERDOWN>, - <&softreset STIH407_SATA0_SOFTRESET>, - <&softreset STIH407_SATA0_PWR_SOFTRESET>; - reset-names = "pwr-dwn", "sw-rst", "pwr-rst"; - clocks = <&clk_s_c0_flexgen CLK_ICN_REG>; - clock-names = "ahci_clk"; - }; diff --git a/Documentation/devicetree/bindings/ata/st,ahci.yaml b/Documentation/devicetree/bindings/ata/st,ahci.yaml new file mode 100644 index 000000000000..6e8e4b4f3d6c --- /dev/null +++ b/Documentation/devicetree/bindings/ata/st,ahci.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/st,ahci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STi SATA controller + +maintainers: + - Patrice Chotard + +allOf: + - $ref: ahci-common.yaml# + +properties: + compatible: + const: st,ahci + + interrupt-names: + items: + - const: hostc + + clocks: + maxItems: 1 + + clock-names: + items: + - const: ahci_clk + + resets: + items: + - description: Power-down line + - description: Soft-reset line + - description: Power-reset line + + reset-names: + items: + - const: pwr-dwn + - const: sw-rst + - const: pwr-rst + +required: + - compatible + - interrupt-names + - phys + - phy-names + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + + sata@9b20000 { + compatible = "st,ahci"; + reg = <0x9b20000 0x1000>; + interrupts = ; + interrupt-names = "hostc"; + phys = <&phy_port0 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + resets = <&powerdown STIH407_SATA0_POWERDOWN>, + <&softreset STIH407_SATA0_SOFTRESET>, + <&softreset STIH407_SATA0_PWR_SOFTRESET>; + reset-names = "pwr-dwn", "sw-rst", "pwr-rst"; + clocks = <&clk_s_c0_flexgen CLK_ICN_REG>; + clock-names = "ahci_clk"; + }; -- cgit v1.2.3 From b562d788e27ab0a8016951672793525e35bf6eec Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 12 May 2025 16:57:29 -0500 Subject: dt-bindings: ata: Convert apm,xgene-ahci to DT schema Convert the APM X-Gene AHCI SATA Controller to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) Signed-off-by: Damien Le Moal --- .../devicetree/bindings/ata/apm,xgene-ahci.yaml | 58 ++++++++++++++++ .../devicetree/bindings/ata/apm-xgene.txt | 77 ---------------------- 2 files changed, 58 insertions(+), 77 deletions(-) create mode 100644 Documentation/devicetree/bindings/ata/apm,xgene-ahci.yaml delete mode 100644 Documentation/devicetree/bindings/ata/apm-xgene.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ata/apm,xgene-ahci.yaml b/Documentation/devicetree/bindings/ata/apm,xgene-ahci.yaml new file mode 100644 index 000000000000..7dc942808656 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/apm,xgene-ahci.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/apm,xgene-ahci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: APM X-Gene 6.0 Gb/s SATA host controller + +maintainers: + - Rob Herring + +allOf: + - $ref: ahci-common.yaml# + +properties: + compatible: + enum: + - apm,xgene-ahci + - apm,xgene-ahci-pcie + + reg: + minItems: 4 + items: + - description: AHCI memory resource + - description: Host controller core + - description: Host controller diagnostic + - description: Host controller AXI + - description: Host controller MUX + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - clocks + - phys + - phy-names + +unevaluatedProperties: false + +examples: + - | + sata@1a400000 { + compatible = "apm,xgene-ahci"; + reg = <0x1a400000 0x1000>, + <0x1f220000 0x1000>, + <0x1f22d000 0x1000>, + <0x1f22e000 0x1000>, + <0x1f227000 0x1000>; + clocks = <&sataclk 0>; + dma-coherent; + interrupts = <0x0 0x87 0x4>; + phys = <&phy2 0>; + phy-names = "sata-phy"; + }; diff --git a/Documentation/devicetree/bindings/ata/apm-xgene.txt b/Documentation/devicetree/bindings/ata/apm-xgene.txt deleted file mode 100644 index 02e690a675db..000000000000 --- a/Documentation/devicetree/bindings/ata/apm-xgene.txt +++ /dev/null @@ -1,77 +0,0 @@ -* APM X-Gene 6.0 Gb/s SATA host controller nodes - -SATA host controller nodes are defined to describe on-chip Serial ATA -controllers. Each SATA controller (pair of ports) have its own node. - -Required properties: -- compatible : Shall contain: - * "apm,xgene-ahci" -- reg : First memory resource shall be the AHCI memory - resource. - Second memory resource shall be the host controller - core memory resource. - Third memory resource shall be the host controller - diagnostic memory resource. - 4th memory resource shall be the host controller - AXI memory resource. - 5th optional memory resource shall be the host - controller MUX memory resource if required. -- interrupts : Interrupt-specifier for SATA host controller IRQ. -- clocks : Reference to the clock entry. -- phys : A list of phandles + phy-specifiers, one for each - entry in phy-names. -- phy-names : Should contain: - * "sata-phy" for the SATA 6.0Gbps PHY - -Optional properties: -- dma-coherent : Present if dma operations are coherent -- status : Shall be "ok" if enabled or "disabled" if disabled. - Default is "ok". - -Example: - sataclk: sataclk { - compatible = "fixed-clock"; - #clock-cells = <1>; - clock-frequency = <100000000>; - clock-output-names = "sataclk"; - }; - - phy2: phy@1f22a000 { - compatible = "apm,xgene-phy"; - reg = <0x0 0x1f22a000 0x0 0x100>; - #phy-cells = <1>; - }; - - phy3: phy@1f23a000 { - compatible = "apm,xgene-phy"; - reg = <0x0 0x1f23a000 0x0 0x100>; - #phy-cells = <1>; - }; - - sata2: sata@1a400000 { - compatible = "apm,xgene-ahci"; - reg = <0x0 0x1a400000 0x0 0x1000>, - <0x0 0x1f220000 0x0 0x1000>, - <0x0 0x1f22d000 0x0 0x1000>, - <0x0 0x1f22e000 0x0 0x1000>, - <0x0 0x1f227000 0x0 0x1000>; - interrupts = <0x0 0x87 0x4>; - dma-coherent; - clocks = <&sataclk 0>; - phys = <&phy2 0>; - phy-names = "sata-phy"; - }; - - sata3: sata@1a800000 { - compatible = "apm,xgene-ahci-pcie"; - reg = <0x0 0x1a800000 0x0 0x1000>, - <0x0 0x1f230000 0x0 0x1000>, - <0x0 0x1f23d000 0x0 0x1000>, - <0x0 0x1f23e000 0x0 0x1000>, - <0x0 0x1f237000 0x0 0x1000>; - interrupts = <0x0 0x88 0x4>; - dma-coherent; - clocks = <&sataclk 0>; - phys = <&phy3 0>; - phy-names = "sata-phy"; - }; -- cgit v1.2.3 From ca7cf1f41f387ba5f015f96e17aa05dcd3cdc1dc Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 12 May 2025 16:57:41 -0500 Subject: dt-bindings: ata: Convert cavium,ebt3000-compact-flash to DT schema Convert the Cavium Compact Flash Controller to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) Signed-off-by: Damien Le Moal --- .../bindings/ata/cavium,ebt3000-compact-flash.yaml | 59 ++++++++++++++++++++++ .../bindings/ata/cavium-compact-flash.txt | 30 ----------- 2 files changed, 59 insertions(+), 30 deletions(-) create mode 100644 Documentation/devicetree/bindings/ata/cavium,ebt3000-compact-flash.yaml delete mode 100644 Documentation/devicetree/bindings/ata/cavium-compact-flash.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ata/cavium,ebt3000-compact-flash.yaml b/Documentation/devicetree/bindings/ata/cavium,ebt3000-compact-flash.yaml new file mode 100644 index 000000000000..349f289b81e6 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/cavium,ebt3000-compact-flash.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/cavium,ebt3000-compact-flash.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cavium Compact Flash + +maintainers: + - Rob Herring + +description: + The Cavium Compact Flash device is connected to the Octeon Boot Bus, and is + thus a child of the Boot Bus device. It can read and write industry standard + compact flash devices. + +properties: + compatible: + const: cavium,ebt3000-compact-flash + + reg: + description: The base address of the CF chip select banks. + items: + - description: CF chip select bank 0 + - description: CF chip select bank 1 + + cavium,bus-width: + description: The width of the connection to the CF devices. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [8, 16] + + cavium,true-ide: + description: True IDE mode when present. + type: boolean + + cavium,dma-engine-handle: + description: A phandle for the DMA Engine connected to this device. + $ref: /schemas/types.yaml#/definitions/phandle + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <1>; + + compact-flash@5,0 { + compatible = "cavium,ebt3000-compact-flash"; + reg = <5 0 0x10000>, <6 0 0x10000>; + cavium,bus-width = <16>; + cavium,true-ide; + cavium,dma-engine-handle = <&dma0>; + }; + }; diff --git a/Documentation/devicetree/bindings/ata/cavium-compact-flash.txt b/Documentation/devicetree/bindings/ata/cavium-compact-flash.txt deleted file mode 100644 index 3bacc8e0931e..000000000000 --- a/Documentation/devicetree/bindings/ata/cavium-compact-flash.txt +++ /dev/null @@ -1,30 +0,0 @@ -* Compact Flash - -The Cavium Compact Flash device is connected to the Octeon Boot Bus, -and is thus a child of the Boot Bus device. It can read and write -industry standard compact flash devices. - -Properties: -- compatible: "cavium,ebt3000-compact-flash"; - - Compatibility with many Cavium evaluation boards. - -- reg: The base address of the CF chip select banks. Depending on - the device configuration, there may be one or two banks. - -- cavium,bus-width: The width of the connection to the CF devices. Valid - values are 8 and 16. - -- cavium,true-ide: Optional, if present the CF connection is in True IDE mode. - -- cavium,dma-engine-handle: Optional, a phandle for the DMA Engine connected - to this device. - -Example: - compact-flash@5,0 { - compatible = "cavium,ebt3000-compact-flash"; - reg = <5 0 0x10000>, <6 0 0x10000>; - cavium,bus-width = <16>; - cavium,true-ide; - cavium,dma-engine-handle = <&dma0>; - }; -- cgit v1.2.3 From 6130ed3cd0b4c5e22757e7aa1819abd66f0987e3 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 12 May 2025 16:57:48 -0500 Subject: dt-bindings: ata: Convert marvell,orion-sata to DT schema Convert the Marvell Orion SATA Controller to DT schema format. The clocks and clock-names properties were missing. The names for phy-names were incorrect. The maximum "nr-ports" was determined from the Linux driver. Signed-off-by: Rob Herring (Arm) Signed-off-by: Damien Le Moal --- .../bindings/ata/marvell,orion-sata.yaml | 83 ++++++++++++++++++++++ Documentation/devicetree/bindings/ata/marvell.txt | 22 ------ 2 files changed, 83 insertions(+), 22 deletions(-) create mode 100644 Documentation/devicetree/bindings/ata/marvell,orion-sata.yaml delete mode 100644 Documentation/devicetree/bindings/ata/marvell.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ata/marvell,orion-sata.yaml b/Documentation/devicetree/bindings/ata/marvell,orion-sata.yaml new file mode 100644 index 000000000000..f656ea9223d6 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/marvell,orion-sata.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/marvell,orion-sata.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Orion SATA + +maintainers: + - Andrew Lunn + - Gregory Clement + +allOf: + - $ref: sata-common.yaml# + +properties: + compatible: + enum: + - marvell,orion-sata + - marvell,armada-370-sata + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 8 + + clock-names: + minItems: 1 + items: + - const: '0' + - const: '1' + - const: '2' + - const: '3' + - const: '4' + - const: '5' + - const: '6' + - const: '7' + + interrupts: + maxItems: 1 + + nr-ports: + description: + Number of SATA ports in use. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 8 + + phys: + minItems: 1 + maxItems: 8 + + phy-names: + minItems: 1 + items: + - const: port0 + - const: port1 + - const: port2 + - const: port3 + - const: port4 + - const: port5 + - const: port6 + - const: port7 + +required: + - compatible + - reg + - interrupts + - nr-ports + +unevaluatedProperties: false + +examples: + - | + sata@80000 { + compatible = "marvell,orion-sata"; + reg = <0x80000 0x5000>; + interrupts = <21>; + phys = <&sata_phy0>, <&sata_phy1>; + phy-names = "port0", "port1"; + nr-ports = <2>; + }; diff --git a/Documentation/devicetree/bindings/ata/marvell.txt b/Documentation/devicetree/bindings/ata/marvell.txt deleted file mode 100644 index b460edd12766..000000000000 --- a/Documentation/devicetree/bindings/ata/marvell.txt +++ /dev/null @@ -1,22 +0,0 @@ -* Marvell Orion SATA - -Required Properties: -- compatibility : "marvell,orion-sata" or "marvell,armada-370-sata" -- reg : Address range of controller -- interrupts : Interrupt controller is using -- nr-ports : Number of SATA ports in use. - -Optional Properties: -- phys : List of phandles to sata phys -- phy-names : Should be "0", "1", etc, one number per phandle - -Example: - - sata@80000 { - compatible = "marvell,orion-sata"; - reg = <0x80000 0x5000>; - interrupts = <21>; - phys = <&sata_phy0>, <&sata_phy1>; - phy-names = "0", "1"; - nr-ports = <2>; - } -- cgit v1.2.3 From 3b0bca979344b2e26de8f4c175bed975b1d54e8f Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 12 May 2025 16:57:56 -0500 Subject: dt-bindings: ata: Convert arasan,cf-spear1340 to DT schema Convert the Arasan/SPEAr Compact Flash Controller to DT schema format. The "clock-frequency" property isn't actually used. Add a single "clocks" entry as the Linux driver supports a single clock though the platform still doesn't have clocks in DT. Signed-off-by: Rob Herring (Arm) Signed-off-by: Damien Le Moal --- .../bindings/ata/arasan,cf-spear1340.yaml | 70 ++++++++++++++++++++++ .../devicetree/bindings/ata/pata-arasan.txt | 37 ------------ 2 files changed, 70 insertions(+), 37 deletions(-) create mode 100644 Documentation/devicetree/bindings/ata/arasan,cf-spear1340.yaml delete mode 100644 Documentation/devicetree/bindings/ata/pata-arasan.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ata/arasan,cf-spear1340.yaml b/Documentation/devicetree/bindings/ata/arasan,cf-spear1340.yaml new file mode 100644 index 000000000000..4d7017452dda --- /dev/null +++ b/Documentation/devicetree/bindings/ata/arasan,cf-spear1340.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/arasan,cf-spear1340.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Arasan PATA Compact Flash Controller + +maintainers: + - Viresh Kumar + +properties: + compatible: + const: arasan,cf-spear1340 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + arasan,broken-udma: + description: UDMA mode is unusable + type: boolean + + arasan,broken-mwdma: + description: MWDMA mode is unusable + type: boolean + + arasan,broken-pio: + description: PIO mode is unusable + type: boolean + + dmas: + maxItems: 1 + + dma-names: + items: + - const: data + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +allOf: + - if: + not: + required: + - arasan,broken-udma + - arasan,broken-mwdma + then: + required: + - dmas + - dma-names + +examples: + - | + cf@fc000000 { + compatible = "arasan,cf-spear1340"; + reg = <0xfc000000 0x1000>; + interrupts = <12>; + dmas = <&dma 23>; + dma-names = "data"; + }; diff --git a/Documentation/devicetree/bindings/ata/pata-arasan.txt b/Documentation/devicetree/bindings/ata/pata-arasan.txt deleted file mode 100644 index 872edc105680..000000000000 --- a/Documentation/devicetree/bindings/ata/pata-arasan.txt +++ /dev/null @@ -1,37 +0,0 @@ -* ARASAN PATA COMPACT FLASH CONTROLLER - -Required properties: -- compatible: "arasan,cf-spear1340" -- reg: Address range of the CF registers -- interrupt: Should contain the CF interrupt number -- clock-frequency: Interface clock rate, in Hz, one of - 25000000 - 33000000 - 40000000 - 50000000 - 66000000 - 75000000 - 100000000 - 125000000 - 150000000 - 166000000 - 200000000 - -Optional properties: -- arasan,broken-udma: if present, UDMA mode is unusable -- arasan,broken-mwdma: if present, MWDMA mode is unusable -- arasan,broken-pio: if present, PIO mode is unusable -- dmas: one DMA channel, as described in bindings/dma/dma.txt - required unless both UDMA and MWDMA mode are broken -- dma-names: the corresponding channel name, must be "data" - -Example: - - cf@fc000000 { - compatible = "arasan,cf-spear1340"; - reg = <0xfc000000 0x1000>; - interrupt-parent = <&vic1>; - interrupts = <12>; - dmas = <&dma-controller 23>; - dma-names = "data"; - }; -- cgit v1.2.3 From 1ad4b5a7de16806afc1aeaf012337e62af04e001 Mon Sep 17 00:00:00 2001 From: Lukasz Czechowski Date: Fri, 25 Apr 2025 17:18:07 +0200 Subject: dt-bindings: usb: cypress,hx3: Add support for all variants The Cypress HX3 hubs use different default PID value depending on the variant. Update compatibles list. Becasuse all hub variants use the same driver data, allow the dt node to have two compatibles: leftmost which matches the HW exactly, and the second one as fallback. Fixes: 1eca51f58a10 ("dt-bindings: usb: Add binding for Cypress HX3 USB 3.0 family") Cc: stable@vger.kernel.org # 6.6 Cc: stable@vger.kernel.org # Backport of the patch ("dt-bindings: usb: usb-device: relax compatible pattern to a contains") from list: https://lore.kernel.org/linux-usb/20250418-dt-binding-usb-device-compatibles-v2-1-b3029f14e800@cherry.de/ Cc: stable@vger.kernel.org # Backport of the patch in this series fixing product ID in onboard_dev_id_table in drivers/usb/misc/onboard_usb_dev.c driver Signed-off-by: Lukasz Czechowski Reviewed-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-2-4a76a474a010@thaumatec.com [taken with Greg's blessing] Signed-off-by: Heiko Stuebner --- .../devicetree/bindings/usb/cypress,hx3.yaml | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/usb/cypress,hx3.yaml b/Documentation/devicetree/bindings/usb/cypress,hx3.yaml index 1033b7a4b8f9..d6eac1213228 100644 --- a/Documentation/devicetree/bindings/usb/cypress,hx3.yaml +++ b/Documentation/devicetree/bindings/usb/cypress,hx3.yaml @@ -14,9 +14,22 @@ allOf: properties: compatible: - enum: - - usb4b4,6504 - - usb4b4,6506 + oneOf: + - enum: + - usb4b4,6504 + - usb4b4,6506 + - items: + - enum: + - usb4b4,6500 + - usb4b4,6508 + - const: usb4b4,6504 + - items: + - enum: + - usb4b4,6502 + - usb4b4,6503 + - usb4b4,6507 + - usb4b4,650a + - const: usb4b4,6506 reg: true -- cgit v1.2.3 From e2a6b301ca6054fc72905810d084690ec0ee1aed Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 14 May 2025 17:07:42 +0200 Subject: dt-bindings: arm: rockchip: add PX30-Cobra boards from Theobroma Systems Cobra are Touchscreen devices built around the PX30 SoC using a variety of display options. The devices feature an EMMC, network port, usb host + OTG ports and a 720x1280 display with a touchscreen. Signed-off-by: Heiko Stuebner Acked-by: Conor Dooley Reviewed-by: Quentin Schulz Link: https://lore.kernel.org/r/20250514150745.2437804-4-heiko@sntech.de Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 115c3ca43997..c4b9258f9620 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -1126,6 +1126,16 @@ properties: - rockchip,rv1126 - rockchip,rv1109 + - description: Theobroma Systems PX30-Cobra + items: + - enum: + - tsd,px30-cobra-ltk050h3146w + - tsd,px30-cobra-ltk050h3146w-a2 + - tsd,px30-cobra-ltk050h3148w + - tsd,px30-cobra-ltk500hd1829 + - const: tsd,px30-cobra + - const: rockchip,px30 + - description: Theobroma Systems PX30-uQ7 with Haikou baseboard items: - const: tsd,px30-ringneck-haikou -- cgit v1.2.3 From b8310e4d391ad123048de738ac023ef8b7ebdbfc Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 14 May 2025 17:07:44 +0200 Subject: dt-bindings: arm: rockchip: add PX30-PP1516 boards from Theobroma Systems PP1516 are Touchscreen devices built around the PX30 SoC and companion devices to PX30-Cobra, again with multiple display options. The devices feature an EMMC, OTG port and a 720x1280 display with a touchscreen and camera Signed-off-by: Heiko Stuebner Acked-by: Conor Dooley Reviewed-by: Quentin Schulz Link: https://lore.kernel.org/r/20250514150745.2437804-6-heiko@sntech.de Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index c4b9258f9620..5772d905f390 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -1136,6 +1136,14 @@ properties: - const: tsd,px30-cobra - const: rockchip,px30 + - description: Theobroma Systems PX30-PP1516 + items: + - enum: + - tsd,px30-pp1516-ltk050h3146w-a2 + - tsd,px30-pp1516-ltk050h3148w + - const: tsd,px30-pp1516 + - const: rockchip,px30 + - description: Theobroma Systems PX30-uQ7 with Haikou baseboard items: - const: tsd,px30-ringneck-haikou -- cgit v1.2.3 From 9ea3bfa61b09e5ae4802661fa9a54438c615c096 Mon Sep 17 00:00:00 2001 From: Eric Dumazet Date: Tue, 13 May 2025 19:39:17 +0000 Subject: tcp: increase tcp_limit_output_bytes default value to 4MB Last change happened in 2018 with commit c73e5807e4f6 ("tcp: tsq: no longer use limit_output_bytes for paced flows") Modern NIC speeds got a 4x increase since then. Signed-off-by: Eric Dumazet Link: https://patch.msgid.link/20250513193919.1089692-10-edumazet@google.com Signed-off-by: Jakub Kicinski --- Documentation/networking/ip-sysctl.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/networking/ip-sysctl.rst b/Documentation/networking/ip-sysctl.rst index b43222ee57cf..91b7d0a1c7fd 100644 --- a/Documentation/networking/ip-sysctl.rst +++ b/Documentation/networking/ip-sysctl.rst @@ -1099,7 +1099,7 @@ tcp_limit_output_bytes - INTEGER limits the number of bytes on qdisc or device to reduce artificial RTT/cwnd and reduce bufferbloat. - Default: 1048576 (16 * 65536) + Default: 4194304 (4 MB) tcp_challenge_ack_limit - INTEGER Limits number of Challenge ACK sent per second, as recommended -- cgit v1.2.3 From 572be9bf9d0d96242dd7977ce456009b6c690dce Mon Sep 17 00:00:00 2001 From: Eric Dumazet Date: Tue, 13 May 2025 19:39:19 +0000 Subject: tcp: increase tcp_rmem[2] to 32 MB Last change to tcp_rmem[2] happened in 2012, in commit b49960a05e32 ("tcp: change tcp_adv_win_scale and tcp_rmem[2]") TCP performance on WAN is mostly limited by tcp_rmem[2] for receivers. After this series improvements, it is time to increase the default. Signed-off-by: Eric Dumazet Link: https://patch.msgid.link/20250513193919.1089692-12-edumazet@google.com Signed-off-by: Jakub Kicinski --- Documentation/networking/ip-sysctl.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/networking/ip-sysctl.rst b/Documentation/networking/ip-sysctl.rst index 91b7d0a1c7fd..0f1251cce314 100644 --- a/Documentation/networking/ip-sysctl.rst +++ b/Documentation/networking/ip-sysctl.rst @@ -735,7 +735,7 @@ tcp_rmem - vector of 3 INTEGERs: min, default, max net.core.rmem_max. Calling setsockopt() with SO_RCVBUF disables automatic tuning of that socket's receive buffer size, in which case this value is ignored. - Default: between 131072 and 6MB, depending on RAM size. + Default: between 131072 and 32MB, depending on RAM size. tcp_sack - BOOLEAN Enable select acknowledgments (SACKS). -- cgit v1.2.3 From f97bdc61c76f654effa7b78e10338e64794da9fd Mon Sep 17 00:00:00 2001 From: Alison Schofield Date: Mon, 12 May 2025 14:42:22 -0700 Subject: Documentation: Update the CXL Maturity Map Changes for extended-linear cache, hetero-interleave, and HPA->DPA address translation. Signed-off-by: Alison Schofield Reviewed-by: Dave Jiang Link: https://patch.msgid.link/20250512214225.1389484-1-alison.schofield@intel.com Signed-off-by: Dave Jiang --- Documentation/driver-api/cxl/maturity-map.rst | 6 +++--- Documentation/driver-api/cxl/theory-of-operation.rst | 3 +-- 2 files changed, 4 insertions(+), 5 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/maturity-map.rst b/Documentation/driver-api/cxl/maturity-map.rst index a2288f9df658..1330f3f52129 100644 --- a/Documentation/driver-api/cxl/maturity-map.rst +++ b/Documentation/driver-api/cxl/maturity-map.rst @@ -51,9 +51,9 @@ in place, but there are several corner cases that are pending closure. * [2] CXL Window Enumeration - * [0] :ref:`Extended-linear memory-side cache ` + * [2] :ref:`Extended-linear memory-side cache ` * [0] Low Memory-hole - * [0] Hetero-interleave + * [X] Hetero-interleave * [2] Switch Enumeration @@ -173,7 +173,7 @@ Accelerator User Flow Support ----------------- -* [0] HPA->DPA Address translation (need xormaps export solution) +* [0] Inject & clear poison by HPA Details ======= diff --git a/Documentation/driver-api/cxl/theory-of-operation.rst b/Documentation/driver-api/cxl/theory-of-operation.rst index 1b854b11f575..40793dad3630 100644 --- a/Documentation/driver-api/cxl/theory-of-operation.rst +++ b/Documentation/driver-api/cxl/theory-of-operation.rst @@ -392,8 +392,7 @@ CXL Core .. kernel-doc:: drivers/cxl/core/features.c :doc: cxl features -.. kernel-doc:: drivers/cxl/core/features.c - :identifiers: +See :c:func:`devm_cxl_setup_features` for API details. CXL Regions ----------- -- cgit v1.2.3 From 49cee8fe5e6c6af2c6a76448840ae2eef9641084 Mon Sep 17 00:00:00 2001 From: Dave Jiang Date: Wed, 14 May 2025 17:09:21 -0700 Subject: cxl: docs/platform/cdat reference documentation Add documentation for CDAT structures for CXL usages. Reviewed-by: Gregory Price Reviewed-by: Alison Schofield Link: https://patch.msgid.link/20250515000923.2590820-2-dave.jiang@intel.com Signed-off-by: Dave Jiang --- Documentation/driver-api/cxl/index.rst | 1 + Documentation/driver-api/cxl/platform/cdat.rst | 118 +++++++++++++++++++++++++ 2 files changed, 119 insertions(+) create mode 100644 Documentation/driver-api/cxl/platform/cdat.rst (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-api/cxl/index.rst index 366faf851fc7..9e1414ad3357 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -27,6 +27,7 @@ that have impacts on each other. The docs here break up configurations steps. platform/bios-and-efi platform/acpi + platform/cdat platform/example-configs .. toctree:: diff --git a/Documentation/driver-api/cxl/platform/cdat.rst b/Documentation/driver-api/cxl/platform/cdat.rst new file mode 100644 index 000000000000..34bbe7264d71 --- /dev/null +++ b/Documentation/driver-api/cxl/platform/cdat.rst @@ -0,0 +1,118 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================================== +Coherent Device Attribute Table (CDAT) +====================================== + +The CDAT provides functional and performance attributes of devices such +as CXL accelerators, switches, or endpoints. The table formatting is +similar to ACPI tables. CDAT data may be parsed by BIOS at boot or may +be enumerated at runtime (after device hotplug, for example). + +Terminology: +DPA - Device Physical Address, used by the CXL device to denote the address +it supports for that device. + +DSMADHandle - A device unique handle that is associated with a DPA range +defined by the DSMAS table. + + +=============================================== +Device Scoped Memory Affinity Structure (DSMAS) +=============================================== + +The DSMAS contains information such as DSMADHandle, the DPA Base, and DPA +Length. + +This table is used by Linux in conjunction with the Device Scoped Latency and +Bandwidth Information Structure (DSLBIS) to determine the performance +attributes of the CXL device itself. + +Example :: + + Structure Type : 00 [DSMAS] + Reserved : 00 + Length : 0018 <- 24d, size of structure + DSMADHandle : 01 + Flags : 00 + Reserved : 0000 + DPA Base : 0000000040000000 <- 1GiB base + DPA Length : 0000000080000000 <- 2GiB size + + +================================================================== +Device Scoped Latency and Bandwidth Information Structure (DSLBIS) +================================================================== + +This table is used by Linux in conjunction with DSMAS to determine the +performance attributes of a CXL device. The DSLBIS contains latency +and bandwidth information based on DSMADHandle matching. + +Example :: + + Structure Type : 01 [DSLBIS] + Reserved : 00 + Length : 18 <- 24d, size of structure + Handle : 0001 <- DSMAS handle + Flags : 00 <- Matches flag field for HMAT SLLBIS + Data Type : 00 <- Latency + Entry Basee Unit : 0000000000001000 <- Entry Base Unit field in HMAT SSLBIS + Entry : 010000000000 <- First byte used here, CXL LTC + Reserved : 0000 + + Structure Type : 01 [DSLBIS] + Reserved : 00 + Length : 18 <- 24d, size of structure + Handle : 0001 <- DSMAS handle + Flags : 00 <- Matches flag field for HMAT SLLBIS + Data Type : 03 <- Bandwidth + Entry Basee Unit : 0000000000001000 <- Entry Base Unit field in HMAT SSLBIS + Entry : 020000000000 <- First byte used here, CXL BW + Reserved : 0000 + + +================================================================== +Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) +================================================================== + +The SSLBIS contains information about the latency and bandwidth of a switch. + +The table is used by Linux to compute the performance coordinates of a CXL path +from the device to the root port where a switch is part of the path. + +Example :: + + Structure Type : 05 [SSLBIS] + Reserved : 00 + Length : 20 <- 32d, length of record, including SSLB entries + Data Type : 00 <- Latency + Reserved : 000000 + Entry Base Unit : 00000000000000001000 <- Matches Entry Base Unit in HMAT SSLBIS + + <- SSLB Entry 0 + Port X ID : 0100 <- First port, 0100h represents an upstream port + Port Y ID : 0000 <- Second port, downstream port 0 + Latency : 0100 <- Port latency + Reserved : 0000 + <- SSLB Entry 1 + Port X ID : 0100 + Port Y ID : 0001 + Latency : 0100 + Reserved : 0000 + + + Structure Type : 05 [SSLBIS] + Reserved : 00 + Length : 18 <- 24d, length of record, including SSLB entry + Data Type : 03 <- Bandwidth + Reserved : 000000 + Entry Base Unit : 00000000000000001000 <- Matches Entry Base Unit in HMAT SSLBIS + + <- SSLB Entry 0 + Port X ID : 0100 <- First port, 0100h represents an upstream port + Port Y ID : FFFF <- Second port, FFFFh indicates any port + Bandwidth : 1200 <- Port bandwidth + Reserved : 0000 + +The CXL driver uses a combination of CDAT, HMAT, SRAT, and other data to +generate "whole path performance" data for a CXL device. -- cgit v1.2.3 From 1ce91b37b2661ebeca71982eadf3e3d5e0584a2f Mon Sep 17 00:00:00 2001 From: Dave Jiang Date: Wed, 14 May 2025 17:09:22 -0700 Subject: cxl: docs/platform/acpi/srat Add generic target documentation Add description in the SRAT document to describe the Generic Port Affinity sub-table. Reviewed-by: Gregory Price Reviewed-by: Alison Schofield Link: https://patch.msgid.link/20250515000923.2590820-3-dave.jiang@intel.com Signed-off-by: Dave Jiang --- .../driver-api/cxl/platform/acpi/srat.rst | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/platform/acpi/srat.rst b/Documentation/driver-api/cxl/platform/acpi/srat.rst index 56d7bbb18c3b..cc98ca0e508e 100644 --- a/Documentation/driver-api/cxl/platform/acpi/srat.rst +++ b/Documentation/driver-api/cxl/platform/acpi/srat.rst @@ -42,3 +42,30 @@ Example :: Enabled : 1 Hot Pluggable : 1 Non-Volatile : 0 + + +Generic Port Affinity +===================== +The Generic Port Affinity subtable provides an association between a proximity +domain and a device handle representing a Generic Port such as a CXL host +bridge. With the association, latency and bandwidth numbers can be retrieved +from the SRAT for the path between CPU(s) (initiator) and the Generic Port. +This is used to construct performance coordinates for hotplugged CXL DEVICES, +which cannot be enumerated at boot by platform firmware. + +Example :: + + Subtable Type : 06 [Generic Port Affinity] + Length : 20 <- 32d, length of table + Reserved : 00 + Device Handle Type : 00 <- 0 - ACPI, 1 - PCI + Proximity Domain : 00000001 + Device Handle : ACPI0016:01 + Flags : 00000001 <- Bit 0 (Enabled) + Reserved : 00000000 + +The Proximity Domain is matched up to the :doc:`HMAT ` SSLBI Target +Proximity Domain List for the related latency or bandwidth numbers. Those +performance numbers are tied to a CXL host bridge via the Device Handle. +The driver uses the association to retrieve the Generic Port performance +numbers for the whole CXL path access coordinates calculation. -- cgit v1.2.3 From fc78561595e2fc6ceb8da56b083847227ba9320e Mon Sep 17 00:00:00 2001 From: Dave Jiang Date: Wed, 14 May 2025 17:09:23 -0700 Subject: cxl: doc/linux/access-coordinates Update access coordinates calculation methods Add documentation on how to calculate the access coordinates for a given CXL region in detail. Reviewed-by: Gregory Price Reviewed-by: Alison Schofield Link: https://patch.msgid.link/20250515000923.2590820-4-dave.jiang@intel.com Signed-off-by: Dave Jiang --- .../driver-api/cxl/linux/access-coordinates.rst | 87 +++++++++++++++++++++- 1 file changed, 85 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/cxl/linux/access-coordinates.rst b/Documentation/driver-api/cxl/linux/access-coordinates.rst index 7f949cc4ece5..341a7c682043 100644 --- a/Documentation/driver-api/cxl/linux/access-coordinates.rst +++ b/Documentation/driver-api/cxl/linux/access-coordinates.rst @@ -5,6 +5,83 @@ CXL Access Coordinates Computation ================================== +Latency and Bandwidth Calculation +================================= +A memory region performance coordinates (latency and bandwidth) are typically +provided via ACPI tables :doc:`SRAT <../platform/acpi/srat>` and +:doc:`HMAT <../platform/acpi/hmat>`. However, the platform firmware (BIOS) is +not able to annotate those for CXL devices that are hot-plugged since they do +not exist during platform firmware initialization. The CXL driver can compute +the performance coordinates by retrieving data from several components. + +The :doc:`SRAT <../platform/acpi/srat>` provides a Generic Port Affinity +subtable that ties a proximity domain to a device handle, which in this case +would be the CXL hostbridge. Using this association, the performance +coordinates for the Generic Port can be retrieved from the +:doc:`HMAT <../platform/acpi/hmat>` subtable. This piece represents the +performance coordinates between a CPU and a Generic Port (CXL hostbridge). + +The :doc:`CDAT <../platform/cdat>` provides the performance coordinates for +the CXL device itself. That is the bandwidth and latency to access that device's +memory region. The DSMAS subtable provides a DSMADHandle that is tied to a +Device Physical Address (DPA) range. The DSLBIS subtable provides the +performance coordinates that's tied to a DSMADhandle and this ties the two +table entries together to provide the performance coordinates for each DPA +region. For example, if a device exports a DRAM region and a PMEM region, +then there would be different performance characteristsics for each of those +regions. + +If there's a CXL switch in the topology, then the performance coordinates for the +switch is provided by SSLBIS subtable. This provides the bandwidth and latency +for traversing the switch between the switch upstream port and the switch +downstream port that points to the endpoint device. + +Simple topology example:: + + GP0/HB0/ACPI0016-0 + RP0 + | + | L0 + | + SW 0 / USP0 + SW 0 / DSP0 + | + | L1 + | + EP0 + +In this example, there is a CXL switch between an endpoint and a root port. +Latency in this example is calculated as such: +L(EP0) - Latency from EP0 CDAT DSMAS+DSLBIS +L(L1) - Link latency between EP0 and SW0DSP0 +L(SW0) - Latency for the switch from SW0 CDAT SSLBIS. +L(L0) - Link latency between SW0 and RP0 +L(RP0) - Latency from root port to CPU via SRAT and HMAT (Generic Port). +Total read and write latencies are the sum of all these parts. + +Bandwidth in this example is calculated as such: +B(EP0) - Bandwidth from EP0 CDAT DSMAS+DSLBIS +B(L1) - Link bandwidth between EP0 and SW0DSP0 +B(SW0) - Bandwidth for the switch from SW0 CDAT SSLBIS. +B(L0) - Link bandwidth between SW0 and RP0 +B(RP0) - Bandwidth from root port to CPU via SRAT and HMAT (Generic Port). +The total read and write bandwidth is the min() of all these parts. + +To calculate the link bandwidth: +LinkOperatingFrequency (GT/s) is the current negotiated link speed. +DataRatePerLink (MB/s) = LinkOperatingFrequency / 8 +Bandwidth (MB/s) = PCIeCurrentLinkWidth * DataRatePerLink +Where PCIeCurrentLinkWidth is the number of lanes in the link. + +To calculate the link latency: +LinkLatency (picoseconds) = FlitSize / LinkBandwidth (MB/s) + +See `CXL Memory Device SW Guide r1.0 `_, +section 2.11.3 and 2.11.4 for details. + +In the end, the access coordinates for a constructed memory region is calculated from one +or more memory partitions from each of the CXL device(s). + Shared Upstream Link Calculation ================================ For certain CXL region construction with endpoints behind CXL switches (SW) or @@ -91,5 +168,11 @@ Finally, the cxl_region_update_bandwidth() is called and the aggregated bandwidth from all the members of the last xarray is updated for the access coordinates residing in the cxl region (cxlr) context. -.. kernel-doc:: drivers/cxl/acpi.c - :identifiers: cxl_acpi_evaluate_qtg_dsm +QTG ID +====== +Each :doc:`CEDT <../platform/acpi/cedt>` has a QTG ID field. This field provides +the ID that associates with a QoS Throttling Group (QTG) for the CFMWS window. +Once the access coordinates are calculated, an ACPI Device Specific Method can +be issued to the ACPI0016 device to retrieve the QTG ID depends on the access +coordinates provided. The QTG ID for the device can be used as guidance to match +to the CFMWS to setup the best Linux root decoder for the device performance. -- cgit v1.2.3 From 08effa6b77f7dbb4727f811daef0f6085c0d63c8 Mon Sep 17 00:00:00 2001 From: Praveen Balakrishnan Date: Fri, 16 May 2025 00:47:57 +0100 Subject: docs: ipmi: fix spelling and grammar mistakes Corrected various spelling and grammatical mistakes in Documentation/driver-api/ipmi.rst to improve readability. No changes to the technical content has been made. Signed-off-by: Praveen Balakrishnan Message-ID: <20250515234757.19710-1-praveen.balakrishnan@magd.ox.ac.uk> Reviewed-by: Randy Dunlap Signed-off-by: Corey Minyard --- Documentation/driver-api/ipmi.rst | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'Documentation') diff --git a/Documentation/driver-api/ipmi.rst b/Documentation/driver-api/ipmi.rst index 3a533cd2ef60..2cc6c898ab90 100644 --- a/Documentation/driver-api/ipmi.rst +++ b/Documentation/driver-api/ipmi.rst @@ -45,7 +45,7 @@ manual), choose the 'IPMI SI handler' option. A driver also exists for direct I2C access to the IPMI management controller. Some boards support this, but it is unknown if it will work on every board. For this, choose 'IPMI SMBus handler', but be ready to try to do some -figuring to see if it will work on your system if the SMBIOS/APCI +figuring to see if it will work on your system if the SMBIOS/ACPI information is wrong or not present. It is fairly safe to have both these enabled and let the drivers auto-detect what is present. @@ -63,7 +63,7 @@ situation, you need to read the section below named 'The SI Driver' or IPMI defines a standard watchdog timer. You can enable this with the 'IPMI Watchdog Timer' config option. If you compile the driver into the kernel, then via a kernel command-line option you can have the -watchdog timer start as soon as it initializes. It also have a lot +watchdog timer start as soon as it initializes. It also has a lot of other options, see the 'Watchdog' section below for more details. Note that you can also have the watchdog continue to run if it is closed (by default it is disabled on close). Go into the 'Watchdog @@ -314,13 +314,13 @@ This gives the receiver a place to actually put the message. If the message cannot fit into the data you provide, you will get an EMSGSIZE error and the driver will leave the data in the receive -queue. If you want to get it and have it truncate the message, us +queue. If you want to get it and have it truncate the message, use the IPMICTL_RECEIVE_MSG_TRUNC ioctl. When you send a command (which is defined by the lowest-order bit of the netfn per the IPMI spec) on the IPMB bus, the driver will automatically assign the sequence number to the command and save the -command. If the response is not receive in the IPMI-specified 5 +command. If the response is not received in the IPMI-specified 5 seconds, it will generate a response automatically saying the command timed out. If an unsolicited response comes in (if it was after 5 seconds, for instance), that response will be ignored. @@ -364,7 +364,7 @@ channel bitmasks do not overlap. To respond to a received command, set the response bit in the returned netfn, use the address from the received message, and use the same -msgid that you got in the receive message. +msgid that you got in the received message. From userland, equivalent IOCTLs are provided to do these functions. @@ -437,7 +437,7 @@ register would be 0xca6. This defaults to 1. The regsizes parameter gives the size of a register, in bytes. The data used by IPMI is 8-bits wide, but it may be inside a larger -register. This parameter allows the read and write type to specified. +register. This parameter allows the read and write type to be specified. It may be 1, 2, 4, or 8. The default is 1. Since the register size may be larger than 32 bits, the IPMI data may not @@ -478,8 +478,8 @@ If your IPMI interface does not support interrupts and is a KCS or SMIC interface, the IPMI driver will start a kernel thread for the interface to help speed things up. This is a low-priority kernel thread that constantly polls the IPMI driver while an IPMI operation -is in progress. The force_kipmid module parameter will all the user to -force this thread on or off. If you force it off and don't have +is in progress. The force_kipmid module parameter will allow the user +to force this thread on or off. If you force it off and don't have interrupts, the driver will run VERY slowly. Don't blame me, these interfaces suck. @@ -580,7 +580,7 @@ kernel command line as:: These are the same options as on the module command line. The I2C driver does not support non-blocking access or polling, so -this driver cannod to IPMI panic events, extend the watchdog at panic +this driver cannot do IPMI panic events, extend the watchdog at panic time, or other panic-related IPMI functions without special kernel patches and driver modifications. You can get those at the openipmi web page. @@ -607,7 +607,7 @@ Parameters are:: ipmi_ipmb.retry_time_ms=