From f0fcbdbf202e2be36c8eb6d1f5c01f95805777de Mon Sep 17 00:00:00 2001 From: Xianglong Du Date: Wed, 2 Oct 2013 08:13:49 +0800 Subject: watchdog: sirf: add watchdog driver of CSR SiRFprimaII and SiRFatlasVI On CSR SiRFprimaII and SiRFatlasVI, the 6th timer can act as a watchdog timer when the Watchdog mode is enabled. watchdog occur when TIMER watchdog counter matches the value software pre-set, when this event occurs, the effect is the same as the system software reset. Signed-off-by: Xianglong Du Signed-off-by: Barry Song Cc: Romain Izard Reviewed-by: Guenter Roeck Signed-off-by: Wim Van Sebroeck --- Documentation/devicetree/bindings/watchdog/sirfsoc_wdt.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/sirfsoc_wdt.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/watchdog/sirfsoc_wdt.txt b/Documentation/devicetree/bindings/watchdog/sirfsoc_wdt.txt new file mode 100644 index 000000000000..9cbc76c89b2b --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/sirfsoc_wdt.txt @@ -0,0 +1,14 @@ +SiRFSoC Timer and Watchdog Timer(WDT) Controller + +Required properties: +- compatible: "sirf,prima2-tick" +- reg: Address range of tick timer/WDT register set +- interrupts: interrupt number to the cpu + +Example: + +timer@b0020000 { + compatible = "sirf,prima2-tick"; + reg = <0xb0020000 0x1000>; + interrupts = <0>; +}; -- cgit v1.2.3