From 54d03c5d8b2a8af15b25e748fa9bc6e572060125 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Wed, 20 Apr 2016 03:18:39 -0500 Subject: ARM: dts: AM57xx/DRA7: Update SoC voltage rail limits to match data sheet As per the data sheet starting from SPRUHQ0H (Nov 2015 - Latest[1]), VDD_CORE can vary from 0.85v to 1.15v for AVS class0. VDD GPU/DSP et.al. can range from 0.85v to 1.25V with AVS class0 Since dynamic voltage scaling is disabled for DRA7/AM57xx SoCs for all SoC rails other than MPU, the bootloader is responsible for setting up the AVS class0 voltage, however, with wrong voltage machine constraints in dtb, regulator framework will lower the voltage below the required voltage levels for certain samples in production flow. This can cause catastrophic failures which can be pretty hard to identify. Update board files which don't match required specification. [1] http://www.ti.com/product/AM5728/datasheet/specifications#SPRT637-7340 Signed-off-by: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra72-evm-common.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/dra72-evm-common.dtsi') diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi index 2c880501ba2e..874bdf1db306 100644 --- a/arch/arm/boot/dts/dra72-evm-common.dtsi +++ b/arch/arm/boot/dts/dra72-evm-common.dtsi @@ -328,7 +328,7 @@ /* VDD_CORE */ regulator-name = "smps2"; regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1060000>; + regulator-max-microvolt = <1150000>; regulator-boot-on; regulator-always-on; }; -- cgit v1.2.3