From 827269318ca2d40ce316aef25ea82157c8bcf99c Mon Sep 17 00:00:00 2001 From: Huang Shijie Date: Tue, 7 May 2013 15:39:20 +0800 Subject: ARM: dts: enable the gpmi-nand for imx6q{dl}-sabreauto boards enable the gpmi-nand for imx6q-sabreauto and imx6qdl-sabreauto boards. Signed-off-by: Huang Shijie Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/boot/dts/imx6qdl-sabreauto.dtsi') diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index 4d237cffcc41..7b561fbbfb03 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi @@ -23,6 +23,12 @@ status = "okay"; }; +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand_1>; + status = "okay"; +}; + &uart4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart4_1>; -- cgit v1.2.3 From faacc290eeaf28f24a2ff5cb1ec033e6c9f3811d Mon Sep 17 00:00:00 2001 From: Huang Shijie Date: Thu, 9 May 2013 11:29:03 +0800 Subject: ARM: dts: add SPI/NOR for mx6q{dl}-sabreauto boards Since the SPI/NOR has pin conflict with the WEIM NOR, we disable the spi/nor by default. Signed-off-by: Huang Shijie Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'arch/arm/boot/dts/imx6qdl-sabreauto.dtsi') diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index 7b561fbbfb03..d6baa51dc83c 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi @@ -16,6 +16,22 @@ }; }; +&ecspi1 { + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio3 19 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1_1>; + status = "disabled"; /* pin conflict with WEIM NOR */ + + flash: m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p32"; + spi-max-frequency = <20000000>; + reg = <0>; + }; +}; + &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet_2>; -- cgit v1.2.3 From 72eb4cca7844c600f2e839c2e27a16c1eaa213f9 Mon Sep 17 00:00:00 2001 From: Huang Shijie Date: Tue, 28 May 2013 14:20:08 +0800 Subject: ARM: dts: imx6q{dl}: fix the pin conflict between SPI and WEIM In the imx6q-sabreauto and imx6dl-sabreauto boards, the pin MX6Q{DL}_PAD_EIM_D19 is used as a GPIO for SPI NOR, but it is used as a data pin for the WEIM NOR. In order to fix the conflict, this patch removes the pin from the hog, and adds a new board-level pinctrl: pinctrl_ecspi1_sabreauto. The SPI NOR selects this pinctrl_ecspi1_sabreauto when it is enabled. Signed-off-by: Huang Shijie Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/imx6qdl-sabreauto.dtsi') diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index d6baa51dc83c..a4466e6ebe33 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi @@ -20,7 +20,7 @@ fsl,spi-num-chipselects = <1>; cs-gpios = <&gpio3 19 0>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi1_1>; + pinctrl-0 = <&pinctrl_ecspi1_1 &pinctrl_ecspi1_sabreauto>; status = "disabled"; /* pin conflict with WEIM NOR */ flash: m25p80@0 { -- cgit v1.2.3 From 50fe0e903d42e9cccea7cb9c894137ae65893f54 Mon Sep 17 00:00:00 2001 From: Huang Shijie Date: Tue, 28 May 2013 14:20:12 +0800 Subject: ARM: dts: imx6qdl-sabreauto: enable the WEIM NOR Enable the WEIM NOR for imx6q{dl}-sabreauto boards. For the pin conflict with SPI NOR, its status is set to "disabled". Signed-off-by: Huang Shijie Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'arch/arm/boot/dts/imx6qdl-sabreauto.dtsi') diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index a4466e6ebe33..e994011220e7 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi @@ -58,3 +58,22 @@ wp-gpios = <&gpio1 13 0>; status = "okay"; }; + +&weim { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_weim_nor_1 &pinctrl_weim_cs0_1>; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x08000000 0x08000000>; + status = "disabled"; /* pin conflict with SPI NOR */ + + nor@0,0 { + compatible = "cfi-flash"; + reg = <0 0 0x02000000>; + #address-cells = <1>; + #size-cells = <1>; + bank-width = <2>; + fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000 + 0x0000c000 0x1404a38e 0x00000000>; + }; +}; -- cgit v1.2.3