From 61ead435105de722854e090c724dd2b7348b914e Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Tue, 19 Aug 2014 00:32:47 +0200 Subject: ARM: dts: vf610: add on-chip SRAM Add Vybrids massive on-chip SRAM areas. Make use of the memory region functionality to denominate the retained SRAM area in LPSTOP2 and LPSTOP3. --- arch/arm/boot/dts/vfxxx.dtsi | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) (limited to 'arch/arm/boot/dts/vfxxx.dtsi') diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi index 3d9da56d0a5d..dc2984288f27 100644 --- a/arch/arm/boot/dts/vfxxx.dtsi +++ b/arch/arm/boot/dts/vfxxx.dtsi @@ -57,6 +57,43 @@ interrupt-parent = <&gpc>; ranges; + ocram0: sram@3f000000 { + compatible = "mmio-sram"; + reg = <0x3f000000 0x40000>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x3f000000 0x40000>; + + stbyram1@0 { + reg = <0x0 0x4000>; + label = "stbyram1"; + pool; + }; + + stbyram2@4000 { + reg = <0x4000 0xc000>; + label = "stbyram2"; + pool; + }; + }; + + ocram1: sram@3f040000 { + compatible = "mmio-sram"; + reg = <0x3f040000 0x40000>; + }; + + gfxram0: sram@3f400000 { + compatible = "mmio-sram"; + reg = <0x3f400000 0x80000>; + }; + + /* used by L2 cache */ + gfxram1: sram@3f480000 { + compatible = "mmio-sram"; + reg = <0x3f480000 0x80000>; + }; + aips0: aips-bus@40000000 { compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; -- cgit v1.2.3