From 5d728eb76f217753d4f6e942b9f0fe2af8646ef7 Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Tue, 11 Mar 2014 18:41:45 +0800 Subject: ENGR00302869-1 ARM: dts: imx6qdl: add cfg_clk for MIPI CSI2 MIPI CSI2 depends on this clock to work. This patch also updates the binding document. Signed-off-by: Robby Cai (cherry picked from commit 67e7963f6f7ddb6c001bb34c6af71f2330fd0e3f) --- arch/arm/boot/dts/imx6qdl.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index ea8ec2a501d0..56758f327e90 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -962,13 +962,13 @@ compatible = "fsl,imx6q-mipi-csi2"; reg = <0x021dc000 0x4000>; interrupts = <0 100 0x04>, <0 101 0x04>; - clocks = <&clks 138>, <&clks 53>; + clocks = <&clks 138>, <&clks 53>, <&clks 204>; /* Note: clks 138 is hsi_tx, however, the dphy_c * hsi_tx and pll_refclk use the same clk gate. * In current clk driver, open/close clk gate do * use hsi_tx for a temporary debug purpose. */ - clock-names = "dphy_clk", "pixel_clk"; + clock-names = "dphy_clk", "pixel_clk", "cfg_clk"; status = "disabled"; }; -- cgit v1.2.3