From 7629838ca33adf8d576d9e4a9d31df4f3b3bc258 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 30 Oct 2012 18:24:57 +0000 Subject: ARM: dts: imx6q: Add ENET PTP clock pin and clock source Add ENET 1588 clock input pin MX6Q_PAD_GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT and anatop PLL8 clock source for ENET Signed-off-by: Frank Li Signed-off-by: David S. Miller --- arch/arm/boot/dts/imx6q.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index f3990b04fecf..3290e61be3e1 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -580,6 +580,7 @@ 66 0x1b0b0 /* MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2 */ 70 0x1b0b0 /* MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3 */ 48 0x1b0b0 /* MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL */ + 1033 0x4001b0a8 /* MX6Q_PAD_GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT*/ >; }; @@ -833,8 +834,8 @@ compatible = "fsl,imx6q-fec"; reg = <0x02188000 0x4000>; interrupts = <0 118 0x04 0 119 0x04>; - clocks = <&clks 117>, <&clks 117>; - clock-names = "ipg", "ahb"; + clocks = <&clks 117>, <&clks 117>, <&clks 177>; + clock-names = "ipg", "ahb", "ptp"; status = "disabled"; }; -- cgit v1.2.3 From 1a39a65cba08f8a76f00fea9023d336e0858941b Mon Sep 17 00:00:00 2001 From: Mugunthan V N Date: Wed, 14 Nov 2012 09:08:00 +0000 Subject: arm/dts: am33xx: Add CPSW and MDIO module nodes for AM33XX Add CPSW and MDIO related device tree data for AM33XX. Also enable them into board/evm dts files by providing respective phy-id. Signed-off-by: Mugunthan V N Signed-off-by: Vaibhav Hiremath Cc: Benoit Cousson Acked-by: Peter Korsgaard Acked-by: Richard Cochran Signed-off-by: David S. Miller --- arch/arm/boot/dts/am335x-bone.dts | 8 +++++++ arch/arm/boot/dts/am335x-evm.dts | 8 +++++++ arch/arm/boot/dts/am33xx.dtsi | 48 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 64 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index c634f87e230e..4fcd21837bd3 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -78,3 +78,11 @@ }; }; }; + +&cpsw_emac0 { + phy_id = <&davinci_mdio>, <0>; +}; + +&cpsw_emac1 { + phy_id = <&davinci_mdio>, <1>; +}; diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 185d6325a458..366d9290c0dd 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -118,3 +118,11 @@ }; }; }; + +&cpsw_emac0 { + phy_id = <&davinci_mdio>, <0>; +}; + +&cpsw_emac1 { + phy_id = <&davinci_mdio>, <1>; +}; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index bb31bff01998..a4615b44f25e 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -210,5 +210,53 @@ interrupt-parent = <&intc>; interrupts = <91>; }; + + mac: ethernet@4a100000 { + compatible = "ti,cpsw"; + ti,hwmods = "cpgmac0"; + cpdma_channels = <8>; + ale_entries = <1024>; + bd_ram_size = <0x2000>; + no_bd_ram = <0>; + rx_descs = <64>; + mac_control = <0x20>; + slaves = <2>; + cpts_active_slave = <0>; + cpts_clock_mult = <0x80000000>; + cpts_clock_shift = <29>; + reg = <0x4a100000 0x800 + 0x4a101200 0x100>; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + /* + * c0_rx_thresh_pend + * c0_rx_pend + * c0_tx_pend + * c0_misc_pend + */ + interrupts = <40 41 42 43>; + ranges; + + davinci_mdio: mdio@4a101000 { + compatible = "ti,davinci_mdio"; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "davinci_mdio"; + bus_freq = <1000000>; + reg = <0x4a101000 0x100>; + }; + + cpsw_emac0: slave@4a100200 { + /* Filled in by U-Boot */ + mac-address = [ 00 00 00 00 00 00 ]; + }; + + cpsw_emac1: slave@4a100300 { + /* Filled in by U-Boot */ + mac-address = [ 00 00 00 00 00 00 ]; + }; + + }; }; }; -- cgit v1.2.3