From 6781002bec5237ee8ac1e1daeb0ba976e780a884 Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Mon, 13 Oct 2008 20:28:13 +0100 Subject: [ARM] 5287/2: [AT91] Configuration of Static Memory Controller Add a structure 'sam9_smc_config' and function sam9_smc_configure() to allow the board-specific files to specify the configuration of the Static Memory Controller per chip-select. This allows the board file to specify timings for NAND flash, NOR flash or other external peripherals. This functionality can be used for all the SAM9 and CAP9 processors. (the AT91RM9200 has a different memory-controller) This patch is based on similar code in the AVR32 architecture. Signed-off-by: Andrew Victor Signed-off-by: Russell King --- arch/arm/mach-at91/sam9_smc.h | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 arch/arm/mach-at91/sam9_smc.h (limited to 'arch/arm/mach-at91/sam9_smc.h') diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h new file mode 100644 index 000000000000..bf72cfb3455b --- /dev/null +++ b/arch/arm/mach-at91/sam9_smc.h @@ -0,0 +1,33 @@ +/* + * linux/arch/arm/mach-at91/sam9_smc. + * + * Copyright (C) 2008 Andrew Victor + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +struct sam9_smc_config { + /* Setup register */ + u8 ncs_read_setup; + u8 nrd_setup; + u8 ncs_write_setup; + u8 nwe_setup; + + /* Pulse register */ + u8 ncs_read_pulse; + u8 nrd_pulse; + u8 ncs_write_pulse; + u8 nwe_pulse; + + /* Cycle register */ + u16 read_cycle; + u16 write_cycle; + + /* Mode register */ + u32 mode; + u8 tdf_cycles:4; +}; + +extern void __init sam9_smc_configure(int cs, struct sam9_smc_config* config); -- cgit v1.2.3