From 0c0af9e54de28ff7d9da7972fa55b29629c05c10 Mon Sep 17 00:00:00 2001 From: Alan Tull Date: Tue, 28 Jun 2011 11:18:05 -0500 Subject: ENGR00139265-3 mxc alsa soc spdif driver * Add spdif block clock divider settings and spdif_clk_set_rate function to mxc_spdif_platform_data. Signed-off-by: Alan Tull --- arch/arm/mach-mx5/board-mx53_evk.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-mx5/board-mx53_evk.c') diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c index 81aa39755f90..63d555893dc7 100755 --- a/arch/arm/mach-mx5/board-mx53_evk.c +++ b/arch/arm/mach-mx5/board-mx53_evk.c @@ -714,9 +714,12 @@ static void __init mx53_evk_io_init(void) static struct mxc_spdif_platform_data mxc_spdif_data = { .spdif_tx = 1, .spdif_rx = 0, - .spdif_clk_44100 = 0, /* Souce from CKIH1 for 44.1K */ - .spdif_clk_48000 = 7, /* Source from CKIH2 for 48k and 32k */ - .spdif_clkid = 0, + .spdif_clk_44100 = 0, /* tx clk from CKIH1 for 44.1K */ + .spdif_clk_48000 = 7, /* tx clk from CKIH2 for 48k and 32k */ + .spdif_div_44100 = 8, + .spdif_div_48000 = 8, + .spdif_div_32000 = 12, + .spdif_rx_clk = 0, /* rx clk from spdif stream */ .spdif_clk = NULL, /* spdif bus clk */ }; -- cgit v1.2.3