From 59e8e438bed9721c4e4abb824d17ca8803499e00 Mon Sep 17 00:00:00 2001 From: Jason Liu Date: Mon, 14 May 2012 22:36:16 +0800 Subject: ENGR00182324-6 - MX6SL MSL: Add basic board file support Add basic board file support for the i.MX 6SoloLite ARM2-based Validation board. Signed-off-by: Jason Liu Signed-off-by: Robby Cai --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 123 +++++++++++++++++++++++++++++++++++ 1 file changed, 123 insertions(+) create mode 100755 arch/arm/mach-mx6/board-mx6sl_arm2.c (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c new file mode 100755 index 000000000000..2fa33af41969 --- /dev/null +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -0,0 +1,123 @@ +/* + * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "usb.h" +#include "devices-imx6q.h" +#include "crm_regs.h" +#include "cpu_op-mx6.h" +#include "board-mx6sl_arm2.h" + +void __init early_console_setup(unsigned long base, struct clk *clk); + +static inline void mx6_arm2_init_uart(void) +{ + imx6q_add_imx_uart(0, NULL); /* DEBUG UART1 */ +} + +/*! + * Board specific initialization. + */ +static void __init mx6_arm2_init(void) +{ + mxc_iomux_v3_setup_multiple_pads(mx6sl_arm2_pads, ARRAY_SIZE(mx6sl_arm2_pads)); + + mx6_arm2_init_uart(); +} + +extern void __iomem *twd_base; +static void __init mx6_timer_init(void) +{ + struct clk *uart_clk; +#ifdef CONFIG_LOCAL_TIMERS + twd_base = ioremap(LOCAL_TWD_ADDR, SZ_256); + BUG_ON(!twd_base); +#endif + mx6sl_clocks_init(32768, 24000000, 0, 0); + + uart_clk = clk_get_sys("imx-uart.0", NULL); + early_console_setup(UART1_BASE_ADDR, uart_clk); +} + +static struct sys_timer mxc_timer = { + .init = mx6_timer_init, +}; + +static void __init mx6_arm2_reserve(void) +{ + +} + +MACHINE_START(MX6SL_ARM2, "Freescale i.MX 6SoloLite Armadillo2 Board") + .boot_params = MX6SL_PHYS_OFFSET + 0x100, + .map_io = mx6_map_io, + .init_irq = mx6_init_irq, + .init_machine = mx6_arm2_init, + .timer = &mxc_timer, + .reserve = mx6_arm2_reserve, +MACHINE_END -- cgit v1.2.3 From fb41093636260cae03b2f3204fea7e95f507a7c5 Mon Sep 17 00:00:00 2001 From: Ryan QIAN Date: Wed, 16 May 2012 15:01:47 +0800 Subject: ENGR00209483 [imx6sl]: add USDHC support - add SD1, SD2 and SD3 support to mx6sl. Signed-off-by: Ryan QIAN --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 2fa33af41969..2298e17315d8 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -73,11 +73,42 @@ #include "cpu_op-mx6.h" #include "board-mx6sl_arm2.h" +#define MX6_ARM2_SD1_WP IMX_GPIO_NR(4, 6) /* KEY_COL7 */ +#define MX6_ARM2_SD1_CD IMX_GPIO_NR(4, 7) /* KEY_ROW7 */ +#define MX6_ARM2_SD2_WP IMX_GPIO_NR(4, 29) /* SD2_DAT6 */ +#define MX6_ARM2_SD2_CD IMX_GPIO_NR(5, 0) /* SD2_DAT7 */ +#define MX6_ARM2_SD3_CD IMX_GPIO_NR(3, 22) /* REF_CLK_32K */ + +static const struct esdhc_platform_data mx6_arm2_sd1_data __initconst = { + .cd_gpio = MX6_ARM2_SD1_CD, + .wp_gpio = MX6_ARM2_SD1_WP, + .support_8bit = 1, + .keep_power_at_suspend = 1, + .delay_line = 0, +}; + +static const struct esdhc_platform_data mx6_arm2_sd2_data __initconst = { + .cd_gpio = MX6_ARM2_SD2_CD, + .wp_gpio = MX6_ARM2_SD2_WP, + .keep_power_at_suspend = 1, + .delay_line = 0, +}; + +static const struct esdhc_platform_data mx6_arm2_sd3_data __initconst = { + .cd_gpio = MX6_ARM2_SD3_CD, + .keep_power_at_suspend = 1, + .delay_line = 0, +}; + void __init early_console_setup(unsigned long base, struct clk *clk); static inline void mx6_arm2_init_uart(void) { imx6q_add_imx_uart(0, NULL); /* DEBUG UART1 */ + + imx6q_add_sdhci_usdhc_imx(0, &mx6_arm2_sd1_data); + imx6q_add_sdhci_usdhc_imx(1, &mx6_arm2_sd2_data); + imx6q_add_sdhci_usdhc_imx(2, &mx6_arm2_sd3_data); } /*! -- cgit v1.2.3 From 21aa50c85e214dceb4a1b7d0753131e1e59a7359 Mon Sep 17 00:00:00 2001 From: Tony LIU Date: Sat, 28 Apr 2012 10:47:21 +0800 Subject: ENGR00209480-1 mx6sl_usb bring up - add usb otg power gpio control - change cpu_is_mx6x() to cpu_is_mx6 - enable usb hsic support Signed-off-by: Tony LIU --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 43 ++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 2298e17315d8..3879b8d3fb79 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -73,6 +73,8 @@ #include "cpu_op-mx6.h" #include "board-mx6sl_arm2.h" +#define MX6_ARM2_USBOTG1_PWR IMX_GPIO_NR(4, 0) /* KEY_COL4 */ +#define MX6_ARM2_USBOTG2_PWR IMX_GPIO_NR(4, 2) /* KEY_COL5 */ #define MX6_ARM2_SD1_WP IMX_GPIO_NR(4, 6) /* KEY_COL7 */ #define MX6_ARM2_SD1_CD IMX_GPIO_NR(4, 7) /* KEY_ROW7 */ #define MX6_ARM2_SD2_WP IMX_GPIO_NR(4, 29) /* SD2_DAT6 */ @@ -111,6 +113,46 @@ static inline void mx6_arm2_init_uart(void) imx6q_add_sdhci_usdhc_imx(2, &mx6_arm2_sd3_data); } +static void imx6_arm2_usbotg_vbus(bool on) +{ + if (on) + gpio_set_value(MX6_ARM2_USBOTG1_PWR, 1); + else + gpio_set_value(MX6_ARM2_USBOTG1_PWR, 0); +} + +static void __init mx6_arm2_init_usb(void) +{ + int ret = 0; + + imx_otg_base = MX6_IO_ADDRESS(MX6Q_USB_OTG_BASE_ADDR); + + /* disable external charger detect, + * or it will affect signal quality at dp. + */ + + ret = gpio_request(MX6_ARM2_USBOTG1_PWR, "usbotg-pwr"); + if (ret) { + pr_err("failed to get GPIO MX6_ARM2_USBOTG1_PWR:%d\n", ret); + return; + } + gpio_direction_output(MX6_ARM2_USBOTG1_PWR, 0); + + ret = gpio_request(MX6_ARM2_USBOTG2_PWR, "usbh1-pwr"); + if (ret) { + pr_err("failed to get GPIO MX6_ARM2_USBOTG2_PWR:%d\n", ret); + return; + } + gpio_direction_output(MX6_ARM2_USBOTG2_PWR, 1); + + mx6_set_otghost_vbus_func(imx6_arm2_usbotg_vbus); + mx6_usb_dr_init(); + mx6_usb_h1_init(); +#ifdef CONFIG_USB_EHCI_ARC_HSIC + mx6_usb_h2_init(); +#endif +} + /*! * Board specific initialization. */ @@ -119,6 +161,7 @@ static void __init mx6_arm2_init(void) mxc_iomux_v3_setup_multiple_pads(mx6sl_arm2_pads, ARRAY_SIZE(mx6sl_arm2_pads)); mx6_arm2_init_uart(); + mx6_arm2_init_usb(); } extern void __iomem *twd_base; -- cgit v1.2.3 From d35878f313e39e92a09703c707f299b779b1db76 Mon Sep 17 00:00:00 2001 From: Fugang Duan Date: Wed, 16 May 2012 18:27:09 +0800 Subject: ENGR00209520-01 - MX6SL MSL : Add FEC support Add FEC support for mx6-sololite: - Add FEC pad iomux setting. - Power on phy and init fec. - Add devname to distinguish different IP. - Use ANATOP as FEC clock source in default, remove redundant config "FEC_CLOCK_FROM_ANATOP". Signed-off-by: Fugang Duan --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 3879b8d3fb79..220ea3241f24 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -80,6 +80,7 @@ #define MX6_ARM2_SD2_WP IMX_GPIO_NR(4, 29) /* SD2_DAT6 */ #define MX6_ARM2_SD2_CD IMX_GPIO_NR(5, 0) /* SD2_DAT7 */ #define MX6_ARM2_SD3_CD IMX_GPIO_NR(3, 22) /* REF_CLK_32K */ +#define MX6_ARM2_FEC_PWR_EN IMX_GPIO_NR(4, 21) /* FEC_TX_CLK */ static const struct esdhc_platform_data mx6_arm2_sd1_data __initconst = { .cd_gpio = MX6_ARM2_SD1_CD, @@ -113,6 +114,10 @@ static inline void mx6_arm2_init_uart(void) imx6q_add_sdhci_usdhc_imx(2, &mx6_arm2_sd3_data); } +static struct fec_platform_data fec_data __initdata = { + .phy = PHY_INTERFACE_MODE_RMII, +}; + static void imx6_arm2_usbotg_vbus(bool on) { if (on) @@ -161,6 +166,20 @@ static void __init mx6_arm2_init(void) mxc_iomux_v3_setup_multiple_pads(mx6sl_arm2_pads, ARRAY_SIZE(mx6sl_arm2_pads)); mx6_arm2_init_uart(); + /* get enet tx reference clk from FEC_REF_CLK pad. + * GPR1[14] = 0, GPR1[18:17] = 00 + */ + mxc_iomux_set_gpr_register(1, 14, 1, 0); + mxc_iomux_set_gpr_register(1, 17, 2, 0); + + /* power on FEC phy and reset phy */ + gpio_request(MX6_ARM2_FEC_PWR_EN, "fec-pwr"); + gpio_direction_output(MX6_ARM2_FEC_PWR_EN, 1); + /* wait RC ms for hw reset */ + udelay(500); + + imx6_init_fec(fec_data); + mx6_arm2_init_usb(); } -- cgit v1.2.3 From b33af3c2e06806226e58f4bebe3bd02f1e1008e2 Mon Sep 17 00:00:00 2001 From: Robin Gong Date: Thu, 17 May 2012 14:19:01 +0800 Subject: ENGR00209633-2 I2C mx6sl pfuze: add pfuze board support for mx6sl arm2 1.add pmic board support file 2.add i2c support on board-mx6sl_arm2.c 3.update IOMUX setting for I2C pin for mx6sl arm2 board Signed-off-by: Robin Gong --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 41 ++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 220ea3241f24..fd1cb30b4202 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -82,6 +82,7 @@ #define MX6_ARM2_SD3_CD IMX_GPIO_NR(3, 22) /* REF_CLK_32K */ #define MX6_ARM2_FEC_PWR_EN IMX_GPIO_NR(4, 21) /* FEC_TX_CLK */ +extern int __init mx6sl_arm2_init_pfuze100(u32 int_gpio); static const struct esdhc_platform_data mx6_arm2_sd1_data __initconst = { .cd_gpio = MX6_ARM2_SD1_CD, .wp_gpio = MX6_ARM2_SD1_WP, @@ -103,6 +104,36 @@ static const struct esdhc_platform_data mx6_arm2_sd3_data __initconst = { .delay_line = 0, }; +static struct imxi2c_platform_data mx6_arm2_i2c0_data = { + .bitrate = 100000, +}; + +static struct imxi2c_platform_data mx6_arm2_i2c1_data = { + .bitrate = 100000, +}; + +static struct imxi2c_platform_data mx6_arm2_i2c2_data = { + .bitrate = 400000, +}; + +static struct i2c_board_info mxc_i2c0_board_info[] __initdata = { + { + I2C_BOARD_INFO("max17135", 0x48), + /*.platform_data = &max17135_pdata,*/ + }, +}; + +static struct i2c_board_info mxc_i2c1_board_info[] __initdata = { + { + I2C_BOARD_INFO("wm8962", 0x1a), + /*.platform_data = &wm8962_config_data,*/ + }, +}; + +static struct i2c_board_info mxc_i2c2_board_info[] __initdata = { + { + }, +}; void __init early_console_setup(unsigned long base, struct clk *clk); static inline void mx6_arm2_init_uart(void) @@ -165,6 +196,16 @@ static void __init mx6_arm2_init(void) { mxc_iomux_v3_setup_multiple_pads(mx6sl_arm2_pads, ARRAY_SIZE(mx6sl_arm2_pads)); + imx6q_add_imx_i2c(0, &mx6_arm2_i2c0_data); + imx6q_add_imx_i2c(1, &mx6_arm2_i2c1_data); + i2c_register_board_info(0, mxc_i2c0_board_info, + ARRAY_SIZE(mxc_i2c0_board_info)); + i2c_register_board_info(1, mxc_i2c1_board_info, + ARRAY_SIZE(mxc_i2c1_board_info)); + imx6q_add_imx_i2c(2, &mx6_arm2_i2c2_data); + i2c_register_board_info(2, mxc_i2c2_board_info, + ARRAY_SIZE(mxc_i2c2_board_info)); + mx6sl_arm2_init_pfuze100(0); mx6_arm2_init_uart(); /* get enet tx reference clk from FEC_REF_CLK pad. * GPR1[14] = 0, GPR1[18:17] = 00 -- cgit v1.2.3 From 9c4bbfaed02c3ea40e349f3c19057d0677845abd Mon Sep 17 00:00:00 2001 From: Ranjani Vaidyanathan Date: Wed, 16 May 2012 23:41:47 -0500 Subject: ENGR00209657 MX6SL-Initialise CPU_CLK and AHB_CLK to default rates. Set CPU_CLK to be 1GHz at boot and ABH_CLK to be 132MHz. Signed-off-by: Ranjani Vaidyanathan --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index fd1cb30b4202..60325bdc7089 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -196,6 +196,9 @@ static void __init mx6_arm2_init(void) { mxc_iomux_v3_setup_multiple_pads(mx6sl_arm2_pads, ARRAY_SIZE(mx6sl_arm2_pads)); + gp_reg_id = "cpu_vddgp"; + mx6_cpu_regulator_init(); + imx6q_add_imx_i2c(0, &mx6_arm2_i2c0_data); imx6q_add_imx_i2c(1, &mx6_arm2_i2c1_data); i2c_register_board_info(0, mxc_i2c0_board_info, @@ -206,6 +209,7 @@ static void __init mx6_arm2_init(void) i2c_register_board_info(2, mxc_i2c2_board_info, ARRAY_SIZE(mxc_i2c2_board_info)); mx6sl_arm2_init_pfuze100(0); + mx6_arm2_init_uart(); /* get enet tx reference clk from FEC_REF_CLK pad. * GPR1[14] = 0, GPR1[18:17] = 00 -- cgit v1.2.3 From 02dea80ca87217eb3d8942f45cfea24f983940bb Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Fri, 18 May 2012 17:26:02 +0800 Subject: ENGR00209978-1: imx6sl: lcdif: add msl codes for lcdif - update LCDIF pinmux setting (and pad ctrl setting) - correct LCDIF pixel clock setting - add platform device/data for lcdif Signed-off-by: Robby Cai --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 60325bdc7089..eb4245a51a98 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -75,6 +75,7 @@ #define MX6_ARM2_USBOTG1_PWR IMX_GPIO_NR(4, 0) /* KEY_COL4 */ #define MX6_ARM2_USBOTG2_PWR IMX_GPIO_NR(4, 2) /* KEY_COL5 */ +#define MX6_ARM2_LCD_PWR_EN IMX_GPIO_NR(4, 3) /* KEY_ROW5 */ #define MX6_ARM2_SD1_WP IMX_GPIO_NR(4, 6) /* KEY_COL7 */ #define MX6_ARM2_SD1_CD IMX_GPIO_NR(4, 7) /* KEY_ROW7 */ #define MX6_ARM2_SD2_WP IMX_GPIO_NR(4, 29) /* SD2_DAT6 */ @@ -189,6 +190,33 @@ static void __init mx6_arm2_init_usb(void) #endif } +static struct platform_pwm_backlight_data mx6_arm2_pwm_backlight_data = { + .pwm_id = 0, + .max_brightness = 255, + .dft_brightness = 128, + .pwm_period_ns = 50000, +}; +static struct fb_videomode video_modes[] = { + { + /* 800x480 @ 57 Hz , pixel clk @ 32MHz */ + "SEIKO-WVGA", 60, 800, 480, 29850, 99, 164, 33, 10, 10, 10, + FB_SYNC_CLK_LAT_FALL, + FB_VMODE_NONINTERLACED, + 0,}, +}; + +static struct mxc_fb_platform_data fb_data[] = { + { + .interface_pix_fmt = V4L2_PIX_FMT_RGB24, + .mode_str = "SEIKO-WVGA", + .mode = video_modes, + .num_modes = ARRAY_SIZE(video_modes), + }, +}; + +static struct platform_device lcd_wvga_device = { + .name = "lcd_seiko", +}; /*! * Board specific initialization. */ @@ -226,6 +254,14 @@ static void __init mx6_arm2_init(void) imx6_init_fec(fec_data); mx6_arm2_init_usb(); + + imx6q_add_mxc_pwm(0); + imx6q_add_mxc_pwm_backlight(0, &mx6_arm2_pwm_backlight_data); + imx6dl_add_imx_elcdif(&fb_data[0]); + + gpio_request(MX6_ARM2_LCD_PWR_EN, "elcdif-power-on"); + gpio_direction_output(MX6_ARM2_LCD_PWR_EN, 1); + mxc_register_device(&lcd_wvga_device, NULL); } extern void __iomem *twd_base; -- cgit v1.2.3 From ccb8a5e37df8881f2ef44a82501a63bee46316b2 Mon Sep 17 00:00:00 2001 From: Danny Nold Date: Thu, 17 May 2012 15:17:37 -0500 Subject: ENGR00209883-1 - EPDC fb: Add support for MX 6SoloLite ARM2 board - Add EPDC and Max17135 structures and initialization calls to the MX6SL ARM2 board file - Add IOMUX configuration defines and GPIO defines for EPDC/Max17135 - Remove prints/debug from EPDC-related clocks. Signed-off-by: Danny Nold --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 460 ++++++++++++++++++++++++++++++++++- 1 file changed, 459 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index eb4245a51a98..628fb7d4d778 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -83,6 +83,47 @@ #define MX6_ARM2_SD3_CD IMX_GPIO_NR(3, 22) /* REF_CLK_32K */ #define MX6_ARM2_FEC_PWR_EN IMX_GPIO_NR(4, 21) /* FEC_TX_CLK */ +/* EPDC GPIO pins */ +#define MX6SL_ARM2_EPDC_SDDO_0 IMX_GPIO_NR(1, 7) +#define MX6SL_ARM2_EPDC_SDDO_1 IMX_GPIO_NR(1, 8) +#define MX6SL_ARM2_EPDC_SDDO_2 IMX_GPIO_NR(1, 9) +#define MX6SL_ARM2_EPDC_SDDO_3 IMX_GPIO_NR(1, 10) +#define MX6SL_ARM2_EPDC_SDDO_4 IMX_GPIO_NR(1, 11) +#define MX6SL_ARM2_EPDC_SDDO_5 IMX_GPIO_NR(1, 12) +#define MX6SL_ARM2_EPDC_SDDO_6 IMX_GPIO_NR(1, 13) +#define MX6SL_ARM2_EPDC_SDDO_7 IMX_GPIO_NR(1, 14) +#define MX6SL_ARM2_EPDC_SDDO_8 IMX_GPIO_NR(1, 15) +#define MX6SL_ARM2_EPDC_SDDO_9 IMX_GPIO_NR(1, 16) +#define MX6SL_ARM2_EPDC_SDDO_10 IMX_GPIO_NR(1, 17) +#define MX6SL_ARM2_EPDC_SDDO_11 IMX_GPIO_NR(1, 18) +#define MX6SL_ARM2_EPDC_SDDO_12 IMX_GPIO_NR(1, 19) +#define MX6SL_ARM2_EPDC_SDDO_13 IMX_GPIO_NR(1, 20) +#define MX6SL_ARM2_EPDC_SDDO_14 IMX_GPIO_NR(1, 21) +#define MX6SL_ARM2_EPDC_SDDO_15 IMX_GPIO_NR(1, 22) +#define MX6SL_ARM2_EPDC_GDCLK IMX_GPIO_NR(1, 31) +#define MX6SL_ARM2_EPDC_GDSP IMX_GPIO_NR(2, 2) +#define MX6SL_ARM2_EPDC_GDOE IMX_GPIO_NR(2, 0) +#define MX6SL_ARM2_EPDC_GDRL IMX_GPIO_NR(2, 1) +#define MX6SL_ARM2_EPDC_SDCLK IMX_GPIO_NR(1, 23) +#define MX6SL_ARM2_EPDC_SDOE IMX_GPIO_NR(1, 25) +#define MX6SL_ARM2_EPDC_SDLE IMX_GPIO_NR(1, 24) +#define MX6SL_ARM2_EPDC_SDSHR IMX_GPIO_NR(1, 26) +#define MX6SL_ARM2_EPDC_PWRCOM IMX_GPIO_NR(2, 11) +#define MX6SL_ARM2_EPDC_PWRSTAT IMX_GPIO_NR(2, 13) +#define MX6SL_ARM2_EPDC_PWRCTRL0 IMX_GPIO_NR(2, 7) +#define MX6SL_ARM2_EPDC_PWRCTRL1 IMX_GPIO_NR(2, 8) +#define MX6SL_ARM2_EPDC_PWRCTRL2 IMX_GPIO_NR(2, 9) +#define MX6SL_ARM2_EPDC_PWRCTRL3 IMX_GPIO_NR(2, 10) +#define MX6SL_ARM2_EPDC_BDR0 IMX_GPIO_NR(2, 5) +#define MX6SL_ARM2_EPDC_BDR1 IMX_GPIO_NR(2, 6) +#define MX6SL_ARM2_EPDC_SDCE0 IMX_GPIO_NR(1, 27) +#define MX6SL_ARM2_EPDC_SDCE1 IMX_GPIO_NR(1, 28) +#define MX6SL_ARM2_EPDC_SDCE2 IMX_GPIO_NR(1, 29) +#define MX6SL_ARM2_EPDC_PMIC_WAKE IMX_GPIO_NR(2, 14) /* EPDC_PWRWAKEUP */ +#define MX6SL_ARM2_EPDC_PMIC_INT IMX_GPIO_NR(2, 12) /* EPDC_PWRINT */ +#define MX6SL_ARM2_EPDC_VCOM IMX_GPIO_NR(2, 3) + +static int max17135_regulator_init(struct max17135 *max17135); extern int __init mx6sl_arm2_init_pfuze100(u32 int_gpio); static const struct esdhc_platform_data mx6_arm2_sd1_data __initconst = { .cd_gpio = MX6_ARM2_SD1_CD, @@ -105,6 +146,175 @@ static const struct esdhc_platform_data mx6_arm2_sd3_data __initconst = { .delay_line = 0, }; +#define mV_to_uV(mV) (mV * 1000) +#define uV_to_mV(uV) (uV / 1000) +#define V_to_uV(V) (mV_to_uV(V * 1000)) +#define uV_to_V(uV) (uV_to_mV(uV) / 1000) + +static struct regulator_consumer_supply display_consumers[] = { + { + /* MAX17135 */ + .supply = "DISPLAY", + }, +}; + +static struct regulator_consumer_supply vcom_consumers[] = { + { + /* MAX17135 */ + .supply = "VCOM", + }, +}; + +static struct regulator_consumer_supply v3p3_consumers[] = { + { + /* MAX17135 */ + .supply = "V3P3", + }, +}; + +static struct regulator_init_data max17135_init_data[] = { + { + .constraints = { + .name = "DISPLAY", + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(display_consumers), + .consumer_supplies = display_consumers, + }, { + .constraints = { + .name = "GVDD", + .min_uV = V_to_uV(20), + .max_uV = V_to_uV(20), + }, + }, { + .constraints = { + .name = "GVEE", + .min_uV = V_to_uV(-22), + .max_uV = V_to_uV(-22), + }, + }, { + .constraints = { + .name = "HVINN", + .min_uV = V_to_uV(-22), + .max_uV = V_to_uV(-22), + }, + }, { + .constraints = { + .name = "HVINP", + .min_uV = V_to_uV(20), + .max_uV = V_to_uV(20), + }, + }, { + .constraints = { + .name = "VCOM", + .min_uV = mV_to_uV(-4325), + .max_uV = mV_to_uV(-500), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(vcom_consumers), + .consumer_supplies = vcom_consumers, + }, { + .constraints = { + .name = "VNEG", + .min_uV = V_to_uV(-15), + .max_uV = V_to_uV(-15), + }, + }, { + .constraints = { + .name = "VPOS", + .min_uV = V_to_uV(15), + .max_uV = V_to_uV(15), + }, + }, { + .constraints = { + .name = "V3P3", + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(v3p3_consumers), + .consumer_supplies = v3p3_consumers, + }, +}; + +static struct platform_device max17135_sensor_device = { + .name = "max17135_sensor", + .id = 0, +}; + +static struct max17135_platform_data max17135_pdata __initdata = { + .vneg_pwrup = 1, + .gvee_pwrup = 1, + .vpos_pwrup = 2, + .gvdd_pwrup = 1, + .gvdd_pwrdn = 1, + .vpos_pwrdn = 2, + .gvee_pwrdn = 1, + .vneg_pwrdn = 1, + .gpio_pmic_pwrgood = MX6SL_ARM2_EPDC_PWRSTAT, + .gpio_pmic_vcom_ctrl = MX6SL_ARM2_EPDC_VCOM, + .gpio_pmic_wakeup = MX6SL_ARM2_EPDC_PMIC_WAKE, + .gpio_pmic_v3p3 = MX6SL_ARM2_EPDC_PWRCTRL0, + .gpio_pmic_intr = MX6SL_ARM2_EPDC_PMIC_INT, + .regulator_init = max17135_init_data, + .init = max17135_regulator_init, +}; + +static int __init max17135_regulator_init(struct max17135 *max17135) +{ + struct max17135_platform_data *pdata = &max17135_pdata; + int i, ret; + + max17135->gvee_pwrup = pdata->gvee_pwrup; + max17135->vneg_pwrup = pdata->vneg_pwrup; + max17135->vpos_pwrup = pdata->vpos_pwrup; + max17135->gvdd_pwrup = pdata->gvdd_pwrup; + max17135->gvdd_pwrdn = pdata->gvdd_pwrdn; + max17135->vpos_pwrdn = pdata->vpos_pwrdn; + max17135->vneg_pwrdn = pdata->vneg_pwrdn; + max17135->gvee_pwrdn = pdata->gvee_pwrdn; + + max17135->max_wait = pdata->vpos_pwrup + pdata->vneg_pwrup + + pdata->gvdd_pwrup + pdata->gvee_pwrup; + + max17135->gpio_pmic_pwrgood = pdata->gpio_pmic_pwrgood; + max17135->gpio_pmic_vcom_ctrl = pdata->gpio_pmic_vcom_ctrl; + max17135->gpio_pmic_wakeup = pdata->gpio_pmic_wakeup; + max17135->gpio_pmic_v3p3 = pdata->gpio_pmic_v3p3; + max17135->gpio_pmic_intr = pdata->gpio_pmic_intr; + + gpio_request(max17135->gpio_pmic_wakeup, "epdc-pmic-wake"); + gpio_direction_output(max17135->gpio_pmic_wakeup, 0); + + gpio_request(max17135->gpio_pmic_vcom_ctrl, "epdc-vcom"); + gpio_direction_output(max17135->gpio_pmic_vcom_ctrl, 0); + + gpio_request(max17135->gpio_pmic_v3p3, "epdc-v3p3"); + gpio_direction_output(max17135->gpio_pmic_v3p3, 0); + + gpio_request(max17135->gpio_pmic_intr, "epdc-pmic-int"); + gpio_direction_input(max17135->gpio_pmic_intr); + + gpio_request(max17135->gpio_pmic_pwrgood, "epdc-pwrstat"); + gpio_direction_input(max17135->gpio_pmic_pwrgood); + + max17135->vcom_setup = false; + max17135->init_done = false; + + for (i = 0; i < MAX17135_NUM_REGULATORS; i++) { + ret = max17135_register_regulator(max17135, i, + &pdata->regulator_init[i]); + if (ret != 0) { + printk(KERN_ERR"max17135 regulator init failed: %d\n", + ret); + return ret; + } + } + + regulator_has_full_constraints(); + + return 0; +} + static struct imxi2c_platform_data mx6_arm2_i2c0_data = { .bitrate = 100000, }; @@ -120,7 +330,7 @@ static struct imxi2c_platform_data mx6_arm2_i2c2_data = { static struct i2c_board_info mxc_i2c0_board_info[] __initdata = { { I2C_BOARD_INFO("max17135", 0x48), - /*.platform_data = &max17135_pdata,*/ + .platform_data = &max17135_pdata, }, }; @@ -135,6 +345,7 @@ static struct i2c_board_info mxc_i2c2_board_info[] __initdata = { { }, }; + void __init early_console_setup(unsigned long base, struct clk *clk); static inline void mx6_arm2_init_uart(void) @@ -150,6 +361,248 @@ static struct fec_platform_data fec_data __initdata = { .phy = PHY_INTERFACE_MODE_RMII, }; +static int epdc_get_pins(void) +{ + int ret = 0; + + /* Claim GPIOs for EPDC pins - used during power up/down */ + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_0, "epdc_d0"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_1, "epdc_d1"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_2, "epdc_d2"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_3, "epdc_d3"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_4, "epdc_d4"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_5, "epdc_d5"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_6, "epdc_d6"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_7, "epdc_d7"); + ret |= gpio_request(MX6SL_ARM2_EPDC_GDCLK, "epdc_gdclk"); + ret |= gpio_request(MX6SL_ARM2_EPDC_GDSP, "epdc_gdsp"); + ret |= gpio_request(MX6SL_ARM2_EPDC_GDOE, "epdc_gdoe"); + ret |= gpio_request(MX6SL_ARM2_EPDC_GDRL, "epdc_gdrl"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDCLK, "epdc_sdclk"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDOE, "epdc_sdoe"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDLE, "epdc_sdle"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDSHR, "epdc_sdshr"); + ret |= gpio_request(MX6SL_ARM2_EPDC_BDR0, "epdc_bdr0"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDCE0, "epdc_sdce0"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDCE1, "epdc_sdce1"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDCE2, "epdc_sdce2"); + + return ret; +} + +static void epdc_put_pins(void) +{ + gpio_free(MX6SL_ARM2_EPDC_SDDO_0); + gpio_free(MX6SL_ARM2_EPDC_SDDO_1); + gpio_free(MX6SL_ARM2_EPDC_SDDO_2); + gpio_free(MX6SL_ARM2_EPDC_SDDO_3); + gpio_free(MX6SL_ARM2_EPDC_SDDO_4); + gpio_free(MX6SL_ARM2_EPDC_SDDO_5); + gpio_free(MX6SL_ARM2_EPDC_SDDO_6); + gpio_free(MX6SL_ARM2_EPDC_SDDO_7); + gpio_free(MX6SL_ARM2_EPDC_GDCLK); + gpio_free(MX6SL_ARM2_EPDC_GDSP); + gpio_free(MX6SL_ARM2_EPDC_GDOE); + gpio_free(MX6SL_ARM2_EPDC_GDRL); + gpio_free(MX6SL_ARM2_EPDC_SDCLK); + gpio_free(MX6SL_ARM2_EPDC_SDOE); + gpio_free(MX6SL_ARM2_EPDC_SDLE); + gpio_free(MX6SL_ARM2_EPDC_SDSHR); + gpio_free(MX6SL_ARM2_EPDC_BDR0); + gpio_free(MX6SL_ARM2_EPDC_SDCE0); + gpio_free(MX6SL_ARM2_EPDC_SDCE1); + gpio_free(MX6SL_ARM2_EPDC_SDCE2); +} + +static void epdc_enable_pins(void) +{ + /* Configure MUX settings to enable EPDC use */ + mxc_iomux_v3_setup_multiple_pads(mx6sl_arm2_epdc_enable_pads, \ + ARRAY_SIZE(mx6sl_arm2_epdc_enable_pads)); + + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_0); + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_1); + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_2); + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_3); + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_4); + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_5); + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_6); + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_7); + gpio_direction_input(MX6SL_ARM2_EPDC_GDCLK); + gpio_direction_input(MX6SL_ARM2_EPDC_GDSP); + gpio_direction_input(MX6SL_ARM2_EPDC_GDOE); + gpio_direction_input(MX6SL_ARM2_EPDC_GDRL); + gpio_direction_input(MX6SL_ARM2_EPDC_SDCLK); + gpio_direction_input(MX6SL_ARM2_EPDC_SDOE); + gpio_direction_input(MX6SL_ARM2_EPDC_SDLE); + gpio_direction_input(MX6SL_ARM2_EPDC_SDSHR); + gpio_direction_input(MX6SL_ARM2_EPDC_BDR0); + gpio_direction_input(MX6SL_ARM2_EPDC_SDCE0); + gpio_direction_input(MX6SL_ARM2_EPDC_SDCE1); + gpio_direction_input(MX6SL_ARM2_EPDC_SDCE2); +} + +static void epdc_disable_pins(void) +{ + /* Configure MUX settings for EPDC pins to + * GPIO and drive to 0. */ + mxc_iomux_v3_setup_multiple_pads(mx6sl_arm2_epdc_disable_pads, \ + ARRAY_SIZE(mx6sl_arm2_epdc_disable_pads)); + + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_0, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_1, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_2, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_3, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_4, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_5, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_6, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_7, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_GDCLK, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_GDSP, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_GDOE, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_GDRL, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDCLK, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDOE, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDLE, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDSHR, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_BDR0, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDCE0, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDCE1, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDCE2, 0); +} + +static struct fb_videomode e60_v110_mode = { + .name = "E60_V110", + .refresh = 50, + .xres = 800, + .yres = 600, + .pixclock = 18604700, + .left_margin = 8, + .right_margin = 178, + .upper_margin = 4, + .lower_margin = 10, + .hsync_len = 20, + .vsync_len = 4, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, +}; +static struct fb_videomode e60_v220_mode = { + .name = "E60_V220", + .refresh = 85, + .xres = 800, + .yres = 600, + .pixclock = 30000000, + .left_margin = 8, + .right_margin = 164, + .upper_margin = 4, + .lower_margin = 8, + .hsync_len = 4, + .vsync_len = 1, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, + .refresh = 85, + .xres = 800, + .yres = 600, +}; +static struct fb_videomode e060scm_mode = { + .name = "E060SCM", + .refresh = 85, + .xres = 800, + .yres = 600, + .pixclock = 26666667, + .left_margin = 8, + .right_margin = 100, + .upper_margin = 4, + .lower_margin = 8, + .hsync_len = 4, + .vsync_len = 1, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, +}; +static struct fb_videomode e97_v110_mode = { + .name = "E97_V110", + .refresh = 50, + .xres = 1200, + .yres = 825, + .pixclock = 32000000, + .left_margin = 12, + .right_margin = 128, + .upper_margin = 4, + .lower_margin = 10, + .hsync_len = 20, + .vsync_len = 4, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, +}; + +static struct imx_epdc_fb_mode panel_modes[] = { + { + &e60_v110_mode, + 4, /* vscan_holdoff */ + 10, /* sdoed_width */ + 20, /* sdoed_delay */ + 10, /* sdoez_width */ + 20, /* sdoez_delay */ + 428, /* gdclk_hp_offs */ + 20, /* gdsp_offs */ + 0, /* gdoe_offs */ + 1, /* gdclk_offs */ + 1, /* num_ce */ + }, + { + &e60_v220_mode, + 4, /* vscan_holdoff */ + 10, /* sdoed_width */ + 20, /* sdoed_delay */ + 10, /* sdoez_width */ + 20, /* sdoez_delay */ + 465, /* gdclk_hp_offs */ + 20, /* gdsp_offs */ + 0, /* gdoe_offs */ + 9, /* gdclk_offs */ + 1, /* num_ce */ + }, + { + &e060scm_mode, + 4, /* vscan_holdoff */ + 10, /* sdoed_width */ + 20, /* sdoed_delay */ + 10, /* sdoez_width */ + 20, /* sdoez_delay */ + 419, /* gdclk_hp_offs */ + 20, /* gdsp_offs */ + 0, /* gdoe_offs */ + 5, /* gdclk_offs */ + 1, /* num_ce */ + }, + { + &e97_v110_mode, + 8, /* vscan_holdoff */ + 10, /* sdoed_width */ + 20, /* sdoed_delay */ + 10, /* sdoez_width */ + 20, /* sdoez_delay */ + 632, /* gdclk_hp_offs */ + 20, /* gdsp_offs */ + 0, /* gdoe_offs */ + 1, /* gdclk_offs */ + 3, /* num_ce */ + } +}; + +static struct imx_epdc_fb_platform_data epdc_data = { + .epdc_mode = panel_modes, + .num_modes = ARRAY_SIZE(panel_modes), + .get_pins = epdc_get_pins, + .put_pins = epdc_put_pins, + .enable_pins = epdc_enable_pins, + .disable_pins = epdc_disable_pins, +}; + static void imx6_arm2_usbotg_vbus(bool on) { if (on) @@ -262,6 +715,11 @@ static void __init mx6_arm2_init(void) gpio_request(MX6_ARM2_LCD_PWR_EN, "elcdif-power-on"); gpio_direction_output(MX6_ARM2_LCD_PWR_EN, 1); mxc_register_device(&lcd_wvga_device, NULL); + + imx6dl_add_imx_pxp(); + imx6dl_add_imx_pxp_client(); + mxc_register_device(&max17135_sensor_device, NULL); + imx6dl_add_imx_epdc(&epdc_data); } extern void __iomem *twd_base; -- cgit v1.2.3 From 8d705065aa49428955e504490e3f0d83b50218f8 Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Fri, 18 May 2012 18:31:50 +0800 Subject: ENGR00209994: imx6sl: add ePxP support add ePxP support on ARM2 board Signed-off-by: Robby Cai --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 628fb7d4d778..72220c0debf8 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -708,6 +708,9 @@ static void __init mx6_arm2_init(void) mx6_arm2_init_usb(); + imx6dl_add_imx_pxp(); + imx6dl_add_imx_pxp_client(); + imx6q_add_mxc_pwm(0); imx6q_add_mxc_pwm_backlight(0, &mx6_arm2_pwm_backlight_data); imx6dl_add_imx_elcdif(&fb_data[0]); -- cgit v1.2.3 From 49f744921cfa19f2250d5f55cda6157aad6b8234 Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Fri, 18 May 2012 18:45:41 +0800 Subject: ENGR00210003: imx6sl: add SPI support - configure the pinmux for SPI module working. Signed-off-by: Robby Cai --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 72220c0debf8..0cea2c8ec2ff 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -78,6 +78,7 @@ #define MX6_ARM2_LCD_PWR_EN IMX_GPIO_NR(4, 3) /* KEY_ROW5 */ #define MX6_ARM2_SD1_WP IMX_GPIO_NR(4, 6) /* KEY_COL7 */ #define MX6_ARM2_SD1_CD IMX_GPIO_NR(4, 7) /* KEY_ROW7 */ +#define MX6_ARM2_ECSPI1_CS0 IMX_GPIO_NR(4, 11) /* ECSPI1_SS0 */ #define MX6_ARM2_SD2_WP IMX_GPIO_NR(4, 29) /* SD2_DAT6 */ #define MX6_ARM2_SD2_CD IMX_GPIO_NR(5, 0) /* SD2_DAT7 */ #define MX6_ARM2_SD3_CD IMX_GPIO_NR(3, 22) /* REF_CLK_32K */ @@ -315,6 +316,15 @@ static int __init max17135_regulator_init(struct max17135 *max17135) return 0; } +static int mx6_arm2_spi_cs[] = { + MX6_ARM2_ECSPI1_CS0, +}; + +static const struct spi_imx_master mx6_arm2_spi_data __initconst = { + .chipselect = mx6_arm2_spi_cs, + .num_chipselect = ARRAY_SIZE(mx6_arm2_spi_cs), +}; + static struct imxi2c_platform_data mx6_arm2_i2c0_data = { .bitrate = 100000, }; -- cgit v1.2.3 From dc9268331b2b6bc4808e94acf0a201c810364def Mon Sep 17 00:00:00 2001 From: Ranjani Vaidyanathan Date: Mon, 14 May 2012 16:12:59 -0500 Subject: ENGR00209846 MX6SL-Enable DVFS_CORE on all MX6 platforms Add support DVFS-CORE to MX6Sololite. Set PLL1 in bypass mode when ARM freq drops below 400MHz. ARM will be sourced from PLL2_PFD2_400M in this case. Signed-off-by: Ranjani Vaidyanathan --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 0cea2c8ec2ff..4e0b7f5119dd 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -356,6 +356,29 @@ static struct i2c_board_info mxc_i2c2_board_info[] __initdata = { }, }; +static struct mxc_dvfs_platform_data mx6sl_arm2_dvfscore_data = { + .reg_id = "cpu_vddgp", + .clk1_id = "cpu_clk", + .clk2_id = "gpc_dvfs_clk", + .gpc_cntr_offset = MXC_GPC_CNTR_OFFSET, + .ccm_cdcr_offset = MXC_CCM_CDCR_OFFSET, + .ccm_cacrr_offset = MXC_CCM_CACRR_OFFSET, + .ccm_cdhipr_offset = MXC_CCM_CDHIPR_OFFSET, + .prediv_mask = 0x1F800, + .prediv_offset = 11, + .prediv_val = 3, + .div3ck_mask = 0xE0000000, + .div3ck_offset = 29, + .div3ck_val = 2, + .emac_val = 0x08, + .upthr_val = 25, + .dnthr_val = 9, + .pncthr_val = 33, + .upcnt_val = 10, + .dncnt_val = 10, + .delay_time = 80, +}; + void __init early_console_setup(unsigned long base, struct clk *clk); static inline void mx6_arm2_init_uart(void) @@ -733,6 +756,8 @@ static void __init mx6_arm2_init(void) imx6dl_add_imx_pxp_client(); mxc_register_device(&max17135_sensor_device, NULL); imx6dl_add_imx_epdc(&epdc_data); + + imx6q_add_dvfs_core(&mx6sl_arm2_dvfscore_data); } extern void __iomem *twd_base; -- cgit v1.2.3 From bf51c3936a751889207fc89bc67632258c7a5bc6 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Fri, 18 May 2012 19:58:25 +0800 Subject: ENGR00209501 [MX6]Support different platforms DDR IO setting in DSM As Mx6 dq, dl and sl have different DDR IO address, so we need to do the DDR IO low power setting according to different CPU type. Also, Mx6sl has some different config in DSM, need to separate it from other platforms. Change mx6q_suspend to mx6_suspend, as it is a common thing for all mx6 platforms. Add rtc driver for mxsl platform to support suspend/resume test. Signed-off-by: Anson Huang --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 4e0b7f5119dd..020a88f4e42a 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -713,6 +713,8 @@ static void __init mx6_arm2_init(void) gp_reg_id = "cpu_vddgp"; mx6_cpu_regulator_init(); + imx6q_add_imx_snvs_rtc(); + imx6q_add_imx_i2c(0, &mx6_arm2_i2c0_data); imx6q_add_imx_i2c(1, &mx6_arm2_i2c1_data); i2c_register_board_info(0, mxc_i2c0_board_info, -- cgit v1.2.3 From 13fd3a7fc6a7c47ee41d35ad495d3556e31c1ab8 Mon Sep 17 00:00:00 2001 From: Gary Zhang Date: Mon, 21 May 2012 18:29:43 +0800 Subject: ENGR00209739-2 MX6SL_ARM2: add wm8962 support add wm8962 codec support for mx6sl arm2 Signed-off-by: Gary Zhang --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 112 ++++++++++++++++++++++++++++++++++- 1 file changed, 111 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 020a88f4e42a..3043ece3e674 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -79,6 +79,7 @@ #define MX6_ARM2_SD1_WP IMX_GPIO_NR(4, 6) /* KEY_COL7 */ #define MX6_ARM2_SD1_CD IMX_GPIO_NR(4, 7) /* KEY_ROW7 */ #define MX6_ARM2_ECSPI1_CS0 IMX_GPIO_NR(4, 11) /* ECSPI1_SS0 */ +#define MX6_ARM2_HEADPHONE_DET IMX_GPIO_NR(4, 19) /* FEC_RX_ER */ #define MX6_ARM2_SD2_WP IMX_GPIO_NR(4, 29) /* SD2_DAT6 */ #define MX6_ARM2_SD2_CD IMX_GPIO_NR(5, 0) /* SD2_DAT7 */ #define MX6_ARM2_SD3_CD IMX_GPIO_NR(3, 22) /* REF_CLK_32K */ @@ -125,6 +126,8 @@ #define MX6SL_ARM2_EPDC_VCOM IMX_GPIO_NR(2, 3) static int max17135_regulator_init(struct max17135 *max17135); +struct clk *extern_audio_root; + extern int __init mx6sl_arm2_init_pfuze100(u32 int_gpio); static const struct esdhc_platform_data mx6_arm2_sd1_data __initconst = { .cd_gpio = MX6_ARM2_SD1_CD, @@ -325,6 +328,110 @@ static const struct spi_imx_master mx6_arm2_spi_data __initconst = { .num_chipselect = ARRAY_SIZE(mx6_arm2_spi_cs), }; +static struct imx_ssi_platform_data mx6_sabresd_ssi_pdata = { + .flags = IMX_SSI_DMA | IMX_SSI_SYN, +}; + +static struct mxc_audio_platform_data wm8962_data; + +static struct platform_device mx6_sabresd_audio_wm8962_device = { + .name = "imx-wm8962", +}; + +static struct wm8962_pdata wm8962_config_data = { + +}; + +static int wm8962_clk_enable(int enable) +{ + if (enable) + clk_enable(extern_audio_root); + else + clk_disable(extern_audio_root); + + return 0; +} + +static int mxc_wm8962_init(void) +{ + struct clk *pll4; + int rate; + + extern_audio_root = clk_get(NULL, "extern_audio_clk"); + if (IS_ERR(extern_audio_root)) { + pr_err("can't get extern_audio_root clock.\n"); + return PTR_ERR(extern_audio_root); + } + + pll4 = clk_get(NULL, "pll4"); + if (IS_ERR(pll4)) { + pr_err("can't get pll4 clock.\n"); + return PTR_ERR(pll4); + } + + clk_set_parent(extern_audio_root, pll4); + + rate = clk_round_rate(extern_audio_root, 26000000); + clk_set_rate(extern_audio_root, rate); + + wm8962_data.sysclk = rate; + + return 0; +} + +static struct mxc_audio_platform_data wm8962_data = { + .ssi_num = 1, + .src_port = 2, + .ext_port = 3, + .hp_gpio = MX6_ARM2_HEADPHONE_DET, + .hp_active_low = 1, + .mic_gpio = -1, + .mic_active_low = 1, + .init = mxc_wm8962_init, + .clock_enable = wm8962_clk_enable, +}; + +static struct regulator_consumer_supply sabresd_vwm8962_consumers[] = { + REGULATOR_SUPPLY("SPKVDD1", "1-001a"), + REGULATOR_SUPPLY("SPKVDD2", "1-001a"), +}; + +static struct regulator_init_data sabresd_vwm8962_init = { + .constraints = { + .name = "SPKVDD", + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .boot_on = 1, + }, + .num_consumer_supplies = ARRAY_SIZE(sabresd_vwm8962_consumers), + .consumer_supplies = sabresd_vwm8962_consumers, +}; + +static struct fixed_voltage_config sabresd_vwm8962_reg_config = { + .supply_name = "SPKVDD", + .microvolts = 4325000, + .gpio = -1, + .enabled_at_boot = 1, + .init_data = &sabresd_vwm8962_init, +}; + +static struct platform_device sabresd_vwm8962_reg_devices = { + .name = "reg-fixed-voltage", + .id = 4, + .dev = { + .platform_data = &sabresd_vwm8962_reg_config, + }, +}; + +static int __init imx6q_init_audio(void) +{ + platform_device_register(&sabresd_vwm8962_reg_devices); + mxc_register_device(&mx6_sabresd_audio_wm8962_device, + &wm8962_data); + imx6q_add_imx_ssi(1, &mx6_sabresd_ssi_pdata); + + return 0; +} + static struct imxi2c_platform_data mx6_arm2_i2c0_data = { .bitrate = 100000, }; @@ -347,7 +454,7 @@ static struct i2c_board_info mxc_i2c0_board_info[] __initdata = { static struct i2c_board_info mxc_i2c1_board_info[] __initdata = { { I2C_BOARD_INFO("wm8962", 0x1a), - /*.platform_data = &wm8962_config_data,*/ + .platform_data = &wm8962_config_data, }, }; @@ -760,6 +867,9 @@ static void __init mx6_arm2_init(void) imx6dl_add_imx_epdc(&epdc_data); imx6q_add_dvfs_core(&mx6sl_arm2_dvfscore_data); + + imx6q_init_audio(); + } extern void __iomem *twd_base; -- cgit v1.2.3 From 6bf617cf662b45ac43a62a7c97ad06c0f598864d Mon Sep 17 00:00:00 2001 From: Fugang Duan Date: Sat, 19 May 2012 15:30:46 +0800 Subject: ENGR00209994-2 : imx6sl: remove repeated ePxP device register. - remove repeated ePXP device register. Signed-off-by: Fugang Duan --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 3043ece3e674..08f20f61d41b 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -121,6 +121,7 @@ #define MX6SL_ARM2_EPDC_SDCE0 IMX_GPIO_NR(1, 27) #define MX6SL_ARM2_EPDC_SDCE1 IMX_GPIO_NR(1, 28) #define MX6SL_ARM2_EPDC_SDCE2 IMX_GPIO_NR(1, 29) +#define MX6SL_ARM2_EPDC_SDCE3 IMX_GPIO_NR(1, 30) #define MX6SL_ARM2_EPDC_PMIC_WAKE IMX_GPIO_NR(2, 14) /* EPDC_PWRWAKEUP */ #define MX6SL_ARM2_EPDC_PMIC_INT IMX_GPIO_NR(2, 12) /* EPDC_PWRINT */ #define MX6SL_ARM2_EPDC_VCOM IMX_GPIO_NR(2, 3) @@ -850,9 +851,6 @@ static void __init mx6_arm2_init(void) mx6_arm2_init_usb(); - imx6dl_add_imx_pxp(); - imx6dl_add_imx_pxp_client(); - imx6q_add_mxc_pwm(0); imx6q_add_mxc_pwm_backlight(0, &mx6_arm2_pwm_backlight_data); imx6dl_add_imx_elcdif(&fb_data[0]); -- cgit v1.2.3 From b133bc80f65448950d15230b946af6ed18a46415 Mon Sep 17 00:00:00 2001 From: Fugang Duan Date: Sat, 19 May 2012 10:36:46 +0800 Subject: ENGR00210075-1 - MX6SL MSL: Add SPDC support for MX6SoloLite ARM2 board - Add IOMUX pad config defines and GPIO defines - Add platform device/data for SPDC - Add IRQ number define for SPDC Signed-off-by: Fugang Duan --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 160 ++++++++++++++++++++++++++++++++++- 1 file changed, 159 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 08f20f61d41b..57d26f1ee6a9 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -744,6 +744,161 @@ static struct imx_epdc_fb_platform_data epdc_data = { .disable_pins = epdc_disable_pins, }; +static int spdc_get_pins(void) +{ + int ret = 0; + + /* Claim GPIOs for SPDC pins - used during power up/down */ + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_0, "SPDC_D0"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_1, "SPDC_D1"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_2, "SPDC_D2"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_3, "SPDC_D3"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_4, "SPDC_D4"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_5, "SPDC_D5"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_6, "SPDC_D6"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_7, "SPDC_D7"); + + ret |= gpio_request(MX6SL_ARM2_EPDC_GDOE, "SIPIX_YOE"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_9, "SIPIX_PWR_RDY"); + + ret |= gpio_request(MX6SL_ARM2_EPDC_GDSP, "SIPIX_YDIO"); + + ret |= gpio_request(MX6SL_ARM2_EPDC_GDCLK, "SIPIX_YCLK"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDSHR, "SIPIX_XDIO"); + + ret |= gpio_request(MX6SL_ARM2_EPDC_SDLE, "SIPIX_LD"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDCE1, "SIPIX_SOE"); + + ret |= gpio_request(MX6SL_ARM2_EPDC_SDCLK, "SIPIX_XCLK"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDDO_10, "SIPIX_SHD_N"); + ret |= gpio_request(MX6SL_ARM2_EPDC_SDCE0, "SIPIX2_CE"); + + return ret; +} + +static void spdc_put_pins(void) +{ + gpio_free(MX6SL_ARM2_EPDC_SDDO_0); + gpio_free(MX6SL_ARM2_EPDC_SDDO_1); + gpio_free(MX6SL_ARM2_EPDC_SDDO_2); + gpio_free(MX6SL_ARM2_EPDC_SDDO_3); + gpio_free(MX6SL_ARM2_EPDC_SDDO_4); + gpio_free(MX6SL_ARM2_EPDC_SDDO_5); + gpio_free(MX6SL_ARM2_EPDC_SDDO_6); + gpio_free(MX6SL_ARM2_EPDC_SDDO_7); + + gpio_free(MX6SL_ARM2_EPDC_GDOE); + gpio_free(MX6SL_ARM2_EPDC_SDDO_9); + gpio_free(MX6SL_ARM2_EPDC_GDSP); + gpio_free(MX6SL_ARM2_EPDC_GDCLK); + gpio_free(MX6SL_ARM2_EPDC_SDSHR); + gpio_free(MX6SL_ARM2_EPDC_SDLE); + gpio_free(MX6SL_ARM2_EPDC_SDCE1); + gpio_free(MX6SL_ARM2_EPDC_SDCLK); + gpio_free(MX6SL_ARM2_EPDC_SDDO_10); + gpio_free(MX6SL_ARM2_EPDC_SDCE0); +} + +static void spdc_enable_pins(void) +{ + /* Configure MUX settings to enable SPDC use */ + mxc_iomux_v3_setup_multiple_pads(mx6sl_arm2_spdc_enable_pads, \ + ARRAY_SIZE(mx6sl_arm2_spdc_enable_pads)); + + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_0); + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_1); + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_2); + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_3); + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_4); + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_5); + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_6); + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_7); + gpio_direction_input(MX6SL_ARM2_EPDC_GDOE); + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_9); + gpio_direction_input(MX6SL_ARM2_EPDC_GDSP); + gpio_direction_input(MX6SL_ARM2_EPDC_GDCLK); + gpio_direction_input(MX6SL_ARM2_EPDC_SDSHR); + gpio_direction_input(MX6SL_ARM2_EPDC_SDLE); + gpio_direction_input(MX6SL_ARM2_EPDC_SDCE1); + gpio_direction_input(MX6SL_ARM2_EPDC_SDCLK); + gpio_direction_input(MX6SL_ARM2_EPDC_SDDO_10); + gpio_direction_input(MX6SL_ARM2_EPDC_SDCE0); +} + +static void spdc_disable_pins(void) +{ + /* Configure MUX settings for SPDC pins to + * GPIO and drive to 0. */ + mxc_iomux_v3_setup_multiple_pads(mx6sl_arm2_spdc_disable_pads, \ + ARRAY_SIZE(mx6sl_arm2_spdc_disable_pads)); + + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_0, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_1, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_2, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_3, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_4, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_5, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_6, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_7, 0); + + gpio_direction_output(MX6SL_ARM2_EPDC_GDOE, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_9, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_GDSP, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_GDCLK, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDSHR, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDLE, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDCE1, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDCLK, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDDO_10, 0); + gpio_direction_output(MX6SL_ARM2_EPDC_SDCE0, 0); +} + +static struct imx_spdc_panel_init_set spdc_init_set = { + .yoe_pol = false, + .dual_gate = false, + .resolution = 0, + .ud = false, + .rl = false, + .data_filter_n = true, + .power_ready = true, + .rgbw_mode_enable = false, + .hburst_len_en = true, +}; + +static struct fb_videomode erk_1_4_a01 = { + .name = "ERK_1_4_A01", + .refresh = 50, + .xres = 800, + .yres = 600, + .pixclock = 40000000, + .vmode = FB_VMODE_NONINTERLACED, +}; + +static struct imx_spdc_fb_mode spdc_panel_modes[] = { + { + &erk_1_4_a01, + &spdc_init_set, + .wave_timing = "pvi" + }, +}; + +static struct imx_spdc_fb_platform_data spdc_data = { + .spdc_mode = spdc_panel_modes, + .num_modes = ARRAY_SIZE(spdc_panel_modes), + .get_pins = spdc_get_pins, + .put_pins = spdc_put_pins, + .enable_pins = spdc_enable_pins, + .disable_pins = spdc_disable_pins, +}; + +#if defined(CONFIG_FB_MXC_SIPIX_PANEL) +static void setup_spdc(void) +{ + /* GPR0[8]: 0:EPDC, 1:SPDC */ + mxc_iomux_set_gpr_register(0, 8, 1, 1); +} +#endif + static void imx6_arm2_usbotg_vbus(bool on) { if (on) @@ -863,7 +1018,10 @@ static void __init mx6_arm2_init(void) imx6dl_add_imx_pxp_client(); mxc_register_device(&max17135_sensor_device, NULL); imx6dl_add_imx_epdc(&epdc_data); - +#if defined(CONFIG_FB_MXC_SIPIX_PANEL) + setup_spdc(); +#endif + imx6sl_add_imx_spdc(&spdc_data); imx6q_add_dvfs_core(&mx6sl_arm2_dvfscore_data); imx6q_init_audio(); -- cgit v1.2.3 From 228bfc462c9dfd65951b5fbe2a8b914a042b08a5 Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Tue, 22 May 2012 16:55:18 +0800 Subject: ENGR00210360 - EPDC: Fix regulator-related EPDC failure on MX6SL ARM2 CPU board Its similar to ENGR00178581. Remove call to regulator_has_full_constraints() from Max17135 EPD PMIC initialization code, since leaving it enabled results in a failure of system to load properly - key regulators are disabled when 'epdc' is added to the kernel command line. Signed-off-by: Robby Cai --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 57d26f1ee6a9..6ec477521b9e 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -315,7 +315,12 @@ static int __init max17135_regulator_init(struct max17135 *max17135) } } - regulator_has_full_constraints(); + /* + * TODO: We cannot enable full constraints for now, since + * it results in the PFUZE regulators being disabled + * at the end of boot, which disables critical regulators. + */ + /*regulator_has_full_constraints();*/ return 0; } -- cgit v1.2.3 From ecc78b67beaf4d52d53af6687d0d77b1482f68f0 Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Wed, 23 May 2012 16:58:27 +0800 Subject: ENGR00210550: imx6sl: add viim support registered viim platform divice. Signed-off-by: Robby Cai --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 6ec477521b9e..d64684244581 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -1031,6 +1031,7 @@ static void __init mx6_arm2_init(void) imx6q_init_audio(); + imx6q_add_viim(); } extern void __iomem *twd_base; -- cgit v1.2.3 From f20915b89f71bbd5e91f210d81c8cdab750f4d17 Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Thu, 24 May 2012 17:19:04 +0800 Subject: ENGR00210661: imx6sl: add watchdog support Register watchdog platform device and re-use watchdog driver. Signed-off-by: Robby Cai --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index d64684244581..b57de6a21ee4 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -1032,6 +1032,7 @@ static void __init mx6_arm2_init(void) imx6q_init_audio(); imx6q_add_viim(); + imx6q_add_imx2_wdt(0, NULL); } extern void __iomem *twd_base; -- cgit v1.2.3 From 506835d9ffb7bd95290f95db8681888430a47839 Mon Sep 17 00:00:00 2001 From: Ryan QIAN Date: Mon, 28 May 2012 14:58:00 +0800 Subject: ENGR00211165 [mx6sl]: warnning of 'no vmmc regulator' on sys boots 1. no vmmc regulator device was registered. 2. move initialization of usdhc into mx6_arm2_init. Signed-off-by: Ryan QIAN --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 35 +++++++++++++++++++++++++++++++---- 1 file changed, 31 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index b57de6a21ee4..7429e97c1899 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -156,6 +156,32 @@ static const struct esdhc_platform_data mx6_arm2_sd3_data __initconst = { #define V_to_uV(V) (mV_to_uV(V * 1000)) #define uV_to_V(uV) (uV_to_mV(uV) / 1000) +static struct regulator_consumer_supply arm2_vmmc_consumers[] = { + REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.0"), + REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.1"), + REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.2"), +}; + +static struct regulator_init_data arm2_vmmc_init = { + .num_consumer_supplies = ARRAY_SIZE(arm2_vmmc_consumers), + .consumer_supplies = arm2_vmmc_consumers, +}; + +static struct fixed_voltage_config arm2_vmmc_reg_config = { + .supply_name = "vmmc", + .microvolts = 3300000, + .gpio = -1, + .init_data = &arm2_vmmc_init, +}; + +static struct platform_device arm2_vmmc_reg_devices = { + .name = "reg-fixed-voltage", + .id = 0, + .dev = { + .platform_data = &arm2_vmmc_reg_config, + }, +}; + static struct regulator_consumer_supply display_consumers[] = { { /* MAX17135 */ @@ -497,10 +523,6 @@ void __init early_console_setup(unsigned long base, struct clk *clk); static inline void mx6_arm2_init_uart(void) { imx6q_add_imx_uart(0, NULL); /* DEBUG UART1 */ - - imx6q_add_sdhci_usdhc_imx(0, &mx6_arm2_sd1_data); - imx6q_add_sdhci_usdhc_imx(1, &mx6_arm2_sd2_data); - imx6q_add_sdhci_usdhc_imx(2, &mx6_arm2_sd3_data); } static struct fec_platform_data fec_data __initdata = { @@ -1009,6 +1031,11 @@ static void __init mx6_arm2_init(void) imx6_init_fec(fec_data); + platform_device_register(&arm2_vmmc_reg_devices); + imx6q_add_sdhci_usdhc_imx(0, &mx6_arm2_sd1_data); + imx6q_add_sdhci_usdhc_imx(1, &mx6_arm2_sd2_data); + imx6q_add_sdhci_usdhc_imx(2, &mx6_arm2_sd3_data); + mx6_arm2_init_usb(); imx6q_add_mxc_pwm(0); -- cgit v1.2.3 From 723cf73455411dae1ec62cd49ee0737ee8a5d44e Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Fri, 8 Jun 2012 14:20:36 +0800 Subject: ENGR00212805 [MX6SL]Add thermal driver device. Add thermal driver device to support thermal driver interface, but as this driver is dependent on OCOTP driver and need a calibrated part, so the temp read from the thermal sysfs interface maybe inaccurate on those uncalibrated parts. Signed-off-by: Anson Huang --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 7429e97c1899..6d5cdc1f5472 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -267,6 +267,11 @@ static struct regulator_init_data max17135_init_data[] = { }, }; +static const struct anatop_thermal_platform_data + mx6sl_anatop_thermal_data __initconst = { + .name = "anatop_thermal", + }; + static struct platform_device max17135_sensor_device = { .name = "max17135_sensor", .id = 0, @@ -1016,6 +1021,8 @@ static void __init mx6_arm2_init(void) ARRAY_SIZE(mxc_i2c2_board_info)); mx6sl_arm2_init_pfuze100(0); + imx6q_add_anatop_thermal_imx(1, &mx6sl_anatop_thermal_data); + mx6_arm2_init_uart(); /* get enet tx reference clk from FEC_REF_CLK pad. * GPR1[14] = 0, GPR1[18:17] = 00 @@ -1037,7 +1044,7 @@ static void __init mx6_arm2_init(void) imx6q_add_sdhci_usdhc_imx(2, &mx6_arm2_sd3_data); mx6_arm2_init_usb(); - + imx6q_add_otp(); imx6q_add_mxc_pwm(0); imx6q_add_mxc_pwm_backlight(0, &mx6_arm2_pwm_backlight_data); imx6dl_add_imx_elcdif(&fb_data[0]); -- cgit v1.2.3 From 1d8ad58fe1f404ef4883eedcc2ef18ea4b334e51 Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Fri, 8 Jun 2012 14:48:15 +0800 Subject: ENGR00212818: mx6sl: Add SPI NOR flash support only set board-specific data and re-use the existing SPI-NOR flash driver. Signed-off-by: Robby Cai --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 45 ++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 6d5cdc1f5472..3d1bba15c626 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -365,6 +365,46 @@ static const struct spi_imx_master mx6_arm2_spi_data __initconst = { .num_chipselect = ARRAY_SIZE(mx6_arm2_spi_cs), }; +#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) +static struct mtd_partition m25p32_partitions[] = { + { + .name = "bootloader", + .offset = 0, + .size = 0x00040000, + }, { + .name = "kernel", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct flash_platform_data m25p32_spi_flash_data = { + .name = "m25p32", + .parts = m25p32_partitions, + .nr_parts = ARRAY_SIZE(m25p32_partitions), + .type = "m25p32", +}; + +static struct spi_board_info m25p32_spi0_board_info[] __initdata = { + { + /* The modalias must be the same as spi device driver name */ + .modalias = "m25p80", + .max_speed_hz = 20000000, + .bus_num = 0, + .chip_select = 0, + .platform_data = &m25p32_spi_flash_data, + }, +}; +#endif + +static void spi_device_init(void) +{ +#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) + spi_register_board_info(m25p32_spi0_board_info, + ARRAY_SIZE(m25p32_spi0_board_info)); +#endif +} + static struct imx_ssi_platform_data mx6_sabresd_ssi_pdata = { .flags = IMX_SSI_DMA | IMX_SSI_SYN, }; @@ -1019,6 +1059,11 @@ static void __init mx6_arm2_init(void) imx6q_add_imx_i2c(2, &mx6_arm2_i2c2_data); i2c_register_board_info(2, mxc_i2c2_board_info, ARRAY_SIZE(mxc_i2c2_board_info)); + + /* SPI */ + imx6q_add_ecspi(0, &mx6_arm2_spi_data); + spi_device_init(); + mx6sl_arm2_init_pfuze100(0); imx6q_add_anatop_thermal_imx(1, &mx6sl_anatop_thermal_data); -- cgit v1.2.3 From b829a6c66e6bab87ef456ffcac3ffc3df82e4533 Mon Sep 17 00:00:00 2001 From: Larry Li Date: Tue, 12 Jun 2012 17:08:17 +0800 Subject: ENGR00213170-1 [MX6SL] Add resource needed by GPU Prepare resourec such as memory, interrupt, clock, regester address needed by GPU. Signed-off-by: Larry Li --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 3d1bba15c626..2d42966dbfb1 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -563,6 +563,10 @@ static struct mxc_dvfs_platform_data mx6sl_arm2_dvfscore_data = { .delay_time = 80, }; +static struct viv_gpu_platform_data imx6q_gpu_pdata __initdata = { + .reserved_mem_size = SZ_128M, +}; + void __init early_console_setup(unsigned long base, struct clk *clk); static inline void mx6_arm2_init_uart(void) @@ -1112,6 +1116,8 @@ static void __init mx6_arm2_init(void) imx6q_add_viim(); imx6q_add_imx2_wdt(0, NULL); + + imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata); } extern void __iomem *twd_base; @@ -1134,7 +1140,17 @@ static struct sys_timer mxc_timer = { static void __init mx6_arm2_reserve(void) { - +#if defined(CONFIG_MXC_GPU_VIV) || defined(CONFIG_MXC_GPU_VIV_MODULE) + phys_addr_t phys; + + if (imx6q_gpu_pdata.reserved_mem_size) { + phys = memblock_alloc_base(imx6q_gpu_pdata.reserved_mem_size, + SZ_4K, MEMBLOCK_ALLOC_ACCESSIBLE); + memblock_free(phys, imx6q_gpu_pdata.reserved_mem_size); + memblock_remove(phys, imx6q_gpu_pdata.reserved_mem_size); + imx6q_gpu_pdata.reserved_mem_base = phys; + } +#endif } MACHINE_START(MX6SL_ARM2, "Freescale i.MX 6SoloLite Armadillo2 Board") -- cgit v1.2.3 From 662c78262b105e0a98fa85e519342963b31c1c9c Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Tue, 12 Jun 2012 18:24:54 +0800 Subject: ENGR00213749: imx6sl: Add keypad support on EINK-DC3 board Add the support for keypad on EINK-DC3 board which is stacked on ARM2 board. - configure the iomux setting - add dummy kpp clock to fool imx_keypad driver - add platform device for keypad - add key mapping (4x4 array) used on EINK-DC3 - update the defconfig for keypad driver Signed-off-by: Robby Cai --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 2d42966dbfb1..b17a0fff464a 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -1042,6 +1042,33 @@ static struct mxc_fb_platform_data fb_data[] = { static struct platform_device lcd_wvga_device = { .name = "lcd_seiko", }; + +static int mx6sl_arm2_keymap[] = { + KEY(0, 0, KEY_SELECT), + KEY(0, 1, KEY_BACK), + KEY(0, 2, KEY_F1), + KEY(0, 3, KEY_F2), + + KEY(1, 0, KEY_F3), + KEY(1, 1, KEY_F4), + KEY(1, 2, KEY_F5), + KEY(1, 3, KEY_MENU), + + KEY(2, 0, KEY_PREVIOUS), + KEY(2, 1, KEY_NEXT), + KEY(2, 2, KEY_HOME), + KEY(2, 3, KEY_NEXT), + + KEY(3, 0, KEY_UP), + KEY(3, 1, KEY_LEFT), + KEY(3, 2, KEY_RIGHT), + KEY(3, 3, KEY_DOWN), +}; + +static const struct matrix_keymap_data mx6sl_arm2_map_data __initconst = { + .keymap = mx6sl_arm2_keymap, + .keymap_size = ARRAY_SIZE(mx6sl_arm2_keymap), +}; /*! * Board specific initialization. */ @@ -1118,6 +1145,7 @@ static void __init mx6_arm2_init(void) imx6q_add_imx2_wdt(0, NULL); imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata); + imx6sl_add_imx_keypad(&mx6sl_arm2_map_data); } extern void __iomem *twd_base; -- cgit v1.2.3 From e6ed01871c19bc3db1bced9c0951cdf0ded40cd6 Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Mon, 18 Jun 2012 13:14:08 +0800 Subject: ENGR00213751: imx6sl: Add ELAN touchscreen support on EINK-DC3 board Add ELAN capacitive TS support on EINK-DC3 stacked on MX6SL_ARM2 board - configure the iomux setting (need 4.7K Ohm pull up on 'touch_int_b') - configure the i2c slave addr - configure the GPIO setting for ELAN ce/int/rst - update the defconfig Signed-off-by: Robby Cai --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index b17a0fff464a..8b9799d638a4 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -125,6 +125,9 @@ #define MX6SL_ARM2_EPDC_PMIC_WAKE IMX_GPIO_NR(2, 14) /* EPDC_PWRWAKEUP */ #define MX6SL_ARM2_EPDC_PMIC_INT IMX_GPIO_NR(2, 12) /* EPDC_PWRINT */ #define MX6SL_ARM2_EPDC_VCOM IMX_GPIO_NR(2, 3) +#define MX6SL_ARM2_ELAN_CE IMX_GPIO_NR(2, 9) +#define MX6SL_ARM2_ELAN_INT IMX_GPIO_NR(2, 10) +#define MX6SL_ARM2_ELAN_RST IMX_GPIO_NR(4, 4) static int max17135_regulator_init(struct max17135 *max17135); struct clk *extern_audio_root; @@ -525,6 +528,9 @@ static struct i2c_board_info mxc_i2c0_board_info[] __initdata = { { I2C_BOARD_INFO("max17135", 0x48), .platform_data = &max17135_pdata, + }, { + I2C_BOARD_INFO("elan-touch", 0x10), + .irq = gpio_to_irq(MX6SL_ARM2_ELAN_INT), }, }; @@ -1069,6 +1075,27 @@ static const struct matrix_keymap_data mx6sl_arm2_map_data __initconst = { .keymap = mx6sl_arm2_keymap, .keymap_size = ARRAY_SIZE(mx6sl_arm2_keymap), }; +static void __init elan_ts_init(void) +{ + mxc_iomux_v3_setup_multiple_pads(mx6sl_arm2_elan_pads, + ARRAY_SIZE(mx6sl_arm2_elan_pads)); + + /* ELAN Touchscreen */ + gpio_request(MX6SL_ARM2_ELAN_INT, "elan-interrupt"); + gpio_direction_input(MX6SL_ARM2_ELAN_INT); + + gpio_request(MX6SL_ARM2_ELAN_CE, "elan-cs"); + gpio_direction_output(MX6SL_ARM2_ELAN_CE, 1); + gpio_direction_output(MX6SL_ARM2_ELAN_CE, 0); + + gpio_request(MX6SL_ARM2_ELAN_RST, "elan-rst"); + gpio_direction_output(MX6SL_ARM2_ELAN_RST, 1); + gpio_direction_output(MX6SL_ARM2_ELAN_RST, 0); + mdelay(1); + gpio_direction_output(MX6SL_ARM2_ELAN_RST, 1); + gpio_direction_output(MX6SL_ARM2_ELAN_CE, 1); +} + /*! * Board specific initialization. */ @@ -1076,6 +1103,8 @@ static void __init mx6_arm2_init(void) { mxc_iomux_v3_setup_multiple_pads(mx6sl_arm2_pads, ARRAY_SIZE(mx6sl_arm2_pads)); + elan_ts_init(); + gp_reg_id = "cpu_vddgp"; mx6_cpu_regulator_init(); -- cgit v1.2.3 From af046c7b9df81b8451675c4ae21a2da832b2720b Mon Sep 17 00:00:00 2001 From: Nancy Chen Date: Tue, 19 Jun 2012 17:21:43 -0500 Subject: ENGR00212633 [MX6SL]: Add support for SoC power optimization in Idle mode Add support for SoC power optimization in Idle mode (1st phase): 1. ARM @ 198MHz. VDDARM_CAP @ 0.85V 2. AHB @ 24MHz, DDR @ 25MHz 3. PU regulator disabled when system is in IDLE. Signed-off-by: Nancy Chen Signed-off-by: Ranjani Vaidyanathan --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 8b9799d638a4..69fb1ad4c08f 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -1175,6 +1175,7 @@ static void __init mx6_arm2_init(void) imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata); imx6sl_add_imx_keypad(&mx6sl_arm2_map_data); + imx6q_add_busfreq(); } extern void __iomem *twd_base; -- cgit v1.2.3 From d95ecbd625a9b9d1cd98e49a6d065eba26e99692 Mon Sep 17 00:00:00 2001 From: Ryan QIAN Date: Thu, 21 Jun 2012 14:40:40 +0800 Subject: ENGR00213944-02: mmc: sdhci: [MX6] support SD v3.0 memory cards. - Add variable pad speed setting per SD clk freq. - Add SD3.0 support on SD1, SD2, and SD3. - Enhance drive strength on SD pad to improve its compatibility. - change the definition of pad speed changing interface - combine pad speed setting for different SD host controllers into one function. Signed-off-by: Ryan QIAN Acked-by: Lily Zhang --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 84 ++++++++++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 69fb1ad4c08f..dc0059f53922 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -133,12 +133,91 @@ static int max17135_regulator_init(struct max17135 *max17135); struct clk *extern_audio_root; extern int __init mx6sl_arm2_init_pfuze100(u32 int_gpio); + +enum sd_pad_mode { + SD_PAD_MODE_LOW_SPEED, + SD_PAD_MODE_MED_SPEED, + SD_PAD_MODE_HIGH_SPEED, +}; + +static int plt_sd_pad_change(unsigned int index, int clock) +{ + /* LOW speed is the default state of SD pads */ + static enum sd_pad_mode pad_mode = SD_PAD_MODE_LOW_SPEED; + + iomux_v3_cfg_t *sd_pads_200mhz; + iomux_v3_cfg_t *sd_pads_100mhz; + iomux_v3_cfg_t *sd_pads_50mhz; + + u32 sd_pads_200mhz_cnt; + u32 sd_pads_100mhz_cnt; + u32 sd_pads_50mhz_cnt; + + switch (index) { + case 0: + sd_pads_200mhz = mx6sl_sd1_200mhz; + sd_pads_100mhz = mx6sl_sd1_100mhz; + sd_pads_50mhz = mx6sl_sd1_50mhz; + + sd_pads_200mhz_cnt = ARRAY_SIZE(mx6sl_sd1_200mhz); + sd_pads_100mhz_cnt = ARRAY_SIZE(mx6sl_sd1_100mhz); + sd_pads_50mhz_cnt = ARRAY_SIZE(mx6sl_sd1_50mhz); + break; + case 1: + sd_pads_200mhz = mx6sl_sd2_200mhz; + sd_pads_100mhz = mx6sl_sd2_100mhz; + sd_pads_50mhz = mx6sl_sd2_50mhz; + + sd_pads_200mhz_cnt = ARRAY_SIZE(mx6sl_sd2_200mhz); + sd_pads_100mhz_cnt = ARRAY_SIZE(mx6sl_sd2_100mhz); + sd_pads_50mhz_cnt = ARRAY_SIZE(mx6sl_sd2_50mhz); + break; + case 2: + sd_pads_200mhz = mx6sl_sd3_200mhz; + sd_pads_100mhz = mx6sl_sd3_100mhz; + sd_pads_50mhz = mx6sl_sd3_50mhz; + + sd_pads_200mhz_cnt = ARRAY_SIZE(mx6sl_sd3_200mhz); + sd_pads_100mhz_cnt = ARRAY_SIZE(mx6sl_sd3_100mhz); + sd_pads_50mhz_cnt = ARRAY_SIZE(mx6sl_sd3_50mhz); + break; + default: + printk(KERN_ERR "no such SD host controller index %d\n", index); + return -EINVAL; + } + + if (clock > 100000000) { + if (pad_mode == SD_PAD_MODE_HIGH_SPEED) + return 0; + BUG_ON(!sd_pads_200mhz); + pad_mode = SD_PAD_MODE_HIGH_SPEED; + return mxc_iomux_v3_setup_multiple_pads(sd_pads_200mhz, + sd_pads_200mhz_cnt); + } else if (clock > 52000000) { + if (pad_mode == SD_PAD_MODE_MED_SPEED) + return 0; + BUG_ON(!sd_pads_100mhz); + pad_mode = SD_PAD_MODE_MED_SPEED; + return mxc_iomux_v3_setup_multiple_pads(sd_pads_100mhz, + sd_pads_100mhz_cnt); + } else { + if (pad_mode == SD_PAD_MODE_LOW_SPEED) + return 0; + BUG_ON(!sd_pads_50mhz); + pad_mode = SD_PAD_MODE_LOW_SPEED; + return mxc_iomux_v3_setup_multiple_pads(sd_pads_50mhz, + sd_pads_50mhz_cnt); + } +} + static const struct esdhc_platform_data mx6_arm2_sd1_data __initconst = { .cd_gpio = MX6_ARM2_SD1_CD, .wp_gpio = MX6_ARM2_SD1_WP, .support_8bit = 1, + .support_18v = 1, .keep_power_at_suspend = 1, .delay_line = 0, + .platform_pad_change = plt_sd_pad_change, }; static const struct esdhc_platform_data mx6_arm2_sd2_data __initconst = { @@ -146,12 +225,17 @@ static const struct esdhc_platform_data mx6_arm2_sd2_data __initconst = { .wp_gpio = MX6_ARM2_SD2_WP, .keep_power_at_suspend = 1, .delay_line = 0, + .support_18v = 1, + .platform_pad_change = plt_sd_pad_change, }; static const struct esdhc_platform_data mx6_arm2_sd3_data __initconst = { .cd_gpio = MX6_ARM2_SD3_CD, + .wp_gpio = -1, .keep_power_at_suspend = 1, .delay_line = 0, + .support_18v = 1, + .platform_pad_change = plt_sd_pad_change, }; #define mV_to_uV(mV) (mV * 1000) -- cgit v1.2.3 From e3a2e5049ab2880d9bbd8f017db72e695e4fe3d1 Mon Sep 17 00:00:00 2001 From: Fugang Duan Date: Thu, 21 Jun 2012 16:28:57 +0800 Subject: ENGR00210654 - MSL : fix NFS boot fails issue in sometime - MX6 sololite cpu board NFS boot fails in sometimes, because MAC cannot get any packets while sending DHCP to require IP. The reproduce rate is 10%. - Lan8720 phy enter a unexpected status, and need software reset phy before transmition. - Do some below overnight tests after add the changes, no NFS boot issue found. 1. Kernel boot from MMC, rootfs mount from NFS. 2. Kernel boot from tftp, rootfs mount form NFS. Signed-off-by: Fugang Duan --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 33 +++++++++++++++++++++++++++------ 1 file changed, 27 insertions(+), 6 deletions(-) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index dc0059f53922..78952d83e778 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -664,7 +664,34 @@ static inline void mx6_arm2_init_uart(void) imx6q_add_imx_uart(0, NULL); /* DEBUG UART1 */ } +static int mx6sl_arm2_fec_phy_init(struct phy_device *phydev) +{ + int val; + + /* power on FEC phy and reset phy */ + gpio_request(MX6_ARM2_FEC_PWR_EN, "fec-pwr"); + gpio_direction_output(MX6_ARM2_FEC_PWR_EN, 1); + /* wait RC ms for hw reset */ + udelay(50); + + /* check phy power */ + val = phy_read(phydev, 0x0); + if (val & BMCR_PDOWN) { + phy_write(phydev, 0x0, (val & ~BMCR_PDOWN)); + udelay(50); + } + + /* sw reset phy */ + val = phy_read(phydev, 0x0); + val |= BMCR_RESET; + phy_write(phydev, 0x0, val); + udelay(50); + + return 0; +} + static struct fec_platform_data fec_data __initdata = { + .init = mx6sl_arm2_fec_phy_init, .phy = PHY_INTERFACE_MODE_RMII, }; @@ -1219,12 +1246,6 @@ static void __init mx6_arm2_init(void) mxc_iomux_set_gpr_register(1, 14, 1, 0); mxc_iomux_set_gpr_register(1, 17, 2, 0); - /* power on FEC phy and reset phy */ - gpio_request(MX6_ARM2_FEC_PWR_EN, "fec-pwr"); - gpio_direction_output(MX6_ARM2_FEC_PWR_EN, 1); - /* wait RC ms for hw reset */ - udelay(500); - imx6_init_fec(fec_data); platform_device_register(&arm2_vmmc_reg_devices); -- cgit v1.2.3 From faa60f831ea1ba4093f775734abf4d1aeff1612c Mon Sep 17 00:00:00 2001 From: Robin Gong Date: Thu, 28 Jun 2012 14:33:17 +0800 Subject: ENGR00215188-3 mx6sl:enable LDO bypass function on mx6sl_arm2 enable LDO bypass function on mx6sl_arm2 board as mx6q_sabresd board Signed-off-by: Robin Gong --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 78952d83e778..4592fd607412 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -1216,8 +1216,12 @@ static void __init mx6_arm2_init(void) elan_ts_init(); + #ifdef CONFIG_MX6_INTER_LDO_BYPASS + gp_reg_id = "VDDCORE"; + #else gp_reg_id = "cpu_vddgp"; mx6_cpu_regulator_init(); + #endif imx6q_add_imx_snvs_rtc(); -- cgit v1.2.3 From a26a60fc576b12caf8da0eede2f655ae9c5b20c8 Mon Sep 17 00:00:00 2001 From: Zhang Jiejing Date: Mon, 16 Jul 2012 13:51:30 +0800 Subject: ENGR00216013-2 mx6: not call memblock_free after reserve memory. Remove call memblock_free after reserve memory with memblock_allocate(). The function of memblock_free is to remove the memory block from reserve list of memblock, it will totally lost the info about how much phy memory we have. Skipping call this can make the reserved memory be accountable in memblock With no side-effect. After doing this, we can know how much our phy memory is, then can add check in our driver like(vpu) to check the phy memory valid or not before vpu start use the address. Signed-off-by: Zhang Jiejing --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 4592fd607412..725852678acf 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -1313,7 +1313,6 @@ static void __init mx6_arm2_reserve(void) if (imx6q_gpu_pdata.reserved_mem_size) { phys = memblock_alloc_base(imx6q_gpu_pdata.reserved_mem_size, SZ_4K, MEMBLOCK_ALLOC_ACCESSIBLE); - memblock_free(phys, imx6q_gpu_pdata.reserved_mem_size); memblock_remove(phys, imx6q_gpu_pdata.reserved_mem_size); imx6q_gpu_pdata.reserved_mem_base = phys; } -- cgit v1.2.3 From ad537f734b64e47fb890a87db54108f2b35a9815 Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Tue, 17 Jul 2012 14:14:35 +0800 Subject: ENGR00217388: imx6sl_arm2: Add software poweroff support via SNVS Add s/w poweroff support via SNVS setting. Use `poweroff' command to power down ARM2 board. Signed-off-by: Robby Cai --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 725852678acf..1053b15ebf93 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -1207,6 +1207,17 @@ static void __init elan_ts_init(void) gpio_direction_output(MX6SL_ARM2_ELAN_CE, 1); } +#define SNVS_LPCR 0x38 +static void mx6_snvs_poweroff(void) +{ + u32 value; + void __iomem *mx6_snvs_base = MX6_IO_ADDRESS(MX6Q_SNVS_BASE_ADDR); + + value = readl(mx6_snvs_base + SNVS_LPCR); + /* set TOP and DP_EN bit */ + writel(value | 0x60, mx6_snvs_base + SNVS_LPCR); +} + /*! * Board specific initialization. */ @@ -1285,6 +1296,8 @@ static void __init mx6_arm2_init(void) imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata); imx6sl_add_imx_keypad(&mx6sl_arm2_map_data); imx6q_add_busfreq(); + + pm_power_off = mx6_snvs_poweroff; } extern void __iomem *twd_base; -- cgit v1.2.3 From c29f7b2ee903b648750a567313d362637c64a903 Mon Sep 17 00:00:00 2001 From: Terry Lv Date: Mon, 16 Jul 2012 15:58:06 +0800 Subject: ENGR00217306-2: Add DCP/RNGB arch support This patch will add arch support of DCP/RNGB. Signed-off-by: Terry Lv --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 1053b15ebf93..3608e5151338 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -1288,7 +1288,7 @@ static void __init mx6_arm2_init(void) imx6sl_add_imx_spdc(&spdc_data); imx6q_add_dvfs_core(&mx6sl_arm2_dvfscore_data); - imx6q_init_audio(); + imx6q_init_audio(); imx6q_add_viim(); imx6q_add_imx2_wdt(0, NULL); @@ -1296,6 +1296,8 @@ static void __init mx6_arm2_init(void) imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata); imx6sl_add_imx_keypad(&mx6sl_arm2_map_data); imx6q_add_busfreq(); + imx6sl_add_dcp(); + imx6sl_add_rngb(); pm_power_off = mx6_snvs_poweroff; } -- cgit v1.2.3 From bc16e1ce1e7106403e524da6717aea1ce63817fd Mon Sep 17 00:00:00 2001 From: Fugang Duan Date: Thu, 28 Jun 2012 15:29:43 +0800 Subject: ENGR00215202 - MSL : Ethernet phy LAN8720 cable link issue - Phy LAN8720 link status is un-stable when disable clock from clock enabled status. The phy register_1[link status] bit is pulsatile, so driver will print: PHY: 1:00 - Link is Up - 100/Full PHY: 1:00 - Link is Down PHY: 1:00 - Link is Up - 100/Full PHY: 1:00 - Link is Down ... - Because phy clock source is from FEC internel clock, if disbale clock from enabled status, some LAN8720 phys status machine is in disorder and cannot display link status correctly. So, it need to do phy hw reset before clock enable. Signed-off-by: Fugang Duan --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 3608e5151338..00c0fe1a7fb3 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -670,23 +670,17 @@ static int mx6sl_arm2_fec_phy_init(struct phy_device *phydev) /* power on FEC phy and reset phy */ gpio_request(MX6_ARM2_FEC_PWR_EN, "fec-pwr"); - gpio_direction_output(MX6_ARM2_FEC_PWR_EN, 1); + gpio_direction_output(MX6_ARM2_FEC_PWR_EN, 0); /* wait RC ms for hw reset */ - udelay(50); + msleep(1); + gpio_direction_output(MX6_ARM2_FEC_PWR_EN, 1); /* check phy power */ val = phy_read(phydev, 0x0); if (val & BMCR_PDOWN) { phy_write(phydev, 0x0, (val & ~BMCR_PDOWN)); - udelay(50); } - /* sw reset phy */ - val = phy_read(phydev, 0x0); - val |= BMCR_RESET; - phy_write(phydev, 0x0, val); - udelay(50); - return 0; } -- cgit v1.2.3 From 0e3cff3a952a588495c996cb0387c5622c3ee85e Mon Sep 17 00:00:00 2001 From: Fugang Duan Date: Thu, 19 Jul 2012 16:02:18 +0800 Subject: ENGR00217621-01 - MSL : Add early param to select SPDC - Add "spdc" in uboot command line to select SPDC module for AUO panel display. By default, EPDC is enabled and SPDC is disabled, which are mutually exclusive because they share the same data line. Signed-off-by: Fugang Duan --- arch/arm/mach-mx6/board-mx6sl_arm2.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c') diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 00c0fe1a7fb3..77e4bc465f50 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -129,6 +129,7 @@ #define MX6SL_ARM2_ELAN_INT IMX_GPIO_NR(2, 10) #define MX6SL_ARM2_ELAN_RST IMX_GPIO_NR(4, 4) +static int spdc_sel; static int max17135_regulator_init(struct max17135 *max17135); struct clk *extern_audio_root; @@ -1078,13 +1079,19 @@ static struct imx_spdc_fb_platform_data spdc_data = { .disable_pins = spdc_disable_pins, }; -#if defined(CONFIG_FB_MXC_SIPIX_PANEL) +static int __init early_use_spdc_sel(char *p) +{ + spdc_sel = 1; + return 0; +} +early_param("spdc", early_use_spdc_sel); + static void setup_spdc(void) { /* GPR0[8]: 0:EPDC, 1:SPDC */ - mxc_iomux_set_gpr_register(0, 8, 1, 1); + if (spdc_sel) + mxc_iomux_set_gpr_register(0, 8, 1, 1); } -#endif static void imx6_arm2_usbotg_vbus(bool on) { @@ -1275,11 +1282,11 @@ static void __init mx6_arm2_init(void) imx6dl_add_imx_pxp(); imx6dl_add_imx_pxp_client(); mxc_register_device(&max17135_sensor_device, NULL); - imx6dl_add_imx_epdc(&epdc_data); -#if defined(CONFIG_FB_MXC_SIPIX_PANEL) setup_spdc(); -#endif - imx6sl_add_imx_spdc(&spdc_data); + if (!spdc_sel) + imx6dl_add_imx_epdc(&epdc_data); + else + imx6sl_add_imx_spdc(&spdc_data); imx6q_add_dvfs_core(&mx6sl_arm2_dvfscore_data); imx6q_init_audio(); -- cgit v1.2.3