From 3b2bdd583750496f282d5e452da12f32e9008472 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 11 Jan 2013 23:35:52 +0100 Subject: colibri_t20: fix GMI_WR_N on SODIMM pin 93 RDnWR Looks like we mixed up the low-active buffer enable GPIOs. This fixes GMI_WR_N on SODIMM pin 93 RDnWR curtsey Tord Andersson from Endian Technologies AB. --- arch/arm/mach-tegra/board-colibri_t20-pinmux.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-tegra/board-colibri_t20-pinmux.c') diff --git a/arch/arm/mach-tegra/board-colibri_t20-pinmux.c b/arch/arm/mach-tegra/board-colibri_t20-pinmux.c index 471c2150f9c9..1383f7d55459 100644 --- a/arch/arm/mach-tegra/board-colibri_t20-pinmux.c +++ b/arch/arm/mach-tegra/board-colibri_t20-pinmux.c @@ -370,12 +370,12 @@ int __init colibri_t20_pinmux_init(void) gpio_direction_output(TEGRA_GPIO_PI4, 1); /* tri-stating GMI_WR_N on SODIMM pin 99 nPWE */ - gpio_request(TEGRA_GPIO_PT6, "no GMI_WR_N on 99"); - gpio_direction_output(TEGRA_GPIO_PT6, 1); + gpio_request(TEGRA_GPIO_PT5, "no GMI_WR_N on 99"); + gpio_direction_output(TEGRA_GPIO_PT5, 1); /* not tri-stating GMI_WR_N on SODIMM pin 93 RDnWR */ - gpio_request(TEGRA_GPIO_PT5, "GMI_WR_N on 93 RDnWR"); - gpio_direction_output(TEGRA_GPIO_PT5, 0); + gpio_request(TEGRA_GPIO_PT6, "GMI_WR_N on 93 RDnWR"); + gpio_direction_output(TEGRA_GPIO_PT6, 0); return 0; } -- cgit v1.2.3