From f8118de93735b6b957437c548e2f025b25237ffc Mon Sep 17 00:00:00 2001 From: Scott Williams Date: Mon, 2 Aug 2010 12:52:22 -0700 Subject: [arm/tegra] Don't try to enable CoreSight on non-running CPUs On exit from LP2, __enable_coresite_access was called to reset the CoreSight interface and re-enable access on all CPUs. However, only CPU0 would actually be running at the time (the other CPU would still be held in reset). The attempt to unlock CoreSight on the non-running CPU would cause a stall on the APB bus while the CoreSight access timed out. The APB stall would cause SLINK DMA receiver overruns. Rather than attempting to unlock CoreSight access up front for every CPU, each CPU is now responsible for unlocking it's own access when it starts up. Bug 703311 Change-Id: Ie4611423ed72eb1cd0dbc8b7851f7a047bcffa14 Reviewed-on: http://git-master/r/4683 Reviewed-by: Gary King Reviewed-by: Scott Williams Tested-by: Scott Williams Reviewed-by: Michael Hsu Tested-by: Michael Hsu --- arch/arm/mach-tegra/headsmp-t2.S | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-tegra/headsmp-t2.S') diff --git a/arch/arm/mach-tegra/headsmp-t2.S b/arch/arm/mach-tegra/headsmp-t2.S index 35d7bf6bf15e..a5a4fb892a1d 100644 --- a/arch/arm/mach-tegra/headsmp-t2.S +++ b/arch/arm/mach-tegra/headsmp-t2.S @@ -136,6 +136,7 @@ ENDPROC(__restart_pllx) ENTRY(tegra_hotplug_startup) setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 bl __invalidate_cpu_state + enable_coresite r1 /* most of the below is a retread of what happens in __v7_setup and * secondary_startup, to get the MMU re-enabled and to branch -- cgit v1.2.3