From 27a435eb62ef122692e904cbd2959ac191bc43cc Mon Sep 17 00:00:00 2001 From: Scott Williams Date: Tue, 5 Jul 2011 18:05:26 -0700 Subject: ARM: tegra: Redesign Tegra CPU reset handling - Add a single unified handler for all CPU resets that is copied to IRAM. - Add state information to direct the flow of execution through the reset handler based on the reason a CPU was reset. - Write the EVP CPU reset vector only once per cold/warm boot session. - Prevent modification of the EVP CPU reset vector in Tegra3. Bug 786290 Bug 790458 Change-Id: Ica6707f3514986ee914e73a2d9766a4e06ce2d29 Signed-off-by: Scott Williams DW: Split into logical changes Signed-off-by: Dan Willemsen Rebase-Id: R7b9859a83717e76c3c083bdde724bd5fef9ce089 --- arch/arm/mach-tegra/sleep.h | 9 --------- 1 file changed, 9 deletions(-) (limited to 'arch/arm/mach-tegra/sleep.h') diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index c6700af4b45e..61ea3dfaffec 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h @@ -90,7 +90,6 @@ void tegra_cpu_wfi(void); #ifdef CONFIG_ARCH_TEGRA_2x_SOC extern void tegra2_iram_start; extern void tegra2_iram_end; -extern void tegra2_lp1_reset; int tegra2_cpu_is_resettable_soon(void); void tegra2_cpu_reset(int cpu); void tegra2_cpu_set_resettable_soon(void); @@ -113,13 +112,6 @@ static inline void *tegra_iram_end(void) #endif } -static inline void *tegra_lp1_reset(void) -{ -#ifdef CONFIG_ARCH_TEGRA_2x_SOC - return &tegra2_lp1_reset; -#endif -} - static inline void tegra_sleep_core(unsigned long v2p) { #ifdef CONFIG_ARCH_TEGRA_2x_SOC @@ -129,7 +121,6 @@ static inline void tegra_sleep_core(unsigned long v2p) void tegra_sleep_cpu(unsigned long v2p); void tegra_resume(void); -void tegra_secondary_resume(void); #endif -- cgit v1.2.3