From 5cccd37ea15970846a93b4b01fafd6e043bafe8e Mon Sep 17 00:00:00 2001 From: dmitry pervushin Date: Thu, 23 Apr 2009 12:24:13 +0100 Subject: [ARM] 5477/1: Freescale STMP platform support [6/10] Sources: common STMP3xxx platform support Signed-off-by: dmitry pervushin Signed-off-by: Russell King --- arch/arm/plat-stmp3xxx/irq.c | 59 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 arch/arm/plat-stmp3xxx/irq.c (limited to 'arch/arm/plat-stmp3xxx/irq.c') diff --git a/arch/arm/plat-stmp3xxx/irq.c b/arch/arm/plat-stmp3xxx/irq.c new file mode 100644 index 000000000000..cb3659096681 --- /dev/null +++ b/arch/arm/plat-stmp3xxx/irq.c @@ -0,0 +1,59 @@ +/* + * Freescale STMP37XX/STMP378X common interrupt handling code + * + * Author: Vladislav Buzov + * + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include + +#include +#include + +void __init stmp3xxx_init_irq(struct irq_chip *chip) +{ + unsigned int i; + + /* Reset the interrupt controller */ + HW_ICOLL_CTRL_CLR(BM_ICOLL_CTRL_CLKGATE); + udelay(10); + HW_ICOLL_CTRL_CLR(BM_ICOLL_CTRL_SFTRST); + udelay(10); + HW_ICOLL_CTRL_SET(BM_ICOLL_CTRL_SFTRST); + while (!(HW_ICOLL_CTRL_RD() & BM_ICOLL_CTRL_CLKGATE)) + continue; + HW_ICOLL_CTRL_CLR(BM_ICOLL_CTRL_SFTRST | BM_ICOLL_CTRL_CLKGATE); + + /* Disable all interrupts initially */ + for (i = 0; i < NR_REAL_IRQS; i++) { + chip->mask(i); + set_irq_chip(i, chip); + set_irq_handler(i, handle_level_irq); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } + + /* Ensure vector is cleared */ + HW_ICOLL_LEVELACK_WR(1); + HW_ICOLL_LEVELACK_WR(2); + HW_ICOLL_LEVELACK_WR(4); + HW_ICOLL_LEVELACK_WR(8); + + HW_ICOLL_VECTOR_WR(0); + /* Barrier */ + (void) HW_ICOLL_STAT_RD(); +} + -- cgit v1.2.3 From 98f420b23a62e0c9df78c5851860d47bf1bc87dd Mon Sep 17 00:00:00 2001 From: dmitry pervushin Date: Sun, 31 May 2009 13:32:11 +0100 Subject: [ARM] 5532/1: Freescale STMP: register definitions [3/3] Replace HW_zzz register access macros by regular __raw_readl/__raw_writel calls Signed-off-by: dmitry pervushin Signed-off-by: Russell King --- arch/arm/plat-stmp3xxx/irq.c | 22 +++++++--------------- 1 file changed, 7 insertions(+), 15 deletions(-) (limited to 'arch/arm/plat-stmp3xxx/irq.c') diff --git a/arch/arm/plat-stmp3xxx/irq.c b/arch/arm/plat-stmp3xxx/irq.c index cb3659096681..20de4e0401ef 100644 --- a/arch/arm/plat-stmp3xxx/irq.c +++ b/arch/arm/plat-stmp3xxx/irq.c @@ -22,21 +22,15 @@ #include #include +#include #include void __init stmp3xxx_init_irq(struct irq_chip *chip) { - unsigned int i; + unsigned int i, lv; /* Reset the interrupt controller */ - HW_ICOLL_CTRL_CLR(BM_ICOLL_CTRL_CLKGATE); - udelay(10); - HW_ICOLL_CTRL_CLR(BM_ICOLL_CTRL_SFTRST); - udelay(10); - HW_ICOLL_CTRL_SET(BM_ICOLL_CTRL_SFTRST); - while (!(HW_ICOLL_CTRL_RD() & BM_ICOLL_CTRL_CLKGATE)) - continue; - HW_ICOLL_CTRL_CLR(BM_ICOLL_CTRL_SFTRST | BM_ICOLL_CTRL_CLKGATE); + stmp3xxx_reset_block(REGS_ICOLL_BASE + HW_ICOLL_CTRL, true); /* Disable all interrupts initially */ for (i = 0; i < NR_REAL_IRQS; i++) { @@ -47,13 +41,11 @@ void __init stmp3xxx_init_irq(struct irq_chip *chip) } /* Ensure vector is cleared */ - HW_ICOLL_LEVELACK_WR(1); - HW_ICOLL_LEVELACK_WR(2); - HW_ICOLL_LEVELACK_WR(4); - HW_ICOLL_LEVELACK_WR(8); + for (lv = 0; lv < 4; lv++) + __raw_writel(1 << lv, REGS_ICOLL_BASE + HW_ICOLL_LEVELACK); + __raw_writel(0, REGS_ICOLL_BASE + HW_ICOLL_VECTOR); - HW_ICOLL_VECTOR_WR(0); /* Barrier */ - (void) HW_ICOLL_STAT_RD(); + (void)__raw_readl(REGS_ICOLL_BASE + HW_ICOLL_STAT); } -- cgit v1.2.3