From 1ca8bf6f7ba581d8b47144ff5a558e17fba3190d Mon Sep 17 00:00:00 2001 From: Stepan Moskovchenko Date: Mon, 10 Nov 2014 21:56:42 +0100 Subject: ARM: 8195/1: vfp: Bounce undefined instructions in vectored mode Certain ARM CPU implementations (e.g. Cortex-A15) may not raise a floating- point exception whenever deprecated short-vector VFP instructions are executed. Instead these instructions are treated as UNALLOCATED. Change the VFP exception handling code to emulate short-vector instructions even if FPEXC exception bits are not set. Signed-off-by: Stepan Moskovchenko Tested-by: Will Deacon Tested-by: Rob Clark Signed-off-by: Stephen Boyd Signed-off-by: Russell King --- arch/arm/vfp/vfphw.S | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/vfp/vfphw.S') diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index cda654cbf2c2..f74a8f7e5f84 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S @@ -197,6 +197,12 @@ look_for_VFP_exceptions: tst r5, #FPSCR_IXE bne process_exception + tst r5, #FPSCR_LENGTH_MASK + beq skip + orr r1, r1, #FPEXC_DEX + b process_exception +skip: + @ Fall into hand on to next handler - appropriate coproc instr @ not recognised by VFP -- cgit v1.2.3