From 695dcb2ba1363d06384b8e98c1adc46e79b36239 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sun, 19 Feb 2017 22:41:46 +0100 Subject: ARM64: dts: meson-gxbb-wetek-play2: add the ethernet PHY's reset GPIO This resets the ethernet PHY during boot to get the PHY into a "clean" state. While here also specify the phy-handle of the ethmac node to make the PHY configuration similar to the one we have on GXL devices. This will allow us to specify OF-properties for the PHY itself. Signed-off-by: Martin Blumenstingl Tested-by: Neil Armstrong Reviewed-by: Jerome Brunet Signed-off-by: Kevin Hilman --- .../boot/dts/amlogic/meson-gxbb-wetek-play2.dts | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts') diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts index ea79fdd2c248..ee86af928722 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts @@ -87,6 +87,30 @@ }; }; +ðmac { + status = "okay"; + pinctrl-0 = <ð_rgmii_pins>; + pinctrl-names = "default"; + + phy-handle = <ð_phy0>; + phy-mode = "rgmii"; + + snps,reset-gpio = <&gpio GPIOZ_14 0>; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-active-low; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + eth_phy0: ethernet-phy@0 { + /* Realtek RTL8211F (0x001cc916) */ + reg = <0>; + }; + }; +}; + &i2c_A { status = "okay"; pinctrl-0 = <&i2c_a_pins>; -- cgit v1.2.3