From 62ff9683b5980327b2952f188e529fd67fddf94a Mon Sep 17 00:00:00 2001 From: Duc Dang Date: Fri, 16 Oct 2015 12:45:24 -0700 Subject: arm64: dts: Add Designware I2C controller DTS entries for X-Gene v1 SoC This patch adds DTS entries for Designware I2C controller used in APM X-Gene v1 SoC evaluation platform (Mustang board). APM X-Gene v1 SoC has 2 I2C controllers. On Mustang board, I2C1 is used to implement proxy I2C interface; I2C1 can be used as I2C slave port (for BMC) or as I2C master port (if no BMC is used). Only I2C1 DT entry is added in this patch with default status as 'disabled'. Signed-off-by: Duc Dang --- arch/arm64/boot/dts/apm/apm-storm.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'arch/arm64/boot/dts/apm') diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi index db190a44cb1b..6297b7cdbe80 100644 --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi @@ -417,6 +417,20 @@ reg-names = "csr-reg"; clock-output-names = "dmaclk"; }; + + i2cclk: i2cclk@17000000 { + status = "disabled"; + compatible = "apm,xgene-device-clock"; + #clock-cells = <1>; + clocks = <&ahbclk 0>; + reg = <0x0 0x17000000 0x0 0x2000>; + reg-names = "csr-reg"; + csr-offset = <0xc>; + csr-mask = <0x4>; + enable-offset = <0x10>; + enable-mask = <0x4>; + clock-output-names = "i2cclk"; + }; }; msi: msi@79000000 { @@ -747,6 +761,18 @@ }; }; + i2c0: i2c0@10512000 { + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,designware-i2c"; + reg = <0x0 0x10512000 0x0 0x1000>; + interrupts = <0 0x44 0x4>; + #clock-cells = <1>; + clocks = <&i2cclk 0>; + bus_num = <0>; + }; + phy1: phy@1f21a000 { compatible = "apm,xgene-phy"; reg = <0x0 0x1f21a000 0x0 0x100>; -- cgit v1.2.3