From ba3213602d2824de358564ff391293f351ba1b1c Mon Sep 17 00:00:00 2001 From: Harninder Rai Date: Tue, 3 Jan 2017 15:27:31 +0530 Subject: arm64: dts: Add support for FSL's LS1012A SoC LS1012A features an advanced 64-bit ARM v8 CortexA53 processor with 32 KB of parity protected L1-I cache, 32 KB of ECC protected L1-D cache, as well as 256 KB of ECC protected L2 cache. Features summary One 64-bit ARM-v8 Cortex-A53 core with the following capabilities - Arranged as a cluster of one core supporting a 256 KB L2 cache with ECC protection - Speed up to 800 MHz - Parity-protected 32 KB L1 instruction cache and 32 KB L1 data cache - Neon SIMD engine - ARM v8 cryptography extensions One 16-bit DDR3L SDRAM memory controller ARM core-link CCI-400 cache coherent interconnect Cryptography acceleration (SEC) One Configurable x3 SerDes One PCI Express Gen2 controller, supporting x1 operation One serial ATA (SATA Gen 3.0) controller One USB 3.0/2.0 controller with integrated PHY Following levels of DTSI/DTS files have been created for the LS1012A SoC family: - fsl-ls1012a.dtsi: DTS-Include file for FSL LS1012A SoC. - fsl-ls1012a-frdm.dts: DTS file for FSL LS1012A FRDM board. - fsl-ls1012a-qds.dts: DTS file for FSL LS1012A QDS board. - fsl-ls1012a-rdb.dts: DTS file for FSL LS1012A RDB board. Signed-off-by: Harninder Rai Signed-off-by: Bhaskar Upadhaya Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 128 ++++++++++++++++++++++ 1 file changed, 128 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts') diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts new file mode 100644 index 000000000000..14a67f1709e7 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts @@ -0,0 +1,128 @@ +/* + * Device Tree file for Freescale LS1012A QDS Board. + * + * Copyright 2016, Freescale Semiconductor + * + * This file is dual-licensed: you can use it either under the terms + * of the GPLv2 or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ +/dts-v1/; + +#include "fsl-ls1012a.dtsi" + +/ { + model = "LS1012A QDS Board"; + compatible = "fsl,ls1012a-qds", "fsl,ls1012a"; + + sys_mclk: clock-mclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,widgets = + "Microphone", "Microphone Jack", + "Headphone", "Headphone Jack", + "Speaker", "Speaker Ext", + "Line", "Line In Jack"; + simple-audio-card,routing = + "MIC_IN", "Microphone Jack", + "Microphone Jack", "Mic Bias", + "LINE_IN", "Line In Jack", + "Headphone Jack", "HP_OUT", + "Speaker Ext", "LINE_OUT"; + + simple-audio-card,cpu { + sound-dai = <&sai2>; + frame-master; + bitclock-master; + }; + + simple-audio-card,codec { + sound-dai = <&codec>; + frame-master; + bitclock-master; + system-clock-frequency = <24576000>; + }; + }; +}; + +&duart0 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + pca9547@77 { + compatible = "nxp,pca9547"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x4>; + + codec: sgtl5000@a { + #sound-dai-cells = <0>; + compatible = "fsl,sgtl5000"; + reg = <0xa>; + VDDA-supply = <®_3p3v>; + VDDIO-supply = <®_3p3v>; + clocks = <&sys_mclk>; + }; + }; + }; +}; + +&sai2 { + status = "okay"; +}; -- cgit v1.2.3