From bcae63bb27e513e90d22477029017e9fe0971bff Mon Sep 17 00:00:00 2001 From: Ran Wang Date: Wed, 25 Dec 2019 14:00:27 +0800 Subject: arm64: dts: layerscape: apply dma-coherent for dwc3 nodes Since dwc3 cache type has been set to cacheable, apply dma-coherent to all dwc3 nodes accordingly. Note: For LS1043A and LS1046A, since QE-HDLC still doesn't support dma-coherent, we cannot directly revert cd1a4f3c (sdk: dts: ls104x move dma-coherent from soc to its child nodes) to recover dma-coherent for soc. Signed-off-by: Ran Wang --- arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi') diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi index 5ed9df58a99d..99878f9b0bef 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi @@ -738,6 +738,7 @@ snps,dis_rxdet_inp3_quirk; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; snps,host-vbus-glitches; + dma-coherent; }; usb1: usb3@3110000 { @@ -750,6 +751,7 @@ snps,dis_rxdet_inp3_quirk; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; snps,host-vbus-glitches; + dma-coherent; }; ccn@4000000 { -- cgit v1.2.3