From 4c1e53bd833b2f7a250751a0e0a94eb81d43a3ed Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Thu, 16 Dec 2021 10:49:17 +0100 Subject: arm64: dts: apalis-imx8: leave phy-reset in push-pull In order to prevent backfeeding we have a sleep-state of our pins. Currently the phy-reset is put to open-drain input, High-Z and pull-down. This causes a pull-up on hardware and the configured pull-down to work against each other and causing some strange voltage level. Leave the phy-reset signal configured as push-pull and pull-up as the reset also needs to be high during runtime suspend. Signed-off-by: Philippe Schenker --- arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi index 72dcc4a4a6b2..2cba7b82de48 100644 --- a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi @@ -1124,7 +1124,7 @@ IMX8QM_ENET0_RGMII_RXD2_LSIO_GPIO6_IO08 0x04000040 IMX8QM_ENET0_RGMII_RXD3_LSIO_GPIO6_IO09 0x04000040 IMX8QM_ENET0_REFCLK_125M_25M_LSIO_GPIO4_IO15 0x04000040 - IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 0x04000040 + IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 0x06000020 IMX8QM_MIPI_CSI1_MCLK_OUT_LSIO_GPIO1_IO29 0x04000040 >; }; -- cgit v1.2.3