From 856d77391685d345821d9625e6660e5b45052255 Mon Sep 17 00:00:00 2001 From: Xianzhong Date: Fri, 6 Sep 2019 06:25:35 +0800 Subject: arm64: dts: imx8qm/qxp: add dpr support for bliteng add dpr channel 1 and 2 to support DPU blit engine Signed-off-by: Xianzhong --- arch/arm64/boot/dts/freescale/imx8-ss-dc0.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-dc0.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dc0.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dc0.dtsi index 8e5c914c776a..1558cacb4508 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dc0.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dc0.dtsi @@ -339,6 +339,8 @@ dc0_subsys: bus@56000000 { <&pd IMX_SC_R_DC_0_PLL_0>, <&pd IMX_SC_R_DC_0_PLL_1>; power-domain-names = "dc", "pll0", "pll1"; + fsl,dpr-channels = <&dc0_dpr1_channel1>, + <&dc0_dpr1_channel2>; status = "disabled"; }; }; -- cgit v1.2.3