From 30ca4c96ea93227ba3823946bd4b97417b2230e1 Mon Sep 17 00:00:00 2001 From: Peter Chen Date: Fri, 27 Mar 2020 10:53:28 +0800 Subject: MLK-23676-2 ARM64: dts: imx8dxl-ss-conn: change clock output name for USBOTG2 PHY USBOTG2 PHY's output name should be PHY ipg clock, but not controller ahb clock, it is aligned with USBOTG1 PHY's output clock. Signed-off-by: Peter Chen --- arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi index 23c0a012e3af..9fd0757b2c3b 100644 --- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi @@ -74,7 +74,7 @@ bit-offset = <28>; clocks = <&conn_ipg_clk>; - clock-output-names = "usboh3_2_ahb_clk"; + clock-output-names = "usboh3_2_phy_ipg_clk"; power-domains = <&pd IMX_SC_R_USB_1_PHY>; }; -- cgit v1.2.3