From 9bf2a3710859d51a4f3daaa4175c41f78bb9f624 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Fri, 18 Oct 2019 16:25:13 +0800 Subject: arm64: dts: imx8mm: add inmate/root dts Add inmate/root dts for jailhouse dual linux case. Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx8mm-evk-root.dts | 90 +++++++++++++++++++++++ 1 file changed, 90 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-evk-root.dts (limited to 'arch/arm64/boot/dts/freescale/imx8mm-evk-root.dts') diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk-root.dts b/arch/arm64/boot/dts/freescale/imx8mm-evk-root.dts new file mode 100644 index 000000000000..ba85012da178 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk-root.dts @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 NXP + */ + +#include "imx8mm-evk.dts" + +/ { + interrupt-parent = <&gic>; +}; + +&cpu_pd_wait { + /delete-property/ compatible; + /*arm,psci-suspend-param = <0x0>;*/ +}; + +&clk { + init-on-array = ; +}; + +&iomuxc { + /* + * Used for the 2nd Linux. + * TODO: M4 may use these pins. + */ + pinctrl_uart4: uart4grp { + fsl,pins = < + MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 + MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 + >; + }; +}; + +&{/busfreq} { + /* Disable busfreq, to avoid 1st Linux busfreq crash other inmates */ + status = "disabled"; +}; + +&{/reserved-memory} { + + ivshmem_reserved: ivshmem@bbb00000 { + no-map; + reg = <0 0xbbb00000 0x0 0x00100000>; + }; + + ivshmem2_reserved: ivshmem2@bba00000 { + no-map; + reg = <0 0xbba00000 0x0 0x00100000>; + }; + + pci_reserved: pci@bb800000 { + no-map; + reg = <0 0xbb800000 0x0 0x00200000>; + }; + + loader_reserved: loader@bb700000 { + no-map; + reg = <0 0xbb700000 0x0 0x00100000>; + }; + + jh_reserved: jh@b7c00000 { + no-map; + reg = <0 0xb7c00000 0x0 0x00400000>; + }; + + /* 512MB */ + inmate_reserved: inmate@93c00000 { + no-map; + reg = <0 0x93c00000 0x0 0x24000000>; + }; +}; + +&uart2 { + /* uart2 is used by the 2nd OS, so configure pin and clk */ + pinctrl-0 = <&pinctrl_uart2>, <&pinctrl_uart4>; + assigned-clocks = <&clk IMX8MM_CLK_UART4>; + assigned-clock-parents = <&clk IMX8MM_CLK_24M>; +}; + +&usdhc3 { + status = "disabled"; +}; + +&usdhc2 { + /* sdhc3 is used by 2nd linux, configure the pin */ + pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc3>, <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc3>, <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; +}; -- cgit v1.2.3