From d0cca80b38ce59dee216006623c0712ca1b99528 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Thu, 5 Dec 2019 19:36:21 +0100 Subject: dt-bindings: pinctrl: imx8mm: fix 2a762bfc93fe Correct copy/past errors with UART2 pinfunctions. Signed-off-by: Max Krummenacher (cherry picked from commit cbd45f6967e10c27caac13677825a2e9b8b4bd60) --- arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) (limited to 'arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h') diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h index 07cd4d828a3a..e7fac56db320 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h +++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h @@ -472,34 +472,37 @@ #define MX8MM_IOMUXC_SAI3_RXC_SAI3_RX_BCLK 0x1D0 0x438 0x000 0x0 0x0 #define MX8MM_IOMUXC_SAI3_RXC_GPT1_CLK 0x1D0 0x438 0x000 0x1 0x0 #define MX8MM_IOMUXC_SAI3_RXC_SAI5_RX_BCLK 0x1D0 0x438 0x4D0 0x2 0x2 -#define MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x1D0 0x438 0x000 0x1 0x0 -#define MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_RTS_B 0x1D0 0x438 0x4F8 0x1 0x2 -#define MX8MM_IOMUXC_SAI3_RXC_UART2_DTE_CTS_B 0x1D0 0x438 0x4F8 0x1 0x2 -#define MX8MM_IOMUXC_SAI3_RXC_UART2_DTE_RTS_B 0x1D0 0x438 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x1D0 0x438 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_RTS_B 0x1D0 0x438 0x4F8 0x4 0x2 +#define MX8MM_IOMUXC_SAI3_RXC_UART2_DTE_CTS_B 0x1D0 0x438 0x4F8 0x4 0x2 +#define MX8MM_IOMUXC_SAI3_RXC_UART2_DTE_RTS_B 0x1D0 0x438 0x000 0x4 0x0 #define MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29 0x1D0 0x438 0x000 0x5 0x0 #define MX8MM_IOMUXC_SAI3_RXC_TPSMP_HTRANS1 0x1D0 0x438 0x000 0x7 0x0 #define MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0x1D4 0x43C 0x000 0x0 0x0 #define MX8MM_IOMUXC_SAI3_RXD_GPT1_COMPARE1 0x1D4 0x43C 0x000 0x1 0x0 #define MX8MM_IOMUXC_SAI3_RXD_SAI5_RX_DATA0 0x1D4 0x43C 0x4D4 0x2 0x2 -#define MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x1D0 0x438 0x4F8 0x1 0x3 -#define MX8MM_IOMUXC_SAI3_RXD_UART2_DTE_RTS_B 0x1D0 0x438 0x000 0x1 0x0 -#define MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_CTS_B 0x1D0 0x438 0x000 0x1 0x0 -#define MX8MM_IOMUXC_SAI3_RXD_UART2_DTE_RTS_B 0x1D0 0x438 0x000 0x1 0x0 -#define MX8MM_IOMUXC_SAI3_RXD_UART2_DTE_CTS_B 0x1D0 0x438 0x4F8 0x1 0x3 +#define MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x1D4 0x43C 0x4F8 0x4 0x3 +#define MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_CTS_B 0x1D4 0x43C 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI3_RXD_UART2_DTE_RTS_B 0x1D4 0x43C 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI3_RXD_UART2_DTE_CTS_B 0x1D4 0x43C 0x4F8 0x4 0x3 #define MX8MM_IOMUXC_SAI3_RXD_GPIO4_IO30 0x1D4 0x43C 0x000 0x5 0x0 #define MX8MM_IOMUXC_SAI3_RXD_TPSMP_HDATA0 0x1D4 0x43C 0x000 0x7 0x0 #define MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0x1D8 0x440 0x000 0x0 0x0 #define MX8MM_IOMUXC_SAI3_TXFS_GPT1_CAPTURE2 0x1D8 0x440 0x000 0x1 0x0 #define MX8MM_IOMUXC_SAI3_TXFS_SAI5_RX_DATA1 0x1D8 0x440 0x4D8 0x2 0x2 -#define MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x1D8 0x440 0x4FC 0x4 0x2 +#define MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x1D8 0x440 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_TX 0x1D8 0x440 0x4FC 0x4 0x2 +#define MX8MM_IOMUXC_SAI3_TXFS_UART2_DTE_RX 0x1D8 0x440 0x4FC 0x4 0x2 #define MX8MM_IOMUXC_SAI3_TXFS_UART2_DTE_TX 0x1D8 0x440 0x000 0x4 0x0 #define MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31 0x1D8 0x440 0x000 0x5 0x0 #define MX8MM_IOMUXC_SAI3_TXFS_TPSMP_HDATA1 0x1D8 0x440 0x000 0x7 0x0 #define MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0x1DC 0x444 0x000 0x0 0x0 #define MX8MM_IOMUXC_SAI3_TXC_GPT1_COMPARE2 0x1DC 0x444 0x000 0x1 0x0 #define MX8MM_IOMUXC_SAI3_TXC_SAI5_RX_DATA2 0x1DC 0x444 0x4DC 0x2 0x2 -#define MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x1DC 0x444 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_RX 0x1DC 0x444 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x1DC 0x444 0x4FC 0x4 0x3 #define MX8MM_IOMUXC_SAI3_TXC_UART2_DTE_RX 0x1DC 0x444 0x4FC 0x4 0x3 +#define MX8MM_IOMUXC_SAI3_TXC_UART2_DTE_TX 0x1DC 0x444 0x000 0x4 0x0 #define MX8MM_IOMUXC_SAI3_TXC_GPIO5_IO0 0x1DC 0x444 0x000 0x5 0x0 #define MX8MM_IOMUXC_SAI3_TXC_TPSMP_HDATA2 0x1DC 0x444 0x000 0x7 0x0 #define MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0x1E0 0x448 0x000 0x0 0x0 -- cgit v1.2.3