From 754ba6188b156f1606aee022271ee260d16d58fc Mon Sep 17 00:00:00 2001 From: Fancy Fang Date: Tue, 13 Aug 2019 17:11:31 +0800 Subject: ARM64: dts: imx8mm: correct 'reg' property for display nodes Signed-off-by: Fancy Fang --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm64/boot/dts/freescale/imx8mm.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 3da363c557e9..866689a3cb9e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -984,7 +984,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx8mm-lcdif"; - reg = <0x0 0x32e00000 0x0 0x10000>; + reg = <0x32e00000 0x10000>; clocks = <&clk IMX8MM_CLK_LCDIF_PIXEL>, <&clk IMX8MM_CLK_DISP_AXI_ROOT>, <&clk IMX8MM_CLK_DISP_APB_ROOT>; @@ -1013,7 +1013,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx8mm-mipi-dsim"; - reg = <0x0 0x32e10000 0x0 0x400>; + reg = <0x32e10000 0x400>; clocks = <&clk IMX8MM_CLK_DSI_CORE>, <&clk IMX8MM_CLK_DSI_PHY_REF>; clock-names = "cfg", "pll-ref"; @@ -1035,7 +1035,7 @@ dispmix_gpr: display-gpr@32e28000 { compatible = "fsl, imx8mm-iomuxc-gpr", "syscon"; - reg = <0x0 0x32e28000 0x0 0x100>; + reg = <0x32e28000 0x100>; }; usbotg1: usb@32e40000 { -- cgit v1.2.3