From e50e707b704fcafbc1c0f73912a354083336297c Mon Sep 17 00:00:00 2001
From: Adrian Alonso <adrian.alonso@nxp.com>
Date: Mon, 9 Nov 2020 11:48:05 -0600
Subject: MLK-24932-1: dts: arm64: freescale: imx8mn evk iqaudio dacplus

Enable support for IQauidio dacplus audio hats on
iMX8MNano EVK.

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 0fe19d3f2e949c65ffa636d4971b9f5f463497fd)
---
 .../dts/freescale/imx8mn-evk-iqaudio-dacplus.dts   | 65 ++++++++++++++++++++++
 1 file changed, 65 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-evk-iqaudio-dacplus.dts

(limited to 'arch/arm64/boot/dts/freescale/imx8mn-evk-iqaudio-dacplus.dts')

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk-iqaudio-dacplus.dts b/arch/arm64/boot/dts/freescale/imx8mn-evk-iqaudio-dacplus.dts
new file mode 100644
index 000000000000..888e49e52699
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mn-evk-iqaudio-dacplus.dts
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2020 NXP.
+ */
+
+#include "imx8mn-evk.dts"
+
+/ {
+	reg_3v3_vext: regulator-3v3-vext {
+		compatible = "regulator-fixed";
+		regulator-name = "3V3_VEXT";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	sound-micfil {
+		status = "disabled";
+	};
+
+	sound-pcm512x {
+		compatible = "fsl,imx-audio-pcm512x";
+		model = "pcm512x-audio";
+		audio-cpu = <&sai5>;
+		audio-codec = <&pcm512x>;
+		format = "i2s";
+		audio-widgets =
+			"Line", "Left Line Out Jack",
+			"Line", "Right Line Out Jack";
+		audio-routing =
+			"Left Line Out Jack", "OUTL",
+			"Right Line Out Jack", "OUTR";
+		dac,24db_digital_gain;
+	};
+};
+
+&i2c3 {
+	pcm512x: pcm512x@4c {
+		compatible = "ti,pcm5122";
+		reg = <0x4c>;
+		AVDD-supply = <&reg_3v3_vext>;
+		DVDD-supply = <&reg_3v3_vext>;
+		CPVDD-supply = <&reg_3v3_vext>;
+	};
+};
+
+&iomuxc {
+	imx8mn-evk {
+		pinctrl_sai5: sai5grp {
+			fsl,pins = <
+				MX8MN_IOMUXC_SAI5_RXD1_SAI5_TX_SYNC	0xd6
+				MX8MN_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK	0xd6
+				MX8MN_IOMUXC_SAI5_RXD3_SAI5_TX_DATA0	0xd6
+				MX8MN_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0	0xd6
+			>;
+		};
+	};
+};
+
+&micfil {
+	status = "disabled";
+};
+
+&sai5 {
+	status = "okay";
+};
-- 
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