From adb009f786869bde11e6ba99edd0d7729447ec4e Mon Sep 17 00:00:00 2001 From: Oleksandr Suvorov Date: Fri, 9 Apr 2021 17:24:56 +0300 Subject: arm64: dts: verdin-imx8mp: tune eMMC settings Add reset signal pinmux for 100/200MHz modes and claim HS400 v1.8 mode explicitly for on-module eMMC. Related-to: ELB-3357 Signed-off-by: Oleksandr Suvorov --- arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi index ba9f6b120255..6e92a05096ea 100755 --- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi @@ -710,6 +710,7 @@ &usdhc3 { bus-width = <8>; keep-power-in-suspend; + mmc-hs400-1_8v; non-removable; pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; @@ -717,7 +718,6 @@ pinctrl-2 = <&pinctrl_usdhc3_200mhz>; pm-ignore-notify; status = "okay"; - /* TODO Strobe */ }; &vpu_g1 { @@ -1234,6 +1234,7 @@ MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190 + MX8MP_IOMUXC_GPIO1_IO09__USDHC3_RESET_B 0x1d1 >; }; @@ -1250,6 +1251,7 @@ MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194 + MX8MP_IOMUXC_GPIO1_IO09__USDHC3_RESET_B 0x1d1 >; }; -- cgit v1.2.3