From fc9f8cf465e5551d9ab09262b6b3cf71ee440a89 Mon Sep 17 00:00:00 2001 From: Richard Zhu Date: Tue, 2 Feb 2021 17:03:45 +0800 Subject: MLK-25282-1 arm64: dts: imx8mp: correct the pcie phy clock In the i.MX8MP PCIe design, the PCIe PHY REF clock comes from external OSC or internal system PLL. It is configured in the IOMUX_GPR14 register directly, and can't be contolled by CCM at all. So, correct it in the DTS node. Signed-off-by: Richard Zhu Reviewed-by: Jason Liu (cherry picked from commit 65b5b8974b14cc4fee501310e97e675eda4f4e1b) (cherry picked from commit db6a520392f7dfd6219aa12d78748030d4809e92) Signed-off-by: Andrey Zhizhikin --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index a0867c9feeb8..00c60337b4f6 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1887,10 +1887,8 @@ pcie_phy: pcie-phy@32f00000 { compatible = "fsl,imx8mp-pcie-phy"; reg = <0x0 0x32f00000 0x0 0x10000>; - clocks = <&clk IMX8MP_CLK_PCIE_PHY>; + clocks = <&clk IMX8MP_CLK_DUMMY>; clock-names = "phy"; - assigned-clocks = <&clk IMX8MP_CLK_PCIE_PHY>; - assigned-clock-parents = <&clk IMX8MP_CLK_24M>; #phy-cells = <0>; status = "disabled"; }; -- cgit v1.2.3 From 39923e11bf6cecfb52abdddb9558eed2e6728066 Mon Sep 17 00:00:00 2001 From: Richard Zhu Date: Wed, 23 Dec 2020 11:14:45 +0800 Subject: MLK-25283-3 arm64: dts: imx8mp: set clkreq input and add view port property Set the PCIe CLKREQ# as input and add the num-viewport property for i.MX8MP PCIe RC port. Signed-off-by: Richard Zhu Reviewed-by: Jun Li (cherry picked from commit f95d91816f5d521b2dec5fa2fe7f2a52a381eded) (cherry picked from commit 8a5e146adec7c948bfaa250f5c54f9d6fb2de471) Signed-off-by: Andrey Zhizhikin --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 00c60337b4f6..aad82f46c984 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1938,6 +1938,7 @@ ranges = <0x81000000 0 0x00000000 0x0 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */ 0x82000000 0 0x18000000 0x0 0x18000000 0 0x07f00000>; /* non-prefetchable memory */ num-lanes = <1>; + num-viewport = <4>; interrupts = , ; /* eDMA */ interrupt-names = "msi", "dma"; -- cgit v1.2.3 From fdb96c1b782fa82f31791b3934a612e30b0c7810 Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Wed, 6 Jan 2021 18:35:41 +0800 Subject: MLK-25215-1 ARM64: dts: imx8mp: add virtual dewarp node on iMX8MP, there's only 1 dewarp. the patch adds a second dewarp node (virtual) to work with ISP SW release P8. this might be removed after vendor modify the way using dewarp. Signed-off-by: Robby Cai Reviewed-by: Guoniu.zhou (cherry picked from commit 3c32b1080083faff8381cdeb1adadaff0144aac3) (cherry picked from commit b16c09a8bd51a74a988f6d05734bfbf776bee9a2) Signed-off-by: Andrey Zhizhikin --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index aad82f46c984..0587b201b83b 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright 2019 NXP + * Copyright 2019-2021 NXP */ #include @@ -1838,6 +1838,15 @@ compatible = "fsl,imx8mp-dwe"; reg = <0x32e30000 0x10000>; interrupts = ; + id = <0>; + status = "disabled"; + }; + + dewarp_1: dwe_dup@32e30000 { + compatible = "fsl,imx8mp-dwe"; + reg = <0x32e30000 0x10000>; + interrupts = ; + id = <1>; status = "disabled"; }; -- cgit v1.2.3 From bdb006cad8f3639fe1048d93e4fe23173ed6486a Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Wed, 27 Jan 2021 21:54:32 +0800 Subject: MLK-23600-1 Change MIPI CSI clock to 266MHz for dual ISP cameras Set MIPI clock according to IC team. for 1 ISP camera on CSI0, MIPI CSI clock set to 500MHz for 2 ISP cameras on CSI0/CSI1, MIPI CSI clock both set to 266MHz Signed-off-by: Robby Cai Reviewed-by: Guoniu.zhou (cherry picked from commit a38f457b63fa8a0d9b4c5de39a12959c172e7e35) (cherry picked from commit e20ebbce9f06086249d7dda9d73bd9e328074c02) Signed-off-by: Andrey Zhizhikin --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 0587b201b83b..133a45f22ffe 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1880,7 +1880,7 @@ <&clk IMX8MP_CLK_MEDIA_APB>; clock-names = "mipi_clk", "disp_axi", "disp_apb"; assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM2_PIX>; - assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>; assigned-clock-rates = <266000000>; bus-width = <4>; csi-gpr = <&mediamix_gasket1>; -- cgit v1.2.3 From 1ad71e29f5e58bcf3c128ffdce6f4caece0c6768 Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Thu, 24 Dec 2020 20:41:57 +0800 Subject: MLK-23600-2 Update ISP and Dewarp clock and power update ISP and Dewarp clock and power Signed-off-by: Robby Cai Reviewed-by: Guoniu.zhou (cherry picked from commit e6031680ba2d67a6961a5da5fc68a913962c66d2) (cherry picked from commit f5390f2bcbc7cb9fab29605fc2d3cb61373a5800) Signed-off-by: Andrey Zhizhikin --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 133a45f22ffe..daac9bbfc22b 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1810,8 +1810,10 @@ compatible = "fsl,imx8mp-isp"; reg = <0x32e10000 0x10000>; interrupts = ; - clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>; - clock-names = "isp_root"; + clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>, + <&clk IMX8MP_CLK_MEDIA_AXI>, + <&clk IMX8MP_CLK_MEDIA_APB>; + clock-names = "core", "axi", "ahb"; assigned-clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>; assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; assigned-clock-rates = <500000000>; @@ -1824,8 +1826,10 @@ compatible = "fsl,imx8mp-isp"; reg = <0x32e20000 0x10000>; interrupts = ; - clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>; - clock-names = "isp_root"; + clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>, + <&clk IMX8MP_CLK_MEDIA_AXI>, + <&clk IMX8MP_CLK_MEDIA_APB>; + clock-names = "core", "axi", "ahb"; assigned-clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>; assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; assigned-clock-rates = <500000000>; @@ -1838,6 +1842,14 @@ compatible = "fsl,imx8mp-dwe"; reg = <0x32e30000 0x10000>; interrupts = ; + clocks = <&clk IMX8MP_CLK_MEDIA_AXI>, + <&clk IMX8MP_CLK_MEDIA_AXI>, + <&clk IMX8MP_CLK_MEDIA_APB>; + clock-names = "core", "axi", "ahb"; + assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; + assigned-clock-rates = <500000000>, <200000000>; + power-domains = <&ispdwp_pd>; id = <0>; status = "disabled"; }; @@ -1846,6 +1858,14 @@ compatible = "fsl,imx8mp-dwe"; reg = <0x32e30000 0x10000>; interrupts = ; + clocks = <&clk IMX8MP_CLK_MEDIA_AXI>, + <&clk IMX8MP_CLK_MEDIA_AXI>, + <&clk IMX8MP_CLK_MEDIA_APB>; + clock-names = "core", "axi", "ahb"; + assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; + assigned-clock-rates = <500000000>, <200000000>; + power-domains = <&ispdwp_pd>; id = <1>; status = "disabled"; }; -- cgit v1.2.3 From 68c8860bd02d578bf431e8686aea1afc51c4b3ea Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Tue, 9 Feb 2021 23:26:30 +0800 Subject: MLK-23600-3 Remove second virtual dewarp node second virtual dewarp node not needed as VSI gets back to use the real dewarp Signed-off-by: Robby Cai Reviewed-by: Guoniu.zhou (cherry picked from commit bf7698bb60035c7b32cec6f7c57e3072869a7888) (cherry picked from commit 420d04d11c0c4b37ec6913ddead75dcf14482d9d) Signed-off-by: Andrey Zhizhikin --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 16 ---------------- 1 file changed, 16 deletions(-) (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index daac9bbfc22b..7b569be2a1b5 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1854,22 +1854,6 @@ status = "disabled"; }; - dewarp_1: dwe_dup@32e30000 { - compatible = "fsl,imx8mp-dwe"; - reg = <0x32e30000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MP_CLK_MEDIA_AXI>, - <&clk IMX8MP_CLK_MEDIA_AXI>, - <&clk IMX8MP_CLK_MEDIA_APB>; - clock-names = "core", "axi", "ahb"; - assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, - <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; - assigned-clock-rates = <500000000>, <200000000>; - power-domains = <&ispdwp_pd>; - id = <1>; - status = "disabled"; - }; - mipi_csi_0: csi@32e40000 { compatible = "fsl,imx8mp-mipi-csi", "fsl,imx8mn-mipi-csi"; reg = <0x32e40000 0x10000>; -- cgit v1.2.3 From 8796436b8f66dae5cef04fdd79fd7fa85db7e95f Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Mon, 11 Jan 2021 17:05:36 +0800 Subject: MLK-23600-4 Use GPR to control dewarp in driver Previously it controls dewarp in mipi driver which is not standard way. Now use gpr to control dewarp in dewarp driver. Signed-off-by: Robby Cai Reviewed-by: Guoniu.zhou (cherry picked from commit 22373bd4b6979bc9c8e63b678bcd5204714fd4c9) (cherry picked from commit 7db1a365173f9a94a402192bb13b0fe80bc4175c) Signed-off-by: Andrey Zhizhikin --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 7b569be2a1b5..3870ecbe4c98 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1819,6 +1819,7 @@ assigned-clock-rates = <500000000>; power-domains = <&ispdwp_pd>; id = <0>; + gpr = <&mediamix_blk_ctl>; status = "disabled"; }; @@ -1835,6 +1836,7 @@ assigned-clock-rates = <500000000>; power-domains = <&ispdwp_pd>; id = <1>; + gpr = <&mediamix_blk_ctl>; status = "disabled"; }; -- cgit v1.2.3 From f3c2dd6f1cb9183affb1f2017d0947e1f6d9ad00 Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Wed, 13 Jan 2021 10:54:39 +0800 Subject: MLK-23600-5 Fix the way VIV_VIDIOC_QUERY_EXTMEM used reserved memory use memory-region to get reserved memory Signed-off-by: Robby Cai Reviewed-by: Guoniu.zhou (cherry picked from commit 5a28380ef4f4afffdabcfacd062706487cc150f8) (cherry picked from commit 9a75296315d40f8737bda9d5d097a0c6d402ff16) Signed-off-by: Andrey Zhizhikin --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 3870ecbe4c98..fb2e0b83abe3 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -206,6 +206,16 @@ no-map; reg = <0 0x92400000 0 0x2000000>; }; + + isp0_reserved: isp0@B0000000 { + no-map; + reg = <0 0xB0000000 0 0x10000000>; + }; + + isp1_reserved: isp1@B0000000 { + no-map; + reg = <0 0xB0000000 0 0x10000000>; + }; }; osc_32k: clock-osc-32k { @@ -1820,6 +1830,7 @@ power-domains = <&ispdwp_pd>; id = <0>; gpr = <&mediamix_blk_ctl>; + memory-region = <&isp0_reserved>; status = "disabled"; }; @@ -1837,6 +1848,7 @@ power-domains = <&ispdwp_pd>; id = <1>; gpr = <&mediamix_blk_ctl>; + memory-region = <&isp1_reserved>; status = "disabled"; }; -- cgit v1.2.3 From cffe4fb95c43405f2fe3ceab81948a12c8769724 Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Thu, 1 Apr 2021 20:09:30 +0800 Subject: MLK-25356 arm64: dts: imx8mp: fix overlap for reserved memory for isp Remove reserved memory for isp1 because now only use one isp0 for tuning tool. The reserved memory is only used for tuning tool, could be removed for normal operations. Signed-off-by: Robby Cai Reviewed-by: G.n. Zhou (cherry picked from commit 5f2220e87dd8a8fb86f524ea7945ab1d4155bc73) Signed-off-by: Andrey Zhizhikin --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index fb2e0b83abe3..9cf497b1ad69 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -207,14 +207,10 @@ reg = <0 0x92400000 0 0x2000000>; }; - isp0_reserved: isp0@B0000000 { + /* used only by tuning tool, can be removed for normal case */ + isp0_reserved: isp0@94400000 { no-map; - reg = <0 0xB0000000 0 0x10000000>; - }; - - isp1_reserved: isp1@B0000000 { - no-map; - reg = <0 0xB0000000 0 0x10000000>; + reg = <0 0x94400000 0 0x10000000>; }; }; @@ -1848,7 +1844,6 @@ power-domains = <&ispdwp_pd>; id = <1>; gpr = <&mediamix_blk_ctl>; - memory-region = <&isp1_reserved>; status = "disabled"; }; -- cgit v1.2.3